FlexSPI Configuration Block (FCB)#
The FCB will configure the settings of the FlexSPI communication. It will establish how many ports will be used, what clock speed to run the FlexSPI controller at, etc. This is the first thing that happens, as everything else is stored in Flash memory. In order to read anything else, the flash must first be configured.
FCB for lpc5534, Revision: 1a and flexspi_nor#
FCB for lpc5534, Revision: 1a and flexspi_nor JSON schema
FCB for lpc5534, Revision: 1a and flexspi_nor YAML configuration template
# ================================== FCB for lpc5534, Revision: 1a and flexspi_nor ===================================
# ======================================================================================================================
# == FCB for lpc5534, Revision: 1a and flexspi_nor ==
# ======================================================================================================================
# -------------------------------------===== The chip family name [Required] =====--------------------------------------
# Description: NXP chip family identifier.
family: CHOOSE_FROM_TABLE
# -----------------------------------------===== MCU revision [Optional] =====------------------------------------------
# Description: Revision of silicon. The 'latest' name, means most current revision.
# Possible options: <0a, 1a, latest>
revision: 1a
# ------------------------------------------===== Memory type [Required] =====------------------------------------------
# Description: Specify type of memory used by FCB description.
# Possible options: <flexspi_nor>
type: flexspi_nor
# --------------------------------------------===== lpc5534 [Required] =====--------------------------------------------
fcb_settings:
# ---------------------------------------------===== tag [Optional] =====---------------------------------------------
# Description: Offset: 0x00000000, Width: 32b; [0x000-0x003] Tag, fixed value 0x42464346UL
tag: '0x42464346'
# -------------------------------------------===== version [Optional] =====-------------------------------------------
# Description: Offset: 0x00000004, Width: 32b; [0x004-0x007] Version,[31:24] -'V', [23:16] - Major, [15:8] - Minor,
# [7:0] - bugfix
version: '0x56020000'
# ------------------------------------------===== reserved0 [Optional] =====------------------------------------------
# Description: Offset: 0x00000008, Width: 32b; [0x008-0x00b] Reserved for future use
reserved0: '0x00000000'
# --------------------------------------===== readSampleClkSrc [Optional] =====---------------------------------------
# Description: Offset: 0x0000000C, Width: 8b; [0x00c-0x00c] Read Sample Clock Source, valid value: 0/1/3
readSampleClkSrc: '0x00'
# -----------------------------------------===== csHoldTime [Optional] =====------------------------------------------
# Description: Offset: 0x0000000D, Width: 8b; [0x00d-0x00d] CS hold time, default value: 3
csHoldTime: '0x00'
# -----------------------------------------===== csSetupTime [Optional] =====-----------------------------------------
# Description: Offset: 0x0000000E, Width: 8b; [0x00e-0x00e] CS setup time, default value: 3
csSetupTime: '0x00'
# -------------------------------------===== columnAddressWidth [Optional] =====--------------------------------------
# Description: Offset: 0x0000000F, Width: 8b; [0x00f-0x00f] Column Address with, for HyperBus protocol, it is fixed
# to 3, For Serial NAND, need to refer to datasheet
columnAddressWidth: '0x00'
# -------------------------------------===== deviceModeCfgEnable [Optional] =====-------------------------------------
# Description: Offset: 0x00000010, Width: 8b; [0x010-0x010] Device Mode Configure enable flag, 1 - Enable, 0 -
# Disable
deviceModeCfgEnable: '0x00'
# ---------------------------------------===== deviceModeType [Optional] =====----------------------------------------
# Description: Offset: 0x00000011, Width: 8b; [0x011-0x011] Specify the configuration command type:Quad Enable,
# DPI/QPI/OPI switch, Generic configuration, etc.
deviceModeType: '0x00'
# -------------------------------------===== waitTimeCfgCommands [Optional] =====-------------------------------------
# Description: Offset: 0x00000012, Width: 16b; [0x012-0x013] Wait time for all configuration commands, unit: 100us,
# Used for DPI/QPI/OPI switch or reset command
waitTimeCfgCommands: '0x0000'
# ----------------------------------------===== deviceModeSeq [Optional] =====----------------------------------------
# Description: Offset: 0x00000014, Width: 32b; [0x014-0x017] Device mode sequence info, [7:0] - LUT sequence id,
# [15:8] - LUt sequence number, [31:16] Reserved
deviceModeSeq:
# ------------------------------------------===== seqNum [Optional] =====-------------------------------------------
# Description: Offset: 0b, Width: 8b, Sequence Number, valid number: 1-16
seqNum: 0
# -------------------------------------------===== seqId [Optional] =====-------------------------------------------
# Description: Offset: 8b, Width: 8b, Sequence Index, valid number: 0-15
seqId: 0
# -----------------------------------------===== reserved [Optional] =====------------------------------------------
# Description: Offset: 16b, Width: 16b, N/A
reserved: 0
# ----------------------------------------===== deviceModeArg [Optional] =====----------------------------------------
# Description: Offset: 0x00000018, Width: 32b; [0x018-0x01b] Argument/Parameter for device configuration
deviceModeArg: '0x00000000'
# ---------------------------------------===== configCmdEnable [Optional] =====---------------------------------------
# Description: Offset: 0x0000001C, Width: 8b; [0x01c-0x01c] Configure command Enable Flag, 1 - Enable, 0 - Disable
configCmdEnable: '0x00'
# --------------------------------------===== configModeType_0 [Optional] =====---------------------------------------
# Description: Offset: 0x0000001D, Width: 8b; [0x01d-0x01f] Configure Mode Type, similar as deviceModeTpe
configModeType_0: '0x00'
# --------------------------------------===== configModeType_1 [Optional] =====---------------------------------------
# Description: Offset: 0x0000001E, Width: 8b; [0x01d-0x01f] Configure Mode Type, similar as deviceModeTpe
configModeType_1: '0x00'
# --------------------------------------===== configModeType_2 [Optional] =====---------------------------------------
# Description: Offset: 0x0000001F, Width: 8b; [0x01d-0x01f] Configure Mode Type, similar as deviceModeTpe
configModeType_2: '0x00'
# ---------------------------------------===== configCmdSeqs_0 [Optional] =====---------------------------------------
# Description: Offset: 0x00000020, Width: 32b; [0x020-0x02b] Sequence info for Device Configuration command, similar
# as deviceModeSeq
configCmdSeqs_0:
# ------------------------------------------===== seqNum [Optional] =====-------------------------------------------
# Description: Offset: 0b, Width: 8b, Sequence Number, valid number: 1-16
seqNum: 0
# -------------------------------------------===== seqId [Optional] =====-------------------------------------------
# Description: Offset: 8b, Width: 8b, Sequence Index, valid number: 0-15
seqId: 0
# -----------------------------------------===== reserved [Optional] =====------------------------------------------
# Description: Offset: 16b, Width: 16b, N/A
reserved: 0
# ---------------------------------------===== configCmdSeqs_1 [Optional] =====---------------------------------------
# Description: Offset: 0x00000024, Width: 32b; [0x020-0x02b] Sequence info for Device Configuration command, similar
# as deviceModeSeq
configCmdSeqs_1:
# ------------------------------------------===== seqNum [Optional] =====-------------------------------------------
# Description: Offset: 0b, Width: 8b, Sequence Number, valid number: 1-16
seqNum: 0
# -------------------------------------------===== seqId [Optional] =====-------------------------------------------
# Description: Offset: 8b, Width: 8b, Sequence Index, valid number: 0-15
seqId: 0
# -----------------------------------------===== reserved [Optional] =====------------------------------------------
# Description: Offset: 16b, Width: 16b, N/A
reserved: 0
# ---------------------------------------===== configCmdSeqs_2 [Optional] =====---------------------------------------
# Description: Offset: 0x00000028, Width: 32b; [0x020-0x02b] Sequence info for Device Configuration command, similar
# as deviceModeSeq
configCmdSeqs_2:
# ------------------------------------------===== seqNum [Optional] =====-------------------------------------------
# Description: Offset: 0b, Width: 8b, Sequence Number, valid number: 1-16
seqNum: 0
# -------------------------------------------===== seqId [Optional] =====-------------------------------------------
# Description: Offset: 8b, Width: 8b, Sequence Index, valid number: 0-15
seqId: 0
# -----------------------------------------===== reserved [Optional] =====------------------------------------------
# Description: Offset: 16b, Width: 16b, N/A
reserved: 0
# ------------------------------------------===== reserved1 [Optional] =====------------------------------------------
# Description: Offset: 0x0000002C, Width: 32b; [0x02c-0x02f] Reserved for future use
reserved1: '0x00000000'
# ---------------------------------------===== configCmdArgs_0 [Optional] =====---------------------------------------
# Description: Offset: 0x00000030, Width: 32b; [0x030-0x03b] Arguments/Parameters for device Configuration commands
configCmdArgs_0: '0x00000000'
# ---------------------------------------===== configCmdArgs_1 [Optional] =====---------------------------------------
# Description: Offset: 0x00000034, Width: 32b; [0x030-0x03b] Arguments/Parameters for device Configuration commands
configCmdArgs_1: '0x00000000'
# ---------------------------------------===== configCmdArgs_2 [Optional] =====---------------------------------------
# Description: Offset: 0x00000038, Width: 32b; [0x030-0x03b] Arguments/Parameters for device Configuration commands
configCmdArgs_2: '0x00000000'
# ------------------------------------------===== reserved2 [Optional] =====------------------------------------------
# Description: Offset: 0x0000003C, Width: 32b; [0x03c-0x03f] Reserved for future use
reserved2: '0x00000000'
# ------------------------------------===== controllerMiscOption [Optional] =====-------------------------------------
# Description: Offset: 0x00000040, Width: 32b; [0x040-0x043] Controller Misc Options, see Misc feature bit
# definitions for more details
controllerMiscOption: '0x00000000'
# -----------------------------------------===== deviceType [Optional] =====------------------------------------------
# Description: Offset: 0x00000044, Width: 8b; [0x044-0x044] Device Type: See Flash Type Definition for more details
deviceType: '0x00'
# ----------------------------------------===== sflashPadType [Optional] =====----------------------------------------
# Description: Offset: 0x00000045, Width: 8b; [0x045-0x045] Serial Flash Pad Type: 1 - Single, 2 - Dual, 4 - Quad, 8
# - Octal
sflashPadType: '0x00'
# ----------------------------------------===== serialClkFreq [Optional] =====----------------------------------------
# Description: Offset: 0x00000046, Width: 8b; [0x046-0x046] Serial Flash Frequency, device specific definitions, See
# System Boot Chapter for more details
serialClkFreq: '0x00'
# -------------------------------------===== lutCustomSeqEnable [Optional] =====--------------------------------------
# Description: Offset: 0x00000047, Width: 8b; [0x047-0x047] LUT customization Enable, it is required if the
# program/erase cannot be done using 1 LUT sequence, currently, only applicable to HyperFLASH
lutCustomSeqEnable: '0x00'
# -----------------------------------------===== reserved3_0 [Optional] =====-----------------------------------------
# Description: Offset: 0x00000048, Width: 32b; [0x048-0x04f] Reserved for future use
reserved3_0: '0x00000000'
# -----------------------------------------===== reserved3_1 [Optional] =====-----------------------------------------
# Description: Offset: 0x0000004C, Width: 32b; [0x048-0x04f] Reserved for future use
reserved3_1: '0x00000000'
# ----------------------------------------===== sflashA1Size [Optional] =====-----------------------------------------
# Description: Offset: 0x00000050, Width: 32b; [0x050-0x053] Size of Flash connected to A1
sflashA1Size: '0x00000000'
# ----------------------------------------===== sflashA2Size [Optional] =====-----------------------------------------
# Description: Offset: 0x00000054, Width: 32b; [0x054-0x057] Size of Flash connected to A2
sflashA2Size: '0x00000000'
# ----------------------------------------===== sflashB1Size [Optional] =====-----------------------------------------
# Description: Offset: 0x00000058, Width: 32b; [0x058-0x05b] Size of Flash connected to B1
sflashB1Size: '0x00000000'
# ----------------------------------------===== sflashB2Size [Optional] =====-----------------------------------------
# Description: Offset: 0x0000005C, Width: 32b; [0x05c-0x05f] Size of Flash connected to B2
sflashB2Size: '0x00000000'
# ------------------------------------===== csPadSettingOverride [Optional] =====-------------------------------------
# Description: Offset: 0x00000060, Width: 32b; [0x060-0x063] CS pad setting override value
csPadSettingOverride: '0x00000000'
# -----------------------------------===== sclkPadSettingOverride [Optional] =====------------------------------------
# Description: Offset: 0x00000064, Width: 32b; [0x064-0x067] SCK pad setting override value
sclkPadSettingOverride: '0x00000000'
# -----------------------------------===== dataPadSettingOverride [Optional] =====------------------------------------
# Description: Offset: 0x00000068, Width: 32b; [0x068-0x06b] data pad setting override value
dataPadSettingOverride: '0x00000000'
# ------------------------------------===== dqsPadSettingOverride [Optional] =====------------------------------------
# Description: Offset: 0x0000006C, Width: 32b; [0x06c-0x06f] DQS pad setting override value
dqsPadSettingOverride: '0x00000000'
# -----------------------------------------===== timeoutInMs [Optional] =====-----------------------------------------
# Description: Offset: 0x00000070, Width: 32b; [0x070-0x073] Timeout threshold for read status command
timeoutInMs: '0x00000000'
# ---------------------------------------===== commandInterval [Optional] =====---------------------------------------
# Description: Offset: 0x00000074, Width: 32b; [0x074-0x077] CS deselect interval between two commands
commandInterval: '0x00000000'
# ---------------------------------------===== dataValidTime_0 [Optional] =====---------------------------------------
# Description: Offset: 0x00000078, Width: 16b; [0x078-0x07b] CLK edge to data valid time for PORT A and PORT B
dataValidTime_0: '0x0000'
# ---------------------------------------===== dataValidTime_1 [Optional] =====---------------------------------------
# Description: Offset: 0x0000007A, Width: 16b; [0x078-0x07b] CLK edge to data valid time for PORT A and PORT B
dataValidTime_1: '0x0000'
# -----------------------------------------===== busyOffset [Optional] =====------------------------------------------
# Description: Offset: 0x0000007C, Width: 16b; [0x07c-0x07d] Busy offset, valid value: 0-31
busyOffset: '0x0000'
# ---------------------------------------===== busyBitPolarity [Optional] =====---------------------------------------
# Description: Offset: 0x0000007E, Width: 16b; [0x07e-0x07f] Busy flag polarity, 0 - busy flag is 1 when flash device
# is busy, 1 - busy flag is 0 when flash device is busy
busyBitPolarity: '0x0000'
# -----------------------------------===== lookupTable_seq0_instr0 [Optional] =====-----------------------------------
# Description: Offset: 0x00000080, Width: 16b; Lookup table holds Flash command sequences 0, instruction 0
lookupTable_seq0_instr0:
# ------------------------------------------===== OPERAND [Optional] =====------------------------------------------
# Description: Offset: 0b, Width: 8b, Instruction operand. Its values depends on used instruction
OPERAND: 0
# -----------------------------------------===== NUM_PADS [Optional] =====------------------------------------------
# Description: Offset: 8b, Width: 2b, Number of pads used by instruction. Some instructions ignores this parameter.
# - 1PAD, (0): Single mode. One pad is used.
# - 2PAD, (1): Dual mode. Two pads are used.
# - 4PAD, (2): Quad mode. Four pads are used.
# - 8PAD, (3): Octal mode. Eight pads are used.
# Possible options: <1PAD, 2PAD, 4PAD, 8PAD>
NUM_PADS: 1PAD
# --------------------------------------===== OPERATION_CODE [Optional] =====---------------------------------------
# Description: Offset: 10b, Width: 6b, Instruction operation code.
# - STOP, (0): Stop execution and de-assert CS. Then, the next command sequence (to the same flash device) starts
# from instruction pointer 0.
# - CMD_SDR, (1): Transmit command code to Flash.
# - RADDR_SDR, (2): Transmit row address to Flash.
# - CADDR_SDR, (3): Transmit column address to Flash.
# - MODE1_SDR, (4): Transmit mode bits to Flash.
# - MODE2_SDR, (5): Transmit mode bits to Flash.
# - MODE4_SDR, (6): Transmit mode bits to Flash.
# - MODE8_SDR, (7): Transmit mode bits to Flash.
# - WRITE_SDR, (8): Transmit program data to Flash device.
# - READ_SDR, (9): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_SDR, (10): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_SDR, (11): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_SDR, (12): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_SDR, (13): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# - JMP_ON_CS, (31): Stop execution, de-assert CS and save operand[7:0] as the instruction start pointer for next
# sequence.Normally this instruction is used to support Execute-In-Place enhanced mode. See XIP enhanced mode for
# more details.This instruction is only allowed for AHB read commands. There is interrupt status bit set
# (INTR[IPCMDERR] or INTR[AHBCMDERR]) when using this instruction in IP command or AHB write command.
# - CMD_DDR, (33): Transmit command code to Flash.
# - RADDR_DDR, (34): Transmit row address to Flash.
# - CADDR_DDR, (35): Transmit column address to Flash.
# - MODE1_DDR, (36): Transmit mode bits to Flash.
# - MODE2_DDR, (37): Transmit mode bits to Flash.
# - MODE4_DDR, (38): Transmit mode bits to Flash.
# - MODE8_DDR, (39): Transmit mode bits to Flash.
# - WRITE_DDR, (40): Transmit program data to Flash device.
# - READ_DDR, (41): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_DDR, (42): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_DDR, (43): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_DDR, (44): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_DDR, (45): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# Possible options: <STOP, CMD_SDR, RADDR_SDR, CADDR_SDR, MODE1_SDR, MODE2_SDR, MODE4_SDR, MODE8_SDR, WRITE_SDR,
# READ_SDR, LEARN_SDR, DATSZ_SDR, DUMMY_SDR, DUMMY_RWDS_SDR, JMP_ON_CS, CMD_DDR, RADDR_DDR, CADDR_DDR, MODE1_DDR,
# MODE2_DDR, MODE4_DDR, MODE8_DDR, WRITE_DDR, READ_DDR, LEARN_DDR, DATSZ_DDR, DUMMY_DDR, DUMMY_RWDS_DDR>
OPERATION_CODE: STOP
lookupTable_seq0_instr1:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq0_instr2:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq0_instr3:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq0_instr4:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq0_instr5:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq0_instr6:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq0_instr7:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
# -----------------------------------===== lookupTable_seq1_instr0 [Optional] =====-----------------------------------
# Description: Offset: 0x00000090, Width: 16b; Lookup table holds Flash command sequences 1, instruction 0
lookupTable_seq1_instr0:
# ------------------------------------------===== OPERAND [Optional] =====------------------------------------------
# Description: Offset: 0b, Width: 8b, Instruction operand. Its values depends on used instruction
OPERAND: 0
# -----------------------------------------===== NUM_PADS [Optional] =====------------------------------------------
# Description: Offset: 8b, Width: 2b, Number of pads used by instruction. Some instructions ignores this parameter.
# - 1PAD, (0): Single mode. One pad is used.
# - 2PAD, (1): Dual mode. Two pads are used.
# - 4PAD, (2): Quad mode. Four pads are used.
# - 8PAD, (3): Octal mode. Eight pads are used.
# Possible options: <1PAD, 2PAD, 4PAD, 8PAD>
NUM_PADS: 1PAD
# --------------------------------------===== OPERATION_CODE [Optional] =====---------------------------------------
# Description: Offset: 10b, Width: 6b, Instruction operation code.
# - STOP, (0): Stop execution and de-assert CS. Then, the next command sequence (to the same flash device) starts
# from instruction pointer 0.
# - CMD_SDR, (1): Transmit command code to Flash.
# - RADDR_SDR, (2): Transmit row address to Flash.
# - CADDR_SDR, (3): Transmit column address to Flash.
# - MODE1_SDR, (4): Transmit mode bits to Flash.
# - MODE2_SDR, (5): Transmit mode bits to Flash.
# - MODE4_SDR, (6): Transmit mode bits to Flash.
# - MODE8_SDR, (7): Transmit mode bits to Flash.
# - WRITE_SDR, (8): Transmit program data to Flash device.
# - READ_SDR, (9): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_SDR, (10): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_SDR, (11): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_SDR, (12): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_SDR, (13): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# - JMP_ON_CS, (31): Stop execution, de-assert CS and save operand[7:0] as the instruction start pointer for next
# sequence.Normally this instruction is used to support Execute-In-Place enhanced mode. See XIP enhanced mode for
# more details.This instruction is only allowed for AHB read commands. There is interrupt status bit set
# (INTR[IPCMDERR] or INTR[AHBCMDERR]) when using this instruction in IP command or AHB write command.
# - CMD_DDR, (33): Transmit command code to Flash.
# - RADDR_DDR, (34): Transmit row address to Flash.
# - CADDR_DDR, (35): Transmit column address to Flash.
# - MODE1_DDR, (36): Transmit mode bits to Flash.
# - MODE2_DDR, (37): Transmit mode bits to Flash.
# - MODE4_DDR, (38): Transmit mode bits to Flash.
# - MODE8_DDR, (39): Transmit mode bits to Flash.
# - WRITE_DDR, (40): Transmit program data to Flash device.
# - READ_DDR, (41): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_DDR, (42): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_DDR, (43): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_DDR, (44): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_DDR, (45): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# Possible options: <STOP, CMD_SDR, RADDR_SDR, CADDR_SDR, MODE1_SDR, MODE2_SDR, MODE4_SDR, MODE8_SDR, WRITE_SDR,
# READ_SDR, LEARN_SDR, DATSZ_SDR, DUMMY_SDR, DUMMY_RWDS_SDR, JMP_ON_CS, CMD_DDR, RADDR_DDR, CADDR_DDR, MODE1_DDR,
# MODE2_DDR, MODE4_DDR, MODE8_DDR, WRITE_DDR, READ_DDR, LEARN_DDR, DATSZ_DDR, DUMMY_DDR, DUMMY_RWDS_DDR>
OPERATION_CODE: STOP
lookupTable_seq1_instr1:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq1_instr2:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq1_instr3:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq1_instr4:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq1_instr5:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq1_instr6:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq1_instr7:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
# -----------------------------------===== lookupTable_seq2_instr0 [Optional] =====-----------------------------------
# Description: Offset: 0x000000A0, Width: 16b; Lookup table holds Flash command sequences 2, instruction 0
lookupTable_seq2_instr0:
# ------------------------------------------===== OPERAND [Optional] =====------------------------------------------
# Description: Offset: 0b, Width: 8b, Instruction operand. Its values depends on used instruction
OPERAND: 0
# -----------------------------------------===== NUM_PADS [Optional] =====------------------------------------------
# Description: Offset: 8b, Width: 2b, Number of pads used by instruction. Some instructions ignores this parameter.
# - 1PAD, (0): Single mode. One pad is used.
# - 2PAD, (1): Dual mode. Two pads are used.
# - 4PAD, (2): Quad mode. Four pads are used.
# - 8PAD, (3): Octal mode. Eight pads are used.
# Possible options: <1PAD, 2PAD, 4PAD, 8PAD>
NUM_PADS: 1PAD
# --------------------------------------===== OPERATION_CODE [Optional] =====---------------------------------------
# Description: Offset: 10b, Width: 6b, Instruction operation code.
# - STOP, (0): Stop execution and de-assert CS. Then, the next command sequence (to the same flash device) starts
# from instruction pointer 0.
# - CMD_SDR, (1): Transmit command code to Flash.
# - RADDR_SDR, (2): Transmit row address to Flash.
# - CADDR_SDR, (3): Transmit column address to Flash.
# - MODE1_SDR, (4): Transmit mode bits to Flash.
# - MODE2_SDR, (5): Transmit mode bits to Flash.
# - MODE4_SDR, (6): Transmit mode bits to Flash.
# - MODE8_SDR, (7): Transmit mode bits to Flash.
# - WRITE_SDR, (8): Transmit program data to Flash device.
# - READ_SDR, (9): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_SDR, (10): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_SDR, (11): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_SDR, (12): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_SDR, (13): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# - JMP_ON_CS, (31): Stop execution, de-assert CS and save operand[7:0] as the instruction start pointer for next
# sequence.Normally this instruction is used to support Execute-In-Place enhanced mode. See XIP enhanced mode for
# more details.This instruction is only allowed for AHB read commands. There is interrupt status bit set
# (INTR[IPCMDERR] or INTR[AHBCMDERR]) when using this instruction in IP command or AHB write command.
# - CMD_DDR, (33): Transmit command code to Flash.
# - RADDR_DDR, (34): Transmit row address to Flash.
# - CADDR_DDR, (35): Transmit column address to Flash.
# - MODE1_DDR, (36): Transmit mode bits to Flash.
# - MODE2_DDR, (37): Transmit mode bits to Flash.
# - MODE4_DDR, (38): Transmit mode bits to Flash.
# - MODE8_DDR, (39): Transmit mode bits to Flash.
# - WRITE_DDR, (40): Transmit program data to Flash device.
# - READ_DDR, (41): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_DDR, (42): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_DDR, (43): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_DDR, (44): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_DDR, (45): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# Possible options: <STOP, CMD_SDR, RADDR_SDR, CADDR_SDR, MODE1_SDR, MODE2_SDR, MODE4_SDR, MODE8_SDR, WRITE_SDR,
# READ_SDR, LEARN_SDR, DATSZ_SDR, DUMMY_SDR, DUMMY_RWDS_SDR, JMP_ON_CS, CMD_DDR, RADDR_DDR, CADDR_DDR, MODE1_DDR,
# MODE2_DDR, MODE4_DDR, MODE8_DDR, WRITE_DDR, READ_DDR, LEARN_DDR, DATSZ_DDR, DUMMY_DDR, DUMMY_RWDS_DDR>
OPERATION_CODE: STOP
lookupTable_seq2_instr1:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq2_instr2:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq2_instr3:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq2_instr4:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq2_instr5:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq2_instr6:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq2_instr7:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
# -----------------------------------===== lookupTable_seq3_instr0 [Optional] =====-----------------------------------
# Description: Offset: 0x000000B0, Width: 16b; Lookup table holds Flash command sequences 3, instruction 0
lookupTable_seq3_instr0:
# ------------------------------------------===== OPERAND [Optional] =====------------------------------------------
# Description: Offset: 0b, Width: 8b, Instruction operand. Its values depends on used instruction
OPERAND: 0
# -----------------------------------------===== NUM_PADS [Optional] =====------------------------------------------
# Description: Offset: 8b, Width: 2b, Number of pads used by instruction. Some instructions ignores this parameter.
# - 1PAD, (0): Single mode. One pad is used.
# - 2PAD, (1): Dual mode. Two pads are used.
# - 4PAD, (2): Quad mode. Four pads are used.
# - 8PAD, (3): Octal mode. Eight pads are used.
# Possible options: <1PAD, 2PAD, 4PAD, 8PAD>
NUM_PADS: 1PAD
# --------------------------------------===== OPERATION_CODE [Optional] =====---------------------------------------
# Description: Offset: 10b, Width: 6b, Instruction operation code.
# - STOP, (0): Stop execution and de-assert CS. Then, the next command sequence (to the same flash device) starts
# from instruction pointer 0.
# - CMD_SDR, (1): Transmit command code to Flash.
# - RADDR_SDR, (2): Transmit row address to Flash.
# - CADDR_SDR, (3): Transmit column address to Flash.
# - MODE1_SDR, (4): Transmit mode bits to Flash.
# - MODE2_SDR, (5): Transmit mode bits to Flash.
# - MODE4_SDR, (6): Transmit mode bits to Flash.
# - MODE8_SDR, (7): Transmit mode bits to Flash.
# - WRITE_SDR, (8): Transmit program data to Flash device.
# - READ_SDR, (9): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_SDR, (10): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_SDR, (11): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_SDR, (12): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_SDR, (13): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# - JMP_ON_CS, (31): Stop execution, de-assert CS and save operand[7:0] as the instruction start pointer for next
# sequence.Normally this instruction is used to support Execute-In-Place enhanced mode. See XIP enhanced mode for
# more details.This instruction is only allowed for AHB read commands. There is interrupt status bit set
# (INTR[IPCMDERR] or INTR[AHBCMDERR]) when using this instruction in IP command or AHB write command.
# - CMD_DDR, (33): Transmit command code to Flash.
# - RADDR_DDR, (34): Transmit row address to Flash.
# - CADDR_DDR, (35): Transmit column address to Flash.
# - MODE1_DDR, (36): Transmit mode bits to Flash.
# - MODE2_DDR, (37): Transmit mode bits to Flash.
# - MODE4_DDR, (38): Transmit mode bits to Flash.
# - MODE8_DDR, (39): Transmit mode bits to Flash.
# - WRITE_DDR, (40): Transmit program data to Flash device.
# - READ_DDR, (41): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_DDR, (42): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_DDR, (43): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_DDR, (44): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_DDR, (45): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# Possible options: <STOP, CMD_SDR, RADDR_SDR, CADDR_SDR, MODE1_SDR, MODE2_SDR, MODE4_SDR, MODE8_SDR, WRITE_SDR,
# READ_SDR, LEARN_SDR, DATSZ_SDR, DUMMY_SDR, DUMMY_RWDS_SDR, JMP_ON_CS, CMD_DDR, RADDR_DDR, CADDR_DDR, MODE1_DDR,
# MODE2_DDR, MODE4_DDR, MODE8_DDR, WRITE_DDR, READ_DDR, LEARN_DDR, DATSZ_DDR, DUMMY_DDR, DUMMY_RWDS_DDR>
OPERATION_CODE: STOP
lookupTable_seq3_instr1:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq3_instr2:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq3_instr3:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq3_instr4:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq3_instr5:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq3_instr6:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq3_instr7:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
# -----------------------------------===== lookupTable_seq4_instr0 [Optional] =====-----------------------------------
# Description: Offset: 0x000000C0, Width: 16b; Lookup table holds Flash command sequences 4, instruction 0
lookupTable_seq4_instr0:
# ------------------------------------------===== OPERAND [Optional] =====------------------------------------------
# Description: Offset: 0b, Width: 8b, Instruction operand. Its values depends on used instruction
OPERAND: 0
# -----------------------------------------===== NUM_PADS [Optional] =====------------------------------------------
# Description: Offset: 8b, Width: 2b, Number of pads used by instruction. Some instructions ignores this parameter.
# - 1PAD, (0): Single mode. One pad is used.
# - 2PAD, (1): Dual mode. Two pads are used.
# - 4PAD, (2): Quad mode. Four pads are used.
# - 8PAD, (3): Octal mode. Eight pads are used.
# Possible options: <1PAD, 2PAD, 4PAD, 8PAD>
NUM_PADS: 1PAD
# --------------------------------------===== OPERATION_CODE [Optional] =====---------------------------------------
# Description: Offset: 10b, Width: 6b, Instruction operation code.
# - STOP, (0): Stop execution and de-assert CS. Then, the next command sequence (to the same flash device) starts
# from instruction pointer 0.
# - CMD_SDR, (1): Transmit command code to Flash.
# - RADDR_SDR, (2): Transmit row address to Flash.
# - CADDR_SDR, (3): Transmit column address to Flash.
# - MODE1_SDR, (4): Transmit mode bits to Flash.
# - MODE2_SDR, (5): Transmit mode bits to Flash.
# - MODE4_SDR, (6): Transmit mode bits to Flash.
# - MODE8_SDR, (7): Transmit mode bits to Flash.
# - WRITE_SDR, (8): Transmit program data to Flash device.
# - READ_SDR, (9): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_SDR, (10): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_SDR, (11): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_SDR, (12): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_SDR, (13): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# - JMP_ON_CS, (31): Stop execution, de-assert CS and save operand[7:0] as the instruction start pointer for next
# sequence.Normally this instruction is used to support Execute-In-Place enhanced mode. See XIP enhanced mode for
# more details.This instruction is only allowed for AHB read commands. There is interrupt status bit set
# (INTR[IPCMDERR] or INTR[AHBCMDERR]) when using this instruction in IP command or AHB write command.
# - CMD_DDR, (33): Transmit command code to Flash.
# - RADDR_DDR, (34): Transmit row address to Flash.
# - CADDR_DDR, (35): Transmit column address to Flash.
# - MODE1_DDR, (36): Transmit mode bits to Flash.
# - MODE2_DDR, (37): Transmit mode bits to Flash.
# - MODE4_DDR, (38): Transmit mode bits to Flash.
# - MODE8_DDR, (39): Transmit mode bits to Flash.
# - WRITE_DDR, (40): Transmit program data to Flash device.
# - READ_DDR, (41): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_DDR, (42): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_DDR, (43): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_DDR, (44): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_DDR, (45): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# Possible options: <STOP, CMD_SDR, RADDR_SDR, CADDR_SDR, MODE1_SDR, MODE2_SDR, MODE4_SDR, MODE8_SDR, WRITE_SDR,
# READ_SDR, LEARN_SDR, DATSZ_SDR, DUMMY_SDR, DUMMY_RWDS_SDR, JMP_ON_CS, CMD_DDR, RADDR_DDR, CADDR_DDR, MODE1_DDR,
# MODE2_DDR, MODE4_DDR, MODE8_DDR, WRITE_DDR, READ_DDR, LEARN_DDR, DATSZ_DDR, DUMMY_DDR, DUMMY_RWDS_DDR>
OPERATION_CODE: STOP
lookupTable_seq4_instr1:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq4_instr2:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq4_instr3:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq4_instr4:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq4_instr5:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq4_instr6:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq4_instr7:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
# -----------------------------------===== lookupTable_seq5_instr0 [Optional] =====-----------------------------------
# Description: Offset: 0x000000D0, Width: 16b; Lookup table holds Flash command sequences 5, instruction 0
lookupTable_seq5_instr0:
# ------------------------------------------===== OPERAND [Optional] =====------------------------------------------
# Description: Offset: 0b, Width: 8b, Instruction operand. Its values depends on used instruction
OPERAND: 0
# -----------------------------------------===== NUM_PADS [Optional] =====------------------------------------------
# Description: Offset: 8b, Width: 2b, Number of pads used by instruction. Some instructions ignores this parameter.
# - 1PAD, (0): Single mode. One pad is used.
# - 2PAD, (1): Dual mode. Two pads are used.
# - 4PAD, (2): Quad mode. Four pads are used.
# - 8PAD, (3): Octal mode. Eight pads are used.
# Possible options: <1PAD, 2PAD, 4PAD, 8PAD>
NUM_PADS: 1PAD
# --------------------------------------===== OPERATION_CODE [Optional] =====---------------------------------------
# Description: Offset: 10b, Width: 6b, Instruction operation code.
# - STOP, (0): Stop execution and de-assert CS. Then, the next command sequence (to the same flash device) starts
# from instruction pointer 0.
# - CMD_SDR, (1): Transmit command code to Flash.
# - RADDR_SDR, (2): Transmit row address to Flash.
# - CADDR_SDR, (3): Transmit column address to Flash.
# - MODE1_SDR, (4): Transmit mode bits to Flash.
# - MODE2_SDR, (5): Transmit mode bits to Flash.
# - MODE4_SDR, (6): Transmit mode bits to Flash.
# - MODE8_SDR, (7): Transmit mode bits to Flash.
# - WRITE_SDR, (8): Transmit program data to Flash device.
# - READ_SDR, (9): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_SDR, (10): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_SDR, (11): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_SDR, (12): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_SDR, (13): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# - JMP_ON_CS, (31): Stop execution, de-assert CS and save operand[7:0] as the instruction start pointer for next
# sequence.Normally this instruction is used to support Execute-In-Place enhanced mode. See XIP enhanced mode for
# more details.This instruction is only allowed for AHB read commands. There is interrupt status bit set
# (INTR[IPCMDERR] or INTR[AHBCMDERR]) when using this instruction in IP command or AHB write command.
# - CMD_DDR, (33): Transmit command code to Flash.
# - RADDR_DDR, (34): Transmit row address to Flash.
# - CADDR_DDR, (35): Transmit column address to Flash.
# - MODE1_DDR, (36): Transmit mode bits to Flash.
# - MODE2_DDR, (37): Transmit mode bits to Flash.
# - MODE4_DDR, (38): Transmit mode bits to Flash.
# - MODE8_DDR, (39): Transmit mode bits to Flash.
# - WRITE_DDR, (40): Transmit program data to Flash device.
# - READ_DDR, (41): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_DDR, (42): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_DDR, (43): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_DDR, (44): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_DDR, (45): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# Possible options: <STOP, CMD_SDR, RADDR_SDR, CADDR_SDR, MODE1_SDR, MODE2_SDR, MODE4_SDR, MODE8_SDR, WRITE_SDR,
# READ_SDR, LEARN_SDR, DATSZ_SDR, DUMMY_SDR, DUMMY_RWDS_SDR, JMP_ON_CS, CMD_DDR, RADDR_DDR, CADDR_DDR, MODE1_DDR,
# MODE2_DDR, MODE4_DDR, MODE8_DDR, WRITE_DDR, READ_DDR, LEARN_DDR, DATSZ_DDR, DUMMY_DDR, DUMMY_RWDS_DDR>
OPERATION_CODE: STOP
lookupTable_seq5_instr1:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq5_instr2:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq5_instr3:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq5_instr4:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq5_instr5:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq5_instr6:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq5_instr7:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
# -----------------------------------===== lookupTable_seq6_instr0 [Optional] =====-----------------------------------
# Description: Offset: 0x000000E0, Width: 16b; Lookup table holds Flash command sequences 6, instruction 0
lookupTable_seq6_instr0:
# ------------------------------------------===== OPERAND [Optional] =====------------------------------------------
# Description: Offset: 0b, Width: 8b, Instruction operand. Its values depends on used instruction
OPERAND: 0
# -----------------------------------------===== NUM_PADS [Optional] =====------------------------------------------
# Description: Offset: 8b, Width: 2b, Number of pads used by instruction. Some instructions ignores this parameter.
# - 1PAD, (0): Single mode. One pad is used.
# - 2PAD, (1): Dual mode. Two pads are used.
# - 4PAD, (2): Quad mode. Four pads are used.
# - 8PAD, (3): Octal mode. Eight pads are used.
# Possible options: <1PAD, 2PAD, 4PAD, 8PAD>
NUM_PADS: 1PAD
# --------------------------------------===== OPERATION_CODE [Optional] =====---------------------------------------
# Description: Offset: 10b, Width: 6b, Instruction operation code.
# - STOP, (0): Stop execution and de-assert CS. Then, the next command sequence (to the same flash device) starts
# from instruction pointer 0.
# - CMD_SDR, (1): Transmit command code to Flash.
# - RADDR_SDR, (2): Transmit row address to Flash.
# - CADDR_SDR, (3): Transmit column address to Flash.
# - MODE1_SDR, (4): Transmit mode bits to Flash.
# - MODE2_SDR, (5): Transmit mode bits to Flash.
# - MODE4_SDR, (6): Transmit mode bits to Flash.
# - MODE8_SDR, (7): Transmit mode bits to Flash.
# - WRITE_SDR, (8): Transmit program data to Flash device.
# - READ_SDR, (9): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_SDR, (10): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_SDR, (11): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_SDR, (12): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_SDR, (13): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# - JMP_ON_CS, (31): Stop execution, de-assert CS and save operand[7:0] as the instruction start pointer for next
# sequence.Normally this instruction is used to support Execute-In-Place enhanced mode. See XIP enhanced mode for
# more details.This instruction is only allowed for AHB read commands. There is interrupt status bit set
# (INTR[IPCMDERR] or INTR[AHBCMDERR]) when using this instruction in IP command or AHB write command.
# - CMD_DDR, (33): Transmit command code to Flash.
# - RADDR_DDR, (34): Transmit row address to Flash.
# - CADDR_DDR, (35): Transmit column address to Flash.
# - MODE1_DDR, (36): Transmit mode bits to Flash.
# - MODE2_DDR, (37): Transmit mode bits to Flash.
# - MODE4_DDR, (38): Transmit mode bits to Flash.
# - MODE8_DDR, (39): Transmit mode bits to Flash.
# - WRITE_DDR, (40): Transmit program data to Flash device.
# - READ_DDR, (41): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_DDR, (42): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_DDR, (43): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_DDR, (44): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_DDR, (45): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# Possible options: <STOP, CMD_SDR, RADDR_SDR, CADDR_SDR, MODE1_SDR, MODE2_SDR, MODE4_SDR, MODE8_SDR, WRITE_SDR,
# READ_SDR, LEARN_SDR, DATSZ_SDR, DUMMY_SDR, DUMMY_RWDS_SDR, JMP_ON_CS, CMD_DDR, RADDR_DDR, CADDR_DDR, MODE1_DDR,
# MODE2_DDR, MODE4_DDR, MODE8_DDR, WRITE_DDR, READ_DDR, LEARN_DDR, DATSZ_DDR, DUMMY_DDR, DUMMY_RWDS_DDR>
OPERATION_CODE: STOP
lookupTable_seq6_instr1:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq6_instr2:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq6_instr3:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq6_instr4:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq6_instr5:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq6_instr6:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq6_instr7:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
# -----------------------------------===== lookupTable_seq7_instr0 [Optional] =====-----------------------------------
# Description: Offset: 0x000000F0, Width: 16b; Lookup table holds Flash command sequences 7, instruction 0
lookupTable_seq7_instr0:
# ------------------------------------------===== OPERAND [Optional] =====------------------------------------------
# Description: Offset: 0b, Width: 8b, Instruction operand. Its values depends on used instruction
OPERAND: 0
# -----------------------------------------===== NUM_PADS [Optional] =====------------------------------------------
# Description: Offset: 8b, Width: 2b, Number of pads used by instruction. Some instructions ignores this parameter.
# - 1PAD, (0): Single mode. One pad is used.
# - 2PAD, (1): Dual mode. Two pads are used.
# - 4PAD, (2): Quad mode. Four pads are used.
# - 8PAD, (3): Octal mode. Eight pads are used.
# Possible options: <1PAD, 2PAD, 4PAD, 8PAD>
NUM_PADS: 1PAD
# --------------------------------------===== OPERATION_CODE [Optional] =====---------------------------------------
# Description: Offset: 10b, Width: 6b, Instruction operation code.
# - STOP, (0): Stop execution and de-assert CS. Then, the next command sequence (to the same flash device) starts
# from instruction pointer 0.
# - CMD_SDR, (1): Transmit command code to Flash.
# - RADDR_SDR, (2): Transmit row address to Flash.
# - CADDR_SDR, (3): Transmit column address to Flash.
# - MODE1_SDR, (4): Transmit mode bits to Flash.
# - MODE2_SDR, (5): Transmit mode bits to Flash.
# - MODE4_SDR, (6): Transmit mode bits to Flash.
# - MODE8_SDR, (7): Transmit mode bits to Flash.
# - WRITE_SDR, (8): Transmit program data to Flash device.
# - READ_SDR, (9): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_SDR, (10): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_SDR, (11): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_SDR, (12): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_SDR, (13): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# - JMP_ON_CS, (31): Stop execution, de-assert CS and save operand[7:0] as the instruction start pointer for next
# sequence.Normally this instruction is used to support Execute-In-Place enhanced mode. See XIP enhanced mode for
# more details.This instruction is only allowed for AHB read commands. There is interrupt status bit set
# (INTR[IPCMDERR] or INTR[AHBCMDERR]) when using this instruction in IP command or AHB write command.
# - CMD_DDR, (33): Transmit command code to Flash.
# - RADDR_DDR, (34): Transmit row address to Flash.
# - CADDR_DDR, (35): Transmit column address to Flash.
# - MODE1_DDR, (36): Transmit mode bits to Flash.
# - MODE2_DDR, (37): Transmit mode bits to Flash.
# - MODE4_DDR, (38): Transmit mode bits to Flash.
# - MODE8_DDR, (39): Transmit mode bits to Flash.
# - WRITE_DDR, (40): Transmit program data to Flash device.
# - READ_DDR, (41): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_DDR, (42): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_DDR, (43): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_DDR, (44): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_DDR, (45): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# Possible options: <STOP, CMD_SDR, RADDR_SDR, CADDR_SDR, MODE1_SDR, MODE2_SDR, MODE4_SDR, MODE8_SDR, WRITE_SDR,
# READ_SDR, LEARN_SDR, DATSZ_SDR, DUMMY_SDR, DUMMY_RWDS_SDR, JMP_ON_CS, CMD_DDR, RADDR_DDR, CADDR_DDR, MODE1_DDR,
# MODE2_DDR, MODE4_DDR, MODE8_DDR, WRITE_DDR, READ_DDR, LEARN_DDR, DATSZ_DDR, DUMMY_DDR, DUMMY_RWDS_DDR>
OPERATION_CODE: STOP
lookupTable_seq7_instr1:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq7_instr2:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq7_instr3:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq7_instr4:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq7_instr5:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq7_instr6:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq7_instr7:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
# -----------------------------------===== lookupTable_seq8_instr0 [Optional] =====-----------------------------------
# Description: Offset: 0x00000100, Width: 16b; Lookup table holds Flash command sequences 8, instruction 0
lookupTable_seq8_instr0:
# ------------------------------------------===== OPERAND [Optional] =====------------------------------------------
# Description: Offset: 0b, Width: 8b, Instruction operand. Its values depends on used instruction
OPERAND: 0
# -----------------------------------------===== NUM_PADS [Optional] =====------------------------------------------
# Description: Offset: 8b, Width: 2b, Number of pads used by instruction. Some instructions ignores this parameter.
# - 1PAD, (0): Single mode. One pad is used.
# - 2PAD, (1): Dual mode. Two pads are used.
# - 4PAD, (2): Quad mode. Four pads are used.
# - 8PAD, (3): Octal mode. Eight pads are used.
# Possible options: <1PAD, 2PAD, 4PAD, 8PAD>
NUM_PADS: 1PAD
# --------------------------------------===== OPERATION_CODE [Optional] =====---------------------------------------
# Description: Offset: 10b, Width: 6b, Instruction operation code.
# - STOP, (0): Stop execution and de-assert CS. Then, the next command sequence (to the same flash device) starts
# from instruction pointer 0.
# - CMD_SDR, (1): Transmit command code to Flash.
# - RADDR_SDR, (2): Transmit row address to Flash.
# - CADDR_SDR, (3): Transmit column address to Flash.
# - MODE1_SDR, (4): Transmit mode bits to Flash.
# - MODE2_SDR, (5): Transmit mode bits to Flash.
# - MODE4_SDR, (6): Transmit mode bits to Flash.
# - MODE8_SDR, (7): Transmit mode bits to Flash.
# - WRITE_SDR, (8): Transmit program data to Flash device.
# - READ_SDR, (9): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_SDR, (10): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_SDR, (11): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_SDR, (12): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_SDR, (13): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# - JMP_ON_CS, (31): Stop execution, de-assert CS and save operand[7:0] as the instruction start pointer for next
# sequence.Normally this instruction is used to support Execute-In-Place enhanced mode. See XIP enhanced mode for
# more details.This instruction is only allowed for AHB read commands. There is interrupt status bit set
# (INTR[IPCMDERR] or INTR[AHBCMDERR]) when using this instruction in IP command or AHB write command.
# - CMD_DDR, (33): Transmit command code to Flash.
# - RADDR_DDR, (34): Transmit row address to Flash.
# - CADDR_DDR, (35): Transmit column address to Flash.
# - MODE1_DDR, (36): Transmit mode bits to Flash.
# - MODE2_DDR, (37): Transmit mode bits to Flash.
# - MODE4_DDR, (38): Transmit mode bits to Flash.
# - MODE8_DDR, (39): Transmit mode bits to Flash.
# - WRITE_DDR, (40): Transmit program data to Flash device.
# - READ_DDR, (41): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_DDR, (42): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_DDR, (43): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_DDR, (44): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_DDR, (45): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# Possible options: <STOP, CMD_SDR, RADDR_SDR, CADDR_SDR, MODE1_SDR, MODE2_SDR, MODE4_SDR, MODE8_SDR, WRITE_SDR,
# READ_SDR, LEARN_SDR, DATSZ_SDR, DUMMY_SDR, DUMMY_RWDS_SDR, JMP_ON_CS, CMD_DDR, RADDR_DDR, CADDR_DDR, MODE1_DDR,
# MODE2_DDR, MODE4_DDR, MODE8_DDR, WRITE_DDR, READ_DDR, LEARN_DDR, DATSZ_DDR, DUMMY_DDR, DUMMY_RWDS_DDR>
OPERATION_CODE: STOP
lookupTable_seq8_instr1:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq8_instr2:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq8_instr3:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq8_instr4:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq8_instr5:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq8_instr6:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq8_instr7:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
# -----------------------------------===== lookupTable_seq9_instr0 [Optional] =====-----------------------------------
# Description: Offset: 0x00000110, Width: 16b; Lookup table holds Flash command sequences 9, instruction 0
lookupTable_seq9_instr0:
# ------------------------------------------===== OPERAND [Optional] =====------------------------------------------
# Description: Offset: 0b, Width: 8b, Instruction operand. Its values depends on used instruction
OPERAND: 0
# -----------------------------------------===== NUM_PADS [Optional] =====------------------------------------------
# Description: Offset: 8b, Width: 2b, Number of pads used by instruction. Some instructions ignores this parameter.
# - 1PAD, (0): Single mode. One pad is used.
# - 2PAD, (1): Dual mode. Two pads are used.
# - 4PAD, (2): Quad mode. Four pads are used.
# - 8PAD, (3): Octal mode. Eight pads are used.
# Possible options: <1PAD, 2PAD, 4PAD, 8PAD>
NUM_PADS: 1PAD
# --------------------------------------===== OPERATION_CODE [Optional] =====---------------------------------------
# Description: Offset: 10b, Width: 6b, Instruction operation code.
# - STOP, (0): Stop execution and de-assert CS. Then, the next command sequence (to the same flash device) starts
# from instruction pointer 0.
# - CMD_SDR, (1): Transmit command code to Flash.
# - RADDR_SDR, (2): Transmit row address to Flash.
# - CADDR_SDR, (3): Transmit column address to Flash.
# - MODE1_SDR, (4): Transmit mode bits to Flash.
# - MODE2_SDR, (5): Transmit mode bits to Flash.
# - MODE4_SDR, (6): Transmit mode bits to Flash.
# - MODE8_SDR, (7): Transmit mode bits to Flash.
# - WRITE_SDR, (8): Transmit program data to Flash device.
# - READ_SDR, (9): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_SDR, (10): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_SDR, (11): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_SDR, (12): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_SDR, (13): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# - JMP_ON_CS, (31): Stop execution, de-assert CS and save operand[7:0] as the instruction start pointer for next
# sequence.Normally this instruction is used to support Execute-In-Place enhanced mode. See XIP enhanced mode for
# more details.This instruction is only allowed for AHB read commands. There is interrupt status bit set
# (INTR[IPCMDERR] or INTR[AHBCMDERR]) when using this instruction in IP command or AHB write command.
# - CMD_DDR, (33): Transmit command code to Flash.
# - RADDR_DDR, (34): Transmit row address to Flash.
# - CADDR_DDR, (35): Transmit column address to Flash.
# - MODE1_DDR, (36): Transmit mode bits to Flash.
# - MODE2_DDR, (37): Transmit mode bits to Flash.
# - MODE4_DDR, (38): Transmit mode bits to Flash.
# - MODE8_DDR, (39): Transmit mode bits to Flash.
# - WRITE_DDR, (40): Transmit program data to Flash device.
# - READ_DDR, (41): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_DDR, (42): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_DDR, (43): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_DDR, (44): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_DDR, (45): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# Possible options: <STOP, CMD_SDR, RADDR_SDR, CADDR_SDR, MODE1_SDR, MODE2_SDR, MODE4_SDR, MODE8_SDR, WRITE_SDR,
# READ_SDR, LEARN_SDR, DATSZ_SDR, DUMMY_SDR, DUMMY_RWDS_SDR, JMP_ON_CS, CMD_DDR, RADDR_DDR, CADDR_DDR, MODE1_DDR,
# MODE2_DDR, MODE4_DDR, MODE8_DDR, WRITE_DDR, READ_DDR, LEARN_DDR, DATSZ_DDR, DUMMY_DDR, DUMMY_RWDS_DDR>
OPERATION_CODE: STOP
lookupTable_seq9_instr1:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq9_instr2:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq9_instr3:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq9_instr4:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq9_instr5:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq9_instr6:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq9_instr7:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
# ----------------------------------===== lookupTable_seq10_instr0 [Optional] =====-----------------------------------
# Description: Offset: 0x00000120, Width: 16b; Lookup table holds Flash command sequences 10, instruction 0
lookupTable_seq10_instr0:
# ------------------------------------------===== OPERAND [Optional] =====------------------------------------------
# Description: Offset: 0b, Width: 8b, Instruction operand. Its values depends on used instruction
OPERAND: 0
# -----------------------------------------===== NUM_PADS [Optional] =====------------------------------------------
# Description: Offset: 8b, Width: 2b, Number of pads used by instruction. Some instructions ignores this parameter.
# - 1PAD, (0): Single mode. One pad is used.
# - 2PAD, (1): Dual mode. Two pads are used.
# - 4PAD, (2): Quad mode. Four pads are used.
# - 8PAD, (3): Octal mode. Eight pads are used.
# Possible options: <1PAD, 2PAD, 4PAD, 8PAD>
NUM_PADS: 1PAD
# --------------------------------------===== OPERATION_CODE [Optional] =====---------------------------------------
# Description: Offset: 10b, Width: 6b, Instruction operation code.
# - STOP, (0): Stop execution and de-assert CS. Then, the next command sequence (to the same flash device) starts
# from instruction pointer 0.
# - CMD_SDR, (1): Transmit command code to Flash.
# - RADDR_SDR, (2): Transmit row address to Flash.
# - CADDR_SDR, (3): Transmit column address to Flash.
# - MODE1_SDR, (4): Transmit mode bits to Flash.
# - MODE2_SDR, (5): Transmit mode bits to Flash.
# - MODE4_SDR, (6): Transmit mode bits to Flash.
# - MODE8_SDR, (7): Transmit mode bits to Flash.
# - WRITE_SDR, (8): Transmit program data to Flash device.
# - READ_SDR, (9): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_SDR, (10): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_SDR, (11): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_SDR, (12): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_SDR, (13): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# - JMP_ON_CS, (31): Stop execution, de-assert CS and save operand[7:0] as the instruction start pointer for next
# sequence.Normally this instruction is used to support Execute-In-Place enhanced mode. See XIP enhanced mode for
# more details.This instruction is only allowed for AHB read commands. There is interrupt status bit set
# (INTR[IPCMDERR] or INTR[AHBCMDERR]) when using this instruction in IP command or AHB write command.
# - CMD_DDR, (33): Transmit command code to Flash.
# - RADDR_DDR, (34): Transmit row address to Flash.
# - CADDR_DDR, (35): Transmit column address to Flash.
# - MODE1_DDR, (36): Transmit mode bits to Flash.
# - MODE2_DDR, (37): Transmit mode bits to Flash.
# - MODE4_DDR, (38): Transmit mode bits to Flash.
# - MODE8_DDR, (39): Transmit mode bits to Flash.
# - WRITE_DDR, (40): Transmit program data to Flash device.
# - READ_DDR, (41): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_DDR, (42): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_DDR, (43): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_DDR, (44): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_DDR, (45): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# Possible options: <STOP, CMD_SDR, RADDR_SDR, CADDR_SDR, MODE1_SDR, MODE2_SDR, MODE4_SDR, MODE8_SDR, WRITE_SDR,
# READ_SDR, LEARN_SDR, DATSZ_SDR, DUMMY_SDR, DUMMY_RWDS_SDR, JMP_ON_CS, CMD_DDR, RADDR_DDR, CADDR_DDR, MODE1_DDR,
# MODE2_DDR, MODE4_DDR, MODE8_DDR, WRITE_DDR, READ_DDR, LEARN_DDR, DATSZ_DDR, DUMMY_DDR, DUMMY_RWDS_DDR>
OPERATION_CODE: STOP
lookupTable_seq10_instr1:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq10_instr2:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq10_instr3:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq10_instr4:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq10_instr5:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq10_instr6:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq10_instr7:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
# ----------------------------------===== lookupTable_seq11_instr0 [Optional] =====-----------------------------------
# Description: Offset: 0x00000130, Width: 16b; Lookup table holds Flash command sequences 11, instruction 0
lookupTable_seq11_instr0:
# ------------------------------------------===== OPERAND [Optional] =====------------------------------------------
# Description: Offset: 0b, Width: 8b, Instruction operand. Its values depends on used instruction
OPERAND: 0
# -----------------------------------------===== NUM_PADS [Optional] =====------------------------------------------
# Description: Offset: 8b, Width: 2b, Number of pads used by instruction. Some instructions ignores this parameter.
# - 1PAD, (0): Single mode. One pad is used.
# - 2PAD, (1): Dual mode. Two pads are used.
# - 4PAD, (2): Quad mode. Four pads are used.
# - 8PAD, (3): Octal mode. Eight pads are used.
# Possible options: <1PAD, 2PAD, 4PAD, 8PAD>
NUM_PADS: 1PAD
# --------------------------------------===== OPERATION_CODE [Optional] =====---------------------------------------
# Description: Offset: 10b, Width: 6b, Instruction operation code.
# - STOP, (0): Stop execution and de-assert CS. Then, the next command sequence (to the same flash device) starts
# from instruction pointer 0.
# - CMD_SDR, (1): Transmit command code to Flash.
# - RADDR_SDR, (2): Transmit row address to Flash.
# - CADDR_SDR, (3): Transmit column address to Flash.
# - MODE1_SDR, (4): Transmit mode bits to Flash.
# - MODE2_SDR, (5): Transmit mode bits to Flash.
# - MODE4_SDR, (6): Transmit mode bits to Flash.
# - MODE8_SDR, (7): Transmit mode bits to Flash.
# - WRITE_SDR, (8): Transmit program data to Flash device.
# - READ_SDR, (9): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_SDR, (10): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_SDR, (11): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_SDR, (12): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_SDR, (13): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# - JMP_ON_CS, (31): Stop execution, de-assert CS and save operand[7:0] as the instruction start pointer for next
# sequence.Normally this instruction is used to support Execute-In-Place enhanced mode. See XIP enhanced mode for
# more details.This instruction is only allowed for AHB read commands. There is interrupt status bit set
# (INTR[IPCMDERR] or INTR[AHBCMDERR]) when using this instruction in IP command or AHB write command.
# - CMD_DDR, (33): Transmit command code to Flash.
# - RADDR_DDR, (34): Transmit row address to Flash.
# - CADDR_DDR, (35): Transmit column address to Flash.
# - MODE1_DDR, (36): Transmit mode bits to Flash.
# - MODE2_DDR, (37): Transmit mode bits to Flash.
# - MODE4_DDR, (38): Transmit mode bits to Flash.
# - MODE8_DDR, (39): Transmit mode bits to Flash.
# - WRITE_DDR, (40): Transmit program data to Flash device.
# - READ_DDR, (41): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_DDR, (42): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_DDR, (43): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_DDR, (44): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_DDR, (45): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# Possible options: <STOP, CMD_SDR, RADDR_SDR, CADDR_SDR, MODE1_SDR, MODE2_SDR, MODE4_SDR, MODE8_SDR, WRITE_SDR,
# READ_SDR, LEARN_SDR, DATSZ_SDR, DUMMY_SDR, DUMMY_RWDS_SDR, JMP_ON_CS, CMD_DDR, RADDR_DDR, CADDR_DDR, MODE1_DDR,
# MODE2_DDR, MODE4_DDR, MODE8_DDR, WRITE_DDR, READ_DDR, LEARN_DDR, DATSZ_DDR, DUMMY_DDR, DUMMY_RWDS_DDR>
OPERATION_CODE: STOP
lookupTable_seq11_instr1:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq11_instr2:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq11_instr3:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq11_instr4:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq11_instr5:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq11_instr6:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq11_instr7:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
# ----------------------------------===== lookupTable_seq12_instr0 [Optional] =====-----------------------------------
# Description: Offset: 0x00000140, Width: 16b; Lookup table holds Flash command sequences 12, instruction 0
lookupTable_seq12_instr0:
# ------------------------------------------===== OPERAND [Optional] =====------------------------------------------
# Description: Offset: 0b, Width: 8b, Instruction operand. Its values depends on used instruction
OPERAND: 0
# -----------------------------------------===== NUM_PADS [Optional] =====------------------------------------------
# Description: Offset: 8b, Width: 2b, Number of pads used by instruction. Some instructions ignores this parameter.
# - 1PAD, (0): Single mode. One pad is used.
# - 2PAD, (1): Dual mode. Two pads are used.
# - 4PAD, (2): Quad mode. Four pads are used.
# - 8PAD, (3): Octal mode. Eight pads are used.
# Possible options: <1PAD, 2PAD, 4PAD, 8PAD>
NUM_PADS: 1PAD
# --------------------------------------===== OPERATION_CODE [Optional] =====---------------------------------------
# Description: Offset: 10b, Width: 6b, Instruction operation code.
# - STOP, (0): Stop execution and de-assert CS. Then, the next command sequence (to the same flash device) starts
# from instruction pointer 0.
# - CMD_SDR, (1): Transmit command code to Flash.
# - RADDR_SDR, (2): Transmit row address to Flash.
# - CADDR_SDR, (3): Transmit column address to Flash.
# - MODE1_SDR, (4): Transmit mode bits to Flash.
# - MODE2_SDR, (5): Transmit mode bits to Flash.
# - MODE4_SDR, (6): Transmit mode bits to Flash.
# - MODE8_SDR, (7): Transmit mode bits to Flash.
# - WRITE_SDR, (8): Transmit program data to Flash device.
# - READ_SDR, (9): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_SDR, (10): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_SDR, (11): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_SDR, (12): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_SDR, (13): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# - JMP_ON_CS, (31): Stop execution, de-assert CS and save operand[7:0] as the instruction start pointer for next
# sequence.Normally this instruction is used to support Execute-In-Place enhanced mode. See XIP enhanced mode for
# more details.This instruction is only allowed for AHB read commands. There is interrupt status bit set
# (INTR[IPCMDERR] or INTR[AHBCMDERR]) when using this instruction in IP command or AHB write command.
# - CMD_DDR, (33): Transmit command code to Flash.
# - RADDR_DDR, (34): Transmit row address to Flash.
# - CADDR_DDR, (35): Transmit column address to Flash.
# - MODE1_DDR, (36): Transmit mode bits to Flash.
# - MODE2_DDR, (37): Transmit mode bits to Flash.
# - MODE4_DDR, (38): Transmit mode bits to Flash.
# - MODE8_DDR, (39): Transmit mode bits to Flash.
# - WRITE_DDR, (40): Transmit program data to Flash device.
# - READ_DDR, (41): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_DDR, (42): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_DDR, (43): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_DDR, (44): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_DDR, (45): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# Possible options: <STOP, CMD_SDR, RADDR_SDR, CADDR_SDR, MODE1_SDR, MODE2_SDR, MODE4_SDR, MODE8_SDR, WRITE_SDR,
# READ_SDR, LEARN_SDR, DATSZ_SDR, DUMMY_SDR, DUMMY_RWDS_SDR, JMP_ON_CS, CMD_DDR, RADDR_DDR, CADDR_DDR, MODE1_DDR,
# MODE2_DDR, MODE4_DDR, MODE8_DDR, WRITE_DDR, READ_DDR, LEARN_DDR, DATSZ_DDR, DUMMY_DDR, DUMMY_RWDS_DDR>
OPERATION_CODE: STOP
lookupTable_seq12_instr1:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq12_instr2:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq12_instr3:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq12_instr4:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq12_instr5:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq12_instr6:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq12_instr7:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
# ----------------------------------===== lookupTable_seq13_instr0 [Optional] =====-----------------------------------
# Description: Offset: 0x00000150, Width: 16b; Lookup table holds Flash command sequences 13, instruction 0
lookupTable_seq13_instr0:
# ------------------------------------------===== OPERAND [Optional] =====------------------------------------------
# Description: Offset: 0b, Width: 8b, Instruction operand. Its values depends on used instruction
OPERAND: 0
# -----------------------------------------===== NUM_PADS [Optional] =====------------------------------------------
# Description: Offset: 8b, Width: 2b, Number of pads used by instruction. Some instructions ignores this parameter.
# - 1PAD, (0): Single mode. One pad is used.
# - 2PAD, (1): Dual mode. Two pads are used.
# - 4PAD, (2): Quad mode. Four pads are used.
# - 8PAD, (3): Octal mode. Eight pads are used.
# Possible options: <1PAD, 2PAD, 4PAD, 8PAD>
NUM_PADS: 1PAD
# --------------------------------------===== OPERATION_CODE [Optional] =====---------------------------------------
# Description: Offset: 10b, Width: 6b, Instruction operation code.
# - STOP, (0): Stop execution and de-assert CS. Then, the next command sequence (to the same flash device) starts
# from instruction pointer 0.
# - CMD_SDR, (1): Transmit command code to Flash.
# - RADDR_SDR, (2): Transmit row address to Flash.
# - CADDR_SDR, (3): Transmit column address to Flash.
# - MODE1_SDR, (4): Transmit mode bits to Flash.
# - MODE2_SDR, (5): Transmit mode bits to Flash.
# - MODE4_SDR, (6): Transmit mode bits to Flash.
# - MODE8_SDR, (7): Transmit mode bits to Flash.
# - WRITE_SDR, (8): Transmit program data to Flash device.
# - READ_SDR, (9): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_SDR, (10): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_SDR, (11): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_SDR, (12): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_SDR, (13): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# - JMP_ON_CS, (31): Stop execution, de-assert CS and save operand[7:0] as the instruction start pointer for next
# sequence.Normally this instruction is used to support Execute-In-Place enhanced mode. See XIP enhanced mode for
# more details.This instruction is only allowed for AHB read commands. There is interrupt status bit set
# (INTR[IPCMDERR] or INTR[AHBCMDERR]) when using this instruction in IP command or AHB write command.
# - CMD_DDR, (33): Transmit command code to Flash.
# - RADDR_DDR, (34): Transmit row address to Flash.
# - CADDR_DDR, (35): Transmit column address to Flash.
# - MODE1_DDR, (36): Transmit mode bits to Flash.
# - MODE2_DDR, (37): Transmit mode bits to Flash.
# - MODE4_DDR, (38): Transmit mode bits to Flash.
# - MODE8_DDR, (39): Transmit mode bits to Flash.
# - WRITE_DDR, (40): Transmit program data to Flash device.
# - READ_DDR, (41): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_DDR, (42): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_DDR, (43): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_DDR, (44): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_DDR, (45): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# Possible options: <STOP, CMD_SDR, RADDR_SDR, CADDR_SDR, MODE1_SDR, MODE2_SDR, MODE4_SDR, MODE8_SDR, WRITE_SDR,
# READ_SDR, LEARN_SDR, DATSZ_SDR, DUMMY_SDR, DUMMY_RWDS_SDR, JMP_ON_CS, CMD_DDR, RADDR_DDR, CADDR_DDR, MODE1_DDR,
# MODE2_DDR, MODE4_DDR, MODE8_DDR, WRITE_DDR, READ_DDR, LEARN_DDR, DATSZ_DDR, DUMMY_DDR, DUMMY_RWDS_DDR>
OPERATION_CODE: STOP
lookupTable_seq13_instr1:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq13_instr2:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq13_instr3:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq13_instr4:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq13_instr5:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq13_instr6:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq13_instr7:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
# ----------------------------------===== lookupTable_seq14_instr0 [Optional] =====-----------------------------------
# Description: Offset: 0x00000160, Width: 16b; Lookup table holds Flash command sequences 14, instruction 0
lookupTable_seq14_instr0:
# ------------------------------------------===== OPERAND [Optional] =====------------------------------------------
# Description: Offset: 0b, Width: 8b, Instruction operand. Its values depends on used instruction
OPERAND: 0
# -----------------------------------------===== NUM_PADS [Optional] =====------------------------------------------
# Description: Offset: 8b, Width: 2b, Number of pads used by instruction. Some instructions ignores this parameter.
# - 1PAD, (0): Single mode. One pad is used.
# - 2PAD, (1): Dual mode. Two pads are used.
# - 4PAD, (2): Quad mode. Four pads are used.
# - 8PAD, (3): Octal mode. Eight pads are used.
# Possible options: <1PAD, 2PAD, 4PAD, 8PAD>
NUM_PADS: 1PAD
# --------------------------------------===== OPERATION_CODE [Optional] =====---------------------------------------
# Description: Offset: 10b, Width: 6b, Instruction operation code.
# - STOP, (0): Stop execution and de-assert CS. Then, the next command sequence (to the same flash device) starts
# from instruction pointer 0.
# - CMD_SDR, (1): Transmit command code to Flash.
# - RADDR_SDR, (2): Transmit row address to Flash.
# - CADDR_SDR, (3): Transmit column address to Flash.
# - MODE1_SDR, (4): Transmit mode bits to Flash.
# - MODE2_SDR, (5): Transmit mode bits to Flash.
# - MODE4_SDR, (6): Transmit mode bits to Flash.
# - MODE8_SDR, (7): Transmit mode bits to Flash.
# - WRITE_SDR, (8): Transmit program data to Flash device.
# - READ_SDR, (9): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_SDR, (10): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_SDR, (11): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_SDR, (12): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_SDR, (13): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# - JMP_ON_CS, (31): Stop execution, de-assert CS and save operand[7:0] as the instruction start pointer for next
# sequence.Normally this instruction is used to support Execute-In-Place enhanced mode. See XIP enhanced mode for
# more details.This instruction is only allowed for AHB read commands. There is interrupt status bit set
# (INTR[IPCMDERR] or INTR[AHBCMDERR]) when using this instruction in IP command or AHB write command.
# - CMD_DDR, (33): Transmit command code to Flash.
# - RADDR_DDR, (34): Transmit row address to Flash.
# - CADDR_DDR, (35): Transmit column address to Flash.
# - MODE1_DDR, (36): Transmit mode bits to Flash.
# - MODE2_DDR, (37): Transmit mode bits to Flash.
# - MODE4_DDR, (38): Transmit mode bits to Flash.
# - MODE8_DDR, (39): Transmit mode bits to Flash.
# - WRITE_DDR, (40): Transmit program data to Flash device.
# - READ_DDR, (41): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_DDR, (42): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_DDR, (43): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_DDR, (44): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_DDR, (45): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# Possible options: <STOP, CMD_SDR, RADDR_SDR, CADDR_SDR, MODE1_SDR, MODE2_SDR, MODE4_SDR, MODE8_SDR, WRITE_SDR,
# READ_SDR, LEARN_SDR, DATSZ_SDR, DUMMY_SDR, DUMMY_RWDS_SDR, JMP_ON_CS, CMD_DDR, RADDR_DDR, CADDR_DDR, MODE1_DDR,
# MODE2_DDR, MODE4_DDR, MODE8_DDR, WRITE_DDR, READ_DDR, LEARN_DDR, DATSZ_DDR, DUMMY_DDR, DUMMY_RWDS_DDR>
OPERATION_CODE: STOP
lookupTable_seq14_instr1:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq14_instr2:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq14_instr3:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq14_instr4:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq14_instr5:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq14_instr6:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq14_instr7:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
# ----------------------------------===== lookupTable_seq15_instr0 [Optional] =====-----------------------------------
# Description: Offset: 0x00000170, Width: 16b; Lookup table holds Flash command sequences 15, instruction 0
lookupTable_seq15_instr0:
# ------------------------------------------===== OPERAND [Optional] =====------------------------------------------
# Description: Offset: 0b, Width: 8b, Instruction operand. Its values depends on used instruction
OPERAND: 0
# -----------------------------------------===== NUM_PADS [Optional] =====------------------------------------------
# Description: Offset: 8b, Width: 2b, Number of pads used by instruction. Some instructions ignores this parameter.
# - 1PAD, (0): Single mode. One pad is used.
# - 2PAD, (1): Dual mode. Two pads are used.
# - 4PAD, (2): Quad mode. Four pads are used.
# - 8PAD, (3): Octal mode. Eight pads are used.
# Possible options: <1PAD, 2PAD, 4PAD, 8PAD>
NUM_PADS: 1PAD
# --------------------------------------===== OPERATION_CODE [Optional] =====---------------------------------------
# Description: Offset: 10b, Width: 6b, Instruction operation code.
# - STOP, (0): Stop execution and de-assert CS. Then, the next command sequence (to the same flash device) starts
# from instruction pointer 0.
# - CMD_SDR, (1): Transmit command code to Flash.
# - RADDR_SDR, (2): Transmit row address to Flash.
# - CADDR_SDR, (3): Transmit column address to Flash.
# - MODE1_SDR, (4): Transmit mode bits to Flash.
# - MODE2_SDR, (5): Transmit mode bits to Flash.
# - MODE4_SDR, (6): Transmit mode bits to Flash.
# - MODE8_SDR, (7): Transmit mode bits to Flash.
# - WRITE_SDR, (8): Transmit program data to Flash device.
# - READ_SDR, (9): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_SDR, (10): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_SDR, (11): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_SDR, (12): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_SDR, (13): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# - JMP_ON_CS, (31): Stop execution, de-assert CS and save operand[7:0] as the instruction start pointer for next
# sequence.Normally this instruction is used to support Execute-In-Place enhanced mode. See XIP enhanced mode for
# more details.This instruction is only allowed for AHB read commands. There is interrupt status bit set
# (INTR[IPCMDERR] or INTR[AHBCMDERR]) when using this instruction in IP command or AHB write command.
# - CMD_DDR, (33): Transmit command code to Flash.
# - RADDR_DDR, (34): Transmit row address to Flash.
# - CADDR_DDR, (35): Transmit column address to Flash.
# - MODE1_DDR, (36): Transmit mode bits to Flash.
# - MODE2_DDR, (37): Transmit mode bits to Flash.
# - MODE4_DDR, (38): Transmit mode bits to Flash.
# - MODE8_DDR, (39): Transmit mode bits to Flash.
# - WRITE_DDR, (40): Transmit program data to Flash device.
# - READ_DDR, (41): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_DDR, (42): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_DDR, (43): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_DDR, (44): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_DDR, (45): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# Possible options: <STOP, CMD_SDR, RADDR_SDR, CADDR_SDR, MODE1_SDR, MODE2_SDR, MODE4_SDR, MODE8_SDR, WRITE_SDR,
# READ_SDR, LEARN_SDR, DATSZ_SDR, DUMMY_SDR, DUMMY_RWDS_SDR, JMP_ON_CS, CMD_DDR, RADDR_DDR, CADDR_DDR, MODE1_DDR,
# MODE2_DDR, MODE4_DDR, MODE8_DDR, WRITE_DDR, READ_DDR, LEARN_DDR, DATSZ_DDR, DUMMY_DDR, DUMMY_RWDS_DDR>
OPERATION_CODE: STOP
lookupTable_seq15_instr1:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq15_instr2:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq15_instr3:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq15_instr4:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq15_instr5:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq15_instr6:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq15_instr7:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
# ---------------------------------------===== lutCustomSeq_0 [Optional] =====----------------------------------------
# Description: Offset: 0x00000180, Width: 32b; [0x180-0x1af] Customizable LUT Sequences
lutCustomSeq_0:
# ------------------------------------------===== seqNum [Optional] =====-------------------------------------------
# Description: Offset: 0b, Width: 8b, Sequence Number, valid number: 1-16
seqNum: 0
# -------------------------------------------===== seqId [Optional] =====-------------------------------------------
# Description: Offset: 8b, Width: 8b, Sequence Index, valid number: 0-15
seqId: 0
# -----------------------------------------===== reserved [Optional] =====------------------------------------------
# Description: Offset: 16b, Width: 16b, N/A
reserved: 0
# ---------------------------------------===== lutCustomSeq_1 [Optional] =====----------------------------------------
# Description: Offset: 0x00000184, Width: 32b; [0x180-0x1af] Customizable LUT Sequences
lutCustomSeq_1:
# ------------------------------------------===== seqNum [Optional] =====-------------------------------------------
# Description: Offset: 0b, Width: 8b, Sequence Number, valid number: 1-16
seqNum: 0
# -------------------------------------------===== seqId [Optional] =====-------------------------------------------
# Description: Offset: 8b, Width: 8b, Sequence Index, valid number: 0-15
seqId: 0
# -----------------------------------------===== reserved [Optional] =====------------------------------------------
# Description: Offset: 16b, Width: 16b, N/A
reserved: 0
# ---------------------------------------===== lutCustomSeq_2 [Optional] =====----------------------------------------
# Description: Offset: 0x00000188, Width: 32b; [0x180-0x1af] Customizable LUT Sequences
lutCustomSeq_2:
# ------------------------------------------===== seqNum [Optional] =====-------------------------------------------
# Description: Offset: 0b, Width: 8b, Sequence Number, valid number: 1-16
seqNum: 0
# -------------------------------------------===== seqId [Optional] =====-------------------------------------------
# Description: Offset: 8b, Width: 8b, Sequence Index, valid number: 0-15
seqId: 0
# -----------------------------------------===== reserved [Optional] =====------------------------------------------
# Description: Offset: 16b, Width: 16b, N/A
reserved: 0
# ---------------------------------------===== lutCustomSeq_3 [Optional] =====----------------------------------------
# Description: Offset: 0x0000018C, Width: 32b; [0x180-0x1af] Customizable LUT Sequences
lutCustomSeq_3:
# ------------------------------------------===== seqNum [Optional] =====-------------------------------------------
# Description: Offset: 0b, Width: 8b, Sequence Number, valid number: 1-16
seqNum: 0
# -------------------------------------------===== seqId [Optional] =====-------------------------------------------
# Description: Offset: 8b, Width: 8b, Sequence Index, valid number: 0-15
seqId: 0
# -----------------------------------------===== reserved [Optional] =====------------------------------------------
# Description: Offset: 16b, Width: 16b, N/A
reserved: 0
# ---------------------------------------===== lutCustomSeq_4 [Optional] =====----------------------------------------
# Description: Offset: 0x00000190, Width: 32b; [0x180-0x1af] Customizable LUT Sequences
lutCustomSeq_4:
# ------------------------------------------===== seqNum [Optional] =====-------------------------------------------
# Description: Offset: 0b, Width: 8b, Sequence Number, valid number: 1-16
seqNum: 0
# -------------------------------------------===== seqId [Optional] =====-------------------------------------------
# Description: Offset: 8b, Width: 8b, Sequence Index, valid number: 0-15
seqId: 0
# -----------------------------------------===== reserved [Optional] =====------------------------------------------
# Description: Offset: 16b, Width: 16b, N/A
reserved: 0
# ---------------------------------------===== lutCustomSeq_5 [Optional] =====----------------------------------------
# Description: Offset: 0x00000194, Width: 32b; [0x180-0x1af] Customizable LUT Sequences
lutCustomSeq_5:
# ------------------------------------------===== seqNum [Optional] =====-------------------------------------------
# Description: Offset: 0b, Width: 8b, Sequence Number, valid number: 1-16
seqNum: 0
# -------------------------------------------===== seqId [Optional] =====-------------------------------------------
# Description: Offset: 8b, Width: 8b, Sequence Index, valid number: 0-15
seqId: 0
# -----------------------------------------===== reserved [Optional] =====------------------------------------------
# Description: Offset: 16b, Width: 16b, N/A
reserved: 0
# ---------------------------------------===== lutCustomSeq_6 [Optional] =====----------------------------------------
# Description: Offset: 0x00000198, Width: 32b; [0x180-0x1af] Customizable LUT Sequences
lutCustomSeq_6:
# ------------------------------------------===== seqNum [Optional] =====-------------------------------------------
# Description: Offset: 0b, Width: 8b, Sequence Number, valid number: 1-16
seqNum: 0
# -------------------------------------------===== seqId [Optional] =====-------------------------------------------
# Description: Offset: 8b, Width: 8b, Sequence Index, valid number: 0-15
seqId: 0
# -----------------------------------------===== reserved [Optional] =====------------------------------------------
# Description: Offset: 16b, Width: 16b, N/A
reserved: 0
# ---------------------------------------===== lutCustomSeq_7 [Optional] =====----------------------------------------
# Description: Offset: 0x0000019C, Width: 32b; [0x180-0x1af] Customizable LUT Sequences
lutCustomSeq_7:
# ------------------------------------------===== seqNum [Optional] =====-------------------------------------------
# Description: Offset: 0b, Width: 8b, Sequence Number, valid number: 1-16
seqNum: 0
# -------------------------------------------===== seqId [Optional] =====-------------------------------------------
# Description: Offset: 8b, Width: 8b, Sequence Index, valid number: 0-15
seqId: 0
# -----------------------------------------===== reserved [Optional] =====------------------------------------------
# Description: Offset: 16b, Width: 16b, N/A
reserved: 0
# ---------------------------------------===== lutCustomSeq_8 [Optional] =====----------------------------------------
# Description: Offset: 0x000001A0, Width: 32b; [0x180-0x1af] Customizable LUT Sequences
lutCustomSeq_8:
# ------------------------------------------===== seqNum [Optional] =====-------------------------------------------
# Description: Offset: 0b, Width: 8b, Sequence Number, valid number: 1-16
seqNum: 0
# -------------------------------------------===== seqId [Optional] =====-------------------------------------------
# Description: Offset: 8b, Width: 8b, Sequence Index, valid number: 0-15
seqId: 0
# -----------------------------------------===== reserved [Optional] =====------------------------------------------
# Description: Offset: 16b, Width: 16b, N/A
reserved: 0
# ---------------------------------------===== lutCustomSeq_9 [Optional] =====----------------------------------------
# Description: Offset: 0x000001A4, Width: 32b; [0x180-0x1af] Customizable LUT Sequences
lutCustomSeq_9:
# ------------------------------------------===== seqNum [Optional] =====-------------------------------------------
# Description: Offset: 0b, Width: 8b, Sequence Number, valid number: 1-16
seqNum: 0
# -------------------------------------------===== seqId [Optional] =====-------------------------------------------
# Description: Offset: 8b, Width: 8b, Sequence Index, valid number: 0-15
seqId: 0
# -----------------------------------------===== reserved [Optional] =====------------------------------------------
# Description: Offset: 16b, Width: 16b, N/A
reserved: 0
# ---------------------------------------===== lutCustomSeq_10 [Optional] =====---------------------------------------
# Description: Offset: 0x000001A8, Width: 32b; [0x180-0x1af] Customizable LUT Sequences
lutCustomSeq_10:
# ------------------------------------------===== seqNum [Optional] =====-------------------------------------------
# Description: Offset: 0b, Width: 8b, Sequence Number, valid number: 1-16
seqNum: 0
# -------------------------------------------===== seqId [Optional] =====-------------------------------------------
# Description: Offset: 8b, Width: 8b, Sequence Index, valid number: 0-15
seqId: 0
# -----------------------------------------===== reserved [Optional] =====------------------------------------------
# Description: Offset: 16b, Width: 16b, N/A
reserved: 0
# ---------------------------------------===== lutCustomSeq_11 [Optional] =====---------------------------------------
# Description: Offset: 0x000001AC, Width: 32b; [0x180-0x1af] Customizable LUT Sequences
lutCustomSeq_11:
# ------------------------------------------===== seqNum [Optional] =====-------------------------------------------
# Description: Offset: 0b, Width: 8b, Sequence Number, valid number: 1-16
seqNum: 0
# -------------------------------------------===== seqId [Optional] =====-------------------------------------------
# Description: Offset: 8b, Width: 8b, Sequence Index, valid number: 0-15
seqId: 0
# -----------------------------------------===== reserved [Optional] =====------------------------------------------
# Description: Offset: 16b, Width: 16b, N/A
reserved: 0
# -----------------------------------------===== reserved4_0 [Optional] =====-----------------------------------------
# Description: Offset: 0x000001B0, Width: 32b; [0x1b0-0x1bf] Reserved for future use
reserved4_0: '0x00000000'
# -----------------------------------------===== reserved4_1 [Optional] =====-----------------------------------------
# Description: Offset: 0x000001B4, Width: 32b; [0x1b0-0x1bf] Reserved for future use
reserved4_1: '0x00000000'
# -----------------------------------------===== reserved4_2 [Optional] =====-----------------------------------------
# Description: Offset: 0x000001B8, Width: 32b; [0x1b0-0x1bf] Reserved for future use
reserved4_2: '0x00000000'
# -----------------------------------------===== reserved4_3 [Optional] =====-----------------------------------------
# Description: Offset: 0x000001BC, Width: 32b; [0x1b0-0x1bf] Reserved for future use
reserved4_3: '0x00000000'
# ------------------------------------------===== pageSize [Optional] =====-------------------------------------------
# Description: Offset: 0x000001C0, Width: 32b; Page size of Serial NOR
pageSize: '0x00000000'
# -----------------------------------------===== sectorSize [Optional] =====------------------------------------------
# Description: Offset: 0x000001C4, Width: 32b; Sector size of Serial NOR
sectorSize: '0x00000000'
# -------------------------------------===== ipcmdSerialClkFreq [Optional] =====--------------------------------------
# Description: Offset: 0x000001C8, Width: 8b; Clock frequency for IP command
ipcmdSerialClkFreq: '0x00'
# -------------------------------------===== isUniformBlockSize [Optional] =====--------------------------------------
# Description: Offset: 0x000001C9, Width: 8b; Sector/Block size is the same
isUniformBlockSize: '0x00'
# -------------------------------------===== isDataOrderSwapped [Optional] =====--------------------------------------
# Description: Offset: 0x000001CA, Width: 8b; Data order (D0, D1, D2, D3) is swapped (D1,D0, D3, D2)
isDataOrderSwapped: '0x00'
# -----------------------------------------===== reserved0_0 [Optional] =====-----------------------------------------
# Description: Offset: 0x000001CB, Width: 8b; Reserved for future use
reserved0_0: '0x00'
# ----------------------------------------===== serialNorType [Optional] =====----------------------------------------
# Description: Offset: 0x000001CC, Width: 8b; Serial NOR Flash type: 0/1/2/3
serialNorType: '0x00'
# --------------------------------------===== needExitNoCmdMode [Optional] =====--------------------------------------
# Description: Offset: 0x000001CD, Width: 8b; Need to exit NoCmd mode before other IP command
needExitNoCmdMode: '0x00'
# ------------------------------------===== halfClkForNonReadCmd [Optional] =====-------------------------------------
# Description: Offset: 0x000001CE, Width: 8b; Half the Serial Clock for non-read command: true/false
halfClkForNonReadCmd: '0x00'
# ------------------------------------===== needRestoreNoCmdMode [Optional] =====-------------------------------------
# Description: Offset: 0x000001CF, Width: 8b; Need to Restore NoCmd mode after IP command execution
needRestoreNoCmdMode: '0x00'
# ------------------------------------------===== blockSize [Optional] =====------------------------------------------
# Description: Offset: 0x000001D0, Width: 32b; Block size
blockSize: '0x00000000'
# ----------------------------------------===== flashStateCtx [Optional] =====----------------------------------------
# Description: Offset: 0x000001D4, Width: 32b; Flash State Context
flashStateCtx: '0x00000000'
# -----------------------------------------===== reserve2_0 [Optional] =====------------------------------------------
# Description: Offset: 0x000001D8, Width: 32b; Reserved for future use
reserve2_0: '0x00000000'
# -----------------------------------------===== reserve2_1 [Optional] =====------------------------------------------
# Description: Offset: 0x000001DC, Width: 32b; Reserved for future use
reserve2_1: '0x00000000'
# -----------------------------------------===== reserve2_2 [Optional] =====------------------------------------------
# Description: Offset: 0x000001E0, Width: 32b; Reserved for future use
reserve2_2: '0x00000000'
# -----------------------------------------===== reserve2_3 [Optional] =====------------------------------------------
# Description: Offset: 0x000001E4, Width: 32b; Reserved for future use
reserve2_3: '0x00000000'
# -----------------------------------------===== reserve2_4 [Optional] =====------------------------------------------
# Description: Offset: 0x000001E8, Width: 32b; Reserved for future use
reserve2_4: '0x00000000'
# -----------------------------------------===== reserve2_5 [Optional] =====------------------------------------------
# Description: Offset: 0x000001EC, Width: 32b; Reserved for future use
reserve2_5: '0x00000000'
# -----------------------------------------===== reserve2_6 [Optional] =====------------------------------------------
# Description: Offset: 0x000001F0, Width: 32b; Reserved for future use
reserve2_6: '0x00000000'
# -----------------------------------------===== reserve2_7 [Optional] =====------------------------------------------
# Description: Offset: 0x000001F4, Width: 32b; Reserved for future use
reserve2_7: '0x00000000'
# -----------------------------------------===== reserve2_8 [Optional] =====------------------------------------------
# Description: Offset: 0x000001F8, Width: 32b; Reserved for future use
reserve2_8: '0x00000000'
# -----------------------------------------===== reserve2_9 [Optional] =====------------------------------------------
# Description: Offset: 0x000001FC, Width: 32b; Reserved for future use
reserve2_9: '0x00000000'
FCB for lpc5536, Revision: 1a and flexspi_nor#
FCB for lpc5536, Revision: 1a and flexspi_nor JSON schema
FCB for lpc5536, Revision: 1a and flexspi_nor YAML configuration template
# ================================== FCB for lpc5536, Revision: 1a and flexspi_nor ===================================
# ======================================================================================================================
# == FCB for lpc5536, Revision: 1a and flexspi_nor ==
# ======================================================================================================================
# -------------------------------------===== The chip family name [Required] =====--------------------------------------
# Description: NXP chip family identifier.
family: CHOOSE_FROM_TABLE
# -----------------------------------------===== MCU revision [Optional] =====------------------------------------------
# Description: Revision of silicon. The 'latest' name, means most current revision.
# Possible options: <0a, 1a, latest>
revision: 1a
# ------------------------------------------===== Memory type [Required] =====------------------------------------------
# Description: Specify type of memory used by FCB description.
# Possible options: <flexspi_nor>
type: flexspi_nor
# --------------------------------------------===== lpc5536 [Required] =====--------------------------------------------
fcb_settings:
# ---------------------------------------------===== tag [Optional] =====---------------------------------------------
# Description: Offset: 0x00000000, Width: 32b; [0x000-0x003] Tag, fixed value 0x42464346UL
tag: '0x42464346'
# -------------------------------------------===== version [Optional] =====-------------------------------------------
# Description: Offset: 0x00000004, Width: 32b; [0x004-0x007] Version,[31:24] -'V', [23:16] - Major, [15:8] - Minor,
# [7:0] - bugfix
version: '0x56020000'
# ------------------------------------------===== reserved0 [Optional] =====------------------------------------------
# Description: Offset: 0x00000008, Width: 32b; [0x008-0x00b] Reserved for future use
reserved0: '0x00000000'
# --------------------------------------===== readSampleClkSrc [Optional] =====---------------------------------------
# Description: Offset: 0x0000000C, Width: 8b; [0x00c-0x00c] Read Sample Clock Source, valid value: 0/1/3
readSampleClkSrc: '0x00'
# -----------------------------------------===== csHoldTime [Optional] =====------------------------------------------
# Description: Offset: 0x0000000D, Width: 8b; [0x00d-0x00d] CS hold time, default value: 3
csHoldTime: '0x00'
# -----------------------------------------===== csSetupTime [Optional] =====-----------------------------------------
# Description: Offset: 0x0000000E, Width: 8b; [0x00e-0x00e] CS setup time, default value: 3
csSetupTime: '0x00'
# -------------------------------------===== columnAddressWidth [Optional] =====--------------------------------------
# Description: Offset: 0x0000000F, Width: 8b; [0x00f-0x00f] Column Address with, for HyperBus protocol, it is fixed
# to 3, For Serial NAND, need to refer to datasheet
columnAddressWidth: '0x00'
# -------------------------------------===== deviceModeCfgEnable [Optional] =====-------------------------------------
# Description: Offset: 0x00000010, Width: 8b; [0x010-0x010] Device Mode Configure enable flag, 1 - Enable, 0 -
# Disable
deviceModeCfgEnable: '0x00'
# ---------------------------------------===== deviceModeType [Optional] =====----------------------------------------
# Description: Offset: 0x00000011, Width: 8b; [0x011-0x011] Specify the configuration command type:Quad Enable,
# DPI/QPI/OPI switch, Generic configuration, etc.
deviceModeType: '0x00'
# -------------------------------------===== waitTimeCfgCommands [Optional] =====-------------------------------------
# Description: Offset: 0x00000012, Width: 16b; [0x012-0x013] Wait time for all configuration commands, unit: 100us,
# Used for DPI/QPI/OPI switch or reset command
waitTimeCfgCommands: '0x0000'
# ----------------------------------------===== deviceModeSeq [Optional] =====----------------------------------------
# Description: Offset: 0x00000014, Width: 32b; [0x014-0x017] Device mode sequence info, [7:0] - LUT sequence id,
# [15:8] - LUt sequence number, [31:16] Reserved
deviceModeSeq:
# ------------------------------------------===== seqNum [Optional] =====-------------------------------------------
# Description: Offset: 0b, Width: 8b, Sequence Number, valid number: 1-16
seqNum: 0
# -------------------------------------------===== seqId [Optional] =====-------------------------------------------
# Description: Offset: 8b, Width: 8b, Sequence Index, valid number: 0-15
seqId: 0
# -----------------------------------------===== reserved [Optional] =====------------------------------------------
# Description: Offset: 16b, Width: 16b, N/A
reserved: 0
# ----------------------------------------===== deviceModeArg [Optional] =====----------------------------------------
# Description: Offset: 0x00000018, Width: 32b; [0x018-0x01b] Argument/Parameter for device configuration
deviceModeArg: '0x00000000'
# ---------------------------------------===== configCmdEnable [Optional] =====---------------------------------------
# Description: Offset: 0x0000001C, Width: 8b; [0x01c-0x01c] Configure command Enable Flag, 1 - Enable, 0 - Disable
configCmdEnable: '0x00'
# --------------------------------------===== configModeType_0 [Optional] =====---------------------------------------
# Description: Offset: 0x0000001D, Width: 8b; [0x01d-0x01f] Configure Mode Type, similar as deviceModeTpe
configModeType_0: '0x00'
# --------------------------------------===== configModeType_1 [Optional] =====---------------------------------------
# Description: Offset: 0x0000001E, Width: 8b; [0x01d-0x01f] Configure Mode Type, similar as deviceModeTpe
configModeType_1: '0x00'
# --------------------------------------===== configModeType_2 [Optional] =====---------------------------------------
# Description: Offset: 0x0000001F, Width: 8b; [0x01d-0x01f] Configure Mode Type, similar as deviceModeTpe
configModeType_2: '0x00'
# ---------------------------------------===== configCmdSeqs_0 [Optional] =====---------------------------------------
# Description: Offset: 0x00000020, Width: 32b; [0x020-0x02b] Sequence info for Device Configuration command, similar
# as deviceModeSeq
configCmdSeqs_0:
# ------------------------------------------===== seqNum [Optional] =====-------------------------------------------
# Description: Offset: 0b, Width: 8b, Sequence Number, valid number: 1-16
seqNum: 0
# -------------------------------------------===== seqId [Optional] =====-------------------------------------------
# Description: Offset: 8b, Width: 8b, Sequence Index, valid number: 0-15
seqId: 0
# -----------------------------------------===== reserved [Optional] =====------------------------------------------
# Description: Offset: 16b, Width: 16b, N/A
reserved: 0
# ---------------------------------------===== configCmdSeqs_1 [Optional] =====---------------------------------------
# Description: Offset: 0x00000024, Width: 32b; [0x020-0x02b] Sequence info for Device Configuration command, similar
# as deviceModeSeq
configCmdSeqs_1:
# ------------------------------------------===== seqNum [Optional] =====-------------------------------------------
# Description: Offset: 0b, Width: 8b, Sequence Number, valid number: 1-16
seqNum: 0
# -------------------------------------------===== seqId [Optional] =====-------------------------------------------
# Description: Offset: 8b, Width: 8b, Sequence Index, valid number: 0-15
seqId: 0
# -----------------------------------------===== reserved [Optional] =====------------------------------------------
# Description: Offset: 16b, Width: 16b, N/A
reserved: 0
# ---------------------------------------===== configCmdSeqs_2 [Optional] =====---------------------------------------
# Description: Offset: 0x00000028, Width: 32b; [0x020-0x02b] Sequence info for Device Configuration command, similar
# as deviceModeSeq
configCmdSeqs_2:
# ------------------------------------------===== seqNum [Optional] =====-------------------------------------------
# Description: Offset: 0b, Width: 8b, Sequence Number, valid number: 1-16
seqNum: 0
# -------------------------------------------===== seqId [Optional] =====-------------------------------------------
# Description: Offset: 8b, Width: 8b, Sequence Index, valid number: 0-15
seqId: 0
# -----------------------------------------===== reserved [Optional] =====------------------------------------------
# Description: Offset: 16b, Width: 16b, N/A
reserved: 0
# ------------------------------------------===== reserved1 [Optional] =====------------------------------------------
# Description: Offset: 0x0000002C, Width: 32b; [0x02c-0x02f] Reserved for future use
reserved1: '0x00000000'
# ---------------------------------------===== configCmdArgs_0 [Optional] =====---------------------------------------
# Description: Offset: 0x00000030, Width: 32b; [0x030-0x03b] Arguments/Parameters for device Configuration commands
configCmdArgs_0: '0x00000000'
# ---------------------------------------===== configCmdArgs_1 [Optional] =====---------------------------------------
# Description: Offset: 0x00000034, Width: 32b; [0x030-0x03b] Arguments/Parameters for device Configuration commands
configCmdArgs_1: '0x00000000'
# ---------------------------------------===== configCmdArgs_2 [Optional] =====---------------------------------------
# Description: Offset: 0x00000038, Width: 32b; [0x030-0x03b] Arguments/Parameters for device Configuration commands
configCmdArgs_2: '0x00000000'
# ------------------------------------------===== reserved2 [Optional] =====------------------------------------------
# Description: Offset: 0x0000003C, Width: 32b; [0x03c-0x03f] Reserved for future use
reserved2: '0x00000000'
# ------------------------------------===== controllerMiscOption [Optional] =====-------------------------------------
# Description: Offset: 0x00000040, Width: 32b; [0x040-0x043] Controller Misc Options, see Misc feature bit
# definitions for more details
controllerMiscOption: '0x00000000'
# -----------------------------------------===== deviceType [Optional] =====------------------------------------------
# Description: Offset: 0x00000044, Width: 8b; [0x044-0x044] Device Type: See Flash Type Definition for more details
deviceType: '0x00'
# ----------------------------------------===== sflashPadType [Optional] =====----------------------------------------
# Description: Offset: 0x00000045, Width: 8b; [0x045-0x045] Serial Flash Pad Type: 1 - Single, 2 - Dual, 4 - Quad, 8
# - Octal
sflashPadType: '0x00'
# ----------------------------------------===== serialClkFreq [Optional] =====----------------------------------------
# Description: Offset: 0x00000046, Width: 8b; [0x046-0x046] Serial Flash Frequency, device specific definitions, See
# System Boot Chapter for more details
serialClkFreq: '0x00'
# -------------------------------------===== lutCustomSeqEnable [Optional] =====--------------------------------------
# Description: Offset: 0x00000047, Width: 8b; [0x047-0x047] LUT customization Enable, it is required if the
# program/erase cannot be done using 1 LUT sequence, currently, only applicable to HyperFLASH
lutCustomSeqEnable: '0x00'
# -----------------------------------------===== reserved3_0 [Optional] =====-----------------------------------------
# Description: Offset: 0x00000048, Width: 32b; [0x048-0x04f] Reserved for future use
reserved3_0: '0x00000000'
# -----------------------------------------===== reserved3_1 [Optional] =====-----------------------------------------
# Description: Offset: 0x0000004C, Width: 32b; [0x048-0x04f] Reserved for future use
reserved3_1: '0x00000000'
# ----------------------------------------===== sflashA1Size [Optional] =====-----------------------------------------
# Description: Offset: 0x00000050, Width: 32b; [0x050-0x053] Size of Flash connected to A1
sflashA1Size: '0x00000000'
# ----------------------------------------===== sflashA2Size [Optional] =====-----------------------------------------
# Description: Offset: 0x00000054, Width: 32b; [0x054-0x057] Size of Flash connected to A2
sflashA2Size: '0x00000000'
# ----------------------------------------===== sflashB1Size [Optional] =====-----------------------------------------
# Description: Offset: 0x00000058, Width: 32b; [0x058-0x05b] Size of Flash connected to B1
sflashB1Size: '0x00000000'
# ----------------------------------------===== sflashB2Size [Optional] =====-----------------------------------------
# Description: Offset: 0x0000005C, Width: 32b; [0x05c-0x05f] Size of Flash connected to B2
sflashB2Size: '0x00000000'
# ------------------------------------===== csPadSettingOverride [Optional] =====-------------------------------------
# Description: Offset: 0x00000060, Width: 32b; [0x060-0x063] CS pad setting override value
csPadSettingOverride: '0x00000000'
# -----------------------------------===== sclkPadSettingOverride [Optional] =====------------------------------------
# Description: Offset: 0x00000064, Width: 32b; [0x064-0x067] SCK pad setting override value
sclkPadSettingOverride: '0x00000000'
# -----------------------------------===== dataPadSettingOverride [Optional] =====------------------------------------
# Description: Offset: 0x00000068, Width: 32b; [0x068-0x06b] data pad setting override value
dataPadSettingOverride: '0x00000000'
# ------------------------------------===== dqsPadSettingOverride [Optional] =====------------------------------------
# Description: Offset: 0x0000006C, Width: 32b; [0x06c-0x06f] DQS pad setting override value
dqsPadSettingOverride: '0x00000000'
# -----------------------------------------===== timeoutInMs [Optional] =====-----------------------------------------
# Description: Offset: 0x00000070, Width: 32b; [0x070-0x073] Timeout threshold for read status command
timeoutInMs: '0x00000000'
# ---------------------------------------===== commandInterval [Optional] =====---------------------------------------
# Description: Offset: 0x00000074, Width: 32b; [0x074-0x077] CS deselect interval between two commands
commandInterval: '0x00000000'
# ---------------------------------------===== dataValidTime_0 [Optional] =====---------------------------------------
# Description: Offset: 0x00000078, Width: 16b; [0x078-0x07b] CLK edge to data valid time for PORT A and PORT B
dataValidTime_0: '0x0000'
# ---------------------------------------===== dataValidTime_1 [Optional] =====---------------------------------------
# Description: Offset: 0x0000007A, Width: 16b; [0x078-0x07b] CLK edge to data valid time for PORT A and PORT B
dataValidTime_1: '0x0000'
# -----------------------------------------===== busyOffset [Optional] =====------------------------------------------
# Description: Offset: 0x0000007C, Width: 16b; [0x07c-0x07d] Busy offset, valid value: 0-31
busyOffset: '0x0000'
# ---------------------------------------===== busyBitPolarity [Optional] =====---------------------------------------
# Description: Offset: 0x0000007E, Width: 16b; [0x07e-0x07f] Busy flag polarity, 0 - busy flag is 1 when flash device
# is busy, 1 - busy flag is 0 when flash device is busy
busyBitPolarity: '0x0000'
# -----------------------------------===== lookupTable_seq0_instr0 [Optional] =====-----------------------------------
# Description: Offset: 0x00000080, Width: 16b; Lookup table holds Flash command sequences 0, instruction 0
lookupTable_seq0_instr0:
# ------------------------------------------===== OPERAND [Optional] =====------------------------------------------
# Description: Offset: 0b, Width: 8b, Instruction operand. Its values depends on used instruction
OPERAND: 0
# -----------------------------------------===== NUM_PADS [Optional] =====------------------------------------------
# Description: Offset: 8b, Width: 2b, Number of pads used by instruction. Some instructions ignores this parameter.
# - 1PAD, (0): Single mode. One pad is used.
# - 2PAD, (1): Dual mode. Two pads are used.
# - 4PAD, (2): Quad mode. Four pads are used.
# - 8PAD, (3): Octal mode. Eight pads are used.
# Possible options: <1PAD, 2PAD, 4PAD, 8PAD>
NUM_PADS: 1PAD
# --------------------------------------===== OPERATION_CODE [Optional] =====---------------------------------------
# Description: Offset: 10b, Width: 6b, Instruction operation code.
# - STOP, (0): Stop execution and de-assert CS. Then, the next command sequence (to the same flash device) starts
# from instruction pointer 0.
# - CMD_SDR, (1): Transmit command code to Flash.
# - RADDR_SDR, (2): Transmit row address to Flash.
# - CADDR_SDR, (3): Transmit column address to Flash.
# - MODE1_SDR, (4): Transmit mode bits to Flash.
# - MODE2_SDR, (5): Transmit mode bits to Flash.
# - MODE4_SDR, (6): Transmit mode bits to Flash.
# - MODE8_SDR, (7): Transmit mode bits to Flash.
# - WRITE_SDR, (8): Transmit program data to Flash device.
# - READ_SDR, (9): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_SDR, (10): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_SDR, (11): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_SDR, (12): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_SDR, (13): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# - JMP_ON_CS, (31): Stop execution, de-assert CS and save operand[7:0] as the instruction start pointer for next
# sequence.Normally this instruction is used to support Execute-In-Place enhanced mode. See XIP enhanced mode for
# more details.This instruction is only allowed for AHB read commands. There is interrupt status bit set
# (INTR[IPCMDERR] or INTR[AHBCMDERR]) when using this instruction in IP command or AHB write command.
# - CMD_DDR, (33): Transmit command code to Flash.
# - RADDR_DDR, (34): Transmit row address to Flash.
# - CADDR_DDR, (35): Transmit column address to Flash.
# - MODE1_DDR, (36): Transmit mode bits to Flash.
# - MODE2_DDR, (37): Transmit mode bits to Flash.
# - MODE4_DDR, (38): Transmit mode bits to Flash.
# - MODE8_DDR, (39): Transmit mode bits to Flash.
# - WRITE_DDR, (40): Transmit program data to Flash device.
# - READ_DDR, (41): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_DDR, (42): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_DDR, (43): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_DDR, (44): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_DDR, (45): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# Possible options: <STOP, CMD_SDR, RADDR_SDR, CADDR_SDR, MODE1_SDR, MODE2_SDR, MODE4_SDR, MODE8_SDR, WRITE_SDR,
# READ_SDR, LEARN_SDR, DATSZ_SDR, DUMMY_SDR, DUMMY_RWDS_SDR, JMP_ON_CS, CMD_DDR, RADDR_DDR, CADDR_DDR, MODE1_DDR,
# MODE2_DDR, MODE4_DDR, MODE8_DDR, WRITE_DDR, READ_DDR, LEARN_DDR, DATSZ_DDR, DUMMY_DDR, DUMMY_RWDS_DDR>
OPERATION_CODE: STOP
lookupTable_seq0_instr1:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq0_instr2:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq0_instr3:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq0_instr4:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq0_instr5:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq0_instr6:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq0_instr7:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
# -----------------------------------===== lookupTable_seq1_instr0 [Optional] =====-----------------------------------
# Description: Offset: 0x00000090, Width: 16b; Lookup table holds Flash command sequences 1, instruction 0
lookupTable_seq1_instr0:
# ------------------------------------------===== OPERAND [Optional] =====------------------------------------------
# Description: Offset: 0b, Width: 8b, Instruction operand. Its values depends on used instruction
OPERAND: 0
# -----------------------------------------===== NUM_PADS [Optional] =====------------------------------------------
# Description: Offset: 8b, Width: 2b, Number of pads used by instruction. Some instructions ignores this parameter.
# - 1PAD, (0): Single mode. One pad is used.
# - 2PAD, (1): Dual mode. Two pads are used.
# - 4PAD, (2): Quad mode. Four pads are used.
# - 8PAD, (3): Octal mode. Eight pads are used.
# Possible options: <1PAD, 2PAD, 4PAD, 8PAD>
NUM_PADS: 1PAD
# --------------------------------------===== OPERATION_CODE [Optional] =====---------------------------------------
# Description: Offset: 10b, Width: 6b, Instruction operation code.
# - STOP, (0): Stop execution and de-assert CS. Then, the next command sequence (to the same flash device) starts
# from instruction pointer 0.
# - CMD_SDR, (1): Transmit command code to Flash.
# - RADDR_SDR, (2): Transmit row address to Flash.
# - CADDR_SDR, (3): Transmit column address to Flash.
# - MODE1_SDR, (4): Transmit mode bits to Flash.
# - MODE2_SDR, (5): Transmit mode bits to Flash.
# - MODE4_SDR, (6): Transmit mode bits to Flash.
# - MODE8_SDR, (7): Transmit mode bits to Flash.
# - WRITE_SDR, (8): Transmit program data to Flash device.
# - READ_SDR, (9): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_SDR, (10): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_SDR, (11): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_SDR, (12): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_SDR, (13): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# - JMP_ON_CS, (31): Stop execution, de-assert CS and save operand[7:0] as the instruction start pointer for next
# sequence.Normally this instruction is used to support Execute-In-Place enhanced mode. See XIP enhanced mode for
# more details.This instruction is only allowed for AHB read commands. There is interrupt status bit set
# (INTR[IPCMDERR] or INTR[AHBCMDERR]) when using this instruction in IP command or AHB write command.
# - CMD_DDR, (33): Transmit command code to Flash.
# - RADDR_DDR, (34): Transmit row address to Flash.
# - CADDR_DDR, (35): Transmit column address to Flash.
# - MODE1_DDR, (36): Transmit mode bits to Flash.
# - MODE2_DDR, (37): Transmit mode bits to Flash.
# - MODE4_DDR, (38): Transmit mode bits to Flash.
# - MODE8_DDR, (39): Transmit mode bits to Flash.
# - WRITE_DDR, (40): Transmit program data to Flash device.
# - READ_DDR, (41): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_DDR, (42): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_DDR, (43): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_DDR, (44): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_DDR, (45): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# Possible options: <STOP, CMD_SDR, RADDR_SDR, CADDR_SDR, MODE1_SDR, MODE2_SDR, MODE4_SDR, MODE8_SDR, WRITE_SDR,
# READ_SDR, LEARN_SDR, DATSZ_SDR, DUMMY_SDR, DUMMY_RWDS_SDR, JMP_ON_CS, CMD_DDR, RADDR_DDR, CADDR_DDR, MODE1_DDR,
# MODE2_DDR, MODE4_DDR, MODE8_DDR, WRITE_DDR, READ_DDR, LEARN_DDR, DATSZ_DDR, DUMMY_DDR, DUMMY_RWDS_DDR>
OPERATION_CODE: STOP
lookupTable_seq1_instr1:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq1_instr2:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq1_instr3:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq1_instr4:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq1_instr5:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq1_instr6:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq1_instr7:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
# -----------------------------------===== lookupTable_seq2_instr0 [Optional] =====-----------------------------------
# Description: Offset: 0x000000A0, Width: 16b; Lookup table holds Flash command sequences 2, instruction 0
lookupTable_seq2_instr0:
# ------------------------------------------===== OPERAND [Optional] =====------------------------------------------
# Description: Offset: 0b, Width: 8b, Instruction operand. Its values depends on used instruction
OPERAND: 0
# -----------------------------------------===== NUM_PADS [Optional] =====------------------------------------------
# Description: Offset: 8b, Width: 2b, Number of pads used by instruction. Some instructions ignores this parameter.
# - 1PAD, (0): Single mode. One pad is used.
# - 2PAD, (1): Dual mode. Two pads are used.
# - 4PAD, (2): Quad mode. Four pads are used.
# - 8PAD, (3): Octal mode. Eight pads are used.
# Possible options: <1PAD, 2PAD, 4PAD, 8PAD>
NUM_PADS: 1PAD
# --------------------------------------===== OPERATION_CODE [Optional] =====---------------------------------------
# Description: Offset: 10b, Width: 6b, Instruction operation code.
# - STOP, (0): Stop execution and de-assert CS. Then, the next command sequence (to the same flash device) starts
# from instruction pointer 0.
# - CMD_SDR, (1): Transmit command code to Flash.
# - RADDR_SDR, (2): Transmit row address to Flash.
# - CADDR_SDR, (3): Transmit column address to Flash.
# - MODE1_SDR, (4): Transmit mode bits to Flash.
# - MODE2_SDR, (5): Transmit mode bits to Flash.
# - MODE4_SDR, (6): Transmit mode bits to Flash.
# - MODE8_SDR, (7): Transmit mode bits to Flash.
# - WRITE_SDR, (8): Transmit program data to Flash device.
# - READ_SDR, (9): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_SDR, (10): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_SDR, (11): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_SDR, (12): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_SDR, (13): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# - JMP_ON_CS, (31): Stop execution, de-assert CS and save operand[7:0] as the instruction start pointer for next
# sequence.Normally this instruction is used to support Execute-In-Place enhanced mode. See XIP enhanced mode for
# more details.This instruction is only allowed for AHB read commands. There is interrupt status bit set
# (INTR[IPCMDERR] or INTR[AHBCMDERR]) when using this instruction in IP command or AHB write command.
# - CMD_DDR, (33): Transmit command code to Flash.
# - RADDR_DDR, (34): Transmit row address to Flash.
# - CADDR_DDR, (35): Transmit column address to Flash.
# - MODE1_DDR, (36): Transmit mode bits to Flash.
# - MODE2_DDR, (37): Transmit mode bits to Flash.
# - MODE4_DDR, (38): Transmit mode bits to Flash.
# - MODE8_DDR, (39): Transmit mode bits to Flash.
# - WRITE_DDR, (40): Transmit program data to Flash device.
# - READ_DDR, (41): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_DDR, (42): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_DDR, (43): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_DDR, (44): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_DDR, (45): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# Possible options: <STOP, CMD_SDR, RADDR_SDR, CADDR_SDR, MODE1_SDR, MODE2_SDR, MODE4_SDR, MODE8_SDR, WRITE_SDR,
# READ_SDR, LEARN_SDR, DATSZ_SDR, DUMMY_SDR, DUMMY_RWDS_SDR, JMP_ON_CS, CMD_DDR, RADDR_DDR, CADDR_DDR, MODE1_DDR,
# MODE2_DDR, MODE4_DDR, MODE8_DDR, WRITE_DDR, READ_DDR, LEARN_DDR, DATSZ_DDR, DUMMY_DDR, DUMMY_RWDS_DDR>
OPERATION_CODE: STOP
lookupTable_seq2_instr1:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq2_instr2:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq2_instr3:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq2_instr4:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq2_instr5:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq2_instr6:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq2_instr7:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
# -----------------------------------===== lookupTable_seq3_instr0 [Optional] =====-----------------------------------
# Description: Offset: 0x000000B0, Width: 16b; Lookup table holds Flash command sequences 3, instruction 0
lookupTable_seq3_instr0:
# ------------------------------------------===== OPERAND [Optional] =====------------------------------------------
# Description: Offset: 0b, Width: 8b, Instruction operand. Its values depends on used instruction
OPERAND: 0
# -----------------------------------------===== NUM_PADS [Optional] =====------------------------------------------
# Description: Offset: 8b, Width: 2b, Number of pads used by instruction. Some instructions ignores this parameter.
# - 1PAD, (0): Single mode. One pad is used.
# - 2PAD, (1): Dual mode. Two pads are used.
# - 4PAD, (2): Quad mode. Four pads are used.
# - 8PAD, (3): Octal mode. Eight pads are used.
# Possible options: <1PAD, 2PAD, 4PAD, 8PAD>
NUM_PADS: 1PAD
# --------------------------------------===== OPERATION_CODE [Optional] =====---------------------------------------
# Description: Offset: 10b, Width: 6b, Instruction operation code.
# - STOP, (0): Stop execution and de-assert CS. Then, the next command sequence (to the same flash device) starts
# from instruction pointer 0.
# - CMD_SDR, (1): Transmit command code to Flash.
# - RADDR_SDR, (2): Transmit row address to Flash.
# - CADDR_SDR, (3): Transmit column address to Flash.
# - MODE1_SDR, (4): Transmit mode bits to Flash.
# - MODE2_SDR, (5): Transmit mode bits to Flash.
# - MODE4_SDR, (6): Transmit mode bits to Flash.
# - MODE8_SDR, (7): Transmit mode bits to Flash.
# - WRITE_SDR, (8): Transmit program data to Flash device.
# - READ_SDR, (9): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_SDR, (10): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_SDR, (11): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_SDR, (12): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_SDR, (13): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# - JMP_ON_CS, (31): Stop execution, de-assert CS and save operand[7:0] as the instruction start pointer for next
# sequence.Normally this instruction is used to support Execute-In-Place enhanced mode. See XIP enhanced mode for
# more details.This instruction is only allowed for AHB read commands. There is interrupt status bit set
# (INTR[IPCMDERR] or INTR[AHBCMDERR]) when using this instruction in IP command or AHB write command.
# - CMD_DDR, (33): Transmit command code to Flash.
# - RADDR_DDR, (34): Transmit row address to Flash.
# - CADDR_DDR, (35): Transmit column address to Flash.
# - MODE1_DDR, (36): Transmit mode bits to Flash.
# - MODE2_DDR, (37): Transmit mode bits to Flash.
# - MODE4_DDR, (38): Transmit mode bits to Flash.
# - MODE8_DDR, (39): Transmit mode bits to Flash.
# - WRITE_DDR, (40): Transmit program data to Flash device.
# - READ_DDR, (41): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_DDR, (42): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_DDR, (43): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_DDR, (44): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_DDR, (45): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# Possible options: <STOP, CMD_SDR, RADDR_SDR, CADDR_SDR, MODE1_SDR, MODE2_SDR, MODE4_SDR, MODE8_SDR, WRITE_SDR,
# READ_SDR, LEARN_SDR, DATSZ_SDR, DUMMY_SDR, DUMMY_RWDS_SDR, JMP_ON_CS, CMD_DDR, RADDR_DDR, CADDR_DDR, MODE1_DDR,
# MODE2_DDR, MODE4_DDR, MODE8_DDR, WRITE_DDR, READ_DDR, LEARN_DDR, DATSZ_DDR, DUMMY_DDR, DUMMY_RWDS_DDR>
OPERATION_CODE: STOP
lookupTable_seq3_instr1:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq3_instr2:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq3_instr3:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq3_instr4:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq3_instr5:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq3_instr6:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq3_instr7:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
# -----------------------------------===== lookupTable_seq4_instr0 [Optional] =====-----------------------------------
# Description: Offset: 0x000000C0, Width: 16b; Lookup table holds Flash command sequences 4, instruction 0
lookupTable_seq4_instr0:
# ------------------------------------------===== OPERAND [Optional] =====------------------------------------------
# Description: Offset: 0b, Width: 8b, Instruction operand. Its values depends on used instruction
OPERAND: 0
# -----------------------------------------===== NUM_PADS [Optional] =====------------------------------------------
# Description: Offset: 8b, Width: 2b, Number of pads used by instruction. Some instructions ignores this parameter.
# - 1PAD, (0): Single mode. One pad is used.
# - 2PAD, (1): Dual mode. Two pads are used.
# - 4PAD, (2): Quad mode. Four pads are used.
# - 8PAD, (3): Octal mode. Eight pads are used.
# Possible options: <1PAD, 2PAD, 4PAD, 8PAD>
NUM_PADS: 1PAD
# --------------------------------------===== OPERATION_CODE [Optional] =====---------------------------------------
# Description: Offset: 10b, Width: 6b, Instruction operation code.
# - STOP, (0): Stop execution and de-assert CS. Then, the next command sequence (to the same flash device) starts
# from instruction pointer 0.
# - CMD_SDR, (1): Transmit command code to Flash.
# - RADDR_SDR, (2): Transmit row address to Flash.
# - CADDR_SDR, (3): Transmit column address to Flash.
# - MODE1_SDR, (4): Transmit mode bits to Flash.
# - MODE2_SDR, (5): Transmit mode bits to Flash.
# - MODE4_SDR, (6): Transmit mode bits to Flash.
# - MODE8_SDR, (7): Transmit mode bits to Flash.
# - WRITE_SDR, (8): Transmit program data to Flash device.
# - READ_SDR, (9): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_SDR, (10): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_SDR, (11): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_SDR, (12): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_SDR, (13): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# - JMP_ON_CS, (31): Stop execution, de-assert CS and save operand[7:0] as the instruction start pointer for next
# sequence.Normally this instruction is used to support Execute-In-Place enhanced mode. See XIP enhanced mode for
# more details.This instruction is only allowed for AHB read commands. There is interrupt status bit set
# (INTR[IPCMDERR] or INTR[AHBCMDERR]) when using this instruction in IP command or AHB write command.
# - CMD_DDR, (33): Transmit command code to Flash.
# - RADDR_DDR, (34): Transmit row address to Flash.
# - CADDR_DDR, (35): Transmit column address to Flash.
# - MODE1_DDR, (36): Transmit mode bits to Flash.
# - MODE2_DDR, (37): Transmit mode bits to Flash.
# - MODE4_DDR, (38): Transmit mode bits to Flash.
# - MODE8_DDR, (39): Transmit mode bits to Flash.
# - WRITE_DDR, (40): Transmit program data to Flash device.
# - READ_DDR, (41): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_DDR, (42): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_DDR, (43): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_DDR, (44): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_DDR, (45): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# Possible options: <STOP, CMD_SDR, RADDR_SDR, CADDR_SDR, MODE1_SDR, MODE2_SDR, MODE4_SDR, MODE8_SDR, WRITE_SDR,
# READ_SDR, LEARN_SDR, DATSZ_SDR, DUMMY_SDR, DUMMY_RWDS_SDR, JMP_ON_CS, CMD_DDR, RADDR_DDR, CADDR_DDR, MODE1_DDR,
# MODE2_DDR, MODE4_DDR, MODE8_DDR, WRITE_DDR, READ_DDR, LEARN_DDR, DATSZ_DDR, DUMMY_DDR, DUMMY_RWDS_DDR>
OPERATION_CODE: STOP
lookupTable_seq4_instr1:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq4_instr2:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq4_instr3:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq4_instr4:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq4_instr5:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq4_instr6:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq4_instr7:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
# -----------------------------------===== lookupTable_seq5_instr0 [Optional] =====-----------------------------------
# Description: Offset: 0x000000D0, Width: 16b; Lookup table holds Flash command sequences 5, instruction 0
lookupTable_seq5_instr0:
# ------------------------------------------===== OPERAND [Optional] =====------------------------------------------
# Description: Offset: 0b, Width: 8b, Instruction operand. Its values depends on used instruction
OPERAND: 0
# -----------------------------------------===== NUM_PADS [Optional] =====------------------------------------------
# Description: Offset: 8b, Width: 2b, Number of pads used by instruction. Some instructions ignores this parameter.
# - 1PAD, (0): Single mode. One pad is used.
# - 2PAD, (1): Dual mode. Two pads are used.
# - 4PAD, (2): Quad mode. Four pads are used.
# - 8PAD, (3): Octal mode. Eight pads are used.
# Possible options: <1PAD, 2PAD, 4PAD, 8PAD>
NUM_PADS: 1PAD
# --------------------------------------===== OPERATION_CODE [Optional] =====---------------------------------------
# Description: Offset: 10b, Width: 6b, Instruction operation code.
# - STOP, (0): Stop execution and de-assert CS. Then, the next command sequence (to the same flash device) starts
# from instruction pointer 0.
# - CMD_SDR, (1): Transmit command code to Flash.
# - RADDR_SDR, (2): Transmit row address to Flash.
# - CADDR_SDR, (3): Transmit column address to Flash.
# - MODE1_SDR, (4): Transmit mode bits to Flash.
# - MODE2_SDR, (5): Transmit mode bits to Flash.
# - MODE4_SDR, (6): Transmit mode bits to Flash.
# - MODE8_SDR, (7): Transmit mode bits to Flash.
# - WRITE_SDR, (8): Transmit program data to Flash device.
# - READ_SDR, (9): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_SDR, (10): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_SDR, (11): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_SDR, (12): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_SDR, (13): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# - JMP_ON_CS, (31): Stop execution, de-assert CS and save operand[7:0] as the instruction start pointer for next
# sequence.Normally this instruction is used to support Execute-In-Place enhanced mode. See XIP enhanced mode for
# more details.This instruction is only allowed for AHB read commands. There is interrupt status bit set
# (INTR[IPCMDERR] or INTR[AHBCMDERR]) when using this instruction in IP command or AHB write command.
# - CMD_DDR, (33): Transmit command code to Flash.
# - RADDR_DDR, (34): Transmit row address to Flash.
# - CADDR_DDR, (35): Transmit column address to Flash.
# - MODE1_DDR, (36): Transmit mode bits to Flash.
# - MODE2_DDR, (37): Transmit mode bits to Flash.
# - MODE4_DDR, (38): Transmit mode bits to Flash.
# - MODE8_DDR, (39): Transmit mode bits to Flash.
# - WRITE_DDR, (40): Transmit program data to Flash device.
# - READ_DDR, (41): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_DDR, (42): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_DDR, (43): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_DDR, (44): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_DDR, (45): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# Possible options: <STOP, CMD_SDR, RADDR_SDR, CADDR_SDR, MODE1_SDR, MODE2_SDR, MODE4_SDR, MODE8_SDR, WRITE_SDR,
# READ_SDR, LEARN_SDR, DATSZ_SDR, DUMMY_SDR, DUMMY_RWDS_SDR, JMP_ON_CS, CMD_DDR, RADDR_DDR, CADDR_DDR, MODE1_DDR,
# MODE2_DDR, MODE4_DDR, MODE8_DDR, WRITE_DDR, READ_DDR, LEARN_DDR, DATSZ_DDR, DUMMY_DDR, DUMMY_RWDS_DDR>
OPERATION_CODE: STOP
lookupTable_seq5_instr1:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq5_instr2:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq5_instr3:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq5_instr4:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq5_instr5:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq5_instr6:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq5_instr7:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
# -----------------------------------===== lookupTable_seq6_instr0 [Optional] =====-----------------------------------
# Description: Offset: 0x000000E0, Width: 16b; Lookup table holds Flash command sequences 6, instruction 0
lookupTable_seq6_instr0:
# ------------------------------------------===== OPERAND [Optional] =====------------------------------------------
# Description: Offset: 0b, Width: 8b, Instruction operand. Its values depends on used instruction
OPERAND: 0
# -----------------------------------------===== NUM_PADS [Optional] =====------------------------------------------
# Description: Offset: 8b, Width: 2b, Number of pads used by instruction. Some instructions ignores this parameter.
# - 1PAD, (0): Single mode. One pad is used.
# - 2PAD, (1): Dual mode. Two pads are used.
# - 4PAD, (2): Quad mode. Four pads are used.
# - 8PAD, (3): Octal mode. Eight pads are used.
# Possible options: <1PAD, 2PAD, 4PAD, 8PAD>
NUM_PADS: 1PAD
# --------------------------------------===== OPERATION_CODE [Optional] =====---------------------------------------
# Description: Offset: 10b, Width: 6b, Instruction operation code.
# - STOP, (0): Stop execution and de-assert CS. Then, the next command sequence (to the same flash device) starts
# from instruction pointer 0.
# - CMD_SDR, (1): Transmit command code to Flash.
# - RADDR_SDR, (2): Transmit row address to Flash.
# - CADDR_SDR, (3): Transmit column address to Flash.
# - MODE1_SDR, (4): Transmit mode bits to Flash.
# - MODE2_SDR, (5): Transmit mode bits to Flash.
# - MODE4_SDR, (6): Transmit mode bits to Flash.
# - MODE8_SDR, (7): Transmit mode bits to Flash.
# - WRITE_SDR, (8): Transmit program data to Flash device.
# - READ_SDR, (9): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_SDR, (10): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_SDR, (11): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_SDR, (12): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_SDR, (13): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# - JMP_ON_CS, (31): Stop execution, de-assert CS and save operand[7:0] as the instruction start pointer for next
# sequence.Normally this instruction is used to support Execute-In-Place enhanced mode. See XIP enhanced mode for
# more details.This instruction is only allowed for AHB read commands. There is interrupt status bit set
# (INTR[IPCMDERR] or INTR[AHBCMDERR]) when using this instruction in IP command or AHB write command.
# - CMD_DDR, (33): Transmit command code to Flash.
# - RADDR_DDR, (34): Transmit row address to Flash.
# - CADDR_DDR, (35): Transmit column address to Flash.
# - MODE1_DDR, (36): Transmit mode bits to Flash.
# - MODE2_DDR, (37): Transmit mode bits to Flash.
# - MODE4_DDR, (38): Transmit mode bits to Flash.
# - MODE8_DDR, (39): Transmit mode bits to Flash.
# - WRITE_DDR, (40): Transmit program data to Flash device.
# - READ_DDR, (41): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_DDR, (42): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_DDR, (43): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_DDR, (44): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_DDR, (45): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# Possible options: <STOP, CMD_SDR, RADDR_SDR, CADDR_SDR, MODE1_SDR, MODE2_SDR, MODE4_SDR, MODE8_SDR, WRITE_SDR,
# READ_SDR, LEARN_SDR, DATSZ_SDR, DUMMY_SDR, DUMMY_RWDS_SDR, JMP_ON_CS, CMD_DDR, RADDR_DDR, CADDR_DDR, MODE1_DDR,
# MODE2_DDR, MODE4_DDR, MODE8_DDR, WRITE_DDR, READ_DDR, LEARN_DDR, DATSZ_DDR, DUMMY_DDR, DUMMY_RWDS_DDR>
OPERATION_CODE: STOP
lookupTable_seq6_instr1:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq6_instr2:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq6_instr3:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq6_instr4:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq6_instr5:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq6_instr6:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq6_instr7:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
# -----------------------------------===== lookupTable_seq7_instr0 [Optional] =====-----------------------------------
# Description: Offset: 0x000000F0, Width: 16b; Lookup table holds Flash command sequences 7, instruction 0
lookupTable_seq7_instr0:
# ------------------------------------------===== OPERAND [Optional] =====------------------------------------------
# Description: Offset: 0b, Width: 8b, Instruction operand. Its values depends on used instruction
OPERAND: 0
# -----------------------------------------===== NUM_PADS [Optional] =====------------------------------------------
# Description: Offset: 8b, Width: 2b, Number of pads used by instruction. Some instructions ignores this parameter.
# - 1PAD, (0): Single mode. One pad is used.
# - 2PAD, (1): Dual mode. Two pads are used.
# - 4PAD, (2): Quad mode. Four pads are used.
# - 8PAD, (3): Octal mode. Eight pads are used.
# Possible options: <1PAD, 2PAD, 4PAD, 8PAD>
NUM_PADS: 1PAD
# --------------------------------------===== OPERATION_CODE [Optional] =====---------------------------------------
# Description: Offset: 10b, Width: 6b, Instruction operation code.
# - STOP, (0): Stop execution and de-assert CS. Then, the next command sequence (to the same flash device) starts
# from instruction pointer 0.
# - CMD_SDR, (1): Transmit command code to Flash.
# - RADDR_SDR, (2): Transmit row address to Flash.
# - CADDR_SDR, (3): Transmit column address to Flash.
# - MODE1_SDR, (4): Transmit mode bits to Flash.
# - MODE2_SDR, (5): Transmit mode bits to Flash.
# - MODE4_SDR, (6): Transmit mode bits to Flash.
# - MODE8_SDR, (7): Transmit mode bits to Flash.
# - WRITE_SDR, (8): Transmit program data to Flash device.
# - READ_SDR, (9): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_SDR, (10): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_SDR, (11): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_SDR, (12): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_SDR, (13): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# - JMP_ON_CS, (31): Stop execution, de-assert CS and save operand[7:0] as the instruction start pointer for next
# sequence.Normally this instruction is used to support Execute-In-Place enhanced mode. See XIP enhanced mode for
# more details.This instruction is only allowed for AHB read commands. There is interrupt status bit set
# (INTR[IPCMDERR] or INTR[AHBCMDERR]) when using this instruction in IP command or AHB write command.
# - CMD_DDR, (33): Transmit command code to Flash.
# - RADDR_DDR, (34): Transmit row address to Flash.
# - CADDR_DDR, (35): Transmit column address to Flash.
# - MODE1_DDR, (36): Transmit mode bits to Flash.
# - MODE2_DDR, (37): Transmit mode bits to Flash.
# - MODE4_DDR, (38): Transmit mode bits to Flash.
# - MODE8_DDR, (39): Transmit mode bits to Flash.
# - WRITE_DDR, (40): Transmit program data to Flash device.
# - READ_DDR, (41): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_DDR, (42): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_DDR, (43): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_DDR, (44): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_DDR, (45): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# Possible options: <STOP, CMD_SDR, RADDR_SDR, CADDR_SDR, MODE1_SDR, MODE2_SDR, MODE4_SDR, MODE8_SDR, WRITE_SDR,
# READ_SDR, LEARN_SDR, DATSZ_SDR, DUMMY_SDR, DUMMY_RWDS_SDR, JMP_ON_CS, CMD_DDR, RADDR_DDR, CADDR_DDR, MODE1_DDR,
# MODE2_DDR, MODE4_DDR, MODE8_DDR, WRITE_DDR, READ_DDR, LEARN_DDR, DATSZ_DDR, DUMMY_DDR, DUMMY_RWDS_DDR>
OPERATION_CODE: STOP
lookupTable_seq7_instr1:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq7_instr2:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq7_instr3:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq7_instr4:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq7_instr5:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq7_instr6:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq7_instr7:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
# -----------------------------------===== lookupTable_seq8_instr0 [Optional] =====-----------------------------------
# Description: Offset: 0x00000100, Width: 16b; Lookup table holds Flash command sequences 8, instruction 0
lookupTable_seq8_instr0:
# ------------------------------------------===== OPERAND [Optional] =====------------------------------------------
# Description: Offset: 0b, Width: 8b, Instruction operand. Its values depends on used instruction
OPERAND: 0
# -----------------------------------------===== NUM_PADS [Optional] =====------------------------------------------
# Description: Offset: 8b, Width: 2b, Number of pads used by instruction. Some instructions ignores this parameter.
# - 1PAD, (0): Single mode. One pad is used.
# - 2PAD, (1): Dual mode. Two pads are used.
# - 4PAD, (2): Quad mode. Four pads are used.
# - 8PAD, (3): Octal mode. Eight pads are used.
# Possible options: <1PAD, 2PAD, 4PAD, 8PAD>
NUM_PADS: 1PAD
# --------------------------------------===== OPERATION_CODE [Optional] =====---------------------------------------
# Description: Offset: 10b, Width: 6b, Instruction operation code.
# - STOP, (0): Stop execution and de-assert CS. Then, the next command sequence (to the same flash device) starts
# from instruction pointer 0.
# - CMD_SDR, (1): Transmit command code to Flash.
# - RADDR_SDR, (2): Transmit row address to Flash.
# - CADDR_SDR, (3): Transmit column address to Flash.
# - MODE1_SDR, (4): Transmit mode bits to Flash.
# - MODE2_SDR, (5): Transmit mode bits to Flash.
# - MODE4_SDR, (6): Transmit mode bits to Flash.
# - MODE8_SDR, (7): Transmit mode bits to Flash.
# - WRITE_SDR, (8): Transmit program data to Flash device.
# - READ_SDR, (9): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_SDR, (10): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_SDR, (11): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_SDR, (12): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_SDR, (13): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# - JMP_ON_CS, (31): Stop execution, de-assert CS and save operand[7:0] as the instruction start pointer for next
# sequence.Normally this instruction is used to support Execute-In-Place enhanced mode. See XIP enhanced mode for
# more details.This instruction is only allowed for AHB read commands. There is interrupt status bit set
# (INTR[IPCMDERR] or INTR[AHBCMDERR]) when using this instruction in IP command or AHB write command.
# - CMD_DDR, (33): Transmit command code to Flash.
# - RADDR_DDR, (34): Transmit row address to Flash.
# - CADDR_DDR, (35): Transmit column address to Flash.
# - MODE1_DDR, (36): Transmit mode bits to Flash.
# - MODE2_DDR, (37): Transmit mode bits to Flash.
# - MODE4_DDR, (38): Transmit mode bits to Flash.
# - MODE8_DDR, (39): Transmit mode bits to Flash.
# - WRITE_DDR, (40): Transmit program data to Flash device.
# - READ_DDR, (41): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_DDR, (42): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_DDR, (43): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_DDR, (44): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_DDR, (45): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# Possible options: <STOP, CMD_SDR, RADDR_SDR, CADDR_SDR, MODE1_SDR, MODE2_SDR, MODE4_SDR, MODE8_SDR, WRITE_SDR,
# READ_SDR, LEARN_SDR, DATSZ_SDR, DUMMY_SDR, DUMMY_RWDS_SDR, JMP_ON_CS, CMD_DDR, RADDR_DDR, CADDR_DDR, MODE1_DDR,
# MODE2_DDR, MODE4_DDR, MODE8_DDR, WRITE_DDR, READ_DDR, LEARN_DDR, DATSZ_DDR, DUMMY_DDR, DUMMY_RWDS_DDR>
OPERATION_CODE: STOP
lookupTable_seq8_instr1:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq8_instr2:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq8_instr3:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq8_instr4:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq8_instr5:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq8_instr6:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq8_instr7:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
# -----------------------------------===== lookupTable_seq9_instr0 [Optional] =====-----------------------------------
# Description: Offset: 0x00000110, Width: 16b; Lookup table holds Flash command sequences 9, instruction 0
lookupTable_seq9_instr0:
# ------------------------------------------===== OPERAND [Optional] =====------------------------------------------
# Description: Offset: 0b, Width: 8b, Instruction operand. Its values depends on used instruction
OPERAND: 0
# -----------------------------------------===== NUM_PADS [Optional] =====------------------------------------------
# Description: Offset: 8b, Width: 2b, Number of pads used by instruction. Some instructions ignores this parameter.
# - 1PAD, (0): Single mode. One pad is used.
# - 2PAD, (1): Dual mode. Two pads are used.
# - 4PAD, (2): Quad mode. Four pads are used.
# - 8PAD, (3): Octal mode. Eight pads are used.
# Possible options: <1PAD, 2PAD, 4PAD, 8PAD>
NUM_PADS: 1PAD
# --------------------------------------===== OPERATION_CODE [Optional] =====---------------------------------------
# Description: Offset: 10b, Width: 6b, Instruction operation code.
# - STOP, (0): Stop execution and de-assert CS. Then, the next command sequence (to the same flash device) starts
# from instruction pointer 0.
# - CMD_SDR, (1): Transmit command code to Flash.
# - RADDR_SDR, (2): Transmit row address to Flash.
# - CADDR_SDR, (3): Transmit column address to Flash.
# - MODE1_SDR, (4): Transmit mode bits to Flash.
# - MODE2_SDR, (5): Transmit mode bits to Flash.
# - MODE4_SDR, (6): Transmit mode bits to Flash.
# - MODE8_SDR, (7): Transmit mode bits to Flash.
# - WRITE_SDR, (8): Transmit program data to Flash device.
# - READ_SDR, (9): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_SDR, (10): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_SDR, (11): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_SDR, (12): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_SDR, (13): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# - JMP_ON_CS, (31): Stop execution, de-assert CS and save operand[7:0] as the instruction start pointer for next
# sequence.Normally this instruction is used to support Execute-In-Place enhanced mode. See XIP enhanced mode for
# more details.This instruction is only allowed for AHB read commands. There is interrupt status bit set
# (INTR[IPCMDERR] or INTR[AHBCMDERR]) when using this instruction in IP command or AHB write command.
# - CMD_DDR, (33): Transmit command code to Flash.
# - RADDR_DDR, (34): Transmit row address to Flash.
# - CADDR_DDR, (35): Transmit column address to Flash.
# - MODE1_DDR, (36): Transmit mode bits to Flash.
# - MODE2_DDR, (37): Transmit mode bits to Flash.
# - MODE4_DDR, (38): Transmit mode bits to Flash.
# - MODE8_DDR, (39): Transmit mode bits to Flash.
# - WRITE_DDR, (40): Transmit program data to Flash device.
# - READ_DDR, (41): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_DDR, (42): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_DDR, (43): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_DDR, (44): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_DDR, (45): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# Possible options: <STOP, CMD_SDR, RADDR_SDR, CADDR_SDR, MODE1_SDR, MODE2_SDR, MODE4_SDR, MODE8_SDR, WRITE_SDR,
# READ_SDR, LEARN_SDR, DATSZ_SDR, DUMMY_SDR, DUMMY_RWDS_SDR, JMP_ON_CS, CMD_DDR, RADDR_DDR, CADDR_DDR, MODE1_DDR,
# MODE2_DDR, MODE4_DDR, MODE8_DDR, WRITE_DDR, READ_DDR, LEARN_DDR, DATSZ_DDR, DUMMY_DDR, DUMMY_RWDS_DDR>
OPERATION_CODE: STOP
lookupTable_seq9_instr1:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq9_instr2:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq9_instr3:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq9_instr4:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq9_instr5:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq9_instr6:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq9_instr7:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
# ----------------------------------===== lookupTable_seq10_instr0 [Optional] =====-----------------------------------
# Description: Offset: 0x00000120, Width: 16b; Lookup table holds Flash command sequences 10, instruction 0
lookupTable_seq10_instr0:
# ------------------------------------------===== OPERAND [Optional] =====------------------------------------------
# Description: Offset: 0b, Width: 8b, Instruction operand. Its values depends on used instruction
OPERAND: 0
# -----------------------------------------===== NUM_PADS [Optional] =====------------------------------------------
# Description: Offset: 8b, Width: 2b, Number of pads used by instruction. Some instructions ignores this parameter.
# - 1PAD, (0): Single mode. One pad is used.
# - 2PAD, (1): Dual mode. Two pads are used.
# - 4PAD, (2): Quad mode. Four pads are used.
# - 8PAD, (3): Octal mode. Eight pads are used.
# Possible options: <1PAD, 2PAD, 4PAD, 8PAD>
NUM_PADS: 1PAD
# --------------------------------------===== OPERATION_CODE [Optional] =====---------------------------------------
# Description: Offset: 10b, Width: 6b, Instruction operation code.
# - STOP, (0): Stop execution and de-assert CS. Then, the next command sequence (to the same flash device) starts
# from instruction pointer 0.
# - CMD_SDR, (1): Transmit command code to Flash.
# - RADDR_SDR, (2): Transmit row address to Flash.
# - CADDR_SDR, (3): Transmit column address to Flash.
# - MODE1_SDR, (4): Transmit mode bits to Flash.
# - MODE2_SDR, (5): Transmit mode bits to Flash.
# - MODE4_SDR, (6): Transmit mode bits to Flash.
# - MODE8_SDR, (7): Transmit mode bits to Flash.
# - WRITE_SDR, (8): Transmit program data to Flash device.
# - READ_SDR, (9): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_SDR, (10): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_SDR, (11): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_SDR, (12): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_SDR, (13): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# - JMP_ON_CS, (31): Stop execution, de-assert CS and save operand[7:0] as the instruction start pointer for next
# sequence.Normally this instruction is used to support Execute-In-Place enhanced mode. See XIP enhanced mode for
# more details.This instruction is only allowed for AHB read commands. There is interrupt status bit set
# (INTR[IPCMDERR] or INTR[AHBCMDERR]) when using this instruction in IP command or AHB write command.
# - CMD_DDR, (33): Transmit command code to Flash.
# - RADDR_DDR, (34): Transmit row address to Flash.
# - CADDR_DDR, (35): Transmit column address to Flash.
# - MODE1_DDR, (36): Transmit mode bits to Flash.
# - MODE2_DDR, (37): Transmit mode bits to Flash.
# - MODE4_DDR, (38): Transmit mode bits to Flash.
# - MODE8_DDR, (39): Transmit mode bits to Flash.
# - WRITE_DDR, (40): Transmit program data to Flash device.
# - READ_DDR, (41): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_DDR, (42): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_DDR, (43): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_DDR, (44): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_DDR, (45): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# Possible options: <STOP, CMD_SDR, RADDR_SDR, CADDR_SDR, MODE1_SDR, MODE2_SDR, MODE4_SDR, MODE8_SDR, WRITE_SDR,
# READ_SDR, LEARN_SDR, DATSZ_SDR, DUMMY_SDR, DUMMY_RWDS_SDR, JMP_ON_CS, CMD_DDR, RADDR_DDR, CADDR_DDR, MODE1_DDR,
# MODE2_DDR, MODE4_DDR, MODE8_DDR, WRITE_DDR, READ_DDR, LEARN_DDR, DATSZ_DDR, DUMMY_DDR, DUMMY_RWDS_DDR>
OPERATION_CODE: STOP
lookupTable_seq10_instr1:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq10_instr2:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq10_instr3:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq10_instr4:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq10_instr5:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq10_instr6:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq10_instr7:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
# ----------------------------------===== lookupTable_seq11_instr0 [Optional] =====-----------------------------------
# Description: Offset: 0x00000130, Width: 16b; Lookup table holds Flash command sequences 11, instruction 0
lookupTable_seq11_instr0:
# ------------------------------------------===== OPERAND [Optional] =====------------------------------------------
# Description: Offset: 0b, Width: 8b, Instruction operand. Its values depends on used instruction
OPERAND: 0
# -----------------------------------------===== NUM_PADS [Optional] =====------------------------------------------
# Description: Offset: 8b, Width: 2b, Number of pads used by instruction. Some instructions ignores this parameter.
# - 1PAD, (0): Single mode. One pad is used.
# - 2PAD, (1): Dual mode. Two pads are used.
# - 4PAD, (2): Quad mode. Four pads are used.
# - 8PAD, (3): Octal mode. Eight pads are used.
# Possible options: <1PAD, 2PAD, 4PAD, 8PAD>
NUM_PADS: 1PAD
# --------------------------------------===== OPERATION_CODE [Optional] =====---------------------------------------
# Description: Offset: 10b, Width: 6b, Instruction operation code.
# - STOP, (0): Stop execution and de-assert CS. Then, the next command sequence (to the same flash device) starts
# from instruction pointer 0.
# - CMD_SDR, (1): Transmit command code to Flash.
# - RADDR_SDR, (2): Transmit row address to Flash.
# - CADDR_SDR, (3): Transmit column address to Flash.
# - MODE1_SDR, (4): Transmit mode bits to Flash.
# - MODE2_SDR, (5): Transmit mode bits to Flash.
# - MODE4_SDR, (6): Transmit mode bits to Flash.
# - MODE8_SDR, (7): Transmit mode bits to Flash.
# - WRITE_SDR, (8): Transmit program data to Flash device.
# - READ_SDR, (9): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_SDR, (10): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_SDR, (11): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_SDR, (12): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_SDR, (13): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# - JMP_ON_CS, (31): Stop execution, de-assert CS and save operand[7:0] as the instruction start pointer for next
# sequence.Normally this instruction is used to support Execute-In-Place enhanced mode. See XIP enhanced mode for
# more details.This instruction is only allowed for AHB read commands. There is interrupt status bit set
# (INTR[IPCMDERR] or INTR[AHBCMDERR]) when using this instruction in IP command or AHB write command.
# - CMD_DDR, (33): Transmit command code to Flash.
# - RADDR_DDR, (34): Transmit row address to Flash.
# - CADDR_DDR, (35): Transmit column address to Flash.
# - MODE1_DDR, (36): Transmit mode bits to Flash.
# - MODE2_DDR, (37): Transmit mode bits to Flash.
# - MODE4_DDR, (38): Transmit mode bits to Flash.
# - MODE8_DDR, (39): Transmit mode bits to Flash.
# - WRITE_DDR, (40): Transmit program data to Flash device.
# - READ_DDR, (41): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_DDR, (42): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_DDR, (43): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_DDR, (44): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_DDR, (45): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# Possible options: <STOP, CMD_SDR, RADDR_SDR, CADDR_SDR, MODE1_SDR, MODE2_SDR, MODE4_SDR, MODE8_SDR, WRITE_SDR,
# READ_SDR, LEARN_SDR, DATSZ_SDR, DUMMY_SDR, DUMMY_RWDS_SDR, JMP_ON_CS, CMD_DDR, RADDR_DDR, CADDR_DDR, MODE1_DDR,
# MODE2_DDR, MODE4_DDR, MODE8_DDR, WRITE_DDR, READ_DDR, LEARN_DDR, DATSZ_DDR, DUMMY_DDR, DUMMY_RWDS_DDR>
OPERATION_CODE: STOP
lookupTable_seq11_instr1:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq11_instr2:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq11_instr3:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq11_instr4:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq11_instr5:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq11_instr6:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq11_instr7:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
# ----------------------------------===== lookupTable_seq12_instr0 [Optional] =====-----------------------------------
# Description: Offset: 0x00000140, Width: 16b; Lookup table holds Flash command sequences 12, instruction 0
lookupTable_seq12_instr0:
# ------------------------------------------===== OPERAND [Optional] =====------------------------------------------
# Description: Offset: 0b, Width: 8b, Instruction operand. Its values depends on used instruction
OPERAND: 0
# -----------------------------------------===== NUM_PADS [Optional] =====------------------------------------------
# Description: Offset: 8b, Width: 2b, Number of pads used by instruction. Some instructions ignores this parameter.
# - 1PAD, (0): Single mode. One pad is used.
# - 2PAD, (1): Dual mode. Two pads are used.
# - 4PAD, (2): Quad mode. Four pads are used.
# - 8PAD, (3): Octal mode. Eight pads are used.
# Possible options: <1PAD, 2PAD, 4PAD, 8PAD>
NUM_PADS: 1PAD
# --------------------------------------===== OPERATION_CODE [Optional] =====---------------------------------------
# Description: Offset: 10b, Width: 6b, Instruction operation code.
# - STOP, (0): Stop execution and de-assert CS. Then, the next command sequence (to the same flash device) starts
# from instruction pointer 0.
# - CMD_SDR, (1): Transmit command code to Flash.
# - RADDR_SDR, (2): Transmit row address to Flash.
# - CADDR_SDR, (3): Transmit column address to Flash.
# - MODE1_SDR, (4): Transmit mode bits to Flash.
# - MODE2_SDR, (5): Transmit mode bits to Flash.
# - MODE4_SDR, (6): Transmit mode bits to Flash.
# - MODE8_SDR, (7): Transmit mode bits to Flash.
# - WRITE_SDR, (8): Transmit program data to Flash device.
# - READ_SDR, (9): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_SDR, (10): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_SDR, (11): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_SDR, (12): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_SDR, (13): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# - JMP_ON_CS, (31): Stop execution, de-assert CS and save operand[7:0] as the instruction start pointer for next
# sequence.Normally this instruction is used to support Execute-In-Place enhanced mode. See XIP enhanced mode for
# more details.This instruction is only allowed for AHB read commands. There is interrupt status bit set
# (INTR[IPCMDERR] or INTR[AHBCMDERR]) when using this instruction in IP command or AHB write command.
# - CMD_DDR, (33): Transmit command code to Flash.
# - RADDR_DDR, (34): Transmit row address to Flash.
# - CADDR_DDR, (35): Transmit column address to Flash.
# - MODE1_DDR, (36): Transmit mode bits to Flash.
# - MODE2_DDR, (37): Transmit mode bits to Flash.
# - MODE4_DDR, (38): Transmit mode bits to Flash.
# - MODE8_DDR, (39): Transmit mode bits to Flash.
# - WRITE_DDR, (40): Transmit program data to Flash device.
# - READ_DDR, (41): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_DDR, (42): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_DDR, (43): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_DDR, (44): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_DDR, (45): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# Possible options: <STOP, CMD_SDR, RADDR_SDR, CADDR_SDR, MODE1_SDR, MODE2_SDR, MODE4_SDR, MODE8_SDR, WRITE_SDR,
# READ_SDR, LEARN_SDR, DATSZ_SDR, DUMMY_SDR, DUMMY_RWDS_SDR, JMP_ON_CS, CMD_DDR, RADDR_DDR, CADDR_DDR, MODE1_DDR,
# MODE2_DDR, MODE4_DDR, MODE8_DDR, WRITE_DDR, READ_DDR, LEARN_DDR, DATSZ_DDR, DUMMY_DDR, DUMMY_RWDS_DDR>
OPERATION_CODE: STOP
lookupTable_seq12_instr1:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq12_instr2:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq12_instr3:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq12_instr4:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq12_instr5:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq12_instr6:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq12_instr7:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
# ----------------------------------===== lookupTable_seq13_instr0 [Optional] =====-----------------------------------
# Description: Offset: 0x00000150, Width: 16b; Lookup table holds Flash command sequences 13, instruction 0
lookupTable_seq13_instr0:
# ------------------------------------------===== OPERAND [Optional] =====------------------------------------------
# Description: Offset: 0b, Width: 8b, Instruction operand. Its values depends on used instruction
OPERAND: 0
# -----------------------------------------===== NUM_PADS [Optional] =====------------------------------------------
# Description: Offset: 8b, Width: 2b, Number of pads used by instruction. Some instructions ignores this parameter.
# - 1PAD, (0): Single mode. One pad is used.
# - 2PAD, (1): Dual mode. Two pads are used.
# - 4PAD, (2): Quad mode. Four pads are used.
# - 8PAD, (3): Octal mode. Eight pads are used.
# Possible options: <1PAD, 2PAD, 4PAD, 8PAD>
NUM_PADS: 1PAD
# --------------------------------------===== OPERATION_CODE [Optional] =====---------------------------------------
# Description: Offset: 10b, Width: 6b, Instruction operation code.
# - STOP, (0): Stop execution and de-assert CS. Then, the next command sequence (to the same flash device) starts
# from instruction pointer 0.
# - CMD_SDR, (1): Transmit command code to Flash.
# - RADDR_SDR, (2): Transmit row address to Flash.
# - CADDR_SDR, (3): Transmit column address to Flash.
# - MODE1_SDR, (4): Transmit mode bits to Flash.
# - MODE2_SDR, (5): Transmit mode bits to Flash.
# - MODE4_SDR, (6): Transmit mode bits to Flash.
# - MODE8_SDR, (7): Transmit mode bits to Flash.
# - WRITE_SDR, (8): Transmit program data to Flash device.
# - READ_SDR, (9): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_SDR, (10): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_SDR, (11): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_SDR, (12): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_SDR, (13): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# - JMP_ON_CS, (31): Stop execution, de-assert CS and save operand[7:0] as the instruction start pointer for next
# sequence.Normally this instruction is used to support Execute-In-Place enhanced mode. See XIP enhanced mode for
# more details.This instruction is only allowed for AHB read commands. There is interrupt status bit set
# (INTR[IPCMDERR] or INTR[AHBCMDERR]) when using this instruction in IP command or AHB write command.
# - CMD_DDR, (33): Transmit command code to Flash.
# - RADDR_DDR, (34): Transmit row address to Flash.
# - CADDR_DDR, (35): Transmit column address to Flash.
# - MODE1_DDR, (36): Transmit mode bits to Flash.
# - MODE2_DDR, (37): Transmit mode bits to Flash.
# - MODE4_DDR, (38): Transmit mode bits to Flash.
# - MODE8_DDR, (39): Transmit mode bits to Flash.
# - WRITE_DDR, (40): Transmit program data to Flash device.
# - READ_DDR, (41): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_DDR, (42): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_DDR, (43): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_DDR, (44): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_DDR, (45): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# Possible options: <STOP, CMD_SDR, RADDR_SDR, CADDR_SDR, MODE1_SDR, MODE2_SDR, MODE4_SDR, MODE8_SDR, WRITE_SDR,
# READ_SDR, LEARN_SDR, DATSZ_SDR, DUMMY_SDR, DUMMY_RWDS_SDR, JMP_ON_CS, CMD_DDR, RADDR_DDR, CADDR_DDR, MODE1_DDR,
# MODE2_DDR, MODE4_DDR, MODE8_DDR, WRITE_DDR, READ_DDR, LEARN_DDR, DATSZ_DDR, DUMMY_DDR, DUMMY_RWDS_DDR>
OPERATION_CODE: STOP
lookupTable_seq13_instr1:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq13_instr2:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq13_instr3:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq13_instr4:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq13_instr5:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq13_instr6:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq13_instr7:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
# ----------------------------------===== lookupTable_seq14_instr0 [Optional] =====-----------------------------------
# Description: Offset: 0x00000160, Width: 16b; Lookup table holds Flash command sequences 14, instruction 0
lookupTable_seq14_instr0:
# ------------------------------------------===== OPERAND [Optional] =====------------------------------------------
# Description: Offset: 0b, Width: 8b, Instruction operand. Its values depends on used instruction
OPERAND: 0
# -----------------------------------------===== NUM_PADS [Optional] =====------------------------------------------
# Description: Offset: 8b, Width: 2b, Number of pads used by instruction. Some instructions ignores this parameter.
# - 1PAD, (0): Single mode. One pad is used.
# - 2PAD, (1): Dual mode. Two pads are used.
# - 4PAD, (2): Quad mode. Four pads are used.
# - 8PAD, (3): Octal mode. Eight pads are used.
# Possible options: <1PAD, 2PAD, 4PAD, 8PAD>
NUM_PADS: 1PAD
# --------------------------------------===== OPERATION_CODE [Optional] =====---------------------------------------
# Description: Offset: 10b, Width: 6b, Instruction operation code.
# - STOP, (0): Stop execution and de-assert CS. Then, the next command sequence (to the same flash device) starts
# from instruction pointer 0.
# - CMD_SDR, (1): Transmit command code to Flash.
# - RADDR_SDR, (2): Transmit row address to Flash.
# - CADDR_SDR, (3): Transmit column address to Flash.
# - MODE1_SDR, (4): Transmit mode bits to Flash.
# - MODE2_SDR, (5): Transmit mode bits to Flash.
# - MODE4_SDR, (6): Transmit mode bits to Flash.
# - MODE8_SDR, (7): Transmit mode bits to Flash.
# - WRITE_SDR, (8): Transmit program data to Flash device.
# - READ_SDR, (9): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_SDR, (10): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_SDR, (11): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_SDR, (12): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_SDR, (13): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# - JMP_ON_CS, (31): Stop execution, de-assert CS and save operand[7:0] as the instruction start pointer for next
# sequence.Normally this instruction is used to support Execute-In-Place enhanced mode. See XIP enhanced mode for
# more details.This instruction is only allowed for AHB read commands. There is interrupt status bit set
# (INTR[IPCMDERR] or INTR[AHBCMDERR]) when using this instruction in IP command or AHB write command.
# - CMD_DDR, (33): Transmit command code to Flash.
# - RADDR_DDR, (34): Transmit row address to Flash.
# - CADDR_DDR, (35): Transmit column address to Flash.
# - MODE1_DDR, (36): Transmit mode bits to Flash.
# - MODE2_DDR, (37): Transmit mode bits to Flash.
# - MODE4_DDR, (38): Transmit mode bits to Flash.
# - MODE8_DDR, (39): Transmit mode bits to Flash.
# - WRITE_DDR, (40): Transmit program data to Flash device.
# - READ_DDR, (41): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_DDR, (42): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_DDR, (43): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_DDR, (44): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_DDR, (45): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# Possible options: <STOP, CMD_SDR, RADDR_SDR, CADDR_SDR, MODE1_SDR, MODE2_SDR, MODE4_SDR, MODE8_SDR, WRITE_SDR,
# READ_SDR, LEARN_SDR, DATSZ_SDR, DUMMY_SDR, DUMMY_RWDS_SDR, JMP_ON_CS, CMD_DDR, RADDR_DDR, CADDR_DDR, MODE1_DDR,
# MODE2_DDR, MODE4_DDR, MODE8_DDR, WRITE_DDR, READ_DDR, LEARN_DDR, DATSZ_DDR, DUMMY_DDR, DUMMY_RWDS_DDR>
OPERATION_CODE: STOP
lookupTable_seq14_instr1:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq14_instr2:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq14_instr3:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq14_instr4:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq14_instr5:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq14_instr6:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq14_instr7:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
# ----------------------------------===== lookupTable_seq15_instr0 [Optional] =====-----------------------------------
# Description: Offset: 0x00000170, Width: 16b; Lookup table holds Flash command sequences 15, instruction 0
lookupTable_seq15_instr0:
# ------------------------------------------===== OPERAND [Optional] =====------------------------------------------
# Description: Offset: 0b, Width: 8b, Instruction operand. Its values depends on used instruction
OPERAND: 0
# -----------------------------------------===== NUM_PADS [Optional] =====------------------------------------------
# Description: Offset: 8b, Width: 2b, Number of pads used by instruction. Some instructions ignores this parameter.
# - 1PAD, (0): Single mode. One pad is used.
# - 2PAD, (1): Dual mode. Two pads are used.
# - 4PAD, (2): Quad mode. Four pads are used.
# - 8PAD, (3): Octal mode. Eight pads are used.
# Possible options: <1PAD, 2PAD, 4PAD, 8PAD>
NUM_PADS: 1PAD
# --------------------------------------===== OPERATION_CODE [Optional] =====---------------------------------------
# Description: Offset: 10b, Width: 6b, Instruction operation code.
# - STOP, (0): Stop execution and de-assert CS. Then, the next command sequence (to the same flash device) starts
# from instruction pointer 0.
# - CMD_SDR, (1): Transmit command code to Flash.
# - RADDR_SDR, (2): Transmit row address to Flash.
# - CADDR_SDR, (3): Transmit column address to Flash.
# - MODE1_SDR, (4): Transmit mode bits to Flash.
# - MODE2_SDR, (5): Transmit mode bits to Flash.
# - MODE4_SDR, (6): Transmit mode bits to Flash.
# - MODE8_SDR, (7): Transmit mode bits to Flash.
# - WRITE_SDR, (8): Transmit program data to Flash device.
# - READ_SDR, (9): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_SDR, (10): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_SDR, (11): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_SDR, (12): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_SDR, (13): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# - JMP_ON_CS, (31): Stop execution, de-assert CS and save operand[7:0] as the instruction start pointer for next
# sequence.Normally this instruction is used to support Execute-In-Place enhanced mode. See XIP enhanced mode for
# more details.This instruction is only allowed for AHB read commands. There is interrupt status bit set
# (INTR[IPCMDERR] or INTR[AHBCMDERR]) when using this instruction in IP command or AHB write command.
# - CMD_DDR, (33): Transmit command code to Flash.
# - RADDR_DDR, (34): Transmit row address to Flash.
# - CADDR_DDR, (35): Transmit column address to Flash.
# - MODE1_DDR, (36): Transmit mode bits to Flash.
# - MODE2_DDR, (37): Transmit mode bits to Flash.
# - MODE4_DDR, (38): Transmit mode bits to Flash.
# - MODE8_DDR, (39): Transmit mode bits to Flash.
# - WRITE_DDR, (40): Transmit program data to Flash device.
# - READ_DDR, (41): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_DDR, (42): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_DDR, (43): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_DDR, (44): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_DDR, (45): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# Possible options: <STOP, CMD_SDR, RADDR_SDR, CADDR_SDR, MODE1_SDR, MODE2_SDR, MODE4_SDR, MODE8_SDR, WRITE_SDR,
# READ_SDR, LEARN_SDR, DATSZ_SDR, DUMMY_SDR, DUMMY_RWDS_SDR, JMP_ON_CS, CMD_DDR, RADDR_DDR, CADDR_DDR, MODE1_DDR,
# MODE2_DDR, MODE4_DDR, MODE8_DDR, WRITE_DDR, READ_DDR, LEARN_DDR, DATSZ_DDR, DUMMY_DDR, DUMMY_RWDS_DDR>
OPERATION_CODE: STOP
lookupTable_seq15_instr1:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq15_instr2:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq15_instr3:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq15_instr4:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq15_instr5:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq15_instr6:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq15_instr7:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
# ---------------------------------------===== lutCustomSeq_0 [Optional] =====----------------------------------------
# Description: Offset: 0x00000180, Width: 32b; [0x180-0x1af] Customizable LUT Sequences
lutCustomSeq_0:
# ------------------------------------------===== seqNum [Optional] =====-------------------------------------------
# Description: Offset: 0b, Width: 8b, Sequence Number, valid number: 1-16
seqNum: 0
# -------------------------------------------===== seqId [Optional] =====-------------------------------------------
# Description: Offset: 8b, Width: 8b, Sequence Index, valid number: 0-15
seqId: 0
# -----------------------------------------===== reserved [Optional] =====------------------------------------------
# Description: Offset: 16b, Width: 16b, N/A
reserved: 0
# ---------------------------------------===== lutCustomSeq_1 [Optional] =====----------------------------------------
# Description: Offset: 0x00000184, Width: 32b; [0x180-0x1af] Customizable LUT Sequences
lutCustomSeq_1:
# ------------------------------------------===== seqNum [Optional] =====-------------------------------------------
# Description: Offset: 0b, Width: 8b, Sequence Number, valid number: 1-16
seqNum: 0
# -------------------------------------------===== seqId [Optional] =====-------------------------------------------
# Description: Offset: 8b, Width: 8b, Sequence Index, valid number: 0-15
seqId: 0
# -----------------------------------------===== reserved [Optional] =====------------------------------------------
# Description: Offset: 16b, Width: 16b, N/A
reserved: 0
# ---------------------------------------===== lutCustomSeq_2 [Optional] =====----------------------------------------
# Description: Offset: 0x00000188, Width: 32b; [0x180-0x1af] Customizable LUT Sequences
lutCustomSeq_2:
# ------------------------------------------===== seqNum [Optional] =====-------------------------------------------
# Description: Offset: 0b, Width: 8b, Sequence Number, valid number: 1-16
seqNum: 0
# -------------------------------------------===== seqId [Optional] =====-------------------------------------------
# Description: Offset: 8b, Width: 8b, Sequence Index, valid number: 0-15
seqId: 0
# -----------------------------------------===== reserved [Optional] =====------------------------------------------
# Description: Offset: 16b, Width: 16b, N/A
reserved: 0
# ---------------------------------------===== lutCustomSeq_3 [Optional] =====----------------------------------------
# Description: Offset: 0x0000018C, Width: 32b; [0x180-0x1af] Customizable LUT Sequences
lutCustomSeq_3:
# ------------------------------------------===== seqNum [Optional] =====-------------------------------------------
# Description: Offset: 0b, Width: 8b, Sequence Number, valid number: 1-16
seqNum: 0
# -------------------------------------------===== seqId [Optional] =====-------------------------------------------
# Description: Offset: 8b, Width: 8b, Sequence Index, valid number: 0-15
seqId: 0
# -----------------------------------------===== reserved [Optional] =====------------------------------------------
# Description: Offset: 16b, Width: 16b, N/A
reserved: 0
# ---------------------------------------===== lutCustomSeq_4 [Optional] =====----------------------------------------
# Description: Offset: 0x00000190, Width: 32b; [0x180-0x1af] Customizable LUT Sequences
lutCustomSeq_4:
# ------------------------------------------===== seqNum [Optional] =====-------------------------------------------
# Description: Offset: 0b, Width: 8b, Sequence Number, valid number: 1-16
seqNum: 0
# -------------------------------------------===== seqId [Optional] =====-------------------------------------------
# Description: Offset: 8b, Width: 8b, Sequence Index, valid number: 0-15
seqId: 0
# -----------------------------------------===== reserved [Optional] =====------------------------------------------
# Description: Offset: 16b, Width: 16b, N/A
reserved: 0
# ---------------------------------------===== lutCustomSeq_5 [Optional] =====----------------------------------------
# Description: Offset: 0x00000194, Width: 32b; [0x180-0x1af] Customizable LUT Sequences
lutCustomSeq_5:
# ------------------------------------------===== seqNum [Optional] =====-------------------------------------------
# Description: Offset: 0b, Width: 8b, Sequence Number, valid number: 1-16
seqNum: 0
# -------------------------------------------===== seqId [Optional] =====-------------------------------------------
# Description: Offset: 8b, Width: 8b, Sequence Index, valid number: 0-15
seqId: 0
# -----------------------------------------===== reserved [Optional] =====------------------------------------------
# Description: Offset: 16b, Width: 16b, N/A
reserved: 0
# ---------------------------------------===== lutCustomSeq_6 [Optional] =====----------------------------------------
# Description: Offset: 0x00000198, Width: 32b; [0x180-0x1af] Customizable LUT Sequences
lutCustomSeq_6:
# ------------------------------------------===== seqNum [Optional] =====-------------------------------------------
# Description: Offset: 0b, Width: 8b, Sequence Number, valid number: 1-16
seqNum: 0
# -------------------------------------------===== seqId [Optional] =====-------------------------------------------
# Description: Offset: 8b, Width: 8b, Sequence Index, valid number: 0-15
seqId: 0
# -----------------------------------------===== reserved [Optional] =====------------------------------------------
# Description: Offset: 16b, Width: 16b, N/A
reserved: 0
# ---------------------------------------===== lutCustomSeq_7 [Optional] =====----------------------------------------
# Description: Offset: 0x0000019C, Width: 32b; [0x180-0x1af] Customizable LUT Sequences
lutCustomSeq_7:
# ------------------------------------------===== seqNum [Optional] =====-------------------------------------------
# Description: Offset: 0b, Width: 8b, Sequence Number, valid number: 1-16
seqNum: 0
# -------------------------------------------===== seqId [Optional] =====-------------------------------------------
# Description: Offset: 8b, Width: 8b, Sequence Index, valid number: 0-15
seqId: 0
# -----------------------------------------===== reserved [Optional] =====------------------------------------------
# Description: Offset: 16b, Width: 16b, N/A
reserved: 0
# ---------------------------------------===== lutCustomSeq_8 [Optional] =====----------------------------------------
# Description: Offset: 0x000001A0, Width: 32b; [0x180-0x1af] Customizable LUT Sequences
lutCustomSeq_8:
# ------------------------------------------===== seqNum [Optional] =====-------------------------------------------
# Description: Offset: 0b, Width: 8b, Sequence Number, valid number: 1-16
seqNum: 0
# -------------------------------------------===== seqId [Optional] =====-------------------------------------------
# Description: Offset: 8b, Width: 8b, Sequence Index, valid number: 0-15
seqId: 0
# -----------------------------------------===== reserved [Optional] =====------------------------------------------
# Description: Offset: 16b, Width: 16b, N/A
reserved: 0
# ---------------------------------------===== lutCustomSeq_9 [Optional] =====----------------------------------------
# Description: Offset: 0x000001A4, Width: 32b; [0x180-0x1af] Customizable LUT Sequences
lutCustomSeq_9:
# ------------------------------------------===== seqNum [Optional] =====-------------------------------------------
# Description: Offset: 0b, Width: 8b, Sequence Number, valid number: 1-16
seqNum: 0
# -------------------------------------------===== seqId [Optional] =====-------------------------------------------
# Description: Offset: 8b, Width: 8b, Sequence Index, valid number: 0-15
seqId: 0
# -----------------------------------------===== reserved [Optional] =====------------------------------------------
# Description: Offset: 16b, Width: 16b, N/A
reserved: 0
# ---------------------------------------===== lutCustomSeq_10 [Optional] =====---------------------------------------
# Description: Offset: 0x000001A8, Width: 32b; [0x180-0x1af] Customizable LUT Sequences
lutCustomSeq_10:
# ------------------------------------------===== seqNum [Optional] =====-------------------------------------------
# Description: Offset: 0b, Width: 8b, Sequence Number, valid number: 1-16
seqNum: 0
# -------------------------------------------===== seqId [Optional] =====-------------------------------------------
# Description: Offset: 8b, Width: 8b, Sequence Index, valid number: 0-15
seqId: 0
# -----------------------------------------===== reserved [Optional] =====------------------------------------------
# Description: Offset: 16b, Width: 16b, N/A
reserved: 0
# ---------------------------------------===== lutCustomSeq_11 [Optional] =====---------------------------------------
# Description: Offset: 0x000001AC, Width: 32b; [0x180-0x1af] Customizable LUT Sequences
lutCustomSeq_11:
# ------------------------------------------===== seqNum [Optional] =====-------------------------------------------
# Description: Offset: 0b, Width: 8b, Sequence Number, valid number: 1-16
seqNum: 0
# -------------------------------------------===== seqId [Optional] =====-------------------------------------------
# Description: Offset: 8b, Width: 8b, Sequence Index, valid number: 0-15
seqId: 0
# -----------------------------------------===== reserved [Optional] =====------------------------------------------
# Description: Offset: 16b, Width: 16b, N/A
reserved: 0
# -----------------------------------------===== reserved4_0 [Optional] =====-----------------------------------------
# Description: Offset: 0x000001B0, Width: 32b; [0x1b0-0x1bf] Reserved for future use
reserved4_0: '0x00000000'
# -----------------------------------------===== reserved4_1 [Optional] =====-----------------------------------------
# Description: Offset: 0x000001B4, Width: 32b; [0x1b0-0x1bf] Reserved for future use
reserved4_1: '0x00000000'
# -----------------------------------------===== reserved4_2 [Optional] =====-----------------------------------------
# Description: Offset: 0x000001B8, Width: 32b; [0x1b0-0x1bf] Reserved for future use
reserved4_2: '0x00000000'
# -----------------------------------------===== reserved4_3 [Optional] =====-----------------------------------------
# Description: Offset: 0x000001BC, Width: 32b; [0x1b0-0x1bf] Reserved for future use
reserved4_3: '0x00000000'
# ------------------------------------------===== pageSize [Optional] =====-------------------------------------------
# Description: Offset: 0x000001C0, Width: 32b; Page size of Serial NOR
pageSize: '0x00000000'
# -----------------------------------------===== sectorSize [Optional] =====------------------------------------------
# Description: Offset: 0x000001C4, Width: 32b; Sector size of Serial NOR
sectorSize: '0x00000000'
# -------------------------------------===== ipcmdSerialClkFreq [Optional] =====--------------------------------------
# Description: Offset: 0x000001C8, Width: 8b; Clock frequency for IP command
ipcmdSerialClkFreq: '0x00'
# -------------------------------------===== isUniformBlockSize [Optional] =====--------------------------------------
# Description: Offset: 0x000001C9, Width: 8b; Sector/Block size is the same
isUniformBlockSize: '0x00'
# -------------------------------------===== isDataOrderSwapped [Optional] =====--------------------------------------
# Description: Offset: 0x000001CA, Width: 8b; Data order (D0, D1, D2, D3) is swapped (D1,D0, D3, D2)
isDataOrderSwapped: '0x00'
# -----------------------------------------===== reserved0_0 [Optional] =====-----------------------------------------
# Description: Offset: 0x000001CB, Width: 8b; Reserved for future use
reserved0_0: '0x00'
# ----------------------------------------===== serialNorType [Optional] =====----------------------------------------
# Description: Offset: 0x000001CC, Width: 8b; Serial NOR Flash type: 0/1/2/3
serialNorType: '0x00'
# --------------------------------------===== needExitNoCmdMode [Optional] =====--------------------------------------
# Description: Offset: 0x000001CD, Width: 8b; Need to exit NoCmd mode before other IP command
needExitNoCmdMode: '0x00'
# ------------------------------------===== halfClkForNonReadCmd [Optional] =====-------------------------------------
# Description: Offset: 0x000001CE, Width: 8b; Half the Serial Clock for non-read command: true/false
halfClkForNonReadCmd: '0x00'
# ------------------------------------===== needRestoreNoCmdMode [Optional] =====-------------------------------------
# Description: Offset: 0x000001CF, Width: 8b; Need to Restore NoCmd mode after IP command execution
needRestoreNoCmdMode: '0x00'
# ------------------------------------------===== blockSize [Optional] =====------------------------------------------
# Description: Offset: 0x000001D0, Width: 32b; Block size
blockSize: '0x00000000'
# ----------------------------------------===== flashStateCtx [Optional] =====----------------------------------------
# Description: Offset: 0x000001D4, Width: 32b; Flash State Context
flashStateCtx: '0x00000000'
# -----------------------------------------===== reserve2_0 [Optional] =====------------------------------------------
# Description: Offset: 0x000001D8, Width: 32b; Reserved for future use
reserve2_0: '0x00000000'
# -----------------------------------------===== reserve2_1 [Optional] =====------------------------------------------
# Description: Offset: 0x000001DC, Width: 32b; Reserved for future use
reserve2_1: '0x00000000'
# -----------------------------------------===== reserve2_2 [Optional] =====------------------------------------------
# Description: Offset: 0x000001E0, Width: 32b; Reserved for future use
reserve2_2: '0x00000000'
# -----------------------------------------===== reserve2_3 [Optional] =====------------------------------------------
# Description: Offset: 0x000001E4, Width: 32b; Reserved for future use
reserve2_3: '0x00000000'
# -----------------------------------------===== reserve2_4 [Optional] =====------------------------------------------
# Description: Offset: 0x000001E8, Width: 32b; Reserved for future use
reserve2_4: '0x00000000'
# -----------------------------------------===== reserve2_5 [Optional] =====------------------------------------------
# Description: Offset: 0x000001EC, Width: 32b; Reserved for future use
reserve2_5: '0x00000000'
# -----------------------------------------===== reserve2_6 [Optional] =====------------------------------------------
# Description: Offset: 0x000001F0, Width: 32b; Reserved for future use
reserve2_6: '0x00000000'
# -----------------------------------------===== reserve2_7 [Optional] =====------------------------------------------
# Description: Offset: 0x000001F4, Width: 32b; Reserved for future use
reserve2_7: '0x00000000'
# -----------------------------------------===== reserve2_8 [Optional] =====------------------------------------------
# Description: Offset: 0x000001F8, Width: 32b; Reserved for future use
reserve2_8: '0x00000000'
# -----------------------------------------===== reserve2_9 [Optional] =====------------------------------------------
# Description: Offset: 0x000001FC, Width: 32b; Reserved for future use
reserve2_9: '0x00000000'
FCB for lpc55s36, Revision: a1 and flexspi_nor#
FCB for lpc55s36, Revision: a1 and flexspi_nor JSON schema
FCB for lpc55s36, Revision: a1 and flexspi_nor YAML configuration template
# ================================== FCB for lpc55s36, Revision: a1 and flexspi_nor ==================================
# ======================================================================================================================
# == FCB for lpc55s36, Revision: a1 and flexspi_nor ==
# ======================================================================================================================
# -------------------------------------===== The chip family name [Required] =====--------------------------------------
# Description: NXP chip family identifier.
family: CHOOSE_FROM_TABLE
# -----------------------------------------===== MCU revision [Optional] =====------------------------------------------
# Description: Revision of silicon. The 'latest' name, means most current revision.
# Possible options: <a0, a1, latest>
revision: a1
# ------------------------------------------===== Memory type [Required] =====------------------------------------------
# Description: Specify type of memory used by FCB description.
# Possible options: <flexspi_nor>
type: flexspi_nor
# -------------------------------------------===== lpc55s36 [Required] =====--------------------------------------------
fcb_settings:
# ---------------------------------------------===== tag [Optional] =====---------------------------------------------
# Description: Offset: 0x00000000, Width: 32b; [0x000-0x003] Tag, fixed value 0x42464346UL
tag: '0x42464346'
# -------------------------------------------===== version [Optional] =====-------------------------------------------
# Description: Offset: 0x00000004, Width: 32b; [0x004-0x007] Version,[31:24] -'V', [23:16] - Major, [15:8] - Minor,
# [7:0] - bugfix
version: '0x56010400'
# ------------------------------------------===== reserved0 [Optional] =====------------------------------------------
# Description: Offset: 0x00000008, Width: 32b; [0x008-0x00b] Reserved for future use
reserved0: '0x00000000'
# --------------------------------------===== readSampleClkSrc [Optional] =====---------------------------------------
# Description: Offset: 0x0000000C, Width: 8b; [0x00c-0x00c] Read Sample Clock Source, valid value: 0/1/3
readSampleClkSrc: '0x00'
# -----------------------------------------===== csHoldTime [Optional] =====------------------------------------------
# Description: Offset: 0x0000000D, Width: 8b; [0x00d-0x00d] CS hold time, default value: 3
csHoldTime: '0x00'
# -----------------------------------------===== csSetupTime [Optional] =====-----------------------------------------
# Description: Offset: 0x0000000E, Width: 8b; [0x00e-0x00e] CS setup time, default value: 3
csSetupTime: '0x00'
# -------------------------------------===== columnAddressWidth [Optional] =====--------------------------------------
# Description: Offset: 0x0000000F, Width: 8b; [0x00f-0x00f] Column Address with, for HyperBus protocol, it is fixed
# to 3, For Serial NAND, need to refer to datasheet
columnAddressWidth: '0x00'
# -------------------------------------===== deviceModeCfgEnable [Optional] =====-------------------------------------
# Description: Offset: 0x00000010, Width: 8b; [0x010-0x010] Device Mode Configure enable flag, 1 - Enable, 0 -
# Disable
deviceModeCfgEnable: '0x00'
# ---------------------------------------===== deviceModeType [Optional] =====----------------------------------------
# Description: Offset: 0x00000011, Width: 8b; [0x011-0x011] Specify the configuration command type:Quad Enable,
# DPI/QPI/OPI switch, Generic configuration, etc.
deviceModeType: '0x00'
# -------------------------------------===== waitTimeCfgCommands [Optional] =====-------------------------------------
# Description: Offset: 0x00000012, Width: 16b; [0x012-0x013] Wait time for all configuration commands, unit: 100us,
# Used for DPI/QPI/OPI switch or reset command
waitTimeCfgCommands: '0x0000'
# ----------------------------------------===== deviceModeSeq [Optional] =====----------------------------------------
# Description: Offset: 0x00000014, Width: 32b; [0x014-0x017] Device mode sequence info, [7:0] - LUT sequence id,
# [15:8] - LUt sequence number, [31:16] Reserved
deviceModeSeq:
# ------------------------------------------===== seqNum [Optional] =====-------------------------------------------
# Description: Offset: 0b, Width: 8b, Sequence Number, valid number: 1-16
seqNum: 0
# -------------------------------------------===== seqId [Optional] =====-------------------------------------------
# Description: Offset: 8b, Width: 8b, Sequence Index, valid number: 0-15
seqId: 0
# -----------------------------------------===== reserved [Optional] =====------------------------------------------
# Description: Offset: 16b, Width: 16b, N/A
reserved: 0
# ----------------------------------------===== deviceModeArg [Optional] =====----------------------------------------
# Description: Offset: 0x00000018, Width: 32b; [0x018-0x01b] Argument/Parameter for device configuration
deviceModeArg: '0x00000000'
# ---------------------------------------===== configCmdEnable [Optional] =====---------------------------------------
# Description: Offset: 0x0000001C, Width: 8b; [0x01c-0x01c] Configure command Enable Flag, 1 - Enable, 0 - Disable
configCmdEnable: '0x00'
# --------------------------------------===== configModeType_0 [Optional] =====---------------------------------------
# Description: Offset: 0x0000001D, Width: 8b; [0x01d-0x01f] Configure Mode Type, similar as deviceModeTpe
configModeType_0: '0x00'
# --------------------------------------===== configModeType_1 [Optional] =====---------------------------------------
# Description: Offset: 0x0000001E, Width: 8b; [0x01d-0x01f] Configure Mode Type, similar as deviceModeTpe
configModeType_1: '0x00'
# --------------------------------------===== configModeType_2 [Optional] =====---------------------------------------
# Description: Offset: 0x0000001F, Width: 8b; [0x01d-0x01f] Configure Mode Type, similar as deviceModeTpe
configModeType_2: '0x00'
# ---------------------------------------===== configCmdSeqs_0 [Optional] =====---------------------------------------
# Description: Offset: 0x00000020, Width: 32b; [0x020-0x02b] Sequence info for Device Configuration command, similar
# as deviceModeSeq
configCmdSeqs_0:
# ------------------------------------------===== seqNum [Optional] =====-------------------------------------------
# Description: Offset: 0b, Width: 8b, Sequence Number, valid number: 1-16
seqNum: 0
# -------------------------------------------===== seqId [Optional] =====-------------------------------------------
# Description: Offset: 8b, Width: 8b, Sequence Index, valid number: 0-15
seqId: 0
# -----------------------------------------===== reserved [Optional] =====------------------------------------------
# Description: Offset: 16b, Width: 16b, N/A
reserved: 0
# ---------------------------------------===== configCmdSeqs_1 [Optional] =====---------------------------------------
# Description: Offset: 0x00000024, Width: 32b; [0x020-0x02b] Sequence info for Device Configuration command, similar
# as deviceModeSeq
configCmdSeqs_1:
# ------------------------------------------===== seqNum [Optional] =====-------------------------------------------
# Description: Offset: 0b, Width: 8b, Sequence Number, valid number: 1-16
seqNum: 0
# -------------------------------------------===== seqId [Optional] =====-------------------------------------------
# Description: Offset: 8b, Width: 8b, Sequence Index, valid number: 0-15
seqId: 0
# -----------------------------------------===== reserved [Optional] =====------------------------------------------
# Description: Offset: 16b, Width: 16b, N/A
reserved: 0
# ---------------------------------------===== configCmdSeqs_2 [Optional] =====---------------------------------------
# Description: Offset: 0x00000028, Width: 32b; [0x020-0x02b] Sequence info for Device Configuration command, similar
# as deviceModeSeq
configCmdSeqs_2:
# ------------------------------------------===== seqNum [Optional] =====-------------------------------------------
# Description: Offset: 0b, Width: 8b, Sequence Number, valid number: 1-16
seqNum: 0
# -------------------------------------------===== seqId [Optional] =====-------------------------------------------
# Description: Offset: 8b, Width: 8b, Sequence Index, valid number: 0-15
seqId: 0
# -----------------------------------------===== reserved [Optional] =====------------------------------------------
# Description: Offset: 16b, Width: 16b, N/A
reserved: 0
# ------------------------------------------===== reserved1 [Optional] =====------------------------------------------
# Description: Offset: 0x0000002C, Width: 32b; [0x02c-0x02f] Reserved for future use
reserved1: '0x00000000'
# ---------------------------------------===== configCmdArgs_0 [Optional] =====---------------------------------------
# Description: Offset: 0x00000030, Width: 32b; [0x030-0x03b] Arguments/Parameters for device Configuration commands
configCmdArgs_0: '0x00000000'
# ---------------------------------------===== configCmdArgs_1 [Optional] =====---------------------------------------
# Description: Offset: 0x00000034, Width: 32b; [0x030-0x03b] Arguments/Parameters for device Configuration commands
configCmdArgs_1: '0x00000000'
# ---------------------------------------===== configCmdArgs_2 [Optional] =====---------------------------------------
# Description: Offset: 0x00000038, Width: 32b; [0x030-0x03b] Arguments/Parameters for device Configuration commands
configCmdArgs_2: '0x00000000'
# ------------------------------------------===== reserved2 [Optional] =====------------------------------------------
# Description: Offset: 0x0000003C, Width: 32b; [0x03c-0x03f] Reserved for future use
reserved2: '0x00000000'
# ------------------------------------===== controllerMiscOption [Optional] =====-------------------------------------
# Description: Offset: 0x00000040, Width: 32b; [0x040-0x043] Controller Misc Options, see Misc feature bit
# definitions for more details
controllerMiscOption: '0x00000000'
# -----------------------------------------===== deviceType [Optional] =====------------------------------------------
# Description: Offset: 0x00000044, Width: 8b; [0x044-0x044] Device Type: See Flash Type Definition for more details
deviceType: '0x00'
# ----------------------------------------===== sflashPadType [Optional] =====----------------------------------------
# Description: Offset: 0x00000045, Width: 8b; [0x045-0x045] Serial Flash Pad Type: 1 - Single, 2 - Dual, 4 - Quad, 8
# - Octal
sflashPadType: '0x00'
# ----------------------------------------===== serialClkFreq [Optional] =====----------------------------------------
# Description: Offset: 0x00000046, Width: 8b; [0x046-0x046] Serial Flash Frequency, device specific definitions, See
# System Boot Chapter for more details
serialClkFreq: '0x00'
# -------------------------------------===== lutCustomSeqEnable [Optional] =====--------------------------------------
# Description: Offset: 0x00000047, Width: 8b; [0x047-0x047] LUT customization Enable, it is required if the
# program/erase cannot be done using 1 LUT sequence, currently, only applicable to HyperFLASH
lutCustomSeqEnable: '0x00'
# -----------------------------------------===== reserved3_0 [Optional] =====-----------------------------------------
# Description: Offset: 0x00000048, Width: 32b; [0x048-0x04f] Reserved for future use
reserved3_0: '0x00000000'
# -----------------------------------------===== reserved3_1 [Optional] =====-----------------------------------------
# Description: Offset: 0x0000004C, Width: 32b; [0x048-0x04f] Reserved for future use
reserved3_1: '0x00000000'
# ----------------------------------------===== sflashA1Size [Optional] =====-----------------------------------------
# Description: Offset: 0x00000050, Width: 32b; [0x050-0x053] Size of Flash connected to A1
sflashA1Size: '0x00000000'
# ----------------------------------------===== sflashA2Size [Optional] =====-----------------------------------------
# Description: Offset: 0x00000054, Width: 32b; [0x054-0x057] Size of Flash connected to A2
sflashA2Size: '0x00000000'
# ----------------------------------------===== sflashB1Size [Optional] =====-----------------------------------------
# Description: Offset: 0x00000058, Width: 32b; [0x058-0x05b] Size of Flash connected to B1
sflashB1Size: '0x00000000'
# ----------------------------------------===== sflashB2Size [Optional] =====-----------------------------------------
# Description: Offset: 0x0000005C, Width: 32b; [0x05c-0x05f] Size of Flash connected to B2
sflashB2Size: '0x00000000'
# ------------------------------------===== csPadSettingOverride [Optional] =====-------------------------------------
# Description: Offset: 0x00000060, Width: 32b; [0x060-0x063] CS pad setting override value
csPadSettingOverride: '0x00000000'
# -----------------------------------===== sclkPadSettingOverride [Optional] =====------------------------------------
# Description: Offset: 0x00000064, Width: 32b; [0x064-0x067] SCK pad setting override value
sclkPadSettingOverride: '0x00000000'
# -----------------------------------===== dataPadSettingOverride [Optional] =====------------------------------------
# Description: Offset: 0x00000068, Width: 32b; [0x068-0x06b] data pad setting override value
dataPadSettingOverride: '0x00000000'
# ------------------------------------===== dqsPadSettingOverride [Optional] =====------------------------------------
# Description: Offset: 0x0000006C, Width: 32b; [0x06c-0x06f] DQS pad setting override value
dqsPadSettingOverride: '0x00000000'
# -----------------------------------------===== timeoutInMs [Optional] =====-----------------------------------------
# Description: Offset: 0x00000070, Width: 32b; [0x070-0x073] Timeout threshold for read status command
timeoutInMs: '0x00000000'
# ---------------------------------------===== commandInterval [Optional] =====---------------------------------------
# Description: Offset: 0x00000074, Width: 32b; [0x074-0x077] CS deselect interval between two commands
commandInterval: '0x00000000'
# ---------------------------------------===== dataValidTime_0 [Optional] =====---------------------------------------
# Description: Offset: 0x00000078, Width: 16b; [0x078-0x07b] CLK edge to data valid time for PORT A and PORT B
dataValidTime_0:
# ----------------------------------------===== time_100ps [Optional] =====-----------------------------------------
# Description: Offset: 0b, Width: 8b, Data valid time, in terms of 100ps
time_100ps: 0
# ----------------------------------------===== delay_cells [Optional] =====----------------------------------------
# Description: Offset: 8b, Width: 8b, Data valid time, in terms of delay cells
delay_cells: 0
# ---------------------------------------===== dataValidTime_1 [Optional] =====---------------------------------------
# Description: Offset: 0x0000007A, Width: 16b; [0x078-0x07b] CLK edge to data valid time for PORT A and PORT B
dataValidTime_1:
# ----------------------------------------===== time_100ps [Optional] =====-----------------------------------------
# Description: Offset: 0b, Width: 8b, Data valid time, in terms of 100ps
time_100ps: 0
# ----------------------------------------===== delay_cells [Optional] =====----------------------------------------
# Description: Offset: 8b, Width: 8b, Data valid time, in terms of delay cells
delay_cells: 0
# -----------------------------------------===== busyOffset [Optional] =====------------------------------------------
# Description: Offset: 0x0000007C, Width: 16b; [0x07c-0x07d] Busy offset, valid value: 0-31
busyOffset: '0x0000'
# ---------------------------------------===== busyBitPolarity [Optional] =====---------------------------------------
# Description: Offset: 0x0000007E, Width: 16b; [0x07e-0x07f] Busy flag polarity, 0 - busy flag is 1 when flash device
# is busy, 1 - busy flag is 0 when flash device is busy
busyBitPolarity: '0x0000'
# -----------------------------------===== lookupTable_seq0_instr0 [Optional] =====-----------------------------------
# Description: Offset: 0x00000080, Width: 16b; Lookup table holds Flash command sequences 0, instruction 0
lookupTable_seq0_instr0:
# ------------------------------------------===== OPERAND [Optional] =====------------------------------------------
# Description: Offset: 0b, Width: 8b, Instruction operand. Its values depends on used instruction
OPERAND: 0
# -----------------------------------------===== NUM_PADS [Optional] =====------------------------------------------
# Description: Offset: 8b, Width: 2b, Number of pads used by instruction. Some instructions ignores this parameter.
# - 1PAD, (0): Single mode. One pad is used.
# - 2PAD, (1): Dual mode. Two pads are used.
# - 4PAD, (2): Quad mode. Four pads are used.
# - 8PAD, (3): Octal mode. Eight pads are used.
# Possible options: <1PAD, 2PAD, 4PAD, 8PAD>
NUM_PADS: 1PAD
# --------------------------------------===== OPERATION_CODE [Optional] =====---------------------------------------
# Description: Offset: 10b, Width: 6b, Instruction operation code.
# - STOP, (0): Stop execution and de-assert CS. Then, the next command sequence (to the same flash device) starts
# from instruction pointer 0.
# - CMD_SDR, (1): Transmit command code to Flash.
# - RADDR_SDR, (2): Transmit row address to Flash.
# - CADDR_SDR, (3): Transmit column address to Flash.
# - MODE1_SDR, (4): Transmit mode bits to Flash.
# - MODE2_SDR, (5): Transmit mode bits to Flash.
# - MODE4_SDR, (6): Transmit mode bits to Flash.
# - MODE8_SDR, (7): Transmit mode bits to Flash.
# - WRITE_SDR, (8): Transmit program data to Flash device.
# - READ_SDR, (9): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_SDR, (10): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_SDR, (11): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_SDR, (12): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_SDR, (13): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# - JMP_ON_CS, (31): Stop execution, de-assert CS and save operand[7:0] as the instruction start pointer for next
# sequence.Normally this instruction is used to support Execute-In-Place enhanced mode. See XIP enhanced mode for
# more details.This instruction is only allowed for AHB read commands. There is interrupt status bit set
# (INTR[IPCMDERR] or INTR[AHBCMDERR]) when using this instruction in IP command or AHB write command.
# - CMD_DDR, (33): Transmit command code to Flash.
# - RADDR_DDR, (34): Transmit row address to Flash.
# - CADDR_DDR, (35): Transmit column address to Flash.
# - MODE1_DDR, (36): Transmit mode bits to Flash.
# - MODE2_DDR, (37): Transmit mode bits to Flash.
# - MODE4_DDR, (38): Transmit mode bits to Flash.
# - MODE8_DDR, (39): Transmit mode bits to Flash.
# - WRITE_DDR, (40): Transmit program data to Flash device.
# - READ_DDR, (41): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_DDR, (42): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_DDR, (43): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_DDR, (44): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_DDR, (45): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# Possible options: <STOP, CMD_SDR, RADDR_SDR, CADDR_SDR, MODE1_SDR, MODE2_SDR, MODE4_SDR, MODE8_SDR, WRITE_SDR,
# READ_SDR, LEARN_SDR, DATSZ_SDR, DUMMY_SDR, DUMMY_RWDS_SDR, JMP_ON_CS, CMD_DDR, RADDR_DDR, CADDR_DDR, MODE1_DDR,
# MODE2_DDR, MODE4_DDR, MODE8_DDR, WRITE_DDR, READ_DDR, LEARN_DDR, DATSZ_DDR, DUMMY_DDR, DUMMY_RWDS_DDR>
OPERATION_CODE: STOP
lookupTable_seq0_instr1:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq0_instr2:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq0_instr3:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq0_instr4:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq0_instr5:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq0_instr6:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq0_instr7:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
# -----------------------------------===== lookupTable_seq1_instr0 [Optional] =====-----------------------------------
# Description: Offset: 0x00000090, Width: 16b; Lookup table holds Flash command sequences 1, instruction 0
lookupTable_seq1_instr0:
# ------------------------------------------===== OPERAND [Optional] =====------------------------------------------
# Description: Offset: 0b, Width: 8b, Instruction operand. Its values depends on used instruction
OPERAND: 0
# -----------------------------------------===== NUM_PADS [Optional] =====------------------------------------------
# Description: Offset: 8b, Width: 2b, Number of pads used by instruction. Some instructions ignores this parameter.
# - 1PAD, (0): Single mode. One pad is used.
# - 2PAD, (1): Dual mode. Two pads are used.
# - 4PAD, (2): Quad mode. Four pads are used.
# - 8PAD, (3): Octal mode. Eight pads are used.
# Possible options: <1PAD, 2PAD, 4PAD, 8PAD>
NUM_PADS: 1PAD
# --------------------------------------===== OPERATION_CODE [Optional] =====---------------------------------------
# Description: Offset: 10b, Width: 6b, Instruction operation code.
# - STOP, (0): Stop execution and de-assert CS. Then, the next command sequence (to the same flash device) starts
# from instruction pointer 0.
# - CMD_SDR, (1): Transmit command code to Flash.
# - RADDR_SDR, (2): Transmit row address to Flash.
# - CADDR_SDR, (3): Transmit column address to Flash.
# - MODE1_SDR, (4): Transmit mode bits to Flash.
# - MODE2_SDR, (5): Transmit mode bits to Flash.
# - MODE4_SDR, (6): Transmit mode bits to Flash.
# - MODE8_SDR, (7): Transmit mode bits to Flash.
# - WRITE_SDR, (8): Transmit program data to Flash device.
# - READ_SDR, (9): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_SDR, (10): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_SDR, (11): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_SDR, (12): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_SDR, (13): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# - JMP_ON_CS, (31): Stop execution, de-assert CS and save operand[7:0] as the instruction start pointer for next
# sequence.Normally this instruction is used to support Execute-In-Place enhanced mode. See XIP enhanced mode for
# more details.This instruction is only allowed for AHB read commands. There is interrupt status bit set
# (INTR[IPCMDERR] or INTR[AHBCMDERR]) when using this instruction in IP command or AHB write command.
# - CMD_DDR, (33): Transmit command code to Flash.
# - RADDR_DDR, (34): Transmit row address to Flash.
# - CADDR_DDR, (35): Transmit column address to Flash.
# - MODE1_DDR, (36): Transmit mode bits to Flash.
# - MODE2_DDR, (37): Transmit mode bits to Flash.
# - MODE4_DDR, (38): Transmit mode bits to Flash.
# - MODE8_DDR, (39): Transmit mode bits to Flash.
# - WRITE_DDR, (40): Transmit program data to Flash device.
# - READ_DDR, (41): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_DDR, (42): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_DDR, (43): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_DDR, (44): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_DDR, (45): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# Possible options: <STOP, CMD_SDR, RADDR_SDR, CADDR_SDR, MODE1_SDR, MODE2_SDR, MODE4_SDR, MODE8_SDR, WRITE_SDR,
# READ_SDR, LEARN_SDR, DATSZ_SDR, DUMMY_SDR, DUMMY_RWDS_SDR, JMP_ON_CS, CMD_DDR, RADDR_DDR, CADDR_DDR, MODE1_DDR,
# MODE2_DDR, MODE4_DDR, MODE8_DDR, WRITE_DDR, READ_DDR, LEARN_DDR, DATSZ_DDR, DUMMY_DDR, DUMMY_RWDS_DDR>
OPERATION_CODE: STOP
lookupTable_seq1_instr1:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq1_instr2:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq1_instr3:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq1_instr4:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq1_instr5:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq1_instr6:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq1_instr7:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
# -----------------------------------===== lookupTable_seq2_instr0 [Optional] =====-----------------------------------
# Description: Offset: 0x000000A0, Width: 16b; Lookup table holds Flash command sequences 2, instruction 0
lookupTable_seq2_instr0:
# ------------------------------------------===== OPERAND [Optional] =====------------------------------------------
# Description: Offset: 0b, Width: 8b, Instruction operand. Its values depends on used instruction
OPERAND: 0
# -----------------------------------------===== NUM_PADS [Optional] =====------------------------------------------
# Description: Offset: 8b, Width: 2b, Number of pads used by instruction. Some instructions ignores this parameter.
# - 1PAD, (0): Single mode. One pad is used.
# - 2PAD, (1): Dual mode. Two pads are used.
# - 4PAD, (2): Quad mode. Four pads are used.
# - 8PAD, (3): Octal mode. Eight pads are used.
# Possible options: <1PAD, 2PAD, 4PAD, 8PAD>
NUM_PADS: 1PAD
# --------------------------------------===== OPERATION_CODE [Optional] =====---------------------------------------
# Description: Offset: 10b, Width: 6b, Instruction operation code.
# - STOP, (0): Stop execution and de-assert CS. Then, the next command sequence (to the same flash device) starts
# from instruction pointer 0.
# - CMD_SDR, (1): Transmit command code to Flash.
# - RADDR_SDR, (2): Transmit row address to Flash.
# - CADDR_SDR, (3): Transmit column address to Flash.
# - MODE1_SDR, (4): Transmit mode bits to Flash.
# - MODE2_SDR, (5): Transmit mode bits to Flash.
# - MODE4_SDR, (6): Transmit mode bits to Flash.
# - MODE8_SDR, (7): Transmit mode bits to Flash.
# - WRITE_SDR, (8): Transmit program data to Flash device.
# - READ_SDR, (9): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_SDR, (10): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_SDR, (11): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_SDR, (12): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_SDR, (13): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# - JMP_ON_CS, (31): Stop execution, de-assert CS and save operand[7:0] as the instruction start pointer for next
# sequence.Normally this instruction is used to support Execute-In-Place enhanced mode. See XIP enhanced mode for
# more details.This instruction is only allowed for AHB read commands. There is interrupt status bit set
# (INTR[IPCMDERR] or INTR[AHBCMDERR]) when using this instruction in IP command or AHB write command.
# - CMD_DDR, (33): Transmit command code to Flash.
# - RADDR_DDR, (34): Transmit row address to Flash.
# - CADDR_DDR, (35): Transmit column address to Flash.
# - MODE1_DDR, (36): Transmit mode bits to Flash.
# - MODE2_DDR, (37): Transmit mode bits to Flash.
# - MODE4_DDR, (38): Transmit mode bits to Flash.
# - MODE8_DDR, (39): Transmit mode bits to Flash.
# - WRITE_DDR, (40): Transmit program data to Flash device.
# - READ_DDR, (41): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_DDR, (42): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_DDR, (43): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_DDR, (44): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_DDR, (45): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# Possible options: <STOP, CMD_SDR, RADDR_SDR, CADDR_SDR, MODE1_SDR, MODE2_SDR, MODE4_SDR, MODE8_SDR, WRITE_SDR,
# READ_SDR, LEARN_SDR, DATSZ_SDR, DUMMY_SDR, DUMMY_RWDS_SDR, JMP_ON_CS, CMD_DDR, RADDR_DDR, CADDR_DDR, MODE1_DDR,
# MODE2_DDR, MODE4_DDR, MODE8_DDR, WRITE_DDR, READ_DDR, LEARN_DDR, DATSZ_DDR, DUMMY_DDR, DUMMY_RWDS_DDR>
OPERATION_CODE: STOP
lookupTable_seq2_instr1:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq2_instr2:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq2_instr3:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq2_instr4:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq2_instr5:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq2_instr6:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq2_instr7:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
# -----------------------------------===== lookupTable_seq3_instr0 [Optional] =====-----------------------------------
# Description: Offset: 0x000000B0, Width: 16b; Lookup table holds Flash command sequences 3, instruction 0
lookupTable_seq3_instr0:
# ------------------------------------------===== OPERAND [Optional] =====------------------------------------------
# Description: Offset: 0b, Width: 8b, Instruction operand. Its values depends on used instruction
OPERAND: 0
# -----------------------------------------===== NUM_PADS [Optional] =====------------------------------------------
# Description: Offset: 8b, Width: 2b, Number of pads used by instruction. Some instructions ignores this parameter.
# - 1PAD, (0): Single mode. One pad is used.
# - 2PAD, (1): Dual mode. Two pads are used.
# - 4PAD, (2): Quad mode. Four pads are used.
# - 8PAD, (3): Octal mode. Eight pads are used.
# Possible options: <1PAD, 2PAD, 4PAD, 8PAD>
NUM_PADS: 1PAD
# --------------------------------------===== OPERATION_CODE [Optional] =====---------------------------------------
# Description: Offset: 10b, Width: 6b, Instruction operation code.
# - STOP, (0): Stop execution and de-assert CS. Then, the next command sequence (to the same flash device) starts
# from instruction pointer 0.
# - CMD_SDR, (1): Transmit command code to Flash.
# - RADDR_SDR, (2): Transmit row address to Flash.
# - CADDR_SDR, (3): Transmit column address to Flash.
# - MODE1_SDR, (4): Transmit mode bits to Flash.
# - MODE2_SDR, (5): Transmit mode bits to Flash.
# - MODE4_SDR, (6): Transmit mode bits to Flash.
# - MODE8_SDR, (7): Transmit mode bits to Flash.
# - WRITE_SDR, (8): Transmit program data to Flash device.
# - READ_SDR, (9): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_SDR, (10): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_SDR, (11): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_SDR, (12): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_SDR, (13): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# - JMP_ON_CS, (31): Stop execution, de-assert CS and save operand[7:0] as the instruction start pointer for next
# sequence.Normally this instruction is used to support Execute-In-Place enhanced mode. See XIP enhanced mode for
# more details.This instruction is only allowed for AHB read commands. There is interrupt status bit set
# (INTR[IPCMDERR] or INTR[AHBCMDERR]) when using this instruction in IP command or AHB write command.
# - CMD_DDR, (33): Transmit command code to Flash.
# - RADDR_DDR, (34): Transmit row address to Flash.
# - CADDR_DDR, (35): Transmit column address to Flash.
# - MODE1_DDR, (36): Transmit mode bits to Flash.
# - MODE2_DDR, (37): Transmit mode bits to Flash.
# - MODE4_DDR, (38): Transmit mode bits to Flash.
# - MODE8_DDR, (39): Transmit mode bits to Flash.
# - WRITE_DDR, (40): Transmit program data to Flash device.
# - READ_DDR, (41): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_DDR, (42): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_DDR, (43): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_DDR, (44): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_DDR, (45): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# Possible options: <STOP, CMD_SDR, RADDR_SDR, CADDR_SDR, MODE1_SDR, MODE2_SDR, MODE4_SDR, MODE8_SDR, WRITE_SDR,
# READ_SDR, LEARN_SDR, DATSZ_SDR, DUMMY_SDR, DUMMY_RWDS_SDR, JMP_ON_CS, CMD_DDR, RADDR_DDR, CADDR_DDR, MODE1_DDR,
# MODE2_DDR, MODE4_DDR, MODE8_DDR, WRITE_DDR, READ_DDR, LEARN_DDR, DATSZ_DDR, DUMMY_DDR, DUMMY_RWDS_DDR>
OPERATION_CODE: STOP
lookupTable_seq3_instr1:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq3_instr2:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq3_instr3:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq3_instr4:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq3_instr5:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq3_instr6:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq3_instr7:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
# -----------------------------------===== lookupTable_seq4_instr0 [Optional] =====-----------------------------------
# Description: Offset: 0x000000C0, Width: 16b; Lookup table holds Flash command sequences 4, instruction 0
lookupTable_seq4_instr0:
# ------------------------------------------===== OPERAND [Optional] =====------------------------------------------
# Description: Offset: 0b, Width: 8b, Instruction operand. Its values depends on used instruction
OPERAND: 0
# -----------------------------------------===== NUM_PADS [Optional] =====------------------------------------------
# Description: Offset: 8b, Width: 2b, Number of pads used by instruction. Some instructions ignores this parameter.
# - 1PAD, (0): Single mode. One pad is used.
# - 2PAD, (1): Dual mode. Two pads are used.
# - 4PAD, (2): Quad mode. Four pads are used.
# - 8PAD, (3): Octal mode. Eight pads are used.
# Possible options: <1PAD, 2PAD, 4PAD, 8PAD>
NUM_PADS: 1PAD
# --------------------------------------===== OPERATION_CODE [Optional] =====---------------------------------------
# Description: Offset: 10b, Width: 6b, Instruction operation code.
# - STOP, (0): Stop execution and de-assert CS. Then, the next command sequence (to the same flash device) starts
# from instruction pointer 0.
# - CMD_SDR, (1): Transmit command code to Flash.
# - RADDR_SDR, (2): Transmit row address to Flash.
# - CADDR_SDR, (3): Transmit column address to Flash.
# - MODE1_SDR, (4): Transmit mode bits to Flash.
# - MODE2_SDR, (5): Transmit mode bits to Flash.
# - MODE4_SDR, (6): Transmit mode bits to Flash.
# - MODE8_SDR, (7): Transmit mode bits to Flash.
# - WRITE_SDR, (8): Transmit program data to Flash device.
# - READ_SDR, (9): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_SDR, (10): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_SDR, (11): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_SDR, (12): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_SDR, (13): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# - JMP_ON_CS, (31): Stop execution, de-assert CS and save operand[7:0] as the instruction start pointer for next
# sequence.Normally this instruction is used to support Execute-In-Place enhanced mode. See XIP enhanced mode for
# more details.This instruction is only allowed for AHB read commands. There is interrupt status bit set
# (INTR[IPCMDERR] or INTR[AHBCMDERR]) when using this instruction in IP command or AHB write command.
# - CMD_DDR, (33): Transmit command code to Flash.
# - RADDR_DDR, (34): Transmit row address to Flash.
# - CADDR_DDR, (35): Transmit column address to Flash.
# - MODE1_DDR, (36): Transmit mode bits to Flash.
# - MODE2_DDR, (37): Transmit mode bits to Flash.
# - MODE4_DDR, (38): Transmit mode bits to Flash.
# - MODE8_DDR, (39): Transmit mode bits to Flash.
# - WRITE_DDR, (40): Transmit program data to Flash device.
# - READ_DDR, (41): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_DDR, (42): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_DDR, (43): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_DDR, (44): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_DDR, (45): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# Possible options: <STOP, CMD_SDR, RADDR_SDR, CADDR_SDR, MODE1_SDR, MODE2_SDR, MODE4_SDR, MODE8_SDR, WRITE_SDR,
# READ_SDR, LEARN_SDR, DATSZ_SDR, DUMMY_SDR, DUMMY_RWDS_SDR, JMP_ON_CS, CMD_DDR, RADDR_DDR, CADDR_DDR, MODE1_DDR,
# MODE2_DDR, MODE4_DDR, MODE8_DDR, WRITE_DDR, READ_DDR, LEARN_DDR, DATSZ_DDR, DUMMY_DDR, DUMMY_RWDS_DDR>
OPERATION_CODE: STOP
lookupTable_seq4_instr1:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq4_instr2:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq4_instr3:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq4_instr4:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq4_instr5:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq4_instr6:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq4_instr7:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
# -----------------------------------===== lookupTable_seq5_instr0 [Optional] =====-----------------------------------
# Description: Offset: 0x000000D0, Width: 16b; Lookup table holds Flash command sequences 5, instruction 0
lookupTable_seq5_instr0:
# ------------------------------------------===== OPERAND [Optional] =====------------------------------------------
# Description: Offset: 0b, Width: 8b, Instruction operand. Its values depends on used instruction
OPERAND: 0
# -----------------------------------------===== NUM_PADS [Optional] =====------------------------------------------
# Description: Offset: 8b, Width: 2b, Number of pads used by instruction. Some instructions ignores this parameter.
# - 1PAD, (0): Single mode. One pad is used.
# - 2PAD, (1): Dual mode. Two pads are used.
# - 4PAD, (2): Quad mode. Four pads are used.
# - 8PAD, (3): Octal mode. Eight pads are used.
# Possible options: <1PAD, 2PAD, 4PAD, 8PAD>
NUM_PADS: 1PAD
# --------------------------------------===== OPERATION_CODE [Optional] =====---------------------------------------
# Description: Offset: 10b, Width: 6b, Instruction operation code.
# - STOP, (0): Stop execution and de-assert CS. Then, the next command sequence (to the same flash device) starts
# from instruction pointer 0.
# - CMD_SDR, (1): Transmit command code to Flash.
# - RADDR_SDR, (2): Transmit row address to Flash.
# - CADDR_SDR, (3): Transmit column address to Flash.
# - MODE1_SDR, (4): Transmit mode bits to Flash.
# - MODE2_SDR, (5): Transmit mode bits to Flash.
# - MODE4_SDR, (6): Transmit mode bits to Flash.
# - MODE8_SDR, (7): Transmit mode bits to Flash.
# - WRITE_SDR, (8): Transmit program data to Flash device.
# - READ_SDR, (9): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_SDR, (10): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_SDR, (11): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_SDR, (12): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_SDR, (13): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# - JMP_ON_CS, (31): Stop execution, de-assert CS and save operand[7:0] as the instruction start pointer for next
# sequence.Normally this instruction is used to support Execute-In-Place enhanced mode. See XIP enhanced mode for
# more details.This instruction is only allowed for AHB read commands. There is interrupt status bit set
# (INTR[IPCMDERR] or INTR[AHBCMDERR]) when using this instruction in IP command or AHB write command.
# - CMD_DDR, (33): Transmit command code to Flash.
# - RADDR_DDR, (34): Transmit row address to Flash.
# - CADDR_DDR, (35): Transmit column address to Flash.
# - MODE1_DDR, (36): Transmit mode bits to Flash.
# - MODE2_DDR, (37): Transmit mode bits to Flash.
# - MODE4_DDR, (38): Transmit mode bits to Flash.
# - MODE8_DDR, (39): Transmit mode bits to Flash.
# - WRITE_DDR, (40): Transmit program data to Flash device.
# - READ_DDR, (41): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_DDR, (42): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_DDR, (43): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_DDR, (44): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_DDR, (45): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# Possible options: <STOP, CMD_SDR, RADDR_SDR, CADDR_SDR, MODE1_SDR, MODE2_SDR, MODE4_SDR, MODE8_SDR, WRITE_SDR,
# READ_SDR, LEARN_SDR, DATSZ_SDR, DUMMY_SDR, DUMMY_RWDS_SDR, JMP_ON_CS, CMD_DDR, RADDR_DDR, CADDR_DDR, MODE1_DDR,
# MODE2_DDR, MODE4_DDR, MODE8_DDR, WRITE_DDR, READ_DDR, LEARN_DDR, DATSZ_DDR, DUMMY_DDR, DUMMY_RWDS_DDR>
OPERATION_CODE: STOP
lookupTable_seq5_instr1:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq5_instr2:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq5_instr3:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq5_instr4:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq5_instr5:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq5_instr6:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq5_instr7:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
# -----------------------------------===== lookupTable_seq6_instr0 [Optional] =====-----------------------------------
# Description: Offset: 0x000000E0, Width: 16b; Lookup table holds Flash command sequences 6, instruction 0
lookupTable_seq6_instr0:
# ------------------------------------------===== OPERAND [Optional] =====------------------------------------------
# Description: Offset: 0b, Width: 8b, Instruction operand. Its values depends on used instruction
OPERAND: 0
# -----------------------------------------===== NUM_PADS [Optional] =====------------------------------------------
# Description: Offset: 8b, Width: 2b, Number of pads used by instruction. Some instructions ignores this parameter.
# - 1PAD, (0): Single mode. One pad is used.
# - 2PAD, (1): Dual mode. Two pads are used.
# - 4PAD, (2): Quad mode. Four pads are used.
# - 8PAD, (3): Octal mode. Eight pads are used.
# Possible options: <1PAD, 2PAD, 4PAD, 8PAD>
NUM_PADS: 1PAD
# --------------------------------------===== OPERATION_CODE [Optional] =====---------------------------------------
# Description: Offset: 10b, Width: 6b, Instruction operation code.
# - STOP, (0): Stop execution and de-assert CS. Then, the next command sequence (to the same flash device) starts
# from instruction pointer 0.
# - CMD_SDR, (1): Transmit command code to Flash.
# - RADDR_SDR, (2): Transmit row address to Flash.
# - CADDR_SDR, (3): Transmit column address to Flash.
# - MODE1_SDR, (4): Transmit mode bits to Flash.
# - MODE2_SDR, (5): Transmit mode bits to Flash.
# - MODE4_SDR, (6): Transmit mode bits to Flash.
# - MODE8_SDR, (7): Transmit mode bits to Flash.
# - WRITE_SDR, (8): Transmit program data to Flash device.
# - READ_SDR, (9): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_SDR, (10): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_SDR, (11): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_SDR, (12): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_SDR, (13): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# - JMP_ON_CS, (31): Stop execution, de-assert CS and save operand[7:0] as the instruction start pointer for next
# sequence.Normally this instruction is used to support Execute-In-Place enhanced mode. See XIP enhanced mode for
# more details.This instruction is only allowed for AHB read commands. There is interrupt status bit set
# (INTR[IPCMDERR] or INTR[AHBCMDERR]) when using this instruction in IP command or AHB write command.
# - CMD_DDR, (33): Transmit command code to Flash.
# - RADDR_DDR, (34): Transmit row address to Flash.
# - CADDR_DDR, (35): Transmit column address to Flash.
# - MODE1_DDR, (36): Transmit mode bits to Flash.
# - MODE2_DDR, (37): Transmit mode bits to Flash.
# - MODE4_DDR, (38): Transmit mode bits to Flash.
# - MODE8_DDR, (39): Transmit mode bits to Flash.
# - WRITE_DDR, (40): Transmit program data to Flash device.
# - READ_DDR, (41): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_DDR, (42): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_DDR, (43): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_DDR, (44): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_DDR, (45): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# Possible options: <STOP, CMD_SDR, RADDR_SDR, CADDR_SDR, MODE1_SDR, MODE2_SDR, MODE4_SDR, MODE8_SDR, WRITE_SDR,
# READ_SDR, LEARN_SDR, DATSZ_SDR, DUMMY_SDR, DUMMY_RWDS_SDR, JMP_ON_CS, CMD_DDR, RADDR_DDR, CADDR_DDR, MODE1_DDR,
# MODE2_DDR, MODE4_DDR, MODE8_DDR, WRITE_DDR, READ_DDR, LEARN_DDR, DATSZ_DDR, DUMMY_DDR, DUMMY_RWDS_DDR>
OPERATION_CODE: STOP
lookupTable_seq6_instr1:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq6_instr2:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq6_instr3:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq6_instr4:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq6_instr5:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq6_instr6:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq6_instr7:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
# -----------------------------------===== lookupTable_seq7_instr0 [Optional] =====-----------------------------------
# Description: Offset: 0x000000F0, Width: 16b; Lookup table holds Flash command sequences 7, instruction 0
lookupTable_seq7_instr0:
# ------------------------------------------===== OPERAND [Optional] =====------------------------------------------
# Description: Offset: 0b, Width: 8b, Instruction operand. Its values depends on used instruction
OPERAND: 0
# -----------------------------------------===== NUM_PADS [Optional] =====------------------------------------------
# Description: Offset: 8b, Width: 2b, Number of pads used by instruction. Some instructions ignores this parameter.
# - 1PAD, (0): Single mode. One pad is used.
# - 2PAD, (1): Dual mode. Two pads are used.
# - 4PAD, (2): Quad mode. Four pads are used.
# - 8PAD, (3): Octal mode. Eight pads are used.
# Possible options: <1PAD, 2PAD, 4PAD, 8PAD>
NUM_PADS: 1PAD
# --------------------------------------===== OPERATION_CODE [Optional] =====---------------------------------------
# Description: Offset: 10b, Width: 6b, Instruction operation code.
# - STOP, (0): Stop execution and de-assert CS. Then, the next command sequence (to the same flash device) starts
# from instruction pointer 0.
# - CMD_SDR, (1): Transmit command code to Flash.
# - RADDR_SDR, (2): Transmit row address to Flash.
# - CADDR_SDR, (3): Transmit column address to Flash.
# - MODE1_SDR, (4): Transmit mode bits to Flash.
# - MODE2_SDR, (5): Transmit mode bits to Flash.
# - MODE4_SDR, (6): Transmit mode bits to Flash.
# - MODE8_SDR, (7): Transmit mode bits to Flash.
# - WRITE_SDR, (8): Transmit program data to Flash device.
# - READ_SDR, (9): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_SDR, (10): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_SDR, (11): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_SDR, (12): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_SDR, (13): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# - JMP_ON_CS, (31): Stop execution, de-assert CS and save operand[7:0] as the instruction start pointer for next
# sequence.Normally this instruction is used to support Execute-In-Place enhanced mode. See XIP enhanced mode for
# more details.This instruction is only allowed for AHB read commands. There is interrupt status bit set
# (INTR[IPCMDERR] or INTR[AHBCMDERR]) when using this instruction in IP command or AHB write command.
# - CMD_DDR, (33): Transmit command code to Flash.
# - RADDR_DDR, (34): Transmit row address to Flash.
# - CADDR_DDR, (35): Transmit column address to Flash.
# - MODE1_DDR, (36): Transmit mode bits to Flash.
# - MODE2_DDR, (37): Transmit mode bits to Flash.
# - MODE4_DDR, (38): Transmit mode bits to Flash.
# - MODE8_DDR, (39): Transmit mode bits to Flash.
# - WRITE_DDR, (40): Transmit program data to Flash device.
# - READ_DDR, (41): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_DDR, (42): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_DDR, (43): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_DDR, (44): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_DDR, (45): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# Possible options: <STOP, CMD_SDR, RADDR_SDR, CADDR_SDR, MODE1_SDR, MODE2_SDR, MODE4_SDR, MODE8_SDR, WRITE_SDR,
# READ_SDR, LEARN_SDR, DATSZ_SDR, DUMMY_SDR, DUMMY_RWDS_SDR, JMP_ON_CS, CMD_DDR, RADDR_DDR, CADDR_DDR, MODE1_DDR,
# MODE2_DDR, MODE4_DDR, MODE8_DDR, WRITE_DDR, READ_DDR, LEARN_DDR, DATSZ_DDR, DUMMY_DDR, DUMMY_RWDS_DDR>
OPERATION_CODE: STOP
lookupTable_seq7_instr1:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq7_instr2:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq7_instr3:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq7_instr4:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq7_instr5:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq7_instr6:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq7_instr7:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
# -----------------------------------===== lookupTable_seq8_instr0 [Optional] =====-----------------------------------
# Description: Offset: 0x00000100, Width: 16b; Lookup table holds Flash command sequences 8, instruction 0
lookupTable_seq8_instr0:
# ------------------------------------------===== OPERAND [Optional] =====------------------------------------------
# Description: Offset: 0b, Width: 8b, Instruction operand. Its values depends on used instruction
OPERAND: 0
# -----------------------------------------===== NUM_PADS [Optional] =====------------------------------------------
# Description: Offset: 8b, Width: 2b, Number of pads used by instruction. Some instructions ignores this parameter.
# - 1PAD, (0): Single mode. One pad is used.
# - 2PAD, (1): Dual mode. Two pads are used.
# - 4PAD, (2): Quad mode. Four pads are used.
# - 8PAD, (3): Octal mode. Eight pads are used.
# Possible options: <1PAD, 2PAD, 4PAD, 8PAD>
NUM_PADS: 1PAD
# --------------------------------------===== OPERATION_CODE [Optional] =====---------------------------------------
# Description: Offset: 10b, Width: 6b, Instruction operation code.
# - STOP, (0): Stop execution and de-assert CS. Then, the next command sequence (to the same flash device) starts
# from instruction pointer 0.
# - CMD_SDR, (1): Transmit command code to Flash.
# - RADDR_SDR, (2): Transmit row address to Flash.
# - CADDR_SDR, (3): Transmit column address to Flash.
# - MODE1_SDR, (4): Transmit mode bits to Flash.
# - MODE2_SDR, (5): Transmit mode bits to Flash.
# - MODE4_SDR, (6): Transmit mode bits to Flash.
# - MODE8_SDR, (7): Transmit mode bits to Flash.
# - WRITE_SDR, (8): Transmit program data to Flash device.
# - READ_SDR, (9): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_SDR, (10): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_SDR, (11): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_SDR, (12): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_SDR, (13): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# - JMP_ON_CS, (31): Stop execution, de-assert CS and save operand[7:0] as the instruction start pointer for next
# sequence.Normally this instruction is used to support Execute-In-Place enhanced mode. See XIP enhanced mode for
# more details.This instruction is only allowed for AHB read commands. There is interrupt status bit set
# (INTR[IPCMDERR] or INTR[AHBCMDERR]) when using this instruction in IP command or AHB write command.
# - CMD_DDR, (33): Transmit command code to Flash.
# - RADDR_DDR, (34): Transmit row address to Flash.
# - CADDR_DDR, (35): Transmit column address to Flash.
# - MODE1_DDR, (36): Transmit mode bits to Flash.
# - MODE2_DDR, (37): Transmit mode bits to Flash.
# - MODE4_DDR, (38): Transmit mode bits to Flash.
# - MODE8_DDR, (39): Transmit mode bits to Flash.
# - WRITE_DDR, (40): Transmit program data to Flash device.
# - READ_DDR, (41): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_DDR, (42): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_DDR, (43): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_DDR, (44): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_DDR, (45): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# Possible options: <STOP, CMD_SDR, RADDR_SDR, CADDR_SDR, MODE1_SDR, MODE2_SDR, MODE4_SDR, MODE8_SDR, WRITE_SDR,
# READ_SDR, LEARN_SDR, DATSZ_SDR, DUMMY_SDR, DUMMY_RWDS_SDR, JMP_ON_CS, CMD_DDR, RADDR_DDR, CADDR_DDR, MODE1_DDR,
# MODE2_DDR, MODE4_DDR, MODE8_DDR, WRITE_DDR, READ_DDR, LEARN_DDR, DATSZ_DDR, DUMMY_DDR, DUMMY_RWDS_DDR>
OPERATION_CODE: STOP
lookupTable_seq8_instr1:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq8_instr2:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq8_instr3:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq8_instr4:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq8_instr5:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq8_instr6:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq8_instr7:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
# -----------------------------------===== lookupTable_seq9_instr0 [Optional] =====-----------------------------------
# Description: Offset: 0x00000110, Width: 16b; Lookup table holds Flash command sequences 9, instruction 0
lookupTable_seq9_instr0:
# ------------------------------------------===== OPERAND [Optional] =====------------------------------------------
# Description: Offset: 0b, Width: 8b, Instruction operand. Its values depends on used instruction
OPERAND: 0
# -----------------------------------------===== NUM_PADS [Optional] =====------------------------------------------
# Description: Offset: 8b, Width: 2b, Number of pads used by instruction. Some instructions ignores this parameter.
# - 1PAD, (0): Single mode. One pad is used.
# - 2PAD, (1): Dual mode. Two pads are used.
# - 4PAD, (2): Quad mode. Four pads are used.
# - 8PAD, (3): Octal mode. Eight pads are used.
# Possible options: <1PAD, 2PAD, 4PAD, 8PAD>
NUM_PADS: 1PAD
# --------------------------------------===== OPERATION_CODE [Optional] =====---------------------------------------
# Description: Offset: 10b, Width: 6b, Instruction operation code.
# - STOP, (0): Stop execution and de-assert CS. Then, the next command sequence (to the same flash device) starts
# from instruction pointer 0.
# - CMD_SDR, (1): Transmit command code to Flash.
# - RADDR_SDR, (2): Transmit row address to Flash.
# - CADDR_SDR, (3): Transmit column address to Flash.
# - MODE1_SDR, (4): Transmit mode bits to Flash.
# - MODE2_SDR, (5): Transmit mode bits to Flash.
# - MODE4_SDR, (6): Transmit mode bits to Flash.
# - MODE8_SDR, (7): Transmit mode bits to Flash.
# - WRITE_SDR, (8): Transmit program data to Flash device.
# - READ_SDR, (9): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_SDR, (10): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_SDR, (11): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_SDR, (12): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_SDR, (13): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# - JMP_ON_CS, (31): Stop execution, de-assert CS and save operand[7:0] as the instruction start pointer for next
# sequence.Normally this instruction is used to support Execute-In-Place enhanced mode. See XIP enhanced mode for
# more details.This instruction is only allowed for AHB read commands. There is interrupt status bit set
# (INTR[IPCMDERR] or INTR[AHBCMDERR]) when using this instruction in IP command or AHB write command.
# - CMD_DDR, (33): Transmit command code to Flash.
# - RADDR_DDR, (34): Transmit row address to Flash.
# - CADDR_DDR, (35): Transmit column address to Flash.
# - MODE1_DDR, (36): Transmit mode bits to Flash.
# - MODE2_DDR, (37): Transmit mode bits to Flash.
# - MODE4_DDR, (38): Transmit mode bits to Flash.
# - MODE8_DDR, (39): Transmit mode bits to Flash.
# - WRITE_DDR, (40): Transmit program data to Flash device.
# - READ_DDR, (41): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_DDR, (42): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_DDR, (43): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_DDR, (44): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_DDR, (45): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# Possible options: <STOP, CMD_SDR, RADDR_SDR, CADDR_SDR, MODE1_SDR, MODE2_SDR, MODE4_SDR, MODE8_SDR, WRITE_SDR,
# READ_SDR, LEARN_SDR, DATSZ_SDR, DUMMY_SDR, DUMMY_RWDS_SDR, JMP_ON_CS, CMD_DDR, RADDR_DDR, CADDR_DDR, MODE1_DDR,
# MODE2_DDR, MODE4_DDR, MODE8_DDR, WRITE_DDR, READ_DDR, LEARN_DDR, DATSZ_DDR, DUMMY_DDR, DUMMY_RWDS_DDR>
OPERATION_CODE: STOP
lookupTable_seq9_instr1:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq9_instr2:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq9_instr3:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq9_instr4:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq9_instr5:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq9_instr6:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq9_instr7:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
# ----------------------------------===== lookupTable_seq10_instr0 [Optional] =====-----------------------------------
# Description: Offset: 0x00000120, Width: 16b; Lookup table holds Flash command sequences 10, instruction 0
lookupTable_seq10_instr0:
# ------------------------------------------===== OPERAND [Optional] =====------------------------------------------
# Description: Offset: 0b, Width: 8b, Instruction operand. Its values depends on used instruction
OPERAND: 0
# -----------------------------------------===== NUM_PADS [Optional] =====------------------------------------------
# Description: Offset: 8b, Width: 2b, Number of pads used by instruction. Some instructions ignores this parameter.
# - 1PAD, (0): Single mode. One pad is used.
# - 2PAD, (1): Dual mode. Two pads are used.
# - 4PAD, (2): Quad mode. Four pads are used.
# - 8PAD, (3): Octal mode. Eight pads are used.
# Possible options: <1PAD, 2PAD, 4PAD, 8PAD>
NUM_PADS: 1PAD
# --------------------------------------===== OPERATION_CODE [Optional] =====---------------------------------------
# Description: Offset: 10b, Width: 6b, Instruction operation code.
# - STOP, (0): Stop execution and de-assert CS. Then, the next command sequence (to the same flash device) starts
# from instruction pointer 0.
# - CMD_SDR, (1): Transmit command code to Flash.
# - RADDR_SDR, (2): Transmit row address to Flash.
# - CADDR_SDR, (3): Transmit column address to Flash.
# - MODE1_SDR, (4): Transmit mode bits to Flash.
# - MODE2_SDR, (5): Transmit mode bits to Flash.
# - MODE4_SDR, (6): Transmit mode bits to Flash.
# - MODE8_SDR, (7): Transmit mode bits to Flash.
# - WRITE_SDR, (8): Transmit program data to Flash device.
# - READ_SDR, (9): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_SDR, (10): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_SDR, (11): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_SDR, (12): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_SDR, (13): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# - JMP_ON_CS, (31): Stop execution, de-assert CS and save operand[7:0] as the instruction start pointer for next
# sequence.Normally this instruction is used to support Execute-In-Place enhanced mode. See XIP enhanced mode for
# more details.This instruction is only allowed for AHB read commands. There is interrupt status bit set
# (INTR[IPCMDERR] or INTR[AHBCMDERR]) when using this instruction in IP command or AHB write command.
# - CMD_DDR, (33): Transmit command code to Flash.
# - RADDR_DDR, (34): Transmit row address to Flash.
# - CADDR_DDR, (35): Transmit column address to Flash.
# - MODE1_DDR, (36): Transmit mode bits to Flash.
# - MODE2_DDR, (37): Transmit mode bits to Flash.
# - MODE4_DDR, (38): Transmit mode bits to Flash.
# - MODE8_DDR, (39): Transmit mode bits to Flash.
# - WRITE_DDR, (40): Transmit program data to Flash device.
# - READ_DDR, (41): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_DDR, (42): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_DDR, (43): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_DDR, (44): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_DDR, (45): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# Possible options: <STOP, CMD_SDR, RADDR_SDR, CADDR_SDR, MODE1_SDR, MODE2_SDR, MODE4_SDR, MODE8_SDR, WRITE_SDR,
# READ_SDR, LEARN_SDR, DATSZ_SDR, DUMMY_SDR, DUMMY_RWDS_SDR, JMP_ON_CS, CMD_DDR, RADDR_DDR, CADDR_DDR, MODE1_DDR,
# MODE2_DDR, MODE4_DDR, MODE8_DDR, WRITE_DDR, READ_DDR, LEARN_DDR, DATSZ_DDR, DUMMY_DDR, DUMMY_RWDS_DDR>
OPERATION_CODE: STOP
lookupTable_seq10_instr1:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq10_instr2:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq10_instr3:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq10_instr4:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq10_instr5:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq10_instr6:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq10_instr7:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
# ----------------------------------===== lookupTable_seq11_instr0 [Optional] =====-----------------------------------
# Description: Offset: 0x00000130, Width: 16b; Lookup table holds Flash command sequences 11, instruction 0
lookupTable_seq11_instr0:
# ------------------------------------------===== OPERAND [Optional] =====------------------------------------------
# Description: Offset: 0b, Width: 8b, Instruction operand. Its values depends on used instruction
OPERAND: 0
# -----------------------------------------===== NUM_PADS [Optional] =====------------------------------------------
# Description: Offset: 8b, Width: 2b, Number of pads used by instruction. Some instructions ignores this parameter.
# - 1PAD, (0): Single mode. One pad is used.
# - 2PAD, (1): Dual mode. Two pads are used.
# - 4PAD, (2): Quad mode. Four pads are used.
# - 8PAD, (3): Octal mode. Eight pads are used.
# Possible options: <1PAD, 2PAD, 4PAD, 8PAD>
NUM_PADS: 1PAD
# --------------------------------------===== OPERATION_CODE [Optional] =====---------------------------------------
# Description: Offset: 10b, Width: 6b, Instruction operation code.
# - STOP, (0): Stop execution and de-assert CS. Then, the next command sequence (to the same flash device) starts
# from instruction pointer 0.
# - CMD_SDR, (1): Transmit command code to Flash.
# - RADDR_SDR, (2): Transmit row address to Flash.
# - CADDR_SDR, (3): Transmit column address to Flash.
# - MODE1_SDR, (4): Transmit mode bits to Flash.
# - MODE2_SDR, (5): Transmit mode bits to Flash.
# - MODE4_SDR, (6): Transmit mode bits to Flash.
# - MODE8_SDR, (7): Transmit mode bits to Flash.
# - WRITE_SDR, (8): Transmit program data to Flash device.
# - READ_SDR, (9): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_SDR, (10): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_SDR, (11): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_SDR, (12): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_SDR, (13): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# - JMP_ON_CS, (31): Stop execution, de-assert CS and save operand[7:0] as the instruction start pointer for next
# sequence.Normally this instruction is used to support Execute-In-Place enhanced mode. See XIP enhanced mode for
# more details.This instruction is only allowed for AHB read commands. There is interrupt status bit set
# (INTR[IPCMDERR] or INTR[AHBCMDERR]) when using this instruction in IP command or AHB write command.
# - CMD_DDR, (33): Transmit command code to Flash.
# - RADDR_DDR, (34): Transmit row address to Flash.
# - CADDR_DDR, (35): Transmit column address to Flash.
# - MODE1_DDR, (36): Transmit mode bits to Flash.
# - MODE2_DDR, (37): Transmit mode bits to Flash.
# - MODE4_DDR, (38): Transmit mode bits to Flash.
# - MODE8_DDR, (39): Transmit mode bits to Flash.
# - WRITE_DDR, (40): Transmit program data to Flash device.
# - READ_DDR, (41): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_DDR, (42): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_DDR, (43): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_DDR, (44): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_DDR, (45): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# Possible options: <STOP, CMD_SDR, RADDR_SDR, CADDR_SDR, MODE1_SDR, MODE2_SDR, MODE4_SDR, MODE8_SDR, WRITE_SDR,
# READ_SDR, LEARN_SDR, DATSZ_SDR, DUMMY_SDR, DUMMY_RWDS_SDR, JMP_ON_CS, CMD_DDR, RADDR_DDR, CADDR_DDR, MODE1_DDR,
# MODE2_DDR, MODE4_DDR, MODE8_DDR, WRITE_DDR, READ_DDR, LEARN_DDR, DATSZ_DDR, DUMMY_DDR, DUMMY_RWDS_DDR>
OPERATION_CODE: STOP
lookupTable_seq11_instr1:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq11_instr2:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq11_instr3:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq11_instr4:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq11_instr5:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq11_instr6:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq11_instr7:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
# ----------------------------------===== lookupTable_seq12_instr0 [Optional] =====-----------------------------------
# Description: Offset: 0x00000140, Width: 16b; Lookup table holds Flash command sequences 12, instruction 0
lookupTable_seq12_instr0:
# ------------------------------------------===== OPERAND [Optional] =====------------------------------------------
# Description: Offset: 0b, Width: 8b, Instruction operand. Its values depends on used instruction
OPERAND: 0
# -----------------------------------------===== NUM_PADS [Optional] =====------------------------------------------
# Description: Offset: 8b, Width: 2b, Number of pads used by instruction. Some instructions ignores this parameter.
# - 1PAD, (0): Single mode. One pad is used.
# - 2PAD, (1): Dual mode. Two pads are used.
# - 4PAD, (2): Quad mode. Four pads are used.
# - 8PAD, (3): Octal mode. Eight pads are used.
# Possible options: <1PAD, 2PAD, 4PAD, 8PAD>
NUM_PADS: 1PAD
# --------------------------------------===== OPERATION_CODE [Optional] =====---------------------------------------
# Description: Offset: 10b, Width: 6b, Instruction operation code.
# - STOP, (0): Stop execution and de-assert CS. Then, the next command sequence (to the same flash device) starts
# from instruction pointer 0.
# - CMD_SDR, (1): Transmit command code to Flash.
# - RADDR_SDR, (2): Transmit row address to Flash.
# - CADDR_SDR, (3): Transmit column address to Flash.
# - MODE1_SDR, (4): Transmit mode bits to Flash.
# - MODE2_SDR, (5): Transmit mode bits to Flash.
# - MODE4_SDR, (6): Transmit mode bits to Flash.
# - MODE8_SDR, (7): Transmit mode bits to Flash.
# - WRITE_SDR, (8): Transmit program data to Flash device.
# - READ_SDR, (9): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_SDR, (10): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_SDR, (11): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_SDR, (12): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_SDR, (13): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# - JMP_ON_CS, (31): Stop execution, de-assert CS and save operand[7:0] as the instruction start pointer for next
# sequence.Normally this instruction is used to support Execute-In-Place enhanced mode. See XIP enhanced mode for
# more details.This instruction is only allowed for AHB read commands. There is interrupt status bit set
# (INTR[IPCMDERR] or INTR[AHBCMDERR]) when using this instruction in IP command or AHB write command.
# - CMD_DDR, (33): Transmit command code to Flash.
# - RADDR_DDR, (34): Transmit row address to Flash.
# - CADDR_DDR, (35): Transmit column address to Flash.
# - MODE1_DDR, (36): Transmit mode bits to Flash.
# - MODE2_DDR, (37): Transmit mode bits to Flash.
# - MODE4_DDR, (38): Transmit mode bits to Flash.
# - MODE8_DDR, (39): Transmit mode bits to Flash.
# - WRITE_DDR, (40): Transmit program data to Flash device.
# - READ_DDR, (41): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_DDR, (42): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_DDR, (43): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_DDR, (44): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_DDR, (45): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# Possible options: <STOP, CMD_SDR, RADDR_SDR, CADDR_SDR, MODE1_SDR, MODE2_SDR, MODE4_SDR, MODE8_SDR, WRITE_SDR,
# READ_SDR, LEARN_SDR, DATSZ_SDR, DUMMY_SDR, DUMMY_RWDS_SDR, JMP_ON_CS, CMD_DDR, RADDR_DDR, CADDR_DDR, MODE1_DDR,
# MODE2_DDR, MODE4_DDR, MODE8_DDR, WRITE_DDR, READ_DDR, LEARN_DDR, DATSZ_DDR, DUMMY_DDR, DUMMY_RWDS_DDR>
OPERATION_CODE: STOP
lookupTable_seq12_instr1:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq12_instr2:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq12_instr3:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq12_instr4:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq12_instr5:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq12_instr6:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq12_instr7:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
# ----------------------------------===== lookupTable_seq13_instr0 [Optional] =====-----------------------------------
# Description: Offset: 0x00000150, Width: 16b; Lookup table holds Flash command sequences 13, instruction 0
lookupTable_seq13_instr0:
# ------------------------------------------===== OPERAND [Optional] =====------------------------------------------
# Description: Offset: 0b, Width: 8b, Instruction operand. Its values depends on used instruction
OPERAND: 0
# -----------------------------------------===== NUM_PADS [Optional] =====------------------------------------------
# Description: Offset: 8b, Width: 2b, Number of pads used by instruction. Some instructions ignores this parameter.
# - 1PAD, (0): Single mode. One pad is used.
# - 2PAD, (1): Dual mode. Two pads are used.
# - 4PAD, (2): Quad mode. Four pads are used.
# - 8PAD, (3): Octal mode. Eight pads are used.
# Possible options: <1PAD, 2PAD, 4PAD, 8PAD>
NUM_PADS: 1PAD
# --------------------------------------===== OPERATION_CODE [Optional] =====---------------------------------------
# Description: Offset: 10b, Width: 6b, Instruction operation code.
# - STOP, (0): Stop execution and de-assert CS. Then, the next command sequence (to the same flash device) starts
# from instruction pointer 0.
# - CMD_SDR, (1): Transmit command code to Flash.
# - RADDR_SDR, (2): Transmit row address to Flash.
# - CADDR_SDR, (3): Transmit column address to Flash.
# - MODE1_SDR, (4): Transmit mode bits to Flash.
# - MODE2_SDR, (5): Transmit mode bits to Flash.
# - MODE4_SDR, (6): Transmit mode bits to Flash.
# - MODE8_SDR, (7): Transmit mode bits to Flash.
# - WRITE_SDR, (8): Transmit program data to Flash device.
# - READ_SDR, (9): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_SDR, (10): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_SDR, (11): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_SDR, (12): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_SDR, (13): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# - JMP_ON_CS, (31): Stop execution, de-assert CS and save operand[7:0] as the instruction start pointer for next
# sequence.Normally this instruction is used to support Execute-In-Place enhanced mode. See XIP enhanced mode for
# more details.This instruction is only allowed for AHB read commands. There is interrupt status bit set
# (INTR[IPCMDERR] or INTR[AHBCMDERR]) when using this instruction in IP command or AHB write command.
# - CMD_DDR, (33): Transmit command code to Flash.
# - RADDR_DDR, (34): Transmit row address to Flash.
# - CADDR_DDR, (35): Transmit column address to Flash.
# - MODE1_DDR, (36): Transmit mode bits to Flash.
# - MODE2_DDR, (37): Transmit mode bits to Flash.
# - MODE4_DDR, (38): Transmit mode bits to Flash.
# - MODE8_DDR, (39): Transmit mode bits to Flash.
# - WRITE_DDR, (40): Transmit program data to Flash device.
# - READ_DDR, (41): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_DDR, (42): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_DDR, (43): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_DDR, (44): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_DDR, (45): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# Possible options: <STOP, CMD_SDR, RADDR_SDR, CADDR_SDR, MODE1_SDR, MODE2_SDR, MODE4_SDR, MODE8_SDR, WRITE_SDR,
# READ_SDR, LEARN_SDR, DATSZ_SDR, DUMMY_SDR, DUMMY_RWDS_SDR, JMP_ON_CS, CMD_DDR, RADDR_DDR, CADDR_DDR, MODE1_DDR,
# MODE2_DDR, MODE4_DDR, MODE8_DDR, WRITE_DDR, READ_DDR, LEARN_DDR, DATSZ_DDR, DUMMY_DDR, DUMMY_RWDS_DDR>
OPERATION_CODE: STOP
lookupTable_seq13_instr1:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq13_instr2:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq13_instr3:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq13_instr4:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq13_instr5:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq13_instr6:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq13_instr7:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
# ----------------------------------===== lookupTable_seq14_instr0 [Optional] =====-----------------------------------
# Description: Offset: 0x00000160, Width: 16b; Lookup table holds Flash command sequences 14, instruction 0
lookupTable_seq14_instr0:
# ------------------------------------------===== OPERAND [Optional] =====------------------------------------------
# Description: Offset: 0b, Width: 8b, Instruction operand. Its values depends on used instruction
OPERAND: 0
# -----------------------------------------===== NUM_PADS [Optional] =====------------------------------------------
# Description: Offset: 8b, Width: 2b, Number of pads used by instruction. Some instructions ignores this parameter.
# - 1PAD, (0): Single mode. One pad is used.
# - 2PAD, (1): Dual mode. Two pads are used.
# - 4PAD, (2): Quad mode. Four pads are used.
# - 8PAD, (3): Octal mode. Eight pads are used.
# Possible options: <1PAD, 2PAD, 4PAD, 8PAD>
NUM_PADS: 1PAD
# --------------------------------------===== OPERATION_CODE [Optional] =====---------------------------------------
# Description: Offset: 10b, Width: 6b, Instruction operation code.
# - STOP, (0): Stop execution and de-assert CS. Then, the next command sequence (to the same flash device) starts
# from instruction pointer 0.
# - CMD_SDR, (1): Transmit command code to Flash.
# - RADDR_SDR, (2): Transmit row address to Flash.
# - CADDR_SDR, (3): Transmit column address to Flash.
# - MODE1_SDR, (4): Transmit mode bits to Flash.
# - MODE2_SDR, (5): Transmit mode bits to Flash.
# - MODE4_SDR, (6): Transmit mode bits to Flash.
# - MODE8_SDR, (7): Transmit mode bits to Flash.
# - WRITE_SDR, (8): Transmit program data to Flash device.
# - READ_SDR, (9): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_SDR, (10): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_SDR, (11): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_SDR, (12): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_SDR, (13): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# - JMP_ON_CS, (31): Stop execution, de-assert CS and save operand[7:0] as the instruction start pointer for next
# sequence.Normally this instruction is used to support Execute-In-Place enhanced mode. See XIP enhanced mode for
# more details.This instruction is only allowed for AHB read commands. There is interrupt status bit set
# (INTR[IPCMDERR] or INTR[AHBCMDERR]) when using this instruction in IP command or AHB write command.
# - CMD_DDR, (33): Transmit command code to Flash.
# - RADDR_DDR, (34): Transmit row address to Flash.
# - CADDR_DDR, (35): Transmit column address to Flash.
# - MODE1_DDR, (36): Transmit mode bits to Flash.
# - MODE2_DDR, (37): Transmit mode bits to Flash.
# - MODE4_DDR, (38): Transmit mode bits to Flash.
# - MODE8_DDR, (39): Transmit mode bits to Flash.
# - WRITE_DDR, (40): Transmit program data to Flash device.
# - READ_DDR, (41): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_DDR, (42): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_DDR, (43): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_DDR, (44): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_DDR, (45): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# Possible options: <STOP, CMD_SDR, RADDR_SDR, CADDR_SDR, MODE1_SDR, MODE2_SDR, MODE4_SDR, MODE8_SDR, WRITE_SDR,
# READ_SDR, LEARN_SDR, DATSZ_SDR, DUMMY_SDR, DUMMY_RWDS_SDR, JMP_ON_CS, CMD_DDR, RADDR_DDR, CADDR_DDR, MODE1_DDR,
# MODE2_DDR, MODE4_DDR, MODE8_DDR, WRITE_DDR, READ_DDR, LEARN_DDR, DATSZ_DDR, DUMMY_DDR, DUMMY_RWDS_DDR>
OPERATION_CODE: STOP
lookupTable_seq14_instr1:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq14_instr2:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq14_instr3:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq14_instr4:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq14_instr5:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq14_instr6:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq14_instr7:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
# ----------------------------------===== lookupTable_seq15_instr0 [Optional] =====-----------------------------------
# Description: Offset: 0x00000170, Width: 16b; Lookup table holds Flash command sequences 15, instruction 0
lookupTable_seq15_instr0:
# ------------------------------------------===== OPERAND [Optional] =====------------------------------------------
# Description: Offset: 0b, Width: 8b, Instruction operand. Its values depends on used instruction
OPERAND: 0
# -----------------------------------------===== NUM_PADS [Optional] =====------------------------------------------
# Description: Offset: 8b, Width: 2b, Number of pads used by instruction. Some instructions ignores this parameter.
# - 1PAD, (0): Single mode. One pad is used.
# - 2PAD, (1): Dual mode. Two pads are used.
# - 4PAD, (2): Quad mode. Four pads are used.
# - 8PAD, (3): Octal mode. Eight pads are used.
# Possible options: <1PAD, 2PAD, 4PAD, 8PAD>
NUM_PADS: 1PAD
# --------------------------------------===== OPERATION_CODE [Optional] =====---------------------------------------
# Description: Offset: 10b, Width: 6b, Instruction operation code.
# - STOP, (0): Stop execution and de-assert CS. Then, the next command sequence (to the same flash device) starts
# from instruction pointer 0.
# - CMD_SDR, (1): Transmit command code to Flash.
# - RADDR_SDR, (2): Transmit row address to Flash.
# - CADDR_SDR, (3): Transmit column address to Flash.
# - MODE1_SDR, (4): Transmit mode bits to Flash.
# - MODE2_SDR, (5): Transmit mode bits to Flash.
# - MODE4_SDR, (6): Transmit mode bits to Flash.
# - MODE8_SDR, (7): Transmit mode bits to Flash.
# - WRITE_SDR, (8): Transmit program data to Flash device.
# - READ_SDR, (9): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_SDR, (10): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_SDR, (11): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_SDR, (12): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_SDR, (13): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# - JMP_ON_CS, (31): Stop execution, de-assert CS and save operand[7:0] as the instruction start pointer for next
# sequence.Normally this instruction is used to support Execute-In-Place enhanced mode. See XIP enhanced mode for
# more details.This instruction is only allowed for AHB read commands. There is interrupt status bit set
# (INTR[IPCMDERR] or INTR[AHBCMDERR]) when using this instruction in IP command or AHB write command.
# - CMD_DDR, (33): Transmit command code to Flash.
# - RADDR_DDR, (34): Transmit row address to Flash.
# - CADDR_DDR, (35): Transmit column address to Flash.
# - MODE1_DDR, (36): Transmit mode bits to Flash.
# - MODE2_DDR, (37): Transmit mode bits to Flash.
# - MODE4_DDR, (38): Transmit mode bits to Flash.
# - MODE8_DDR, (39): Transmit mode bits to Flash.
# - WRITE_DDR, (40): Transmit program data to Flash device.
# - READ_DDR, (41): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_DDR, (42): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_DDR, (43): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_DDR, (44): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_DDR, (45): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# Possible options: <STOP, CMD_SDR, RADDR_SDR, CADDR_SDR, MODE1_SDR, MODE2_SDR, MODE4_SDR, MODE8_SDR, WRITE_SDR,
# READ_SDR, LEARN_SDR, DATSZ_SDR, DUMMY_SDR, DUMMY_RWDS_SDR, JMP_ON_CS, CMD_DDR, RADDR_DDR, CADDR_DDR, MODE1_DDR,
# MODE2_DDR, MODE4_DDR, MODE8_DDR, WRITE_DDR, READ_DDR, LEARN_DDR, DATSZ_DDR, DUMMY_DDR, DUMMY_RWDS_DDR>
OPERATION_CODE: STOP
lookupTable_seq15_instr1:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq15_instr2:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq15_instr3:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq15_instr4:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq15_instr5:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq15_instr6:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq15_instr7:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
# ---------------------------------------===== lutCustomSeq_0 [Optional] =====----------------------------------------
# Description: Offset: 0x00000180, Width: 32b; [0x180-0x1af] Customizable LUT Sequences
lutCustomSeq_0:
# ------------------------------------------===== seqNum [Optional] =====-------------------------------------------
# Description: Offset: 0b, Width: 8b, Sequence Number, valid number: 1-16
seqNum: 0
# -------------------------------------------===== seqId [Optional] =====-------------------------------------------
# Description: Offset: 8b, Width: 8b, Sequence Index, valid number: 0-15
seqId: 0
# -----------------------------------------===== reserved [Optional] =====------------------------------------------
# Description: Offset: 16b, Width: 16b, N/A
reserved: 0
# ---------------------------------------===== lutCustomSeq_1 [Optional] =====----------------------------------------
# Description: Offset: 0x00000184, Width: 32b; [0x180-0x1af] Customizable LUT Sequences
lutCustomSeq_1:
# ------------------------------------------===== seqNum [Optional] =====-------------------------------------------
# Description: Offset: 0b, Width: 8b, Sequence Number, valid number: 1-16
seqNum: 0
# -------------------------------------------===== seqId [Optional] =====-------------------------------------------
# Description: Offset: 8b, Width: 8b, Sequence Index, valid number: 0-15
seqId: 0
# -----------------------------------------===== reserved [Optional] =====------------------------------------------
# Description: Offset: 16b, Width: 16b, N/A
reserved: 0
# ---------------------------------------===== lutCustomSeq_2 [Optional] =====----------------------------------------
# Description: Offset: 0x00000188, Width: 32b; [0x180-0x1af] Customizable LUT Sequences
lutCustomSeq_2:
# ------------------------------------------===== seqNum [Optional] =====-------------------------------------------
# Description: Offset: 0b, Width: 8b, Sequence Number, valid number: 1-16
seqNum: 0
# -------------------------------------------===== seqId [Optional] =====-------------------------------------------
# Description: Offset: 8b, Width: 8b, Sequence Index, valid number: 0-15
seqId: 0
# -----------------------------------------===== reserved [Optional] =====------------------------------------------
# Description: Offset: 16b, Width: 16b, N/A
reserved: 0
# ---------------------------------------===== lutCustomSeq_3 [Optional] =====----------------------------------------
# Description: Offset: 0x0000018C, Width: 32b; [0x180-0x1af] Customizable LUT Sequences
lutCustomSeq_3:
# ------------------------------------------===== seqNum [Optional] =====-------------------------------------------
# Description: Offset: 0b, Width: 8b, Sequence Number, valid number: 1-16
seqNum: 0
# -------------------------------------------===== seqId [Optional] =====-------------------------------------------
# Description: Offset: 8b, Width: 8b, Sequence Index, valid number: 0-15
seqId: 0
# -----------------------------------------===== reserved [Optional] =====------------------------------------------
# Description: Offset: 16b, Width: 16b, N/A
reserved: 0
# ---------------------------------------===== lutCustomSeq_4 [Optional] =====----------------------------------------
# Description: Offset: 0x00000190, Width: 32b; [0x180-0x1af] Customizable LUT Sequences
lutCustomSeq_4:
# ------------------------------------------===== seqNum [Optional] =====-------------------------------------------
# Description: Offset: 0b, Width: 8b, Sequence Number, valid number: 1-16
seqNum: 0
# -------------------------------------------===== seqId [Optional] =====-------------------------------------------
# Description: Offset: 8b, Width: 8b, Sequence Index, valid number: 0-15
seqId: 0
# -----------------------------------------===== reserved [Optional] =====------------------------------------------
# Description: Offset: 16b, Width: 16b, N/A
reserved: 0
# ---------------------------------------===== lutCustomSeq_5 [Optional] =====----------------------------------------
# Description: Offset: 0x00000194, Width: 32b; [0x180-0x1af] Customizable LUT Sequences
lutCustomSeq_5:
# ------------------------------------------===== seqNum [Optional] =====-------------------------------------------
# Description: Offset: 0b, Width: 8b, Sequence Number, valid number: 1-16
seqNum: 0
# -------------------------------------------===== seqId [Optional] =====-------------------------------------------
# Description: Offset: 8b, Width: 8b, Sequence Index, valid number: 0-15
seqId: 0
# -----------------------------------------===== reserved [Optional] =====------------------------------------------
# Description: Offset: 16b, Width: 16b, N/A
reserved: 0
# ---------------------------------------===== lutCustomSeq_6 [Optional] =====----------------------------------------
# Description: Offset: 0x00000198, Width: 32b; [0x180-0x1af] Customizable LUT Sequences
lutCustomSeq_6:
# ------------------------------------------===== seqNum [Optional] =====-------------------------------------------
# Description: Offset: 0b, Width: 8b, Sequence Number, valid number: 1-16
seqNum: 0
# -------------------------------------------===== seqId [Optional] =====-------------------------------------------
# Description: Offset: 8b, Width: 8b, Sequence Index, valid number: 0-15
seqId: 0
# -----------------------------------------===== reserved [Optional] =====------------------------------------------
# Description: Offset: 16b, Width: 16b, N/A
reserved: 0
# ---------------------------------------===== lutCustomSeq_7 [Optional] =====----------------------------------------
# Description: Offset: 0x0000019C, Width: 32b; [0x180-0x1af] Customizable LUT Sequences
lutCustomSeq_7:
# ------------------------------------------===== seqNum [Optional] =====-------------------------------------------
# Description: Offset: 0b, Width: 8b, Sequence Number, valid number: 1-16
seqNum: 0
# -------------------------------------------===== seqId [Optional] =====-------------------------------------------
# Description: Offset: 8b, Width: 8b, Sequence Index, valid number: 0-15
seqId: 0
# -----------------------------------------===== reserved [Optional] =====------------------------------------------
# Description: Offset: 16b, Width: 16b, N/A
reserved: 0
# ---------------------------------------===== lutCustomSeq_8 [Optional] =====----------------------------------------
# Description: Offset: 0x000001A0, Width: 32b; [0x180-0x1af] Customizable LUT Sequences
lutCustomSeq_8:
# ------------------------------------------===== seqNum [Optional] =====-------------------------------------------
# Description: Offset: 0b, Width: 8b, Sequence Number, valid number: 1-16
seqNum: 0
# -------------------------------------------===== seqId [Optional] =====-------------------------------------------
# Description: Offset: 8b, Width: 8b, Sequence Index, valid number: 0-15
seqId: 0
# -----------------------------------------===== reserved [Optional] =====------------------------------------------
# Description: Offset: 16b, Width: 16b, N/A
reserved: 0
# ---------------------------------------===== lutCustomSeq_9 [Optional] =====----------------------------------------
# Description: Offset: 0x000001A4, Width: 32b; [0x180-0x1af] Customizable LUT Sequences
lutCustomSeq_9:
# ------------------------------------------===== seqNum [Optional] =====-------------------------------------------
# Description: Offset: 0b, Width: 8b, Sequence Number, valid number: 1-16
seqNum: 0
# -------------------------------------------===== seqId [Optional] =====-------------------------------------------
# Description: Offset: 8b, Width: 8b, Sequence Index, valid number: 0-15
seqId: 0
# -----------------------------------------===== reserved [Optional] =====------------------------------------------
# Description: Offset: 16b, Width: 16b, N/A
reserved: 0
# ---------------------------------------===== lutCustomSeq_10 [Optional] =====---------------------------------------
# Description: Offset: 0x000001A8, Width: 32b; [0x180-0x1af] Customizable LUT Sequences
lutCustomSeq_10:
# ------------------------------------------===== seqNum [Optional] =====-------------------------------------------
# Description: Offset: 0b, Width: 8b, Sequence Number, valid number: 1-16
seqNum: 0
# -------------------------------------------===== seqId [Optional] =====-------------------------------------------
# Description: Offset: 8b, Width: 8b, Sequence Index, valid number: 0-15
seqId: 0
# -----------------------------------------===== reserved [Optional] =====------------------------------------------
# Description: Offset: 16b, Width: 16b, N/A
reserved: 0
# ---------------------------------------===== lutCustomSeq_11 [Optional] =====---------------------------------------
# Description: Offset: 0x000001AC, Width: 32b; [0x180-0x1af] Customizable LUT Sequences
lutCustomSeq_11:
# ------------------------------------------===== seqNum [Optional] =====-------------------------------------------
# Description: Offset: 0b, Width: 8b, Sequence Number, valid number: 1-16
seqNum: 0
# -------------------------------------------===== seqId [Optional] =====-------------------------------------------
# Description: Offset: 8b, Width: 8b, Sequence Index, valid number: 0-15
seqId: 0
# -----------------------------------------===== reserved [Optional] =====------------------------------------------
# Description: Offset: 16b, Width: 16b, N/A
reserved: 0
# ------------------------------------------===== dll0CrVal [Optional] =====------------------------------------------
# Description: Offset: 0x000001B0, Width: 32b; [0x1b0-0x1b3] Customizable DLL0CR setting
dll0CrVal: '0x00000000'
# ------------------------------------------===== dll1CrVal [Optional] =====------------------------------------------
# Description: Offset: 0x000001B4, Width: 32b; [0x1b4-0x1b7] Customizable DLL1CR setting
dll1CrVal: '0x00000000'
# -----------------------------------------===== reserved4_0 [Optional] =====-----------------------------------------
# Description: Offset: 0x000001B8, Width: 32b; [0x1b8-0x1bf] Reserved for future use
reserved4_0: '0x00000000'
# -----------------------------------------===== reserved4_1 [Optional] =====-----------------------------------------
# Description: Offset: 0x000001BC, Width: 32b; [0x1b8-0x1bf] Reserved for future use
reserved4_1: '0x00000000'
# ------------------------------------------===== pageSize [Optional] =====-------------------------------------------
# Description: Offset: 0x000001C0, Width: 32b; Page size of Serial NOR
pageSize: '0x00000000'
# -----------------------------------------===== sectorSize [Optional] =====------------------------------------------
# Description: Offset: 0x000001C4, Width: 32b; Sector size of Serial NOR
sectorSize: '0x00000000'
# -------------------------------------===== ipcmdSerialClkFreq [Optional] =====--------------------------------------
# Description: Offset: 0x000001C8, Width: 8b; Clock frequency for IP command
ipcmdSerialClkFreq: '0x00'
# -------------------------------------===== isUniformBlockSize [Optional] =====--------------------------------------
# Description: Offset: 0x000001C9, Width: 8b; Sector/Block size is the same
isUniformBlockSize: '0x00'
# -------------------------------------===== isDataOrderSwapped [Optional] =====--------------------------------------
# Description: Offset: 0x000001CA, Width: 8b; Data order (D0, D1, D2, D3) is swapped (D1,D0, D3, D2)
isDataOrderSwapped: '0x00'
# -----------------------------------------===== reserved0_0 [Optional] =====-----------------------------------------
# Description: Offset: 0x000001CB, Width: 8b; Reserved for future use
reserved0_0: '0x00'
# ----------------------------------------===== serialNorType [Optional] =====----------------------------------------
# Description: Offset: 0x000001CC, Width: 8b; Serial NOR Flash type: 0/1/2/3
serialNorType: '0x00'
# --------------------------------------===== needExitNoCmdMode [Optional] =====--------------------------------------
# Description: Offset: 0x000001CD, Width: 8b; Need to exit NoCmd mode before other IP command
needExitNoCmdMode: '0x00'
# ------------------------------------===== halfClkForNonReadCmd [Optional] =====-------------------------------------
# Description: Offset: 0x000001CE, Width: 8b; Half the Serial Clock for non-read command: true/false
halfClkForNonReadCmd: '0x00'
# ------------------------------------===== needRestoreNoCmdMode [Optional] =====-------------------------------------
# Description: Offset: 0x000001CF, Width: 8b; Need to Restore NoCmd mode after IP command execution
needRestoreNoCmdMode: '0x00'
# ------------------------------------------===== blockSize [Optional] =====------------------------------------------
# Description: Offset: 0x000001D0, Width: 32b; Block size
blockSize: '0x00000000'
# ----------------------------------------===== flashStateCtx [Optional] =====----------------------------------------
# Description: Offset: 0x000001D4, Width: 32b; Flash State Context
flashStateCtx: '0x00000000'
# -----------------------------------------===== reserve2_0 [Optional] =====------------------------------------------
# Description: Offset: 0x000001D8, Width: 32b; Reserved for future use
reserve2_0: '0x00000000'
# -----------------------------------------===== reserve2_1 [Optional] =====------------------------------------------
# Description: Offset: 0x000001DC, Width: 32b; Reserved for future use
reserve2_1: '0x00000000'
# -----------------------------------------===== reserve2_2 [Optional] =====------------------------------------------
# Description: Offset: 0x000001E0, Width: 32b; Reserved for future use
reserve2_2: '0x00000000'
# -----------------------------------------===== reserve2_3 [Optional] =====------------------------------------------
# Description: Offset: 0x000001E4, Width: 32b; Reserved for future use
reserve2_3: '0x00000000'
# -----------------------------------------===== reserve2_4 [Optional] =====------------------------------------------
# Description: Offset: 0x000001E8, Width: 32b; Reserved for future use
reserve2_4: '0x00000000'
# -----------------------------------------===== reserve2_5 [Optional] =====------------------------------------------
# Description: Offset: 0x000001EC, Width: 32b; Reserved for future use
reserve2_5: '0x00000000'
# -----------------------------------------===== reserve2_6 [Optional] =====------------------------------------------
# Description: Offset: 0x000001F0, Width: 32b; Reserved for future use
reserve2_6: '0x00000000'
# -----------------------------------------===== reserve2_7 [Optional] =====------------------------------------------
# Description: Offset: 0x000001F4, Width: 32b; Reserved for future use
reserve2_7: '0x00000000'
# -----------------------------------------===== reserve2_8 [Optional] =====------------------------------------------
# Description: Offset: 0x000001F8, Width: 32b; Reserved for future use
reserve2_8: '0x00000000'
# -----------------------------------------===== reserve2_9 [Optional] =====------------------------------------------
# Description: Offset: 0x000001FC, Width: 32b; Reserved for future use
reserve2_9: '0x00000000'
FCB for mcxn546, Revision: a1 and flexspi_nor#
FCB for mcxn546, Revision: a1 and flexspi_nor JSON schema
FCB for mcxn546, Revision: a1 and flexspi_nor YAML configuration template
# ================================== FCB for mcxn546, Revision: a1 and flexspi_nor ===================================
# ======================================================================================================================
# == FCB for mcxn546, Revision: a1 and flexspi_nor ==
# ======================================================================================================================
# -------------------------------------===== The chip family name [Required] =====--------------------------------------
# Description: NXP chip family identifier.
family: CHOOSE_FROM_TABLE
# -----------------------------------------===== MCU revision [Optional] =====------------------------------------------
# Description: Revision of silicon. The 'latest' name, means most current revision.
# Possible options: <a0, a1, latest>
revision: a1
# ------------------------------------------===== Memory type [Required] =====------------------------------------------
# Description: Specify type of memory used by FCB description.
# Possible options: <flexspi_nor>
type: flexspi_nor
# --------------------------------------------===== mcxn546 [Required] =====--------------------------------------------
fcb_settings:
# ---------------------------------------------===== tag [Optional] =====---------------------------------------------
# Description: Offset: 0x00000000, Width: 32b; [0x000-0x003] Tag, fixed value 0x42464346UL
tag: '0x42464346'
# -------------------------------------------===== version [Optional] =====-------------------------------------------
# Description: Offset: 0x00000004, Width: 32b; [0x004-0x007] Version,[31:24] -'V', [23:16] - Major, [15:8] - Minor,
# [7:0] - bugfix
version: '0x56010400'
# ------------------------------------------===== reserved0 [Optional] =====------------------------------------------
# Description: Offset: 0x00000008, Width: 32b; [0x008-0x00b] Reserved for future use
reserved0: '0x00000000'
# --------------------------------------===== readSampleClkSrc [Optional] =====---------------------------------------
# Description: Offset: 0x0000000C, Width: 8b; [0x00c-0x00c] Read Sample Clock Source, valid value: 0/1/3
readSampleClkSrc: '0x00'
# -----------------------------------------===== csHoldTime [Optional] =====------------------------------------------
# Description: Offset: 0x0000000D, Width: 8b; [0x00d-0x00d] CS hold time, default value: 3
csHoldTime: '0x00'
# -----------------------------------------===== csSetupTime [Optional] =====-----------------------------------------
# Description: Offset: 0x0000000E, Width: 8b; [0x00e-0x00e] CS setup time, default value: 3
csSetupTime: '0x00'
# -------------------------------------===== columnAddressWidth [Optional] =====--------------------------------------
# Description: Offset: 0x0000000F, Width: 8b; [0x00f-0x00f] Column Address with, for HyperBus protocol, it is fixed
# to 3, For Serial NAND, need to refer to datasheet
columnAddressWidth: '0x00'
# -------------------------------------===== deviceModeCfgEnable [Optional] =====-------------------------------------
# Description: Offset: 0x00000010, Width: 8b; [0x010-0x010] Device Mode Configure enable flag, 1 - Enable, 0 -
# Disable
deviceModeCfgEnable: '0x00'
# ---------------------------------------===== deviceModeType [Optional] =====----------------------------------------
# Description: Offset: 0x00000011, Width: 8b; [0x011-0x011] Specify the configuration command type:Quad Enable,
# DPI/QPI/OPI switch, Generic configuration, etc.
deviceModeType: '0x00'
# -------------------------------------===== waitTimeCfgCommands [Optional] =====-------------------------------------
# Description: Offset: 0x00000012, Width: 16b; [0x012-0x013] Wait time for all configuration commands, unit: 100us,
# Used for DPI/QPI/OPI switch or reset command
waitTimeCfgCommands: '0x0000'
# ----------------------------------------===== deviceModeSeq [Optional] =====----------------------------------------
# Description: Offset: 0x00000014, Width: 32b; [0x014-0x017] Device mode sequence info, [7:0] - LUT sequence id,
# [15:8] - LUt sequence number, [31:16] Reserved
deviceModeSeq:
# ------------------------------------------===== seqNum [Optional] =====-------------------------------------------
# Description: Offset: 0b, Width: 8b, Sequence Number, valid number: 1-16
seqNum: 0
# -------------------------------------------===== seqId [Optional] =====-------------------------------------------
# Description: Offset: 8b, Width: 8b, Sequence Index, valid number: 0-15
seqId: 0
# -----------------------------------------===== reserved [Optional] =====------------------------------------------
# Description: Offset: 16b, Width: 16b, N/A
reserved: 0
# ----------------------------------------===== deviceModeArg [Optional] =====----------------------------------------
# Description: Offset: 0x00000018, Width: 32b; [0x018-0x01b] Argument/Parameter for device configuration
deviceModeArg: '0x00000000'
# ---------------------------------------===== configCmdEnable [Optional] =====---------------------------------------
# Description: Offset: 0x0000001C, Width: 8b; [0x01c-0x01c] Configure command Enable Flag, 1 - Enable, 0 - Disable
configCmdEnable: '0x00'
# --------------------------------------===== configModeType_0 [Optional] =====---------------------------------------
# Description: Offset: 0x0000001D, Width: 8b; [0x01d-0x01f] Configure Mode Type, similar as deviceModeTpe
configModeType_0: '0x00'
# --------------------------------------===== configModeType_1 [Optional] =====---------------------------------------
# Description: Offset: 0x0000001E, Width: 8b; [0x01d-0x01f] Configure Mode Type, similar as deviceModeTpe
configModeType_1: '0x00'
# --------------------------------------===== configModeType_2 [Optional] =====---------------------------------------
# Description: Offset: 0x0000001F, Width: 8b; [0x01d-0x01f] Configure Mode Type, similar as deviceModeTpe
configModeType_2: '0x00'
# ---------------------------------------===== configCmdSeqs_0 [Optional] =====---------------------------------------
# Description: Offset: 0x00000020, Width: 32b; [0x020-0x02b] Sequence info for Device Configuration command, similar
# as deviceModeSeq
configCmdSeqs_0:
# ------------------------------------------===== seqNum [Optional] =====-------------------------------------------
# Description: Offset: 0b, Width: 8b, Sequence Number, valid number: 1-16
seqNum: 0
# -------------------------------------------===== seqId [Optional] =====-------------------------------------------
# Description: Offset: 8b, Width: 8b, Sequence Index, valid number: 0-15
seqId: 0
# -----------------------------------------===== reserved [Optional] =====------------------------------------------
# Description: Offset: 16b, Width: 16b, N/A
reserved: 0
# ---------------------------------------===== configCmdSeqs_1 [Optional] =====---------------------------------------
# Description: Offset: 0x00000024, Width: 32b; [0x020-0x02b] Sequence info for Device Configuration command, similar
# as deviceModeSeq
configCmdSeqs_1:
# ------------------------------------------===== seqNum [Optional] =====-------------------------------------------
# Description: Offset: 0b, Width: 8b, Sequence Number, valid number: 1-16
seqNum: 0
# -------------------------------------------===== seqId [Optional] =====-------------------------------------------
# Description: Offset: 8b, Width: 8b, Sequence Index, valid number: 0-15
seqId: 0
# -----------------------------------------===== reserved [Optional] =====------------------------------------------
# Description: Offset: 16b, Width: 16b, N/A
reserved: 0
# ---------------------------------------===== configCmdSeqs_2 [Optional] =====---------------------------------------
# Description: Offset: 0x00000028, Width: 32b; [0x020-0x02b] Sequence info for Device Configuration command, similar
# as deviceModeSeq
configCmdSeqs_2:
# ------------------------------------------===== seqNum [Optional] =====-------------------------------------------
# Description: Offset: 0b, Width: 8b, Sequence Number, valid number: 1-16
seqNum: 0
# -------------------------------------------===== seqId [Optional] =====-------------------------------------------
# Description: Offset: 8b, Width: 8b, Sequence Index, valid number: 0-15
seqId: 0
# -----------------------------------------===== reserved [Optional] =====------------------------------------------
# Description: Offset: 16b, Width: 16b, N/A
reserved: 0
# ------------------------------------------===== reserved1 [Optional] =====------------------------------------------
# Description: Offset: 0x0000002C, Width: 32b; [0x02c-0x02f] Reserved for future use
reserved1: '0x00000000'
# ---------------------------------------===== configCmdArgs_0 [Optional] =====---------------------------------------
# Description: Offset: 0x00000030, Width: 32b; [0x030-0x03b] Arguments/Parameters for device Configuration commands
configCmdArgs_0: '0x00000000'
# ---------------------------------------===== configCmdArgs_1 [Optional] =====---------------------------------------
# Description: Offset: 0x00000034, Width: 32b; [0x030-0x03b] Arguments/Parameters for device Configuration commands
configCmdArgs_1: '0x00000000'
# ---------------------------------------===== configCmdArgs_2 [Optional] =====---------------------------------------
# Description: Offset: 0x00000038, Width: 32b; [0x030-0x03b] Arguments/Parameters for device Configuration commands
configCmdArgs_2: '0x00000000'
# ------------------------------------------===== reserved2 [Optional] =====------------------------------------------
# Description: Offset: 0x0000003C, Width: 32b; [0x03c-0x03f] Reserved for future use
reserved2: '0x00000000'
# ------------------------------------===== controllerMiscOption [Optional] =====-------------------------------------
# Description: Offset: 0x00000040, Width: 32b; [0x040-0x043] Controller Misc Options, see Misc feature bit
# definitions for more details
controllerMiscOption: '0x00000000'
# -----------------------------------------===== deviceType [Optional] =====------------------------------------------
# Description: Offset: 0x00000044, Width: 8b; [0x044-0x044] Device Type: See Flash Type Definition for more details
deviceType: '0x00'
# ----------------------------------------===== sflashPadType [Optional] =====----------------------------------------
# Description: Offset: 0x00000045, Width: 8b; [0x045-0x045] Serial Flash Pad Type: 1 - Single, 2 - Dual, 4 - Quad, 8
# - Octal
sflashPadType: '0x00'
# ----------------------------------------===== serialClkFreq [Optional] =====----------------------------------------
# Description: Offset: 0x00000046, Width: 8b; [0x046-0x046] Serial Flash Frequency, device specific definitions, See
# System Boot Chapter for more details
serialClkFreq: '0x00'
# -------------------------------------===== lutCustomSeqEnable [Optional] =====--------------------------------------
# Description: Offset: 0x00000047, Width: 8b; [0x047-0x047] LUT customization Enable, it is required if the
# program/erase cannot be done using 1 LUT sequence, currently, only applicable to HyperFLASH
lutCustomSeqEnable: '0x00'
# -----------------------------------------===== reserved3_0 [Optional] =====-----------------------------------------
# Description: Offset: 0x00000048, Width: 32b; [0x048-0x04f] Reserved for future use
reserved3_0: '0x00000000'
# -----------------------------------------===== reserved3_1 [Optional] =====-----------------------------------------
# Description: Offset: 0x0000004C, Width: 32b; [0x048-0x04f] Reserved for future use
reserved3_1: '0x00000000'
# ----------------------------------------===== sflashA1Size [Optional] =====-----------------------------------------
# Description: Offset: 0x00000050, Width: 32b; [0x050-0x053] Size of Flash connected to A1
sflashA1Size: '0x00000000'
# ----------------------------------------===== sflashA2Size [Optional] =====-----------------------------------------
# Description: Offset: 0x00000054, Width: 32b; [0x054-0x057] Size of Flash connected to A2
sflashA2Size: '0x00000000'
# ----------------------------------------===== sflashB1Size [Optional] =====-----------------------------------------
# Description: Offset: 0x00000058, Width: 32b; [0x058-0x05b] Size of Flash connected to B1
sflashB1Size: '0x00000000'
# ----------------------------------------===== sflashB2Size [Optional] =====-----------------------------------------
# Description: Offset: 0x0000005C, Width: 32b; [0x05c-0x05f] Size of Flash connected to B2
sflashB2Size: '0x00000000'
# ------------------------------------===== csPadSettingOverride [Optional] =====-------------------------------------
# Description: Offset: 0x00000060, Width: 32b; [0x060-0x063] CS pad setting override value
csPadSettingOverride: '0x00000000'
# -----------------------------------===== sclkPadSettingOverride [Optional] =====------------------------------------
# Description: Offset: 0x00000064, Width: 32b; [0x064-0x067] SCK pad setting override value
sclkPadSettingOverride: '0x00000000'
# -----------------------------------===== dataPadSettingOverride [Optional] =====------------------------------------
# Description: Offset: 0x00000068, Width: 32b; [0x068-0x06b] data pad setting override value
dataPadSettingOverride: '0x00000000'
# ------------------------------------===== dqsPadSettingOverride [Optional] =====------------------------------------
# Description: Offset: 0x0000006C, Width: 32b; [0x06c-0x06f] DQS pad setting override value
dqsPadSettingOverride: '0x00000000'
# -----------------------------------------===== timeoutInMs [Optional] =====-----------------------------------------
# Description: Offset: 0x00000070, Width: 32b; [0x070-0x073] Timeout threshold for read status command
timeoutInMs: '0x00000000'
# ---------------------------------------===== commandInterval [Optional] =====---------------------------------------
# Description: Offset: 0x00000074, Width: 32b; [0x074-0x077] CS deselect interval between two commands
commandInterval: '0x00000000'
# ---------------------------------------===== dataValidTime_0 [Optional] =====---------------------------------------
# Description: Offset: 0x00000078, Width: 16b; [0x078-0x07b] CLK edge to data valid time for PORT A and PORT B
dataValidTime_0: '0x0000'
# ---------------------------------------===== dataValidTime_1 [Optional] =====---------------------------------------
# Description: Offset: 0x0000007A, Width: 16b; [0x078-0x07b] CLK edge to data valid time for PORT A and PORT B
dataValidTime_1: '0x0000'
# -----------------------------------------===== busyOffset [Optional] =====------------------------------------------
# Description: Offset: 0x0000007C, Width: 16b; [0x07c-0x07d] Busy offset, valid value: 0-31
busyOffset: '0x0000'
# ---------------------------------------===== busyBitPolarity [Optional] =====---------------------------------------
# Description: Offset: 0x0000007E, Width: 16b; [0x07e-0x07f] Busy flag polarity, 0 - busy flag is 1 when flash device
# is busy, 1 - busy flag is 0 when flash device is busy
busyBitPolarity: '0x0000'
# -----------------------------------===== lookupTable_seq0_instr0 [Optional] =====-----------------------------------
# Description: Offset: 0x00000080, Width: 16b; Lookup table holds Flash command sequences 0, instruction 0
lookupTable_seq0_instr0:
# ------------------------------------------===== OPERAND [Optional] =====------------------------------------------
# Description: Offset: 0b, Width: 8b, Instruction operand. Its values depends on used instruction
OPERAND: 0
# -----------------------------------------===== NUM_PADS [Optional] =====------------------------------------------
# Description: Offset: 8b, Width: 2b, Number of pads used by instruction. Some instructions ignores this parameter.
# - 1PAD, (0): Single mode. One pad is used.
# - 2PAD, (1): Dual mode. Two pads are used.
# - 4PAD, (2): Quad mode. Four pads are used.
# - 8PAD, (3): Octal mode. Eight pads are used.
# Possible options: <1PAD, 2PAD, 4PAD, 8PAD>
NUM_PADS: 1PAD
# --------------------------------------===== OPERATION_CODE [Optional] =====---------------------------------------
# Description: Offset: 10b, Width: 6b, Instruction operation code.
# - STOP, (0): Stop execution and de-assert CS. Then, the next command sequence (to the same flash device) starts
# from instruction pointer 0.
# - CMD_SDR, (1): Transmit command code to Flash.
# - RADDR_SDR, (2): Transmit row address to Flash.
# - CADDR_SDR, (3): Transmit column address to Flash.
# - MODE1_SDR, (4): Transmit mode bits to Flash.
# - MODE2_SDR, (5): Transmit mode bits to Flash.
# - MODE4_SDR, (6): Transmit mode bits to Flash.
# - MODE8_SDR, (7): Transmit mode bits to Flash.
# - WRITE_SDR, (8): Transmit program data to Flash device.
# - READ_SDR, (9): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_SDR, (10): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_SDR, (11): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_SDR, (12): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_SDR, (13): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# - JMP_ON_CS, (31): Stop execution, de-assert CS and save operand[7:0] as the instruction start pointer for next
# sequence.Normally this instruction is used to support Execute-In-Place enhanced mode. See XIP enhanced mode for
# more details.This instruction is only allowed for AHB read commands. There is interrupt status bit set
# (INTR[IPCMDERR] or INTR[AHBCMDERR]) when using this instruction in IP command or AHB write command.
# - CMD_DDR, (33): Transmit command code to Flash.
# - RADDR_DDR, (34): Transmit row address to Flash.
# - CADDR_DDR, (35): Transmit column address to Flash.
# - MODE1_DDR, (36): Transmit mode bits to Flash.
# - MODE2_DDR, (37): Transmit mode bits to Flash.
# - MODE4_DDR, (38): Transmit mode bits to Flash.
# - MODE8_DDR, (39): Transmit mode bits to Flash.
# - WRITE_DDR, (40): Transmit program data to Flash device.
# - READ_DDR, (41): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_DDR, (42): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_DDR, (43): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_DDR, (44): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_DDR, (45): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# Possible options: <STOP, CMD_SDR, RADDR_SDR, CADDR_SDR, MODE1_SDR, MODE2_SDR, MODE4_SDR, MODE8_SDR, WRITE_SDR,
# READ_SDR, LEARN_SDR, DATSZ_SDR, DUMMY_SDR, DUMMY_RWDS_SDR, JMP_ON_CS, CMD_DDR, RADDR_DDR, CADDR_DDR, MODE1_DDR,
# MODE2_DDR, MODE4_DDR, MODE8_DDR, WRITE_DDR, READ_DDR, LEARN_DDR, DATSZ_DDR, DUMMY_DDR, DUMMY_RWDS_DDR>
OPERATION_CODE: STOP
lookupTable_seq0_instr1:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq0_instr2:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq0_instr3:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq0_instr4:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq0_instr5:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq0_instr6:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq0_instr7:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
# -----------------------------------===== lookupTable_seq1_instr0 [Optional] =====-----------------------------------
# Description: Offset: 0x00000090, Width: 16b; Lookup table holds Flash command sequences 1, instruction 0
lookupTable_seq1_instr0:
# ------------------------------------------===== OPERAND [Optional] =====------------------------------------------
# Description: Offset: 0b, Width: 8b, Instruction operand. Its values depends on used instruction
OPERAND: 0
# -----------------------------------------===== NUM_PADS [Optional] =====------------------------------------------
# Description: Offset: 8b, Width: 2b, Number of pads used by instruction. Some instructions ignores this parameter.
# - 1PAD, (0): Single mode. One pad is used.
# - 2PAD, (1): Dual mode. Two pads are used.
# - 4PAD, (2): Quad mode. Four pads are used.
# - 8PAD, (3): Octal mode. Eight pads are used.
# Possible options: <1PAD, 2PAD, 4PAD, 8PAD>
NUM_PADS: 1PAD
# --------------------------------------===== OPERATION_CODE [Optional] =====---------------------------------------
# Description: Offset: 10b, Width: 6b, Instruction operation code.
# - STOP, (0): Stop execution and de-assert CS. Then, the next command sequence (to the same flash device) starts
# from instruction pointer 0.
# - CMD_SDR, (1): Transmit command code to Flash.
# - RADDR_SDR, (2): Transmit row address to Flash.
# - CADDR_SDR, (3): Transmit column address to Flash.
# - MODE1_SDR, (4): Transmit mode bits to Flash.
# - MODE2_SDR, (5): Transmit mode bits to Flash.
# - MODE4_SDR, (6): Transmit mode bits to Flash.
# - MODE8_SDR, (7): Transmit mode bits to Flash.
# - WRITE_SDR, (8): Transmit program data to Flash device.
# - READ_SDR, (9): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_SDR, (10): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_SDR, (11): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_SDR, (12): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_SDR, (13): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# - JMP_ON_CS, (31): Stop execution, de-assert CS and save operand[7:0] as the instruction start pointer for next
# sequence.Normally this instruction is used to support Execute-In-Place enhanced mode. See XIP enhanced mode for
# more details.This instruction is only allowed for AHB read commands. There is interrupt status bit set
# (INTR[IPCMDERR] or INTR[AHBCMDERR]) when using this instruction in IP command or AHB write command.
# - CMD_DDR, (33): Transmit command code to Flash.
# - RADDR_DDR, (34): Transmit row address to Flash.
# - CADDR_DDR, (35): Transmit column address to Flash.
# - MODE1_DDR, (36): Transmit mode bits to Flash.
# - MODE2_DDR, (37): Transmit mode bits to Flash.
# - MODE4_DDR, (38): Transmit mode bits to Flash.
# - MODE8_DDR, (39): Transmit mode bits to Flash.
# - WRITE_DDR, (40): Transmit program data to Flash device.
# - READ_DDR, (41): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_DDR, (42): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_DDR, (43): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_DDR, (44): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_DDR, (45): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# Possible options: <STOP, CMD_SDR, RADDR_SDR, CADDR_SDR, MODE1_SDR, MODE2_SDR, MODE4_SDR, MODE8_SDR, WRITE_SDR,
# READ_SDR, LEARN_SDR, DATSZ_SDR, DUMMY_SDR, DUMMY_RWDS_SDR, JMP_ON_CS, CMD_DDR, RADDR_DDR, CADDR_DDR, MODE1_DDR,
# MODE2_DDR, MODE4_DDR, MODE8_DDR, WRITE_DDR, READ_DDR, LEARN_DDR, DATSZ_DDR, DUMMY_DDR, DUMMY_RWDS_DDR>
OPERATION_CODE: STOP
lookupTable_seq1_instr1:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq1_instr2:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq1_instr3:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq1_instr4:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq1_instr5:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq1_instr6:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq1_instr7:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
# -----------------------------------===== lookupTable_seq2_instr0 [Optional] =====-----------------------------------
# Description: Offset: 0x000000A0, Width: 16b; Lookup table holds Flash command sequences 2, instruction 0
lookupTable_seq2_instr0:
# ------------------------------------------===== OPERAND [Optional] =====------------------------------------------
# Description: Offset: 0b, Width: 8b, Instruction operand. Its values depends on used instruction
OPERAND: 0
# -----------------------------------------===== NUM_PADS [Optional] =====------------------------------------------
# Description: Offset: 8b, Width: 2b, Number of pads used by instruction. Some instructions ignores this parameter.
# - 1PAD, (0): Single mode. One pad is used.
# - 2PAD, (1): Dual mode. Two pads are used.
# - 4PAD, (2): Quad mode. Four pads are used.
# - 8PAD, (3): Octal mode. Eight pads are used.
# Possible options: <1PAD, 2PAD, 4PAD, 8PAD>
NUM_PADS: 1PAD
# --------------------------------------===== OPERATION_CODE [Optional] =====---------------------------------------
# Description: Offset: 10b, Width: 6b, Instruction operation code.
# - STOP, (0): Stop execution and de-assert CS. Then, the next command sequence (to the same flash device) starts
# from instruction pointer 0.
# - CMD_SDR, (1): Transmit command code to Flash.
# - RADDR_SDR, (2): Transmit row address to Flash.
# - CADDR_SDR, (3): Transmit column address to Flash.
# - MODE1_SDR, (4): Transmit mode bits to Flash.
# - MODE2_SDR, (5): Transmit mode bits to Flash.
# - MODE4_SDR, (6): Transmit mode bits to Flash.
# - MODE8_SDR, (7): Transmit mode bits to Flash.
# - WRITE_SDR, (8): Transmit program data to Flash device.
# - READ_SDR, (9): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_SDR, (10): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_SDR, (11): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_SDR, (12): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_SDR, (13): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# - JMP_ON_CS, (31): Stop execution, de-assert CS and save operand[7:0] as the instruction start pointer for next
# sequence.Normally this instruction is used to support Execute-In-Place enhanced mode. See XIP enhanced mode for
# more details.This instruction is only allowed for AHB read commands. There is interrupt status bit set
# (INTR[IPCMDERR] or INTR[AHBCMDERR]) when using this instruction in IP command or AHB write command.
# - CMD_DDR, (33): Transmit command code to Flash.
# - RADDR_DDR, (34): Transmit row address to Flash.
# - CADDR_DDR, (35): Transmit column address to Flash.
# - MODE1_DDR, (36): Transmit mode bits to Flash.
# - MODE2_DDR, (37): Transmit mode bits to Flash.
# - MODE4_DDR, (38): Transmit mode bits to Flash.
# - MODE8_DDR, (39): Transmit mode bits to Flash.
# - WRITE_DDR, (40): Transmit program data to Flash device.
# - READ_DDR, (41): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_DDR, (42): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_DDR, (43): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_DDR, (44): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_DDR, (45): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# Possible options: <STOP, CMD_SDR, RADDR_SDR, CADDR_SDR, MODE1_SDR, MODE2_SDR, MODE4_SDR, MODE8_SDR, WRITE_SDR,
# READ_SDR, LEARN_SDR, DATSZ_SDR, DUMMY_SDR, DUMMY_RWDS_SDR, JMP_ON_CS, CMD_DDR, RADDR_DDR, CADDR_DDR, MODE1_DDR,
# MODE2_DDR, MODE4_DDR, MODE8_DDR, WRITE_DDR, READ_DDR, LEARN_DDR, DATSZ_DDR, DUMMY_DDR, DUMMY_RWDS_DDR>
OPERATION_CODE: STOP
lookupTable_seq2_instr1:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq2_instr2:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq2_instr3:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq2_instr4:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq2_instr5:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq2_instr6:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq2_instr7:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
# -----------------------------------===== lookupTable_seq3_instr0 [Optional] =====-----------------------------------
# Description: Offset: 0x000000B0, Width: 16b; Lookup table holds Flash command sequences 3, instruction 0
lookupTable_seq3_instr0:
# ------------------------------------------===== OPERAND [Optional] =====------------------------------------------
# Description: Offset: 0b, Width: 8b, Instruction operand. Its values depends on used instruction
OPERAND: 0
# -----------------------------------------===== NUM_PADS [Optional] =====------------------------------------------
# Description: Offset: 8b, Width: 2b, Number of pads used by instruction. Some instructions ignores this parameter.
# - 1PAD, (0): Single mode. One pad is used.
# - 2PAD, (1): Dual mode. Two pads are used.
# - 4PAD, (2): Quad mode. Four pads are used.
# - 8PAD, (3): Octal mode. Eight pads are used.
# Possible options: <1PAD, 2PAD, 4PAD, 8PAD>
NUM_PADS: 1PAD
# --------------------------------------===== OPERATION_CODE [Optional] =====---------------------------------------
# Description: Offset: 10b, Width: 6b, Instruction operation code.
# - STOP, (0): Stop execution and de-assert CS. Then, the next command sequence (to the same flash device) starts
# from instruction pointer 0.
# - CMD_SDR, (1): Transmit command code to Flash.
# - RADDR_SDR, (2): Transmit row address to Flash.
# - CADDR_SDR, (3): Transmit column address to Flash.
# - MODE1_SDR, (4): Transmit mode bits to Flash.
# - MODE2_SDR, (5): Transmit mode bits to Flash.
# - MODE4_SDR, (6): Transmit mode bits to Flash.
# - MODE8_SDR, (7): Transmit mode bits to Flash.
# - WRITE_SDR, (8): Transmit program data to Flash device.
# - READ_SDR, (9): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_SDR, (10): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_SDR, (11): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_SDR, (12): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_SDR, (13): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# - JMP_ON_CS, (31): Stop execution, de-assert CS and save operand[7:0] as the instruction start pointer for next
# sequence.Normally this instruction is used to support Execute-In-Place enhanced mode. See XIP enhanced mode for
# more details.This instruction is only allowed for AHB read commands. There is interrupt status bit set
# (INTR[IPCMDERR] or INTR[AHBCMDERR]) when using this instruction in IP command or AHB write command.
# - CMD_DDR, (33): Transmit command code to Flash.
# - RADDR_DDR, (34): Transmit row address to Flash.
# - CADDR_DDR, (35): Transmit column address to Flash.
# - MODE1_DDR, (36): Transmit mode bits to Flash.
# - MODE2_DDR, (37): Transmit mode bits to Flash.
# - MODE4_DDR, (38): Transmit mode bits to Flash.
# - MODE8_DDR, (39): Transmit mode bits to Flash.
# - WRITE_DDR, (40): Transmit program data to Flash device.
# - READ_DDR, (41): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_DDR, (42): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_DDR, (43): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_DDR, (44): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_DDR, (45): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# Possible options: <STOP, CMD_SDR, RADDR_SDR, CADDR_SDR, MODE1_SDR, MODE2_SDR, MODE4_SDR, MODE8_SDR, WRITE_SDR,
# READ_SDR, LEARN_SDR, DATSZ_SDR, DUMMY_SDR, DUMMY_RWDS_SDR, JMP_ON_CS, CMD_DDR, RADDR_DDR, CADDR_DDR, MODE1_DDR,
# MODE2_DDR, MODE4_DDR, MODE8_DDR, WRITE_DDR, READ_DDR, LEARN_DDR, DATSZ_DDR, DUMMY_DDR, DUMMY_RWDS_DDR>
OPERATION_CODE: STOP
lookupTable_seq3_instr1:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq3_instr2:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq3_instr3:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq3_instr4:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq3_instr5:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq3_instr6:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq3_instr7:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
# -----------------------------------===== lookupTable_seq4_instr0 [Optional] =====-----------------------------------
# Description: Offset: 0x000000C0, Width: 16b; Lookup table holds Flash command sequences 4, instruction 0
lookupTable_seq4_instr0:
# ------------------------------------------===== OPERAND [Optional] =====------------------------------------------
# Description: Offset: 0b, Width: 8b, Instruction operand. Its values depends on used instruction
OPERAND: 0
# -----------------------------------------===== NUM_PADS [Optional] =====------------------------------------------
# Description: Offset: 8b, Width: 2b, Number of pads used by instruction. Some instructions ignores this parameter.
# - 1PAD, (0): Single mode. One pad is used.
# - 2PAD, (1): Dual mode. Two pads are used.
# - 4PAD, (2): Quad mode. Four pads are used.
# - 8PAD, (3): Octal mode. Eight pads are used.
# Possible options: <1PAD, 2PAD, 4PAD, 8PAD>
NUM_PADS: 1PAD
# --------------------------------------===== OPERATION_CODE [Optional] =====---------------------------------------
# Description: Offset: 10b, Width: 6b, Instruction operation code.
# - STOP, (0): Stop execution and de-assert CS. Then, the next command sequence (to the same flash device) starts
# from instruction pointer 0.
# - CMD_SDR, (1): Transmit command code to Flash.
# - RADDR_SDR, (2): Transmit row address to Flash.
# - CADDR_SDR, (3): Transmit column address to Flash.
# - MODE1_SDR, (4): Transmit mode bits to Flash.
# - MODE2_SDR, (5): Transmit mode bits to Flash.
# - MODE4_SDR, (6): Transmit mode bits to Flash.
# - MODE8_SDR, (7): Transmit mode bits to Flash.
# - WRITE_SDR, (8): Transmit program data to Flash device.
# - READ_SDR, (9): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_SDR, (10): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_SDR, (11): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_SDR, (12): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_SDR, (13): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# - JMP_ON_CS, (31): Stop execution, de-assert CS and save operand[7:0] as the instruction start pointer for next
# sequence.Normally this instruction is used to support Execute-In-Place enhanced mode. See XIP enhanced mode for
# more details.This instruction is only allowed for AHB read commands. There is interrupt status bit set
# (INTR[IPCMDERR] or INTR[AHBCMDERR]) when using this instruction in IP command or AHB write command.
# - CMD_DDR, (33): Transmit command code to Flash.
# - RADDR_DDR, (34): Transmit row address to Flash.
# - CADDR_DDR, (35): Transmit column address to Flash.
# - MODE1_DDR, (36): Transmit mode bits to Flash.
# - MODE2_DDR, (37): Transmit mode bits to Flash.
# - MODE4_DDR, (38): Transmit mode bits to Flash.
# - MODE8_DDR, (39): Transmit mode bits to Flash.
# - WRITE_DDR, (40): Transmit program data to Flash device.
# - READ_DDR, (41): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_DDR, (42): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_DDR, (43): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_DDR, (44): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_DDR, (45): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# Possible options: <STOP, CMD_SDR, RADDR_SDR, CADDR_SDR, MODE1_SDR, MODE2_SDR, MODE4_SDR, MODE8_SDR, WRITE_SDR,
# READ_SDR, LEARN_SDR, DATSZ_SDR, DUMMY_SDR, DUMMY_RWDS_SDR, JMP_ON_CS, CMD_DDR, RADDR_DDR, CADDR_DDR, MODE1_DDR,
# MODE2_DDR, MODE4_DDR, MODE8_DDR, WRITE_DDR, READ_DDR, LEARN_DDR, DATSZ_DDR, DUMMY_DDR, DUMMY_RWDS_DDR>
OPERATION_CODE: STOP
lookupTable_seq4_instr1:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq4_instr2:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq4_instr3:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq4_instr4:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq4_instr5:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq4_instr6:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq4_instr7:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
# -----------------------------------===== lookupTable_seq5_instr0 [Optional] =====-----------------------------------
# Description: Offset: 0x000000D0, Width: 16b; Lookup table holds Flash command sequences 5, instruction 0
lookupTable_seq5_instr0:
# ------------------------------------------===== OPERAND [Optional] =====------------------------------------------
# Description: Offset: 0b, Width: 8b, Instruction operand. Its values depends on used instruction
OPERAND: 0
# -----------------------------------------===== NUM_PADS [Optional] =====------------------------------------------
# Description: Offset: 8b, Width: 2b, Number of pads used by instruction. Some instructions ignores this parameter.
# - 1PAD, (0): Single mode. One pad is used.
# - 2PAD, (1): Dual mode. Two pads are used.
# - 4PAD, (2): Quad mode. Four pads are used.
# - 8PAD, (3): Octal mode. Eight pads are used.
# Possible options: <1PAD, 2PAD, 4PAD, 8PAD>
NUM_PADS: 1PAD
# --------------------------------------===== OPERATION_CODE [Optional] =====---------------------------------------
# Description: Offset: 10b, Width: 6b, Instruction operation code.
# - STOP, (0): Stop execution and de-assert CS. Then, the next command sequence (to the same flash device) starts
# from instruction pointer 0.
# - CMD_SDR, (1): Transmit command code to Flash.
# - RADDR_SDR, (2): Transmit row address to Flash.
# - CADDR_SDR, (3): Transmit column address to Flash.
# - MODE1_SDR, (4): Transmit mode bits to Flash.
# - MODE2_SDR, (5): Transmit mode bits to Flash.
# - MODE4_SDR, (6): Transmit mode bits to Flash.
# - MODE8_SDR, (7): Transmit mode bits to Flash.
# - WRITE_SDR, (8): Transmit program data to Flash device.
# - READ_SDR, (9): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_SDR, (10): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_SDR, (11): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_SDR, (12): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_SDR, (13): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# - JMP_ON_CS, (31): Stop execution, de-assert CS and save operand[7:0] as the instruction start pointer for next
# sequence.Normally this instruction is used to support Execute-In-Place enhanced mode. See XIP enhanced mode for
# more details.This instruction is only allowed for AHB read commands. There is interrupt status bit set
# (INTR[IPCMDERR] or INTR[AHBCMDERR]) when using this instruction in IP command or AHB write command.
# - CMD_DDR, (33): Transmit command code to Flash.
# - RADDR_DDR, (34): Transmit row address to Flash.
# - CADDR_DDR, (35): Transmit column address to Flash.
# - MODE1_DDR, (36): Transmit mode bits to Flash.
# - MODE2_DDR, (37): Transmit mode bits to Flash.
# - MODE4_DDR, (38): Transmit mode bits to Flash.
# - MODE8_DDR, (39): Transmit mode bits to Flash.
# - WRITE_DDR, (40): Transmit program data to Flash device.
# - READ_DDR, (41): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_DDR, (42): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_DDR, (43): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_DDR, (44): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_DDR, (45): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# Possible options: <STOP, CMD_SDR, RADDR_SDR, CADDR_SDR, MODE1_SDR, MODE2_SDR, MODE4_SDR, MODE8_SDR, WRITE_SDR,
# READ_SDR, LEARN_SDR, DATSZ_SDR, DUMMY_SDR, DUMMY_RWDS_SDR, JMP_ON_CS, CMD_DDR, RADDR_DDR, CADDR_DDR, MODE1_DDR,
# MODE2_DDR, MODE4_DDR, MODE8_DDR, WRITE_DDR, READ_DDR, LEARN_DDR, DATSZ_DDR, DUMMY_DDR, DUMMY_RWDS_DDR>
OPERATION_CODE: STOP
lookupTable_seq5_instr1:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq5_instr2:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq5_instr3:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq5_instr4:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq5_instr5:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq5_instr6:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq5_instr7:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
# -----------------------------------===== lookupTable_seq6_instr0 [Optional] =====-----------------------------------
# Description: Offset: 0x000000E0, Width: 16b; Lookup table holds Flash command sequences 6, instruction 0
lookupTable_seq6_instr0:
# ------------------------------------------===== OPERAND [Optional] =====------------------------------------------
# Description: Offset: 0b, Width: 8b, Instruction operand. Its values depends on used instruction
OPERAND: 0
# -----------------------------------------===== NUM_PADS [Optional] =====------------------------------------------
# Description: Offset: 8b, Width: 2b, Number of pads used by instruction. Some instructions ignores this parameter.
# - 1PAD, (0): Single mode. One pad is used.
# - 2PAD, (1): Dual mode. Two pads are used.
# - 4PAD, (2): Quad mode. Four pads are used.
# - 8PAD, (3): Octal mode. Eight pads are used.
# Possible options: <1PAD, 2PAD, 4PAD, 8PAD>
NUM_PADS: 1PAD
# --------------------------------------===== OPERATION_CODE [Optional] =====---------------------------------------
# Description: Offset: 10b, Width: 6b, Instruction operation code.
# - STOP, (0): Stop execution and de-assert CS. Then, the next command sequence (to the same flash device) starts
# from instruction pointer 0.
# - CMD_SDR, (1): Transmit command code to Flash.
# - RADDR_SDR, (2): Transmit row address to Flash.
# - CADDR_SDR, (3): Transmit column address to Flash.
# - MODE1_SDR, (4): Transmit mode bits to Flash.
# - MODE2_SDR, (5): Transmit mode bits to Flash.
# - MODE4_SDR, (6): Transmit mode bits to Flash.
# - MODE8_SDR, (7): Transmit mode bits to Flash.
# - WRITE_SDR, (8): Transmit program data to Flash device.
# - READ_SDR, (9): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_SDR, (10): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_SDR, (11): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_SDR, (12): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_SDR, (13): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# - JMP_ON_CS, (31): Stop execution, de-assert CS and save operand[7:0] as the instruction start pointer for next
# sequence.Normally this instruction is used to support Execute-In-Place enhanced mode. See XIP enhanced mode for
# more details.This instruction is only allowed for AHB read commands. There is interrupt status bit set
# (INTR[IPCMDERR] or INTR[AHBCMDERR]) when using this instruction in IP command or AHB write command.
# - CMD_DDR, (33): Transmit command code to Flash.
# - RADDR_DDR, (34): Transmit row address to Flash.
# - CADDR_DDR, (35): Transmit column address to Flash.
# - MODE1_DDR, (36): Transmit mode bits to Flash.
# - MODE2_DDR, (37): Transmit mode bits to Flash.
# - MODE4_DDR, (38): Transmit mode bits to Flash.
# - MODE8_DDR, (39): Transmit mode bits to Flash.
# - WRITE_DDR, (40): Transmit program data to Flash device.
# - READ_DDR, (41): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_DDR, (42): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_DDR, (43): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_DDR, (44): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_DDR, (45): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# Possible options: <STOP, CMD_SDR, RADDR_SDR, CADDR_SDR, MODE1_SDR, MODE2_SDR, MODE4_SDR, MODE8_SDR, WRITE_SDR,
# READ_SDR, LEARN_SDR, DATSZ_SDR, DUMMY_SDR, DUMMY_RWDS_SDR, JMP_ON_CS, CMD_DDR, RADDR_DDR, CADDR_DDR, MODE1_DDR,
# MODE2_DDR, MODE4_DDR, MODE8_DDR, WRITE_DDR, READ_DDR, LEARN_DDR, DATSZ_DDR, DUMMY_DDR, DUMMY_RWDS_DDR>
OPERATION_CODE: STOP
lookupTable_seq6_instr1:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq6_instr2:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq6_instr3:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq6_instr4:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq6_instr5:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq6_instr6:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq6_instr7:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
# -----------------------------------===== lookupTable_seq7_instr0 [Optional] =====-----------------------------------
# Description: Offset: 0x000000F0, Width: 16b; Lookup table holds Flash command sequences 7, instruction 0
lookupTable_seq7_instr0:
# ------------------------------------------===== OPERAND [Optional] =====------------------------------------------
# Description: Offset: 0b, Width: 8b, Instruction operand. Its values depends on used instruction
OPERAND: 0
# -----------------------------------------===== NUM_PADS [Optional] =====------------------------------------------
# Description: Offset: 8b, Width: 2b, Number of pads used by instruction. Some instructions ignores this parameter.
# - 1PAD, (0): Single mode. One pad is used.
# - 2PAD, (1): Dual mode. Two pads are used.
# - 4PAD, (2): Quad mode. Four pads are used.
# - 8PAD, (3): Octal mode. Eight pads are used.
# Possible options: <1PAD, 2PAD, 4PAD, 8PAD>
NUM_PADS: 1PAD
# --------------------------------------===== OPERATION_CODE [Optional] =====---------------------------------------
# Description: Offset: 10b, Width: 6b, Instruction operation code.
# - STOP, (0): Stop execution and de-assert CS. Then, the next command sequence (to the same flash device) starts
# from instruction pointer 0.
# - CMD_SDR, (1): Transmit command code to Flash.
# - RADDR_SDR, (2): Transmit row address to Flash.
# - CADDR_SDR, (3): Transmit column address to Flash.
# - MODE1_SDR, (4): Transmit mode bits to Flash.
# - MODE2_SDR, (5): Transmit mode bits to Flash.
# - MODE4_SDR, (6): Transmit mode bits to Flash.
# - MODE8_SDR, (7): Transmit mode bits to Flash.
# - WRITE_SDR, (8): Transmit program data to Flash device.
# - READ_SDR, (9): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_SDR, (10): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_SDR, (11): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_SDR, (12): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_SDR, (13): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# - JMP_ON_CS, (31): Stop execution, de-assert CS and save operand[7:0] as the instruction start pointer for next
# sequence.Normally this instruction is used to support Execute-In-Place enhanced mode. See XIP enhanced mode for
# more details.This instruction is only allowed for AHB read commands. There is interrupt status bit set
# (INTR[IPCMDERR] or INTR[AHBCMDERR]) when using this instruction in IP command or AHB write command.
# - CMD_DDR, (33): Transmit command code to Flash.
# - RADDR_DDR, (34): Transmit row address to Flash.
# - CADDR_DDR, (35): Transmit column address to Flash.
# - MODE1_DDR, (36): Transmit mode bits to Flash.
# - MODE2_DDR, (37): Transmit mode bits to Flash.
# - MODE4_DDR, (38): Transmit mode bits to Flash.
# - MODE8_DDR, (39): Transmit mode bits to Flash.
# - WRITE_DDR, (40): Transmit program data to Flash device.
# - READ_DDR, (41): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_DDR, (42): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_DDR, (43): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_DDR, (44): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_DDR, (45): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# Possible options: <STOP, CMD_SDR, RADDR_SDR, CADDR_SDR, MODE1_SDR, MODE2_SDR, MODE4_SDR, MODE8_SDR, WRITE_SDR,
# READ_SDR, LEARN_SDR, DATSZ_SDR, DUMMY_SDR, DUMMY_RWDS_SDR, JMP_ON_CS, CMD_DDR, RADDR_DDR, CADDR_DDR, MODE1_DDR,
# MODE2_DDR, MODE4_DDR, MODE8_DDR, WRITE_DDR, READ_DDR, LEARN_DDR, DATSZ_DDR, DUMMY_DDR, DUMMY_RWDS_DDR>
OPERATION_CODE: STOP
lookupTable_seq7_instr1:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq7_instr2:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq7_instr3:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq7_instr4:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq7_instr5:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq7_instr6:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq7_instr7:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
# -----------------------------------===== lookupTable_seq8_instr0 [Optional] =====-----------------------------------
# Description: Offset: 0x00000100, Width: 16b; Lookup table holds Flash command sequences 8, instruction 0
lookupTable_seq8_instr0:
# ------------------------------------------===== OPERAND [Optional] =====------------------------------------------
# Description: Offset: 0b, Width: 8b, Instruction operand. Its values depends on used instruction
OPERAND: 0
# -----------------------------------------===== NUM_PADS [Optional] =====------------------------------------------
# Description: Offset: 8b, Width: 2b, Number of pads used by instruction. Some instructions ignores this parameter.
# - 1PAD, (0): Single mode. One pad is used.
# - 2PAD, (1): Dual mode. Two pads are used.
# - 4PAD, (2): Quad mode. Four pads are used.
# - 8PAD, (3): Octal mode. Eight pads are used.
# Possible options: <1PAD, 2PAD, 4PAD, 8PAD>
NUM_PADS: 1PAD
# --------------------------------------===== OPERATION_CODE [Optional] =====---------------------------------------
# Description: Offset: 10b, Width: 6b, Instruction operation code.
# - STOP, (0): Stop execution and de-assert CS. Then, the next command sequence (to the same flash device) starts
# from instruction pointer 0.
# - CMD_SDR, (1): Transmit command code to Flash.
# - RADDR_SDR, (2): Transmit row address to Flash.
# - CADDR_SDR, (3): Transmit column address to Flash.
# - MODE1_SDR, (4): Transmit mode bits to Flash.
# - MODE2_SDR, (5): Transmit mode bits to Flash.
# - MODE4_SDR, (6): Transmit mode bits to Flash.
# - MODE8_SDR, (7): Transmit mode bits to Flash.
# - WRITE_SDR, (8): Transmit program data to Flash device.
# - READ_SDR, (9): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_SDR, (10): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_SDR, (11): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_SDR, (12): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_SDR, (13): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# - JMP_ON_CS, (31): Stop execution, de-assert CS and save operand[7:0] as the instruction start pointer for next
# sequence.Normally this instruction is used to support Execute-In-Place enhanced mode. See XIP enhanced mode for
# more details.This instruction is only allowed for AHB read commands. There is interrupt status bit set
# (INTR[IPCMDERR] or INTR[AHBCMDERR]) when using this instruction in IP command or AHB write command.
# - CMD_DDR, (33): Transmit command code to Flash.
# - RADDR_DDR, (34): Transmit row address to Flash.
# - CADDR_DDR, (35): Transmit column address to Flash.
# - MODE1_DDR, (36): Transmit mode bits to Flash.
# - MODE2_DDR, (37): Transmit mode bits to Flash.
# - MODE4_DDR, (38): Transmit mode bits to Flash.
# - MODE8_DDR, (39): Transmit mode bits to Flash.
# - WRITE_DDR, (40): Transmit program data to Flash device.
# - READ_DDR, (41): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_DDR, (42): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_DDR, (43): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_DDR, (44): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_DDR, (45): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# Possible options: <STOP, CMD_SDR, RADDR_SDR, CADDR_SDR, MODE1_SDR, MODE2_SDR, MODE4_SDR, MODE8_SDR, WRITE_SDR,
# READ_SDR, LEARN_SDR, DATSZ_SDR, DUMMY_SDR, DUMMY_RWDS_SDR, JMP_ON_CS, CMD_DDR, RADDR_DDR, CADDR_DDR, MODE1_DDR,
# MODE2_DDR, MODE4_DDR, MODE8_DDR, WRITE_DDR, READ_DDR, LEARN_DDR, DATSZ_DDR, DUMMY_DDR, DUMMY_RWDS_DDR>
OPERATION_CODE: STOP
lookupTable_seq8_instr1:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq8_instr2:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq8_instr3:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq8_instr4:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq8_instr5:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq8_instr6:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq8_instr7:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
# -----------------------------------===== lookupTable_seq9_instr0 [Optional] =====-----------------------------------
# Description: Offset: 0x00000110, Width: 16b; Lookup table holds Flash command sequences 9, instruction 0
lookupTable_seq9_instr0:
# ------------------------------------------===== OPERAND [Optional] =====------------------------------------------
# Description: Offset: 0b, Width: 8b, Instruction operand. Its values depends on used instruction
OPERAND: 0
# -----------------------------------------===== NUM_PADS [Optional] =====------------------------------------------
# Description: Offset: 8b, Width: 2b, Number of pads used by instruction. Some instructions ignores this parameter.
# - 1PAD, (0): Single mode. One pad is used.
# - 2PAD, (1): Dual mode. Two pads are used.
# - 4PAD, (2): Quad mode. Four pads are used.
# - 8PAD, (3): Octal mode. Eight pads are used.
# Possible options: <1PAD, 2PAD, 4PAD, 8PAD>
NUM_PADS: 1PAD
# --------------------------------------===== OPERATION_CODE [Optional] =====---------------------------------------
# Description: Offset: 10b, Width: 6b, Instruction operation code.
# - STOP, (0): Stop execution and de-assert CS. Then, the next command sequence (to the same flash device) starts
# from instruction pointer 0.
# - CMD_SDR, (1): Transmit command code to Flash.
# - RADDR_SDR, (2): Transmit row address to Flash.
# - CADDR_SDR, (3): Transmit column address to Flash.
# - MODE1_SDR, (4): Transmit mode bits to Flash.
# - MODE2_SDR, (5): Transmit mode bits to Flash.
# - MODE4_SDR, (6): Transmit mode bits to Flash.
# - MODE8_SDR, (7): Transmit mode bits to Flash.
# - WRITE_SDR, (8): Transmit program data to Flash device.
# - READ_SDR, (9): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_SDR, (10): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_SDR, (11): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_SDR, (12): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_SDR, (13): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# - JMP_ON_CS, (31): Stop execution, de-assert CS and save operand[7:0] as the instruction start pointer for next
# sequence.Normally this instruction is used to support Execute-In-Place enhanced mode. See XIP enhanced mode for
# more details.This instruction is only allowed for AHB read commands. There is interrupt status bit set
# (INTR[IPCMDERR] or INTR[AHBCMDERR]) when using this instruction in IP command or AHB write command.
# - CMD_DDR, (33): Transmit command code to Flash.
# - RADDR_DDR, (34): Transmit row address to Flash.
# - CADDR_DDR, (35): Transmit column address to Flash.
# - MODE1_DDR, (36): Transmit mode bits to Flash.
# - MODE2_DDR, (37): Transmit mode bits to Flash.
# - MODE4_DDR, (38): Transmit mode bits to Flash.
# - MODE8_DDR, (39): Transmit mode bits to Flash.
# - WRITE_DDR, (40): Transmit program data to Flash device.
# - READ_DDR, (41): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_DDR, (42): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_DDR, (43): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_DDR, (44): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_DDR, (45): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# Possible options: <STOP, CMD_SDR, RADDR_SDR, CADDR_SDR, MODE1_SDR, MODE2_SDR, MODE4_SDR, MODE8_SDR, WRITE_SDR,
# READ_SDR, LEARN_SDR, DATSZ_SDR, DUMMY_SDR, DUMMY_RWDS_SDR, JMP_ON_CS, CMD_DDR, RADDR_DDR, CADDR_DDR, MODE1_DDR,
# MODE2_DDR, MODE4_DDR, MODE8_DDR, WRITE_DDR, READ_DDR, LEARN_DDR, DATSZ_DDR, DUMMY_DDR, DUMMY_RWDS_DDR>
OPERATION_CODE: STOP
lookupTable_seq9_instr1:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq9_instr2:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq9_instr3:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq9_instr4:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq9_instr5:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq9_instr6:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq9_instr7:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
# ----------------------------------===== lookupTable_seq10_instr0 [Optional] =====-----------------------------------
# Description: Offset: 0x00000120, Width: 16b; Lookup table holds Flash command sequences 10, instruction 0
lookupTable_seq10_instr0:
# ------------------------------------------===== OPERAND [Optional] =====------------------------------------------
# Description: Offset: 0b, Width: 8b, Instruction operand. Its values depends on used instruction
OPERAND: 0
# -----------------------------------------===== NUM_PADS [Optional] =====------------------------------------------
# Description: Offset: 8b, Width: 2b, Number of pads used by instruction. Some instructions ignores this parameter.
# - 1PAD, (0): Single mode. One pad is used.
# - 2PAD, (1): Dual mode. Two pads are used.
# - 4PAD, (2): Quad mode. Four pads are used.
# - 8PAD, (3): Octal mode. Eight pads are used.
# Possible options: <1PAD, 2PAD, 4PAD, 8PAD>
NUM_PADS: 1PAD
# --------------------------------------===== OPERATION_CODE [Optional] =====---------------------------------------
# Description: Offset: 10b, Width: 6b, Instruction operation code.
# - STOP, (0): Stop execution and de-assert CS. Then, the next command sequence (to the same flash device) starts
# from instruction pointer 0.
# - CMD_SDR, (1): Transmit command code to Flash.
# - RADDR_SDR, (2): Transmit row address to Flash.
# - CADDR_SDR, (3): Transmit column address to Flash.
# - MODE1_SDR, (4): Transmit mode bits to Flash.
# - MODE2_SDR, (5): Transmit mode bits to Flash.
# - MODE4_SDR, (6): Transmit mode bits to Flash.
# - MODE8_SDR, (7): Transmit mode bits to Flash.
# - WRITE_SDR, (8): Transmit program data to Flash device.
# - READ_SDR, (9): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_SDR, (10): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_SDR, (11): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_SDR, (12): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_SDR, (13): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# - JMP_ON_CS, (31): Stop execution, de-assert CS and save operand[7:0] as the instruction start pointer for next
# sequence.Normally this instruction is used to support Execute-In-Place enhanced mode. See XIP enhanced mode for
# more details.This instruction is only allowed for AHB read commands. There is interrupt status bit set
# (INTR[IPCMDERR] or INTR[AHBCMDERR]) when using this instruction in IP command or AHB write command.
# - CMD_DDR, (33): Transmit command code to Flash.
# - RADDR_DDR, (34): Transmit row address to Flash.
# - CADDR_DDR, (35): Transmit column address to Flash.
# - MODE1_DDR, (36): Transmit mode bits to Flash.
# - MODE2_DDR, (37): Transmit mode bits to Flash.
# - MODE4_DDR, (38): Transmit mode bits to Flash.
# - MODE8_DDR, (39): Transmit mode bits to Flash.
# - WRITE_DDR, (40): Transmit program data to Flash device.
# - READ_DDR, (41): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_DDR, (42): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_DDR, (43): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_DDR, (44): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_DDR, (45): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# Possible options: <STOP, CMD_SDR, RADDR_SDR, CADDR_SDR, MODE1_SDR, MODE2_SDR, MODE4_SDR, MODE8_SDR, WRITE_SDR,
# READ_SDR, LEARN_SDR, DATSZ_SDR, DUMMY_SDR, DUMMY_RWDS_SDR, JMP_ON_CS, CMD_DDR, RADDR_DDR, CADDR_DDR, MODE1_DDR,
# MODE2_DDR, MODE4_DDR, MODE8_DDR, WRITE_DDR, READ_DDR, LEARN_DDR, DATSZ_DDR, DUMMY_DDR, DUMMY_RWDS_DDR>
OPERATION_CODE: STOP
lookupTable_seq10_instr1:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq10_instr2:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq10_instr3:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq10_instr4:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq10_instr5:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq10_instr6:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq10_instr7:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
# ----------------------------------===== lookupTable_seq11_instr0 [Optional] =====-----------------------------------
# Description: Offset: 0x00000130, Width: 16b; Lookup table holds Flash command sequences 11, instruction 0
lookupTable_seq11_instr0:
# ------------------------------------------===== OPERAND [Optional] =====------------------------------------------
# Description: Offset: 0b, Width: 8b, Instruction operand. Its values depends on used instruction
OPERAND: 0
# -----------------------------------------===== NUM_PADS [Optional] =====------------------------------------------
# Description: Offset: 8b, Width: 2b, Number of pads used by instruction. Some instructions ignores this parameter.
# - 1PAD, (0): Single mode. One pad is used.
# - 2PAD, (1): Dual mode. Two pads are used.
# - 4PAD, (2): Quad mode. Four pads are used.
# - 8PAD, (3): Octal mode. Eight pads are used.
# Possible options: <1PAD, 2PAD, 4PAD, 8PAD>
NUM_PADS: 1PAD
# --------------------------------------===== OPERATION_CODE [Optional] =====---------------------------------------
# Description: Offset: 10b, Width: 6b, Instruction operation code.
# - STOP, (0): Stop execution and de-assert CS. Then, the next command sequence (to the same flash device) starts
# from instruction pointer 0.
# - CMD_SDR, (1): Transmit command code to Flash.
# - RADDR_SDR, (2): Transmit row address to Flash.
# - CADDR_SDR, (3): Transmit column address to Flash.
# - MODE1_SDR, (4): Transmit mode bits to Flash.
# - MODE2_SDR, (5): Transmit mode bits to Flash.
# - MODE4_SDR, (6): Transmit mode bits to Flash.
# - MODE8_SDR, (7): Transmit mode bits to Flash.
# - WRITE_SDR, (8): Transmit program data to Flash device.
# - READ_SDR, (9): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_SDR, (10): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_SDR, (11): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_SDR, (12): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_SDR, (13): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# - JMP_ON_CS, (31): Stop execution, de-assert CS and save operand[7:0] as the instruction start pointer for next
# sequence.Normally this instruction is used to support Execute-In-Place enhanced mode. See XIP enhanced mode for
# more details.This instruction is only allowed for AHB read commands. There is interrupt status bit set
# (INTR[IPCMDERR] or INTR[AHBCMDERR]) when using this instruction in IP command or AHB write command.
# - CMD_DDR, (33): Transmit command code to Flash.
# - RADDR_DDR, (34): Transmit row address to Flash.
# - CADDR_DDR, (35): Transmit column address to Flash.
# - MODE1_DDR, (36): Transmit mode bits to Flash.
# - MODE2_DDR, (37): Transmit mode bits to Flash.
# - MODE4_DDR, (38): Transmit mode bits to Flash.
# - MODE8_DDR, (39): Transmit mode bits to Flash.
# - WRITE_DDR, (40): Transmit program data to Flash device.
# - READ_DDR, (41): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_DDR, (42): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_DDR, (43): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_DDR, (44): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_DDR, (45): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# Possible options: <STOP, CMD_SDR, RADDR_SDR, CADDR_SDR, MODE1_SDR, MODE2_SDR, MODE4_SDR, MODE8_SDR, WRITE_SDR,
# READ_SDR, LEARN_SDR, DATSZ_SDR, DUMMY_SDR, DUMMY_RWDS_SDR, JMP_ON_CS, CMD_DDR, RADDR_DDR, CADDR_DDR, MODE1_DDR,
# MODE2_DDR, MODE4_DDR, MODE8_DDR, WRITE_DDR, READ_DDR, LEARN_DDR, DATSZ_DDR, DUMMY_DDR, DUMMY_RWDS_DDR>
OPERATION_CODE: STOP
lookupTable_seq11_instr1:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq11_instr2:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq11_instr3:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq11_instr4:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq11_instr5:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq11_instr6:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq11_instr7:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
# ----------------------------------===== lookupTable_seq12_instr0 [Optional] =====-----------------------------------
# Description: Offset: 0x00000140, Width: 16b; Lookup table holds Flash command sequences 12, instruction 0
lookupTable_seq12_instr0:
# ------------------------------------------===== OPERAND [Optional] =====------------------------------------------
# Description: Offset: 0b, Width: 8b, Instruction operand. Its values depends on used instruction
OPERAND: 0
# -----------------------------------------===== NUM_PADS [Optional] =====------------------------------------------
# Description: Offset: 8b, Width: 2b, Number of pads used by instruction. Some instructions ignores this parameter.
# - 1PAD, (0): Single mode. One pad is used.
# - 2PAD, (1): Dual mode. Two pads are used.
# - 4PAD, (2): Quad mode. Four pads are used.
# - 8PAD, (3): Octal mode. Eight pads are used.
# Possible options: <1PAD, 2PAD, 4PAD, 8PAD>
NUM_PADS: 1PAD
# --------------------------------------===== OPERATION_CODE [Optional] =====---------------------------------------
# Description: Offset: 10b, Width: 6b, Instruction operation code.
# - STOP, (0): Stop execution and de-assert CS. Then, the next command sequence (to the same flash device) starts
# from instruction pointer 0.
# - CMD_SDR, (1): Transmit command code to Flash.
# - RADDR_SDR, (2): Transmit row address to Flash.
# - CADDR_SDR, (3): Transmit column address to Flash.
# - MODE1_SDR, (4): Transmit mode bits to Flash.
# - MODE2_SDR, (5): Transmit mode bits to Flash.
# - MODE4_SDR, (6): Transmit mode bits to Flash.
# - MODE8_SDR, (7): Transmit mode bits to Flash.
# - WRITE_SDR, (8): Transmit program data to Flash device.
# - READ_SDR, (9): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_SDR, (10): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_SDR, (11): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_SDR, (12): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_SDR, (13): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# - JMP_ON_CS, (31): Stop execution, de-assert CS and save operand[7:0] as the instruction start pointer for next
# sequence.Normally this instruction is used to support Execute-In-Place enhanced mode. See XIP enhanced mode for
# more details.This instruction is only allowed for AHB read commands. There is interrupt status bit set
# (INTR[IPCMDERR] or INTR[AHBCMDERR]) when using this instruction in IP command or AHB write command.
# - CMD_DDR, (33): Transmit command code to Flash.
# - RADDR_DDR, (34): Transmit row address to Flash.
# - CADDR_DDR, (35): Transmit column address to Flash.
# - MODE1_DDR, (36): Transmit mode bits to Flash.
# - MODE2_DDR, (37): Transmit mode bits to Flash.
# - MODE4_DDR, (38): Transmit mode bits to Flash.
# - MODE8_DDR, (39): Transmit mode bits to Flash.
# - WRITE_DDR, (40): Transmit program data to Flash device.
# - READ_DDR, (41): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_DDR, (42): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_DDR, (43): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_DDR, (44): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_DDR, (45): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# Possible options: <STOP, CMD_SDR, RADDR_SDR, CADDR_SDR, MODE1_SDR, MODE2_SDR, MODE4_SDR, MODE8_SDR, WRITE_SDR,
# READ_SDR, LEARN_SDR, DATSZ_SDR, DUMMY_SDR, DUMMY_RWDS_SDR, JMP_ON_CS, CMD_DDR, RADDR_DDR, CADDR_DDR, MODE1_DDR,
# MODE2_DDR, MODE4_DDR, MODE8_DDR, WRITE_DDR, READ_DDR, LEARN_DDR, DATSZ_DDR, DUMMY_DDR, DUMMY_RWDS_DDR>
OPERATION_CODE: STOP
lookupTable_seq12_instr1:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq12_instr2:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq12_instr3:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq12_instr4:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq12_instr5:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq12_instr6:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq12_instr7:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
# ----------------------------------===== lookupTable_seq13_instr0 [Optional] =====-----------------------------------
# Description: Offset: 0x00000150, Width: 16b; Lookup table holds Flash command sequences 13, instruction 0
lookupTable_seq13_instr0:
# ------------------------------------------===== OPERAND [Optional] =====------------------------------------------
# Description: Offset: 0b, Width: 8b, Instruction operand. Its values depends on used instruction
OPERAND: 0
# -----------------------------------------===== NUM_PADS [Optional] =====------------------------------------------
# Description: Offset: 8b, Width: 2b, Number of pads used by instruction. Some instructions ignores this parameter.
# - 1PAD, (0): Single mode. One pad is used.
# - 2PAD, (1): Dual mode. Two pads are used.
# - 4PAD, (2): Quad mode. Four pads are used.
# - 8PAD, (3): Octal mode. Eight pads are used.
# Possible options: <1PAD, 2PAD, 4PAD, 8PAD>
NUM_PADS: 1PAD
# --------------------------------------===== OPERATION_CODE [Optional] =====---------------------------------------
# Description: Offset: 10b, Width: 6b, Instruction operation code.
# - STOP, (0): Stop execution and de-assert CS. Then, the next command sequence (to the same flash device) starts
# from instruction pointer 0.
# - CMD_SDR, (1): Transmit command code to Flash.
# - RADDR_SDR, (2): Transmit row address to Flash.
# - CADDR_SDR, (3): Transmit column address to Flash.
# - MODE1_SDR, (4): Transmit mode bits to Flash.
# - MODE2_SDR, (5): Transmit mode bits to Flash.
# - MODE4_SDR, (6): Transmit mode bits to Flash.
# - MODE8_SDR, (7): Transmit mode bits to Flash.
# - WRITE_SDR, (8): Transmit program data to Flash device.
# - READ_SDR, (9): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_SDR, (10): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_SDR, (11): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_SDR, (12): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_SDR, (13): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# - JMP_ON_CS, (31): Stop execution, de-assert CS and save operand[7:0] as the instruction start pointer for next
# sequence.Normally this instruction is used to support Execute-In-Place enhanced mode. See XIP enhanced mode for
# more details.This instruction is only allowed for AHB read commands. There is interrupt status bit set
# (INTR[IPCMDERR] or INTR[AHBCMDERR]) when using this instruction in IP command or AHB write command.
# - CMD_DDR, (33): Transmit command code to Flash.
# - RADDR_DDR, (34): Transmit row address to Flash.
# - CADDR_DDR, (35): Transmit column address to Flash.
# - MODE1_DDR, (36): Transmit mode bits to Flash.
# - MODE2_DDR, (37): Transmit mode bits to Flash.
# - MODE4_DDR, (38): Transmit mode bits to Flash.
# - MODE8_DDR, (39): Transmit mode bits to Flash.
# - WRITE_DDR, (40): Transmit program data to Flash device.
# - READ_DDR, (41): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_DDR, (42): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_DDR, (43): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_DDR, (44): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_DDR, (45): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# Possible options: <STOP, CMD_SDR, RADDR_SDR, CADDR_SDR, MODE1_SDR, MODE2_SDR, MODE4_SDR, MODE8_SDR, WRITE_SDR,
# READ_SDR, LEARN_SDR, DATSZ_SDR, DUMMY_SDR, DUMMY_RWDS_SDR, JMP_ON_CS, CMD_DDR, RADDR_DDR, CADDR_DDR, MODE1_DDR,
# MODE2_DDR, MODE4_DDR, MODE8_DDR, WRITE_DDR, READ_DDR, LEARN_DDR, DATSZ_DDR, DUMMY_DDR, DUMMY_RWDS_DDR>
OPERATION_CODE: STOP
lookupTable_seq13_instr1:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq13_instr2:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq13_instr3:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq13_instr4:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq13_instr5:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq13_instr6:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq13_instr7:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
# ----------------------------------===== lookupTable_seq14_instr0 [Optional] =====-----------------------------------
# Description: Offset: 0x00000160, Width: 16b; Lookup table holds Flash command sequences 14, instruction 0
lookupTable_seq14_instr0:
# ------------------------------------------===== OPERAND [Optional] =====------------------------------------------
# Description: Offset: 0b, Width: 8b, Instruction operand. Its values depends on used instruction
OPERAND: 0
# -----------------------------------------===== NUM_PADS [Optional] =====------------------------------------------
# Description: Offset: 8b, Width: 2b, Number of pads used by instruction. Some instructions ignores this parameter.
# - 1PAD, (0): Single mode. One pad is used.
# - 2PAD, (1): Dual mode. Two pads are used.
# - 4PAD, (2): Quad mode. Four pads are used.
# - 8PAD, (3): Octal mode. Eight pads are used.
# Possible options: <1PAD, 2PAD, 4PAD, 8PAD>
NUM_PADS: 1PAD
# --------------------------------------===== OPERATION_CODE [Optional] =====---------------------------------------
# Description: Offset: 10b, Width: 6b, Instruction operation code.
# - STOP, (0): Stop execution and de-assert CS. Then, the next command sequence (to the same flash device) starts
# from instruction pointer 0.
# - CMD_SDR, (1): Transmit command code to Flash.
# - RADDR_SDR, (2): Transmit row address to Flash.
# - CADDR_SDR, (3): Transmit column address to Flash.
# - MODE1_SDR, (4): Transmit mode bits to Flash.
# - MODE2_SDR, (5): Transmit mode bits to Flash.
# - MODE4_SDR, (6): Transmit mode bits to Flash.
# - MODE8_SDR, (7): Transmit mode bits to Flash.
# - WRITE_SDR, (8): Transmit program data to Flash device.
# - READ_SDR, (9): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_SDR, (10): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_SDR, (11): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_SDR, (12): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_SDR, (13): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# - JMP_ON_CS, (31): Stop execution, de-assert CS and save operand[7:0] as the instruction start pointer for next
# sequence.Normally this instruction is used to support Execute-In-Place enhanced mode. See XIP enhanced mode for
# more details.This instruction is only allowed for AHB read commands. There is interrupt status bit set
# (INTR[IPCMDERR] or INTR[AHBCMDERR]) when using this instruction in IP command or AHB write command.
# - CMD_DDR, (33): Transmit command code to Flash.
# - RADDR_DDR, (34): Transmit row address to Flash.
# - CADDR_DDR, (35): Transmit column address to Flash.
# - MODE1_DDR, (36): Transmit mode bits to Flash.
# - MODE2_DDR, (37): Transmit mode bits to Flash.
# - MODE4_DDR, (38): Transmit mode bits to Flash.
# - MODE8_DDR, (39): Transmit mode bits to Flash.
# - WRITE_DDR, (40): Transmit program data to Flash device.
# - READ_DDR, (41): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_DDR, (42): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_DDR, (43): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_DDR, (44): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_DDR, (45): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# Possible options: <STOP, CMD_SDR, RADDR_SDR, CADDR_SDR, MODE1_SDR, MODE2_SDR, MODE4_SDR, MODE8_SDR, WRITE_SDR,
# READ_SDR, LEARN_SDR, DATSZ_SDR, DUMMY_SDR, DUMMY_RWDS_SDR, JMP_ON_CS, CMD_DDR, RADDR_DDR, CADDR_DDR, MODE1_DDR,
# MODE2_DDR, MODE4_DDR, MODE8_DDR, WRITE_DDR, READ_DDR, LEARN_DDR, DATSZ_DDR, DUMMY_DDR, DUMMY_RWDS_DDR>
OPERATION_CODE: STOP
lookupTable_seq14_instr1:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq14_instr2:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq14_instr3:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq14_instr4:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq14_instr5:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq14_instr6:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq14_instr7:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
# ----------------------------------===== lookupTable_seq15_instr0 [Optional] =====-----------------------------------
# Description: Offset: 0x00000170, Width: 16b; Lookup table holds Flash command sequences 15, instruction 0
lookupTable_seq15_instr0:
# ------------------------------------------===== OPERAND [Optional] =====------------------------------------------
# Description: Offset: 0b, Width: 8b, Instruction operand. Its values depends on used instruction
OPERAND: 0
# -----------------------------------------===== NUM_PADS [Optional] =====------------------------------------------
# Description: Offset: 8b, Width: 2b, Number of pads used by instruction. Some instructions ignores this parameter.
# - 1PAD, (0): Single mode. One pad is used.
# - 2PAD, (1): Dual mode. Two pads are used.
# - 4PAD, (2): Quad mode. Four pads are used.
# - 8PAD, (3): Octal mode. Eight pads are used.
# Possible options: <1PAD, 2PAD, 4PAD, 8PAD>
NUM_PADS: 1PAD
# --------------------------------------===== OPERATION_CODE [Optional] =====---------------------------------------
# Description: Offset: 10b, Width: 6b, Instruction operation code.
# - STOP, (0): Stop execution and de-assert CS. Then, the next command sequence (to the same flash device) starts
# from instruction pointer 0.
# - CMD_SDR, (1): Transmit command code to Flash.
# - RADDR_SDR, (2): Transmit row address to Flash.
# - CADDR_SDR, (3): Transmit column address to Flash.
# - MODE1_SDR, (4): Transmit mode bits to Flash.
# - MODE2_SDR, (5): Transmit mode bits to Flash.
# - MODE4_SDR, (6): Transmit mode bits to Flash.
# - MODE8_SDR, (7): Transmit mode bits to Flash.
# - WRITE_SDR, (8): Transmit program data to Flash device.
# - READ_SDR, (9): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_SDR, (10): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_SDR, (11): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_SDR, (12): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_SDR, (13): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# - JMP_ON_CS, (31): Stop execution, de-assert CS and save operand[7:0] as the instruction start pointer for next
# sequence.Normally this instruction is used to support Execute-In-Place enhanced mode. See XIP enhanced mode for
# more details.This instruction is only allowed for AHB read commands. There is interrupt status bit set
# (INTR[IPCMDERR] or INTR[AHBCMDERR]) when using this instruction in IP command or AHB write command.
# - CMD_DDR, (33): Transmit command code to Flash.
# - RADDR_DDR, (34): Transmit row address to Flash.
# - CADDR_DDR, (35): Transmit column address to Flash.
# - MODE1_DDR, (36): Transmit mode bits to Flash.
# - MODE2_DDR, (37): Transmit mode bits to Flash.
# - MODE4_DDR, (38): Transmit mode bits to Flash.
# - MODE8_DDR, (39): Transmit mode bits to Flash.
# - WRITE_DDR, (40): Transmit program data to Flash device.
# - READ_DDR, (41): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_DDR, (42): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_DDR, (43): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_DDR, (44): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_DDR, (45): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# Possible options: <STOP, CMD_SDR, RADDR_SDR, CADDR_SDR, MODE1_SDR, MODE2_SDR, MODE4_SDR, MODE8_SDR, WRITE_SDR,
# READ_SDR, LEARN_SDR, DATSZ_SDR, DUMMY_SDR, DUMMY_RWDS_SDR, JMP_ON_CS, CMD_DDR, RADDR_DDR, CADDR_DDR, MODE1_DDR,
# MODE2_DDR, MODE4_DDR, MODE8_DDR, WRITE_DDR, READ_DDR, LEARN_DDR, DATSZ_DDR, DUMMY_DDR, DUMMY_RWDS_DDR>
OPERATION_CODE: STOP
lookupTable_seq15_instr1:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq15_instr2:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq15_instr3:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq15_instr4:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq15_instr5:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq15_instr6:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq15_instr7:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
# ---------------------------------------===== lutCustomSeq_0 [Optional] =====----------------------------------------
# Description: Offset: 0x00000180, Width: 32b; [0x180-0x1af] Customizable LUT Sequences
lutCustomSeq_0:
# ------------------------------------------===== seqNum [Optional] =====-------------------------------------------
# Description: Offset: 0b, Width: 8b, Sequence Number, valid number: 1-16
seqNum: 0
# -------------------------------------------===== seqId [Optional] =====-------------------------------------------
# Description: Offset: 8b, Width: 8b, Sequence Index, valid number: 0-15
seqId: 0
# -----------------------------------------===== reserved [Optional] =====------------------------------------------
# Description: Offset: 16b, Width: 16b, N/A
reserved: 0
# ---------------------------------------===== lutCustomSeq_1 [Optional] =====----------------------------------------
# Description: Offset: 0x00000184, Width: 32b; [0x180-0x1af] Customizable LUT Sequences
lutCustomSeq_1:
# ------------------------------------------===== seqNum [Optional] =====-------------------------------------------
# Description: Offset: 0b, Width: 8b, Sequence Number, valid number: 1-16
seqNum: 0
# -------------------------------------------===== seqId [Optional] =====-------------------------------------------
# Description: Offset: 8b, Width: 8b, Sequence Index, valid number: 0-15
seqId: 0
# -----------------------------------------===== reserved [Optional] =====------------------------------------------
# Description: Offset: 16b, Width: 16b, N/A
reserved: 0
# ---------------------------------------===== lutCustomSeq_2 [Optional] =====----------------------------------------
# Description: Offset: 0x00000188, Width: 32b; [0x180-0x1af] Customizable LUT Sequences
lutCustomSeq_2:
# ------------------------------------------===== seqNum [Optional] =====-------------------------------------------
# Description: Offset: 0b, Width: 8b, Sequence Number, valid number: 1-16
seqNum: 0
# -------------------------------------------===== seqId [Optional] =====-------------------------------------------
# Description: Offset: 8b, Width: 8b, Sequence Index, valid number: 0-15
seqId: 0
# -----------------------------------------===== reserved [Optional] =====------------------------------------------
# Description: Offset: 16b, Width: 16b, N/A
reserved: 0
# ---------------------------------------===== lutCustomSeq_3 [Optional] =====----------------------------------------
# Description: Offset: 0x0000018C, Width: 32b; [0x180-0x1af] Customizable LUT Sequences
lutCustomSeq_3:
# ------------------------------------------===== seqNum [Optional] =====-------------------------------------------
# Description: Offset: 0b, Width: 8b, Sequence Number, valid number: 1-16
seqNum: 0
# -------------------------------------------===== seqId [Optional] =====-------------------------------------------
# Description: Offset: 8b, Width: 8b, Sequence Index, valid number: 0-15
seqId: 0
# -----------------------------------------===== reserved [Optional] =====------------------------------------------
# Description: Offset: 16b, Width: 16b, N/A
reserved: 0
# ---------------------------------------===== lutCustomSeq_4 [Optional] =====----------------------------------------
# Description: Offset: 0x00000190, Width: 32b; [0x180-0x1af] Customizable LUT Sequences
lutCustomSeq_4:
# ------------------------------------------===== seqNum [Optional] =====-------------------------------------------
# Description: Offset: 0b, Width: 8b, Sequence Number, valid number: 1-16
seqNum: 0
# -------------------------------------------===== seqId [Optional] =====-------------------------------------------
# Description: Offset: 8b, Width: 8b, Sequence Index, valid number: 0-15
seqId: 0
# -----------------------------------------===== reserved [Optional] =====------------------------------------------
# Description: Offset: 16b, Width: 16b, N/A
reserved: 0
# ---------------------------------------===== lutCustomSeq_5 [Optional] =====----------------------------------------
# Description: Offset: 0x00000194, Width: 32b; [0x180-0x1af] Customizable LUT Sequences
lutCustomSeq_5:
# ------------------------------------------===== seqNum [Optional] =====-------------------------------------------
# Description: Offset: 0b, Width: 8b, Sequence Number, valid number: 1-16
seqNum: 0
# -------------------------------------------===== seqId [Optional] =====-------------------------------------------
# Description: Offset: 8b, Width: 8b, Sequence Index, valid number: 0-15
seqId: 0
# -----------------------------------------===== reserved [Optional] =====------------------------------------------
# Description: Offset: 16b, Width: 16b, N/A
reserved: 0
# ---------------------------------------===== lutCustomSeq_6 [Optional] =====----------------------------------------
# Description: Offset: 0x00000198, Width: 32b; [0x180-0x1af] Customizable LUT Sequences
lutCustomSeq_6:
# ------------------------------------------===== seqNum [Optional] =====-------------------------------------------
# Description: Offset: 0b, Width: 8b, Sequence Number, valid number: 1-16
seqNum: 0
# -------------------------------------------===== seqId [Optional] =====-------------------------------------------
# Description: Offset: 8b, Width: 8b, Sequence Index, valid number: 0-15
seqId: 0
# -----------------------------------------===== reserved [Optional] =====------------------------------------------
# Description: Offset: 16b, Width: 16b, N/A
reserved: 0
# ---------------------------------------===== lutCustomSeq_7 [Optional] =====----------------------------------------
# Description: Offset: 0x0000019C, Width: 32b; [0x180-0x1af] Customizable LUT Sequences
lutCustomSeq_7:
# ------------------------------------------===== seqNum [Optional] =====-------------------------------------------
# Description: Offset: 0b, Width: 8b, Sequence Number, valid number: 1-16
seqNum: 0
# -------------------------------------------===== seqId [Optional] =====-------------------------------------------
# Description: Offset: 8b, Width: 8b, Sequence Index, valid number: 0-15
seqId: 0
# -----------------------------------------===== reserved [Optional] =====------------------------------------------
# Description: Offset: 16b, Width: 16b, N/A
reserved: 0
# ---------------------------------------===== lutCustomSeq_8 [Optional] =====----------------------------------------
# Description: Offset: 0x000001A0, Width: 32b; [0x180-0x1af] Customizable LUT Sequences
lutCustomSeq_8:
# ------------------------------------------===== seqNum [Optional] =====-------------------------------------------
# Description: Offset: 0b, Width: 8b, Sequence Number, valid number: 1-16
seqNum: 0
# -------------------------------------------===== seqId [Optional] =====-------------------------------------------
# Description: Offset: 8b, Width: 8b, Sequence Index, valid number: 0-15
seqId: 0
# -----------------------------------------===== reserved [Optional] =====------------------------------------------
# Description: Offset: 16b, Width: 16b, N/A
reserved: 0
# ---------------------------------------===== lutCustomSeq_9 [Optional] =====----------------------------------------
# Description: Offset: 0x000001A4, Width: 32b; [0x180-0x1af] Customizable LUT Sequences
lutCustomSeq_9:
# ------------------------------------------===== seqNum [Optional] =====-------------------------------------------
# Description: Offset: 0b, Width: 8b, Sequence Number, valid number: 1-16
seqNum: 0
# -------------------------------------------===== seqId [Optional] =====-------------------------------------------
# Description: Offset: 8b, Width: 8b, Sequence Index, valid number: 0-15
seqId: 0
# -----------------------------------------===== reserved [Optional] =====------------------------------------------
# Description: Offset: 16b, Width: 16b, N/A
reserved: 0
# ---------------------------------------===== lutCustomSeq_10 [Optional] =====---------------------------------------
# Description: Offset: 0x000001A8, Width: 32b; [0x180-0x1af] Customizable LUT Sequences
lutCustomSeq_10:
# ------------------------------------------===== seqNum [Optional] =====-------------------------------------------
# Description: Offset: 0b, Width: 8b, Sequence Number, valid number: 1-16
seqNum: 0
# -------------------------------------------===== seqId [Optional] =====-------------------------------------------
# Description: Offset: 8b, Width: 8b, Sequence Index, valid number: 0-15
seqId: 0
# -----------------------------------------===== reserved [Optional] =====------------------------------------------
# Description: Offset: 16b, Width: 16b, N/A
reserved: 0
# ---------------------------------------===== lutCustomSeq_11 [Optional] =====---------------------------------------
# Description: Offset: 0x000001AC, Width: 32b; [0x180-0x1af] Customizable LUT Sequences
lutCustomSeq_11:
# ------------------------------------------===== seqNum [Optional] =====-------------------------------------------
# Description: Offset: 0b, Width: 8b, Sequence Number, valid number: 1-16
seqNum: 0
# -------------------------------------------===== seqId [Optional] =====-------------------------------------------
# Description: Offset: 8b, Width: 8b, Sequence Index, valid number: 0-15
seqId: 0
# -----------------------------------------===== reserved [Optional] =====------------------------------------------
# Description: Offset: 16b, Width: 16b, N/A
reserved: 0
# -----------------------------------------===== reserved4_0 [Optional] =====-----------------------------------------
# Description: Offset: 0x000001B0, Width: 32b; [0x1b0-0x1bf] Reserved for future use
reserved4_0: '0x00000000'
# -----------------------------------------===== reserved4_1 [Optional] =====-----------------------------------------
# Description: Offset: 0x000001B4, Width: 32b; [0x1b0-0x1bf] Reserved for future use
reserved4_1: '0x00000000'
# -----------------------------------------===== reserved4_2 [Optional] =====-----------------------------------------
# Description: Offset: 0x000001B8, Width: 32b; [0x1b0-0x1bf] Reserved for future use
reserved4_2: '0x00000000'
# -----------------------------------------===== reserved4_3 [Optional] =====-----------------------------------------
# Description: Offset: 0x000001BC, Width: 32b; [0x1b0-0x1bf] Reserved for future use
reserved4_3: '0x00000000'
# ------------------------------------------===== pageSize [Optional] =====-------------------------------------------
# Description: Offset: 0x000001C0, Width: 32b; Page size of Serial NOR
pageSize: '0x00000000'
# -----------------------------------------===== sectorSize [Optional] =====------------------------------------------
# Description: Offset: 0x000001C4, Width: 32b; Sector size of Serial NOR
sectorSize: '0x00000000'
# -------------------------------------===== ipcmdSerialClkFreq [Optional] =====--------------------------------------
# Description: Offset: 0x000001C8, Width: 8b; Clock frequency for IP command
ipcmdSerialClkFreq: '0x00'
# -------------------------------------===== isUniformBlockSize [Optional] =====--------------------------------------
# Description: Offset: 0x000001C9, Width: 8b; Sector/Block size is the same
isUniformBlockSize: '0x00'
# -------------------------------------===== isDataOrderSwapped [Optional] =====--------------------------------------
# Description: Offset: 0x000001CA, Width: 8b; Data order (D0, D1, D2, D3) is swapped (D1,D0, D3, D2)
isDataOrderSwapped: '0x00'
# -----------------------------------------===== reserved0_0 [Optional] =====-----------------------------------------
# Description: Offset: 0x000001CB, Width: 8b; Reserved for future use
reserved0_0: '0x00'
# ----------------------------------------===== serialNorType [Optional] =====----------------------------------------
# Description: Offset: 0x000001CC, Width: 8b; Serial NOR Flash type: 0/1/2/3
serialNorType: '0x00'
# --------------------------------------===== needExitNoCmdMode [Optional] =====--------------------------------------
# Description: Offset: 0x000001CD, Width: 8b; Need to exit NoCmd mode before other IP command
needExitNoCmdMode: '0x00'
# ------------------------------------===== halfClkForNonReadCmd [Optional] =====-------------------------------------
# Description: Offset: 0x000001CE, Width: 8b; Half the Serial Clock for non-read command: true/false
halfClkForNonReadCmd: '0x00'
# ------------------------------------===== needRestoreNoCmdMode [Optional] =====-------------------------------------
# Description: Offset: 0x000001CF, Width: 8b; Need to Restore NoCmd mode after IP command execution
needRestoreNoCmdMode: '0x00'
# ------------------------------------------===== blockSize [Optional] =====------------------------------------------
# Description: Offset: 0x000001D0, Width: 32b; Block size
blockSize: '0x00000000'
# ----------------------------------------===== flashStateCtx [Optional] =====----------------------------------------
# Description: Offset: 0x000001D4, Width: 32b; Flash State Context
flashStateCtx: '0x00000000'
# -----------------------------------------===== reserve2_0 [Optional] =====------------------------------------------
# Description: Offset: 0x000001D8, Width: 32b; Reserved for future use
reserve2_0: '0x00000000'
# -----------------------------------------===== reserve2_1 [Optional] =====------------------------------------------
# Description: Offset: 0x000001DC, Width: 32b; Reserved for future use
reserve2_1: '0x00000000'
# -----------------------------------------===== reserve2_2 [Optional] =====------------------------------------------
# Description: Offset: 0x000001E0, Width: 32b; Reserved for future use
reserve2_2: '0x00000000'
# -----------------------------------------===== reserve2_3 [Optional] =====------------------------------------------
# Description: Offset: 0x000001E4, Width: 32b; Reserved for future use
reserve2_3: '0x00000000'
# -----------------------------------------===== reserve2_4 [Optional] =====------------------------------------------
# Description: Offset: 0x000001E8, Width: 32b; Reserved for future use
reserve2_4: '0x00000000'
# -----------------------------------------===== reserve2_5 [Optional] =====------------------------------------------
# Description: Offset: 0x000001EC, Width: 32b; Reserved for future use
reserve2_5: '0x00000000'
# -----------------------------------------===== reserve2_6 [Optional] =====------------------------------------------
# Description: Offset: 0x000001F0, Width: 32b; Reserved for future use
reserve2_6: '0x00000000'
# -----------------------------------------===== reserve2_7 [Optional] =====------------------------------------------
# Description: Offset: 0x000001F4, Width: 32b; Reserved for future use
reserve2_7: '0x00000000'
# -----------------------------------------===== reserve2_8 [Optional] =====------------------------------------------
# Description: Offset: 0x000001F8, Width: 32b; Reserved for future use
reserve2_8: '0x00000000'
# -----------------------------------------===== reserve2_9 [Optional] =====------------------------------------------
# Description: Offset: 0x000001FC, Width: 32b; Reserved for future use
reserve2_9: '0x00000000'
FCB for mcxn547, Revision: a1 and flexspi_nor#
FCB for mcxn547, Revision: a1 and flexspi_nor JSON schema
FCB for mcxn547, Revision: a1 and flexspi_nor YAML configuration template
# ================================== FCB for mcxn547, Revision: a1 and flexspi_nor ===================================
# ======================================================================================================================
# == FCB for mcxn547, Revision: a1 and flexspi_nor ==
# ======================================================================================================================
# -------------------------------------===== The chip family name [Required] =====--------------------------------------
# Description: NXP chip family identifier.
family: CHOOSE_FROM_TABLE
# -----------------------------------------===== MCU revision [Optional] =====------------------------------------------
# Description: Revision of silicon. The 'latest' name, means most current revision.
# Possible options: <a0, a1, latest>
revision: a1
# ------------------------------------------===== Memory type [Required] =====------------------------------------------
# Description: Specify type of memory used by FCB description.
# Possible options: <flexspi_nor>
type: flexspi_nor
# --------------------------------------------===== mcxn547 [Required] =====--------------------------------------------
fcb_settings:
# ---------------------------------------------===== tag [Optional] =====---------------------------------------------
# Description: Offset: 0x00000000, Width: 32b; [0x000-0x003] Tag, fixed value 0x42464346UL
tag: '0x42464346'
# -------------------------------------------===== version [Optional] =====-------------------------------------------
# Description: Offset: 0x00000004, Width: 32b; [0x004-0x007] Version,[31:24] -'V', [23:16] - Major, [15:8] - Minor,
# [7:0] - bugfix
version: '0x56010400'
# ------------------------------------------===== reserved0 [Optional] =====------------------------------------------
# Description: Offset: 0x00000008, Width: 32b; [0x008-0x00b] Reserved for future use
reserved0: '0x00000000'
# --------------------------------------===== readSampleClkSrc [Optional] =====---------------------------------------
# Description: Offset: 0x0000000C, Width: 8b; [0x00c-0x00c] Read Sample Clock Source, valid value: 0/1/3
readSampleClkSrc: '0x00'
# -----------------------------------------===== csHoldTime [Optional] =====------------------------------------------
# Description: Offset: 0x0000000D, Width: 8b; [0x00d-0x00d] CS hold time, default value: 3
csHoldTime: '0x00'
# -----------------------------------------===== csSetupTime [Optional] =====-----------------------------------------
# Description: Offset: 0x0000000E, Width: 8b; [0x00e-0x00e] CS setup time, default value: 3
csSetupTime: '0x00'
# -------------------------------------===== columnAddressWidth [Optional] =====--------------------------------------
# Description: Offset: 0x0000000F, Width: 8b; [0x00f-0x00f] Column Address with, for HyperBus protocol, it is fixed
# to 3, For Serial NAND, need to refer to datasheet
columnAddressWidth: '0x00'
# -------------------------------------===== deviceModeCfgEnable [Optional] =====-------------------------------------
# Description: Offset: 0x00000010, Width: 8b; [0x010-0x010] Device Mode Configure enable flag, 1 - Enable, 0 -
# Disable
deviceModeCfgEnable: '0x00'
# ---------------------------------------===== deviceModeType [Optional] =====----------------------------------------
# Description: Offset: 0x00000011, Width: 8b; [0x011-0x011] Specify the configuration command type:Quad Enable,
# DPI/QPI/OPI switch, Generic configuration, etc.
deviceModeType: '0x00'
# -------------------------------------===== waitTimeCfgCommands [Optional] =====-------------------------------------
# Description: Offset: 0x00000012, Width: 16b; [0x012-0x013] Wait time for all configuration commands, unit: 100us,
# Used for DPI/QPI/OPI switch or reset command
waitTimeCfgCommands: '0x0000'
# ----------------------------------------===== deviceModeSeq [Optional] =====----------------------------------------
# Description: Offset: 0x00000014, Width: 32b; [0x014-0x017] Device mode sequence info, [7:0] - LUT sequence id,
# [15:8] - LUt sequence number, [31:16] Reserved
deviceModeSeq:
# ------------------------------------------===== seqNum [Optional] =====-------------------------------------------
# Description: Offset: 0b, Width: 8b, Sequence Number, valid number: 1-16
seqNum: 0
# -------------------------------------------===== seqId [Optional] =====-------------------------------------------
# Description: Offset: 8b, Width: 8b, Sequence Index, valid number: 0-15
seqId: 0
# -----------------------------------------===== reserved [Optional] =====------------------------------------------
# Description: Offset: 16b, Width: 16b, N/A
reserved: 0
# ----------------------------------------===== deviceModeArg [Optional] =====----------------------------------------
# Description: Offset: 0x00000018, Width: 32b; [0x018-0x01b] Argument/Parameter for device configuration
deviceModeArg: '0x00000000'
# ---------------------------------------===== configCmdEnable [Optional] =====---------------------------------------
# Description: Offset: 0x0000001C, Width: 8b; [0x01c-0x01c] Configure command Enable Flag, 1 - Enable, 0 - Disable
configCmdEnable: '0x00'
# --------------------------------------===== configModeType_0 [Optional] =====---------------------------------------
# Description: Offset: 0x0000001D, Width: 8b; [0x01d-0x01f] Configure Mode Type, similar as deviceModeTpe
configModeType_0: '0x00'
# --------------------------------------===== configModeType_1 [Optional] =====---------------------------------------
# Description: Offset: 0x0000001E, Width: 8b; [0x01d-0x01f] Configure Mode Type, similar as deviceModeTpe
configModeType_1: '0x00'
# --------------------------------------===== configModeType_2 [Optional] =====---------------------------------------
# Description: Offset: 0x0000001F, Width: 8b; [0x01d-0x01f] Configure Mode Type, similar as deviceModeTpe
configModeType_2: '0x00'
# ---------------------------------------===== configCmdSeqs_0 [Optional] =====---------------------------------------
# Description: Offset: 0x00000020, Width: 32b; [0x020-0x02b] Sequence info for Device Configuration command, similar
# as deviceModeSeq
configCmdSeqs_0:
# ------------------------------------------===== seqNum [Optional] =====-------------------------------------------
# Description: Offset: 0b, Width: 8b, Sequence Number, valid number: 1-16
seqNum: 0
# -------------------------------------------===== seqId [Optional] =====-------------------------------------------
# Description: Offset: 8b, Width: 8b, Sequence Index, valid number: 0-15
seqId: 0
# -----------------------------------------===== reserved [Optional] =====------------------------------------------
# Description: Offset: 16b, Width: 16b, N/A
reserved: 0
# ---------------------------------------===== configCmdSeqs_1 [Optional] =====---------------------------------------
# Description: Offset: 0x00000024, Width: 32b; [0x020-0x02b] Sequence info for Device Configuration command, similar
# as deviceModeSeq
configCmdSeqs_1:
# ------------------------------------------===== seqNum [Optional] =====-------------------------------------------
# Description: Offset: 0b, Width: 8b, Sequence Number, valid number: 1-16
seqNum: 0
# -------------------------------------------===== seqId [Optional] =====-------------------------------------------
# Description: Offset: 8b, Width: 8b, Sequence Index, valid number: 0-15
seqId: 0
# -----------------------------------------===== reserved [Optional] =====------------------------------------------
# Description: Offset: 16b, Width: 16b, N/A
reserved: 0
# ---------------------------------------===== configCmdSeqs_2 [Optional] =====---------------------------------------
# Description: Offset: 0x00000028, Width: 32b; [0x020-0x02b] Sequence info for Device Configuration command, similar
# as deviceModeSeq
configCmdSeqs_2:
# ------------------------------------------===== seqNum [Optional] =====-------------------------------------------
# Description: Offset: 0b, Width: 8b, Sequence Number, valid number: 1-16
seqNum: 0
# -------------------------------------------===== seqId [Optional] =====-------------------------------------------
# Description: Offset: 8b, Width: 8b, Sequence Index, valid number: 0-15
seqId: 0
# -----------------------------------------===== reserved [Optional] =====------------------------------------------
# Description: Offset: 16b, Width: 16b, N/A
reserved: 0
# ------------------------------------------===== reserved1 [Optional] =====------------------------------------------
# Description: Offset: 0x0000002C, Width: 32b; [0x02c-0x02f] Reserved for future use
reserved1: '0x00000000'
# ---------------------------------------===== configCmdArgs_0 [Optional] =====---------------------------------------
# Description: Offset: 0x00000030, Width: 32b; [0x030-0x03b] Arguments/Parameters for device Configuration commands
configCmdArgs_0: '0x00000000'
# ---------------------------------------===== configCmdArgs_1 [Optional] =====---------------------------------------
# Description: Offset: 0x00000034, Width: 32b; [0x030-0x03b] Arguments/Parameters for device Configuration commands
configCmdArgs_1: '0x00000000'
# ---------------------------------------===== configCmdArgs_2 [Optional] =====---------------------------------------
# Description: Offset: 0x00000038, Width: 32b; [0x030-0x03b] Arguments/Parameters for device Configuration commands
configCmdArgs_2: '0x00000000'
# ------------------------------------------===== reserved2 [Optional] =====------------------------------------------
# Description: Offset: 0x0000003C, Width: 32b; [0x03c-0x03f] Reserved for future use
reserved2: '0x00000000'
# ------------------------------------===== controllerMiscOption [Optional] =====-------------------------------------
# Description: Offset: 0x00000040, Width: 32b; [0x040-0x043] Controller Misc Options, see Misc feature bit
# definitions for more details
controllerMiscOption: '0x00000000'
# -----------------------------------------===== deviceType [Optional] =====------------------------------------------
# Description: Offset: 0x00000044, Width: 8b; [0x044-0x044] Device Type: See Flash Type Definition for more details
deviceType: '0x00'
# ----------------------------------------===== sflashPadType [Optional] =====----------------------------------------
# Description: Offset: 0x00000045, Width: 8b; [0x045-0x045] Serial Flash Pad Type: 1 - Single, 2 - Dual, 4 - Quad, 8
# - Octal
sflashPadType: '0x00'
# ----------------------------------------===== serialClkFreq [Optional] =====----------------------------------------
# Description: Offset: 0x00000046, Width: 8b; [0x046-0x046] Serial Flash Frequency, device specific definitions, See
# System Boot Chapter for more details
serialClkFreq: '0x00'
# -------------------------------------===== lutCustomSeqEnable [Optional] =====--------------------------------------
# Description: Offset: 0x00000047, Width: 8b; [0x047-0x047] LUT customization Enable, it is required if the
# program/erase cannot be done using 1 LUT sequence, currently, only applicable to HyperFLASH
lutCustomSeqEnable: '0x00'
# -----------------------------------------===== reserved3_0 [Optional] =====-----------------------------------------
# Description: Offset: 0x00000048, Width: 32b; [0x048-0x04f] Reserved for future use
reserved3_0: '0x00000000'
# -----------------------------------------===== reserved3_1 [Optional] =====-----------------------------------------
# Description: Offset: 0x0000004C, Width: 32b; [0x048-0x04f] Reserved for future use
reserved3_1: '0x00000000'
# ----------------------------------------===== sflashA1Size [Optional] =====-----------------------------------------
# Description: Offset: 0x00000050, Width: 32b; [0x050-0x053] Size of Flash connected to A1
sflashA1Size: '0x00000000'
# ----------------------------------------===== sflashA2Size [Optional] =====-----------------------------------------
# Description: Offset: 0x00000054, Width: 32b; [0x054-0x057] Size of Flash connected to A2
sflashA2Size: '0x00000000'
# ----------------------------------------===== sflashB1Size [Optional] =====-----------------------------------------
# Description: Offset: 0x00000058, Width: 32b; [0x058-0x05b] Size of Flash connected to B1
sflashB1Size: '0x00000000'
# ----------------------------------------===== sflashB2Size [Optional] =====-----------------------------------------
# Description: Offset: 0x0000005C, Width: 32b; [0x05c-0x05f] Size of Flash connected to B2
sflashB2Size: '0x00000000'
# ------------------------------------===== csPadSettingOverride [Optional] =====-------------------------------------
# Description: Offset: 0x00000060, Width: 32b; [0x060-0x063] CS pad setting override value
csPadSettingOverride: '0x00000000'
# -----------------------------------===== sclkPadSettingOverride [Optional] =====------------------------------------
# Description: Offset: 0x00000064, Width: 32b; [0x064-0x067] SCK pad setting override value
sclkPadSettingOverride: '0x00000000'
# -----------------------------------===== dataPadSettingOverride [Optional] =====------------------------------------
# Description: Offset: 0x00000068, Width: 32b; [0x068-0x06b] data pad setting override value
dataPadSettingOverride: '0x00000000'
# ------------------------------------===== dqsPadSettingOverride [Optional] =====------------------------------------
# Description: Offset: 0x0000006C, Width: 32b; [0x06c-0x06f] DQS pad setting override value
dqsPadSettingOverride: '0x00000000'
# -----------------------------------------===== timeoutInMs [Optional] =====-----------------------------------------
# Description: Offset: 0x00000070, Width: 32b; [0x070-0x073] Timeout threshold for read status command
timeoutInMs: '0x00000000'
# ---------------------------------------===== commandInterval [Optional] =====---------------------------------------
# Description: Offset: 0x00000074, Width: 32b; [0x074-0x077] CS deselect interval between two commands
commandInterval: '0x00000000'
# ---------------------------------------===== dataValidTime_0 [Optional] =====---------------------------------------
# Description: Offset: 0x00000078, Width: 16b; [0x078-0x07b] CLK edge to data valid time for PORT A and PORT B
dataValidTime_0: '0x0000'
# ---------------------------------------===== dataValidTime_1 [Optional] =====---------------------------------------
# Description: Offset: 0x0000007A, Width: 16b; [0x078-0x07b] CLK edge to data valid time for PORT A and PORT B
dataValidTime_1: '0x0000'
# -----------------------------------------===== busyOffset [Optional] =====------------------------------------------
# Description: Offset: 0x0000007C, Width: 16b; [0x07c-0x07d] Busy offset, valid value: 0-31
busyOffset: '0x0000'
# ---------------------------------------===== busyBitPolarity [Optional] =====---------------------------------------
# Description: Offset: 0x0000007E, Width: 16b; [0x07e-0x07f] Busy flag polarity, 0 - busy flag is 1 when flash device
# is busy, 1 - busy flag is 0 when flash device is busy
busyBitPolarity: '0x0000'
# -----------------------------------===== lookupTable_seq0_instr0 [Optional] =====-----------------------------------
# Description: Offset: 0x00000080, Width: 16b; Lookup table holds Flash command sequences 0, instruction 0
lookupTable_seq0_instr0:
# ------------------------------------------===== OPERAND [Optional] =====------------------------------------------
# Description: Offset: 0b, Width: 8b, Instruction operand. Its values depends on used instruction
OPERAND: 0
# -----------------------------------------===== NUM_PADS [Optional] =====------------------------------------------
# Description: Offset: 8b, Width: 2b, Number of pads used by instruction. Some instructions ignores this parameter.
# - 1PAD, (0): Single mode. One pad is used.
# - 2PAD, (1): Dual mode. Two pads are used.
# - 4PAD, (2): Quad mode. Four pads are used.
# - 8PAD, (3): Octal mode. Eight pads are used.
# Possible options: <1PAD, 2PAD, 4PAD, 8PAD>
NUM_PADS: 1PAD
# --------------------------------------===== OPERATION_CODE [Optional] =====---------------------------------------
# Description: Offset: 10b, Width: 6b, Instruction operation code.
# - STOP, (0): Stop execution and de-assert CS. Then, the next command sequence (to the same flash device) starts
# from instruction pointer 0.
# - CMD_SDR, (1): Transmit command code to Flash.
# - RADDR_SDR, (2): Transmit row address to Flash.
# - CADDR_SDR, (3): Transmit column address to Flash.
# - MODE1_SDR, (4): Transmit mode bits to Flash.
# - MODE2_SDR, (5): Transmit mode bits to Flash.
# - MODE4_SDR, (6): Transmit mode bits to Flash.
# - MODE8_SDR, (7): Transmit mode bits to Flash.
# - WRITE_SDR, (8): Transmit program data to Flash device.
# - READ_SDR, (9): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_SDR, (10): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_SDR, (11): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_SDR, (12): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_SDR, (13): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# - JMP_ON_CS, (31): Stop execution, de-assert CS and save operand[7:0] as the instruction start pointer for next
# sequence.Normally this instruction is used to support Execute-In-Place enhanced mode. See XIP enhanced mode for
# more details.This instruction is only allowed for AHB read commands. There is interrupt status bit set
# (INTR[IPCMDERR] or INTR[AHBCMDERR]) when using this instruction in IP command or AHB write command.
# - CMD_DDR, (33): Transmit command code to Flash.
# - RADDR_DDR, (34): Transmit row address to Flash.
# - CADDR_DDR, (35): Transmit column address to Flash.
# - MODE1_DDR, (36): Transmit mode bits to Flash.
# - MODE2_DDR, (37): Transmit mode bits to Flash.
# - MODE4_DDR, (38): Transmit mode bits to Flash.
# - MODE8_DDR, (39): Transmit mode bits to Flash.
# - WRITE_DDR, (40): Transmit program data to Flash device.
# - READ_DDR, (41): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_DDR, (42): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_DDR, (43): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_DDR, (44): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_DDR, (45): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# Possible options: <STOP, CMD_SDR, RADDR_SDR, CADDR_SDR, MODE1_SDR, MODE2_SDR, MODE4_SDR, MODE8_SDR, WRITE_SDR,
# READ_SDR, LEARN_SDR, DATSZ_SDR, DUMMY_SDR, DUMMY_RWDS_SDR, JMP_ON_CS, CMD_DDR, RADDR_DDR, CADDR_DDR, MODE1_DDR,
# MODE2_DDR, MODE4_DDR, MODE8_DDR, WRITE_DDR, READ_DDR, LEARN_DDR, DATSZ_DDR, DUMMY_DDR, DUMMY_RWDS_DDR>
OPERATION_CODE: STOP
lookupTable_seq0_instr1:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq0_instr2:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq0_instr3:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq0_instr4:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq0_instr5:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq0_instr6:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq0_instr7:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
# -----------------------------------===== lookupTable_seq1_instr0 [Optional] =====-----------------------------------
# Description: Offset: 0x00000090, Width: 16b; Lookup table holds Flash command sequences 1, instruction 0
lookupTable_seq1_instr0:
# ------------------------------------------===== OPERAND [Optional] =====------------------------------------------
# Description: Offset: 0b, Width: 8b, Instruction operand. Its values depends on used instruction
OPERAND: 0
# -----------------------------------------===== NUM_PADS [Optional] =====------------------------------------------
# Description: Offset: 8b, Width: 2b, Number of pads used by instruction. Some instructions ignores this parameter.
# - 1PAD, (0): Single mode. One pad is used.
# - 2PAD, (1): Dual mode. Two pads are used.
# - 4PAD, (2): Quad mode. Four pads are used.
# - 8PAD, (3): Octal mode. Eight pads are used.
# Possible options: <1PAD, 2PAD, 4PAD, 8PAD>
NUM_PADS: 1PAD
# --------------------------------------===== OPERATION_CODE [Optional] =====---------------------------------------
# Description: Offset: 10b, Width: 6b, Instruction operation code.
# - STOP, (0): Stop execution and de-assert CS. Then, the next command sequence (to the same flash device) starts
# from instruction pointer 0.
# - CMD_SDR, (1): Transmit command code to Flash.
# - RADDR_SDR, (2): Transmit row address to Flash.
# - CADDR_SDR, (3): Transmit column address to Flash.
# - MODE1_SDR, (4): Transmit mode bits to Flash.
# - MODE2_SDR, (5): Transmit mode bits to Flash.
# - MODE4_SDR, (6): Transmit mode bits to Flash.
# - MODE8_SDR, (7): Transmit mode bits to Flash.
# - WRITE_SDR, (8): Transmit program data to Flash device.
# - READ_SDR, (9): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_SDR, (10): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_SDR, (11): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_SDR, (12): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_SDR, (13): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# - JMP_ON_CS, (31): Stop execution, de-assert CS and save operand[7:0] as the instruction start pointer for next
# sequence.Normally this instruction is used to support Execute-In-Place enhanced mode. See XIP enhanced mode for
# more details.This instruction is only allowed for AHB read commands. There is interrupt status bit set
# (INTR[IPCMDERR] or INTR[AHBCMDERR]) when using this instruction in IP command or AHB write command.
# - CMD_DDR, (33): Transmit command code to Flash.
# - RADDR_DDR, (34): Transmit row address to Flash.
# - CADDR_DDR, (35): Transmit column address to Flash.
# - MODE1_DDR, (36): Transmit mode bits to Flash.
# - MODE2_DDR, (37): Transmit mode bits to Flash.
# - MODE4_DDR, (38): Transmit mode bits to Flash.
# - MODE8_DDR, (39): Transmit mode bits to Flash.
# - WRITE_DDR, (40): Transmit program data to Flash device.
# - READ_DDR, (41): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_DDR, (42): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_DDR, (43): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_DDR, (44): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_DDR, (45): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# Possible options: <STOP, CMD_SDR, RADDR_SDR, CADDR_SDR, MODE1_SDR, MODE2_SDR, MODE4_SDR, MODE8_SDR, WRITE_SDR,
# READ_SDR, LEARN_SDR, DATSZ_SDR, DUMMY_SDR, DUMMY_RWDS_SDR, JMP_ON_CS, CMD_DDR, RADDR_DDR, CADDR_DDR, MODE1_DDR,
# MODE2_DDR, MODE4_DDR, MODE8_DDR, WRITE_DDR, READ_DDR, LEARN_DDR, DATSZ_DDR, DUMMY_DDR, DUMMY_RWDS_DDR>
OPERATION_CODE: STOP
lookupTable_seq1_instr1:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq1_instr2:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq1_instr3:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq1_instr4:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq1_instr5:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq1_instr6:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq1_instr7:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
# -----------------------------------===== lookupTable_seq2_instr0 [Optional] =====-----------------------------------
# Description: Offset: 0x000000A0, Width: 16b; Lookup table holds Flash command sequences 2, instruction 0
lookupTable_seq2_instr0:
# ------------------------------------------===== OPERAND [Optional] =====------------------------------------------
# Description: Offset: 0b, Width: 8b, Instruction operand. Its values depends on used instruction
OPERAND: 0
# -----------------------------------------===== NUM_PADS [Optional] =====------------------------------------------
# Description: Offset: 8b, Width: 2b, Number of pads used by instruction. Some instructions ignores this parameter.
# - 1PAD, (0): Single mode. One pad is used.
# - 2PAD, (1): Dual mode. Two pads are used.
# - 4PAD, (2): Quad mode. Four pads are used.
# - 8PAD, (3): Octal mode. Eight pads are used.
# Possible options: <1PAD, 2PAD, 4PAD, 8PAD>
NUM_PADS: 1PAD
# --------------------------------------===== OPERATION_CODE [Optional] =====---------------------------------------
# Description: Offset: 10b, Width: 6b, Instruction operation code.
# - STOP, (0): Stop execution and de-assert CS. Then, the next command sequence (to the same flash device) starts
# from instruction pointer 0.
# - CMD_SDR, (1): Transmit command code to Flash.
# - RADDR_SDR, (2): Transmit row address to Flash.
# - CADDR_SDR, (3): Transmit column address to Flash.
# - MODE1_SDR, (4): Transmit mode bits to Flash.
# - MODE2_SDR, (5): Transmit mode bits to Flash.
# - MODE4_SDR, (6): Transmit mode bits to Flash.
# - MODE8_SDR, (7): Transmit mode bits to Flash.
# - WRITE_SDR, (8): Transmit program data to Flash device.
# - READ_SDR, (9): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_SDR, (10): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_SDR, (11): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_SDR, (12): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_SDR, (13): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# - JMP_ON_CS, (31): Stop execution, de-assert CS and save operand[7:0] as the instruction start pointer for next
# sequence.Normally this instruction is used to support Execute-In-Place enhanced mode. See XIP enhanced mode for
# more details.This instruction is only allowed for AHB read commands. There is interrupt status bit set
# (INTR[IPCMDERR] or INTR[AHBCMDERR]) when using this instruction in IP command or AHB write command.
# - CMD_DDR, (33): Transmit command code to Flash.
# - RADDR_DDR, (34): Transmit row address to Flash.
# - CADDR_DDR, (35): Transmit column address to Flash.
# - MODE1_DDR, (36): Transmit mode bits to Flash.
# - MODE2_DDR, (37): Transmit mode bits to Flash.
# - MODE4_DDR, (38): Transmit mode bits to Flash.
# - MODE8_DDR, (39): Transmit mode bits to Flash.
# - WRITE_DDR, (40): Transmit program data to Flash device.
# - READ_DDR, (41): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_DDR, (42): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_DDR, (43): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_DDR, (44): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_DDR, (45): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# Possible options: <STOP, CMD_SDR, RADDR_SDR, CADDR_SDR, MODE1_SDR, MODE2_SDR, MODE4_SDR, MODE8_SDR, WRITE_SDR,
# READ_SDR, LEARN_SDR, DATSZ_SDR, DUMMY_SDR, DUMMY_RWDS_SDR, JMP_ON_CS, CMD_DDR, RADDR_DDR, CADDR_DDR, MODE1_DDR,
# MODE2_DDR, MODE4_DDR, MODE8_DDR, WRITE_DDR, READ_DDR, LEARN_DDR, DATSZ_DDR, DUMMY_DDR, DUMMY_RWDS_DDR>
OPERATION_CODE: STOP
lookupTable_seq2_instr1:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq2_instr2:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq2_instr3:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq2_instr4:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq2_instr5:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq2_instr6:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq2_instr7:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
# -----------------------------------===== lookupTable_seq3_instr0 [Optional] =====-----------------------------------
# Description: Offset: 0x000000B0, Width: 16b; Lookup table holds Flash command sequences 3, instruction 0
lookupTable_seq3_instr0:
# ------------------------------------------===== OPERAND [Optional] =====------------------------------------------
# Description: Offset: 0b, Width: 8b, Instruction operand. Its values depends on used instruction
OPERAND: 0
# -----------------------------------------===== NUM_PADS [Optional] =====------------------------------------------
# Description: Offset: 8b, Width: 2b, Number of pads used by instruction. Some instructions ignores this parameter.
# - 1PAD, (0): Single mode. One pad is used.
# - 2PAD, (1): Dual mode. Two pads are used.
# - 4PAD, (2): Quad mode. Four pads are used.
# - 8PAD, (3): Octal mode. Eight pads are used.
# Possible options: <1PAD, 2PAD, 4PAD, 8PAD>
NUM_PADS: 1PAD
# --------------------------------------===== OPERATION_CODE [Optional] =====---------------------------------------
# Description: Offset: 10b, Width: 6b, Instruction operation code.
# - STOP, (0): Stop execution and de-assert CS. Then, the next command sequence (to the same flash device) starts
# from instruction pointer 0.
# - CMD_SDR, (1): Transmit command code to Flash.
# - RADDR_SDR, (2): Transmit row address to Flash.
# - CADDR_SDR, (3): Transmit column address to Flash.
# - MODE1_SDR, (4): Transmit mode bits to Flash.
# - MODE2_SDR, (5): Transmit mode bits to Flash.
# - MODE4_SDR, (6): Transmit mode bits to Flash.
# - MODE8_SDR, (7): Transmit mode bits to Flash.
# - WRITE_SDR, (8): Transmit program data to Flash device.
# - READ_SDR, (9): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_SDR, (10): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_SDR, (11): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_SDR, (12): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_SDR, (13): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# - JMP_ON_CS, (31): Stop execution, de-assert CS and save operand[7:0] as the instruction start pointer for next
# sequence.Normally this instruction is used to support Execute-In-Place enhanced mode. See XIP enhanced mode for
# more details.This instruction is only allowed for AHB read commands. There is interrupt status bit set
# (INTR[IPCMDERR] or INTR[AHBCMDERR]) when using this instruction in IP command or AHB write command.
# - CMD_DDR, (33): Transmit command code to Flash.
# - RADDR_DDR, (34): Transmit row address to Flash.
# - CADDR_DDR, (35): Transmit column address to Flash.
# - MODE1_DDR, (36): Transmit mode bits to Flash.
# - MODE2_DDR, (37): Transmit mode bits to Flash.
# - MODE4_DDR, (38): Transmit mode bits to Flash.
# - MODE8_DDR, (39): Transmit mode bits to Flash.
# - WRITE_DDR, (40): Transmit program data to Flash device.
# - READ_DDR, (41): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_DDR, (42): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_DDR, (43): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_DDR, (44): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_DDR, (45): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# Possible options: <STOP, CMD_SDR, RADDR_SDR, CADDR_SDR, MODE1_SDR, MODE2_SDR, MODE4_SDR, MODE8_SDR, WRITE_SDR,
# READ_SDR, LEARN_SDR, DATSZ_SDR, DUMMY_SDR, DUMMY_RWDS_SDR, JMP_ON_CS, CMD_DDR, RADDR_DDR, CADDR_DDR, MODE1_DDR,
# MODE2_DDR, MODE4_DDR, MODE8_DDR, WRITE_DDR, READ_DDR, LEARN_DDR, DATSZ_DDR, DUMMY_DDR, DUMMY_RWDS_DDR>
OPERATION_CODE: STOP
lookupTable_seq3_instr1:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq3_instr2:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq3_instr3:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq3_instr4:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq3_instr5:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq3_instr6:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq3_instr7:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
# -----------------------------------===== lookupTable_seq4_instr0 [Optional] =====-----------------------------------
# Description: Offset: 0x000000C0, Width: 16b; Lookup table holds Flash command sequences 4, instruction 0
lookupTable_seq4_instr0:
# ------------------------------------------===== OPERAND [Optional] =====------------------------------------------
# Description: Offset: 0b, Width: 8b, Instruction operand. Its values depends on used instruction
OPERAND: 0
# -----------------------------------------===== NUM_PADS [Optional] =====------------------------------------------
# Description: Offset: 8b, Width: 2b, Number of pads used by instruction. Some instructions ignores this parameter.
# - 1PAD, (0): Single mode. One pad is used.
# - 2PAD, (1): Dual mode. Two pads are used.
# - 4PAD, (2): Quad mode. Four pads are used.
# - 8PAD, (3): Octal mode. Eight pads are used.
# Possible options: <1PAD, 2PAD, 4PAD, 8PAD>
NUM_PADS: 1PAD
# --------------------------------------===== OPERATION_CODE [Optional] =====---------------------------------------
# Description: Offset: 10b, Width: 6b, Instruction operation code.
# - STOP, (0): Stop execution and de-assert CS. Then, the next command sequence (to the same flash device) starts
# from instruction pointer 0.
# - CMD_SDR, (1): Transmit command code to Flash.
# - RADDR_SDR, (2): Transmit row address to Flash.
# - CADDR_SDR, (3): Transmit column address to Flash.
# - MODE1_SDR, (4): Transmit mode bits to Flash.
# - MODE2_SDR, (5): Transmit mode bits to Flash.
# - MODE4_SDR, (6): Transmit mode bits to Flash.
# - MODE8_SDR, (7): Transmit mode bits to Flash.
# - WRITE_SDR, (8): Transmit program data to Flash device.
# - READ_SDR, (9): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_SDR, (10): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_SDR, (11): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_SDR, (12): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_SDR, (13): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# - JMP_ON_CS, (31): Stop execution, de-assert CS and save operand[7:0] as the instruction start pointer for next
# sequence.Normally this instruction is used to support Execute-In-Place enhanced mode. See XIP enhanced mode for
# more details.This instruction is only allowed for AHB read commands. There is interrupt status bit set
# (INTR[IPCMDERR] or INTR[AHBCMDERR]) when using this instruction in IP command or AHB write command.
# - CMD_DDR, (33): Transmit command code to Flash.
# - RADDR_DDR, (34): Transmit row address to Flash.
# - CADDR_DDR, (35): Transmit column address to Flash.
# - MODE1_DDR, (36): Transmit mode bits to Flash.
# - MODE2_DDR, (37): Transmit mode bits to Flash.
# - MODE4_DDR, (38): Transmit mode bits to Flash.
# - MODE8_DDR, (39): Transmit mode bits to Flash.
# - WRITE_DDR, (40): Transmit program data to Flash device.
# - READ_DDR, (41): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_DDR, (42): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_DDR, (43): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_DDR, (44): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_DDR, (45): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# Possible options: <STOP, CMD_SDR, RADDR_SDR, CADDR_SDR, MODE1_SDR, MODE2_SDR, MODE4_SDR, MODE8_SDR, WRITE_SDR,
# READ_SDR, LEARN_SDR, DATSZ_SDR, DUMMY_SDR, DUMMY_RWDS_SDR, JMP_ON_CS, CMD_DDR, RADDR_DDR, CADDR_DDR, MODE1_DDR,
# MODE2_DDR, MODE4_DDR, MODE8_DDR, WRITE_DDR, READ_DDR, LEARN_DDR, DATSZ_DDR, DUMMY_DDR, DUMMY_RWDS_DDR>
OPERATION_CODE: STOP
lookupTable_seq4_instr1:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq4_instr2:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq4_instr3:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq4_instr4:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq4_instr5:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq4_instr6:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq4_instr7:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
# -----------------------------------===== lookupTable_seq5_instr0 [Optional] =====-----------------------------------
# Description: Offset: 0x000000D0, Width: 16b; Lookup table holds Flash command sequences 5, instruction 0
lookupTable_seq5_instr0:
# ------------------------------------------===== OPERAND [Optional] =====------------------------------------------
# Description: Offset: 0b, Width: 8b, Instruction operand. Its values depends on used instruction
OPERAND: 0
# -----------------------------------------===== NUM_PADS [Optional] =====------------------------------------------
# Description: Offset: 8b, Width: 2b, Number of pads used by instruction. Some instructions ignores this parameter.
# - 1PAD, (0): Single mode. One pad is used.
# - 2PAD, (1): Dual mode. Two pads are used.
# - 4PAD, (2): Quad mode. Four pads are used.
# - 8PAD, (3): Octal mode. Eight pads are used.
# Possible options: <1PAD, 2PAD, 4PAD, 8PAD>
NUM_PADS: 1PAD
# --------------------------------------===== OPERATION_CODE [Optional] =====---------------------------------------
# Description: Offset: 10b, Width: 6b, Instruction operation code.
# - STOP, (0): Stop execution and de-assert CS. Then, the next command sequence (to the same flash device) starts
# from instruction pointer 0.
# - CMD_SDR, (1): Transmit command code to Flash.
# - RADDR_SDR, (2): Transmit row address to Flash.
# - CADDR_SDR, (3): Transmit column address to Flash.
# - MODE1_SDR, (4): Transmit mode bits to Flash.
# - MODE2_SDR, (5): Transmit mode bits to Flash.
# - MODE4_SDR, (6): Transmit mode bits to Flash.
# - MODE8_SDR, (7): Transmit mode bits to Flash.
# - WRITE_SDR, (8): Transmit program data to Flash device.
# - READ_SDR, (9): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_SDR, (10): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_SDR, (11): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_SDR, (12): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_SDR, (13): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# - JMP_ON_CS, (31): Stop execution, de-assert CS and save operand[7:0] as the instruction start pointer for next
# sequence.Normally this instruction is used to support Execute-In-Place enhanced mode. See XIP enhanced mode for
# more details.This instruction is only allowed for AHB read commands. There is interrupt status bit set
# (INTR[IPCMDERR] or INTR[AHBCMDERR]) when using this instruction in IP command or AHB write command.
# - CMD_DDR, (33): Transmit command code to Flash.
# - RADDR_DDR, (34): Transmit row address to Flash.
# - CADDR_DDR, (35): Transmit column address to Flash.
# - MODE1_DDR, (36): Transmit mode bits to Flash.
# - MODE2_DDR, (37): Transmit mode bits to Flash.
# - MODE4_DDR, (38): Transmit mode bits to Flash.
# - MODE8_DDR, (39): Transmit mode bits to Flash.
# - WRITE_DDR, (40): Transmit program data to Flash device.
# - READ_DDR, (41): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_DDR, (42): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_DDR, (43): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_DDR, (44): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_DDR, (45): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# Possible options: <STOP, CMD_SDR, RADDR_SDR, CADDR_SDR, MODE1_SDR, MODE2_SDR, MODE4_SDR, MODE8_SDR, WRITE_SDR,
# READ_SDR, LEARN_SDR, DATSZ_SDR, DUMMY_SDR, DUMMY_RWDS_SDR, JMP_ON_CS, CMD_DDR, RADDR_DDR, CADDR_DDR, MODE1_DDR,
# MODE2_DDR, MODE4_DDR, MODE8_DDR, WRITE_DDR, READ_DDR, LEARN_DDR, DATSZ_DDR, DUMMY_DDR, DUMMY_RWDS_DDR>
OPERATION_CODE: STOP
lookupTable_seq5_instr1:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq5_instr2:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq5_instr3:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq5_instr4:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq5_instr5:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq5_instr6:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq5_instr7:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
# -----------------------------------===== lookupTable_seq6_instr0 [Optional] =====-----------------------------------
# Description: Offset: 0x000000E0, Width: 16b; Lookup table holds Flash command sequences 6, instruction 0
lookupTable_seq6_instr0:
# ------------------------------------------===== OPERAND [Optional] =====------------------------------------------
# Description: Offset: 0b, Width: 8b, Instruction operand. Its values depends on used instruction
OPERAND: 0
# -----------------------------------------===== NUM_PADS [Optional] =====------------------------------------------
# Description: Offset: 8b, Width: 2b, Number of pads used by instruction. Some instructions ignores this parameter.
# - 1PAD, (0): Single mode. One pad is used.
# - 2PAD, (1): Dual mode. Two pads are used.
# - 4PAD, (2): Quad mode. Four pads are used.
# - 8PAD, (3): Octal mode. Eight pads are used.
# Possible options: <1PAD, 2PAD, 4PAD, 8PAD>
NUM_PADS: 1PAD
# --------------------------------------===== OPERATION_CODE [Optional] =====---------------------------------------
# Description: Offset: 10b, Width: 6b, Instruction operation code.
# - STOP, (0): Stop execution and de-assert CS. Then, the next command sequence (to the same flash device) starts
# from instruction pointer 0.
# - CMD_SDR, (1): Transmit command code to Flash.
# - RADDR_SDR, (2): Transmit row address to Flash.
# - CADDR_SDR, (3): Transmit column address to Flash.
# - MODE1_SDR, (4): Transmit mode bits to Flash.
# - MODE2_SDR, (5): Transmit mode bits to Flash.
# - MODE4_SDR, (6): Transmit mode bits to Flash.
# - MODE8_SDR, (7): Transmit mode bits to Flash.
# - WRITE_SDR, (8): Transmit program data to Flash device.
# - READ_SDR, (9): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_SDR, (10): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_SDR, (11): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_SDR, (12): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_SDR, (13): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# - JMP_ON_CS, (31): Stop execution, de-assert CS and save operand[7:0] as the instruction start pointer for next
# sequence.Normally this instruction is used to support Execute-In-Place enhanced mode. See XIP enhanced mode for
# more details.This instruction is only allowed for AHB read commands. There is interrupt status bit set
# (INTR[IPCMDERR] or INTR[AHBCMDERR]) when using this instruction in IP command or AHB write command.
# - CMD_DDR, (33): Transmit command code to Flash.
# - RADDR_DDR, (34): Transmit row address to Flash.
# - CADDR_DDR, (35): Transmit column address to Flash.
# - MODE1_DDR, (36): Transmit mode bits to Flash.
# - MODE2_DDR, (37): Transmit mode bits to Flash.
# - MODE4_DDR, (38): Transmit mode bits to Flash.
# - MODE8_DDR, (39): Transmit mode bits to Flash.
# - WRITE_DDR, (40): Transmit program data to Flash device.
# - READ_DDR, (41): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_DDR, (42): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_DDR, (43): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_DDR, (44): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_DDR, (45): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# Possible options: <STOP, CMD_SDR, RADDR_SDR, CADDR_SDR, MODE1_SDR, MODE2_SDR, MODE4_SDR, MODE8_SDR, WRITE_SDR,
# READ_SDR, LEARN_SDR, DATSZ_SDR, DUMMY_SDR, DUMMY_RWDS_SDR, JMP_ON_CS, CMD_DDR, RADDR_DDR, CADDR_DDR, MODE1_DDR,
# MODE2_DDR, MODE4_DDR, MODE8_DDR, WRITE_DDR, READ_DDR, LEARN_DDR, DATSZ_DDR, DUMMY_DDR, DUMMY_RWDS_DDR>
OPERATION_CODE: STOP
lookupTable_seq6_instr1:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq6_instr2:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq6_instr3:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq6_instr4:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq6_instr5:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq6_instr6:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq6_instr7:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
# -----------------------------------===== lookupTable_seq7_instr0 [Optional] =====-----------------------------------
# Description: Offset: 0x000000F0, Width: 16b; Lookup table holds Flash command sequences 7, instruction 0
lookupTable_seq7_instr0:
# ------------------------------------------===== OPERAND [Optional] =====------------------------------------------
# Description: Offset: 0b, Width: 8b, Instruction operand. Its values depends on used instruction
OPERAND: 0
# -----------------------------------------===== NUM_PADS [Optional] =====------------------------------------------
# Description: Offset: 8b, Width: 2b, Number of pads used by instruction. Some instructions ignores this parameter.
# - 1PAD, (0): Single mode. One pad is used.
# - 2PAD, (1): Dual mode. Two pads are used.
# - 4PAD, (2): Quad mode. Four pads are used.
# - 8PAD, (3): Octal mode. Eight pads are used.
# Possible options: <1PAD, 2PAD, 4PAD, 8PAD>
NUM_PADS: 1PAD
# --------------------------------------===== OPERATION_CODE [Optional] =====---------------------------------------
# Description: Offset: 10b, Width: 6b, Instruction operation code.
# - STOP, (0): Stop execution and de-assert CS. Then, the next command sequence (to the same flash device) starts
# from instruction pointer 0.
# - CMD_SDR, (1): Transmit command code to Flash.
# - RADDR_SDR, (2): Transmit row address to Flash.
# - CADDR_SDR, (3): Transmit column address to Flash.
# - MODE1_SDR, (4): Transmit mode bits to Flash.
# - MODE2_SDR, (5): Transmit mode bits to Flash.
# - MODE4_SDR, (6): Transmit mode bits to Flash.
# - MODE8_SDR, (7): Transmit mode bits to Flash.
# - WRITE_SDR, (8): Transmit program data to Flash device.
# - READ_SDR, (9): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_SDR, (10): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_SDR, (11): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_SDR, (12): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_SDR, (13): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# - JMP_ON_CS, (31): Stop execution, de-assert CS and save operand[7:0] as the instruction start pointer for next
# sequence.Normally this instruction is used to support Execute-In-Place enhanced mode. See XIP enhanced mode for
# more details.This instruction is only allowed for AHB read commands. There is interrupt status bit set
# (INTR[IPCMDERR] or INTR[AHBCMDERR]) when using this instruction in IP command or AHB write command.
# - CMD_DDR, (33): Transmit command code to Flash.
# - RADDR_DDR, (34): Transmit row address to Flash.
# - CADDR_DDR, (35): Transmit column address to Flash.
# - MODE1_DDR, (36): Transmit mode bits to Flash.
# - MODE2_DDR, (37): Transmit mode bits to Flash.
# - MODE4_DDR, (38): Transmit mode bits to Flash.
# - MODE8_DDR, (39): Transmit mode bits to Flash.
# - WRITE_DDR, (40): Transmit program data to Flash device.
# - READ_DDR, (41): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_DDR, (42): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_DDR, (43): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_DDR, (44): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_DDR, (45): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# Possible options: <STOP, CMD_SDR, RADDR_SDR, CADDR_SDR, MODE1_SDR, MODE2_SDR, MODE4_SDR, MODE8_SDR, WRITE_SDR,
# READ_SDR, LEARN_SDR, DATSZ_SDR, DUMMY_SDR, DUMMY_RWDS_SDR, JMP_ON_CS, CMD_DDR, RADDR_DDR, CADDR_DDR, MODE1_DDR,
# MODE2_DDR, MODE4_DDR, MODE8_DDR, WRITE_DDR, READ_DDR, LEARN_DDR, DATSZ_DDR, DUMMY_DDR, DUMMY_RWDS_DDR>
OPERATION_CODE: STOP
lookupTable_seq7_instr1:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq7_instr2:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq7_instr3:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq7_instr4:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq7_instr5:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq7_instr6:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq7_instr7:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
# -----------------------------------===== lookupTable_seq8_instr0 [Optional] =====-----------------------------------
# Description: Offset: 0x00000100, Width: 16b; Lookup table holds Flash command sequences 8, instruction 0
lookupTable_seq8_instr0:
# ------------------------------------------===== OPERAND [Optional] =====------------------------------------------
# Description: Offset: 0b, Width: 8b, Instruction operand. Its values depends on used instruction
OPERAND: 0
# -----------------------------------------===== NUM_PADS [Optional] =====------------------------------------------
# Description: Offset: 8b, Width: 2b, Number of pads used by instruction. Some instructions ignores this parameter.
# - 1PAD, (0): Single mode. One pad is used.
# - 2PAD, (1): Dual mode. Two pads are used.
# - 4PAD, (2): Quad mode. Four pads are used.
# - 8PAD, (3): Octal mode. Eight pads are used.
# Possible options: <1PAD, 2PAD, 4PAD, 8PAD>
NUM_PADS: 1PAD
# --------------------------------------===== OPERATION_CODE [Optional] =====---------------------------------------
# Description: Offset: 10b, Width: 6b, Instruction operation code.
# - STOP, (0): Stop execution and de-assert CS. Then, the next command sequence (to the same flash device) starts
# from instruction pointer 0.
# - CMD_SDR, (1): Transmit command code to Flash.
# - RADDR_SDR, (2): Transmit row address to Flash.
# - CADDR_SDR, (3): Transmit column address to Flash.
# - MODE1_SDR, (4): Transmit mode bits to Flash.
# - MODE2_SDR, (5): Transmit mode bits to Flash.
# - MODE4_SDR, (6): Transmit mode bits to Flash.
# - MODE8_SDR, (7): Transmit mode bits to Flash.
# - WRITE_SDR, (8): Transmit program data to Flash device.
# - READ_SDR, (9): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_SDR, (10): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_SDR, (11): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_SDR, (12): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_SDR, (13): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# - JMP_ON_CS, (31): Stop execution, de-assert CS and save operand[7:0] as the instruction start pointer for next
# sequence.Normally this instruction is used to support Execute-In-Place enhanced mode. See XIP enhanced mode for
# more details.This instruction is only allowed for AHB read commands. There is interrupt status bit set
# (INTR[IPCMDERR] or INTR[AHBCMDERR]) when using this instruction in IP command or AHB write command.
# - CMD_DDR, (33): Transmit command code to Flash.
# - RADDR_DDR, (34): Transmit row address to Flash.
# - CADDR_DDR, (35): Transmit column address to Flash.
# - MODE1_DDR, (36): Transmit mode bits to Flash.
# - MODE2_DDR, (37): Transmit mode bits to Flash.
# - MODE4_DDR, (38): Transmit mode bits to Flash.
# - MODE8_DDR, (39): Transmit mode bits to Flash.
# - WRITE_DDR, (40): Transmit program data to Flash device.
# - READ_DDR, (41): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_DDR, (42): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_DDR, (43): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_DDR, (44): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_DDR, (45): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# Possible options: <STOP, CMD_SDR, RADDR_SDR, CADDR_SDR, MODE1_SDR, MODE2_SDR, MODE4_SDR, MODE8_SDR, WRITE_SDR,
# READ_SDR, LEARN_SDR, DATSZ_SDR, DUMMY_SDR, DUMMY_RWDS_SDR, JMP_ON_CS, CMD_DDR, RADDR_DDR, CADDR_DDR, MODE1_DDR,
# MODE2_DDR, MODE4_DDR, MODE8_DDR, WRITE_DDR, READ_DDR, LEARN_DDR, DATSZ_DDR, DUMMY_DDR, DUMMY_RWDS_DDR>
OPERATION_CODE: STOP
lookupTable_seq8_instr1:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq8_instr2:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq8_instr3:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq8_instr4:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq8_instr5:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq8_instr6:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq8_instr7:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
# -----------------------------------===== lookupTable_seq9_instr0 [Optional] =====-----------------------------------
# Description: Offset: 0x00000110, Width: 16b; Lookup table holds Flash command sequences 9, instruction 0
lookupTable_seq9_instr0:
# ------------------------------------------===== OPERAND [Optional] =====------------------------------------------
# Description: Offset: 0b, Width: 8b, Instruction operand. Its values depends on used instruction
OPERAND: 0
# -----------------------------------------===== NUM_PADS [Optional] =====------------------------------------------
# Description: Offset: 8b, Width: 2b, Number of pads used by instruction. Some instructions ignores this parameter.
# - 1PAD, (0): Single mode. One pad is used.
# - 2PAD, (1): Dual mode. Two pads are used.
# - 4PAD, (2): Quad mode. Four pads are used.
# - 8PAD, (3): Octal mode. Eight pads are used.
# Possible options: <1PAD, 2PAD, 4PAD, 8PAD>
NUM_PADS: 1PAD
# --------------------------------------===== OPERATION_CODE [Optional] =====---------------------------------------
# Description: Offset: 10b, Width: 6b, Instruction operation code.
# - STOP, (0): Stop execution and de-assert CS. Then, the next command sequence (to the same flash device) starts
# from instruction pointer 0.
# - CMD_SDR, (1): Transmit command code to Flash.
# - RADDR_SDR, (2): Transmit row address to Flash.
# - CADDR_SDR, (3): Transmit column address to Flash.
# - MODE1_SDR, (4): Transmit mode bits to Flash.
# - MODE2_SDR, (5): Transmit mode bits to Flash.
# - MODE4_SDR, (6): Transmit mode bits to Flash.
# - MODE8_SDR, (7): Transmit mode bits to Flash.
# - WRITE_SDR, (8): Transmit program data to Flash device.
# - READ_SDR, (9): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_SDR, (10): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_SDR, (11): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_SDR, (12): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_SDR, (13): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# - JMP_ON_CS, (31): Stop execution, de-assert CS and save operand[7:0] as the instruction start pointer for next
# sequence.Normally this instruction is used to support Execute-In-Place enhanced mode. See XIP enhanced mode for
# more details.This instruction is only allowed for AHB read commands. There is interrupt status bit set
# (INTR[IPCMDERR] or INTR[AHBCMDERR]) when using this instruction in IP command or AHB write command.
# - CMD_DDR, (33): Transmit command code to Flash.
# - RADDR_DDR, (34): Transmit row address to Flash.
# - CADDR_DDR, (35): Transmit column address to Flash.
# - MODE1_DDR, (36): Transmit mode bits to Flash.
# - MODE2_DDR, (37): Transmit mode bits to Flash.
# - MODE4_DDR, (38): Transmit mode bits to Flash.
# - MODE8_DDR, (39): Transmit mode bits to Flash.
# - WRITE_DDR, (40): Transmit program data to Flash device.
# - READ_DDR, (41): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_DDR, (42): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_DDR, (43): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_DDR, (44): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_DDR, (45): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# Possible options: <STOP, CMD_SDR, RADDR_SDR, CADDR_SDR, MODE1_SDR, MODE2_SDR, MODE4_SDR, MODE8_SDR, WRITE_SDR,
# READ_SDR, LEARN_SDR, DATSZ_SDR, DUMMY_SDR, DUMMY_RWDS_SDR, JMP_ON_CS, CMD_DDR, RADDR_DDR, CADDR_DDR, MODE1_DDR,
# MODE2_DDR, MODE4_DDR, MODE8_DDR, WRITE_DDR, READ_DDR, LEARN_DDR, DATSZ_DDR, DUMMY_DDR, DUMMY_RWDS_DDR>
OPERATION_CODE: STOP
lookupTable_seq9_instr1:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq9_instr2:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq9_instr3:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq9_instr4:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq9_instr5:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq9_instr6:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq9_instr7:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
# ----------------------------------===== lookupTable_seq10_instr0 [Optional] =====-----------------------------------
# Description: Offset: 0x00000120, Width: 16b; Lookup table holds Flash command sequences 10, instruction 0
lookupTable_seq10_instr0:
# ------------------------------------------===== OPERAND [Optional] =====------------------------------------------
# Description: Offset: 0b, Width: 8b, Instruction operand. Its values depends on used instruction
OPERAND: 0
# -----------------------------------------===== NUM_PADS [Optional] =====------------------------------------------
# Description: Offset: 8b, Width: 2b, Number of pads used by instruction. Some instructions ignores this parameter.
# - 1PAD, (0): Single mode. One pad is used.
# - 2PAD, (1): Dual mode. Two pads are used.
# - 4PAD, (2): Quad mode. Four pads are used.
# - 8PAD, (3): Octal mode. Eight pads are used.
# Possible options: <1PAD, 2PAD, 4PAD, 8PAD>
NUM_PADS: 1PAD
# --------------------------------------===== OPERATION_CODE [Optional] =====---------------------------------------
# Description: Offset: 10b, Width: 6b, Instruction operation code.
# - STOP, (0): Stop execution and de-assert CS. Then, the next command sequence (to the same flash device) starts
# from instruction pointer 0.
# - CMD_SDR, (1): Transmit command code to Flash.
# - RADDR_SDR, (2): Transmit row address to Flash.
# - CADDR_SDR, (3): Transmit column address to Flash.
# - MODE1_SDR, (4): Transmit mode bits to Flash.
# - MODE2_SDR, (5): Transmit mode bits to Flash.
# - MODE4_SDR, (6): Transmit mode bits to Flash.
# - MODE8_SDR, (7): Transmit mode bits to Flash.
# - WRITE_SDR, (8): Transmit program data to Flash device.
# - READ_SDR, (9): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_SDR, (10): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_SDR, (11): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_SDR, (12): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_SDR, (13): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# - JMP_ON_CS, (31): Stop execution, de-assert CS and save operand[7:0] as the instruction start pointer for next
# sequence.Normally this instruction is used to support Execute-In-Place enhanced mode. See XIP enhanced mode for
# more details.This instruction is only allowed for AHB read commands. There is interrupt status bit set
# (INTR[IPCMDERR] or INTR[AHBCMDERR]) when using this instruction in IP command or AHB write command.
# - CMD_DDR, (33): Transmit command code to Flash.
# - RADDR_DDR, (34): Transmit row address to Flash.
# - CADDR_DDR, (35): Transmit column address to Flash.
# - MODE1_DDR, (36): Transmit mode bits to Flash.
# - MODE2_DDR, (37): Transmit mode bits to Flash.
# - MODE4_DDR, (38): Transmit mode bits to Flash.
# - MODE8_DDR, (39): Transmit mode bits to Flash.
# - WRITE_DDR, (40): Transmit program data to Flash device.
# - READ_DDR, (41): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_DDR, (42): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_DDR, (43): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_DDR, (44): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_DDR, (45): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# Possible options: <STOP, CMD_SDR, RADDR_SDR, CADDR_SDR, MODE1_SDR, MODE2_SDR, MODE4_SDR, MODE8_SDR, WRITE_SDR,
# READ_SDR, LEARN_SDR, DATSZ_SDR, DUMMY_SDR, DUMMY_RWDS_SDR, JMP_ON_CS, CMD_DDR, RADDR_DDR, CADDR_DDR, MODE1_DDR,
# MODE2_DDR, MODE4_DDR, MODE8_DDR, WRITE_DDR, READ_DDR, LEARN_DDR, DATSZ_DDR, DUMMY_DDR, DUMMY_RWDS_DDR>
OPERATION_CODE: STOP
lookupTable_seq10_instr1:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq10_instr2:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq10_instr3:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq10_instr4:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq10_instr5:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq10_instr6:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq10_instr7:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
# ----------------------------------===== lookupTable_seq11_instr0 [Optional] =====-----------------------------------
# Description: Offset: 0x00000130, Width: 16b; Lookup table holds Flash command sequences 11, instruction 0
lookupTable_seq11_instr0:
# ------------------------------------------===== OPERAND [Optional] =====------------------------------------------
# Description: Offset: 0b, Width: 8b, Instruction operand. Its values depends on used instruction
OPERAND: 0
# -----------------------------------------===== NUM_PADS [Optional] =====------------------------------------------
# Description: Offset: 8b, Width: 2b, Number of pads used by instruction. Some instructions ignores this parameter.
# - 1PAD, (0): Single mode. One pad is used.
# - 2PAD, (1): Dual mode. Two pads are used.
# - 4PAD, (2): Quad mode. Four pads are used.
# - 8PAD, (3): Octal mode. Eight pads are used.
# Possible options: <1PAD, 2PAD, 4PAD, 8PAD>
NUM_PADS: 1PAD
# --------------------------------------===== OPERATION_CODE [Optional] =====---------------------------------------
# Description: Offset: 10b, Width: 6b, Instruction operation code.
# - STOP, (0): Stop execution and de-assert CS. Then, the next command sequence (to the same flash device) starts
# from instruction pointer 0.
# - CMD_SDR, (1): Transmit command code to Flash.
# - RADDR_SDR, (2): Transmit row address to Flash.
# - CADDR_SDR, (3): Transmit column address to Flash.
# - MODE1_SDR, (4): Transmit mode bits to Flash.
# - MODE2_SDR, (5): Transmit mode bits to Flash.
# - MODE4_SDR, (6): Transmit mode bits to Flash.
# - MODE8_SDR, (7): Transmit mode bits to Flash.
# - WRITE_SDR, (8): Transmit program data to Flash device.
# - READ_SDR, (9): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_SDR, (10): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_SDR, (11): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_SDR, (12): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_SDR, (13): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# - JMP_ON_CS, (31): Stop execution, de-assert CS and save operand[7:0] as the instruction start pointer for next
# sequence.Normally this instruction is used to support Execute-In-Place enhanced mode. See XIP enhanced mode for
# more details.This instruction is only allowed for AHB read commands. There is interrupt status bit set
# (INTR[IPCMDERR] or INTR[AHBCMDERR]) when using this instruction in IP command or AHB write command.
# - CMD_DDR, (33): Transmit command code to Flash.
# - RADDR_DDR, (34): Transmit row address to Flash.
# - CADDR_DDR, (35): Transmit column address to Flash.
# - MODE1_DDR, (36): Transmit mode bits to Flash.
# - MODE2_DDR, (37): Transmit mode bits to Flash.
# - MODE4_DDR, (38): Transmit mode bits to Flash.
# - MODE8_DDR, (39): Transmit mode bits to Flash.
# - WRITE_DDR, (40): Transmit program data to Flash device.
# - READ_DDR, (41): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_DDR, (42): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_DDR, (43): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_DDR, (44): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_DDR, (45): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# Possible options: <STOP, CMD_SDR, RADDR_SDR, CADDR_SDR, MODE1_SDR, MODE2_SDR, MODE4_SDR, MODE8_SDR, WRITE_SDR,
# READ_SDR, LEARN_SDR, DATSZ_SDR, DUMMY_SDR, DUMMY_RWDS_SDR, JMP_ON_CS, CMD_DDR, RADDR_DDR, CADDR_DDR, MODE1_DDR,
# MODE2_DDR, MODE4_DDR, MODE8_DDR, WRITE_DDR, READ_DDR, LEARN_DDR, DATSZ_DDR, DUMMY_DDR, DUMMY_RWDS_DDR>
OPERATION_CODE: STOP
lookupTable_seq11_instr1:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq11_instr2:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq11_instr3:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq11_instr4:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq11_instr5:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq11_instr6:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq11_instr7:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
# ----------------------------------===== lookupTable_seq12_instr0 [Optional] =====-----------------------------------
# Description: Offset: 0x00000140, Width: 16b; Lookup table holds Flash command sequences 12, instruction 0
lookupTable_seq12_instr0:
# ------------------------------------------===== OPERAND [Optional] =====------------------------------------------
# Description: Offset: 0b, Width: 8b, Instruction operand. Its values depends on used instruction
OPERAND: 0
# -----------------------------------------===== NUM_PADS [Optional] =====------------------------------------------
# Description: Offset: 8b, Width: 2b, Number of pads used by instruction. Some instructions ignores this parameter.
# - 1PAD, (0): Single mode. One pad is used.
# - 2PAD, (1): Dual mode. Two pads are used.
# - 4PAD, (2): Quad mode. Four pads are used.
# - 8PAD, (3): Octal mode. Eight pads are used.
# Possible options: <1PAD, 2PAD, 4PAD, 8PAD>
NUM_PADS: 1PAD
# --------------------------------------===== OPERATION_CODE [Optional] =====---------------------------------------
# Description: Offset: 10b, Width: 6b, Instruction operation code.
# - STOP, (0): Stop execution and de-assert CS. Then, the next command sequence (to the same flash device) starts
# from instruction pointer 0.
# - CMD_SDR, (1): Transmit command code to Flash.
# - RADDR_SDR, (2): Transmit row address to Flash.
# - CADDR_SDR, (3): Transmit column address to Flash.
# - MODE1_SDR, (4): Transmit mode bits to Flash.
# - MODE2_SDR, (5): Transmit mode bits to Flash.
# - MODE4_SDR, (6): Transmit mode bits to Flash.
# - MODE8_SDR, (7): Transmit mode bits to Flash.
# - WRITE_SDR, (8): Transmit program data to Flash device.
# - READ_SDR, (9): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_SDR, (10): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_SDR, (11): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_SDR, (12): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_SDR, (13): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# - JMP_ON_CS, (31): Stop execution, de-assert CS and save operand[7:0] as the instruction start pointer for next
# sequence.Normally this instruction is used to support Execute-In-Place enhanced mode. See XIP enhanced mode for
# more details.This instruction is only allowed for AHB read commands. There is interrupt status bit set
# (INTR[IPCMDERR] or INTR[AHBCMDERR]) when using this instruction in IP command or AHB write command.
# - CMD_DDR, (33): Transmit command code to Flash.
# - RADDR_DDR, (34): Transmit row address to Flash.
# - CADDR_DDR, (35): Transmit column address to Flash.
# - MODE1_DDR, (36): Transmit mode bits to Flash.
# - MODE2_DDR, (37): Transmit mode bits to Flash.
# - MODE4_DDR, (38): Transmit mode bits to Flash.
# - MODE8_DDR, (39): Transmit mode bits to Flash.
# - WRITE_DDR, (40): Transmit program data to Flash device.
# - READ_DDR, (41): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_DDR, (42): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_DDR, (43): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_DDR, (44): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_DDR, (45): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# Possible options: <STOP, CMD_SDR, RADDR_SDR, CADDR_SDR, MODE1_SDR, MODE2_SDR, MODE4_SDR, MODE8_SDR, WRITE_SDR,
# READ_SDR, LEARN_SDR, DATSZ_SDR, DUMMY_SDR, DUMMY_RWDS_SDR, JMP_ON_CS, CMD_DDR, RADDR_DDR, CADDR_DDR, MODE1_DDR,
# MODE2_DDR, MODE4_DDR, MODE8_DDR, WRITE_DDR, READ_DDR, LEARN_DDR, DATSZ_DDR, DUMMY_DDR, DUMMY_RWDS_DDR>
OPERATION_CODE: STOP
lookupTable_seq12_instr1:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq12_instr2:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq12_instr3:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq12_instr4:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq12_instr5:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq12_instr6:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq12_instr7:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
# ----------------------------------===== lookupTable_seq13_instr0 [Optional] =====-----------------------------------
# Description: Offset: 0x00000150, Width: 16b; Lookup table holds Flash command sequences 13, instruction 0
lookupTable_seq13_instr0:
# ------------------------------------------===== OPERAND [Optional] =====------------------------------------------
# Description: Offset: 0b, Width: 8b, Instruction operand. Its values depends on used instruction
OPERAND: 0
# -----------------------------------------===== NUM_PADS [Optional] =====------------------------------------------
# Description: Offset: 8b, Width: 2b, Number of pads used by instruction. Some instructions ignores this parameter.
# - 1PAD, (0): Single mode. One pad is used.
# - 2PAD, (1): Dual mode. Two pads are used.
# - 4PAD, (2): Quad mode. Four pads are used.
# - 8PAD, (3): Octal mode. Eight pads are used.
# Possible options: <1PAD, 2PAD, 4PAD, 8PAD>
NUM_PADS: 1PAD
# --------------------------------------===== OPERATION_CODE [Optional] =====---------------------------------------
# Description: Offset: 10b, Width: 6b, Instruction operation code.
# - STOP, (0): Stop execution and de-assert CS. Then, the next command sequence (to the same flash device) starts
# from instruction pointer 0.
# - CMD_SDR, (1): Transmit command code to Flash.
# - RADDR_SDR, (2): Transmit row address to Flash.
# - CADDR_SDR, (3): Transmit column address to Flash.
# - MODE1_SDR, (4): Transmit mode bits to Flash.
# - MODE2_SDR, (5): Transmit mode bits to Flash.
# - MODE4_SDR, (6): Transmit mode bits to Flash.
# - MODE8_SDR, (7): Transmit mode bits to Flash.
# - WRITE_SDR, (8): Transmit program data to Flash device.
# - READ_SDR, (9): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_SDR, (10): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_SDR, (11): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_SDR, (12): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_SDR, (13): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# - JMP_ON_CS, (31): Stop execution, de-assert CS and save operand[7:0] as the instruction start pointer for next
# sequence.Normally this instruction is used to support Execute-In-Place enhanced mode. See XIP enhanced mode for
# more details.This instruction is only allowed for AHB read commands. There is interrupt status bit set
# (INTR[IPCMDERR] or INTR[AHBCMDERR]) when using this instruction in IP command or AHB write command.
# - CMD_DDR, (33): Transmit command code to Flash.
# - RADDR_DDR, (34): Transmit row address to Flash.
# - CADDR_DDR, (35): Transmit column address to Flash.
# - MODE1_DDR, (36): Transmit mode bits to Flash.
# - MODE2_DDR, (37): Transmit mode bits to Flash.
# - MODE4_DDR, (38): Transmit mode bits to Flash.
# - MODE8_DDR, (39): Transmit mode bits to Flash.
# - WRITE_DDR, (40): Transmit program data to Flash device.
# - READ_DDR, (41): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_DDR, (42): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_DDR, (43): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_DDR, (44): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_DDR, (45): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# Possible options: <STOP, CMD_SDR, RADDR_SDR, CADDR_SDR, MODE1_SDR, MODE2_SDR, MODE4_SDR, MODE8_SDR, WRITE_SDR,
# READ_SDR, LEARN_SDR, DATSZ_SDR, DUMMY_SDR, DUMMY_RWDS_SDR, JMP_ON_CS, CMD_DDR, RADDR_DDR, CADDR_DDR, MODE1_DDR,
# MODE2_DDR, MODE4_DDR, MODE8_DDR, WRITE_DDR, READ_DDR, LEARN_DDR, DATSZ_DDR, DUMMY_DDR, DUMMY_RWDS_DDR>
OPERATION_CODE: STOP
lookupTable_seq13_instr1:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq13_instr2:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq13_instr3:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq13_instr4:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq13_instr5:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq13_instr6:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq13_instr7:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
# ----------------------------------===== lookupTable_seq14_instr0 [Optional] =====-----------------------------------
# Description: Offset: 0x00000160, Width: 16b; Lookup table holds Flash command sequences 14, instruction 0
lookupTable_seq14_instr0:
# ------------------------------------------===== OPERAND [Optional] =====------------------------------------------
# Description: Offset: 0b, Width: 8b, Instruction operand. Its values depends on used instruction
OPERAND: 0
# -----------------------------------------===== NUM_PADS [Optional] =====------------------------------------------
# Description: Offset: 8b, Width: 2b, Number of pads used by instruction. Some instructions ignores this parameter.
# - 1PAD, (0): Single mode. One pad is used.
# - 2PAD, (1): Dual mode. Two pads are used.
# - 4PAD, (2): Quad mode. Four pads are used.
# - 8PAD, (3): Octal mode. Eight pads are used.
# Possible options: <1PAD, 2PAD, 4PAD, 8PAD>
NUM_PADS: 1PAD
# --------------------------------------===== OPERATION_CODE [Optional] =====---------------------------------------
# Description: Offset: 10b, Width: 6b, Instruction operation code.
# - STOP, (0): Stop execution and de-assert CS. Then, the next command sequence (to the same flash device) starts
# from instruction pointer 0.
# - CMD_SDR, (1): Transmit command code to Flash.
# - RADDR_SDR, (2): Transmit row address to Flash.
# - CADDR_SDR, (3): Transmit column address to Flash.
# - MODE1_SDR, (4): Transmit mode bits to Flash.
# - MODE2_SDR, (5): Transmit mode bits to Flash.
# - MODE4_SDR, (6): Transmit mode bits to Flash.
# - MODE8_SDR, (7): Transmit mode bits to Flash.
# - WRITE_SDR, (8): Transmit program data to Flash device.
# - READ_SDR, (9): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_SDR, (10): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_SDR, (11): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_SDR, (12): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_SDR, (13): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# - JMP_ON_CS, (31): Stop execution, de-assert CS and save operand[7:0] as the instruction start pointer for next
# sequence.Normally this instruction is used to support Execute-In-Place enhanced mode. See XIP enhanced mode for
# more details.This instruction is only allowed for AHB read commands. There is interrupt status bit set
# (INTR[IPCMDERR] or INTR[AHBCMDERR]) when using this instruction in IP command or AHB write command.
# - CMD_DDR, (33): Transmit command code to Flash.
# - RADDR_DDR, (34): Transmit row address to Flash.
# - CADDR_DDR, (35): Transmit column address to Flash.
# - MODE1_DDR, (36): Transmit mode bits to Flash.
# - MODE2_DDR, (37): Transmit mode bits to Flash.
# - MODE4_DDR, (38): Transmit mode bits to Flash.
# - MODE8_DDR, (39): Transmit mode bits to Flash.
# - WRITE_DDR, (40): Transmit program data to Flash device.
# - READ_DDR, (41): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_DDR, (42): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_DDR, (43): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_DDR, (44): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_DDR, (45): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# Possible options: <STOP, CMD_SDR, RADDR_SDR, CADDR_SDR, MODE1_SDR, MODE2_SDR, MODE4_SDR, MODE8_SDR, WRITE_SDR,
# READ_SDR, LEARN_SDR, DATSZ_SDR, DUMMY_SDR, DUMMY_RWDS_SDR, JMP_ON_CS, CMD_DDR, RADDR_DDR, CADDR_DDR, MODE1_DDR,
# MODE2_DDR, MODE4_DDR, MODE8_DDR, WRITE_DDR, READ_DDR, LEARN_DDR, DATSZ_DDR, DUMMY_DDR, DUMMY_RWDS_DDR>
OPERATION_CODE: STOP
lookupTable_seq14_instr1:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq14_instr2:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq14_instr3:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq14_instr4:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq14_instr5:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq14_instr6:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq14_instr7:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
# ----------------------------------===== lookupTable_seq15_instr0 [Optional] =====-----------------------------------
# Description: Offset: 0x00000170, Width: 16b; Lookup table holds Flash command sequences 15, instruction 0
lookupTable_seq15_instr0:
# ------------------------------------------===== OPERAND [Optional] =====------------------------------------------
# Description: Offset: 0b, Width: 8b, Instruction operand. Its values depends on used instruction
OPERAND: 0
# -----------------------------------------===== NUM_PADS [Optional] =====------------------------------------------
# Description: Offset: 8b, Width: 2b, Number of pads used by instruction. Some instructions ignores this parameter.
# - 1PAD, (0): Single mode. One pad is used.
# - 2PAD, (1): Dual mode. Two pads are used.
# - 4PAD, (2): Quad mode. Four pads are used.
# - 8PAD, (3): Octal mode. Eight pads are used.
# Possible options: <1PAD, 2PAD, 4PAD, 8PAD>
NUM_PADS: 1PAD
# --------------------------------------===== OPERATION_CODE [Optional] =====---------------------------------------
# Description: Offset: 10b, Width: 6b, Instruction operation code.
# - STOP, (0): Stop execution and de-assert CS. Then, the next command sequence (to the same flash device) starts
# from instruction pointer 0.
# - CMD_SDR, (1): Transmit command code to Flash.
# - RADDR_SDR, (2): Transmit row address to Flash.
# - CADDR_SDR, (3): Transmit column address to Flash.
# - MODE1_SDR, (4): Transmit mode bits to Flash.
# - MODE2_SDR, (5): Transmit mode bits to Flash.
# - MODE4_SDR, (6): Transmit mode bits to Flash.
# - MODE8_SDR, (7): Transmit mode bits to Flash.
# - WRITE_SDR, (8): Transmit program data to Flash device.
# - READ_SDR, (9): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_SDR, (10): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_SDR, (11): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_SDR, (12): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_SDR, (13): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# - JMP_ON_CS, (31): Stop execution, de-assert CS and save operand[7:0] as the instruction start pointer for next
# sequence.Normally this instruction is used to support Execute-In-Place enhanced mode. See XIP enhanced mode for
# more details.This instruction is only allowed for AHB read commands. There is interrupt status bit set
# (INTR[IPCMDERR] or INTR[AHBCMDERR]) when using this instruction in IP command or AHB write command.
# - CMD_DDR, (33): Transmit command code to Flash.
# - RADDR_DDR, (34): Transmit row address to Flash.
# - CADDR_DDR, (35): Transmit column address to Flash.
# - MODE1_DDR, (36): Transmit mode bits to Flash.
# - MODE2_DDR, (37): Transmit mode bits to Flash.
# - MODE4_DDR, (38): Transmit mode bits to Flash.
# - MODE8_DDR, (39): Transmit mode bits to Flash.
# - WRITE_DDR, (40): Transmit program data to Flash device.
# - READ_DDR, (41): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_DDR, (42): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_DDR, (43): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_DDR, (44): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_DDR, (45): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# Possible options: <STOP, CMD_SDR, RADDR_SDR, CADDR_SDR, MODE1_SDR, MODE2_SDR, MODE4_SDR, MODE8_SDR, WRITE_SDR,
# READ_SDR, LEARN_SDR, DATSZ_SDR, DUMMY_SDR, DUMMY_RWDS_SDR, JMP_ON_CS, CMD_DDR, RADDR_DDR, CADDR_DDR, MODE1_DDR,
# MODE2_DDR, MODE4_DDR, MODE8_DDR, WRITE_DDR, READ_DDR, LEARN_DDR, DATSZ_DDR, DUMMY_DDR, DUMMY_RWDS_DDR>
OPERATION_CODE: STOP
lookupTable_seq15_instr1:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq15_instr2:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq15_instr3:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq15_instr4:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq15_instr5:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq15_instr6:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq15_instr7:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
# ---------------------------------------===== lutCustomSeq_0 [Optional] =====----------------------------------------
# Description: Offset: 0x00000180, Width: 32b; [0x180-0x1af] Customizable LUT Sequences
lutCustomSeq_0:
# ------------------------------------------===== seqNum [Optional] =====-------------------------------------------
# Description: Offset: 0b, Width: 8b, Sequence Number, valid number: 1-16
seqNum: 0
# -------------------------------------------===== seqId [Optional] =====-------------------------------------------
# Description: Offset: 8b, Width: 8b, Sequence Index, valid number: 0-15
seqId: 0
# -----------------------------------------===== reserved [Optional] =====------------------------------------------
# Description: Offset: 16b, Width: 16b, N/A
reserved: 0
# ---------------------------------------===== lutCustomSeq_1 [Optional] =====----------------------------------------
# Description: Offset: 0x00000184, Width: 32b; [0x180-0x1af] Customizable LUT Sequences
lutCustomSeq_1:
# ------------------------------------------===== seqNum [Optional] =====-------------------------------------------
# Description: Offset: 0b, Width: 8b, Sequence Number, valid number: 1-16
seqNum: 0
# -------------------------------------------===== seqId [Optional] =====-------------------------------------------
# Description: Offset: 8b, Width: 8b, Sequence Index, valid number: 0-15
seqId: 0
# -----------------------------------------===== reserved [Optional] =====------------------------------------------
# Description: Offset: 16b, Width: 16b, N/A
reserved: 0
# ---------------------------------------===== lutCustomSeq_2 [Optional] =====----------------------------------------
# Description: Offset: 0x00000188, Width: 32b; [0x180-0x1af] Customizable LUT Sequences
lutCustomSeq_2:
# ------------------------------------------===== seqNum [Optional] =====-------------------------------------------
# Description: Offset: 0b, Width: 8b, Sequence Number, valid number: 1-16
seqNum: 0
# -------------------------------------------===== seqId [Optional] =====-------------------------------------------
# Description: Offset: 8b, Width: 8b, Sequence Index, valid number: 0-15
seqId: 0
# -----------------------------------------===== reserved [Optional] =====------------------------------------------
# Description: Offset: 16b, Width: 16b, N/A
reserved: 0
# ---------------------------------------===== lutCustomSeq_3 [Optional] =====----------------------------------------
# Description: Offset: 0x0000018C, Width: 32b; [0x180-0x1af] Customizable LUT Sequences
lutCustomSeq_3:
# ------------------------------------------===== seqNum [Optional] =====-------------------------------------------
# Description: Offset: 0b, Width: 8b, Sequence Number, valid number: 1-16
seqNum: 0
# -------------------------------------------===== seqId [Optional] =====-------------------------------------------
# Description: Offset: 8b, Width: 8b, Sequence Index, valid number: 0-15
seqId: 0
# -----------------------------------------===== reserved [Optional] =====------------------------------------------
# Description: Offset: 16b, Width: 16b, N/A
reserved: 0
# ---------------------------------------===== lutCustomSeq_4 [Optional] =====----------------------------------------
# Description: Offset: 0x00000190, Width: 32b; [0x180-0x1af] Customizable LUT Sequences
lutCustomSeq_4:
# ------------------------------------------===== seqNum [Optional] =====-------------------------------------------
# Description: Offset: 0b, Width: 8b, Sequence Number, valid number: 1-16
seqNum: 0
# -------------------------------------------===== seqId [Optional] =====-------------------------------------------
# Description: Offset: 8b, Width: 8b, Sequence Index, valid number: 0-15
seqId: 0
# -----------------------------------------===== reserved [Optional] =====------------------------------------------
# Description: Offset: 16b, Width: 16b, N/A
reserved: 0
# ---------------------------------------===== lutCustomSeq_5 [Optional] =====----------------------------------------
# Description: Offset: 0x00000194, Width: 32b; [0x180-0x1af] Customizable LUT Sequences
lutCustomSeq_5:
# ------------------------------------------===== seqNum [Optional] =====-------------------------------------------
# Description: Offset: 0b, Width: 8b, Sequence Number, valid number: 1-16
seqNum: 0
# -------------------------------------------===== seqId [Optional] =====-------------------------------------------
# Description: Offset: 8b, Width: 8b, Sequence Index, valid number: 0-15
seqId: 0
# -----------------------------------------===== reserved [Optional] =====------------------------------------------
# Description: Offset: 16b, Width: 16b, N/A
reserved: 0
# ---------------------------------------===== lutCustomSeq_6 [Optional] =====----------------------------------------
# Description: Offset: 0x00000198, Width: 32b; [0x180-0x1af] Customizable LUT Sequences
lutCustomSeq_6:
# ------------------------------------------===== seqNum [Optional] =====-------------------------------------------
# Description: Offset: 0b, Width: 8b, Sequence Number, valid number: 1-16
seqNum: 0
# -------------------------------------------===== seqId [Optional] =====-------------------------------------------
# Description: Offset: 8b, Width: 8b, Sequence Index, valid number: 0-15
seqId: 0
# -----------------------------------------===== reserved [Optional] =====------------------------------------------
# Description: Offset: 16b, Width: 16b, N/A
reserved: 0
# ---------------------------------------===== lutCustomSeq_7 [Optional] =====----------------------------------------
# Description: Offset: 0x0000019C, Width: 32b; [0x180-0x1af] Customizable LUT Sequences
lutCustomSeq_7:
# ------------------------------------------===== seqNum [Optional] =====-------------------------------------------
# Description: Offset: 0b, Width: 8b, Sequence Number, valid number: 1-16
seqNum: 0
# -------------------------------------------===== seqId [Optional] =====-------------------------------------------
# Description: Offset: 8b, Width: 8b, Sequence Index, valid number: 0-15
seqId: 0
# -----------------------------------------===== reserved [Optional] =====------------------------------------------
# Description: Offset: 16b, Width: 16b, N/A
reserved: 0
# ---------------------------------------===== lutCustomSeq_8 [Optional] =====----------------------------------------
# Description: Offset: 0x000001A0, Width: 32b; [0x180-0x1af] Customizable LUT Sequences
lutCustomSeq_8:
# ------------------------------------------===== seqNum [Optional] =====-------------------------------------------
# Description: Offset: 0b, Width: 8b, Sequence Number, valid number: 1-16
seqNum: 0
# -------------------------------------------===== seqId [Optional] =====-------------------------------------------
# Description: Offset: 8b, Width: 8b, Sequence Index, valid number: 0-15
seqId: 0
# -----------------------------------------===== reserved [Optional] =====------------------------------------------
# Description: Offset: 16b, Width: 16b, N/A
reserved: 0
# ---------------------------------------===== lutCustomSeq_9 [Optional] =====----------------------------------------
# Description: Offset: 0x000001A4, Width: 32b; [0x180-0x1af] Customizable LUT Sequences
lutCustomSeq_9:
# ------------------------------------------===== seqNum [Optional] =====-------------------------------------------
# Description: Offset: 0b, Width: 8b, Sequence Number, valid number: 1-16
seqNum: 0
# -------------------------------------------===== seqId [Optional] =====-------------------------------------------
# Description: Offset: 8b, Width: 8b, Sequence Index, valid number: 0-15
seqId: 0
# -----------------------------------------===== reserved [Optional] =====------------------------------------------
# Description: Offset: 16b, Width: 16b, N/A
reserved: 0
# ---------------------------------------===== lutCustomSeq_10 [Optional] =====---------------------------------------
# Description: Offset: 0x000001A8, Width: 32b; [0x180-0x1af] Customizable LUT Sequences
lutCustomSeq_10:
# ------------------------------------------===== seqNum [Optional] =====-------------------------------------------
# Description: Offset: 0b, Width: 8b, Sequence Number, valid number: 1-16
seqNum: 0
# -------------------------------------------===== seqId [Optional] =====-------------------------------------------
# Description: Offset: 8b, Width: 8b, Sequence Index, valid number: 0-15
seqId: 0
# -----------------------------------------===== reserved [Optional] =====------------------------------------------
# Description: Offset: 16b, Width: 16b, N/A
reserved: 0
# ---------------------------------------===== lutCustomSeq_11 [Optional] =====---------------------------------------
# Description: Offset: 0x000001AC, Width: 32b; [0x180-0x1af] Customizable LUT Sequences
lutCustomSeq_11:
# ------------------------------------------===== seqNum [Optional] =====-------------------------------------------
# Description: Offset: 0b, Width: 8b, Sequence Number, valid number: 1-16
seqNum: 0
# -------------------------------------------===== seqId [Optional] =====-------------------------------------------
# Description: Offset: 8b, Width: 8b, Sequence Index, valid number: 0-15
seqId: 0
# -----------------------------------------===== reserved [Optional] =====------------------------------------------
# Description: Offset: 16b, Width: 16b, N/A
reserved: 0
# -----------------------------------------===== reserved4_0 [Optional] =====-----------------------------------------
# Description: Offset: 0x000001B0, Width: 32b; [0x1b0-0x1bf] Reserved for future use
reserved4_0: '0x00000000'
# -----------------------------------------===== reserved4_1 [Optional] =====-----------------------------------------
# Description: Offset: 0x000001B4, Width: 32b; [0x1b0-0x1bf] Reserved for future use
reserved4_1: '0x00000000'
# -----------------------------------------===== reserved4_2 [Optional] =====-----------------------------------------
# Description: Offset: 0x000001B8, Width: 32b; [0x1b0-0x1bf] Reserved for future use
reserved4_2: '0x00000000'
# -----------------------------------------===== reserved4_3 [Optional] =====-----------------------------------------
# Description: Offset: 0x000001BC, Width: 32b; [0x1b0-0x1bf] Reserved for future use
reserved4_3: '0x00000000'
# ------------------------------------------===== pageSize [Optional] =====-------------------------------------------
# Description: Offset: 0x000001C0, Width: 32b; Page size of Serial NOR
pageSize: '0x00000000'
# -----------------------------------------===== sectorSize [Optional] =====------------------------------------------
# Description: Offset: 0x000001C4, Width: 32b; Sector size of Serial NOR
sectorSize: '0x00000000'
# -------------------------------------===== ipcmdSerialClkFreq [Optional] =====--------------------------------------
# Description: Offset: 0x000001C8, Width: 8b; Clock frequency for IP command
ipcmdSerialClkFreq: '0x00'
# -------------------------------------===== isUniformBlockSize [Optional] =====--------------------------------------
# Description: Offset: 0x000001C9, Width: 8b; Sector/Block size is the same
isUniformBlockSize: '0x00'
# -------------------------------------===== isDataOrderSwapped [Optional] =====--------------------------------------
# Description: Offset: 0x000001CA, Width: 8b; Data order (D0, D1, D2, D3) is swapped (D1,D0, D3, D2)
isDataOrderSwapped: '0x00'
# -----------------------------------------===== reserved0_0 [Optional] =====-----------------------------------------
# Description: Offset: 0x000001CB, Width: 8b; Reserved for future use
reserved0_0: '0x00'
# ----------------------------------------===== serialNorType [Optional] =====----------------------------------------
# Description: Offset: 0x000001CC, Width: 8b; Serial NOR Flash type: 0/1/2/3
serialNorType: '0x00'
# --------------------------------------===== needExitNoCmdMode [Optional] =====--------------------------------------
# Description: Offset: 0x000001CD, Width: 8b; Need to exit NoCmd mode before other IP command
needExitNoCmdMode: '0x00'
# ------------------------------------===== halfClkForNonReadCmd [Optional] =====-------------------------------------
# Description: Offset: 0x000001CE, Width: 8b; Half the Serial Clock for non-read command: true/false
halfClkForNonReadCmd: '0x00'
# ------------------------------------===== needRestoreNoCmdMode [Optional] =====-------------------------------------
# Description: Offset: 0x000001CF, Width: 8b; Need to Restore NoCmd mode after IP command execution
needRestoreNoCmdMode: '0x00'
# ------------------------------------------===== blockSize [Optional] =====------------------------------------------
# Description: Offset: 0x000001D0, Width: 32b; Block size
blockSize: '0x00000000'
# ----------------------------------------===== flashStateCtx [Optional] =====----------------------------------------
# Description: Offset: 0x000001D4, Width: 32b; Flash State Context
flashStateCtx: '0x00000000'
# -----------------------------------------===== reserve2_0 [Optional] =====------------------------------------------
# Description: Offset: 0x000001D8, Width: 32b; Reserved for future use
reserve2_0: '0x00000000'
# -----------------------------------------===== reserve2_1 [Optional] =====------------------------------------------
# Description: Offset: 0x000001DC, Width: 32b; Reserved for future use
reserve2_1: '0x00000000'
# -----------------------------------------===== reserve2_2 [Optional] =====------------------------------------------
# Description: Offset: 0x000001E0, Width: 32b; Reserved for future use
reserve2_2: '0x00000000'
# -----------------------------------------===== reserve2_3 [Optional] =====------------------------------------------
# Description: Offset: 0x000001E4, Width: 32b; Reserved for future use
reserve2_3: '0x00000000'
# -----------------------------------------===== reserve2_4 [Optional] =====------------------------------------------
# Description: Offset: 0x000001E8, Width: 32b; Reserved for future use
reserve2_4: '0x00000000'
# -----------------------------------------===== reserve2_5 [Optional] =====------------------------------------------
# Description: Offset: 0x000001EC, Width: 32b; Reserved for future use
reserve2_5: '0x00000000'
# -----------------------------------------===== reserve2_6 [Optional] =====------------------------------------------
# Description: Offset: 0x000001F0, Width: 32b; Reserved for future use
reserve2_6: '0x00000000'
# -----------------------------------------===== reserve2_7 [Optional] =====------------------------------------------
# Description: Offset: 0x000001F4, Width: 32b; Reserved for future use
reserve2_7: '0x00000000'
# -----------------------------------------===== reserve2_8 [Optional] =====------------------------------------------
# Description: Offset: 0x000001F8, Width: 32b; Reserved for future use
reserve2_8: '0x00000000'
# -----------------------------------------===== reserve2_9 [Optional] =====------------------------------------------
# Description: Offset: 0x000001FC, Width: 32b; Reserved for future use
reserve2_9: '0x00000000'
FCB for mcxn946, Revision: a1 and flexspi_nor#
FCB for mcxn946, Revision: a1 and flexspi_nor JSON schema
FCB for mcxn946, Revision: a1 and flexspi_nor YAML configuration template
# ================================== FCB for mcxn946, Revision: a1 and flexspi_nor ===================================
# ======================================================================================================================
# == FCB for mcxn946, Revision: a1 and flexspi_nor ==
# ======================================================================================================================
# -------------------------------------===== The chip family name [Required] =====--------------------------------------
# Description: NXP chip family identifier.
family: CHOOSE_FROM_TABLE
# -----------------------------------------===== MCU revision [Optional] =====------------------------------------------
# Description: Revision of silicon. The 'latest' name, means most current revision.
# Possible options: <a0, a1, latest>
revision: a1
# ------------------------------------------===== Memory type [Required] =====------------------------------------------
# Description: Specify type of memory used by FCB description.
# Possible options: <flexspi_nor>
type: flexspi_nor
# --------------------------------------------===== mcxn946 [Required] =====--------------------------------------------
fcb_settings:
# ---------------------------------------------===== tag [Optional] =====---------------------------------------------
# Description: Offset: 0x00000000, Width: 32b; [0x000-0x003] Tag, fixed value 0x42464346UL
tag: '0x42464346'
# -------------------------------------------===== version [Optional] =====-------------------------------------------
# Description: Offset: 0x00000004, Width: 32b; [0x004-0x007] Version,[31:24] -'V', [23:16] - Major, [15:8] - Minor,
# [7:0] - bugfix
version: '0x56010400'
# ------------------------------------------===== reserved0 [Optional] =====------------------------------------------
# Description: Offset: 0x00000008, Width: 32b; [0x008-0x00b] Reserved for future use
reserved0: '0x00000000'
# --------------------------------------===== readSampleClkSrc [Optional] =====---------------------------------------
# Description: Offset: 0x0000000C, Width: 8b; [0x00c-0x00c] Read Sample Clock Source, valid value: 0/1/3
readSampleClkSrc: '0x00'
# -----------------------------------------===== csHoldTime [Optional] =====------------------------------------------
# Description: Offset: 0x0000000D, Width: 8b; [0x00d-0x00d] CS hold time, default value: 3
csHoldTime: '0x00'
# -----------------------------------------===== csSetupTime [Optional] =====-----------------------------------------
# Description: Offset: 0x0000000E, Width: 8b; [0x00e-0x00e] CS setup time, default value: 3
csSetupTime: '0x00'
# -------------------------------------===== columnAddressWidth [Optional] =====--------------------------------------
# Description: Offset: 0x0000000F, Width: 8b; [0x00f-0x00f] Column Address with, for HyperBus protocol, it is fixed
# to 3, For Serial NAND, need to refer to datasheet
columnAddressWidth: '0x00'
# -------------------------------------===== deviceModeCfgEnable [Optional] =====-------------------------------------
# Description: Offset: 0x00000010, Width: 8b; [0x010-0x010] Device Mode Configure enable flag, 1 - Enable, 0 -
# Disable
deviceModeCfgEnable: '0x00'
# ---------------------------------------===== deviceModeType [Optional] =====----------------------------------------
# Description: Offset: 0x00000011, Width: 8b; [0x011-0x011] Specify the configuration command type:Quad Enable,
# DPI/QPI/OPI switch, Generic configuration, etc.
deviceModeType: '0x00'
# -------------------------------------===== waitTimeCfgCommands [Optional] =====-------------------------------------
# Description: Offset: 0x00000012, Width: 16b; [0x012-0x013] Wait time for all configuration commands, unit: 100us,
# Used for DPI/QPI/OPI switch or reset command
waitTimeCfgCommands: '0x0000'
# ----------------------------------------===== deviceModeSeq [Optional] =====----------------------------------------
# Description: Offset: 0x00000014, Width: 32b; [0x014-0x017] Device mode sequence info, [7:0] - LUT sequence id,
# [15:8] - LUt sequence number, [31:16] Reserved
deviceModeSeq:
# ------------------------------------------===== seqNum [Optional] =====-------------------------------------------
# Description: Offset: 0b, Width: 8b, Sequence Number, valid number: 1-16
seqNum: 0
# -------------------------------------------===== seqId [Optional] =====-------------------------------------------
# Description: Offset: 8b, Width: 8b, Sequence Index, valid number: 0-15
seqId: 0
# -----------------------------------------===== reserved [Optional] =====------------------------------------------
# Description: Offset: 16b, Width: 16b, N/A
reserved: 0
# ----------------------------------------===== deviceModeArg [Optional] =====----------------------------------------
# Description: Offset: 0x00000018, Width: 32b; [0x018-0x01b] Argument/Parameter for device configuration
deviceModeArg: '0x00000000'
# ---------------------------------------===== configCmdEnable [Optional] =====---------------------------------------
# Description: Offset: 0x0000001C, Width: 8b; [0x01c-0x01c] Configure command Enable Flag, 1 - Enable, 0 - Disable
configCmdEnable: '0x00'
# --------------------------------------===== configModeType_0 [Optional] =====---------------------------------------
# Description: Offset: 0x0000001D, Width: 8b; [0x01d-0x01f] Configure Mode Type, similar as deviceModeTpe
configModeType_0: '0x00'
# --------------------------------------===== configModeType_1 [Optional] =====---------------------------------------
# Description: Offset: 0x0000001E, Width: 8b; [0x01d-0x01f] Configure Mode Type, similar as deviceModeTpe
configModeType_1: '0x00'
# --------------------------------------===== configModeType_2 [Optional] =====---------------------------------------
# Description: Offset: 0x0000001F, Width: 8b; [0x01d-0x01f] Configure Mode Type, similar as deviceModeTpe
configModeType_2: '0x00'
# ---------------------------------------===== configCmdSeqs_0 [Optional] =====---------------------------------------
# Description: Offset: 0x00000020, Width: 32b; [0x020-0x02b] Sequence info for Device Configuration command, similar
# as deviceModeSeq
configCmdSeqs_0:
# ------------------------------------------===== seqNum [Optional] =====-------------------------------------------
# Description: Offset: 0b, Width: 8b, Sequence Number, valid number: 1-16
seqNum: 0
# -------------------------------------------===== seqId [Optional] =====-------------------------------------------
# Description: Offset: 8b, Width: 8b, Sequence Index, valid number: 0-15
seqId: 0
# -----------------------------------------===== reserved [Optional] =====------------------------------------------
# Description: Offset: 16b, Width: 16b, N/A
reserved: 0
# ---------------------------------------===== configCmdSeqs_1 [Optional] =====---------------------------------------
# Description: Offset: 0x00000024, Width: 32b; [0x020-0x02b] Sequence info for Device Configuration command, similar
# as deviceModeSeq
configCmdSeqs_1:
# ------------------------------------------===== seqNum [Optional] =====-------------------------------------------
# Description: Offset: 0b, Width: 8b, Sequence Number, valid number: 1-16
seqNum: 0
# -------------------------------------------===== seqId [Optional] =====-------------------------------------------
# Description: Offset: 8b, Width: 8b, Sequence Index, valid number: 0-15
seqId: 0
# -----------------------------------------===== reserved [Optional] =====------------------------------------------
# Description: Offset: 16b, Width: 16b, N/A
reserved: 0
# ---------------------------------------===== configCmdSeqs_2 [Optional] =====---------------------------------------
# Description: Offset: 0x00000028, Width: 32b; [0x020-0x02b] Sequence info for Device Configuration command, similar
# as deviceModeSeq
configCmdSeqs_2:
# ------------------------------------------===== seqNum [Optional] =====-------------------------------------------
# Description: Offset: 0b, Width: 8b, Sequence Number, valid number: 1-16
seqNum: 0
# -------------------------------------------===== seqId [Optional] =====-------------------------------------------
# Description: Offset: 8b, Width: 8b, Sequence Index, valid number: 0-15
seqId: 0
# -----------------------------------------===== reserved [Optional] =====------------------------------------------
# Description: Offset: 16b, Width: 16b, N/A
reserved: 0
# ------------------------------------------===== reserved1 [Optional] =====------------------------------------------
# Description: Offset: 0x0000002C, Width: 32b; [0x02c-0x02f] Reserved for future use
reserved1: '0x00000000'
# ---------------------------------------===== configCmdArgs_0 [Optional] =====---------------------------------------
# Description: Offset: 0x00000030, Width: 32b; [0x030-0x03b] Arguments/Parameters for device Configuration commands
configCmdArgs_0: '0x00000000'
# ---------------------------------------===== configCmdArgs_1 [Optional] =====---------------------------------------
# Description: Offset: 0x00000034, Width: 32b; [0x030-0x03b] Arguments/Parameters for device Configuration commands
configCmdArgs_1: '0x00000000'
# ---------------------------------------===== configCmdArgs_2 [Optional] =====---------------------------------------
# Description: Offset: 0x00000038, Width: 32b; [0x030-0x03b] Arguments/Parameters for device Configuration commands
configCmdArgs_2: '0x00000000'
# ------------------------------------------===== reserved2 [Optional] =====------------------------------------------
# Description: Offset: 0x0000003C, Width: 32b; [0x03c-0x03f] Reserved for future use
reserved2: '0x00000000'
# ------------------------------------===== controllerMiscOption [Optional] =====-------------------------------------
# Description: Offset: 0x00000040, Width: 32b; [0x040-0x043] Controller Misc Options, see Misc feature bit
# definitions for more details
controllerMiscOption: '0x00000000'
# -----------------------------------------===== deviceType [Optional] =====------------------------------------------
# Description: Offset: 0x00000044, Width: 8b; [0x044-0x044] Device Type: See Flash Type Definition for more details
deviceType: '0x00'
# ----------------------------------------===== sflashPadType [Optional] =====----------------------------------------
# Description: Offset: 0x00000045, Width: 8b; [0x045-0x045] Serial Flash Pad Type: 1 - Single, 2 - Dual, 4 - Quad, 8
# - Octal
sflashPadType: '0x00'
# ----------------------------------------===== serialClkFreq [Optional] =====----------------------------------------
# Description: Offset: 0x00000046, Width: 8b; [0x046-0x046] Serial Flash Frequency, device specific definitions, See
# System Boot Chapter for more details
serialClkFreq: '0x00'
# -------------------------------------===== lutCustomSeqEnable [Optional] =====--------------------------------------
# Description: Offset: 0x00000047, Width: 8b; [0x047-0x047] LUT customization Enable, it is required if the
# program/erase cannot be done using 1 LUT sequence, currently, only applicable to HyperFLASH
lutCustomSeqEnable: '0x00'
# -----------------------------------------===== reserved3_0 [Optional] =====-----------------------------------------
# Description: Offset: 0x00000048, Width: 32b; [0x048-0x04f] Reserved for future use
reserved3_0: '0x00000000'
# -----------------------------------------===== reserved3_1 [Optional] =====-----------------------------------------
# Description: Offset: 0x0000004C, Width: 32b; [0x048-0x04f] Reserved for future use
reserved3_1: '0x00000000'
# ----------------------------------------===== sflashA1Size [Optional] =====-----------------------------------------
# Description: Offset: 0x00000050, Width: 32b; [0x050-0x053] Size of Flash connected to A1
sflashA1Size: '0x00000000'
# ----------------------------------------===== sflashA2Size [Optional] =====-----------------------------------------
# Description: Offset: 0x00000054, Width: 32b; [0x054-0x057] Size of Flash connected to A2
sflashA2Size: '0x00000000'
# ----------------------------------------===== sflashB1Size [Optional] =====-----------------------------------------
# Description: Offset: 0x00000058, Width: 32b; [0x058-0x05b] Size of Flash connected to B1
sflashB1Size: '0x00000000'
# ----------------------------------------===== sflashB2Size [Optional] =====-----------------------------------------
# Description: Offset: 0x0000005C, Width: 32b; [0x05c-0x05f] Size of Flash connected to B2
sflashB2Size: '0x00000000'
# ------------------------------------===== csPadSettingOverride [Optional] =====-------------------------------------
# Description: Offset: 0x00000060, Width: 32b; [0x060-0x063] CS pad setting override value
csPadSettingOverride: '0x00000000'
# -----------------------------------===== sclkPadSettingOverride [Optional] =====------------------------------------
# Description: Offset: 0x00000064, Width: 32b; [0x064-0x067] SCK pad setting override value
sclkPadSettingOverride: '0x00000000'
# -----------------------------------===== dataPadSettingOverride [Optional] =====------------------------------------
# Description: Offset: 0x00000068, Width: 32b; [0x068-0x06b] data pad setting override value
dataPadSettingOverride: '0x00000000'
# ------------------------------------===== dqsPadSettingOverride [Optional] =====------------------------------------
# Description: Offset: 0x0000006C, Width: 32b; [0x06c-0x06f] DQS pad setting override value
dqsPadSettingOverride: '0x00000000'
# -----------------------------------------===== timeoutInMs [Optional] =====-----------------------------------------
# Description: Offset: 0x00000070, Width: 32b; [0x070-0x073] Timeout threshold for read status command
timeoutInMs: '0x00000000'
# ---------------------------------------===== commandInterval [Optional] =====---------------------------------------
# Description: Offset: 0x00000074, Width: 32b; [0x074-0x077] CS deselect interval between two commands
commandInterval: '0x00000000'
# ---------------------------------------===== dataValidTime_0 [Optional] =====---------------------------------------
# Description: Offset: 0x00000078, Width: 16b; [0x078-0x07b] CLK edge to data valid time for PORT A and PORT B
dataValidTime_0: '0x0000'
# ---------------------------------------===== dataValidTime_1 [Optional] =====---------------------------------------
# Description: Offset: 0x0000007A, Width: 16b; [0x078-0x07b] CLK edge to data valid time for PORT A and PORT B
dataValidTime_1: '0x0000'
# -----------------------------------------===== busyOffset [Optional] =====------------------------------------------
# Description: Offset: 0x0000007C, Width: 16b; [0x07c-0x07d] Busy offset, valid value: 0-31
busyOffset: '0x0000'
# ---------------------------------------===== busyBitPolarity [Optional] =====---------------------------------------
# Description: Offset: 0x0000007E, Width: 16b; [0x07e-0x07f] Busy flag polarity, 0 - busy flag is 1 when flash device
# is busy, 1 - busy flag is 0 when flash device is busy
busyBitPolarity: '0x0000'
# -----------------------------------===== lookupTable_seq0_instr0 [Optional] =====-----------------------------------
# Description: Offset: 0x00000080, Width: 16b; Lookup table holds Flash command sequences 0, instruction 0
lookupTable_seq0_instr0:
# ------------------------------------------===== OPERAND [Optional] =====------------------------------------------
# Description: Offset: 0b, Width: 8b, Instruction operand. Its values depends on used instruction
OPERAND: 0
# -----------------------------------------===== NUM_PADS [Optional] =====------------------------------------------
# Description: Offset: 8b, Width: 2b, Number of pads used by instruction. Some instructions ignores this parameter.
# - 1PAD, (0): Single mode. One pad is used.
# - 2PAD, (1): Dual mode. Two pads are used.
# - 4PAD, (2): Quad mode. Four pads are used.
# - 8PAD, (3): Octal mode. Eight pads are used.
# Possible options: <1PAD, 2PAD, 4PAD, 8PAD>
NUM_PADS: 1PAD
# --------------------------------------===== OPERATION_CODE [Optional] =====---------------------------------------
# Description: Offset: 10b, Width: 6b, Instruction operation code.
# - STOP, (0): Stop execution and de-assert CS. Then, the next command sequence (to the same flash device) starts
# from instruction pointer 0.
# - CMD_SDR, (1): Transmit command code to Flash.
# - RADDR_SDR, (2): Transmit row address to Flash.
# - CADDR_SDR, (3): Transmit column address to Flash.
# - MODE1_SDR, (4): Transmit mode bits to Flash.
# - MODE2_SDR, (5): Transmit mode bits to Flash.
# - MODE4_SDR, (6): Transmit mode bits to Flash.
# - MODE8_SDR, (7): Transmit mode bits to Flash.
# - WRITE_SDR, (8): Transmit program data to Flash device.
# - READ_SDR, (9): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_SDR, (10): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_SDR, (11): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_SDR, (12): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_SDR, (13): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# - JMP_ON_CS, (31): Stop execution, de-assert CS and save operand[7:0] as the instruction start pointer for next
# sequence.Normally this instruction is used to support Execute-In-Place enhanced mode. See XIP enhanced mode for
# more details.This instruction is only allowed for AHB read commands. There is interrupt status bit set
# (INTR[IPCMDERR] or INTR[AHBCMDERR]) when using this instruction in IP command or AHB write command.
# - CMD_DDR, (33): Transmit command code to Flash.
# - RADDR_DDR, (34): Transmit row address to Flash.
# - CADDR_DDR, (35): Transmit column address to Flash.
# - MODE1_DDR, (36): Transmit mode bits to Flash.
# - MODE2_DDR, (37): Transmit mode bits to Flash.
# - MODE4_DDR, (38): Transmit mode bits to Flash.
# - MODE8_DDR, (39): Transmit mode bits to Flash.
# - WRITE_DDR, (40): Transmit program data to Flash device.
# - READ_DDR, (41): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_DDR, (42): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_DDR, (43): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_DDR, (44): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_DDR, (45): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# Possible options: <STOP, CMD_SDR, RADDR_SDR, CADDR_SDR, MODE1_SDR, MODE2_SDR, MODE4_SDR, MODE8_SDR, WRITE_SDR,
# READ_SDR, LEARN_SDR, DATSZ_SDR, DUMMY_SDR, DUMMY_RWDS_SDR, JMP_ON_CS, CMD_DDR, RADDR_DDR, CADDR_DDR, MODE1_DDR,
# MODE2_DDR, MODE4_DDR, MODE8_DDR, WRITE_DDR, READ_DDR, LEARN_DDR, DATSZ_DDR, DUMMY_DDR, DUMMY_RWDS_DDR>
OPERATION_CODE: STOP
lookupTable_seq0_instr1:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq0_instr2:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq0_instr3:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq0_instr4:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq0_instr5:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq0_instr6:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq0_instr7:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
# -----------------------------------===== lookupTable_seq1_instr0 [Optional] =====-----------------------------------
# Description: Offset: 0x00000090, Width: 16b; Lookup table holds Flash command sequences 1, instruction 0
lookupTable_seq1_instr0:
# ------------------------------------------===== OPERAND [Optional] =====------------------------------------------
# Description: Offset: 0b, Width: 8b, Instruction operand. Its values depends on used instruction
OPERAND: 0
# -----------------------------------------===== NUM_PADS [Optional] =====------------------------------------------
# Description: Offset: 8b, Width: 2b, Number of pads used by instruction. Some instructions ignores this parameter.
# - 1PAD, (0): Single mode. One pad is used.
# - 2PAD, (1): Dual mode. Two pads are used.
# - 4PAD, (2): Quad mode. Four pads are used.
# - 8PAD, (3): Octal mode. Eight pads are used.
# Possible options: <1PAD, 2PAD, 4PAD, 8PAD>
NUM_PADS: 1PAD
# --------------------------------------===== OPERATION_CODE [Optional] =====---------------------------------------
# Description: Offset: 10b, Width: 6b, Instruction operation code.
# - STOP, (0): Stop execution and de-assert CS. Then, the next command sequence (to the same flash device) starts
# from instruction pointer 0.
# - CMD_SDR, (1): Transmit command code to Flash.
# - RADDR_SDR, (2): Transmit row address to Flash.
# - CADDR_SDR, (3): Transmit column address to Flash.
# - MODE1_SDR, (4): Transmit mode bits to Flash.
# - MODE2_SDR, (5): Transmit mode bits to Flash.
# - MODE4_SDR, (6): Transmit mode bits to Flash.
# - MODE8_SDR, (7): Transmit mode bits to Flash.
# - WRITE_SDR, (8): Transmit program data to Flash device.
# - READ_SDR, (9): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_SDR, (10): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_SDR, (11): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_SDR, (12): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_SDR, (13): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# - JMP_ON_CS, (31): Stop execution, de-assert CS and save operand[7:0] as the instruction start pointer for next
# sequence.Normally this instruction is used to support Execute-In-Place enhanced mode. See XIP enhanced mode for
# more details.This instruction is only allowed for AHB read commands. There is interrupt status bit set
# (INTR[IPCMDERR] or INTR[AHBCMDERR]) when using this instruction in IP command or AHB write command.
# - CMD_DDR, (33): Transmit command code to Flash.
# - RADDR_DDR, (34): Transmit row address to Flash.
# - CADDR_DDR, (35): Transmit column address to Flash.
# - MODE1_DDR, (36): Transmit mode bits to Flash.
# - MODE2_DDR, (37): Transmit mode bits to Flash.
# - MODE4_DDR, (38): Transmit mode bits to Flash.
# - MODE8_DDR, (39): Transmit mode bits to Flash.
# - WRITE_DDR, (40): Transmit program data to Flash device.
# - READ_DDR, (41): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_DDR, (42): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_DDR, (43): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_DDR, (44): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_DDR, (45): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# Possible options: <STOP, CMD_SDR, RADDR_SDR, CADDR_SDR, MODE1_SDR, MODE2_SDR, MODE4_SDR, MODE8_SDR, WRITE_SDR,
# READ_SDR, LEARN_SDR, DATSZ_SDR, DUMMY_SDR, DUMMY_RWDS_SDR, JMP_ON_CS, CMD_DDR, RADDR_DDR, CADDR_DDR, MODE1_DDR,
# MODE2_DDR, MODE4_DDR, MODE8_DDR, WRITE_DDR, READ_DDR, LEARN_DDR, DATSZ_DDR, DUMMY_DDR, DUMMY_RWDS_DDR>
OPERATION_CODE: STOP
lookupTable_seq1_instr1:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq1_instr2:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq1_instr3:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq1_instr4:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq1_instr5:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq1_instr6:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq1_instr7:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
# -----------------------------------===== lookupTable_seq2_instr0 [Optional] =====-----------------------------------
# Description: Offset: 0x000000A0, Width: 16b; Lookup table holds Flash command sequences 2, instruction 0
lookupTable_seq2_instr0:
# ------------------------------------------===== OPERAND [Optional] =====------------------------------------------
# Description: Offset: 0b, Width: 8b, Instruction operand. Its values depends on used instruction
OPERAND: 0
# -----------------------------------------===== NUM_PADS [Optional] =====------------------------------------------
# Description: Offset: 8b, Width: 2b, Number of pads used by instruction. Some instructions ignores this parameter.
# - 1PAD, (0): Single mode. One pad is used.
# - 2PAD, (1): Dual mode. Two pads are used.
# - 4PAD, (2): Quad mode. Four pads are used.
# - 8PAD, (3): Octal mode. Eight pads are used.
# Possible options: <1PAD, 2PAD, 4PAD, 8PAD>
NUM_PADS: 1PAD
# --------------------------------------===== OPERATION_CODE [Optional] =====---------------------------------------
# Description: Offset: 10b, Width: 6b, Instruction operation code.
# - STOP, (0): Stop execution and de-assert CS. Then, the next command sequence (to the same flash device) starts
# from instruction pointer 0.
# - CMD_SDR, (1): Transmit command code to Flash.
# - RADDR_SDR, (2): Transmit row address to Flash.
# - CADDR_SDR, (3): Transmit column address to Flash.
# - MODE1_SDR, (4): Transmit mode bits to Flash.
# - MODE2_SDR, (5): Transmit mode bits to Flash.
# - MODE4_SDR, (6): Transmit mode bits to Flash.
# - MODE8_SDR, (7): Transmit mode bits to Flash.
# - WRITE_SDR, (8): Transmit program data to Flash device.
# - READ_SDR, (9): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_SDR, (10): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_SDR, (11): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_SDR, (12): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_SDR, (13): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# - JMP_ON_CS, (31): Stop execution, de-assert CS and save operand[7:0] as the instruction start pointer for next
# sequence.Normally this instruction is used to support Execute-In-Place enhanced mode. See XIP enhanced mode for
# more details.This instruction is only allowed for AHB read commands. There is interrupt status bit set
# (INTR[IPCMDERR] or INTR[AHBCMDERR]) when using this instruction in IP command or AHB write command.
# - CMD_DDR, (33): Transmit command code to Flash.
# - RADDR_DDR, (34): Transmit row address to Flash.
# - CADDR_DDR, (35): Transmit column address to Flash.
# - MODE1_DDR, (36): Transmit mode bits to Flash.
# - MODE2_DDR, (37): Transmit mode bits to Flash.
# - MODE4_DDR, (38): Transmit mode bits to Flash.
# - MODE8_DDR, (39): Transmit mode bits to Flash.
# - WRITE_DDR, (40): Transmit program data to Flash device.
# - READ_DDR, (41): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_DDR, (42): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_DDR, (43): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_DDR, (44): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_DDR, (45): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# Possible options: <STOP, CMD_SDR, RADDR_SDR, CADDR_SDR, MODE1_SDR, MODE2_SDR, MODE4_SDR, MODE8_SDR, WRITE_SDR,
# READ_SDR, LEARN_SDR, DATSZ_SDR, DUMMY_SDR, DUMMY_RWDS_SDR, JMP_ON_CS, CMD_DDR, RADDR_DDR, CADDR_DDR, MODE1_DDR,
# MODE2_DDR, MODE4_DDR, MODE8_DDR, WRITE_DDR, READ_DDR, LEARN_DDR, DATSZ_DDR, DUMMY_DDR, DUMMY_RWDS_DDR>
OPERATION_CODE: STOP
lookupTable_seq2_instr1:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq2_instr2:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq2_instr3:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq2_instr4:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq2_instr5:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq2_instr6:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq2_instr7:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
# -----------------------------------===== lookupTable_seq3_instr0 [Optional] =====-----------------------------------
# Description: Offset: 0x000000B0, Width: 16b; Lookup table holds Flash command sequences 3, instruction 0
lookupTable_seq3_instr0:
# ------------------------------------------===== OPERAND [Optional] =====------------------------------------------
# Description: Offset: 0b, Width: 8b, Instruction operand. Its values depends on used instruction
OPERAND: 0
# -----------------------------------------===== NUM_PADS [Optional] =====------------------------------------------
# Description: Offset: 8b, Width: 2b, Number of pads used by instruction. Some instructions ignores this parameter.
# - 1PAD, (0): Single mode. One pad is used.
# - 2PAD, (1): Dual mode. Two pads are used.
# - 4PAD, (2): Quad mode. Four pads are used.
# - 8PAD, (3): Octal mode. Eight pads are used.
# Possible options: <1PAD, 2PAD, 4PAD, 8PAD>
NUM_PADS: 1PAD
# --------------------------------------===== OPERATION_CODE [Optional] =====---------------------------------------
# Description: Offset: 10b, Width: 6b, Instruction operation code.
# - STOP, (0): Stop execution and de-assert CS. Then, the next command sequence (to the same flash device) starts
# from instruction pointer 0.
# - CMD_SDR, (1): Transmit command code to Flash.
# - RADDR_SDR, (2): Transmit row address to Flash.
# - CADDR_SDR, (3): Transmit column address to Flash.
# - MODE1_SDR, (4): Transmit mode bits to Flash.
# - MODE2_SDR, (5): Transmit mode bits to Flash.
# - MODE4_SDR, (6): Transmit mode bits to Flash.
# - MODE8_SDR, (7): Transmit mode bits to Flash.
# - WRITE_SDR, (8): Transmit program data to Flash device.
# - READ_SDR, (9): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_SDR, (10): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_SDR, (11): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_SDR, (12): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_SDR, (13): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# - JMP_ON_CS, (31): Stop execution, de-assert CS and save operand[7:0] as the instruction start pointer for next
# sequence.Normally this instruction is used to support Execute-In-Place enhanced mode. See XIP enhanced mode for
# more details.This instruction is only allowed for AHB read commands. There is interrupt status bit set
# (INTR[IPCMDERR] or INTR[AHBCMDERR]) when using this instruction in IP command or AHB write command.
# - CMD_DDR, (33): Transmit command code to Flash.
# - RADDR_DDR, (34): Transmit row address to Flash.
# - CADDR_DDR, (35): Transmit column address to Flash.
# - MODE1_DDR, (36): Transmit mode bits to Flash.
# - MODE2_DDR, (37): Transmit mode bits to Flash.
# - MODE4_DDR, (38): Transmit mode bits to Flash.
# - MODE8_DDR, (39): Transmit mode bits to Flash.
# - WRITE_DDR, (40): Transmit program data to Flash device.
# - READ_DDR, (41): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_DDR, (42): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_DDR, (43): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_DDR, (44): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_DDR, (45): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# Possible options: <STOP, CMD_SDR, RADDR_SDR, CADDR_SDR, MODE1_SDR, MODE2_SDR, MODE4_SDR, MODE8_SDR, WRITE_SDR,
# READ_SDR, LEARN_SDR, DATSZ_SDR, DUMMY_SDR, DUMMY_RWDS_SDR, JMP_ON_CS, CMD_DDR, RADDR_DDR, CADDR_DDR, MODE1_DDR,
# MODE2_DDR, MODE4_DDR, MODE8_DDR, WRITE_DDR, READ_DDR, LEARN_DDR, DATSZ_DDR, DUMMY_DDR, DUMMY_RWDS_DDR>
OPERATION_CODE: STOP
lookupTable_seq3_instr1:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq3_instr2:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq3_instr3:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq3_instr4:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq3_instr5:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq3_instr6:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq3_instr7:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
# -----------------------------------===== lookupTable_seq4_instr0 [Optional] =====-----------------------------------
# Description: Offset: 0x000000C0, Width: 16b; Lookup table holds Flash command sequences 4, instruction 0
lookupTable_seq4_instr0:
# ------------------------------------------===== OPERAND [Optional] =====------------------------------------------
# Description: Offset: 0b, Width: 8b, Instruction operand. Its values depends on used instruction
OPERAND: 0
# -----------------------------------------===== NUM_PADS [Optional] =====------------------------------------------
# Description: Offset: 8b, Width: 2b, Number of pads used by instruction. Some instructions ignores this parameter.
# - 1PAD, (0): Single mode. One pad is used.
# - 2PAD, (1): Dual mode. Two pads are used.
# - 4PAD, (2): Quad mode. Four pads are used.
# - 8PAD, (3): Octal mode. Eight pads are used.
# Possible options: <1PAD, 2PAD, 4PAD, 8PAD>
NUM_PADS: 1PAD
# --------------------------------------===== OPERATION_CODE [Optional] =====---------------------------------------
# Description: Offset: 10b, Width: 6b, Instruction operation code.
# - STOP, (0): Stop execution and de-assert CS. Then, the next command sequence (to the same flash device) starts
# from instruction pointer 0.
# - CMD_SDR, (1): Transmit command code to Flash.
# - RADDR_SDR, (2): Transmit row address to Flash.
# - CADDR_SDR, (3): Transmit column address to Flash.
# - MODE1_SDR, (4): Transmit mode bits to Flash.
# - MODE2_SDR, (5): Transmit mode bits to Flash.
# - MODE4_SDR, (6): Transmit mode bits to Flash.
# - MODE8_SDR, (7): Transmit mode bits to Flash.
# - WRITE_SDR, (8): Transmit program data to Flash device.
# - READ_SDR, (9): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_SDR, (10): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_SDR, (11): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_SDR, (12): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_SDR, (13): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# - JMP_ON_CS, (31): Stop execution, de-assert CS and save operand[7:0] as the instruction start pointer for next
# sequence.Normally this instruction is used to support Execute-In-Place enhanced mode. See XIP enhanced mode for
# more details.This instruction is only allowed for AHB read commands. There is interrupt status bit set
# (INTR[IPCMDERR] or INTR[AHBCMDERR]) when using this instruction in IP command or AHB write command.
# - CMD_DDR, (33): Transmit command code to Flash.
# - RADDR_DDR, (34): Transmit row address to Flash.
# - CADDR_DDR, (35): Transmit column address to Flash.
# - MODE1_DDR, (36): Transmit mode bits to Flash.
# - MODE2_DDR, (37): Transmit mode bits to Flash.
# - MODE4_DDR, (38): Transmit mode bits to Flash.
# - MODE8_DDR, (39): Transmit mode bits to Flash.
# - WRITE_DDR, (40): Transmit program data to Flash device.
# - READ_DDR, (41): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_DDR, (42): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_DDR, (43): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_DDR, (44): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_DDR, (45): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# Possible options: <STOP, CMD_SDR, RADDR_SDR, CADDR_SDR, MODE1_SDR, MODE2_SDR, MODE4_SDR, MODE8_SDR, WRITE_SDR,
# READ_SDR, LEARN_SDR, DATSZ_SDR, DUMMY_SDR, DUMMY_RWDS_SDR, JMP_ON_CS, CMD_DDR, RADDR_DDR, CADDR_DDR, MODE1_DDR,
# MODE2_DDR, MODE4_DDR, MODE8_DDR, WRITE_DDR, READ_DDR, LEARN_DDR, DATSZ_DDR, DUMMY_DDR, DUMMY_RWDS_DDR>
OPERATION_CODE: STOP
lookupTable_seq4_instr1:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq4_instr2:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq4_instr3:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq4_instr4:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq4_instr5:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq4_instr6:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq4_instr7:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
# -----------------------------------===== lookupTable_seq5_instr0 [Optional] =====-----------------------------------
# Description: Offset: 0x000000D0, Width: 16b; Lookup table holds Flash command sequences 5, instruction 0
lookupTable_seq5_instr0:
# ------------------------------------------===== OPERAND [Optional] =====------------------------------------------
# Description: Offset: 0b, Width: 8b, Instruction operand. Its values depends on used instruction
OPERAND: 0
# -----------------------------------------===== NUM_PADS [Optional] =====------------------------------------------
# Description: Offset: 8b, Width: 2b, Number of pads used by instruction. Some instructions ignores this parameter.
# - 1PAD, (0): Single mode. One pad is used.
# - 2PAD, (1): Dual mode. Two pads are used.
# - 4PAD, (2): Quad mode. Four pads are used.
# - 8PAD, (3): Octal mode. Eight pads are used.
# Possible options: <1PAD, 2PAD, 4PAD, 8PAD>
NUM_PADS: 1PAD
# --------------------------------------===== OPERATION_CODE [Optional] =====---------------------------------------
# Description: Offset: 10b, Width: 6b, Instruction operation code.
# - STOP, (0): Stop execution and de-assert CS. Then, the next command sequence (to the same flash device) starts
# from instruction pointer 0.
# - CMD_SDR, (1): Transmit command code to Flash.
# - RADDR_SDR, (2): Transmit row address to Flash.
# - CADDR_SDR, (3): Transmit column address to Flash.
# - MODE1_SDR, (4): Transmit mode bits to Flash.
# - MODE2_SDR, (5): Transmit mode bits to Flash.
# - MODE4_SDR, (6): Transmit mode bits to Flash.
# - MODE8_SDR, (7): Transmit mode bits to Flash.
# - WRITE_SDR, (8): Transmit program data to Flash device.
# - READ_SDR, (9): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_SDR, (10): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_SDR, (11): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_SDR, (12): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_SDR, (13): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# - JMP_ON_CS, (31): Stop execution, de-assert CS and save operand[7:0] as the instruction start pointer for next
# sequence.Normally this instruction is used to support Execute-In-Place enhanced mode. See XIP enhanced mode for
# more details.This instruction is only allowed for AHB read commands. There is interrupt status bit set
# (INTR[IPCMDERR] or INTR[AHBCMDERR]) when using this instruction in IP command or AHB write command.
# - CMD_DDR, (33): Transmit command code to Flash.
# - RADDR_DDR, (34): Transmit row address to Flash.
# - CADDR_DDR, (35): Transmit column address to Flash.
# - MODE1_DDR, (36): Transmit mode bits to Flash.
# - MODE2_DDR, (37): Transmit mode bits to Flash.
# - MODE4_DDR, (38): Transmit mode bits to Flash.
# - MODE8_DDR, (39): Transmit mode bits to Flash.
# - WRITE_DDR, (40): Transmit program data to Flash device.
# - READ_DDR, (41): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_DDR, (42): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_DDR, (43): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_DDR, (44): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_DDR, (45): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# Possible options: <STOP, CMD_SDR, RADDR_SDR, CADDR_SDR, MODE1_SDR, MODE2_SDR, MODE4_SDR, MODE8_SDR, WRITE_SDR,
# READ_SDR, LEARN_SDR, DATSZ_SDR, DUMMY_SDR, DUMMY_RWDS_SDR, JMP_ON_CS, CMD_DDR, RADDR_DDR, CADDR_DDR, MODE1_DDR,
# MODE2_DDR, MODE4_DDR, MODE8_DDR, WRITE_DDR, READ_DDR, LEARN_DDR, DATSZ_DDR, DUMMY_DDR, DUMMY_RWDS_DDR>
OPERATION_CODE: STOP
lookupTable_seq5_instr1:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq5_instr2:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq5_instr3:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq5_instr4:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq5_instr5:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq5_instr6:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq5_instr7:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
# -----------------------------------===== lookupTable_seq6_instr0 [Optional] =====-----------------------------------
# Description: Offset: 0x000000E0, Width: 16b; Lookup table holds Flash command sequences 6, instruction 0
lookupTable_seq6_instr0:
# ------------------------------------------===== OPERAND [Optional] =====------------------------------------------
# Description: Offset: 0b, Width: 8b, Instruction operand. Its values depends on used instruction
OPERAND: 0
# -----------------------------------------===== NUM_PADS [Optional] =====------------------------------------------
# Description: Offset: 8b, Width: 2b, Number of pads used by instruction. Some instructions ignores this parameter.
# - 1PAD, (0): Single mode. One pad is used.
# - 2PAD, (1): Dual mode. Two pads are used.
# - 4PAD, (2): Quad mode. Four pads are used.
# - 8PAD, (3): Octal mode. Eight pads are used.
# Possible options: <1PAD, 2PAD, 4PAD, 8PAD>
NUM_PADS: 1PAD
# --------------------------------------===== OPERATION_CODE [Optional] =====---------------------------------------
# Description: Offset: 10b, Width: 6b, Instruction operation code.
# - STOP, (0): Stop execution and de-assert CS. Then, the next command sequence (to the same flash device) starts
# from instruction pointer 0.
# - CMD_SDR, (1): Transmit command code to Flash.
# - RADDR_SDR, (2): Transmit row address to Flash.
# - CADDR_SDR, (3): Transmit column address to Flash.
# - MODE1_SDR, (4): Transmit mode bits to Flash.
# - MODE2_SDR, (5): Transmit mode bits to Flash.
# - MODE4_SDR, (6): Transmit mode bits to Flash.
# - MODE8_SDR, (7): Transmit mode bits to Flash.
# - WRITE_SDR, (8): Transmit program data to Flash device.
# - READ_SDR, (9): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_SDR, (10): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_SDR, (11): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_SDR, (12): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_SDR, (13): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# - JMP_ON_CS, (31): Stop execution, de-assert CS and save operand[7:0] as the instruction start pointer for next
# sequence.Normally this instruction is used to support Execute-In-Place enhanced mode. See XIP enhanced mode for
# more details.This instruction is only allowed for AHB read commands. There is interrupt status bit set
# (INTR[IPCMDERR] or INTR[AHBCMDERR]) when using this instruction in IP command or AHB write command.
# - CMD_DDR, (33): Transmit command code to Flash.
# - RADDR_DDR, (34): Transmit row address to Flash.
# - CADDR_DDR, (35): Transmit column address to Flash.
# - MODE1_DDR, (36): Transmit mode bits to Flash.
# - MODE2_DDR, (37): Transmit mode bits to Flash.
# - MODE4_DDR, (38): Transmit mode bits to Flash.
# - MODE8_DDR, (39): Transmit mode bits to Flash.
# - WRITE_DDR, (40): Transmit program data to Flash device.
# - READ_DDR, (41): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_DDR, (42): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_DDR, (43): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_DDR, (44): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_DDR, (45): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# Possible options: <STOP, CMD_SDR, RADDR_SDR, CADDR_SDR, MODE1_SDR, MODE2_SDR, MODE4_SDR, MODE8_SDR, WRITE_SDR,
# READ_SDR, LEARN_SDR, DATSZ_SDR, DUMMY_SDR, DUMMY_RWDS_SDR, JMP_ON_CS, CMD_DDR, RADDR_DDR, CADDR_DDR, MODE1_DDR,
# MODE2_DDR, MODE4_DDR, MODE8_DDR, WRITE_DDR, READ_DDR, LEARN_DDR, DATSZ_DDR, DUMMY_DDR, DUMMY_RWDS_DDR>
OPERATION_CODE: STOP
lookupTable_seq6_instr1:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq6_instr2:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq6_instr3:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq6_instr4:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq6_instr5:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq6_instr6:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq6_instr7:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
# -----------------------------------===== lookupTable_seq7_instr0 [Optional] =====-----------------------------------
# Description: Offset: 0x000000F0, Width: 16b; Lookup table holds Flash command sequences 7, instruction 0
lookupTable_seq7_instr0:
# ------------------------------------------===== OPERAND [Optional] =====------------------------------------------
# Description: Offset: 0b, Width: 8b, Instruction operand. Its values depends on used instruction
OPERAND: 0
# -----------------------------------------===== NUM_PADS [Optional] =====------------------------------------------
# Description: Offset: 8b, Width: 2b, Number of pads used by instruction. Some instructions ignores this parameter.
# - 1PAD, (0): Single mode. One pad is used.
# - 2PAD, (1): Dual mode. Two pads are used.
# - 4PAD, (2): Quad mode. Four pads are used.
# - 8PAD, (3): Octal mode. Eight pads are used.
# Possible options: <1PAD, 2PAD, 4PAD, 8PAD>
NUM_PADS: 1PAD
# --------------------------------------===== OPERATION_CODE [Optional] =====---------------------------------------
# Description: Offset: 10b, Width: 6b, Instruction operation code.
# - STOP, (0): Stop execution and de-assert CS. Then, the next command sequence (to the same flash device) starts
# from instruction pointer 0.
# - CMD_SDR, (1): Transmit command code to Flash.
# - RADDR_SDR, (2): Transmit row address to Flash.
# - CADDR_SDR, (3): Transmit column address to Flash.
# - MODE1_SDR, (4): Transmit mode bits to Flash.
# - MODE2_SDR, (5): Transmit mode bits to Flash.
# - MODE4_SDR, (6): Transmit mode bits to Flash.
# - MODE8_SDR, (7): Transmit mode bits to Flash.
# - WRITE_SDR, (8): Transmit program data to Flash device.
# - READ_SDR, (9): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_SDR, (10): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_SDR, (11): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_SDR, (12): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_SDR, (13): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# - JMP_ON_CS, (31): Stop execution, de-assert CS and save operand[7:0] as the instruction start pointer for next
# sequence.Normally this instruction is used to support Execute-In-Place enhanced mode. See XIP enhanced mode for
# more details.This instruction is only allowed for AHB read commands. There is interrupt status bit set
# (INTR[IPCMDERR] or INTR[AHBCMDERR]) when using this instruction in IP command or AHB write command.
# - CMD_DDR, (33): Transmit command code to Flash.
# - RADDR_DDR, (34): Transmit row address to Flash.
# - CADDR_DDR, (35): Transmit column address to Flash.
# - MODE1_DDR, (36): Transmit mode bits to Flash.
# - MODE2_DDR, (37): Transmit mode bits to Flash.
# - MODE4_DDR, (38): Transmit mode bits to Flash.
# - MODE8_DDR, (39): Transmit mode bits to Flash.
# - WRITE_DDR, (40): Transmit program data to Flash device.
# - READ_DDR, (41): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_DDR, (42): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_DDR, (43): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_DDR, (44): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_DDR, (45): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# Possible options: <STOP, CMD_SDR, RADDR_SDR, CADDR_SDR, MODE1_SDR, MODE2_SDR, MODE4_SDR, MODE8_SDR, WRITE_SDR,
# READ_SDR, LEARN_SDR, DATSZ_SDR, DUMMY_SDR, DUMMY_RWDS_SDR, JMP_ON_CS, CMD_DDR, RADDR_DDR, CADDR_DDR, MODE1_DDR,
# MODE2_DDR, MODE4_DDR, MODE8_DDR, WRITE_DDR, READ_DDR, LEARN_DDR, DATSZ_DDR, DUMMY_DDR, DUMMY_RWDS_DDR>
OPERATION_CODE: STOP
lookupTable_seq7_instr1:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq7_instr2:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq7_instr3:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq7_instr4:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq7_instr5:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq7_instr6:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq7_instr7:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
# -----------------------------------===== lookupTable_seq8_instr0 [Optional] =====-----------------------------------
# Description: Offset: 0x00000100, Width: 16b; Lookup table holds Flash command sequences 8, instruction 0
lookupTable_seq8_instr0:
# ------------------------------------------===== OPERAND [Optional] =====------------------------------------------
# Description: Offset: 0b, Width: 8b, Instruction operand. Its values depends on used instruction
OPERAND: 0
# -----------------------------------------===== NUM_PADS [Optional] =====------------------------------------------
# Description: Offset: 8b, Width: 2b, Number of pads used by instruction. Some instructions ignores this parameter.
# - 1PAD, (0): Single mode. One pad is used.
# - 2PAD, (1): Dual mode. Two pads are used.
# - 4PAD, (2): Quad mode. Four pads are used.
# - 8PAD, (3): Octal mode. Eight pads are used.
# Possible options: <1PAD, 2PAD, 4PAD, 8PAD>
NUM_PADS: 1PAD
# --------------------------------------===== OPERATION_CODE [Optional] =====---------------------------------------
# Description: Offset: 10b, Width: 6b, Instruction operation code.
# - STOP, (0): Stop execution and de-assert CS. Then, the next command sequence (to the same flash device) starts
# from instruction pointer 0.
# - CMD_SDR, (1): Transmit command code to Flash.
# - RADDR_SDR, (2): Transmit row address to Flash.
# - CADDR_SDR, (3): Transmit column address to Flash.
# - MODE1_SDR, (4): Transmit mode bits to Flash.
# - MODE2_SDR, (5): Transmit mode bits to Flash.
# - MODE4_SDR, (6): Transmit mode bits to Flash.
# - MODE8_SDR, (7): Transmit mode bits to Flash.
# - WRITE_SDR, (8): Transmit program data to Flash device.
# - READ_SDR, (9): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_SDR, (10): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_SDR, (11): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_SDR, (12): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_SDR, (13): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# - JMP_ON_CS, (31): Stop execution, de-assert CS and save operand[7:0] as the instruction start pointer for next
# sequence.Normally this instruction is used to support Execute-In-Place enhanced mode. See XIP enhanced mode for
# more details.This instruction is only allowed for AHB read commands. There is interrupt status bit set
# (INTR[IPCMDERR] or INTR[AHBCMDERR]) when using this instruction in IP command or AHB write command.
# - CMD_DDR, (33): Transmit command code to Flash.
# - RADDR_DDR, (34): Transmit row address to Flash.
# - CADDR_DDR, (35): Transmit column address to Flash.
# - MODE1_DDR, (36): Transmit mode bits to Flash.
# - MODE2_DDR, (37): Transmit mode bits to Flash.
# - MODE4_DDR, (38): Transmit mode bits to Flash.
# - MODE8_DDR, (39): Transmit mode bits to Flash.
# - WRITE_DDR, (40): Transmit program data to Flash device.
# - READ_DDR, (41): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_DDR, (42): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_DDR, (43): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_DDR, (44): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_DDR, (45): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# Possible options: <STOP, CMD_SDR, RADDR_SDR, CADDR_SDR, MODE1_SDR, MODE2_SDR, MODE4_SDR, MODE8_SDR, WRITE_SDR,
# READ_SDR, LEARN_SDR, DATSZ_SDR, DUMMY_SDR, DUMMY_RWDS_SDR, JMP_ON_CS, CMD_DDR, RADDR_DDR, CADDR_DDR, MODE1_DDR,
# MODE2_DDR, MODE4_DDR, MODE8_DDR, WRITE_DDR, READ_DDR, LEARN_DDR, DATSZ_DDR, DUMMY_DDR, DUMMY_RWDS_DDR>
OPERATION_CODE: STOP
lookupTable_seq8_instr1:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq8_instr2:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq8_instr3:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq8_instr4:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq8_instr5:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq8_instr6:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq8_instr7:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
# -----------------------------------===== lookupTable_seq9_instr0 [Optional] =====-----------------------------------
# Description: Offset: 0x00000110, Width: 16b; Lookup table holds Flash command sequences 9, instruction 0
lookupTable_seq9_instr0:
# ------------------------------------------===== OPERAND [Optional] =====------------------------------------------
# Description: Offset: 0b, Width: 8b, Instruction operand. Its values depends on used instruction
OPERAND: 0
# -----------------------------------------===== NUM_PADS [Optional] =====------------------------------------------
# Description: Offset: 8b, Width: 2b, Number of pads used by instruction. Some instructions ignores this parameter.
# - 1PAD, (0): Single mode. One pad is used.
# - 2PAD, (1): Dual mode. Two pads are used.
# - 4PAD, (2): Quad mode. Four pads are used.
# - 8PAD, (3): Octal mode. Eight pads are used.
# Possible options: <1PAD, 2PAD, 4PAD, 8PAD>
NUM_PADS: 1PAD
# --------------------------------------===== OPERATION_CODE [Optional] =====---------------------------------------
# Description: Offset: 10b, Width: 6b, Instruction operation code.
# - STOP, (0): Stop execution and de-assert CS. Then, the next command sequence (to the same flash device) starts
# from instruction pointer 0.
# - CMD_SDR, (1): Transmit command code to Flash.
# - RADDR_SDR, (2): Transmit row address to Flash.
# - CADDR_SDR, (3): Transmit column address to Flash.
# - MODE1_SDR, (4): Transmit mode bits to Flash.
# - MODE2_SDR, (5): Transmit mode bits to Flash.
# - MODE4_SDR, (6): Transmit mode bits to Flash.
# - MODE8_SDR, (7): Transmit mode bits to Flash.
# - WRITE_SDR, (8): Transmit program data to Flash device.
# - READ_SDR, (9): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_SDR, (10): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_SDR, (11): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_SDR, (12): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_SDR, (13): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# - JMP_ON_CS, (31): Stop execution, de-assert CS and save operand[7:0] as the instruction start pointer for next
# sequence.Normally this instruction is used to support Execute-In-Place enhanced mode. See XIP enhanced mode for
# more details.This instruction is only allowed for AHB read commands. There is interrupt status bit set
# (INTR[IPCMDERR] or INTR[AHBCMDERR]) when using this instruction in IP command or AHB write command.
# - CMD_DDR, (33): Transmit command code to Flash.
# - RADDR_DDR, (34): Transmit row address to Flash.
# - CADDR_DDR, (35): Transmit column address to Flash.
# - MODE1_DDR, (36): Transmit mode bits to Flash.
# - MODE2_DDR, (37): Transmit mode bits to Flash.
# - MODE4_DDR, (38): Transmit mode bits to Flash.
# - MODE8_DDR, (39): Transmit mode bits to Flash.
# - WRITE_DDR, (40): Transmit program data to Flash device.
# - READ_DDR, (41): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_DDR, (42): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_DDR, (43): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_DDR, (44): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_DDR, (45): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# Possible options: <STOP, CMD_SDR, RADDR_SDR, CADDR_SDR, MODE1_SDR, MODE2_SDR, MODE4_SDR, MODE8_SDR, WRITE_SDR,
# READ_SDR, LEARN_SDR, DATSZ_SDR, DUMMY_SDR, DUMMY_RWDS_SDR, JMP_ON_CS, CMD_DDR, RADDR_DDR, CADDR_DDR, MODE1_DDR,
# MODE2_DDR, MODE4_DDR, MODE8_DDR, WRITE_DDR, READ_DDR, LEARN_DDR, DATSZ_DDR, DUMMY_DDR, DUMMY_RWDS_DDR>
OPERATION_CODE: STOP
lookupTable_seq9_instr1:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq9_instr2:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq9_instr3:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq9_instr4:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq9_instr5:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq9_instr6:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq9_instr7:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
# ----------------------------------===== lookupTable_seq10_instr0 [Optional] =====-----------------------------------
# Description: Offset: 0x00000120, Width: 16b; Lookup table holds Flash command sequences 10, instruction 0
lookupTable_seq10_instr0:
# ------------------------------------------===== OPERAND [Optional] =====------------------------------------------
# Description: Offset: 0b, Width: 8b, Instruction operand. Its values depends on used instruction
OPERAND: 0
# -----------------------------------------===== NUM_PADS [Optional] =====------------------------------------------
# Description: Offset: 8b, Width: 2b, Number of pads used by instruction. Some instructions ignores this parameter.
# - 1PAD, (0): Single mode. One pad is used.
# - 2PAD, (1): Dual mode. Two pads are used.
# - 4PAD, (2): Quad mode. Four pads are used.
# - 8PAD, (3): Octal mode. Eight pads are used.
# Possible options: <1PAD, 2PAD, 4PAD, 8PAD>
NUM_PADS: 1PAD
# --------------------------------------===== OPERATION_CODE [Optional] =====---------------------------------------
# Description: Offset: 10b, Width: 6b, Instruction operation code.
# - STOP, (0): Stop execution and de-assert CS. Then, the next command sequence (to the same flash device) starts
# from instruction pointer 0.
# - CMD_SDR, (1): Transmit command code to Flash.
# - RADDR_SDR, (2): Transmit row address to Flash.
# - CADDR_SDR, (3): Transmit column address to Flash.
# - MODE1_SDR, (4): Transmit mode bits to Flash.
# - MODE2_SDR, (5): Transmit mode bits to Flash.
# - MODE4_SDR, (6): Transmit mode bits to Flash.
# - MODE8_SDR, (7): Transmit mode bits to Flash.
# - WRITE_SDR, (8): Transmit program data to Flash device.
# - READ_SDR, (9): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_SDR, (10): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_SDR, (11): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_SDR, (12): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_SDR, (13): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# - JMP_ON_CS, (31): Stop execution, de-assert CS and save operand[7:0] as the instruction start pointer for next
# sequence.Normally this instruction is used to support Execute-In-Place enhanced mode. See XIP enhanced mode for
# more details.This instruction is only allowed for AHB read commands. There is interrupt status bit set
# (INTR[IPCMDERR] or INTR[AHBCMDERR]) when using this instruction in IP command or AHB write command.
# - CMD_DDR, (33): Transmit command code to Flash.
# - RADDR_DDR, (34): Transmit row address to Flash.
# - CADDR_DDR, (35): Transmit column address to Flash.
# - MODE1_DDR, (36): Transmit mode bits to Flash.
# - MODE2_DDR, (37): Transmit mode bits to Flash.
# - MODE4_DDR, (38): Transmit mode bits to Flash.
# - MODE8_DDR, (39): Transmit mode bits to Flash.
# - WRITE_DDR, (40): Transmit program data to Flash device.
# - READ_DDR, (41): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_DDR, (42): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_DDR, (43): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_DDR, (44): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_DDR, (45): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# Possible options: <STOP, CMD_SDR, RADDR_SDR, CADDR_SDR, MODE1_SDR, MODE2_SDR, MODE4_SDR, MODE8_SDR, WRITE_SDR,
# READ_SDR, LEARN_SDR, DATSZ_SDR, DUMMY_SDR, DUMMY_RWDS_SDR, JMP_ON_CS, CMD_DDR, RADDR_DDR, CADDR_DDR, MODE1_DDR,
# MODE2_DDR, MODE4_DDR, MODE8_DDR, WRITE_DDR, READ_DDR, LEARN_DDR, DATSZ_DDR, DUMMY_DDR, DUMMY_RWDS_DDR>
OPERATION_CODE: STOP
lookupTable_seq10_instr1:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq10_instr2:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq10_instr3:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq10_instr4:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq10_instr5:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq10_instr6:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq10_instr7:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
# ----------------------------------===== lookupTable_seq11_instr0 [Optional] =====-----------------------------------
# Description: Offset: 0x00000130, Width: 16b; Lookup table holds Flash command sequences 11, instruction 0
lookupTable_seq11_instr0:
# ------------------------------------------===== OPERAND [Optional] =====------------------------------------------
# Description: Offset: 0b, Width: 8b, Instruction operand. Its values depends on used instruction
OPERAND: 0
# -----------------------------------------===== NUM_PADS [Optional] =====------------------------------------------
# Description: Offset: 8b, Width: 2b, Number of pads used by instruction. Some instructions ignores this parameter.
# - 1PAD, (0): Single mode. One pad is used.
# - 2PAD, (1): Dual mode. Two pads are used.
# - 4PAD, (2): Quad mode. Four pads are used.
# - 8PAD, (3): Octal mode. Eight pads are used.
# Possible options: <1PAD, 2PAD, 4PAD, 8PAD>
NUM_PADS: 1PAD
# --------------------------------------===== OPERATION_CODE [Optional] =====---------------------------------------
# Description: Offset: 10b, Width: 6b, Instruction operation code.
# - STOP, (0): Stop execution and de-assert CS. Then, the next command sequence (to the same flash device) starts
# from instruction pointer 0.
# - CMD_SDR, (1): Transmit command code to Flash.
# - RADDR_SDR, (2): Transmit row address to Flash.
# - CADDR_SDR, (3): Transmit column address to Flash.
# - MODE1_SDR, (4): Transmit mode bits to Flash.
# - MODE2_SDR, (5): Transmit mode bits to Flash.
# - MODE4_SDR, (6): Transmit mode bits to Flash.
# - MODE8_SDR, (7): Transmit mode bits to Flash.
# - WRITE_SDR, (8): Transmit program data to Flash device.
# - READ_SDR, (9): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_SDR, (10): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_SDR, (11): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_SDR, (12): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_SDR, (13): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# - JMP_ON_CS, (31): Stop execution, de-assert CS and save operand[7:0] as the instruction start pointer for next
# sequence.Normally this instruction is used to support Execute-In-Place enhanced mode. See XIP enhanced mode for
# more details.This instruction is only allowed for AHB read commands. There is interrupt status bit set
# (INTR[IPCMDERR] or INTR[AHBCMDERR]) when using this instruction in IP command or AHB write command.
# - CMD_DDR, (33): Transmit command code to Flash.
# - RADDR_DDR, (34): Transmit row address to Flash.
# - CADDR_DDR, (35): Transmit column address to Flash.
# - MODE1_DDR, (36): Transmit mode bits to Flash.
# - MODE2_DDR, (37): Transmit mode bits to Flash.
# - MODE4_DDR, (38): Transmit mode bits to Flash.
# - MODE8_DDR, (39): Transmit mode bits to Flash.
# - WRITE_DDR, (40): Transmit program data to Flash device.
# - READ_DDR, (41): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_DDR, (42): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_DDR, (43): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_DDR, (44): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_DDR, (45): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# Possible options: <STOP, CMD_SDR, RADDR_SDR, CADDR_SDR, MODE1_SDR, MODE2_SDR, MODE4_SDR, MODE8_SDR, WRITE_SDR,
# READ_SDR, LEARN_SDR, DATSZ_SDR, DUMMY_SDR, DUMMY_RWDS_SDR, JMP_ON_CS, CMD_DDR, RADDR_DDR, CADDR_DDR, MODE1_DDR,
# MODE2_DDR, MODE4_DDR, MODE8_DDR, WRITE_DDR, READ_DDR, LEARN_DDR, DATSZ_DDR, DUMMY_DDR, DUMMY_RWDS_DDR>
OPERATION_CODE: STOP
lookupTable_seq11_instr1:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq11_instr2:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq11_instr3:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq11_instr4:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq11_instr5:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq11_instr6:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq11_instr7:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
# ----------------------------------===== lookupTable_seq12_instr0 [Optional] =====-----------------------------------
# Description: Offset: 0x00000140, Width: 16b; Lookup table holds Flash command sequences 12, instruction 0
lookupTable_seq12_instr0:
# ------------------------------------------===== OPERAND [Optional] =====------------------------------------------
# Description: Offset: 0b, Width: 8b, Instruction operand. Its values depends on used instruction
OPERAND: 0
# -----------------------------------------===== NUM_PADS [Optional] =====------------------------------------------
# Description: Offset: 8b, Width: 2b, Number of pads used by instruction. Some instructions ignores this parameter.
# - 1PAD, (0): Single mode. One pad is used.
# - 2PAD, (1): Dual mode. Two pads are used.
# - 4PAD, (2): Quad mode. Four pads are used.
# - 8PAD, (3): Octal mode. Eight pads are used.
# Possible options: <1PAD, 2PAD, 4PAD, 8PAD>
NUM_PADS: 1PAD
# --------------------------------------===== OPERATION_CODE [Optional] =====---------------------------------------
# Description: Offset: 10b, Width: 6b, Instruction operation code.
# - STOP, (0): Stop execution and de-assert CS. Then, the next command sequence (to the same flash device) starts
# from instruction pointer 0.
# - CMD_SDR, (1): Transmit command code to Flash.
# - RADDR_SDR, (2): Transmit row address to Flash.
# - CADDR_SDR, (3): Transmit column address to Flash.
# - MODE1_SDR, (4): Transmit mode bits to Flash.
# - MODE2_SDR, (5): Transmit mode bits to Flash.
# - MODE4_SDR, (6): Transmit mode bits to Flash.
# - MODE8_SDR, (7): Transmit mode bits to Flash.
# - WRITE_SDR, (8): Transmit program data to Flash device.
# - READ_SDR, (9): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_SDR, (10): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_SDR, (11): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_SDR, (12): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_SDR, (13): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# - JMP_ON_CS, (31): Stop execution, de-assert CS and save operand[7:0] as the instruction start pointer for next
# sequence.Normally this instruction is used to support Execute-In-Place enhanced mode. See XIP enhanced mode for
# more details.This instruction is only allowed for AHB read commands. There is interrupt status bit set
# (INTR[IPCMDERR] or INTR[AHBCMDERR]) when using this instruction in IP command or AHB write command.
# - CMD_DDR, (33): Transmit command code to Flash.
# - RADDR_DDR, (34): Transmit row address to Flash.
# - CADDR_DDR, (35): Transmit column address to Flash.
# - MODE1_DDR, (36): Transmit mode bits to Flash.
# - MODE2_DDR, (37): Transmit mode bits to Flash.
# - MODE4_DDR, (38): Transmit mode bits to Flash.
# - MODE8_DDR, (39): Transmit mode bits to Flash.
# - WRITE_DDR, (40): Transmit program data to Flash device.
# - READ_DDR, (41): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_DDR, (42): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_DDR, (43): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_DDR, (44): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_DDR, (45): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# Possible options: <STOP, CMD_SDR, RADDR_SDR, CADDR_SDR, MODE1_SDR, MODE2_SDR, MODE4_SDR, MODE8_SDR, WRITE_SDR,
# READ_SDR, LEARN_SDR, DATSZ_SDR, DUMMY_SDR, DUMMY_RWDS_SDR, JMP_ON_CS, CMD_DDR, RADDR_DDR, CADDR_DDR, MODE1_DDR,
# MODE2_DDR, MODE4_DDR, MODE8_DDR, WRITE_DDR, READ_DDR, LEARN_DDR, DATSZ_DDR, DUMMY_DDR, DUMMY_RWDS_DDR>
OPERATION_CODE: STOP
lookupTable_seq12_instr1:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq12_instr2:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq12_instr3:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq12_instr4:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq12_instr5:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq12_instr6:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq12_instr7:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
# ----------------------------------===== lookupTable_seq13_instr0 [Optional] =====-----------------------------------
# Description: Offset: 0x00000150, Width: 16b; Lookup table holds Flash command sequences 13, instruction 0
lookupTable_seq13_instr0:
# ------------------------------------------===== OPERAND [Optional] =====------------------------------------------
# Description: Offset: 0b, Width: 8b, Instruction operand. Its values depends on used instruction
OPERAND: 0
# -----------------------------------------===== NUM_PADS [Optional] =====------------------------------------------
# Description: Offset: 8b, Width: 2b, Number of pads used by instruction. Some instructions ignores this parameter.
# - 1PAD, (0): Single mode. One pad is used.
# - 2PAD, (1): Dual mode. Two pads are used.
# - 4PAD, (2): Quad mode. Four pads are used.
# - 8PAD, (3): Octal mode. Eight pads are used.
# Possible options: <1PAD, 2PAD, 4PAD, 8PAD>
NUM_PADS: 1PAD
# --------------------------------------===== OPERATION_CODE [Optional] =====---------------------------------------
# Description: Offset: 10b, Width: 6b, Instruction operation code.
# - STOP, (0): Stop execution and de-assert CS. Then, the next command sequence (to the same flash device) starts
# from instruction pointer 0.
# - CMD_SDR, (1): Transmit command code to Flash.
# - RADDR_SDR, (2): Transmit row address to Flash.
# - CADDR_SDR, (3): Transmit column address to Flash.
# - MODE1_SDR, (4): Transmit mode bits to Flash.
# - MODE2_SDR, (5): Transmit mode bits to Flash.
# - MODE4_SDR, (6): Transmit mode bits to Flash.
# - MODE8_SDR, (7): Transmit mode bits to Flash.
# - WRITE_SDR, (8): Transmit program data to Flash device.
# - READ_SDR, (9): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_SDR, (10): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_SDR, (11): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_SDR, (12): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_SDR, (13): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# - JMP_ON_CS, (31): Stop execution, de-assert CS and save operand[7:0] as the instruction start pointer for next
# sequence.Normally this instruction is used to support Execute-In-Place enhanced mode. See XIP enhanced mode for
# more details.This instruction is only allowed for AHB read commands. There is interrupt status bit set
# (INTR[IPCMDERR] or INTR[AHBCMDERR]) when using this instruction in IP command or AHB write command.
# - CMD_DDR, (33): Transmit command code to Flash.
# - RADDR_DDR, (34): Transmit row address to Flash.
# - CADDR_DDR, (35): Transmit column address to Flash.
# - MODE1_DDR, (36): Transmit mode bits to Flash.
# - MODE2_DDR, (37): Transmit mode bits to Flash.
# - MODE4_DDR, (38): Transmit mode bits to Flash.
# - MODE8_DDR, (39): Transmit mode bits to Flash.
# - WRITE_DDR, (40): Transmit program data to Flash device.
# - READ_DDR, (41): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_DDR, (42): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_DDR, (43): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_DDR, (44): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_DDR, (45): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# Possible options: <STOP, CMD_SDR, RADDR_SDR, CADDR_SDR, MODE1_SDR, MODE2_SDR, MODE4_SDR, MODE8_SDR, WRITE_SDR,
# READ_SDR, LEARN_SDR, DATSZ_SDR, DUMMY_SDR, DUMMY_RWDS_SDR, JMP_ON_CS, CMD_DDR, RADDR_DDR, CADDR_DDR, MODE1_DDR,
# MODE2_DDR, MODE4_DDR, MODE8_DDR, WRITE_DDR, READ_DDR, LEARN_DDR, DATSZ_DDR, DUMMY_DDR, DUMMY_RWDS_DDR>
OPERATION_CODE: STOP
lookupTable_seq13_instr1:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq13_instr2:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq13_instr3:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq13_instr4:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq13_instr5:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq13_instr6:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq13_instr7:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
# ----------------------------------===== lookupTable_seq14_instr0 [Optional] =====-----------------------------------
# Description: Offset: 0x00000160, Width: 16b; Lookup table holds Flash command sequences 14, instruction 0
lookupTable_seq14_instr0:
# ------------------------------------------===== OPERAND [Optional] =====------------------------------------------
# Description: Offset: 0b, Width: 8b, Instruction operand. Its values depends on used instruction
OPERAND: 0
# -----------------------------------------===== NUM_PADS [Optional] =====------------------------------------------
# Description: Offset: 8b, Width: 2b, Number of pads used by instruction. Some instructions ignores this parameter.
# - 1PAD, (0): Single mode. One pad is used.
# - 2PAD, (1): Dual mode. Two pads are used.
# - 4PAD, (2): Quad mode. Four pads are used.
# - 8PAD, (3): Octal mode. Eight pads are used.
# Possible options: <1PAD, 2PAD, 4PAD, 8PAD>
NUM_PADS: 1PAD
# --------------------------------------===== OPERATION_CODE [Optional] =====---------------------------------------
# Description: Offset: 10b, Width: 6b, Instruction operation code.
# - STOP, (0): Stop execution and de-assert CS. Then, the next command sequence (to the same flash device) starts
# from instruction pointer 0.
# - CMD_SDR, (1): Transmit command code to Flash.
# - RADDR_SDR, (2): Transmit row address to Flash.
# - CADDR_SDR, (3): Transmit column address to Flash.
# - MODE1_SDR, (4): Transmit mode bits to Flash.
# - MODE2_SDR, (5): Transmit mode bits to Flash.
# - MODE4_SDR, (6): Transmit mode bits to Flash.
# - MODE8_SDR, (7): Transmit mode bits to Flash.
# - WRITE_SDR, (8): Transmit program data to Flash device.
# - READ_SDR, (9): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_SDR, (10): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_SDR, (11): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_SDR, (12): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_SDR, (13): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# - JMP_ON_CS, (31): Stop execution, de-assert CS and save operand[7:0] as the instruction start pointer for next
# sequence.Normally this instruction is used to support Execute-In-Place enhanced mode. See XIP enhanced mode for
# more details.This instruction is only allowed for AHB read commands. There is interrupt status bit set
# (INTR[IPCMDERR] or INTR[AHBCMDERR]) when using this instruction in IP command or AHB write command.
# - CMD_DDR, (33): Transmit command code to Flash.
# - RADDR_DDR, (34): Transmit row address to Flash.
# - CADDR_DDR, (35): Transmit column address to Flash.
# - MODE1_DDR, (36): Transmit mode bits to Flash.
# - MODE2_DDR, (37): Transmit mode bits to Flash.
# - MODE4_DDR, (38): Transmit mode bits to Flash.
# - MODE8_DDR, (39): Transmit mode bits to Flash.
# - WRITE_DDR, (40): Transmit program data to Flash device.
# - READ_DDR, (41): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_DDR, (42): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_DDR, (43): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_DDR, (44): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_DDR, (45): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# Possible options: <STOP, CMD_SDR, RADDR_SDR, CADDR_SDR, MODE1_SDR, MODE2_SDR, MODE4_SDR, MODE8_SDR, WRITE_SDR,
# READ_SDR, LEARN_SDR, DATSZ_SDR, DUMMY_SDR, DUMMY_RWDS_SDR, JMP_ON_CS, CMD_DDR, RADDR_DDR, CADDR_DDR, MODE1_DDR,
# MODE2_DDR, MODE4_DDR, MODE8_DDR, WRITE_DDR, READ_DDR, LEARN_DDR, DATSZ_DDR, DUMMY_DDR, DUMMY_RWDS_DDR>
OPERATION_CODE: STOP
lookupTable_seq14_instr1:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq14_instr2:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq14_instr3:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq14_instr4:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq14_instr5:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq14_instr6:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq14_instr7:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
# ----------------------------------===== lookupTable_seq15_instr0 [Optional] =====-----------------------------------
# Description: Offset: 0x00000170, Width: 16b; Lookup table holds Flash command sequences 15, instruction 0
lookupTable_seq15_instr0:
# ------------------------------------------===== OPERAND [Optional] =====------------------------------------------
# Description: Offset: 0b, Width: 8b, Instruction operand. Its values depends on used instruction
OPERAND: 0
# -----------------------------------------===== NUM_PADS [Optional] =====------------------------------------------
# Description: Offset: 8b, Width: 2b, Number of pads used by instruction. Some instructions ignores this parameter.
# - 1PAD, (0): Single mode. One pad is used.
# - 2PAD, (1): Dual mode. Two pads are used.
# - 4PAD, (2): Quad mode. Four pads are used.
# - 8PAD, (3): Octal mode. Eight pads are used.
# Possible options: <1PAD, 2PAD, 4PAD, 8PAD>
NUM_PADS: 1PAD
# --------------------------------------===== OPERATION_CODE [Optional] =====---------------------------------------
# Description: Offset: 10b, Width: 6b, Instruction operation code.
# - STOP, (0): Stop execution and de-assert CS. Then, the next command sequence (to the same flash device) starts
# from instruction pointer 0.
# - CMD_SDR, (1): Transmit command code to Flash.
# - RADDR_SDR, (2): Transmit row address to Flash.
# - CADDR_SDR, (3): Transmit column address to Flash.
# - MODE1_SDR, (4): Transmit mode bits to Flash.
# - MODE2_SDR, (5): Transmit mode bits to Flash.
# - MODE4_SDR, (6): Transmit mode bits to Flash.
# - MODE8_SDR, (7): Transmit mode bits to Flash.
# - WRITE_SDR, (8): Transmit program data to Flash device.
# - READ_SDR, (9): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_SDR, (10): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_SDR, (11): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_SDR, (12): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_SDR, (13): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# - JMP_ON_CS, (31): Stop execution, de-assert CS and save operand[7:0] as the instruction start pointer for next
# sequence.Normally this instruction is used to support Execute-In-Place enhanced mode. See XIP enhanced mode for
# more details.This instruction is only allowed for AHB read commands. There is interrupt status bit set
# (INTR[IPCMDERR] or INTR[AHBCMDERR]) when using this instruction in IP command or AHB write command.
# - CMD_DDR, (33): Transmit command code to Flash.
# - RADDR_DDR, (34): Transmit row address to Flash.
# - CADDR_DDR, (35): Transmit column address to Flash.
# - MODE1_DDR, (36): Transmit mode bits to Flash.
# - MODE2_DDR, (37): Transmit mode bits to Flash.
# - MODE4_DDR, (38): Transmit mode bits to Flash.
# - MODE8_DDR, (39): Transmit mode bits to Flash.
# - WRITE_DDR, (40): Transmit program data to Flash device.
# - READ_DDR, (41): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_DDR, (42): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_DDR, (43): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_DDR, (44): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_DDR, (45): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# Possible options: <STOP, CMD_SDR, RADDR_SDR, CADDR_SDR, MODE1_SDR, MODE2_SDR, MODE4_SDR, MODE8_SDR, WRITE_SDR,
# READ_SDR, LEARN_SDR, DATSZ_SDR, DUMMY_SDR, DUMMY_RWDS_SDR, JMP_ON_CS, CMD_DDR, RADDR_DDR, CADDR_DDR, MODE1_DDR,
# MODE2_DDR, MODE4_DDR, MODE8_DDR, WRITE_DDR, READ_DDR, LEARN_DDR, DATSZ_DDR, DUMMY_DDR, DUMMY_RWDS_DDR>
OPERATION_CODE: STOP
lookupTable_seq15_instr1:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq15_instr2:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq15_instr3:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq15_instr4:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq15_instr5:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq15_instr6:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq15_instr7:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
# ---------------------------------------===== lutCustomSeq_0 [Optional] =====----------------------------------------
# Description: Offset: 0x00000180, Width: 32b; [0x180-0x1af] Customizable LUT Sequences
lutCustomSeq_0:
# ------------------------------------------===== seqNum [Optional] =====-------------------------------------------
# Description: Offset: 0b, Width: 8b, Sequence Number, valid number: 1-16
seqNum: 0
# -------------------------------------------===== seqId [Optional] =====-------------------------------------------
# Description: Offset: 8b, Width: 8b, Sequence Index, valid number: 0-15
seqId: 0
# -----------------------------------------===== reserved [Optional] =====------------------------------------------
# Description: Offset: 16b, Width: 16b, N/A
reserved: 0
# ---------------------------------------===== lutCustomSeq_1 [Optional] =====----------------------------------------
# Description: Offset: 0x00000184, Width: 32b; [0x180-0x1af] Customizable LUT Sequences
lutCustomSeq_1:
# ------------------------------------------===== seqNum [Optional] =====-------------------------------------------
# Description: Offset: 0b, Width: 8b, Sequence Number, valid number: 1-16
seqNum: 0
# -------------------------------------------===== seqId [Optional] =====-------------------------------------------
# Description: Offset: 8b, Width: 8b, Sequence Index, valid number: 0-15
seqId: 0
# -----------------------------------------===== reserved [Optional] =====------------------------------------------
# Description: Offset: 16b, Width: 16b, N/A
reserved: 0
# ---------------------------------------===== lutCustomSeq_2 [Optional] =====----------------------------------------
# Description: Offset: 0x00000188, Width: 32b; [0x180-0x1af] Customizable LUT Sequences
lutCustomSeq_2:
# ------------------------------------------===== seqNum [Optional] =====-------------------------------------------
# Description: Offset: 0b, Width: 8b, Sequence Number, valid number: 1-16
seqNum: 0
# -------------------------------------------===== seqId [Optional] =====-------------------------------------------
# Description: Offset: 8b, Width: 8b, Sequence Index, valid number: 0-15
seqId: 0
# -----------------------------------------===== reserved [Optional] =====------------------------------------------
# Description: Offset: 16b, Width: 16b, N/A
reserved: 0
# ---------------------------------------===== lutCustomSeq_3 [Optional] =====----------------------------------------
# Description: Offset: 0x0000018C, Width: 32b; [0x180-0x1af] Customizable LUT Sequences
lutCustomSeq_3:
# ------------------------------------------===== seqNum [Optional] =====-------------------------------------------
# Description: Offset: 0b, Width: 8b, Sequence Number, valid number: 1-16
seqNum: 0
# -------------------------------------------===== seqId [Optional] =====-------------------------------------------
# Description: Offset: 8b, Width: 8b, Sequence Index, valid number: 0-15
seqId: 0
# -----------------------------------------===== reserved [Optional] =====------------------------------------------
# Description: Offset: 16b, Width: 16b, N/A
reserved: 0
# ---------------------------------------===== lutCustomSeq_4 [Optional] =====----------------------------------------
# Description: Offset: 0x00000190, Width: 32b; [0x180-0x1af] Customizable LUT Sequences
lutCustomSeq_4:
# ------------------------------------------===== seqNum [Optional] =====-------------------------------------------
# Description: Offset: 0b, Width: 8b, Sequence Number, valid number: 1-16
seqNum: 0
# -------------------------------------------===== seqId [Optional] =====-------------------------------------------
# Description: Offset: 8b, Width: 8b, Sequence Index, valid number: 0-15
seqId: 0
# -----------------------------------------===== reserved [Optional] =====------------------------------------------
# Description: Offset: 16b, Width: 16b, N/A
reserved: 0
# ---------------------------------------===== lutCustomSeq_5 [Optional] =====----------------------------------------
# Description: Offset: 0x00000194, Width: 32b; [0x180-0x1af] Customizable LUT Sequences
lutCustomSeq_5:
# ------------------------------------------===== seqNum [Optional] =====-------------------------------------------
# Description: Offset: 0b, Width: 8b, Sequence Number, valid number: 1-16
seqNum: 0
# -------------------------------------------===== seqId [Optional] =====-------------------------------------------
# Description: Offset: 8b, Width: 8b, Sequence Index, valid number: 0-15
seqId: 0
# -----------------------------------------===== reserved [Optional] =====------------------------------------------
# Description: Offset: 16b, Width: 16b, N/A
reserved: 0
# ---------------------------------------===== lutCustomSeq_6 [Optional] =====----------------------------------------
# Description: Offset: 0x00000198, Width: 32b; [0x180-0x1af] Customizable LUT Sequences
lutCustomSeq_6:
# ------------------------------------------===== seqNum [Optional] =====-------------------------------------------
# Description: Offset: 0b, Width: 8b, Sequence Number, valid number: 1-16
seqNum: 0
# -------------------------------------------===== seqId [Optional] =====-------------------------------------------
# Description: Offset: 8b, Width: 8b, Sequence Index, valid number: 0-15
seqId: 0
# -----------------------------------------===== reserved [Optional] =====------------------------------------------
# Description: Offset: 16b, Width: 16b, N/A
reserved: 0
# ---------------------------------------===== lutCustomSeq_7 [Optional] =====----------------------------------------
# Description: Offset: 0x0000019C, Width: 32b; [0x180-0x1af] Customizable LUT Sequences
lutCustomSeq_7:
# ------------------------------------------===== seqNum [Optional] =====-------------------------------------------
# Description: Offset: 0b, Width: 8b, Sequence Number, valid number: 1-16
seqNum: 0
# -------------------------------------------===== seqId [Optional] =====-------------------------------------------
# Description: Offset: 8b, Width: 8b, Sequence Index, valid number: 0-15
seqId: 0
# -----------------------------------------===== reserved [Optional] =====------------------------------------------
# Description: Offset: 16b, Width: 16b, N/A
reserved: 0
# ---------------------------------------===== lutCustomSeq_8 [Optional] =====----------------------------------------
# Description: Offset: 0x000001A0, Width: 32b; [0x180-0x1af] Customizable LUT Sequences
lutCustomSeq_8:
# ------------------------------------------===== seqNum [Optional] =====-------------------------------------------
# Description: Offset: 0b, Width: 8b, Sequence Number, valid number: 1-16
seqNum: 0
# -------------------------------------------===== seqId [Optional] =====-------------------------------------------
# Description: Offset: 8b, Width: 8b, Sequence Index, valid number: 0-15
seqId: 0
# -----------------------------------------===== reserved [Optional] =====------------------------------------------
# Description: Offset: 16b, Width: 16b, N/A
reserved: 0
# ---------------------------------------===== lutCustomSeq_9 [Optional] =====----------------------------------------
# Description: Offset: 0x000001A4, Width: 32b; [0x180-0x1af] Customizable LUT Sequences
lutCustomSeq_9:
# ------------------------------------------===== seqNum [Optional] =====-------------------------------------------
# Description: Offset: 0b, Width: 8b, Sequence Number, valid number: 1-16
seqNum: 0
# -------------------------------------------===== seqId [Optional] =====-------------------------------------------
# Description: Offset: 8b, Width: 8b, Sequence Index, valid number: 0-15
seqId: 0
# -----------------------------------------===== reserved [Optional] =====------------------------------------------
# Description: Offset: 16b, Width: 16b, N/A
reserved: 0
# ---------------------------------------===== lutCustomSeq_10 [Optional] =====---------------------------------------
# Description: Offset: 0x000001A8, Width: 32b; [0x180-0x1af] Customizable LUT Sequences
lutCustomSeq_10:
# ------------------------------------------===== seqNum [Optional] =====-------------------------------------------
# Description: Offset: 0b, Width: 8b, Sequence Number, valid number: 1-16
seqNum: 0
# -------------------------------------------===== seqId [Optional] =====-------------------------------------------
# Description: Offset: 8b, Width: 8b, Sequence Index, valid number: 0-15
seqId: 0
# -----------------------------------------===== reserved [Optional] =====------------------------------------------
# Description: Offset: 16b, Width: 16b, N/A
reserved: 0
# ---------------------------------------===== lutCustomSeq_11 [Optional] =====---------------------------------------
# Description: Offset: 0x000001AC, Width: 32b; [0x180-0x1af] Customizable LUT Sequences
lutCustomSeq_11:
# ------------------------------------------===== seqNum [Optional] =====-------------------------------------------
# Description: Offset: 0b, Width: 8b, Sequence Number, valid number: 1-16
seqNum: 0
# -------------------------------------------===== seqId [Optional] =====-------------------------------------------
# Description: Offset: 8b, Width: 8b, Sequence Index, valid number: 0-15
seqId: 0
# -----------------------------------------===== reserved [Optional] =====------------------------------------------
# Description: Offset: 16b, Width: 16b, N/A
reserved: 0
# -----------------------------------------===== reserved4_0 [Optional] =====-----------------------------------------
# Description: Offset: 0x000001B0, Width: 32b; [0x1b0-0x1bf] Reserved for future use
reserved4_0: '0x00000000'
# -----------------------------------------===== reserved4_1 [Optional] =====-----------------------------------------
# Description: Offset: 0x000001B4, Width: 32b; [0x1b0-0x1bf] Reserved for future use
reserved4_1: '0x00000000'
# -----------------------------------------===== reserved4_2 [Optional] =====-----------------------------------------
# Description: Offset: 0x000001B8, Width: 32b; [0x1b0-0x1bf] Reserved for future use
reserved4_2: '0x00000000'
# -----------------------------------------===== reserved4_3 [Optional] =====-----------------------------------------
# Description: Offset: 0x000001BC, Width: 32b; [0x1b0-0x1bf] Reserved for future use
reserved4_3: '0x00000000'
# ------------------------------------------===== pageSize [Optional] =====-------------------------------------------
# Description: Offset: 0x000001C0, Width: 32b; Page size of Serial NOR
pageSize: '0x00000000'
# -----------------------------------------===== sectorSize [Optional] =====------------------------------------------
# Description: Offset: 0x000001C4, Width: 32b; Sector size of Serial NOR
sectorSize: '0x00000000'
# -------------------------------------===== ipcmdSerialClkFreq [Optional] =====--------------------------------------
# Description: Offset: 0x000001C8, Width: 8b; Clock frequency for IP command
ipcmdSerialClkFreq: '0x00'
# -------------------------------------===== isUniformBlockSize [Optional] =====--------------------------------------
# Description: Offset: 0x000001C9, Width: 8b; Sector/Block size is the same
isUniformBlockSize: '0x00'
# -------------------------------------===== isDataOrderSwapped [Optional] =====--------------------------------------
# Description: Offset: 0x000001CA, Width: 8b; Data order (D0, D1, D2, D3) is swapped (D1,D0, D3, D2)
isDataOrderSwapped: '0x00'
# -----------------------------------------===== reserved0_0 [Optional] =====-----------------------------------------
# Description: Offset: 0x000001CB, Width: 8b; Reserved for future use
reserved0_0: '0x00'
# ----------------------------------------===== serialNorType [Optional] =====----------------------------------------
# Description: Offset: 0x000001CC, Width: 8b; Serial NOR Flash type: 0/1/2/3
serialNorType: '0x00'
# --------------------------------------===== needExitNoCmdMode [Optional] =====--------------------------------------
# Description: Offset: 0x000001CD, Width: 8b; Need to exit NoCmd mode before other IP command
needExitNoCmdMode: '0x00'
# ------------------------------------===== halfClkForNonReadCmd [Optional] =====-------------------------------------
# Description: Offset: 0x000001CE, Width: 8b; Half the Serial Clock for non-read command: true/false
halfClkForNonReadCmd: '0x00'
# ------------------------------------===== needRestoreNoCmdMode [Optional] =====-------------------------------------
# Description: Offset: 0x000001CF, Width: 8b; Need to Restore NoCmd mode after IP command execution
needRestoreNoCmdMode: '0x00'
# ------------------------------------------===== blockSize [Optional] =====------------------------------------------
# Description: Offset: 0x000001D0, Width: 32b; Block size
blockSize: '0x00000000'
# ----------------------------------------===== flashStateCtx [Optional] =====----------------------------------------
# Description: Offset: 0x000001D4, Width: 32b; Flash State Context
flashStateCtx: '0x00000000'
# -----------------------------------------===== reserve2_0 [Optional] =====------------------------------------------
# Description: Offset: 0x000001D8, Width: 32b; Reserved for future use
reserve2_0: '0x00000000'
# -----------------------------------------===== reserve2_1 [Optional] =====------------------------------------------
# Description: Offset: 0x000001DC, Width: 32b; Reserved for future use
reserve2_1: '0x00000000'
# -----------------------------------------===== reserve2_2 [Optional] =====------------------------------------------
# Description: Offset: 0x000001E0, Width: 32b; Reserved for future use
reserve2_2: '0x00000000'
# -----------------------------------------===== reserve2_3 [Optional] =====------------------------------------------
# Description: Offset: 0x000001E4, Width: 32b; Reserved for future use
reserve2_3: '0x00000000'
# -----------------------------------------===== reserve2_4 [Optional] =====------------------------------------------
# Description: Offset: 0x000001E8, Width: 32b; Reserved for future use
reserve2_4: '0x00000000'
# -----------------------------------------===== reserve2_5 [Optional] =====------------------------------------------
# Description: Offset: 0x000001EC, Width: 32b; Reserved for future use
reserve2_5: '0x00000000'
# -----------------------------------------===== reserve2_6 [Optional] =====------------------------------------------
# Description: Offset: 0x000001F0, Width: 32b; Reserved for future use
reserve2_6: '0x00000000'
# -----------------------------------------===== reserve2_7 [Optional] =====------------------------------------------
# Description: Offset: 0x000001F4, Width: 32b; Reserved for future use
reserve2_7: '0x00000000'
# -----------------------------------------===== reserve2_8 [Optional] =====------------------------------------------
# Description: Offset: 0x000001F8, Width: 32b; Reserved for future use
reserve2_8: '0x00000000'
# -----------------------------------------===== reserve2_9 [Optional] =====------------------------------------------
# Description: Offset: 0x000001FC, Width: 32b; Reserved for future use
reserve2_9: '0x00000000'
FCB for mcxn947, Revision: a1 and flexspi_nor#
FCB for mcxn947, Revision: a1 and flexspi_nor JSON schema
FCB for mcxn947, Revision: a1 and flexspi_nor YAML configuration template
# ================================== FCB for mcxn947, Revision: a1 and flexspi_nor ===================================
# ======================================================================================================================
# == FCB for mcxn947, Revision: a1 and flexspi_nor ==
# ======================================================================================================================
# -------------------------------------===== The chip family name [Required] =====--------------------------------------
# Description: NXP chip family identifier.
family: CHOOSE_FROM_TABLE
# -----------------------------------------===== MCU revision [Optional] =====------------------------------------------
# Description: Revision of silicon. The 'latest' name, means most current revision.
# Possible options: <a0, a1, latest>
revision: a1
# ------------------------------------------===== Memory type [Required] =====------------------------------------------
# Description: Specify type of memory used by FCB description.
# Possible options: <flexspi_nor>
type: flexspi_nor
# --------------------------------------------===== mcxn947 [Required] =====--------------------------------------------
fcb_settings:
# ---------------------------------------------===== tag [Optional] =====---------------------------------------------
# Description: Offset: 0x00000000, Width: 32b; [0x000-0x003] Tag, fixed value 0x42464346UL
tag: '0x42464346'
# -------------------------------------------===== version [Optional] =====-------------------------------------------
# Description: Offset: 0x00000004, Width: 32b; [0x004-0x007] Version,[31:24] -'V', [23:16] - Major, [15:8] - Minor,
# [7:0] - bugfix
version: '0x56010400'
# ------------------------------------------===== reserved0 [Optional] =====------------------------------------------
# Description: Offset: 0x00000008, Width: 32b; [0x008-0x00b] Reserved for future use
reserved0: '0x00000000'
# --------------------------------------===== readSampleClkSrc [Optional] =====---------------------------------------
# Description: Offset: 0x0000000C, Width: 8b; [0x00c-0x00c] Read Sample Clock Source, valid value: 0/1/3
readSampleClkSrc: '0x00'
# -----------------------------------------===== csHoldTime [Optional] =====------------------------------------------
# Description: Offset: 0x0000000D, Width: 8b; [0x00d-0x00d] CS hold time, default value: 3
csHoldTime: '0x00'
# -----------------------------------------===== csSetupTime [Optional] =====-----------------------------------------
# Description: Offset: 0x0000000E, Width: 8b; [0x00e-0x00e] CS setup time, default value: 3
csSetupTime: '0x00'
# -------------------------------------===== columnAddressWidth [Optional] =====--------------------------------------
# Description: Offset: 0x0000000F, Width: 8b; [0x00f-0x00f] Column Address with, for HyperBus protocol, it is fixed
# to 3, For Serial NAND, need to refer to datasheet
columnAddressWidth: '0x00'
# -------------------------------------===== deviceModeCfgEnable [Optional] =====-------------------------------------
# Description: Offset: 0x00000010, Width: 8b; [0x010-0x010] Device Mode Configure enable flag, 1 - Enable, 0 -
# Disable
deviceModeCfgEnable: '0x00'
# ---------------------------------------===== deviceModeType [Optional] =====----------------------------------------
# Description: Offset: 0x00000011, Width: 8b; [0x011-0x011] Specify the configuration command type:Quad Enable,
# DPI/QPI/OPI switch, Generic configuration, etc.
deviceModeType: '0x00'
# -------------------------------------===== waitTimeCfgCommands [Optional] =====-------------------------------------
# Description: Offset: 0x00000012, Width: 16b; [0x012-0x013] Wait time for all configuration commands, unit: 100us,
# Used for DPI/QPI/OPI switch or reset command
waitTimeCfgCommands: '0x0000'
# ----------------------------------------===== deviceModeSeq [Optional] =====----------------------------------------
# Description: Offset: 0x00000014, Width: 32b; [0x014-0x017] Device mode sequence info, [7:0] - LUT sequence id,
# [15:8] - LUt sequence number, [31:16] Reserved
deviceModeSeq:
# ------------------------------------------===== seqNum [Optional] =====-------------------------------------------
# Description: Offset: 0b, Width: 8b, Sequence Number, valid number: 1-16
seqNum: 0
# -------------------------------------------===== seqId [Optional] =====-------------------------------------------
# Description: Offset: 8b, Width: 8b, Sequence Index, valid number: 0-15
seqId: 0
# -----------------------------------------===== reserved [Optional] =====------------------------------------------
# Description: Offset: 16b, Width: 16b, N/A
reserved: 0
# ----------------------------------------===== deviceModeArg [Optional] =====----------------------------------------
# Description: Offset: 0x00000018, Width: 32b; [0x018-0x01b] Argument/Parameter for device configuration
deviceModeArg: '0x00000000'
# ---------------------------------------===== configCmdEnable [Optional] =====---------------------------------------
# Description: Offset: 0x0000001C, Width: 8b; [0x01c-0x01c] Configure command Enable Flag, 1 - Enable, 0 - Disable
configCmdEnable: '0x00'
# --------------------------------------===== configModeType_0 [Optional] =====---------------------------------------
# Description: Offset: 0x0000001D, Width: 8b; [0x01d-0x01f] Configure Mode Type, similar as deviceModeTpe
configModeType_0: '0x00'
# --------------------------------------===== configModeType_1 [Optional] =====---------------------------------------
# Description: Offset: 0x0000001E, Width: 8b; [0x01d-0x01f] Configure Mode Type, similar as deviceModeTpe
configModeType_1: '0x00'
# --------------------------------------===== configModeType_2 [Optional] =====---------------------------------------
# Description: Offset: 0x0000001F, Width: 8b; [0x01d-0x01f] Configure Mode Type, similar as deviceModeTpe
configModeType_2: '0x00'
# ---------------------------------------===== configCmdSeqs_0 [Optional] =====---------------------------------------
# Description: Offset: 0x00000020, Width: 32b; [0x020-0x02b] Sequence info for Device Configuration command, similar
# as deviceModeSeq
configCmdSeqs_0:
# ------------------------------------------===== seqNum [Optional] =====-------------------------------------------
# Description: Offset: 0b, Width: 8b, Sequence Number, valid number: 1-16
seqNum: 0
# -------------------------------------------===== seqId [Optional] =====-------------------------------------------
# Description: Offset: 8b, Width: 8b, Sequence Index, valid number: 0-15
seqId: 0
# -----------------------------------------===== reserved [Optional] =====------------------------------------------
# Description: Offset: 16b, Width: 16b, N/A
reserved: 0
# ---------------------------------------===== configCmdSeqs_1 [Optional] =====---------------------------------------
# Description: Offset: 0x00000024, Width: 32b; [0x020-0x02b] Sequence info for Device Configuration command, similar
# as deviceModeSeq
configCmdSeqs_1:
# ------------------------------------------===== seqNum [Optional] =====-------------------------------------------
# Description: Offset: 0b, Width: 8b, Sequence Number, valid number: 1-16
seqNum: 0
# -------------------------------------------===== seqId [Optional] =====-------------------------------------------
# Description: Offset: 8b, Width: 8b, Sequence Index, valid number: 0-15
seqId: 0
# -----------------------------------------===== reserved [Optional] =====------------------------------------------
# Description: Offset: 16b, Width: 16b, N/A
reserved: 0
# ---------------------------------------===== configCmdSeqs_2 [Optional] =====---------------------------------------
# Description: Offset: 0x00000028, Width: 32b; [0x020-0x02b] Sequence info for Device Configuration command, similar
# as deviceModeSeq
configCmdSeqs_2:
# ------------------------------------------===== seqNum [Optional] =====-------------------------------------------
# Description: Offset: 0b, Width: 8b, Sequence Number, valid number: 1-16
seqNum: 0
# -------------------------------------------===== seqId [Optional] =====-------------------------------------------
# Description: Offset: 8b, Width: 8b, Sequence Index, valid number: 0-15
seqId: 0
# -----------------------------------------===== reserved [Optional] =====------------------------------------------
# Description: Offset: 16b, Width: 16b, N/A
reserved: 0
# ------------------------------------------===== reserved1 [Optional] =====------------------------------------------
# Description: Offset: 0x0000002C, Width: 32b; [0x02c-0x02f] Reserved for future use
reserved1: '0x00000000'
# ---------------------------------------===== configCmdArgs_0 [Optional] =====---------------------------------------
# Description: Offset: 0x00000030, Width: 32b; [0x030-0x03b] Arguments/Parameters for device Configuration commands
configCmdArgs_0: '0x00000000'
# ---------------------------------------===== configCmdArgs_1 [Optional] =====---------------------------------------
# Description: Offset: 0x00000034, Width: 32b; [0x030-0x03b] Arguments/Parameters for device Configuration commands
configCmdArgs_1: '0x00000000'
# ---------------------------------------===== configCmdArgs_2 [Optional] =====---------------------------------------
# Description: Offset: 0x00000038, Width: 32b; [0x030-0x03b] Arguments/Parameters for device Configuration commands
configCmdArgs_2: '0x00000000'
# ------------------------------------------===== reserved2 [Optional] =====------------------------------------------
# Description: Offset: 0x0000003C, Width: 32b; [0x03c-0x03f] Reserved for future use
reserved2: '0x00000000'
# ------------------------------------===== controllerMiscOption [Optional] =====-------------------------------------
# Description: Offset: 0x00000040, Width: 32b; [0x040-0x043] Controller Misc Options, see Misc feature bit
# definitions for more details
controllerMiscOption: '0x00000000'
# -----------------------------------------===== deviceType [Optional] =====------------------------------------------
# Description: Offset: 0x00000044, Width: 8b; [0x044-0x044] Device Type: See Flash Type Definition for more details
deviceType: '0x00'
# ----------------------------------------===== sflashPadType [Optional] =====----------------------------------------
# Description: Offset: 0x00000045, Width: 8b; [0x045-0x045] Serial Flash Pad Type: 1 - Single, 2 - Dual, 4 - Quad, 8
# - Octal
sflashPadType: '0x00'
# ----------------------------------------===== serialClkFreq [Optional] =====----------------------------------------
# Description: Offset: 0x00000046, Width: 8b; [0x046-0x046] Serial Flash Frequency, device specific definitions, See
# System Boot Chapter for more details
serialClkFreq: '0x00'
# -------------------------------------===== lutCustomSeqEnable [Optional] =====--------------------------------------
# Description: Offset: 0x00000047, Width: 8b; [0x047-0x047] LUT customization Enable, it is required if the
# program/erase cannot be done using 1 LUT sequence, currently, only applicable to HyperFLASH
lutCustomSeqEnable: '0x00'
# -----------------------------------------===== reserved3_0 [Optional] =====-----------------------------------------
# Description: Offset: 0x00000048, Width: 32b; [0x048-0x04f] Reserved for future use
reserved3_0: '0x00000000'
# -----------------------------------------===== reserved3_1 [Optional] =====-----------------------------------------
# Description: Offset: 0x0000004C, Width: 32b; [0x048-0x04f] Reserved for future use
reserved3_1: '0x00000000'
# ----------------------------------------===== sflashA1Size [Optional] =====-----------------------------------------
# Description: Offset: 0x00000050, Width: 32b; [0x050-0x053] Size of Flash connected to A1
sflashA1Size: '0x00000000'
# ----------------------------------------===== sflashA2Size [Optional] =====-----------------------------------------
# Description: Offset: 0x00000054, Width: 32b; [0x054-0x057] Size of Flash connected to A2
sflashA2Size: '0x00000000'
# ----------------------------------------===== sflashB1Size [Optional] =====-----------------------------------------
# Description: Offset: 0x00000058, Width: 32b; [0x058-0x05b] Size of Flash connected to B1
sflashB1Size: '0x00000000'
# ----------------------------------------===== sflashB2Size [Optional] =====-----------------------------------------
# Description: Offset: 0x0000005C, Width: 32b; [0x05c-0x05f] Size of Flash connected to B2
sflashB2Size: '0x00000000'
# ------------------------------------===== csPadSettingOverride [Optional] =====-------------------------------------
# Description: Offset: 0x00000060, Width: 32b; [0x060-0x063] CS pad setting override value
csPadSettingOverride: '0x00000000'
# -----------------------------------===== sclkPadSettingOverride [Optional] =====------------------------------------
# Description: Offset: 0x00000064, Width: 32b; [0x064-0x067] SCK pad setting override value
sclkPadSettingOverride: '0x00000000'
# -----------------------------------===== dataPadSettingOverride [Optional] =====------------------------------------
# Description: Offset: 0x00000068, Width: 32b; [0x068-0x06b] data pad setting override value
dataPadSettingOverride: '0x00000000'
# ------------------------------------===== dqsPadSettingOverride [Optional] =====------------------------------------
# Description: Offset: 0x0000006C, Width: 32b; [0x06c-0x06f] DQS pad setting override value
dqsPadSettingOverride: '0x00000000'
# -----------------------------------------===== timeoutInMs [Optional] =====-----------------------------------------
# Description: Offset: 0x00000070, Width: 32b; [0x070-0x073] Timeout threshold for read status command
timeoutInMs: '0x00000000'
# ---------------------------------------===== commandInterval [Optional] =====---------------------------------------
# Description: Offset: 0x00000074, Width: 32b; [0x074-0x077] CS deselect interval between two commands
commandInterval: '0x00000000'
# ---------------------------------------===== dataValidTime_0 [Optional] =====---------------------------------------
# Description: Offset: 0x00000078, Width: 16b; [0x078-0x07b] CLK edge to data valid time for PORT A and PORT B
dataValidTime_0: '0x0000'
# ---------------------------------------===== dataValidTime_1 [Optional] =====---------------------------------------
# Description: Offset: 0x0000007A, Width: 16b; [0x078-0x07b] CLK edge to data valid time for PORT A and PORT B
dataValidTime_1: '0x0000'
# -----------------------------------------===== busyOffset [Optional] =====------------------------------------------
# Description: Offset: 0x0000007C, Width: 16b; [0x07c-0x07d] Busy offset, valid value: 0-31
busyOffset: '0x0000'
# ---------------------------------------===== busyBitPolarity [Optional] =====---------------------------------------
# Description: Offset: 0x0000007E, Width: 16b; [0x07e-0x07f] Busy flag polarity, 0 - busy flag is 1 when flash device
# is busy, 1 - busy flag is 0 when flash device is busy
busyBitPolarity: '0x0000'
# -----------------------------------===== lookupTable_seq0_instr0 [Optional] =====-----------------------------------
# Description: Offset: 0x00000080, Width: 16b; Lookup table holds Flash command sequences 0, instruction 0
lookupTable_seq0_instr0:
# ------------------------------------------===== OPERAND [Optional] =====------------------------------------------
# Description: Offset: 0b, Width: 8b, Instruction operand. Its values depends on used instruction
OPERAND: 0
# -----------------------------------------===== NUM_PADS [Optional] =====------------------------------------------
# Description: Offset: 8b, Width: 2b, Number of pads used by instruction. Some instructions ignores this parameter.
# - 1PAD, (0): Single mode. One pad is used.
# - 2PAD, (1): Dual mode. Two pads are used.
# - 4PAD, (2): Quad mode. Four pads are used.
# - 8PAD, (3): Octal mode. Eight pads are used.
# Possible options: <1PAD, 2PAD, 4PAD, 8PAD>
NUM_PADS: 1PAD
# --------------------------------------===== OPERATION_CODE [Optional] =====---------------------------------------
# Description: Offset: 10b, Width: 6b, Instruction operation code.
# - STOP, (0): Stop execution and de-assert CS. Then, the next command sequence (to the same flash device) starts
# from instruction pointer 0.
# - CMD_SDR, (1): Transmit command code to Flash.
# - RADDR_SDR, (2): Transmit row address to Flash.
# - CADDR_SDR, (3): Transmit column address to Flash.
# - MODE1_SDR, (4): Transmit mode bits to Flash.
# - MODE2_SDR, (5): Transmit mode bits to Flash.
# - MODE4_SDR, (6): Transmit mode bits to Flash.
# - MODE8_SDR, (7): Transmit mode bits to Flash.
# - WRITE_SDR, (8): Transmit program data to Flash device.
# - READ_SDR, (9): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_SDR, (10): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_SDR, (11): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_SDR, (12): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_SDR, (13): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# - JMP_ON_CS, (31): Stop execution, de-assert CS and save operand[7:0] as the instruction start pointer for next
# sequence.Normally this instruction is used to support Execute-In-Place enhanced mode. See XIP enhanced mode for
# more details.This instruction is only allowed for AHB read commands. There is interrupt status bit set
# (INTR[IPCMDERR] or INTR[AHBCMDERR]) when using this instruction in IP command or AHB write command.
# - CMD_DDR, (33): Transmit command code to Flash.
# - RADDR_DDR, (34): Transmit row address to Flash.
# - CADDR_DDR, (35): Transmit column address to Flash.
# - MODE1_DDR, (36): Transmit mode bits to Flash.
# - MODE2_DDR, (37): Transmit mode bits to Flash.
# - MODE4_DDR, (38): Transmit mode bits to Flash.
# - MODE8_DDR, (39): Transmit mode bits to Flash.
# - WRITE_DDR, (40): Transmit program data to Flash device.
# - READ_DDR, (41): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_DDR, (42): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_DDR, (43): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_DDR, (44): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_DDR, (45): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# Possible options: <STOP, CMD_SDR, RADDR_SDR, CADDR_SDR, MODE1_SDR, MODE2_SDR, MODE4_SDR, MODE8_SDR, WRITE_SDR,
# READ_SDR, LEARN_SDR, DATSZ_SDR, DUMMY_SDR, DUMMY_RWDS_SDR, JMP_ON_CS, CMD_DDR, RADDR_DDR, CADDR_DDR, MODE1_DDR,
# MODE2_DDR, MODE4_DDR, MODE8_DDR, WRITE_DDR, READ_DDR, LEARN_DDR, DATSZ_DDR, DUMMY_DDR, DUMMY_RWDS_DDR>
OPERATION_CODE: STOP
lookupTable_seq0_instr1:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq0_instr2:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq0_instr3:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq0_instr4:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq0_instr5:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq0_instr6:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq0_instr7:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
# -----------------------------------===== lookupTable_seq1_instr0 [Optional] =====-----------------------------------
# Description: Offset: 0x00000090, Width: 16b; Lookup table holds Flash command sequences 1, instruction 0
lookupTable_seq1_instr0:
# ------------------------------------------===== OPERAND [Optional] =====------------------------------------------
# Description: Offset: 0b, Width: 8b, Instruction operand. Its values depends on used instruction
OPERAND: 0
# -----------------------------------------===== NUM_PADS [Optional] =====------------------------------------------
# Description: Offset: 8b, Width: 2b, Number of pads used by instruction. Some instructions ignores this parameter.
# - 1PAD, (0): Single mode. One pad is used.
# - 2PAD, (1): Dual mode. Two pads are used.
# - 4PAD, (2): Quad mode. Four pads are used.
# - 8PAD, (3): Octal mode. Eight pads are used.
# Possible options: <1PAD, 2PAD, 4PAD, 8PAD>
NUM_PADS: 1PAD
# --------------------------------------===== OPERATION_CODE [Optional] =====---------------------------------------
# Description: Offset: 10b, Width: 6b, Instruction operation code.
# - STOP, (0): Stop execution and de-assert CS. Then, the next command sequence (to the same flash device) starts
# from instruction pointer 0.
# - CMD_SDR, (1): Transmit command code to Flash.
# - RADDR_SDR, (2): Transmit row address to Flash.
# - CADDR_SDR, (3): Transmit column address to Flash.
# - MODE1_SDR, (4): Transmit mode bits to Flash.
# - MODE2_SDR, (5): Transmit mode bits to Flash.
# - MODE4_SDR, (6): Transmit mode bits to Flash.
# - MODE8_SDR, (7): Transmit mode bits to Flash.
# - WRITE_SDR, (8): Transmit program data to Flash device.
# - READ_SDR, (9): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_SDR, (10): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_SDR, (11): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_SDR, (12): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_SDR, (13): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# - JMP_ON_CS, (31): Stop execution, de-assert CS and save operand[7:0] as the instruction start pointer for next
# sequence.Normally this instruction is used to support Execute-In-Place enhanced mode. See XIP enhanced mode for
# more details.This instruction is only allowed for AHB read commands. There is interrupt status bit set
# (INTR[IPCMDERR] or INTR[AHBCMDERR]) when using this instruction in IP command or AHB write command.
# - CMD_DDR, (33): Transmit command code to Flash.
# - RADDR_DDR, (34): Transmit row address to Flash.
# - CADDR_DDR, (35): Transmit column address to Flash.
# - MODE1_DDR, (36): Transmit mode bits to Flash.
# - MODE2_DDR, (37): Transmit mode bits to Flash.
# - MODE4_DDR, (38): Transmit mode bits to Flash.
# - MODE8_DDR, (39): Transmit mode bits to Flash.
# - WRITE_DDR, (40): Transmit program data to Flash device.
# - READ_DDR, (41): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_DDR, (42): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_DDR, (43): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_DDR, (44): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_DDR, (45): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# Possible options: <STOP, CMD_SDR, RADDR_SDR, CADDR_SDR, MODE1_SDR, MODE2_SDR, MODE4_SDR, MODE8_SDR, WRITE_SDR,
# READ_SDR, LEARN_SDR, DATSZ_SDR, DUMMY_SDR, DUMMY_RWDS_SDR, JMP_ON_CS, CMD_DDR, RADDR_DDR, CADDR_DDR, MODE1_DDR,
# MODE2_DDR, MODE4_DDR, MODE8_DDR, WRITE_DDR, READ_DDR, LEARN_DDR, DATSZ_DDR, DUMMY_DDR, DUMMY_RWDS_DDR>
OPERATION_CODE: STOP
lookupTable_seq1_instr1:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq1_instr2:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq1_instr3:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq1_instr4:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq1_instr5:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq1_instr6:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq1_instr7:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
# -----------------------------------===== lookupTable_seq2_instr0 [Optional] =====-----------------------------------
# Description: Offset: 0x000000A0, Width: 16b; Lookup table holds Flash command sequences 2, instruction 0
lookupTable_seq2_instr0:
# ------------------------------------------===== OPERAND [Optional] =====------------------------------------------
# Description: Offset: 0b, Width: 8b, Instruction operand. Its values depends on used instruction
OPERAND: 0
# -----------------------------------------===== NUM_PADS [Optional] =====------------------------------------------
# Description: Offset: 8b, Width: 2b, Number of pads used by instruction. Some instructions ignores this parameter.
# - 1PAD, (0): Single mode. One pad is used.
# - 2PAD, (1): Dual mode. Two pads are used.
# - 4PAD, (2): Quad mode. Four pads are used.
# - 8PAD, (3): Octal mode. Eight pads are used.
# Possible options: <1PAD, 2PAD, 4PAD, 8PAD>
NUM_PADS: 1PAD
# --------------------------------------===== OPERATION_CODE [Optional] =====---------------------------------------
# Description: Offset: 10b, Width: 6b, Instruction operation code.
# - STOP, (0): Stop execution and de-assert CS. Then, the next command sequence (to the same flash device) starts
# from instruction pointer 0.
# - CMD_SDR, (1): Transmit command code to Flash.
# - RADDR_SDR, (2): Transmit row address to Flash.
# - CADDR_SDR, (3): Transmit column address to Flash.
# - MODE1_SDR, (4): Transmit mode bits to Flash.
# - MODE2_SDR, (5): Transmit mode bits to Flash.
# - MODE4_SDR, (6): Transmit mode bits to Flash.
# - MODE8_SDR, (7): Transmit mode bits to Flash.
# - WRITE_SDR, (8): Transmit program data to Flash device.
# - READ_SDR, (9): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_SDR, (10): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_SDR, (11): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_SDR, (12): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_SDR, (13): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# - JMP_ON_CS, (31): Stop execution, de-assert CS and save operand[7:0] as the instruction start pointer for next
# sequence.Normally this instruction is used to support Execute-In-Place enhanced mode. See XIP enhanced mode for
# more details.This instruction is only allowed for AHB read commands. There is interrupt status bit set
# (INTR[IPCMDERR] or INTR[AHBCMDERR]) when using this instruction in IP command or AHB write command.
# - CMD_DDR, (33): Transmit command code to Flash.
# - RADDR_DDR, (34): Transmit row address to Flash.
# - CADDR_DDR, (35): Transmit column address to Flash.
# - MODE1_DDR, (36): Transmit mode bits to Flash.
# - MODE2_DDR, (37): Transmit mode bits to Flash.
# - MODE4_DDR, (38): Transmit mode bits to Flash.
# - MODE8_DDR, (39): Transmit mode bits to Flash.
# - WRITE_DDR, (40): Transmit program data to Flash device.
# - READ_DDR, (41): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_DDR, (42): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_DDR, (43): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_DDR, (44): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_DDR, (45): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# Possible options: <STOP, CMD_SDR, RADDR_SDR, CADDR_SDR, MODE1_SDR, MODE2_SDR, MODE4_SDR, MODE8_SDR, WRITE_SDR,
# READ_SDR, LEARN_SDR, DATSZ_SDR, DUMMY_SDR, DUMMY_RWDS_SDR, JMP_ON_CS, CMD_DDR, RADDR_DDR, CADDR_DDR, MODE1_DDR,
# MODE2_DDR, MODE4_DDR, MODE8_DDR, WRITE_DDR, READ_DDR, LEARN_DDR, DATSZ_DDR, DUMMY_DDR, DUMMY_RWDS_DDR>
OPERATION_CODE: STOP
lookupTable_seq2_instr1:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq2_instr2:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq2_instr3:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq2_instr4:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq2_instr5:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq2_instr6:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq2_instr7:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
# -----------------------------------===== lookupTable_seq3_instr0 [Optional] =====-----------------------------------
# Description: Offset: 0x000000B0, Width: 16b; Lookup table holds Flash command sequences 3, instruction 0
lookupTable_seq3_instr0:
# ------------------------------------------===== OPERAND [Optional] =====------------------------------------------
# Description: Offset: 0b, Width: 8b, Instruction operand. Its values depends on used instruction
OPERAND: 0
# -----------------------------------------===== NUM_PADS [Optional] =====------------------------------------------
# Description: Offset: 8b, Width: 2b, Number of pads used by instruction. Some instructions ignores this parameter.
# - 1PAD, (0): Single mode. One pad is used.
# - 2PAD, (1): Dual mode. Two pads are used.
# - 4PAD, (2): Quad mode. Four pads are used.
# - 8PAD, (3): Octal mode. Eight pads are used.
# Possible options: <1PAD, 2PAD, 4PAD, 8PAD>
NUM_PADS: 1PAD
# --------------------------------------===== OPERATION_CODE [Optional] =====---------------------------------------
# Description: Offset: 10b, Width: 6b, Instruction operation code.
# - STOP, (0): Stop execution and de-assert CS. Then, the next command sequence (to the same flash device) starts
# from instruction pointer 0.
# - CMD_SDR, (1): Transmit command code to Flash.
# - RADDR_SDR, (2): Transmit row address to Flash.
# - CADDR_SDR, (3): Transmit column address to Flash.
# - MODE1_SDR, (4): Transmit mode bits to Flash.
# - MODE2_SDR, (5): Transmit mode bits to Flash.
# - MODE4_SDR, (6): Transmit mode bits to Flash.
# - MODE8_SDR, (7): Transmit mode bits to Flash.
# - WRITE_SDR, (8): Transmit program data to Flash device.
# - READ_SDR, (9): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_SDR, (10): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_SDR, (11): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_SDR, (12): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_SDR, (13): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# - JMP_ON_CS, (31): Stop execution, de-assert CS and save operand[7:0] as the instruction start pointer for next
# sequence.Normally this instruction is used to support Execute-In-Place enhanced mode. See XIP enhanced mode for
# more details.This instruction is only allowed for AHB read commands. There is interrupt status bit set
# (INTR[IPCMDERR] or INTR[AHBCMDERR]) when using this instruction in IP command or AHB write command.
# - CMD_DDR, (33): Transmit command code to Flash.
# - RADDR_DDR, (34): Transmit row address to Flash.
# - CADDR_DDR, (35): Transmit column address to Flash.
# - MODE1_DDR, (36): Transmit mode bits to Flash.
# - MODE2_DDR, (37): Transmit mode bits to Flash.
# - MODE4_DDR, (38): Transmit mode bits to Flash.
# - MODE8_DDR, (39): Transmit mode bits to Flash.
# - WRITE_DDR, (40): Transmit program data to Flash device.
# - READ_DDR, (41): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_DDR, (42): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_DDR, (43): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_DDR, (44): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_DDR, (45): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# Possible options: <STOP, CMD_SDR, RADDR_SDR, CADDR_SDR, MODE1_SDR, MODE2_SDR, MODE4_SDR, MODE8_SDR, WRITE_SDR,
# READ_SDR, LEARN_SDR, DATSZ_SDR, DUMMY_SDR, DUMMY_RWDS_SDR, JMP_ON_CS, CMD_DDR, RADDR_DDR, CADDR_DDR, MODE1_DDR,
# MODE2_DDR, MODE4_DDR, MODE8_DDR, WRITE_DDR, READ_DDR, LEARN_DDR, DATSZ_DDR, DUMMY_DDR, DUMMY_RWDS_DDR>
OPERATION_CODE: STOP
lookupTable_seq3_instr1:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq3_instr2:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq3_instr3:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq3_instr4:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq3_instr5:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq3_instr6:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq3_instr7:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
# -----------------------------------===== lookupTable_seq4_instr0 [Optional] =====-----------------------------------
# Description: Offset: 0x000000C0, Width: 16b; Lookup table holds Flash command sequences 4, instruction 0
lookupTable_seq4_instr0:
# ------------------------------------------===== OPERAND [Optional] =====------------------------------------------
# Description: Offset: 0b, Width: 8b, Instruction operand. Its values depends on used instruction
OPERAND: 0
# -----------------------------------------===== NUM_PADS [Optional] =====------------------------------------------
# Description: Offset: 8b, Width: 2b, Number of pads used by instruction. Some instructions ignores this parameter.
# - 1PAD, (0): Single mode. One pad is used.
# - 2PAD, (1): Dual mode. Two pads are used.
# - 4PAD, (2): Quad mode. Four pads are used.
# - 8PAD, (3): Octal mode. Eight pads are used.
# Possible options: <1PAD, 2PAD, 4PAD, 8PAD>
NUM_PADS: 1PAD
# --------------------------------------===== OPERATION_CODE [Optional] =====---------------------------------------
# Description: Offset: 10b, Width: 6b, Instruction operation code.
# - STOP, (0): Stop execution and de-assert CS. Then, the next command sequence (to the same flash device) starts
# from instruction pointer 0.
# - CMD_SDR, (1): Transmit command code to Flash.
# - RADDR_SDR, (2): Transmit row address to Flash.
# - CADDR_SDR, (3): Transmit column address to Flash.
# - MODE1_SDR, (4): Transmit mode bits to Flash.
# - MODE2_SDR, (5): Transmit mode bits to Flash.
# - MODE4_SDR, (6): Transmit mode bits to Flash.
# - MODE8_SDR, (7): Transmit mode bits to Flash.
# - WRITE_SDR, (8): Transmit program data to Flash device.
# - READ_SDR, (9): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_SDR, (10): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_SDR, (11): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_SDR, (12): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_SDR, (13): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# - JMP_ON_CS, (31): Stop execution, de-assert CS and save operand[7:0] as the instruction start pointer for next
# sequence.Normally this instruction is used to support Execute-In-Place enhanced mode. See XIP enhanced mode for
# more details.This instruction is only allowed for AHB read commands. There is interrupt status bit set
# (INTR[IPCMDERR] or INTR[AHBCMDERR]) when using this instruction in IP command or AHB write command.
# - CMD_DDR, (33): Transmit command code to Flash.
# - RADDR_DDR, (34): Transmit row address to Flash.
# - CADDR_DDR, (35): Transmit column address to Flash.
# - MODE1_DDR, (36): Transmit mode bits to Flash.
# - MODE2_DDR, (37): Transmit mode bits to Flash.
# - MODE4_DDR, (38): Transmit mode bits to Flash.
# - MODE8_DDR, (39): Transmit mode bits to Flash.
# - WRITE_DDR, (40): Transmit program data to Flash device.
# - READ_DDR, (41): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_DDR, (42): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_DDR, (43): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_DDR, (44): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_DDR, (45): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# Possible options: <STOP, CMD_SDR, RADDR_SDR, CADDR_SDR, MODE1_SDR, MODE2_SDR, MODE4_SDR, MODE8_SDR, WRITE_SDR,
# READ_SDR, LEARN_SDR, DATSZ_SDR, DUMMY_SDR, DUMMY_RWDS_SDR, JMP_ON_CS, CMD_DDR, RADDR_DDR, CADDR_DDR, MODE1_DDR,
# MODE2_DDR, MODE4_DDR, MODE8_DDR, WRITE_DDR, READ_DDR, LEARN_DDR, DATSZ_DDR, DUMMY_DDR, DUMMY_RWDS_DDR>
OPERATION_CODE: STOP
lookupTable_seq4_instr1:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq4_instr2:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq4_instr3:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq4_instr4:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq4_instr5:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq4_instr6:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq4_instr7:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
# -----------------------------------===== lookupTable_seq5_instr0 [Optional] =====-----------------------------------
# Description: Offset: 0x000000D0, Width: 16b; Lookup table holds Flash command sequences 5, instruction 0
lookupTable_seq5_instr0:
# ------------------------------------------===== OPERAND [Optional] =====------------------------------------------
# Description: Offset: 0b, Width: 8b, Instruction operand. Its values depends on used instruction
OPERAND: 0
# -----------------------------------------===== NUM_PADS [Optional] =====------------------------------------------
# Description: Offset: 8b, Width: 2b, Number of pads used by instruction. Some instructions ignores this parameter.
# - 1PAD, (0): Single mode. One pad is used.
# - 2PAD, (1): Dual mode. Two pads are used.
# - 4PAD, (2): Quad mode. Four pads are used.
# - 8PAD, (3): Octal mode. Eight pads are used.
# Possible options: <1PAD, 2PAD, 4PAD, 8PAD>
NUM_PADS: 1PAD
# --------------------------------------===== OPERATION_CODE [Optional] =====---------------------------------------
# Description: Offset: 10b, Width: 6b, Instruction operation code.
# - STOP, (0): Stop execution and de-assert CS. Then, the next command sequence (to the same flash device) starts
# from instruction pointer 0.
# - CMD_SDR, (1): Transmit command code to Flash.
# - RADDR_SDR, (2): Transmit row address to Flash.
# - CADDR_SDR, (3): Transmit column address to Flash.
# - MODE1_SDR, (4): Transmit mode bits to Flash.
# - MODE2_SDR, (5): Transmit mode bits to Flash.
# - MODE4_SDR, (6): Transmit mode bits to Flash.
# - MODE8_SDR, (7): Transmit mode bits to Flash.
# - WRITE_SDR, (8): Transmit program data to Flash device.
# - READ_SDR, (9): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_SDR, (10): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_SDR, (11): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_SDR, (12): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_SDR, (13): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# - JMP_ON_CS, (31): Stop execution, de-assert CS and save operand[7:0] as the instruction start pointer for next
# sequence.Normally this instruction is used to support Execute-In-Place enhanced mode. See XIP enhanced mode for
# more details.This instruction is only allowed for AHB read commands. There is interrupt status bit set
# (INTR[IPCMDERR] or INTR[AHBCMDERR]) when using this instruction in IP command or AHB write command.
# - CMD_DDR, (33): Transmit command code to Flash.
# - RADDR_DDR, (34): Transmit row address to Flash.
# - CADDR_DDR, (35): Transmit column address to Flash.
# - MODE1_DDR, (36): Transmit mode bits to Flash.
# - MODE2_DDR, (37): Transmit mode bits to Flash.
# - MODE4_DDR, (38): Transmit mode bits to Flash.
# - MODE8_DDR, (39): Transmit mode bits to Flash.
# - WRITE_DDR, (40): Transmit program data to Flash device.
# - READ_DDR, (41): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_DDR, (42): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_DDR, (43): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_DDR, (44): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_DDR, (45): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# Possible options: <STOP, CMD_SDR, RADDR_SDR, CADDR_SDR, MODE1_SDR, MODE2_SDR, MODE4_SDR, MODE8_SDR, WRITE_SDR,
# READ_SDR, LEARN_SDR, DATSZ_SDR, DUMMY_SDR, DUMMY_RWDS_SDR, JMP_ON_CS, CMD_DDR, RADDR_DDR, CADDR_DDR, MODE1_DDR,
# MODE2_DDR, MODE4_DDR, MODE8_DDR, WRITE_DDR, READ_DDR, LEARN_DDR, DATSZ_DDR, DUMMY_DDR, DUMMY_RWDS_DDR>
OPERATION_CODE: STOP
lookupTable_seq5_instr1:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq5_instr2:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq5_instr3:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq5_instr4:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq5_instr5:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq5_instr6:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq5_instr7:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
# -----------------------------------===== lookupTable_seq6_instr0 [Optional] =====-----------------------------------
# Description: Offset: 0x000000E0, Width: 16b; Lookup table holds Flash command sequences 6, instruction 0
lookupTable_seq6_instr0:
# ------------------------------------------===== OPERAND [Optional] =====------------------------------------------
# Description: Offset: 0b, Width: 8b, Instruction operand. Its values depends on used instruction
OPERAND: 0
# -----------------------------------------===== NUM_PADS [Optional] =====------------------------------------------
# Description: Offset: 8b, Width: 2b, Number of pads used by instruction. Some instructions ignores this parameter.
# - 1PAD, (0): Single mode. One pad is used.
# - 2PAD, (1): Dual mode. Two pads are used.
# - 4PAD, (2): Quad mode. Four pads are used.
# - 8PAD, (3): Octal mode. Eight pads are used.
# Possible options: <1PAD, 2PAD, 4PAD, 8PAD>
NUM_PADS: 1PAD
# --------------------------------------===== OPERATION_CODE [Optional] =====---------------------------------------
# Description: Offset: 10b, Width: 6b, Instruction operation code.
# - STOP, (0): Stop execution and de-assert CS. Then, the next command sequence (to the same flash device) starts
# from instruction pointer 0.
# - CMD_SDR, (1): Transmit command code to Flash.
# - RADDR_SDR, (2): Transmit row address to Flash.
# - CADDR_SDR, (3): Transmit column address to Flash.
# - MODE1_SDR, (4): Transmit mode bits to Flash.
# - MODE2_SDR, (5): Transmit mode bits to Flash.
# - MODE4_SDR, (6): Transmit mode bits to Flash.
# - MODE8_SDR, (7): Transmit mode bits to Flash.
# - WRITE_SDR, (8): Transmit program data to Flash device.
# - READ_SDR, (9): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_SDR, (10): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_SDR, (11): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_SDR, (12): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_SDR, (13): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# - JMP_ON_CS, (31): Stop execution, de-assert CS and save operand[7:0] as the instruction start pointer for next
# sequence.Normally this instruction is used to support Execute-In-Place enhanced mode. See XIP enhanced mode for
# more details.This instruction is only allowed for AHB read commands. There is interrupt status bit set
# (INTR[IPCMDERR] or INTR[AHBCMDERR]) when using this instruction in IP command or AHB write command.
# - CMD_DDR, (33): Transmit command code to Flash.
# - RADDR_DDR, (34): Transmit row address to Flash.
# - CADDR_DDR, (35): Transmit column address to Flash.
# - MODE1_DDR, (36): Transmit mode bits to Flash.
# - MODE2_DDR, (37): Transmit mode bits to Flash.
# - MODE4_DDR, (38): Transmit mode bits to Flash.
# - MODE8_DDR, (39): Transmit mode bits to Flash.
# - WRITE_DDR, (40): Transmit program data to Flash device.
# - READ_DDR, (41): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_DDR, (42): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_DDR, (43): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_DDR, (44): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_DDR, (45): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# Possible options: <STOP, CMD_SDR, RADDR_SDR, CADDR_SDR, MODE1_SDR, MODE2_SDR, MODE4_SDR, MODE8_SDR, WRITE_SDR,
# READ_SDR, LEARN_SDR, DATSZ_SDR, DUMMY_SDR, DUMMY_RWDS_SDR, JMP_ON_CS, CMD_DDR, RADDR_DDR, CADDR_DDR, MODE1_DDR,
# MODE2_DDR, MODE4_DDR, MODE8_DDR, WRITE_DDR, READ_DDR, LEARN_DDR, DATSZ_DDR, DUMMY_DDR, DUMMY_RWDS_DDR>
OPERATION_CODE: STOP
lookupTable_seq6_instr1:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq6_instr2:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq6_instr3:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq6_instr4:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq6_instr5:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq6_instr6:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq6_instr7:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
# -----------------------------------===== lookupTable_seq7_instr0 [Optional] =====-----------------------------------
# Description: Offset: 0x000000F0, Width: 16b; Lookup table holds Flash command sequences 7, instruction 0
lookupTable_seq7_instr0:
# ------------------------------------------===== OPERAND [Optional] =====------------------------------------------
# Description: Offset: 0b, Width: 8b, Instruction operand. Its values depends on used instruction
OPERAND: 0
# -----------------------------------------===== NUM_PADS [Optional] =====------------------------------------------
# Description: Offset: 8b, Width: 2b, Number of pads used by instruction. Some instructions ignores this parameter.
# - 1PAD, (0): Single mode. One pad is used.
# - 2PAD, (1): Dual mode. Two pads are used.
# - 4PAD, (2): Quad mode. Four pads are used.
# - 8PAD, (3): Octal mode. Eight pads are used.
# Possible options: <1PAD, 2PAD, 4PAD, 8PAD>
NUM_PADS: 1PAD
# --------------------------------------===== OPERATION_CODE [Optional] =====---------------------------------------
# Description: Offset: 10b, Width: 6b, Instruction operation code.
# - STOP, (0): Stop execution and de-assert CS. Then, the next command sequence (to the same flash device) starts
# from instruction pointer 0.
# - CMD_SDR, (1): Transmit command code to Flash.
# - RADDR_SDR, (2): Transmit row address to Flash.
# - CADDR_SDR, (3): Transmit column address to Flash.
# - MODE1_SDR, (4): Transmit mode bits to Flash.
# - MODE2_SDR, (5): Transmit mode bits to Flash.
# - MODE4_SDR, (6): Transmit mode bits to Flash.
# - MODE8_SDR, (7): Transmit mode bits to Flash.
# - WRITE_SDR, (8): Transmit program data to Flash device.
# - READ_SDR, (9): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_SDR, (10): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_SDR, (11): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_SDR, (12): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_SDR, (13): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# - JMP_ON_CS, (31): Stop execution, de-assert CS and save operand[7:0] as the instruction start pointer for next
# sequence.Normally this instruction is used to support Execute-In-Place enhanced mode. See XIP enhanced mode for
# more details.This instruction is only allowed for AHB read commands. There is interrupt status bit set
# (INTR[IPCMDERR] or INTR[AHBCMDERR]) when using this instruction in IP command or AHB write command.
# - CMD_DDR, (33): Transmit command code to Flash.
# - RADDR_DDR, (34): Transmit row address to Flash.
# - CADDR_DDR, (35): Transmit column address to Flash.
# - MODE1_DDR, (36): Transmit mode bits to Flash.
# - MODE2_DDR, (37): Transmit mode bits to Flash.
# - MODE4_DDR, (38): Transmit mode bits to Flash.
# - MODE8_DDR, (39): Transmit mode bits to Flash.
# - WRITE_DDR, (40): Transmit program data to Flash device.
# - READ_DDR, (41): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_DDR, (42): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_DDR, (43): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_DDR, (44): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_DDR, (45): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# Possible options: <STOP, CMD_SDR, RADDR_SDR, CADDR_SDR, MODE1_SDR, MODE2_SDR, MODE4_SDR, MODE8_SDR, WRITE_SDR,
# READ_SDR, LEARN_SDR, DATSZ_SDR, DUMMY_SDR, DUMMY_RWDS_SDR, JMP_ON_CS, CMD_DDR, RADDR_DDR, CADDR_DDR, MODE1_DDR,
# MODE2_DDR, MODE4_DDR, MODE8_DDR, WRITE_DDR, READ_DDR, LEARN_DDR, DATSZ_DDR, DUMMY_DDR, DUMMY_RWDS_DDR>
OPERATION_CODE: STOP
lookupTable_seq7_instr1:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq7_instr2:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq7_instr3:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq7_instr4:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq7_instr5:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq7_instr6:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq7_instr7:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
# -----------------------------------===== lookupTable_seq8_instr0 [Optional] =====-----------------------------------
# Description: Offset: 0x00000100, Width: 16b; Lookup table holds Flash command sequences 8, instruction 0
lookupTable_seq8_instr0:
# ------------------------------------------===== OPERAND [Optional] =====------------------------------------------
# Description: Offset: 0b, Width: 8b, Instruction operand. Its values depends on used instruction
OPERAND: 0
# -----------------------------------------===== NUM_PADS [Optional] =====------------------------------------------
# Description: Offset: 8b, Width: 2b, Number of pads used by instruction. Some instructions ignores this parameter.
# - 1PAD, (0): Single mode. One pad is used.
# - 2PAD, (1): Dual mode. Two pads are used.
# - 4PAD, (2): Quad mode. Four pads are used.
# - 8PAD, (3): Octal mode. Eight pads are used.
# Possible options: <1PAD, 2PAD, 4PAD, 8PAD>
NUM_PADS: 1PAD
# --------------------------------------===== OPERATION_CODE [Optional] =====---------------------------------------
# Description: Offset: 10b, Width: 6b, Instruction operation code.
# - STOP, (0): Stop execution and de-assert CS. Then, the next command sequence (to the same flash device) starts
# from instruction pointer 0.
# - CMD_SDR, (1): Transmit command code to Flash.
# - RADDR_SDR, (2): Transmit row address to Flash.
# - CADDR_SDR, (3): Transmit column address to Flash.
# - MODE1_SDR, (4): Transmit mode bits to Flash.
# - MODE2_SDR, (5): Transmit mode bits to Flash.
# - MODE4_SDR, (6): Transmit mode bits to Flash.
# - MODE8_SDR, (7): Transmit mode bits to Flash.
# - WRITE_SDR, (8): Transmit program data to Flash device.
# - READ_SDR, (9): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_SDR, (10): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_SDR, (11): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_SDR, (12): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_SDR, (13): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# - JMP_ON_CS, (31): Stop execution, de-assert CS and save operand[7:0] as the instruction start pointer for next
# sequence.Normally this instruction is used to support Execute-In-Place enhanced mode. See XIP enhanced mode for
# more details.This instruction is only allowed for AHB read commands. There is interrupt status bit set
# (INTR[IPCMDERR] or INTR[AHBCMDERR]) when using this instruction in IP command or AHB write command.
# - CMD_DDR, (33): Transmit command code to Flash.
# - RADDR_DDR, (34): Transmit row address to Flash.
# - CADDR_DDR, (35): Transmit column address to Flash.
# - MODE1_DDR, (36): Transmit mode bits to Flash.
# - MODE2_DDR, (37): Transmit mode bits to Flash.
# - MODE4_DDR, (38): Transmit mode bits to Flash.
# - MODE8_DDR, (39): Transmit mode bits to Flash.
# - WRITE_DDR, (40): Transmit program data to Flash device.
# - READ_DDR, (41): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_DDR, (42): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_DDR, (43): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_DDR, (44): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_DDR, (45): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# Possible options: <STOP, CMD_SDR, RADDR_SDR, CADDR_SDR, MODE1_SDR, MODE2_SDR, MODE4_SDR, MODE8_SDR, WRITE_SDR,
# READ_SDR, LEARN_SDR, DATSZ_SDR, DUMMY_SDR, DUMMY_RWDS_SDR, JMP_ON_CS, CMD_DDR, RADDR_DDR, CADDR_DDR, MODE1_DDR,
# MODE2_DDR, MODE4_DDR, MODE8_DDR, WRITE_DDR, READ_DDR, LEARN_DDR, DATSZ_DDR, DUMMY_DDR, DUMMY_RWDS_DDR>
OPERATION_CODE: STOP
lookupTable_seq8_instr1:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq8_instr2:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq8_instr3:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq8_instr4:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq8_instr5:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq8_instr6:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq8_instr7:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
# -----------------------------------===== lookupTable_seq9_instr0 [Optional] =====-----------------------------------
# Description: Offset: 0x00000110, Width: 16b; Lookup table holds Flash command sequences 9, instruction 0
lookupTable_seq9_instr0:
# ------------------------------------------===== OPERAND [Optional] =====------------------------------------------
# Description: Offset: 0b, Width: 8b, Instruction operand. Its values depends on used instruction
OPERAND: 0
# -----------------------------------------===== NUM_PADS [Optional] =====------------------------------------------
# Description: Offset: 8b, Width: 2b, Number of pads used by instruction. Some instructions ignores this parameter.
# - 1PAD, (0): Single mode. One pad is used.
# - 2PAD, (1): Dual mode. Two pads are used.
# - 4PAD, (2): Quad mode. Four pads are used.
# - 8PAD, (3): Octal mode. Eight pads are used.
# Possible options: <1PAD, 2PAD, 4PAD, 8PAD>
NUM_PADS: 1PAD
# --------------------------------------===== OPERATION_CODE [Optional] =====---------------------------------------
# Description: Offset: 10b, Width: 6b, Instruction operation code.
# - STOP, (0): Stop execution and de-assert CS. Then, the next command sequence (to the same flash device) starts
# from instruction pointer 0.
# - CMD_SDR, (1): Transmit command code to Flash.
# - RADDR_SDR, (2): Transmit row address to Flash.
# - CADDR_SDR, (3): Transmit column address to Flash.
# - MODE1_SDR, (4): Transmit mode bits to Flash.
# - MODE2_SDR, (5): Transmit mode bits to Flash.
# - MODE4_SDR, (6): Transmit mode bits to Flash.
# - MODE8_SDR, (7): Transmit mode bits to Flash.
# - WRITE_SDR, (8): Transmit program data to Flash device.
# - READ_SDR, (9): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_SDR, (10): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_SDR, (11): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_SDR, (12): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_SDR, (13): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# - JMP_ON_CS, (31): Stop execution, de-assert CS and save operand[7:0] as the instruction start pointer for next
# sequence.Normally this instruction is used to support Execute-In-Place enhanced mode. See XIP enhanced mode for
# more details.This instruction is only allowed for AHB read commands. There is interrupt status bit set
# (INTR[IPCMDERR] or INTR[AHBCMDERR]) when using this instruction in IP command or AHB write command.
# - CMD_DDR, (33): Transmit command code to Flash.
# - RADDR_DDR, (34): Transmit row address to Flash.
# - CADDR_DDR, (35): Transmit column address to Flash.
# - MODE1_DDR, (36): Transmit mode bits to Flash.
# - MODE2_DDR, (37): Transmit mode bits to Flash.
# - MODE4_DDR, (38): Transmit mode bits to Flash.
# - MODE8_DDR, (39): Transmit mode bits to Flash.
# - WRITE_DDR, (40): Transmit program data to Flash device.
# - READ_DDR, (41): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_DDR, (42): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_DDR, (43): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_DDR, (44): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_DDR, (45): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# Possible options: <STOP, CMD_SDR, RADDR_SDR, CADDR_SDR, MODE1_SDR, MODE2_SDR, MODE4_SDR, MODE8_SDR, WRITE_SDR,
# READ_SDR, LEARN_SDR, DATSZ_SDR, DUMMY_SDR, DUMMY_RWDS_SDR, JMP_ON_CS, CMD_DDR, RADDR_DDR, CADDR_DDR, MODE1_DDR,
# MODE2_DDR, MODE4_DDR, MODE8_DDR, WRITE_DDR, READ_DDR, LEARN_DDR, DATSZ_DDR, DUMMY_DDR, DUMMY_RWDS_DDR>
OPERATION_CODE: STOP
lookupTable_seq9_instr1:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq9_instr2:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq9_instr3:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq9_instr4:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq9_instr5:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq9_instr6:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq9_instr7:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
# ----------------------------------===== lookupTable_seq10_instr0 [Optional] =====-----------------------------------
# Description: Offset: 0x00000120, Width: 16b; Lookup table holds Flash command sequences 10, instruction 0
lookupTable_seq10_instr0:
# ------------------------------------------===== OPERAND [Optional] =====------------------------------------------
# Description: Offset: 0b, Width: 8b, Instruction operand. Its values depends on used instruction
OPERAND: 0
# -----------------------------------------===== NUM_PADS [Optional] =====------------------------------------------
# Description: Offset: 8b, Width: 2b, Number of pads used by instruction. Some instructions ignores this parameter.
# - 1PAD, (0): Single mode. One pad is used.
# - 2PAD, (1): Dual mode. Two pads are used.
# - 4PAD, (2): Quad mode. Four pads are used.
# - 8PAD, (3): Octal mode. Eight pads are used.
# Possible options: <1PAD, 2PAD, 4PAD, 8PAD>
NUM_PADS: 1PAD
# --------------------------------------===== OPERATION_CODE [Optional] =====---------------------------------------
# Description: Offset: 10b, Width: 6b, Instruction operation code.
# - STOP, (0): Stop execution and de-assert CS. Then, the next command sequence (to the same flash device) starts
# from instruction pointer 0.
# - CMD_SDR, (1): Transmit command code to Flash.
# - RADDR_SDR, (2): Transmit row address to Flash.
# - CADDR_SDR, (3): Transmit column address to Flash.
# - MODE1_SDR, (4): Transmit mode bits to Flash.
# - MODE2_SDR, (5): Transmit mode bits to Flash.
# - MODE4_SDR, (6): Transmit mode bits to Flash.
# - MODE8_SDR, (7): Transmit mode bits to Flash.
# - WRITE_SDR, (8): Transmit program data to Flash device.
# - READ_SDR, (9): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_SDR, (10): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_SDR, (11): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_SDR, (12): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_SDR, (13): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# - JMP_ON_CS, (31): Stop execution, de-assert CS and save operand[7:0] as the instruction start pointer for next
# sequence.Normally this instruction is used to support Execute-In-Place enhanced mode. See XIP enhanced mode for
# more details.This instruction is only allowed for AHB read commands. There is interrupt status bit set
# (INTR[IPCMDERR] or INTR[AHBCMDERR]) when using this instruction in IP command or AHB write command.
# - CMD_DDR, (33): Transmit command code to Flash.
# - RADDR_DDR, (34): Transmit row address to Flash.
# - CADDR_DDR, (35): Transmit column address to Flash.
# - MODE1_DDR, (36): Transmit mode bits to Flash.
# - MODE2_DDR, (37): Transmit mode bits to Flash.
# - MODE4_DDR, (38): Transmit mode bits to Flash.
# - MODE8_DDR, (39): Transmit mode bits to Flash.
# - WRITE_DDR, (40): Transmit program data to Flash device.
# - READ_DDR, (41): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_DDR, (42): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_DDR, (43): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_DDR, (44): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_DDR, (45): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# Possible options: <STOP, CMD_SDR, RADDR_SDR, CADDR_SDR, MODE1_SDR, MODE2_SDR, MODE4_SDR, MODE8_SDR, WRITE_SDR,
# READ_SDR, LEARN_SDR, DATSZ_SDR, DUMMY_SDR, DUMMY_RWDS_SDR, JMP_ON_CS, CMD_DDR, RADDR_DDR, CADDR_DDR, MODE1_DDR,
# MODE2_DDR, MODE4_DDR, MODE8_DDR, WRITE_DDR, READ_DDR, LEARN_DDR, DATSZ_DDR, DUMMY_DDR, DUMMY_RWDS_DDR>
OPERATION_CODE: STOP
lookupTable_seq10_instr1:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq10_instr2:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq10_instr3:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq10_instr4:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq10_instr5:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq10_instr6:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq10_instr7:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
# ----------------------------------===== lookupTable_seq11_instr0 [Optional] =====-----------------------------------
# Description: Offset: 0x00000130, Width: 16b; Lookup table holds Flash command sequences 11, instruction 0
lookupTable_seq11_instr0:
# ------------------------------------------===== OPERAND [Optional] =====------------------------------------------
# Description: Offset: 0b, Width: 8b, Instruction operand. Its values depends on used instruction
OPERAND: 0
# -----------------------------------------===== NUM_PADS [Optional] =====------------------------------------------
# Description: Offset: 8b, Width: 2b, Number of pads used by instruction. Some instructions ignores this parameter.
# - 1PAD, (0): Single mode. One pad is used.
# - 2PAD, (1): Dual mode. Two pads are used.
# - 4PAD, (2): Quad mode. Four pads are used.
# - 8PAD, (3): Octal mode. Eight pads are used.
# Possible options: <1PAD, 2PAD, 4PAD, 8PAD>
NUM_PADS: 1PAD
# --------------------------------------===== OPERATION_CODE [Optional] =====---------------------------------------
# Description: Offset: 10b, Width: 6b, Instruction operation code.
# - STOP, (0): Stop execution and de-assert CS. Then, the next command sequence (to the same flash device) starts
# from instruction pointer 0.
# - CMD_SDR, (1): Transmit command code to Flash.
# - RADDR_SDR, (2): Transmit row address to Flash.
# - CADDR_SDR, (3): Transmit column address to Flash.
# - MODE1_SDR, (4): Transmit mode bits to Flash.
# - MODE2_SDR, (5): Transmit mode bits to Flash.
# - MODE4_SDR, (6): Transmit mode bits to Flash.
# - MODE8_SDR, (7): Transmit mode bits to Flash.
# - WRITE_SDR, (8): Transmit program data to Flash device.
# - READ_SDR, (9): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_SDR, (10): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_SDR, (11): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_SDR, (12): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_SDR, (13): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# - JMP_ON_CS, (31): Stop execution, de-assert CS and save operand[7:0] as the instruction start pointer for next
# sequence.Normally this instruction is used to support Execute-In-Place enhanced mode. See XIP enhanced mode for
# more details.This instruction is only allowed for AHB read commands. There is interrupt status bit set
# (INTR[IPCMDERR] or INTR[AHBCMDERR]) when using this instruction in IP command or AHB write command.
# - CMD_DDR, (33): Transmit command code to Flash.
# - RADDR_DDR, (34): Transmit row address to Flash.
# - CADDR_DDR, (35): Transmit column address to Flash.
# - MODE1_DDR, (36): Transmit mode bits to Flash.
# - MODE2_DDR, (37): Transmit mode bits to Flash.
# - MODE4_DDR, (38): Transmit mode bits to Flash.
# - MODE8_DDR, (39): Transmit mode bits to Flash.
# - WRITE_DDR, (40): Transmit program data to Flash device.
# - READ_DDR, (41): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_DDR, (42): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_DDR, (43): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_DDR, (44): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_DDR, (45): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# Possible options: <STOP, CMD_SDR, RADDR_SDR, CADDR_SDR, MODE1_SDR, MODE2_SDR, MODE4_SDR, MODE8_SDR, WRITE_SDR,
# READ_SDR, LEARN_SDR, DATSZ_SDR, DUMMY_SDR, DUMMY_RWDS_SDR, JMP_ON_CS, CMD_DDR, RADDR_DDR, CADDR_DDR, MODE1_DDR,
# MODE2_DDR, MODE4_DDR, MODE8_DDR, WRITE_DDR, READ_DDR, LEARN_DDR, DATSZ_DDR, DUMMY_DDR, DUMMY_RWDS_DDR>
OPERATION_CODE: STOP
lookupTable_seq11_instr1:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq11_instr2:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq11_instr3:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq11_instr4:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq11_instr5:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq11_instr6:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq11_instr7:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
# ----------------------------------===== lookupTable_seq12_instr0 [Optional] =====-----------------------------------
# Description: Offset: 0x00000140, Width: 16b; Lookup table holds Flash command sequences 12, instruction 0
lookupTable_seq12_instr0:
# ------------------------------------------===== OPERAND [Optional] =====------------------------------------------
# Description: Offset: 0b, Width: 8b, Instruction operand. Its values depends on used instruction
OPERAND: 0
# -----------------------------------------===== NUM_PADS [Optional] =====------------------------------------------
# Description: Offset: 8b, Width: 2b, Number of pads used by instruction. Some instructions ignores this parameter.
# - 1PAD, (0): Single mode. One pad is used.
# - 2PAD, (1): Dual mode. Two pads are used.
# - 4PAD, (2): Quad mode. Four pads are used.
# - 8PAD, (3): Octal mode. Eight pads are used.
# Possible options: <1PAD, 2PAD, 4PAD, 8PAD>
NUM_PADS: 1PAD
# --------------------------------------===== OPERATION_CODE [Optional] =====---------------------------------------
# Description: Offset: 10b, Width: 6b, Instruction operation code.
# - STOP, (0): Stop execution and de-assert CS. Then, the next command sequence (to the same flash device) starts
# from instruction pointer 0.
# - CMD_SDR, (1): Transmit command code to Flash.
# - RADDR_SDR, (2): Transmit row address to Flash.
# - CADDR_SDR, (3): Transmit column address to Flash.
# - MODE1_SDR, (4): Transmit mode bits to Flash.
# - MODE2_SDR, (5): Transmit mode bits to Flash.
# - MODE4_SDR, (6): Transmit mode bits to Flash.
# - MODE8_SDR, (7): Transmit mode bits to Flash.
# - WRITE_SDR, (8): Transmit program data to Flash device.
# - READ_SDR, (9): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_SDR, (10): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_SDR, (11): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_SDR, (12): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_SDR, (13): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# - JMP_ON_CS, (31): Stop execution, de-assert CS and save operand[7:0] as the instruction start pointer for next
# sequence.Normally this instruction is used to support Execute-In-Place enhanced mode. See XIP enhanced mode for
# more details.This instruction is only allowed for AHB read commands. There is interrupt status bit set
# (INTR[IPCMDERR] or INTR[AHBCMDERR]) when using this instruction in IP command or AHB write command.
# - CMD_DDR, (33): Transmit command code to Flash.
# - RADDR_DDR, (34): Transmit row address to Flash.
# - CADDR_DDR, (35): Transmit column address to Flash.
# - MODE1_DDR, (36): Transmit mode bits to Flash.
# - MODE2_DDR, (37): Transmit mode bits to Flash.
# - MODE4_DDR, (38): Transmit mode bits to Flash.
# - MODE8_DDR, (39): Transmit mode bits to Flash.
# - WRITE_DDR, (40): Transmit program data to Flash device.
# - READ_DDR, (41): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_DDR, (42): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_DDR, (43): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_DDR, (44): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_DDR, (45): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# Possible options: <STOP, CMD_SDR, RADDR_SDR, CADDR_SDR, MODE1_SDR, MODE2_SDR, MODE4_SDR, MODE8_SDR, WRITE_SDR,
# READ_SDR, LEARN_SDR, DATSZ_SDR, DUMMY_SDR, DUMMY_RWDS_SDR, JMP_ON_CS, CMD_DDR, RADDR_DDR, CADDR_DDR, MODE1_DDR,
# MODE2_DDR, MODE4_DDR, MODE8_DDR, WRITE_DDR, READ_DDR, LEARN_DDR, DATSZ_DDR, DUMMY_DDR, DUMMY_RWDS_DDR>
OPERATION_CODE: STOP
lookupTable_seq12_instr1:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq12_instr2:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq12_instr3:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq12_instr4:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq12_instr5:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq12_instr6:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq12_instr7:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
# ----------------------------------===== lookupTable_seq13_instr0 [Optional] =====-----------------------------------
# Description: Offset: 0x00000150, Width: 16b; Lookup table holds Flash command sequences 13, instruction 0
lookupTable_seq13_instr0:
# ------------------------------------------===== OPERAND [Optional] =====------------------------------------------
# Description: Offset: 0b, Width: 8b, Instruction operand. Its values depends on used instruction
OPERAND: 0
# -----------------------------------------===== NUM_PADS [Optional] =====------------------------------------------
# Description: Offset: 8b, Width: 2b, Number of pads used by instruction. Some instructions ignores this parameter.
# - 1PAD, (0): Single mode. One pad is used.
# - 2PAD, (1): Dual mode. Two pads are used.
# - 4PAD, (2): Quad mode. Four pads are used.
# - 8PAD, (3): Octal mode. Eight pads are used.
# Possible options: <1PAD, 2PAD, 4PAD, 8PAD>
NUM_PADS: 1PAD
# --------------------------------------===== OPERATION_CODE [Optional] =====---------------------------------------
# Description: Offset: 10b, Width: 6b, Instruction operation code.
# - STOP, (0): Stop execution and de-assert CS. Then, the next command sequence (to the same flash device) starts
# from instruction pointer 0.
# - CMD_SDR, (1): Transmit command code to Flash.
# - RADDR_SDR, (2): Transmit row address to Flash.
# - CADDR_SDR, (3): Transmit column address to Flash.
# - MODE1_SDR, (4): Transmit mode bits to Flash.
# - MODE2_SDR, (5): Transmit mode bits to Flash.
# - MODE4_SDR, (6): Transmit mode bits to Flash.
# - MODE8_SDR, (7): Transmit mode bits to Flash.
# - WRITE_SDR, (8): Transmit program data to Flash device.
# - READ_SDR, (9): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_SDR, (10): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_SDR, (11): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_SDR, (12): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_SDR, (13): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# - JMP_ON_CS, (31): Stop execution, de-assert CS and save operand[7:0] as the instruction start pointer for next
# sequence.Normally this instruction is used to support Execute-In-Place enhanced mode. See XIP enhanced mode for
# more details.This instruction is only allowed for AHB read commands. There is interrupt status bit set
# (INTR[IPCMDERR] or INTR[AHBCMDERR]) when using this instruction in IP command or AHB write command.
# - CMD_DDR, (33): Transmit command code to Flash.
# - RADDR_DDR, (34): Transmit row address to Flash.
# - CADDR_DDR, (35): Transmit column address to Flash.
# - MODE1_DDR, (36): Transmit mode bits to Flash.
# - MODE2_DDR, (37): Transmit mode bits to Flash.
# - MODE4_DDR, (38): Transmit mode bits to Flash.
# - MODE8_DDR, (39): Transmit mode bits to Flash.
# - WRITE_DDR, (40): Transmit program data to Flash device.
# - READ_DDR, (41): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_DDR, (42): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_DDR, (43): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_DDR, (44): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_DDR, (45): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# Possible options: <STOP, CMD_SDR, RADDR_SDR, CADDR_SDR, MODE1_SDR, MODE2_SDR, MODE4_SDR, MODE8_SDR, WRITE_SDR,
# READ_SDR, LEARN_SDR, DATSZ_SDR, DUMMY_SDR, DUMMY_RWDS_SDR, JMP_ON_CS, CMD_DDR, RADDR_DDR, CADDR_DDR, MODE1_DDR,
# MODE2_DDR, MODE4_DDR, MODE8_DDR, WRITE_DDR, READ_DDR, LEARN_DDR, DATSZ_DDR, DUMMY_DDR, DUMMY_RWDS_DDR>
OPERATION_CODE: STOP
lookupTable_seq13_instr1:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq13_instr2:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq13_instr3:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq13_instr4:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq13_instr5:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq13_instr6:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq13_instr7:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
# ----------------------------------===== lookupTable_seq14_instr0 [Optional] =====-----------------------------------
# Description: Offset: 0x00000160, Width: 16b; Lookup table holds Flash command sequences 14, instruction 0
lookupTable_seq14_instr0:
# ------------------------------------------===== OPERAND [Optional] =====------------------------------------------
# Description: Offset: 0b, Width: 8b, Instruction operand. Its values depends on used instruction
OPERAND: 0
# -----------------------------------------===== NUM_PADS [Optional] =====------------------------------------------
# Description: Offset: 8b, Width: 2b, Number of pads used by instruction. Some instructions ignores this parameter.
# - 1PAD, (0): Single mode. One pad is used.
# - 2PAD, (1): Dual mode. Two pads are used.
# - 4PAD, (2): Quad mode. Four pads are used.
# - 8PAD, (3): Octal mode. Eight pads are used.
# Possible options: <1PAD, 2PAD, 4PAD, 8PAD>
NUM_PADS: 1PAD
# --------------------------------------===== OPERATION_CODE [Optional] =====---------------------------------------
# Description: Offset: 10b, Width: 6b, Instruction operation code.
# - STOP, (0): Stop execution and de-assert CS. Then, the next command sequence (to the same flash device) starts
# from instruction pointer 0.
# - CMD_SDR, (1): Transmit command code to Flash.
# - RADDR_SDR, (2): Transmit row address to Flash.
# - CADDR_SDR, (3): Transmit column address to Flash.
# - MODE1_SDR, (4): Transmit mode bits to Flash.
# - MODE2_SDR, (5): Transmit mode bits to Flash.
# - MODE4_SDR, (6): Transmit mode bits to Flash.
# - MODE8_SDR, (7): Transmit mode bits to Flash.
# - WRITE_SDR, (8): Transmit program data to Flash device.
# - READ_SDR, (9): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_SDR, (10): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_SDR, (11): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_SDR, (12): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_SDR, (13): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# - JMP_ON_CS, (31): Stop execution, de-assert CS and save operand[7:0] as the instruction start pointer for next
# sequence.Normally this instruction is used to support Execute-In-Place enhanced mode. See XIP enhanced mode for
# more details.This instruction is only allowed for AHB read commands. There is interrupt status bit set
# (INTR[IPCMDERR] or INTR[AHBCMDERR]) when using this instruction in IP command or AHB write command.
# - CMD_DDR, (33): Transmit command code to Flash.
# - RADDR_DDR, (34): Transmit row address to Flash.
# - CADDR_DDR, (35): Transmit column address to Flash.
# - MODE1_DDR, (36): Transmit mode bits to Flash.
# - MODE2_DDR, (37): Transmit mode bits to Flash.
# - MODE4_DDR, (38): Transmit mode bits to Flash.
# - MODE8_DDR, (39): Transmit mode bits to Flash.
# - WRITE_DDR, (40): Transmit program data to Flash device.
# - READ_DDR, (41): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_DDR, (42): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_DDR, (43): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_DDR, (44): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_DDR, (45): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# Possible options: <STOP, CMD_SDR, RADDR_SDR, CADDR_SDR, MODE1_SDR, MODE2_SDR, MODE4_SDR, MODE8_SDR, WRITE_SDR,
# READ_SDR, LEARN_SDR, DATSZ_SDR, DUMMY_SDR, DUMMY_RWDS_SDR, JMP_ON_CS, CMD_DDR, RADDR_DDR, CADDR_DDR, MODE1_DDR,
# MODE2_DDR, MODE4_DDR, MODE8_DDR, WRITE_DDR, READ_DDR, LEARN_DDR, DATSZ_DDR, DUMMY_DDR, DUMMY_RWDS_DDR>
OPERATION_CODE: STOP
lookupTable_seq14_instr1:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq14_instr2:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq14_instr3:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq14_instr4:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq14_instr5:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq14_instr6:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq14_instr7:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
# ----------------------------------===== lookupTable_seq15_instr0 [Optional] =====-----------------------------------
# Description: Offset: 0x00000170, Width: 16b; Lookup table holds Flash command sequences 15, instruction 0
lookupTable_seq15_instr0:
# ------------------------------------------===== OPERAND [Optional] =====------------------------------------------
# Description: Offset: 0b, Width: 8b, Instruction operand. Its values depends on used instruction
OPERAND: 0
# -----------------------------------------===== NUM_PADS [Optional] =====------------------------------------------
# Description: Offset: 8b, Width: 2b, Number of pads used by instruction. Some instructions ignores this parameter.
# - 1PAD, (0): Single mode. One pad is used.
# - 2PAD, (1): Dual mode. Two pads are used.
# - 4PAD, (2): Quad mode. Four pads are used.
# - 8PAD, (3): Octal mode. Eight pads are used.
# Possible options: <1PAD, 2PAD, 4PAD, 8PAD>
NUM_PADS: 1PAD
# --------------------------------------===== OPERATION_CODE [Optional] =====---------------------------------------
# Description: Offset: 10b, Width: 6b, Instruction operation code.
# - STOP, (0): Stop execution and de-assert CS. Then, the next command sequence (to the same flash device) starts
# from instruction pointer 0.
# - CMD_SDR, (1): Transmit command code to Flash.
# - RADDR_SDR, (2): Transmit row address to Flash.
# - CADDR_SDR, (3): Transmit column address to Flash.
# - MODE1_SDR, (4): Transmit mode bits to Flash.
# - MODE2_SDR, (5): Transmit mode bits to Flash.
# - MODE4_SDR, (6): Transmit mode bits to Flash.
# - MODE8_SDR, (7): Transmit mode bits to Flash.
# - WRITE_SDR, (8): Transmit program data to Flash device.
# - READ_SDR, (9): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_SDR, (10): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_SDR, (11): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_SDR, (12): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_SDR, (13): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# - JMP_ON_CS, (31): Stop execution, de-assert CS and save operand[7:0] as the instruction start pointer for next
# sequence.Normally this instruction is used to support Execute-In-Place enhanced mode. See XIP enhanced mode for
# more details.This instruction is only allowed for AHB read commands. There is interrupt status bit set
# (INTR[IPCMDERR] or INTR[AHBCMDERR]) when using this instruction in IP command or AHB write command.
# - CMD_DDR, (33): Transmit command code to Flash.
# - RADDR_DDR, (34): Transmit row address to Flash.
# - CADDR_DDR, (35): Transmit column address to Flash.
# - MODE1_DDR, (36): Transmit mode bits to Flash.
# - MODE2_DDR, (37): Transmit mode bits to Flash.
# - MODE4_DDR, (38): Transmit mode bits to Flash.
# - MODE8_DDR, (39): Transmit mode bits to Flash.
# - WRITE_DDR, (40): Transmit program data to Flash device.
# - READ_DDR, (41): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_DDR, (42): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_DDR, (43): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_DDR, (44): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_DDR, (45): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# Possible options: <STOP, CMD_SDR, RADDR_SDR, CADDR_SDR, MODE1_SDR, MODE2_SDR, MODE4_SDR, MODE8_SDR, WRITE_SDR,
# READ_SDR, LEARN_SDR, DATSZ_SDR, DUMMY_SDR, DUMMY_RWDS_SDR, JMP_ON_CS, CMD_DDR, RADDR_DDR, CADDR_DDR, MODE1_DDR,
# MODE2_DDR, MODE4_DDR, MODE8_DDR, WRITE_DDR, READ_DDR, LEARN_DDR, DATSZ_DDR, DUMMY_DDR, DUMMY_RWDS_DDR>
OPERATION_CODE: STOP
lookupTable_seq15_instr1:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq15_instr2:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq15_instr3:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq15_instr4:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq15_instr5:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq15_instr6:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq15_instr7:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
# ---------------------------------------===== lutCustomSeq_0 [Optional] =====----------------------------------------
# Description: Offset: 0x00000180, Width: 32b; [0x180-0x1af] Customizable LUT Sequences
lutCustomSeq_0:
# ------------------------------------------===== seqNum [Optional] =====-------------------------------------------
# Description: Offset: 0b, Width: 8b, Sequence Number, valid number: 1-16
seqNum: 0
# -------------------------------------------===== seqId [Optional] =====-------------------------------------------
# Description: Offset: 8b, Width: 8b, Sequence Index, valid number: 0-15
seqId: 0
# -----------------------------------------===== reserved [Optional] =====------------------------------------------
# Description: Offset: 16b, Width: 16b, N/A
reserved: 0
# ---------------------------------------===== lutCustomSeq_1 [Optional] =====----------------------------------------
# Description: Offset: 0x00000184, Width: 32b; [0x180-0x1af] Customizable LUT Sequences
lutCustomSeq_1:
# ------------------------------------------===== seqNum [Optional] =====-------------------------------------------
# Description: Offset: 0b, Width: 8b, Sequence Number, valid number: 1-16
seqNum: 0
# -------------------------------------------===== seqId [Optional] =====-------------------------------------------
# Description: Offset: 8b, Width: 8b, Sequence Index, valid number: 0-15
seqId: 0
# -----------------------------------------===== reserved [Optional] =====------------------------------------------
# Description: Offset: 16b, Width: 16b, N/A
reserved: 0
# ---------------------------------------===== lutCustomSeq_2 [Optional] =====----------------------------------------
# Description: Offset: 0x00000188, Width: 32b; [0x180-0x1af] Customizable LUT Sequences
lutCustomSeq_2:
# ------------------------------------------===== seqNum [Optional] =====-------------------------------------------
# Description: Offset: 0b, Width: 8b, Sequence Number, valid number: 1-16
seqNum: 0
# -------------------------------------------===== seqId [Optional] =====-------------------------------------------
# Description: Offset: 8b, Width: 8b, Sequence Index, valid number: 0-15
seqId: 0
# -----------------------------------------===== reserved [Optional] =====------------------------------------------
# Description: Offset: 16b, Width: 16b, N/A
reserved: 0
# ---------------------------------------===== lutCustomSeq_3 [Optional] =====----------------------------------------
# Description: Offset: 0x0000018C, Width: 32b; [0x180-0x1af] Customizable LUT Sequences
lutCustomSeq_3:
# ------------------------------------------===== seqNum [Optional] =====-------------------------------------------
# Description: Offset: 0b, Width: 8b, Sequence Number, valid number: 1-16
seqNum: 0
# -------------------------------------------===== seqId [Optional] =====-------------------------------------------
# Description: Offset: 8b, Width: 8b, Sequence Index, valid number: 0-15
seqId: 0
# -----------------------------------------===== reserved [Optional] =====------------------------------------------
# Description: Offset: 16b, Width: 16b, N/A
reserved: 0
# ---------------------------------------===== lutCustomSeq_4 [Optional] =====----------------------------------------
# Description: Offset: 0x00000190, Width: 32b; [0x180-0x1af] Customizable LUT Sequences
lutCustomSeq_4:
# ------------------------------------------===== seqNum [Optional] =====-------------------------------------------
# Description: Offset: 0b, Width: 8b, Sequence Number, valid number: 1-16
seqNum: 0
# -------------------------------------------===== seqId [Optional] =====-------------------------------------------
# Description: Offset: 8b, Width: 8b, Sequence Index, valid number: 0-15
seqId: 0
# -----------------------------------------===== reserved [Optional] =====------------------------------------------
# Description: Offset: 16b, Width: 16b, N/A
reserved: 0
# ---------------------------------------===== lutCustomSeq_5 [Optional] =====----------------------------------------
# Description: Offset: 0x00000194, Width: 32b; [0x180-0x1af] Customizable LUT Sequences
lutCustomSeq_5:
# ------------------------------------------===== seqNum [Optional] =====-------------------------------------------
# Description: Offset: 0b, Width: 8b, Sequence Number, valid number: 1-16
seqNum: 0
# -------------------------------------------===== seqId [Optional] =====-------------------------------------------
# Description: Offset: 8b, Width: 8b, Sequence Index, valid number: 0-15
seqId: 0
# -----------------------------------------===== reserved [Optional] =====------------------------------------------
# Description: Offset: 16b, Width: 16b, N/A
reserved: 0
# ---------------------------------------===== lutCustomSeq_6 [Optional] =====----------------------------------------
# Description: Offset: 0x00000198, Width: 32b; [0x180-0x1af] Customizable LUT Sequences
lutCustomSeq_6:
# ------------------------------------------===== seqNum [Optional] =====-------------------------------------------
# Description: Offset: 0b, Width: 8b, Sequence Number, valid number: 1-16
seqNum: 0
# -------------------------------------------===== seqId [Optional] =====-------------------------------------------
# Description: Offset: 8b, Width: 8b, Sequence Index, valid number: 0-15
seqId: 0
# -----------------------------------------===== reserved [Optional] =====------------------------------------------
# Description: Offset: 16b, Width: 16b, N/A
reserved: 0
# ---------------------------------------===== lutCustomSeq_7 [Optional] =====----------------------------------------
# Description: Offset: 0x0000019C, Width: 32b; [0x180-0x1af] Customizable LUT Sequences
lutCustomSeq_7:
# ------------------------------------------===== seqNum [Optional] =====-------------------------------------------
# Description: Offset: 0b, Width: 8b, Sequence Number, valid number: 1-16
seqNum: 0
# -------------------------------------------===== seqId [Optional] =====-------------------------------------------
# Description: Offset: 8b, Width: 8b, Sequence Index, valid number: 0-15
seqId: 0
# -----------------------------------------===== reserved [Optional] =====------------------------------------------
# Description: Offset: 16b, Width: 16b, N/A
reserved: 0
# ---------------------------------------===== lutCustomSeq_8 [Optional] =====----------------------------------------
# Description: Offset: 0x000001A0, Width: 32b; [0x180-0x1af] Customizable LUT Sequences
lutCustomSeq_8:
# ------------------------------------------===== seqNum [Optional] =====-------------------------------------------
# Description: Offset: 0b, Width: 8b, Sequence Number, valid number: 1-16
seqNum: 0
# -------------------------------------------===== seqId [Optional] =====-------------------------------------------
# Description: Offset: 8b, Width: 8b, Sequence Index, valid number: 0-15
seqId: 0
# -----------------------------------------===== reserved [Optional] =====------------------------------------------
# Description: Offset: 16b, Width: 16b, N/A
reserved: 0
# ---------------------------------------===== lutCustomSeq_9 [Optional] =====----------------------------------------
# Description: Offset: 0x000001A4, Width: 32b; [0x180-0x1af] Customizable LUT Sequences
lutCustomSeq_9:
# ------------------------------------------===== seqNum [Optional] =====-------------------------------------------
# Description: Offset: 0b, Width: 8b, Sequence Number, valid number: 1-16
seqNum: 0
# -------------------------------------------===== seqId [Optional] =====-------------------------------------------
# Description: Offset: 8b, Width: 8b, Sequence Index, valid number: 0-15
seqId: 0
# -----------------------------------------===== reserved [Optional] =====------------------------------------------
# Description: Offset: 16b, Width: 16b, N/A
reserved: 0
# ---------------------------------------===== lutCustomSeq_10 [Optional] =====---------------------------------------
# Description: Offset: 0x000001A8, Width: 32b; [0x180-0x1af] Customizable LUT Sequences
lutCustomSeq_10:
# ------------------------------------------===== seqNum [Optional] =====-------------------------------------------
# Description: Offset: 0b, Width: 8b, Sequence Number, valid number: 1-16
seqNum: 0
# -------------------------------------------===== seqId [Optional] =====-------------------------------------------
# Description: Offset: 8b, Width: 8b, Sequence Index, valid number: 0-15
seqId: 0
# -----------------------------------------===== reserved [Optional] =====------------------------------------------
# Description: Offset: 16b, Width: 16b, N/A
reserved: 0
# ---------------------------------------===== lutCustomSeq_11 [Optional] =====---------------------------------------
# Description: Offset: 0x000001AC, Width: 32b; [0x180-0x1af] Customizable LUT Sequences
lutCustomSeq_11:
# ------------------------------------------===== seqNum [Optional] =====-------------------------------------------
# Description: Offset: 0b, Width: 8b, Sequence Number, valid number: 1-16
seqNum: 0
# -------------------------------------------===== seqId [Optional] =====-------------------------------------------
# Description: Offset: 8b, Width: 8b, Sequence Index, valid number: 0-15
seqId: 0
# -----------------------------------------===== reserved [Optional] =====------------------------------------------
# Description: Offset: 16b, Width: 16b, N/A
reserved: 0
# -----------------------------------------===== reserved4_0 [Optional] =====-----------------------------------------
# Description: Offset: 0x000001B0, Width: 32b; [0x1b0-0x1bf] Reserved for future use
reserved4_0: '0x00000000'
# -----------------------------------------===== reserved4_1 [Optional] =====-----------------------------------------
# Description: Offset: 0x000001B4, Width: 32b; [0x1b0-0x1bf] Reserved for future use
reserved4_1: '0x00000000'
# -----------------------------------------===== reserved4_2 [Optional] =====-----------------------------------------
# Description: Offset: 0x000001B8, Width: 32b; [0x1b0-0x1bf] Reserved for future use
reserved4_2: '0x00000000'
# -----------------------------------------===== reserved4_3 [Optional] =====-----------------------------------------
# Description: Offset: 0x000001BC, Width: 32b; [0x1b0-0x1bf] Reserved for future use
reserved4_3: '0x00000000'
# ------------------------------------------===== pageSize [Optional] =====-------------------------------------------
# Description: Offset: 0x000001C0, Width: 32b; Page size of Serial NOR
pageSize: '0x00000000'
# -----------------------------------------===== sectorSize [Optional] =====------------------------------------------
# Description: Offset: 0x000001C4, Width: 32b; Sector size of Serial NOR
sectorSize: '0x00000000'
# -------------------------------------===== ipcmdSerialClkFreq [Optional] =====--------------------------------------
# Description: Offset: 0x000001C8, Width: 8b; Clock frequency for IP command
ipcmdSerialClkFreq: '0x00'
# -------------------------------------===== isUniformBlockSize [Optional] =====--------------------------------------
# Description: Offset: 0x000001C9, Width: 8b; Sector/Block size is the same
isUniformBlockSize: '0x00'
# -------------------------------------===== isDataOrderSwapped [Optional] =====--------------------------------------
# Description: Offset: 0x000001CA, Width: 8b; Data order (D0, D1, D2, D3) is swapped (D1,D0, D3, D2)
isDataOrderSwapped: '0x00'
# -----------------------------------------===== reserved0_0 [Optional] =====-----------------------------------------
# Description: Offset: 0x000001CB, Width: 8b; Reserved for future use
reserved0_0: '0x00'
# ----------------------------------------===== serialNorType [Optional] =====----------------------------------------
# Description: Offset: 0x000001CC, Width: 8b; Serial NOR Flash type: 0/1/2/3
serialNorType: '0x00'
# --------------------------------------===== needExitNoCmdMode [Optional] =====--------------------------------------
# Description: Offset: 0x000001CD, Width: 8b; Need to exit NoCmd mode before other IP command
needExitNoCmdMode: '0x00'
# ------------------------------------===== halfClkForNonReadCmd [Optional] =====-------------------------------------
# Description: Offset: 0x000001CE, Width: 8b; Half the Serial Clock for non-read command: true/false
halfClkForNonReadCmd: '0x00'
# ------------------------------------===== needRestoreNoCmdMode [Optional] =====-------------------------------------
# Description: Offset: 0x000001CF, Width: 8b; Need to Restore NoCmd mode after IP command execution
needRestoreNoCmdMode: '0x00'
# ------------------------------------------===== blockSize [Optional] =====------------------------------------------
# Description: Offset: 0x000001D0, Width: 32b; Block size
blockSize: '0x00000000'
# ----------------------------------------===== flashStateCtx [Optional] =====----------------------------------------
# Description: Offset: 0x000001D4, Width: 32b; Flash State Context
flashStateCtx: '0x00000000'
# -----------------------------------------===== reserve2_0 [Optional] =====------------------------------------------
# Description: Offset: 0x000001D8, Width: 32b; Reserved for future use
reserve2_0: '0x00000000'
# -----------------------------------------===== reserve2_1 [Optional] =====------------------------------------------
# Description: Offset: 0x000001DC, Width: 32b; Reserved for future use
reserve2_1: '0x00000000'
# -----------------------------------------===== reserve2_2 [Optional] =====------------------------------------------
# Description: Offset: 0x000001E0, Width: 32b; Reserved for future use
reserve2_2: '0x00000000'
# -----------------------------------------===== reserve2_3 [Optional] =====------------------------------------------
# Description: Offset: 0x000001E4, Width: 32b; Reserved for future use
reserve2_3: '0x00000000'
# -----------------------------------------===== reserve2_4 [Optional] =====------------------------------------------
# Description: Offset: 0x000001E8, Width: 32b; Reserved for future use
reserve2_4: '0x00000000'
# -----------------------------------------===== reserve2_5 [Optional] =====------------------------------------------
# Description: Offset: 0x000001EC, Width: 32b; Reserved for future use
reserve2_5: '0x00000000'
# -----------------------------------------===== reserve2_6 [Optional] =====------------------------------------------
# Description: Offset: 0x000001F0, Width: 32b; Reserved for future use
reserve2_6: '0x00000000'
# -----------------------------------------===== reserve2_7 [Optional] =====------------------------------------------
# Description: Offset: 0x000001F4, Width: 32b; Reserved for future use
reserve2_7: '0x00000000'
# -----------------------------------------===== reserve2_8 [Optional] =====------------------------------------------
# Description: Offset: 0x000001F8, Width: 32b; Reserved for future use
reserve2_8: '0x00000000'
# -----------------------------------------===== reserve2_9 [Optional] =====------------------------------------------
# Description: Offset: 0x000001FC, Width: 32b; Reserved for future use
reserve2_9: '0x00000000'
FCB for mimxrt1010, Revision: a0 and flexspi_nor#
FCB for mimxrt1010, Revision: a0 and flexspi_nor JSON schema
FCB for mimxrt1010, Revision: a0 and flexspi_nor YAML configuration template
# ================================= FCB for mimxrt1010, Revision: a0 and flexspi_nor =================================
# ======================================================================================================================
# == FCB for mimxrt1010, Revision: a0 and flexspi_nor ==
# ======================================================================================================================
# -------------------------------------===== The chip family name [Required] =====--------------------------------------
# Description: NXP chip family identifier.
family: CHOOSE_FROM_TABLE
# -----------------------------------------===== MCU revision [Optional] =====------------------------------------------
# Description: Revision of silicon. The 'latest' name, means most current revision.
# Possible options: <a0, latest>
revision: a0
# ------------------------------------------===== Memory type [Required] =====------------------------------------------
# Description: Specify type of memory used by FCB description.
# Possible options: <flexspi_nor>
type: flexspi_nor
# ------------------------------------------===== mimxrt1010 [Required] =====-------------------------------------------
fcb_settings:
# ---------------------------------------------===== tag [Optional] =====---------------------------------------------
# Description: Offset: 0x00000000, Width: 32b; [0x000-0x003] Tag, fixed value 0x42464346UL
tag: '0x42464346'
# -------------------------------------------===== version [Optional] =====-------------------------------------------
# Description: Offset: 0x00000004, Width: 32b; [0x004-0x007] Version,[31:24] -'V', [23:16] - Major, [15:8] - Minor,
# [7:0] - bugfix
version: '0x56010100'
# ------------------------------------------===== reserved0 [Optional] =====------------------------------------------
# Description: Offset: 0x00000008, Width: 32b; [0x008-0x00b] Reserved for future use
reserved0: '0x00000000'
# --------------------------------------===== readSampleClkSrc [Optional] =====---------------------------------------
# Description: Offset: 0x0000000C, Width: 8b; [0x00c-0x00c] Read Sample Clock Source, valid value: 0/1/3
readSampleClkSrc: '0x00'
# -----------------------------------------===== csHoldTime [Optional] =====------------------------------------------
# Description: Offset: 0x0000000D, Width: 8b; [0x00d-0x00d] CS hold time, default value: 3
csHoldTime: '0x00'
# -----------------------------------------===== csSetupTime [Optional] =====-----------------------------------------
# Description: Offset: 0x0000000E, Width: 8b; [0x00e-0x00e] CS setup time, default value: 3
csSetupTime: '0x00'
# -------------------------------------===== columnAddressWidth [Optional] =====--------------------------------------
# Description: Offset: 0x0000000F, Width: 8b; [0x00f-0x00f] Column Address with, for HyperBus protocol, it is fixed
# to 3, For Serial NAND, need to refer to datasheet
columnAddressWidth: '0x00'
# -------------------------------------===== deviceModeCfgEnable [Optional] =====-------------------------------------
# Description: Offset: 0x00000010, Width: 8b; [0x010-0x010] Device Mode Configure enable flag, 1 - Enable, 0 -
# Disable
deviceModeCfgEnable: '0x00'
# ---------------------------------------===== deviceModeType [Optional] =====----------------------------------------
# Description: Offset: 0x00000011, Width: 8b; [0x011-0x011] Specify the configuration command type:Quad Enable,
# DPI/QPI/OPI switch, Generic configuration, etc.
deviceModeType: '0x00'
# -------------------------------------===== waitTimeCfgCommands [Optional] =====-------------------------------------
# Description: Offset: 0x00000012, Width: 16b; [0x012-0x013] Wait time for all configuration commands, unit: 100us,
# Used for DPI/QPI/OPI switch or reset command
waitTimeCfgCommands: '0x0000'
# ----------------------------------------===== deviceModeSeq [Optional] =====----------------------------------------
# Description: Offset: 0x00000014, Width: 32b; [0x014-0x017] Device mode sequence info, [7:0] - LUT sequence id,
# [15:8] - LUt sequence number, [31:16] Reserved
deviceModeSeq:
# ------------------------------------------===== seqNum [Optional] =====-------------------------------------------
# Description: Offset: 0b, Width: 8b, Sequence Number, valid number: 1-16
seqNum: 0
# -------------------------------------------===== seqId [Optional] =====-------------------------------------------
# Description: Offset: 8b, Width: 8b, Sequence Index, valid number: 0-15
seqId: 0
# -----------------------------------------===== reserved [Optional] =====------------------------------------------
# Description: Offset: 16b, Width: 16b, N/A
reserved: 0
# ----------------------------------------===== deviceModeArg [Optional] =====----------------------------------------
# Description: Offset: 0x00000018, Width: 32b; [0x018-0x01b] Argument/Parameter for device configuration
deviceModeArg: '0x00000000'
# ---------------------------------------===== configCmdEnable [Optional] =====---------------------------------------
# Description: Offset: 0x0000001C, Width: 8b; [0x01c-0x01c] Configure command Enable Flag, 1 - Enable, 0 - Disable
configCmdEnable: '0x00'
# --------------------------------------===== configModeType_0 [Optional] =====---------------------------------------
# Description: Offset: 0x0000001D, Width: 8b; [0x01d-0x01f] Configure Mode Type, similar as deviceModeTpe
configModeType_0: '0x00'
# --------------------------------------===== configModeType_1 [Optional] =====---------------------------------------
# Description: Offset: 0x0000001E, Width: 8b; [0x01d-0x01f] Configure Mode Type, similar as deviceModeTpe
configModeType_1: '0x00'
# --------------------------------------===== configModeType_2 [Optional] =====---------------------------------------
# Description: Offset: 0x0000001F, Width: 8b; [0x01d-0x01f] Configure Mode Type, similar as deviceModeTpe
configModeType_2: '0x00'
# ---------------------------------------===== configCmdSeqs_0 [Optional] =====---------------------------------------
# Description: Offset: 0x00000020, Width: 32b; [0x020-0x02b] Sequence info for Device Configuration command, similar
# as deviceModeSeq
configCmdSeqs_0:
# ------------------------------------------===== seqNum [Optional] =====-------------------------------------------
# Description: Offset: 0b, Width: 8b, Sequence Number, valid number: 1-16
seqNum: 0
# -------------------------------------------===== seqId [Optional] =====-------------------------------------------
# Description: Offset: 8b, Width: 8b, Sequence Index, valid number: 0-15
seqId: 0
# -----------------------------------------===== reserved [Optional] =====------------------------------------------
# Description: Offset: 16b, Width: 16b, N/A
reserved: 0
# ---------------------------------------===== configCmdSeqs_1 [Optional] =====---------------------------------------
# Description: Offset: 0x00000024, Width: 32b; [0x020-0x02b] Sequence info for Device Configuration command, similar
# as deviceModeSeq
configCmdSeqs_1:
# ------------------------------------------===== seqNum [Optional] =====-------------------------------------------
# Description: Offset: 0b, Width: 8b, Sequence Number, valid number: 1-16
seqNum: 0
# -------------------------------------------===== seqId [Optional] =====-------------------------------------------
# Description: Offset: 8b, Width: 8b, Sequence Index, valid number: 0-15
seqId: 0
# -----------------------------------------===== reserved [Optional] =====------------------------------------------
# Description: Offset: 16b, Width: 16b, N/A
reserved: 0
# ---------------------------------------===== configCmdSeqs_2 [Optional] =====---------------------------------------
# Description: Offset: 0x00000028, Width: 32b; [0x020-0x02b] Sequence info for Device Configuration command, similar
# as deviceModeSeq
configCmdSeqs_2:
# ------------------------------------------===== seqNum [Optional] =====-------------------------------------------
# Description: Offset: 0b, Width: 8b, Sequence Number, valid number: 1-16
seqNum: 0
# -------------------------------------------===== seqId [Optional] =====-------------------------------------------
# Description: Offset: 8b, Width: 8b, Sequence Index, valid number: 0-15
seqId: 0
# -----------------------------------------===== reserved [Optional] =====------------------------------------------
# Description: Offset: 16b, Width: 16b, N/A
reserved: 0
# ------------------------------------------===== reserved1 [Optional] =====------------------------------------------
# Description: Offset: 0x0000002C, Width: 32b; [0x02c-0x02f] Reserved for future use
reserved1: '0x00000000'
# ---------------------------------------===== configCmdArgs_0 [Optional] =====---------------------------------------
# Description: Offset: 0x00000030, Width: 32b; [0x030-0x03b] Arguments/Parameters for device Configuration commands
configCmdArgs_0: '0x00000000'
# ---------------------------------------===== configCmdArgs_1 [Optional] =====---------------------------------------
# Description: Offset: 0x00000034, Width: 32b; [0x030-0x03b] Arguments/Parameters for device Configuration commands
configCmdArgs_1: '0x00000000'
# ---------------------------------------===== configCmdArgs_2 [Optional] =====---------------------------------------
# Description: Offset: 0x00000038, Width: 32b; [0x030-0x03b] Arguments/Parameters for device Configuration commands
configCmdArgs_2: '0x00000000'
# ------------------------------------------===== reserved2 [Optional] =====------------------------------------------
# Description: Offset: 0x0000003C, Width: 32b; [0x03c-0x03f] Reserved for future use
reserved2: '0x00000000'
# ------------------------------------===== controllerMiscOption [Optional] =====-------------------------------------
# Description: Offset: 0x00000040, Width: 32b; [0x040-0x043] Controller Misc Options, see Misc feature bit
# definitions for more details
controllerMiscOption: '0x00000000'
# -----------------------------------------===== deviceType [Optional] =====------------------------------------------
# Description: Offset: 0x00000044, Width: 8b; [0x044-0x044] Device Type: See Flash Type Definition for more details
deviceType: '0x00'
# ----------------------------------------===== sflashPadType [Optional] =====----------------------------------------
# Description: Offset: 0x00000045, Width: 8b; [0x045-0x045] Serial Flash Pad Type: 1 - Single, 2 - Dual, 4 - Quad, 8
# - Octal
sflashPadType: '0x00'
# ----------------------------------------===== serialClkFreq [Optional] =====----------------------------------------
# Description: Offset: 0x00000046, Width: 8b; [0x046-0x046] Serial Flash Frequency, device specific definitions, See
# System Boot Chapter for more details
serialClkFreq: '0x00'
# -------------------------------------===== lutCustomSeqEnable [Optional] =====--------------------------------------
# Description: Offset: 0x00000047, Width: 8b; [0x047-0x047] LUT customization Enable, it is required if the
# program/erase cannot be done using 1 LUT sequence, currently, only applicable to HyperFLASH
lutCustomSeqEnable: '0x00'
# -----------------------------------------===== reserved3_0 [Optional] =====-----------------------------------------
# Description: Offset: 0x00000048, Width: 32b; [0x048-0x04f] Reserved for future use
reserved3_0: '0x00000000'
# -----------------------------------------===== reserved3_1 [Optional] =====-----------------------------------------
# Description: Offset: 0x0000004C, Width: 32b; [0x048-0x04f] Reserved for future use
reserved3_1: '0x00000000'
# ----------------------------------------===== sflashA1Size [Optional] =====-----------------------------------------
# Description: Offset: 0x00000050, Width: 32b; [0x050-0x053] Size of Flash connected to A1
sflashA1Size: '0x00000000'
# ----------------------------------------===== sflashA2Size [Optional] =====-----------------------------------------
# Description: Offset: 0x00000054, Width: 32b; [0x054-0x057] Size of Flash connected to A2
sflashA2Size: '0x00000000'
# ----------------------------------------===== sflashB1Size [Optional] =====-----------------------------------------
# Description: Offset: 0x00000058, Width: 32b; [0x058-0x05b] Size of Flash connected to B1
sflashB1Size: '0x00000000'
# ----------------------------------------===== sflashB2Size [Optional] =====-----------------------------------------
# Description: Offset: 0x0000005C, Width: 32b; [0x05c-0x05f] Size of Flash connected to B2
sflashB2Size: '0x00000000'
# ------------------------------------===== csPadSettingOverride [Optional] =====-------------------------------------
# Description: Offset: 0x00000060, Width: 32b; [0x060-0x063] CS pad setting override value
csPadSettingOverride: '0x00000000'
# -----------------------------------===== sclkPadSettingOverride [Optional] =====------------------------------------
# Description: Offset: 0x00000064, Width: 32b; [0x064-0x067] SCK pad setting override value
sclkPadSettingOverride: '0x00000000'
# -----------------------------------===== dataPadSettingOverride [Optional] =====------------------------------------
# Description: Offset: 0x00000068, Width: 32b; [0x068-0x06b] data pad setting override value
dataPadSettingOverride: '0x00000000'
# ------------------------------------===== dqsPadSettingOverride [Optional] =====------------------------------------
# Description: Offset: 0x0000006C, Width: 32b; [0x06c-0x06f] DQS pad setting override value
dqsPadSettingOverride: '0x00000000'
# -----------------------------------------===== timeoutInMs [Optional] =====-----------------------------------------
# Description: Offset: 0x00000070, Width: 32b; [0x070-0x073] Timeout threshold for read status command
timeoutInMs: '0x00000000'
# ---------------------------------------===== commandInterval [Optional] =====---------------------------------------
# Description: Offset: 0x00000074, Width: 32b; [0x074-0x077] CS deselect interval between two commands
commandInterval: '0x00000000'
# ---------------------------------------===== dataValidTime_0 [Optional] =====---------------------------------------
# Description: Offset: 0x00000078, Width: 16b; [0x078-0x07b] CLK edge to data valid time for PORT A and PORT B, in
# terms of 0.1ns
dataValidTime_0: '0x0000'
# ---------------------------------------===== dataValidTime_1 [Optional] =====---------------------------------------
# Description: Offset: 0x0000007A, Width: 16b; [0x078-0x07b] CLK edge to data valid time for PORT A and PORT B, in
# terms of 0.1ns
dataValidTime_1: '0x0000'
# -----------------------------------------===== busyOffset [Optional] =====------------------------------------------
# Description: Offset: 0x0000007C, Width: 16b; [0x07c-0x07d] Busy offset, valid value: 0-31
busyOffset: '0x0000'
# ---------------------------------------===== busyBitPolarity [Optional] =====---------------------------------------
# Description: Offset: 0x0000007E, Width: 16b; [0x07e-0x07f] Busy flag polarity, 0 - busy flag is 1 when flash device
# is busy, 1 - busy flag is 0 when flash device is busy
busyBitPolarity: '0x0000'
# -----------------------------------===== lookupTable_seq0_instr0 [Optional] =====-----------------------------------
# Description: Offset: 0x00000080, Width: 16b; Lookup table holds Flash command sequences 0, instruction 0
lookupTable_seq0_instr0:
# ------------------------------------------===== OPERAND [Optional] =====------------------------------------------
# Description: Offset: 0b, Width: 8b, Instruction operand. Its values depends on used instruction
OPERAND: 0
# -----------------------------------------===== NUM_PADS [Optional] =====------------------------------------------
# Description: Offset: 8b, Width: 2b, Number of pads used by instruction. Some instructions ignores this parameter.
# - 1PAD, (0): Single mode. One pad is used.
# - 2PAD, (1): Dual mode. Two pads are used.
# - 4PAD, (2): Quad mode. Four pads are used.
# - 8PAD, (3): Octal mode. Eight pads are used.
# Possible options: <1PAD, 2PAD, 4PAD, 8PAD>
NUM_PADS: 1PAD
# --------------------------------------===== OPERATION_CODE [Optional] =====---------------------------------------
# Description: Offset: 10b, Width: 6b, Instruction operation code.
# - STOP, (0): Stop execution and de-assert CS. Then, the next command sequence (to the same flash device) starts
# from instruction pointer 0.
# - CMD_SDR, (1): Transmit command code to Flash.
# - RADDR_SDR, (2): Transmit row address to Flash.
# - CADDR_SDR, (3): Transmit column address to Flash.
# - MODE1_SDR, (4): Transmit mode bits to Flash.
# - MODE2_SDR, (5): Transmit mode bits to Flash.
# - MODE4_SDR, (6): Transmit mode bits to Flash.
# - MODE8_SDR, (7): Transmit mode bits to Flash.
# - WRITE_SDR, (8): Transmit program data to Flash device.
# - READ_SDR, (9): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_SDR, (10): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_SDR, (11): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_SDR, (12): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_SDR, (13): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# - JMP_ON_CS, (31): Stop execution, de-assert CS and save operand[7:0] as the instruction start pointer for next
# sequence.Normally this instruction is used to support Execute-In-Place enhanced mode. See XIP enhanced mode for
# more details.This instruction is only allowed for AHB read commands. There is interrupt status bit set
# (INTR[IPCMDERR] or INTR[AHBCMDERR]) when using this instruction in IP command or AHB write command.
# - CMD_DDR, (33): Transmit command code to Flash.
# - RADDR_DDR, (34): Transmit row address to Flash.
# - CADDR_DDR, (35): Transmit column address to Flash.
# - MODE1_DDR, (36): Transmit mode bits to Flash.
# - MODE2_DDR, (37): Transmit mode bits to Flash.
# - MODE4_DDR, (38): Transmit mode bits to Flash.
# - MODE8_DDR, (39): Transmit mode bits to Flash.
# - WRITE_DDR, (40): Transmit program data to Flash device.
# - READ_DDR, (41): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_DDR, (42): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_DDR, (43): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_DDR, (44): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_DDR, (45): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# Possible options: <STOP, CMD_SDR, RADDR_SDR, CADDR_SDR, MODE1_SDR, MODE2_SDR, MODE4_SDR, MODE8_SDR, WRITE_SDR,
# READ_SDR, LEARN_SDR, DATSZ_SDR, DUMMY_SDR, DUMMY_RWDS_SDR, JMP_ON_CS, CMD_DDR, RADDR_DDR, CADDR_DDR, MODE1_DDR,
# MODE2_DDR, MODE4_DDR, MODE8_DDR, WRITE_DDR, READ_DDR, LEARN_DDR, DATSZ_DDR, DUMMY_DDR, DUMMY_RWDS_DDR>
OPERATION_CODE: STOP
lookupTable_seq0_instr1:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq0_instr2:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq0_instr3:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq0_instr4:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq0_instr5:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq0_instr6:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq0_instr7:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
# -----------------------------------===== lookupTable_seq1_instr0 [Optional] =====-----------------------------------
# Description: Offset: 0x00000090, Width: 16b; Lookup table holds Flash command sequences 1, instruction 0
lookupTable_seq1_instr0:
# ------------------------------------------===== OPERAND [Optional] =====------------------------------------------
# Description: Offset: 0b, Width: 8b, Instruction operand. Its values depends on used instruction
OPERAND: 0
# -----------------------------------------===== NUM_PADS [Optional] =====------------------------------------------
# Description: Offset: 8b, Width: 2b, Number of pads used by instruction. Some instructions ignores this parameter.
# - 1PAD, (0): Single mode. One pad is used.
# - 2PAD, (1): Dual mode. Two pads are used.
# - 4PAD, (2): Quad mode. Four pads are used.
# - 8PAD, (3): Octal mode. Eight pads are used.
# Possible options: <1PAD, 2PAD, 4PAD, 8PAD>
NUM_PADS: 1PAD
# --------------------------------------===== OPERATION_CODE [Optional] =====---------------------------------------
# Description: Offset: 10b, Width: 6b, Instruction operation code.
# - STOP, (0): Stop execution and de-assert CS. Then, the next command sequence (to the same flash device) starts
# from instruction pointer 0.
# - CMD_SDR, (1): Transmit command code to Flash.
# - RADDR_SDR, (2): Transmit row address to Flash.
# - CADDR_SDR, (3): Transmit column address to Flash.
# - MODE1_SDR, (4): Transmit mode bits to Flash.
# - MODE2_SDR, (5): Transmit mode bits to Flash.
# - MODE4_SDR, (6): Transmit mode bits to Flash.
# - MODE8_SDR, (7): Transmit mode bits to Flash.
# - WRITE_SDR, (8): Transmit program data to Flash device.
# - READ_SDR, (9): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_SDR, (10): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_SDR, (11): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_SDR, (12): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_SDR, (13): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# - JMP_ON_CS, (31): Stop execution, de-assert CS and save operand[7:0] as the instruction start pointer for next
# sequence.Normally this instruction is used to support Execute-In-Place enhanced mode. See XIP enhanced mode for
# more details.This instruction is only allowed for AHB read commands. There is interrupt status bit set
# (INTR[IPCMDERR] or INTR[AHBCMDERR]) when using this instruction in IP command or AHB write command.
# - CMD_DDR, (33): Transmit command code to Flash.
# - RADDR_DDR, (34): Transmit row address to Flash.
# - CADDR_DDR, (35): Transmit column address to Flash.
# - MODE1_DDR, (36): Transmit mode bits to Flash.
# - MODE2_DDR, (37): Transmit mode bits to Flash.
# - MODE4_DDR, (38): Transmit mode bits to Flash.
# - MODE8_DDR, (39): Transmit mode bits to Flash.
# - WRITE_DDR, (40): Transmit program data to Flash device.
# - READ_DDR, (41): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_DDR, (42): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_DDR, (43): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_DDR, (44): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_DDR, (45): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# Possible options: <STOP, CMD_SDR, RADDR_SDR, CADDR_SDR, MODE1_SDR, MODE2_SDR, MODE4_SDR, MODE8_SDR, WRITE_SDR,
# READ_SDR, LEARN_SDR, DATSZ_SDR, DUMMY_SDR, DUMMY_RWDS_SDR, JMP_ON_CS, CMD_DDR, RADDR_DDR, CADDR_DDR, MODE1_DDR,
# MODE2_DDR, MODE4_DDR, MODE8_DDR, WRITE_DDR, READ_DDR, LEARN_DDR, DATSZ_DDR, DUMMY_DDR, DUMMY_RWDS_DDR>
OPERATION_CODE: STOP
lookupTable_seq1_instr1:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq1_instr2:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq1_instr3:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq1_instr4:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq1_instr5:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq1_instr6:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq1_instr7:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
# -----------------------------------===== lookupTable_seq2_instr0 [Optional] =====-----------------------------------
# Description: Offset: 0x000000A0, Width: 16b; Lookup table holds Flash command sequences 2, instruction 0
lookupTable_seq2_instr0:
# ------------------------------------------===== OPERAND [Optional] =====------------------------------------------
# Description: Offset: 0b, Width: 8b, Instruction operand. Its values depends on used instruction
OPERAND: 0
# -----------------------------------------===== NUM_PADS [Optional] =====------------------------------------------
# Description: Offset: 8b, Width: 2b, Number of pads used by instruction. Some instructions ignores this parameter.
# - 1PAD, (0): Single mode. One pad is used.
# - 2PAD, (1): Dual mode. Two pads are used.
# - 4PAD, (2): Quad mode. Four pads are used.
# - 8PAD, (3): Octal mode. Eight pads are used.
# Possible options: <1PAD, 2PAD, 4PAD, 8PAD>
NUM_PADS: 1PAD
# --------------------------------------===== OPERATION_CODE [Optional] =====---------------------------------------
# Description: Offset: 10b, Width: 6b, Instruction operation code.
# - STOP, (0): Stop execution and de-assert CS. Then, the next command sequence (to the same flash device) starts
# from instruction pointer 0.
# - CMD_SDR, (1): Transmit command code to Flash.
# - RADDR_SDR, (2): Transmit row address to Flash.
# - CADDR_SDR, (3): Transmit column address to Flash.
# - MODE1_SDR, (4): Transmit mode bits to Flash.
# - MODE2_SDR, (5): Transmit mode bits to Flash.
# - MODE4_SDR, (6): Transmit mode bits to Flash.
# - MODE8_SDR, (7): Transmit mode bits to Flash.
# - WRITE_SDR, (8): Transmit program data to Flash device.
# - READ_SDR, (9): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_SDR, (10): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_SDR, (11): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_SDR, (12): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_SDR, (13): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# - JMP_ON_CS, (31): Stop execution, de-assert CS and save operand[7:0] as the instruction start pointer for next
# sequence.Normally this instruction is used to support Execute-In-Place enhanced mode. See XIP enhanced mode for
# more details.This instruction is only allowed for AHB read commands. There is interrupt status bit set
# (INTR[IPCMDERR] or INTR[AHBCMDERR]) when using this instruction in IP command or AHB write command.
# - CMD_DDR, (33): Transmit command code to Flash.
# - RADDR_DDR, (34): Transmit row address to Flash.
# - CADDR_DDR, (35): Transmit column address to Flash.
# - MODE1_DDR, (36): Transmit mode bits to Flash.
# - MODE2_DDR, (37): Transmit mode bits to Flash.
# - MODE4_DDR, (38): Transmit mode bits to Flash.
# - MODE8_DDR, (39): Transmit mode bits to Flash.
# - WRITE_DDR, (40): Transmit program data to Flash device.
# - READ_DDR, (41): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_DDR, (42): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_DDR, (43): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_DDR, (44): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_DDR, (45): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# Possible options: <STOP, CMD_SDR, RADDR_SDR, CADDR_SDR, MODE1_SDR, MODE2_SDR, MODE4_SDR, MODE8_SDR, WRITE_SDR,
# READ_SDR, LEARN_SDR, DATSZ_SDR, DUMMY_SDR, DUMMY_RWDS_SDR, JMP_ON_CS, CMD_DDR, RADDR_DDR, CADDR_DDR, MODE1_DDR,
# MODE2_DDR, MODE4_DDR, MODE8_DDR, WRITE_DDR, READ_DDR, LEARN_DDR, DATSZ_DDR, DUMMY_DDR, DUMMY_RWDS_DDR>
OPERATION_CODE: STOP
lookupTable_seq2_instr1:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq2_instr2:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq2_instr3:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq2_instr4:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq2_instr5:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq2_instr6:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq2_instr7:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
# -----------------------------------===== lookupTable_seq3_instr0 [Optional] =====-----------------------------------
# Description: Offset: 0x000000B0, Width: 16b; Lookup table holds Flash command sequences 3, instruction 0
lookupTable_seq3_instr0:
# ------------------------------------------===== OPERAND [Optional] =====------------------------------------------
# Description: Offset: 0b, Width: 8b, Instruction operand. Its values depends on used instruction
OPERAND: 0
# -----------------------------------------===== NUM_PADS [Optional] =====------------------------------------------
# Description: Offset: 8b, Width: 2b, Number of pads used by instruction. Some instructions ignores this parameter.
# - 1PAD, (0): Single mode. One pad is used.
# - 2PAD, (1): Dual mode. Two pads are used.
# - 4PAD, (2): Quad mode. Four pads are used.
# - 8PAD, (3): Octal mode. Eight pads are used.
# Possible options: <1PAD, 2PAD, 4PAD, 8PAD>
NUM_PADS: 1PAD
# --------------------------------------===== OPERATION_CODE [Optional] =====---------------------------------------
# Description: Offset: 10b, Width: 6b, Instruction operation code.
# - STOP, (0): Stop execution and de-assert CS. Then, the next command sequence (to the same flash device) starts
# from instruction pointer 0.
# - CMD_SDR, (1): Transmit command code to Flash.
# - RADDR_SDR, (2): Transmit row address to Flash.
# - CADDR_SDR, (3): Transmit column address to Flash.
# - MODE1_SDR, (4): Transmit mode bits to Flash.
# - MODE2_SDR, (5): Transmit mode bits to Flash.
# - MODE4_SDR, (6): Transmit mode bits to Flash.
# - MODE8_SDR, (7): Transmit mode bits to Flash.
# - WRITE_SDR, (8): Transmit program data to Flash device.
# - READ_SDR, (9): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_SDR, (10): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_SDR, (11): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_SDR, (12): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_SDR, (13): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# - JMP_ON_CS, (31): Stop execution, de-assert CS and save operand[7:0] as the instruction start pointer for next
# sequence.Normally this instruction is used to support Execute-In-Place enhanced mode. See XIP enhanced mode for
# more details.This instruction is only allowed for AHB read commands. There is interrupt status bit set
# (INTR[IPCMDERR] or INTR[AHBCMDERR]) when using this instruction in IP command or AHB write command.
# - CMD_DDR, (33): Transmit command code to Flash.
# - RADDR_DDR, (34): Transmit row address to Flash.
# - CADDR_DDR, (35): Transmit column address to Flash.
# - MODE1_DDR, (36): Transmit mode bits to Flash.
# - MODE2_DDR, (37): Transmit mode bits to Flash.
# - MODE4_DDR, (38): Transmit mode bits to Flash.
# - MODE8_DDR, (39): Transmit mode bits to Flash.
# - WRITE_DDR, (40): Transmit program data to Flash device.
# - READ_DDR, (41): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_DDR, (42): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_DDR, (43): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_DDR, (44): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_DDR, (45): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# Possible options: <STOP, CMD_SDR, RADDR_SDR, CADDR_SDR, MODE1_SDR, MODE2_SDR, MODE4_SDR, MODE8_SDR, WRITE_SDR,
# READ_SDR, LEARN_SDR, DATSZ_SDR, DUMMY_SDR, DUMMY_RWDS_SDR, JMP_ON_CS, CMD_DDR, RADDR_DDR, CADDR_DDR, MODE1_DDR,
# MODE2_DDR, MODE4_DDR, MODE8_DDR, WRITE_DDR, READ_DDR, LEARN_DDR, DATSZ_DDR, DUMMY_DDR, DUMMY_RWDS_DDR>
OPERATION_CODE: STOP
lookupTable_seq3_instr1:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq3_instr2:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq3_instr3:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq3_instr4:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq3_instr5:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq3_instr6:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq3_instr7:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
# -----------------------------------===== lookupTable_seq4_instr0 [Optional] =====-----------------------------------
# Description: Offset: 0x000000C0, Width: 16b; Lookup table holds Flash command sequences 4, instruction 0
lookupTable_seq4_instr0:
# ------------------------------------------===== OPERAND [Optional] =====------------------------------------------
# Description: Offset: 0b, Width: 8b, Instruction operand. Its values depends on used instruction
OPERAND: 0
# -----------------------------------------===== NUM_PADS [Optional] =====------------------------------------------
# Description: Offset: 8b, Width: 2b, Number of pads used by instruction. Some instructions ignores this parameter.
# - 1PAD, (0): Single mode. One pad is used.
# - 2PAD, (1): Dual mode. Two pads are used.
# - 4PAD, (2): Quad mode. Four pads are used.
# - 8PAD, (3): Octal mode. Eight pads are used.
# Possible options: <1PAD, 2PAD, 4PAD, 8PAD>
NUM_PADS: 1PAD
# --------------------------------------===== OPERATION_CODE [Optional] =====---------------------------------------
# Description: Offset: 10b, Width: 6b, Instruction operation code.
# - STOP, (0): Stop execution and de-assert CS. Then, the next command sequence (to the same flash device) starts
# from instruction pointer 0.
# - CMD_SDR, (1): Transmit command code to Flash.
# - RADDR_SDR, (2): Transmit row address to Flash.
# - CADDR_SDR, (3): Transmit column address to Flash.
# - MODE1_SDR, (4): Transmit mode bits to Flash.
# - MODE2_SDR, (5): Transmit mode bits to Flash.
# - MODE4_SDR, (6): Transmit mode bits to Flash.
# - MODE8_SDR, (7): Transmit mode bits to Flash.
# - WRITE_SDR, (8): Transmit program data to Flash device.
# - READ_SDR, (9): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_SDR, (10): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_SDR, (11): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_SDR, (12): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_SDR, (13): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# - JMP_ON_CS, (31): Stop execution, de-assert CS and save operand[7:0] as the instruction start pointer for next
# sequence.Normally this instruction is used to support Execute-In-Place enhanced mode. See XIP enhanced mode for
# more details.This instruction is only allowed for AHB read commands. There is interrupt status bit set
# (INTR[IPCMDERR] or INTR[AHBCMDERR]) when using this instruction in IP command or AHB write command.
# - CMD_DDR, (33): Transmit command code to Flash.
# - RADDR_DDR, (34): Transmit row address to Flash.
# - CADDR_DDR, (35): Transmit column address to Flash.
# - MODE1_DDR, (36): Transmit mode bits to Flash.
# - MODE2_DDR, (37): Transmit mode bits to Flash.
# - MODE4_DDR, (38): Transmit mode bits to Flash.
# - MODE8_DDR, (39): Transmit mode bits to Flash.
# - WRITE_DDR, (40): Transmit program data to Flash device.
# - READ_DDR, (41): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_DDR, (42): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_DDR, (43): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_DDR, (44): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_DDR, (45): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# Possible options: <STOP, CMD_SDR, RADDR_SDR, CADDR_SDR, MODE1_SDR, MODE2_SDR, MODE4_SDR, MODE8_SDR, WRITE_SDR,
# READ_SDR, LEARN_SDR, DATSZ_SDR, DUMMY_SDR, DUMMY_RWDS_SDR, JMP_ON_CS, CMD_DDR, RADDR_DDR, CADDR_DDR, MODE1_DDR,
# MODE2_DDR, MODE4_DDR, MODE8_DDR, WRITE_DDR, READ_DDR, LEARN_DDR, DATSZ_DDR, DUMMY_DDR, DUMMY_RWDS_DDR>
OPERATION_CODE: STOP
lookupTable_seq4_instr1:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq4_instr2:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq4_instr3:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq4_instr4:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq4_instr5:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq4_instr6:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq4_instr7:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
# -----------------------------------===== lookupTable_seq5_instr0 [Optional] =====-----------------------------------
# Description: Offset: 0x000000D0, Width: 16b; Lookup table holds Flash command sequences 5, instruction 0
lookupTable_seq5_instr0:
# ------------------------------------------===== OPERAND [Optional] =====------------------------------------------
# Description: Offset: 0b, Width: 8b, Instruction operand. Its values depends on used instruction
OPERAND: 0
# -----------------------------------------===== NUM_PADS [Optional] =====------------------------------------------
# Description: Offset: 8b, Width: 2b, Number of pads used by instruction. Some instructions ignores this parameter.
# - 1PAD, (0): Single mode. One pad is used.
# - 2PAD, (1): Dual mode. Two pads are used.
# - 4PAD, (2): Quad mode. Four pads are used.
# - 8PAD, (3): Octal mode. Eight pads are used.
# Possible options: <1PAD, 2PAD, 4PAD, 8PAD>
NUM_PADS: 1PAD
# --------------------------------------===== OPERATION_CODE [Optional] =====---------------------------------------
# Description: Offset: 10b, Width: 6b, Instruction operation code.
# - STOP, (0): Stop execution and de-assert CS. Then, the next command sequence (to the same flash device) starts
# from instruction pointer 0.
# - CMD_SDR, (1): Transmit command code to Flash.
# - RADDR_SDR, (2): Transmit row address to Flash.
# - CADDR_SDR, (3): Transmit column address to Flash.
# - MODE1_SDR, (4): Transmit mode bits to Flash.
# - MODE2_SDR, (5): Transmit mode bits to Flash.
# - MODE4_SDR, (6): Transmit mode bits to Flash.
# - MODE8_SDR, (7): Transmit mode bits to Flash.
# - WRITE_SDR, (8): Transmit program data to Flash device.
# - READ_SDR, (9): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_SDR, (10): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_SDR, (11): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_SDR, (12): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_SDR, (13): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# - JMP_ON_CS, (31): Stop execution, de-assert CS and save operand[7:0] as the instruction start pointer for next
# sequence.Normally this instruction is used to support Execute-In-Place enhanced mode. See XIP enhanced mode for
# more details.This instruction is only allowed for AHB read commands. There is interrupt status bit set
# (INTR[IPCMDERR] or INTR[AHBCMDERR]) when using this instruction in IP command or AHB write command.
# - CMD_DDR, (33): Transmit command code to Flash.
# - RADDR_DDR, (34): Transmit row address to Flash.
# - CADDR_DDR, (35): Transmit column address to Flash.
# - MODE1_DDR, (36): Transmit mode bits to Flash.
# - MODE2_DDR, (37): Transmit mode bits to Flash.
# - MODE4_DDR, (38): Transmit mode bits to Flash.
# - MODE8_DDR, (39): Transmit mode bits to Flash.
# - WRITE_DDR, (40): Transmit program data to Flash device.
# - READ_DDR, (41): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_DDR, (42): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_DDR, (43): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_DDR, (44): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_DDR, (45): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# Possible options: <STOP, CMD_SDR, RADDR_SDR, CADDR_SDR, MODE1_SDR, MODE2_SDR, MODE4_SDR, MODE8_SDR, WRITE_SDR,
# READ_SDR, LEARN_SDR, DATSZ_SDR, DUMMY_SDR, DUMMY_RWDS_SDR, JMP_ON_CS, CMD_DDR, RADDR_DDR, CADDR_DDR, MODE1_DDR,
# MODE2_DDR, MODE4_DDR, MODE8_DDR, WRITE_DDR, READ_DDR, LEARN_DDR, DATSZ_DDR, DUMMY_DDR, DUMMY_RWDS_DDR>
OPERATION_CODE: STOP
lookupTable_seq5_instr1:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq5_instr2:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq5_instr3:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq5_instr4:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq5_instr5:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq5_instr6:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq5_instr7:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
# -----------------------------------===== lookupTable_seq6_instr0 [Optional] =====-----------------------------------
# Description: Offset: 0x000000E0, Width: 16b; Lookup table holds Flash command sequences 6, instruction 0
lookupTable_seq6_instr0:
# ------------------------------------------===== OPERAND [Optional] =====------------------------------------------
# Description: Offset: 0b, Width: 8b, Instruction operand. Its values depends on used instruction
OPERAND: 0
# -----------------------------------------===== NUM_PADS [Optional] =====------------------------------------------
# Description: Offset: 8b, Width: 2b, Number of pads used by instruction. Some instructions ignores this parameter.
# - 1PAD, (0): Single mode. One pad is used.
# - 2PAD, (1): Dual mode. Two pads are used.
# - 4PAD, (2): Quad mode. Four pads are used.
# - 8PAD, (3): Octal mode. Eight pads are used.
# Possible options: <1PAD, 2PAD, 4PAD, 8PAD>
NUM_PADS: 1PAD
# --------------------------------------===== OPERATION_CODE [Optional] =====---------------------------------------
# Description: Offset: 10b, Width: 6b, Instruction operation code.
# - STOP, (0): Stop execution and de-assert CS. Then, the next command sequence (to the same flash device) starts
# from instruction pointer 0.
# - CMD_SDR, (1): Transmit command code to Flash.
# - RADDR_SDR, (2): Transmit row address to Flash.
# - CADDR_SDR, (3): Transmit column address to Flash.
# - MODE1_SDR, (4): Transmit mode bits to Flash.
# - MODE2_SDR, (5): Transmit mode bits to Flash.
# - MODE4_SDR, (6): Transmit mode bits to Flash.
# - MODE8_SDR, (7): Transmit mode bits to Flash.
# - WRITE_SDR, (8): Transmit program data to Flash device.
# - READ_SDR, (9): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_SDR, (10): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_SDR, (11): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_SDR, (12): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_SDR, (13): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# - JMP_ON_CS, (31): Stop execution, de-assert CS and save operand[7:0] as the instruction start pointer for next
# sequence.Normally this instruction is used to support Execute-In-Place enhanced mode. See XIP enhanced mode for
# more details.This instruction is only allowed for AHB read commands. There is interrupt status bit set
# (INTR[IPCMDERR] or INTR[AHBCMDERR]) when using this instruction in IP command or AHB write command.
# - CMD_DDR, (33): Transmit command code to Flash.
# - RADDR_DDR, (34): Transmit row address to Flash.
# - CADDR_DDR, (35): Transmit column address to Flash.
# - MODE1_DDR, (36): Transmit mode bits to Flash.
# - MODE2_DDR, (37): Transmit mode bits to Flash.
# - MODE4_DDR, (38): Transmit mode bits to Flash.
# - MODE8_DDR, (39): Transmit mode bits to Flash.
# - WRITE_DDR, (40): Transmit program data to Flash device.
# - READ_DDR, (41): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_DDR, (42): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_DDR, (43): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_DDR, (44): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_DDR, (45): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# Possible options: <STOP, CMD_SDR, RADDR_SDR, CADDR_SDR, MODE1_SDR, MODE2_SDR, MODE4_SDR, MODE8_SDR, WRITE_SDR,
# READ_SDR, LEARN_SDR, DATSZ_SDR, DUMMY_SDR, DUMMY_RWDS_SDR, JMP_ON_CS, CMD_DDR, RADDR_DDR, CADDR_DDR, MODE1_DDR,
# MODE2_DDR, MODE4_DDR, MODE8_DDR, WRITE_DDR, READ_DDR, LEARN_DDR, DATSZ_DDR, DUMMY_DDR, DUMMY_RWDS_DDR>
OPERATION_CODE: STOP
lookupTable_seq6_instr1:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq6_instr2:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq6_instr3:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq6_instr4:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq6_instr5:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq6_instr6:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq6_instr7:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
# -----------------------------------===== lookupTable_seq7_instr0 [Optional] =====-----------------------------------
# Description: Offset: 0x000000F0, Width: 16b; Lookup table holds Flash command sequences 7, instruction 0
lookupTable_seq7_instr0:
# ------------------------------------------===== OPERAND [Optional] =====------------------------------------------
# Description: Offset: 0b, Width: 8b, Instruction operand. Its values depends on used instruction
OPERAND: 0
# -----------------------------------------===== NUM_PADS [Optional] =====------------------------------------------
# Description: Offset: 8b, Width: 2b, Number of pads used by instruction. Some instructions ignores this parameter.
# - 1PAD, (0): Single mode. One pad is used.
# - 2PAD, (1): Dual mode. Two pads are used.
# - 4PAD, (2): Quad mode. Four pads are used.
# - 8PAD, (3): Octal mode. Eight pads are used.
# Possible options: <1PAD, 2PAD, 4PAD, 8PAD>
NUM_PADS: 1PAD
# --------------------------------------===== OPERATION_CODE [Optional] =====---------------------------------------
# Description: Offset: 10b, Width: 6b, Instruction operation code.
# - STOP, (0): Stop execution and de-assert CS. Then, the next command sequence (to the same flash device) starts
# from instruction pointer 0.
# - CMD_SDR, (1): Transmit command code to Flash.
# - RADDR_SDR, (2): Transmit row address to Flash.
# - CADDR_SDR, (3): Transmit column address to Flash.
# - MODE1_SDR, (4): Transmit mode bits to Flash.
# - MODE2_SDR, (5): Transmit mode bits to Flash.
# - MODE4_SDR, (6): Transmit mode bits to Flash.
# - MODE8_SDR, (7): Transmit mode bits to Flash.
# - WRITE_SDR, (8): Transmit program data to Flash device.
# - READ_SDR, (9): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_SDR, (10): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_SDR, (11): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_SDR, (12): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_SDR, (13): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# - JMP_ON_CS, (31): Stop execution, de-assert CS and save operand[7:0] as the instruction start pointer for next
# sequence.Normally this instruction is used to support Execute-In-Place enhanced mode. See XIP enhanced mode for
# more details.This instruction is only allowed for AHB read commands. There is interrupt status bit set
# (INTR[IPCMDERR] or INTR[AHBCMDERR]) when using this instruction in IP command or AHB write command.
# - CMD_DDR, (33): Transmit command code to Flash.
# - RADDR_DDR, (34): Transmit row address to Flash.
# - CADDR_DDR, (35): Transmit column address to Flash.
# - MODE1_DDR, (36): Transmit mode bits to Flash.
# - MODE2_DDR, (37): Transmit mode bits to Flash.
# - MODE4_DDR, (38): Transmit mode bits to Flash.
# - MODE8_DDR, (39): Transmit mode bits to Flash.
# - WRITE_DDR, (40): Transmit program data to Flash device.
# - READ_DDR, (41): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_DDR, (42): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_DDR, (43): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_DDR, (44): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_DDR, (45): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# Possible options: <STOP, CMD_SDR, RADDR_SDR, CADDR_SDR, MODE1_SDR, MODE2_SDR, MODE4_SDR, MODE8_SDR, WRITE_SDR,
# READ_SDR, LEARN_SDR, DATSZ_SDR, DUMMY_SDR, DUMMY_RWDS_SDR, JMP_ON_CS, CMD_DDR, RADDR_DDR, CADDR_DDR, MODE1_DDR,
# MODE2_DDR, MODE4_DDR, MODE8_DDR, WRITE_DDR, READ_DDR, LEARN_DDR, DATSZ_DDR, DUMMY_DDR, DUMMY_RWDS_DDR>
OPERATION_CODE: STOP
lookupTable_seq7_instr1:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq7_instr2:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq7_instr3:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq7_instr4:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq7_instr5:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq7_instr6:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq7_instr7:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
# -----------------------------------===== lookupTable_seq8_instr0 [Optional] =====-----------------------------------
# Description: Offset: 0x00000100, Width: 16b; Lookup table holds Flash command sequences 8, instruction 0
lookupTable_seq8_instr0:
# ------------------------------------------===== OPERAND [Optional] =====------------------------------------------
# Description: Offset: 0b, Width: 8b, Instruction operand. Its values depends on used instruction
OPERAND: 0
# -----------------------------------------===== NUM_PADS [Optional] =====------------------------------------------
# Description: Offset: 8b, Width: 2b, Number of pads used by instruction. Some instructions ignores this parameter.
# - 1PAD, (0): Single mode. One pad is used.
# - 2PAD, (1): Dual mode. Two pads are used.
# - 4PAD, (2): Quad mode. Four pads are used.
# - 8PAD, (3): Octal mode. Eight pads are used.
# Possible options: <1PAD, 2PAD, 4PAD, 8PAD>
NUM_PADS: 1PAD
# --------------------------------------===== OPERATION_CODE [Optional] =====---------------------------------------
# Description: Offset: 10b, Width: 6b, Instruction operation code.
# - STOP, (0): Stop execution and de-assert CS. Then, the next command sequence (to the same flash device) starts
# from instruction pointer 0.
# - CMD_SDR, (1): Transmit command code to Flash.
# - RADDR_SDR, (2): Transmit row address to Flash.
# - CADDR_SDR, (3): Transmit column address to Flash.
# - MODE1_SDR, (4): Transmit mode bits to Flash.
# - MODE2_SDR, (5): Transmit mode bits to Flash.
# - MODE4_SDR, (6): Transmit mode bits to Flash.
# - MODE8_SDR, (7): Transmit mode bits to Flash.
# - WRITE_SDR, (8): Transmit program data to Flash device.
# - READ_SDR, (9): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_SDR, (10): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_SDR, (11): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_SDR, (12): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_SDR, (13): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# - JMP_ON_CS, (31): Stop execution, de-assert CS and save operand[7:0] as the instruction start pointer for next
# sequence.Normally this instruction is used to support Execute-In-Place enhanced mode. See XIP enhanced mode for
# more details.This instruction is only allowed for AHB read commands. There is interrupt status bit set
# (INTR[IPCMDERR] or INTR[AHBCMDERR]) when using this instruction in IP command or AHB write command.
# - CMD_DDR, (33): Transmit command code to Flash.
# - RADDR_DDR, (34): Transmit row address to Flash.
# - CADDR_DDR, (35): Transmit column address to Flash.
# - MODE1_DDR, (36): Transmit mode bits to Flash.
# - MODE2_DDR, (37): Transmit mode bits to Flash.
# - MODE4_DDR, (38): Transmit mode bits to Flash.
# - MODE8_DDR, (39): Transmit mode bits to Flash.
# - WRITE_DDR, (40): Transmit program data to Flash device.
# - READ_DDR, (41): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_DDR, (42): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_DDR, (43): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_DDR, (44): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_DDR, (45): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# Possible options: <STOP, CMD_SDR, RADDR_SDR, CADDR_SDR, MODE1_SDR, MODE2_SDR, MODE4_SDR, MODE8_SDR, WRITE_SDR,
# READ_SDR, LEARN_SDR, DATSZ_SDR, DUMMY_SDR, DUMMY_RWDS_SDR, JMP_ON_CS, CMD_DDR, RADDR_DDR, CADDR_DDR, MODE1_DDR,
# MODE2_DDR, MODE4_DDR, MODE8_DDR, WRITE_DDR, READ_DDR, LEARN_DDR, DATSZ_DDR, DUMMY_DDR, DUMMY_RWDS_DDR>
OPERATION_CODE: STOP
lookupTable_seq8_instr1:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq8_instr2:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq8_instr3:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq8_instr4:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq8_instr5:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq8_instr6:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq8_instr7:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
# -----------------------------------===== lookupTable_seq9_instr0 [Optional] =====-----------------------------------
# Description: Offset: 0x00000110, Width: 16b; Lookup table holds Flash command sequences 9, instruction 0
lookupTable_seq9_instr0:
# ------------------------------------------===== OPERAND [Optional] =====------------------------------------------
# Description: Offset: 0b, Width: 8b, Instruction operand. Its values depends on used instruction
OPERAND: 0
# -----------------------------------------===== NUM_PADS [Optional] =====------------------------------------------
# Description: Offset: 8b, Width: 2b, Number of pads used by instruction. Some instructions ignores this parameter.
# - 1PAD, (0): Single mode. One pad is used.
# - 2PAD, (1): Dual mode. Two pads are used.
# - 4PAD, (2): Quad mode. Four pads are used.
# - 8PAD, (3): Octal mode. Eight pads are used.
# Possible options: <1PAD, 2PAD, 4PAD, 8PAD>
NUM_PADS: 1PAD
# --------------------------------------===== OPERATION_CODE [Optional] =====---------------------------------------
# Description: Offset: 10b, Width: 6b, Instruction operation code.
# - STOP, (0): Stop execution and de-assert CS. Then, the next command sequence (to the same flash device) starts
# from instruction pointer 0.
# - CMD_SDR, (1): Transmit command code to Flash.
# - RADDR_SDR, (2): Transmit row address to Flash.
# - CADDR_SDR, (3): Transmit column address to Flash.
# - MODE1_SDR, (4): Transmit mode bits to Flash.
# - MODE2_SDR, (5): Transmit mode bits to Flash.
# - MODE4_SDR, (6): Transmit mode bits to Flash.
# - MODE8_SDR, (7): Transmit mode bits to Flash.
# - WRITE_SDR, (8): Transmit program data to Flash device.
# - READ_SDR, (9): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_SDR, (10): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_SDR, (11): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_SDR, (12): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_SDR, (13): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# - JMP_ON_CS, (31): Stop execution, de-assert CS and save operand[7:0] as the instruction start pointer for next
# sequence.Normally this instruction is used to support Execute-In-Place enhanced mode. See XIP enhanced mode for
# more details.This instruction is only allowed for AHB read commands. There is interrupt status bit set
# (INTR[IPCMDERR] or INTR[AHBCMDERR]) when using this instruction in IP command or AHB write command.
# - CMD_DDR, (33): Transmit command code to Flash.
# - RADDR_DDR, (34): Transmit row address to Flash.
# - CADDR_DDR, (35): Transmit column address to Flash.
# - MODE1_DDR, (36): Transmit mode bits to Flash.
# - MODE2_DDR, (37): Transmit mode bits to Flash.
# - MODE4_DDR, (38): Transmit mode bits to Flash.
# - MODE8_DDR, (39): Transmit mode bits to Flash.
# - WRITE_DDR, (40): Transmit program data to Flash device.
# - READ_DDR, (41): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_DDR, (42): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_DDR, (43): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_DDR, (44): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_DDR, (45): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# Possible options: <STOP, CMD_SDR, RADDR_SDR, CADDR_SDR, MODE1_SDR, MODE2_SDR, MODE4_SDR, MODE8_SDR, WRITE_SDR,
# READ_SDR, LEARN_SDR, DATSZ_SDR, DUMMY_SDR, DUMMY_RWDS_SDR, JMP_ON_CS, CMD_DDR, RADDR_DDR, CADDR_DDR, MODE1_DDR,
# MODE2_DDR, MODE4_DDR, MODE8_DDR, WRITE_DDR, READ_DDR, LEARN_DDR, DATSZ_DDR, DUMMY_DDR, DUMMY_RWDS_DDR>
OPERATION_CODE: STOP
lookupTable_seq9_instr1:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq9_instr2:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq9_instr3:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq9_instr4:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq9_instr5:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq9_instr6:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq9_instr7:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
# ----------------------------------===== lookupTable_seq10_instr0 [Optional] =====-----------------------------------
# Description: Offset: 0x00000120, Width: 16b; Lookup table holds Flash command sequences 10, instruction 0
lookupTable_seq10_instr0:
# ------------------------------------------===== OPERAND [Optional] =====------------------------------------------
# Description: Offset: 0b, Width: 8b, Instruction operand. Its values depends on used instruction
OPERAND: 0
# -----------------------------------------===== NUM_PADS [Optional] =====------------------------------------------
# Description: Offset: 8b, Width: 2b, Number of pads used by instruction. Some instructions ignores this parameter.
# - 1PAD, (0): Single mode. One pad is used.
# - 2PAD, (1): Dual mode. Two pads are used.
# - 4PAD, (2): Quad mode. Four pads are used.
# - 8PAD, (3): Octal mode. Eight pads are used.
# Possible options: <1PAD, 2PAD, 4PAD, 8PAD>
NUM_PADS: 1PAD
# --------------------------------------===== OPERATION_CODE [Optional] =====---------------------------------------
# Description: Offset: 10b, Width: 6b, Instruction operation code.
# - STOP, (0): Stop execution and de-assert CS. Then, the next command sequence (to the same flash device) starts
# from instruction pointer 0.
# - CMD_SDR, (1): Transmit command code to Flash.
# - RADDR_SDR, (2): Transmit row address to Flash.
# - CADDR_SDR, (3): Transmit column address to Flash.
# - MODE1_SDR, (4): Transmit mode bits to Flash.
# - MODE2_SDR, (5): Transmit mode bits to Flash.
# - MODE4_SDR, (6): Transmit mode bits to Flash.
# - MODE8_SDR, (7): Transmit mode bits to Flash.
# - WRITE_SDR, (8): Transmit program data to Flash device.
# - READ_SDR, (9): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_SDR, (10): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_SDR, (11): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_SDR, (12): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_SDR, (13): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# - JMP_ON_CS, (31): Stop execution, de-assert CS and save operand[7:0] as the instruction start pointer for next
# sequence.Normally this instruction is used to support Execute-In-Place enhanced mode. See XIP enhanced mode for
# more details.This instruction is only allowed for AHB read commands. There is interrupt status bit set
# (INTR[IPCMDERR] or INTR[AHBCMDERR]) when using this instruction in IP command or AHB write command.
# - CMD_DDR, (33): Transmit command code to Flash.
# - RADDR_DDR, (34): Transmit row address to Flash.
# - CADDR_DDR, (35): Transmit column address to Flash.
# - MODE1_DDR, (36): Transmit mode bits to Flash.
# - MODE2_DDR, (37): Transmit mode bits to Flash.
# - MODE4_DDR, (38): Transmit mode bits to Flash.
# - MODE8_DDR, (39): Transmit mode bits to Flash.
# - WRITE_DDR, (40): Transmit program data to Flash device.
# - READ_DDR, (41): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_DDR, (42): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_DDR, (43): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_DDR, (44): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_DDR, (45): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# Possible options: <STOP, CMD_SDR, RADDR_SDR, CADDR_SDR, MODE1_SDR, MODE2_SDR, MODE4_SDR, MODE8_SDR, WRITE_SDR,
# READ_SDR, LEARN_SDR, DATSZ_SDR, DUMMY_SDR, DUMMY_RWDS_SDR, JMP_ON_CS, CMD_DDR, RADDR_DDR, CADDR_DDR, MODE1_DDR,
# MODE2_DDR, MODE4_DDR, MODE8_DDR, WRITE_DDR, READ_DDR, LEARN_DDR, DATSZ_DDR, DUMMY_DDR, DUMMY_RWDS_DDR>
OPERATION_CODE: STOP
lookupTable_seq10_instr1:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq10_instr2:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq10_instr3:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq10_instr4:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq10_instr5:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq10_instr6:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq10_instr7:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
# ----------------------------------===== lookupTable_seq11_instr0 [Optional] =====-----------------------------------
# Description: Offset: 0x00000130, Width: 16b; Lookup table holds Flash command sequences 11, instruction 0
lookupTable_seq11_instr0:
# ------------------------------------------===== OPERAND [Optional] =====------------------------------------------
# Description: Offset: 0b, Width: 8b, Instruction operand. Its values depends on used instruction
OPERAND: 0
# -----------------------------------------===== NUM_PADS [Optional] =====------------------------------------------
# Description: Offset: 8b, Width: 2b, Number of pads used by instruction. Some instructions ignores this parameter.
# - 1PAD, (0): Single mode. One pad is used.
# - 2PAD, (1): Dual mode. Two pads are used.
# - 4PAD, (2): Quad mode. Four pads are used.
# - 8PAD, (3): Octal mode. Eight pads are used.
# Possible options: <1PAD, 2PAD, 4PAD, 8PAD>
NUM_PADS: 1PAD
# --------------------------------------===== OPERATION_CODE [Optional] =====---------------------------------------
# Description: Offset: 10b, Width: 6b, Instruction operation code.
# - STOP, (0): Stop execution and de-assert CS. Then, the next command sequence (to the same flash device) starts
# from instruction pointer 0.
# - CMD_SDR, (1): Transmit command code to Flash.
# - RADDR_SDR, (2): Transmit row address to Flash.
# - CADDR_SDR, (3): Transmit column address to Flash.
# - MODE1_SDR, (4): Transmit mode bits to Flash.
# - MODE2_SDR, (5): Transmit mode bits to Flash.
# - MODE4_SDR, (6): Transmit mode bits to Flash.
# - MODE8_SDR, (7): Transmit mode bits to Flash.
# - WRITE_SDR, (8): Transmit program data to Flash device.
# - READ_SDR, (9): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_SDR, (10): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_SDR, (11): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_SDR, (12): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_SDR, (13): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# - JMP_ON_CS, (31): Stop execution, de-assert CS and save operand[7:0] as the instruction start pointer for next
# sequence.Normally this instruction is used to support Execute-In-Place enhanced mode. See XIP enhanced mode for
# more details.This instruction is only allowed for AHB read commands. There is interrupt status bit set
# (INTR[IPCMDERR] or INTR[AHBCMDERR]) when using this instruction in IP command or AHB write command.
# - CMD_DDR, (33): Transmit command code to Flash.
# - RADDR_DDR, (34): Transmit row address to Flash.
# - CADDR_DDR, (35): Transmit column address to Flash.
# - MODE1_DDR, (36): Transmit mode bits to Flash.
# - MODE2_DDR, (37): Transmit mode bits to Flash.
# - MODE4_DDR, (38): Transmit mode bits to Flash.
# - MODE8_DDR, (39): Transmit mode bits to Flash.
# - WRITE_DDR, (40): Transmit program data to Flash device.
# - READ_DDR, (41): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_DDR, (42): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_DDR, (43): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_DDR, (44): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_DDR, (45): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# Possible options: <STOP, CMD_SDR, RADDR_SDR, CADDR_SDR, MODE1_SDR, MODE2_SDR, MODE4_SDR, MODE8_SDR, WRITE_SDR,
# READ_SDR, LEARN_SDR, DATSZ_SDR, DUMMY_SDR, DUMMY_RWDS_SDR, JMP_ON_CS, CMD_DDR, RADDR_DDR, CADDR_DDR, MODE1_DDR,
# MODE2_DDR, MODE4_DDR, MODE8_DDR, WRITE_DDR, READ_DDR, LEARN_DDR, DATSZ_DDR, DUMMY_DDR, DUMMY_RWDS_DDR>
OPERATION_CODE: STOP
lookupTable_seq11_instr1:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq11_instr2:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq11_instr3:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq11_instr4:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq11_instr5:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq11_instr6:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq11_instr7:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
# ----------------------------------===== lookupTable_seq12_instr0 [Optional] =====-----------------------------------
# Description: Offset: 0x00000140, Width: 16b; Lookup table holds Flash command sequences 12, instruction 0
lookupTable_seq12_instr0:
# ------------------------------------------===== OPERAND [Optional] =====------------------------------------------
# Description: Offset: 0b, Width: 8b, Instruction operand. Its values depends on used instruction
OPERAND: 0
# -----------------------------------------===== NUM_PADS [Optional] =====------------------------------------------
# Description: Offset: 8b, Width: 2b, Number of pads used by instruction. Some instructions ignores this parameter.
# - 1PAD, (0): Single mode. One pad is used.
# - 2PAD, (1): Dual mode. Two pads are used.
# - 4PAD, (2): Quad mode. Four pads are used.
# - 8PAD, (3): Octal mode. Eight pads are used.
# Possible options: <1PAD, 2PAD, 4PAD, 8PAD>
NUM_PADS: 1PAD
# --------------------------------------===== OPERATION_CODE [Optional] =====---------------------------------------
# Description: Offset: 10b, Width: 6b, Instruction operation code.
# - STOP, (0): Stop execution and de-assert CS. Then, the next command sequence (to the same flash device) starts
# from instruction pointer 0.
# - CMD_SDR, (1): Transmit command code to Flash.
# - RADDR_SDR, (2): Transmit row address to Flash.
# - CADDR_SDR, (3): Transmit column address to Flash.
# - MODE1_SDR, (4): Transmit mode bits to Flash.
# - MODE2_SDR, (5): Transmit mode bits to Flash.
# - MODE4_SDR, (6): Transmit mode bits to Flash.
# - MODE8_SDR, (7): Transmit mode bits to Flash.
# - WRITE_SDR, (8): Transmit program data to Flash device.
# - READ_SDR, (9): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_SDR, (10): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_SDR, (11): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_SDR, (12): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_SDR, (13): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# - JMP_ON_CS, (31): Stop execution, de-assert CS and save operand[7:0] as the instruction start pointer for next
# sequence.Normally this instruction is used to support Execute-In-Place enhanced mode. See XIP enhanced mode for
# more details.This instruction is only allowed for AHB read commands. There is interrupt status bit set
# (INTR[IPCMDERR] or INTR[AHBCMDERR]) when using this instruction in IP command or AHB write command.
# - CMD_DDR, (33): Transmit command code to Flash.
# - RADDR_DDR, (34): Transmit row address to Flash.
# - CADDR_DDR, (35): Transmit column address to Flash.
# - MODE1_DDR, (36): Transmit mode bits to Flash.
# - MODE2_DDR, (37): Transmit mode bits to Flash.
# - MODE4_DDR, (38): Transmit mode bits to Flash.
# - MODE8_DDR, (39): Transmit mode bits to Flash.
# - WRITE_DDR, (40): Transmit program data to Flash device.
# - READ_DDR, (41): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_DDR, (42): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_DDR, (43): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_DDR, (44): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_DDR, (45): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# Possible options: <STOP, CMD_SDR, RADDR_SDR, CADDR_SDR, MODE1_SDR, MODE2_SDR, MODE4_SDR, MODE8_SDR, WRITE_SDR,
# READ_SDR, LEARN_SDR, DATSZ_SDR, DUMMY_SDR, DUMMY_RWDS_SDR, JMP_ON_CS, CMD_DDR, RADDR_DDR, CADDR_DDR, MODE1_DDR,
# MODE2_DDR, MODE4_DDR, MODE8_DDR, WRITE_DDR, READ_DDR, LEARN_DDR, DATSZ_DDR, DUMMY_DDR, DUMMY_RWDS_DDR>
OPERATION_CODE: STOP
lookupTable_seq12_instr1:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq12_instr2:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq12_instr3:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq12_instr4:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq12_instr5:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq12_instr6:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq12_instr7:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
# ----------------------------------===== lookupTable_seq13_instr0 [Optional] =====-----------------------------------
# Description: Offset: 0x00000150, Width: 16b; Lookup table holds Flash command sequences 13, instruction 0
lookupTable_seq13_instr0:
# ------------------------------------------===== OPERAND [Optional] =====------------------------------------------
# Description: Offset: 0b, Width: 8b, Instruction operand. Its values depends on used instruction
OPERAND: 0
# -----------------------------------------===== NUM_PADS [Optional] =====------------------------------------------
# Description: Offset: 8b, Width: 2b, Number of pads used by instruction. Some instructions ignores this parameter.
# - 1PAD, (0): Single mode. One pad is used.
# - 2PAD, (1): Dual mode. Two pads are used.
# - 4PAD, (2): Quad mode. Four pads are used.
# - 8PAD, (3): Octal mode. Eight pads are used.
# Possible options: <1PAD, 2PAD, 4PAD, 8PAD>
NUM_PADS: 1PAD
# --------------------------------------===== OPERATION_CODE [Optional] =====---------------------------------------
# Description: Offset: 10b, Width: 6b, Instruction operation code.
# - STOP, (0): Stop execution and de-assert CS. Then, the next command sequence (to the same flash device) starts
# from instruction pointer 0.
# - CMD_SDR, (1): Transmit command code to Flash.
# - RADDR_SDR, (2): Transmit row address to Flash.
# - CADDR_SDR, (3): Transmit column address to Flash.
# - MODE1_SDR, (4): Transmit mode bits to Flash.
# - MODE2_SDR, (5): Transmit mode bits to Flash.
# - MODE4_SDR, (6): Transmit mode bits to Flash.
# - MODE8_SDR, (7): Transmit mode bits to Flash.
# - WRITE_SDR, (8): Transmit program data to Flash device.
# - READ_SDR, (9): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_SDR, (10): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_SDR, (11): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_SDR, (12): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_SDR, (13): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# - JMP_ON_CS, (31): Stop execution, de-assert CS and save operand[7:0] as the instruction start pointer for next
# sequence.Normally this instruction is used to support Execute-In-Place enhanced mode. See XIP enhanced mode for
# more details.This instruction is only allowed for AHB read commands. There is interrupt status bit set
# (INTR[IPCMDERR] or INTR[AHBCMDERR]) when using this instruction in IP command or AHB write command.
# - CMD_DDR, (33): Transmit command code to Flash.
# - RADDR_DDR, (34): Transmit row address to Flash.
# - CADDR_DDR, (35): Transmit column address to Flash.
# - MODE1_DDR, (36): Transmit mode bits to Flash.
# - MODE2_DDR, (37): Transmit mode bits to Flash.
# - MODE4_DDR, (38): Transmit mode bits to Flash.
# - MODE8_DDR, (39): Transmit mode bits to Flash.
# - WRITE_DDR, (40): Transmit program data to Flash device.
# - READ_DDR, (41): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_DDR, (42): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_DDR, (43): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_DDR, (44): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_DDR, (45): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# Possible options: <STOP, CMD_SDR, RADDR_SDR, CADDR_SDR, MODE1_SDR, MODE2_SDR, MODE4_SDR, MODE8_SDR, WRITE_SDR,
# READ_SDR, LEARN_SDR, DATSZ_SDR, DUMMY_SDR, DUMMY_RWDS_SDR, JMP_ON_CS, CMD_DDR, RADDR_DDR, CADDR_DDR, MODE1_DDR,
# MODE2_DDR, MODE4_DDR, MODE8_DDR, WRITE_DDR, READ_DDR, LEARN_DDR, DATSZ_DDR, DUMMY_DDR, DUMMY_RWDS_DDR>
OPERATION_CODE: STOP
lookupTable_seq13_instr1:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq13_instr2:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq13_instr3:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq13_instr4:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq13_instr5:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq13_instr6:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq13_instr7:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
# ----------------------------------===== lookupTable_seq14_instr0 [Optional] =====-----------------------------------
# Description: Offset: 0x00000160, Width: 16b; Lookup table holds Flash command sequences 14, instruction 0
lookupTable_seq14_instr0:
# ------------------------------------------===== OPERAND [Optional] =====------------------------------------------
# Description: Offset: 0b, Width: 8b, Instruction operand. Its values depends on used instruction
OPERAND: 0
# -----------------------------------------===== NUM_PADS [Optional] =====------------------------------------------
# Description: Offset: 8b, Width: 2b, Number of pads used by instruction. Some instructions ignores this parameter.
# - 1PAD, (0): Single mode. One pad is used.
# - 2PAD, (1): Dual mode. Two pads are used.
# - 4PAD, (2): Quad mode. Four pads are used.
# - 8PAD, (3): Octal mode. Eight pads are used.
# Possible options: <1PAD, 2PAD, 4PAD, 8PAD>
NUM_PADS: 1PAD
# --------------------------------------===== OPERATION_CODE [Optional] =====---------------------------------------
# Description: Offset: 10b, Width: 6b, Instruction operation code.
# - STOP, (0): Stop execution and de-assert CS. Then, the next command sequence (to the same flash device) starts
# from instruction pointer 0.
# - CMD_SDR, (1): Transmit command code to Flash.
# - RADDR_SDR, (2): Transmit row address to Flash.
# - CADDR_SDR, (3): Transmit column address to Flash.
# - MODE1_SDR, (4): Transmit mode bits to Flash.
# - MODE2_SDR, (5): Transmit mode bits to Flash.
# - MODE4_SDR, (6): Transmit mode bits to Flash.
# - MODE8_SDR, (7): Transmit mode bits to Flash.
# - WRITE_SDR, (8): Transmit program data to Flash device.
# - READ_SDR, (9): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_SDR, (10): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_SDR, (11): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_SDR, (12): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_SDR, (13): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# - JMP_ON_CS, (31): Stop execution, de-assert CS and save operand[7:0] as the instruction start pointer for next
# sequence.Normally this instruction is used to support Execute-In-Place enhanced mode. See XIP enhanced mode for
# more details.This instruction is only allowed for AHB read commands. There is interrupt status bit set
# (INTR[IPCMDERR] or INTR[AHBCMDERR]) when using this instruction in IP command or AHB write command.
# - CMD_DDR, (33): Transmit command code to Flash.
# - RADDR_DDR, (34): Transmit row address to Flash.
# - CADDR_DDR, (35): Transmit column address to Flash.
# - MODE1_DDR, (36): Transmit mode bits to Flash.
# - MODE2_DDR, (37): Transmit mode bits to Flash.
# - MODE4_DDR, (38): Transmit mode bits to Flash.
# - MODE8_DDR, (39): Transmit mode bits to Flash.
# - WRITE_DDR, (40): Transmit program data to Flash device.
# - READ_DDR, (41): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_DDR, (42): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_DDR, (43): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_DDR, (44): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_DDR, (45): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# Possible options: <STOP, CMD_SDR, RADDR_SDR, CADDR_SDR, MODE1_SDR, MODE2_SDR, MODE4_SDR, MODE8_SDR, WRITE_SDR,
# READ_SDR, LEARN_SDR, DATSZ_SDR, DUMMY_SDR, DUMMY_RWDS_SDR, JMP_ON_CS, CMD_DDR, RADDR_DDR, CADDR_DDR, MODE1_DDR,
# MODE2_DDR, MODE4_DDR, MODE8_DDR, WRITE_DDR, READ_DDR, LEARN_DDR, DATSZ_DDR, DUMMY_DDR, DUMMY_RWDS_DDR>
OPERATION_CODE: STOP
lookupTable_seq14_instr1:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq14_instr2:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq14_instr3:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq14_instr4:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq14_instr5:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq14_instr6:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq14_instr7:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
# ----------------------------------===== lookupTable_seq15_instr0 [Optional] =====-----------------------------------
# Description: Offset: 0x00000170, Width: 16b; Lookup table holds Flash command sequences 15, instruction 0
lookupTable_seq15_instr0:
# ------------------------------------------===== OPERAND [Optional] =====------------------------------------------
# Description: Offset: 0b, Width: 8b, Instruction operand. Its values depends on used instruction
OPERAND: 0
# -----------------------------------------===== NUM_PADS [Optional] =====------------------------------------------
# Description: Offset: 8b, Width: 2b, Number of pads used by instruction. Some instructions ignores this parameter.
# - 1PAD, (0): Single mode. One pad is used.
# - 2PAD, (1): Dual mode. Two pads are used.
# - 4PAD, (2): Quad mode. Four pads are used.
# - 8PAD, (3): Octal mode. Eight pads are used.
# Possible options: <1PAD, 2PAD, 4PAD, 8PAD>
NUM_PADS: 1PAD
# --------------------------------------===== OPERATION_CODE [Optional] =====---------------------------------------
# Description: Offset: 10b, Width: 6b, Instruction operation code.
# - STOP, (0): Stop execution and de-assert CS. Then, the next command sequence (to the same flash device) starts
# from instruction pointer 0.
# - CMD_SDR, (1): Transmit command code to Flash.
# - RADDR_SDR, (2): Transmit row address to Flash.
# - CADDR_SDR, (3): Transmit column address to Flash.
# - MODE1_SDR, (4): Transmit mode bits to Flash.
# - MODE2_SDR, (5): Transmit mode bits to Flash.
# - MODE4_SDR, (6): Transmit mode bits to Flash.
# - MODE8_SDR, (7): Transmit mode bits to Flash.
# - WRITE_SDR, (8): Transmit program data to Flash device.
# - READ_SDR, (9): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_SDR, (10): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_SDR, (11): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_SDR, (12): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_SDR, (13): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# - JMP_ON_CS, (31): Stop execution, de-assert CS and save operand[7:0] as the instruction start pointer for next
# sequence.Normally this instruction is used to support Execute-In-Place enhanced mode. See XIP enhanced mode for
# more details.This instruction is only allowed for AHB read commands. There is interrupt status bit set
# (INTR[IPCMDERR] or INTR[AHBCMDERR]) when using this instruction in IP command or AHB write command.
# - CMD_DDR, (33): Transmit command code to Flash.
# - RADDR_DDR, (34): Transmit row address to Flash.
# - CADDR_DDR, (35): Transmit column address to Flash.
# - MODE1_DDR, (36): Transmit mode bits to Flash.
# - MODE2_DDR, (37): Transmit mode bits to Flash.
# - MODE4_DDR, (38): Transmit mode bits to Flash.
# - MODE8_DDR, (39): Transmit mode bits to Flash.
# - WRITE_DDR, (40): Transmit program data to Flash device.
# - READ_DDR, (41): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_DDR, (42): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_DDR, (43): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_DDR, (44): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_DDR, (45): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# Possible options: <STOP, CMD_SDR, RADDR_SDR, CADDR_SDR, MODE1_SDR, MODE2_SDR, MODE4_SDR, MODE8_SDR, WRITE_SDR,
# READ_SDR, LEARN_SDR, DATSZ_SDR, DUMMY_SDR, DUMMY_RWDS_SDR, JMP_ON_CS, CMD_DDR, RADDR_DDR, CADDR_DDR, MODE1_DDR,
# MODE2_DDR, MODE4_DDR, MODE8_DDR, WRITE_DDR, READ_DDR, LEARN_DDR, DATSZ_DDR, DUMMY_DDR, DUMMY_RWDS_DDR>
OPERATION_CODE: STOP
lookupTable_seq15_instr1:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq15_instr2:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq15_instr3:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq15_instr4:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq15_instr5:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq15_instr6:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq15_instr7:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
# ---------------------------------------===== lutCustomSeq_0 [Optional] =====----------------------------------------
# Description: Offset: 0x00000180, Width: 32b; [0x180-0x1af] Customizable LUT Sequences
lutCustomSeq_0:
# ------------------------------------------===== seqNum [Optional] =====-------------------------------------------
# Description: Offset: 0b, Width: 8b, Sequence Number, valid number: 1-16
seqNum: 0
# -------------------------------------------===== seqId [Optional] =====-------------------------------------------
# Description: Offset: 8b, Width: 8b, Sequence Index, valid number: 0-15
seqId: 0
# -----------------------------------------===== reserved [Optional] =====------------------------------------------
# Description: Offset: 16b, Width: 16b, N/A
reserved: 0
# ---------------------------------------===== lutCustomSeq_1 [Optional] =====----------------------------------------
# Description: Offset: 0x00000184, Width: 32b; [0x180-0x1af] Customizable LUT Sequences
lutCustomSeq_1:
# ------------------------------------------===== seqNum [Optional] =====-------------------------------------------
# Description: Offset: 0b, Width: 8b, Sequence Number, valid number: 1-16
seqNum: 0
# -------------------------------------------===== seqId [Optional] =====-------------------------------------------
# Description: Offset: 8b, Width: 8b, Sequence Index, valid number: 0-15
seqId: 0
# -----------------------------------------===== reserved [Optional] =====------------------------------------------
# Description: Offset: 16b, Width: 16b, N/A
reserved: 0
# ---------------------------------------===== lutCustomSeq_2 [Optional] =====----------------------------------------
# Description: Offset: 0x00000188, Width: 32b; [0x180-0x1af] Customizable LUT Sequences
lutCustomSeq_2:
# ------------------------------------------===== seqNum [Optional] =====-------------------------------------------
# Description: Offset: 0b, Width: 8b, Sequence Number, valid number: 1-16
seqNum: 0
# -------------------------------------------===== seqId [Optional] =====-------------------------------------------
# Description: Offset: 8b, Width: 8b, Sequence Index, valid number: 0-15
seqId: 0
# -----------------------------------------===== reserved [Optional] =====------------------------------------------
# Description: Offset: 16b, Width: 16b, N/A
reserved: 0
# ---------------------------------------===== lutCustomSeq_3 [Optional] =====----------------------------------------
# Description: Offset: 0x0000018C, Width: 32b; [0x180-0x1af] Customizable LUT Sequences
lutCustomSeq_3:
# ------------------------------------------===== seqNum [Optional] =====-------------------------------------------
# Description: Offset: 0b, Width: 8b, Sequence Number, valid number: 1-16
seqNum: 0
# -------------------------------------------===== seqId [Optional] =====-------------------------------------------
# Description: Offset: 8b, Width: 8b, Sequence Index, valid number: 0-15
seqId: 0
# -----------------------------------------===== reserved [Optional] =====------------------------------------------
# Description: Offset: 16b, Width: 16b, N/A
reserved: 0
# ---------------------------------------===== lutCustomSeq_4 [Optional] =====----------------------------------------
# Description: Offset: 0x00000190, Width: 32b; [0x180-0x1af] Customizable LUT Sequences
lutCustomSeq_4:
# ------------------------------------------===== seqNum [Optional] =====-------------------------------------------
# Description: Offset: 0b, Width: 8b, Sequence Number, valid number: 1-16
seqNum: 0
# -------------------------------------------===== seqId [Optional] =====-------------------------------------------
# Description: Offset: 8b, Width: 8b, Sequence Index, valid number: 0-15
seqId: 0
# -----------------------------------------===== reserved [Optional] =====------------------------------------------
# Description: Offset: 16b, Width: 16b, N/A
reserved: 0
# ---------------------------------------===== lutCustomSeq_5 [Optional] =====----------------------------------------
# Description: Offset: 0x00000194, Width: 32b; [0x180-0x1af] Customizable LUT Sequences
lutCustomSeq_5:
# ------------------------------------------===== seqNum [Optional] =====-------------------------------------------
# Description: Offset: 0b, Width: 8b, Sequence Number, valid number: 1-16
seqNum: 0
# -------------------------------------------===== seqId [Optional] =====-------------------------------------------
# Description: Offset: 8b, Width: 8b, Sequence Index, valid number: 0-15
seqId: 0
# -----------------------------------------===== reserved [Optional] =====------------------------------------------
# Description: Offset: 16b, Width: 16b, N/A
reserved: 0
# ---------------------------------------===== lutCustomSeq_6 [Optional] =====----------------------------------------
# Description: Offset: 0x00000198, Width: 32b; [0x180-0x1af] Customizable LUT Sequences
lutCustomSeq_6:
# ------------------------------------------===== seqNum [Optional] =====-------------------------------------------
# Description: Offset: 0b, Width: 8b, Sequence Number, valid number: 1-16
seqNum: 0
# -------------------------------------------===== seqId [Optional] =====-------------------------------------------
# Description: Offset: 8b, Width: 8b, Sequence Index, valid number: 0-15
seqId: 0
# -----------------------------------------===== reserved [Optional] =====------------------------------------------
# Description: Offset: 16b, Width: 16b, N/A
reserved: 0
# ---------------------------------------===== lutCustomSeq_7 [Optional] =====----------------------------------------
# Description: Offset: 0x0000019C, Width: 32b; [0x180-0x1af] Customizable LUT Sequences
lutCustomSeq_7:
# ------------------------------------------===== seqNum [Optional] =====-------------------------------------------
# Description: Offset: 0b, Width: 8b, Sequence Number, valid number: 1-16
seqNum: 0
# -------------------------------------------===== seqId [Optional] =====-------------------------------------------
# Description: Offset: 8b, Width: 8b, Sequence Index, valid number: 0-15
seqId: 0
# -----------------------------------------===== reserved [Optional] =====------------------------------------------
# Description: Offset: 16b, Width: 16b, N/A
reserved: 0
# ---------------------------------------===== lutCustomSeq_8 [Optional] =====----------------------------------------
# Description: Offset: 0x000001A0, Width: 32b; [0x180-0x1af] Customizable LUT Sequences
lutCustomSeq_8:
# ------------------------------------------===== seqNum [Optional] =====-------------------------------------------
# Description: Offset: 0b, Width: 8b, Sequence Number, valid number: 1-16
seqNum: 0
# -------------------------------------------===== seqId [Optional] =====-------------------------------------------
# Description: Offset: 8b, Width: 8b, Sequence Index, valid number: 0-15
seqId: 0
# -----------------------------------------===== reserved [Optional] =====------------------------------------------
# Description: Offset: 16b, Width: 16b, N/A
reserved: 0
# ---------------------------------------===== lutCustomSeq_9 [Optional] =====----------------------------------------
# Description: Offset: 0x000001A4, Width: 32b; [0x180-0x1af] Customizable LUT Sequences
lutCustomSeq_9:
# ------------------------------------------===== seqNum [Optional] =====-------------------------------------------
# Description: Offset: 0b, Width: 8b, Sequence Number, valid number: 1-16
seqNum: 0
# -------------------------------------------===== seqId [Optional] =====-------------------------------------------
# Description: Offset: 8b, Width: 8b, Sequence Index, valid number: 0-15
seqId: 0
# -----------------------------------------===== reserved [Optional] =====------------------------------------------
# Description: Offset: 16b, Width: 16b, N/A
reserved: 0
# ---------------------------------------===== lutCustomSeq_10 [Optional] =====---------------------------------------
# Description: Offset: 0x000001A8, Width: 32b; [0x180-0x1af] Customizable LUT Sequences
lutCustomSeq_10:
# ------------------------------------------===== seqNum [Optional] =====-------------------------------------------
# Description: Offset: 0b, Width: 8b, Sequence Number, valid number: 1-16
seqNum: 0
# -------------------------------------------===== seqId [Optional] =====-------------------------------------------
# Description: Offset: 8b, Width: 8b, Sequence Index, valid number: 0-15
seqId: 0
# -----------------------------------------===== reserved [Optional] =====------------------------------------------
# Description: Offset: 16b, Width: 16b, N/A
reserved: 0
# ---------------------------------------===== lutCustomSeq_11 [Optional] =====---------------------------------------
# Description: Offset: 0x000001AC, Width: 32b; [0x180-0x1af] Customizable LUT Sequences
lutCustomSeq_11:
# ------------------------------------------===== seqNum [Optional] =====-------------------------------------------
# Description: Offset: 0b, Width: 8b, Sequence Number, valid number: 1-16
seqNum: 0
# -------------------------------------------===== seqId [Optional] =====-------------------------------------------
# Description: Offset: 8b, Width: 8b, Sequence Index, valid number: 0-15
seqId: 0
# -----------------------------------------===== reserved [Optional] =====------------------------------------------
# Description: Offset: 16b, Width: 16b, N/A
reserved: 0
# -----------------------------------------===== reserved4_0 [Optional] =====-----------------------------------------
# Description: Offset: 0x000001B0, Width: 32b; [0x1b0-0x1bf] Reserved for future use
reserved4_0: '0x00000000'
# -----------------------------------------===== reserved4_1 [Optional] =====-----------------------------------------
# Description: Offset: 0x000001B4, Width: 32b; [0x1b0-0x1bf] Reserved for future use
reserved4_1: '0x00000000'
# -----------------------------------------===== reserved4_2 [Optional] =====-----------------------------------------
# Description: Offset: 0x000001B8, Width: 32b; [0x1b0-0x1bf] Reserved for future use
reserved4_2: '0x00000000'
# -----------------------------------------===== reserved4_3 [Optional] =====-----------------------------------------
# Description: Offset: 0x000001BC, Width: 32b; [0x1b0-0x1bf] Reserved for future use
reserved4_3: '0x00000000'
# ------------------------------------------===== pageSize [Optional] =====-------------------------------------------
# Description: Offset: 0x000001C0, Width: 32b; Page size of Serial NOR
pageSize: '0x00000000'
# -----------------------------------------===== sectorSize [Optional] =====------------------------------------------
# Description: Offset: 0x000001C4, Width: 32b; Sector size of Serial NOR
sectorSize: '0x00000000'
# -------------------------------------===== ipcmdSerialClkFreq [Optional] =====--------------------------------------
# Description: Offset: 0x000001C8, Width: 8b; Clock frequency for IP command
ipcmdSerialClkFreq: '0x00'
# -------------------------------------===== isUniformBlockSize [Optional] =====--------------------------------------
# Description: Offset: 0x000001C9, Width: 8b; Sector/Block size is the same
isUniformBlockSize: '0x00'
# -----------------------------------------===== reserved0_0 [Optional] =====-----------------------------------------
# Description: Offset: 0x000001CA, Width: 8b; Reserved for future use
reserved0_0: '0x00'
# -----------------------------------------===== reserved0_1 [Optional] =====-----------------------------------------
# Description: Offset: 0x000001CB, Width: 8b; Reserved for future use
reserved0_1: '0x00'
# ----------------------------------------===== serialNorType [Optional] =====----------------------------------------
# Description: Offset: 0x000001CC, Width: 8b; Serial NOR Flash type: 0/1/2/3
serialNorType: '0x00'
# --------------------------------------===== needExitNoCmdMode [Optional] =====--------------------------------------
# Description: Offset: 0x000001CD, Width: 8b; Need to exit NoCmd mode before other IP command
needExitNoCmdMode: '0x00'
# ------------------------------------===== halfClkForNonReadCmd [Optional] =====-------------------------------------
# Description: Offset: 0x000001CE, Width: 8b; Half the Serial Clock for non-read command: true/false
halfClkForNonReadCmd: '0x00'
# ------------------------------------===== needRestoreNoCmdMode [Optional] =====-------------------------------------
# Description: Offset: 0x000001CF, Width: 8b; Need to Restore NoCmd mode after IP command execution
needRestoreNoCmdMode: '0x00'
# ------------------------------------------===== blockSize [Optional] =====------------------------------------------
# Description: Offset: 0x000001D0, Width: 32b; Block size
blockSize: '0x00000000'
# -----------------------------------------===== reserve2_0 [Optional] =====------------------------------------------
# Description: Offset: 0x000001D4, Width: 32b; Reserved for future use
reserve2_0: '0x00000000'
# -----------------------------------------===== reserve2_1 [Optional] =====------------------------------------------
# Description: Offset: 0x000001D8, Width: 32b; Reserved for future use
reserve2_1: '0x00000000'
# -----------------------------------------===== reserve2_2 [Optional] =====------------------------------------------
# Description: Offset: 0x000001DC, Width: 32b; Reserved for future use
reserve2_2: '0x00000000'
# -----------------------------------------===== reserve2_3 [Optional] =====------------------------------------------
# Description: Offset: 0x000001E0, Width: 32b; Reserved for future use
reserve2_3: '0x00000000'
# -----------------------------------------===== reserve2_4 [Optional] =====------------------------------------------
# Description: Offset: 0x000001E4, Width: 32b; Reserved for future use
reserve2_4: '0x00000000'
# -----------------------------------------===== reserve2_5 [Optional] =====------------------------------------------
# Description: Offset: 0x000001E8, Width: 32b; Reserved for future use
reserve2_5: '0x00000000'
# -----------------------------------------===== reserve2_6 [Optional] =====------------------------------------------
# Description: Offset: 0x000001EC, Width: 32b; Reserved for future use
reserve2_6: '0x00000000'
# -----------------------------------------===== reserve2_7 [Optional] =====------------------------------------------
# Description: Offset: 0x000001F0, Width: 32b; Reserved for future use
reserve2_7: '0x00000000'
# -----------------------------------------===== reserve2_8 [Optional] =====------------------------------------------
# Description: Offset: 0x000001F4, Width: 32b; Reserved for future use
reserve2_8: '0x00000000'
# -----------------------------------------===== reserve2_9 [Optional] =====------------------------------------------
# Description: Offset: 0x000001F8, Width: 32b; Reserved for future use
reserve2_9: '0x00000000'
# -----------------------------------------===== reserve2_10 [Optional] =====-----------------------------------------
# Description: Offset: 0x000001FC, Width: 32b; Reserved for future use
reserve2_10: '0x00000000'
FCB for mimxrt1015, Revision: a0 and flexspi_nor#
FCB for mimxrt1015, Revision: a0 and flexspi_nor JSON schema
FCB for mimxrt1015, Revision: a0 and flexspi_nor YAML configuration template
# ================================= FCB for mimxrt1015, Revision: a0 and flexspi_nor =================================
# ======================================================================================================================
# == FCB for mimxrt1015, Revision: a0 and flexspi_nor ==
# ======================================================================================================================
# -------------------------------------===== The chip family name [Required] =====--------------------------------------
# Description: NXP chip family identifier.
family: CHOOSE_FROM_TABLE
# -----------------------------------------===== MCU revision [Optional] =====------------------------------------------
# Description: Revision of silicon. The 'latest' name, means most current revision.
# Possible options: <a0, latest>
revision: a0
# ------------------------------------------===== Memory type [Required] =====------------------------------------------
# Description: Specify type of memory used by FCB description.
# Possible options: <flexspi_nor>
type: flexspi_nor
# ------------------------------------------===== mimxrt1015 [Required] =====-------------------------------------------
fcb_settings:
# ---------------------------------------------===== tag [Optional] =====---------------------------------------------
# Description: Offset: 0x00000000, Width: 32b; [0x000-0x003] Tag, fixed value 0x42464346UL
tag: '0x42464346'
# -------------------------------------------===== version [Optional] =====-------------------------------------------
# Description: Offset: 0x00000004, Width: 32b; [0x004-0x007] Version,[31:24] -'V', [23:16] - Major, [15:8] - Minor,
# [7:0] - bugfix
version: '0x56010100'
# ------------------------------------------===== reserved0 [Optional] =====------------------------------------------
# Description: Offset: 0x00000008, Width: 32b; [0x008-0x00b] Reserved for future use
reserved0: '0x00000000'
# --------------------------------------===== readSampleClkSrc [Optional] =====---------------------------------------
# Description: Offset: 0x0000000C, Width: 8b; [0x00c-0x00c] Read Sample Clock Source, valid value: 0/1/3
readSampleClkSrc: '0x00'
# -----------------------------------------===== csHoldTime [Optional] =====------------------------------------------
# Description: Offset: 0x0000000D, Width: 8b; [0x00d-0x00d] CS hold time, default value: 3
csHoldTime: '0x00'
# -----------------------------------------===== csSetupTime [Optional] =====-----------------------------------------
# Description: Offset: 0x0000000E, Width: 8b; [0x00e-0x00e] CS setup time, default value: 3
csSetupTime: '0x00'
# -------------------------------------===== columnAddressWidth [Optional] =====--------------------------------------
# Description: Offset: 0x0000000F, Width: 8b; [0x00f-0x00f] Column Address with, for HyperBus protocol, it is fixed
# to 3, For Serial NAND, need to refer to datasheet
columnAddressWidth: '0x00'
# -------------------------------------===== deviceModeCfgEnable [Optional] =====-------------------------------------
# Description: Offset: 0x00000010, Width: 8b; [0x010-0x010] Device Mode Configure enable flag, 1 - Enable, 0 -
# Disable
deviceModeCfgEnable: '0x00'
# ---------------------------------------===== deviceModeType [Optional] =====----------------------------------------
# Description: Offset: 0x00000011, Width: 8b; [0x011-0x011] Specify the configuration command type:Quad Enable,
# DPI/QPI/OPI switch, Generic configuration, etc.
deviceModeType: '0x00'
# -------------------------------------===== waitTimeCfgCommands [Optional] =====-------------------------------------
# Description: Offset: 0x00000012, Width: 16b; [0x012-0x013] Wait time for all configuration commands, unit: 100us,
# Used for DPI/QPI/OPI switch or reset command
waitTimeCfgCommands: '0x0000'
# ----------------------------------------===== deviceModeSeq [Optional] =====----------------------------------------
# Description: Offset: 0x00000014, Width: 32b; [0x014-0x017] Device mode sequence info, [7:0] - LUT sequence id,
# [15:8] - LUt sequence number, [31:16] Reserved
deviceModeSeq:
# ------------------------------------------===== seqNum [Optional] =====-------------------------------------------
# Description: Offset: 0b, Width: 8b, Sequence Number, valid number: 1-16
seqNum: 0
# -------------------------------------------===== seqId [Optional] =====-------------------------------------------
# Description: Offset: 8b, Width: 8b, Sequence Index, valid number: 0-15
seqId: 0
# -----------------------------------------===== reserved [Optional] =====------------------------------------------
# Description: Offset: 16b, Width: 16b, N/A
reserved: 0
# ----------------------------------------===== deviceModeArg [Optional] =====----------------------------------------
# Description: Offset: 0x00000018, Width: 32b; [0x018-0x01b] Argument/Parameter for device configuration
deviceModeArg: '0x00000000'
# ---------------------------------------===== configCmdEnable [Optional] =====---------------------------------------
# Description: Offset: 0x0000001C, Width: 8b; [0x01c-0x01c] Configure command Enable Flag, 1 - Enable, 0 - Disable
configCmdEnable: '0x00'
# --------------------------------------===== configModeType_0 [Optional] =====---------------------------------------
# Description: Offset: 0x0000001D, Width: 8b; [0x01d-0x01f] Configure Mode Type, similar as deviceModeTpe
configModeType_0: '0x00'
# --------------------------------------===== configModeType_1 [Optional] =====---------------------------------------
# Description: Offset: 0x0000001E, Width: 8b; [0x01d-0x01f] Configure Mode Type, similar as deviceModeTpe
configModeType_1: '0x00'
# --------------------------------------===== configModeType_2 [Optional] =====---------------------------------------
# Description: Offset: 0x0000001F, Width: 8b; [0x01d-0x01f] Configure Mode Type, similar as deviceModeTpe
configModeType_2: '0x00'
# ---------------------------------------===== configCmdSeqs_0 [Optional] =====---------------------------------------
# Description: Offset: 0x00000020, Width: 32b; [0x020-0x02b] Sequence info for Device Configuration command, similar
# as deviceModeSeq
configCmdSeqs_0:
# ------------------------------------------===== seqNum [Optional] =====-------------------------------------------
# Description: Offset: 0b, Width: 8b, Sequence Number, valid number: 1-16
seqNum: 0
# -------------------------------------------===== seqId [Optional] =====-------------------------------------------
# Description: Offset: 8b, Width: 8b, Sequence Index, valid number: 0-15
seqId: 0
# -----------------------------------------===== reserved [Optional] =====------------------------------------------
# Description: Offset: 16b, Width: 16b, N/A
reserved: 0
# ---------------------------------------===== configCmdSeqs_1 [Optional] =====---------------------------------------
# Description: Offset: 0x00000024, Width: 32b; [0x020-0x02b] Sequence info for Device Configuration command, similar
# as deviceModeSeq
configCmdSeqs_1:
# ------------------------------------------===== seqNum [Optional] =====-------------------------------------------
# Description: Offset: 0b, Width: 8b, Sequence Number, valid number: 1-16
seqNum: 0
# -------------------------------------------===== seqId [Optional] =====-------------------------------------------
# Description: Offset: 8b, Width: 8b, Sequence Index, valid number: 0-15
seqId: 0
# -----------------------------------------===== reserved [Optional] =====------------------------------------------
# Description: Offset: 16b, Width: 16b, N/A
reserved: 0
# ---------------------------------------===== configCmdSeqs_2 [Optional] =====---------------------------------------
# Description: Offset: 0x00000028, Width: 32b; [0x020-0x02b] Sequence info for Device Configuration command, similar
# as deviceModeSeq
configCmdSeqs_2:
# ------------------------------------------===== seqNum [Optional] =====-------------------------------------------
# Description: Offset: 0b, Width: 8b, Sequence Number, valid number: 1-16
seqNum: 0
# -------------------------------------------===== seqId [Optional] =====-------------------------------------------
# Description: Offset: 8b, Width: 8b, Sequence Index, valid number: 0-15
seqId: 0
# -----------------------------------------===== reserved [Optional] =====------------------------------------------
# Description: Offset: 16b, Width: 16b, N/A
reserved: 0
# ------------------------------------------===== reserved1 [Optional] =====------------------------------------------
# Description: Offset: 0x0000002C, Width: 32b; [0x02c-0x02f] Reserved for future use
reserved1: '0x00000000'
# ---------------------------------------===== configCmdArgs_0 [Optional] =====---------------------------------------
# Description: Offset: 0x00000030, Width: 32b; [0x030-0x03b] Arguments/Parameters for device Configuration commands
configCmdArgs_0: '0x00000000'
# ---------------------------------------===== configCmdArgs_1 [Optional] =====---------------------------------------
# Description: Offset: 0x00000034, Width: 32b; [0x030-0x03b] Arguments/Parameters for device Configuration commands
configCmdArgs_1: '0x00000000'
# ---------------------------------------===== configCmdArgs_2 [Optional] =====---------------------------------------
# Description: Offset: 0x00000038, Width: 32b; [0x030-0x03b] Arguments/Parameters for device Configuration commands
configCmdArgs_2: '0x00000000'
# ------------------------------------------===== reserved2 [Optional] =====------------------------------------------
# Description: Offset: 0x0000003C, Width: 32b; [0x03c-0x03f] Reserved for future use
reserved2: '0x00000000'
# ------------------------------------===== controllerMiscOption [Optional] =====-------------------------------------
# Description: Offset: 0x00000040, Width: 32b; [0x040-0x043] Controller Misc Options, see Misc feature bit
# definitions for more details
controllerMiscOption: '0x00000000'
# -----------------------------------------===== deviceType [Optional] =====------------------------------------------
# Description: Offset: 0x00000044, Width: 8b; [0x044-0x044] Device Type: See Flash Type Definition for more details
deviceType: '0x00'
# ----------------------------------------===== sflashPadType [Optional] =====----------------------------------------
# Description: Offset: 0x00000045, Width: 8b; [0x045-0x045] Serial Flash Pad Type: 1 - Single, 2 - Dual, 4 - Quad, 8
# - Octal
sflashPadType: '0x00'
# ----------------------------------------===== serialClkFreq [Optional] =====----------------------------------------
# Description: Offset: 0x00000046, Width: 8b; [0x046-0x046] Serial Flash Frequency, device specific definitions, See
# System Boot Chapter for more details
serialClkFreq: '0x00'
# -------------------------------------===== lutCustomSeqEnable [Optional] =====--------------------------------------
# Description: Offset: 0x00000047, Width: 8b; [0x047-0x047] LUT customization Enable, it is required if the
# program/erase cannot be done using 1 LUT sequence, currently, only applicable to HyperFLASH
lutCustomSeqEnable: '0x00'
# -----------------------------------------===== reserved3_0 [Optional] =====-----------------------------------------
# Description: Offset: 0x00000048, Width: 32b; [0x048-0x04f] Reserved for future use
reserved3_0: '0x00000000'
# -----------------------------------------===== reserved3_1 [Optional] =====-----------------------------------------
# Description: Offset: 0x0000004C, Width: 32b; [0x048-0x04f] Reserved for future use
reserved3_1: '0x00000000'
# ----------------------------------------===== sflashA1Size [Optional] =====-----------------------------------------
# Description: Offset: 0x00000050, Width: 32b; [0x050-0x053] Size of Flash connected to A1
sflashA1Size: '0x00000000'
# ----------------------------------------===== sflashA2Size [Optional] =====-----------------------------------------
# Description: Offset: 0x00000054, Width: 32b; [0x054-0x057] Size of Flash connected to A2
sflashA2Size: '0x00000000'
# ----------------------------------------===== sflashB1Size [Optional] =====-----------------------------------------
# Description: Offset: 0x00000058, Width: 32b; [0x058-0x05b] Size of Flash connected to B1
sflashB1Size: '0x00000000'
# ----------------------------------------===== sflashB2Size [Optional] =====-----------------------------------------
# Description: Offset: 0x0000005C, Width: 32b; [0x05c-0x05f] Size of Flash connected to B2
sflashB2Size: '0x00000000'
# ------------------------------------===== csPadSettingOverride [Optional] =====-------------------------------------
# Description: Offset: 0x00000060, Width: 32b; [0x060-0x063] CS pad setting override value
csPadSettingOverride: '0x00000000'
# -----------------------------------===== sclkPadSettingOverride [Optional] =====------------------------------------
# Description: Offset: 0x00000064, Width: 32b; [0x064-0x067] SCK pad setting override value
sclkPadSettingOverride: '0x00000000'
# -----------------------------------===== dataPadSettingOverride [Optional] =====------------------------------------
# Description: Offset: 0x00000068, Width: 32b; [0x068-0x06b] data pad setting override value
dataPadSettingOverride: '0x00000000'
# ------------------------------------===== dqsPadSettingOverride [Optional] =====------------------------------------
# Description: Offset: 0x0000006C, Width: 32b; [0x06c-0x06f] DQS pad setting override value
dqsPadSettingOverride: '0x00000000'
# -----------------------------------------===== timeoutInMs [Optional] =====-----------------------------------------
# Description: Offset: 0x00000070, Width: 32b; [0x070-0x073] Timeout threshold for read status command
timeoutInMs: '0x00000000'
# ---------------------------------------===== commandInterval [Optional] =====---------------------------------------
# Description: Offset: 0x00000074, Width: 32b; [0x074-0x077] CS deselect interval between two commands
commandInterval: '0x00000000'
# ---------------------------------------===== dataValidTime_0 [Optional] =====---------------------------------------
# Description: Offset: 0x00000078, Width: 16b; [0x078-0x07b] CLK edge to data valid time for PORT A and PORT B, in
# terms of 0.1ns
dataValidTime_0: '0x0000'
# ---------------------------------------===== dataValidTime_1 [Optional] =====---------------------------------------
# Description: Offset: 0x0000007A, Width: 16b; [0x078-0x07b] CLK edge to data valid time for PORT A and PORT B, in
# terms of 0.1ns
dataValidTime_1: '0x0000'
# -----------------------------------------===== busyOffset [Optional] =====------------------------------------------
# Description: Offset: 0x0000007C, Width: 16b; [0x07c-0x07d] Busy offset, valid value: 0-31
busyOffset: '0x0000'
# ---------------------------------------===== busyBitPolarity [Optional] =====---------------------------------------
# Description: Offset: 0x0000007E, Width: 16b; [0x07e-0x07f] Busy flag polarity, 0 - busy flag is 1 when flash device
# is busy, 1 - busy flag is 0 when flash device is busy
busyBitPolarity: '0x0000'
# -----------------------------------===== lookupTable_seq0_instr0 [Optional] =====-----------------------------------
# Description: Offset: 0x00000080, Width: 16b; Lookup table holds Flash command sequences 0, instruction 0
lookupTable_seq0_instr0:
# ------------------------------------------===== OPERAND [Optional] =====------------------------------------------
# Description: Offset: 0b, Width: 8b, Instruction operand. Its values depends on used instruction
OPERAND: 0
# -----------------------------------------===== NUM_PADS [Optional] =====------------------------------------------
# Description: Offset: 8b, Width: 2b, Number of pads used by instruction. Some instructions ignores this parameter.
# - 1PAD, (0): Single mode. One pad is used.
# - 2PAD, (1): Dual mode. Two pads are used.
# - 4PAD, (2): Quad mode. Four pads are used.
# - 8PAD, (3): Octal mode. Eight pads are used.
# Possible options: <1PAD, 2PAD, 4PAD, 8PAD>
NUM_PADS: 1PAD
# --------------------------------------===== OPERATION_CODE [Optional] =====---------------------------------------
# Description: Offset: 10b, Width: 6b, Instruction operation code.
# - STOP, (0): Stop execution and de-assert CS. Then, the next command sequence (to the same flash device) starts
# from instruction pointer 0.
# - CMD_SDR, (1): Transmit command code to Flash.
# - RADDR_SDR, (2): Transmit row address to Flash.
# - CADDR_SDR, (3): Transmit column address to Flash.
# - MODE1_SDR, (4): Transmit mode bits to Flash.
# - MODE2_SDR, (5): Transmit mode bits to Flash.
# - MODE4_SDR, (6): Transmit mode bits to Flash.
# - MODE8_SDR, (7): Transmit mode bits to Flash.
# - WRITE_SDR, (8): Transmit program data to Flash device.
# - READ_SDR, (9): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_SDR, (10): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_SDR, (11): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_SDR, (12): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_SDR, (13): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# - JMP_ON_CS, (31): Stop execution, de-assert CS and save operand[7:0] as the instruction start pointer for next
# sequence.Normally this instruction is used to support Execute-In-Place enhanced mode. See XIP enhanced mode for
# more details.This instruction is only allowed for AHB read commands. There is interrupt status bit set
# (INTR[IPCMDERR] or INTR[AHBCMDERR]) when using this instruction in IP command or AHB write command.
# - CMD_DDR, (33): Transmit command code to Flash.
# - RADDR_DDR, (34): Transmit row address to Flash.
# - CADDR_DDR, (35): Transmit column address to Flash.
# - MODE1_DDR, (36): Transmit mode bits to Flash.
# - MODE2_DDR, (37): Transmit mode bits to Flash.
# - MODE4_DDR, (38): Transmit mode bits to Flash.
# - MODE8_DDR, (39): Transmit mode bits to Flash.
# - WRITE_DDR, (40): Transmit program data to Flash device.
# - READ_DDR, (41): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_DDR, (42): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_DDR, (43): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_DDR, (44): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_DDR, (45): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# Possible options: <STOP, CMD_SDR, RADDR_SDR, CADDR_SDR, MODE1_SDR, MODE2_SDR, MODE4_SDR, MODE8_SDR, WRITE_SDR,
# READ_SDR, LEARN_SDR, DATSZ_SDR, DUMMY_SDR, DUMMY_RWDS_SDR, JMP_ON_CS, CMD_DDR, RADDR_DDR, CADDR_DDR, MODE1_DDR,
# MODE2_DDR, MODE4_DDR, MODE8_DDR, WRITE_DDR, READ_DDR, LEARN_DDR, DATSZ_DDR, DUMMY_DDR, DUMMY_RWDS_DDR>
OPERATION_CODE: STOP
lookupTable_seq0_instr1:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq0_instr2:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq0_instr3:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq0_instr4:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq0_instr5:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq0_instr6:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq0_instr7:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
# -----------------------------------===== lookupTable_seq1_instr0 [Optional] =====-----------------------------------
# Description: Offset: 0x00000090, Width: 16b; Lookup table holds Flash command sequences 1, instruction 0
lookupTable_seq1_instr0:
# ------------------------------------------===== OPERAND [Optional] =====------------------------------------------
# Description: Offset: 0b, Width: 8b, Instruction operand. Its values depends on used instruction
OPERAND: 0
# -----------------------------------------===== NUM_PADS [Optional] =====------------------------------------------
# Description: Offset: 8b, Width: 2b, Number of pads used by instruction. Some instructions ignores this parameter.
# - 1PAD, (0): Single mode. One pad is used.
# - 2PAD, (1): Dual mode. Two pads are used.
# - 4PAD, (2): Quad mode. Four pads are used.
# - 8PAD, (3): Octal mode. Eight pads are used.
# Possible options: <1PAD, 2PAD, 4PAD, 8PAD>
NUM_PADS: 1PAD
# --------------------------------------===== OPERATION_CODE [Optional] =====---------------------------------------
# Description: Offset: 10b, Width: 6b, Instruction operation code.
# - STOP, (0): Stop execution and de-assert CS. Then, the next command sequence (to the same flash device) starts
# from instruction pointer 0.
# - CMD_SDR, (1): Transmit command code to Flash.
# - RADDR_SDR, (2): Transmit row address to Flash.
# - CADDR_SDR, (3): Transmit column address to Flash.
# - MODE1_SDR, (4): Transmit mode bits to Flash.
# - MODE2_SDR, (5): Transmit mode bits to Flash.
# - MODE4_SDR, (6): Transmit mode bits to Flash.
# - MODE8_SDR, (7): Transmit mode bits to Flash.
# - WRITE_SDR, (8): Transmit program data to Flash device.
# - READ_SDR, (9): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_SDR, (10): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_SDR, (11): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_SDR, (12): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_SDR, (13): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# - JMP_ON_CS, (31): Stop execution, de-assert CS and save operand[7:0] as the instruction start pointer for next
# sequence.Normally this instruction is used to support Execute-In-Place enhanced mode. See XIP enhanced mode for
# more details.This instruction is only allowed for AHB read commands. There is interrupt status bit set
# (INTR[IPCMDERR] or INTR[AHBCMDERR]) when using this instruction in IP command or AHB write command.
# - CMD_DDR, (33): Transmit command code to Flash.
# - RADDR_DDR, (34): Transmit row address to Flash.
# - CADDR_DDR, (35): Transmit column address to Flash.
# - MODE1_DDR, (36): Transmit mode bits to Flash.
# - MODE2_DDR, (37): Transmit mode bits to Flash.
# - MODE4_DDR, (38): Transmit mode bits to Flash.
# - MODE8_DDR, (39): Transmit mode bits to Flash.
# - WRITE_DDR, (40): Transmit program data to Flash device.
# - READ_DDR, (41): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_DDR, (42): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_DDR, (43): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_DDR, (44): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_DDR, (45): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# Possible options: <STOP, CMD_SDR, RADDR_SDR, CADDR_SDR, MODE1_SDR, MODE2_SDR, MODE4_SDR, MODE8_SDR, WRITE_SDR,
# READ_SDR, LEARN_SDR, DATSZ_SDR, DUMMY_SDR, DUMMY_RWDS_SDR, JMP_ON_CS, CMD_DDR, RADDR_DDR, CADDR_DDR, MODE1_DDR,
# MODE2_DDR, MODE4_DDR, MODE8_DDR, WRITE_DDR, READ_DDR, LEARN_DDR, DATSZ_DDR, DUMMY_DDR, DUMMY_RWDS_DDR>
OPERATION_CODE: STOP
lookupTable_seq1_instr1:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq1_instr2:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq1_instr3:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq1_instr4:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq1_instr5:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq1_instr6:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq1_instr7:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
# -----------------------------------===== lookupTable_seq2_instr0 [Optional] =====-----------------------------------
# Description: Offset: 0x000000A0, Width: 16b; Lookup table holds Flash command sequences 2, instruction 0
lookupTable_seq2_instr0:
# ------------------------------------------===== OPERAND [Optional] =====------------------------------------------
# Description: Offset: 0b, Width: 8b, Instruction operand. Its values depends on used instruction
OPERAND: 0
# -----------------------------------------===== NUM_PADS [Optional] =====------------------------------------------
# Description: Offset: 8b, Width: 2b, Number of pads used by instruction. Some instructions ignores this parameter.
# - 1PAD, (0): Single mode. One pad is used.
# - 2PAD, (1): Dual mode. Two pads are used.
# - 4PAD, (2): Quad mode. Four pads are used.
# - 8PAD, (3): Octal mode. Eight pads are used.
# Possible options: <1PAD, 2PAD, 4PAD, 8PAD>
NUM_PADS: 1PAD
# --------------------------------------===== OPERATION_CODE [Optional] =====---------------------------------------
# Description: Offset: 10b, Width: 6b, Instruction operation code.
# - STOP, (0): Stop execution and de-assert CS. Then, the next command sequence (to the same flash device) starts
# from instruction pointer 0.
# - CMD_SDR, (1): Transmit command code to Flash.
# - RADDR_SDR, (2): Transmit row address to Flash.
# - CADDR_SDR, (3): Transmit column address to Flash.
# - MODE1_SDR, (4): Transmit mode bits to Flash.
# - MODE2_SDR, (5): Transmit mode bits to Flash.
# - MODE4_SDR, (6): Transmit mode bits to Flash.
# - MODE8_SDR, (7): Transmit mode bits to Flash.
# - WRITE_SDR, (8): Transmit program data to Flash device.
# - READ_SDR, (9): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_SDR, (10): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_SDR, (11): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_SDR, (12): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_SDR, (13): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# - JMP_ON_CS, (31): Stop execution, de-assert CS and save operand[7:0] as the instruction start pointer for next
# sequence.Normally this instruction is used to support Execute-In-Place enhanced mode. See XIP enhanced mode for
# more details.This instruction is only allowed for AHB read commands. There is interrupt status bit set
# (INTR[IPCMDERR] or INTR[AHBCMDERR]) when using this instruction in IP command or AHB write command.
# - CMD_DDR, (33): Transmit command code to Flash.
# - RADDR_DDR, (34): Transmit row address to Flash.
# - CADDR_DDR, (35): Transmit column address to Flash.
# - MODE1_DDR, (36): Transmit mode bits to Flash.
# - MODE2_DDR, (37): Transmit mode bits to Flash.
# - MODE4_DDR, (38): Transmit mode bits to Flash.
# - MODE8_DDR, (39): Transmit mode bits to Flash.
# - WRITE_DDR, (40): Transmit program data to Flash device.
# - READ_DDR, (41): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_DDR, (42): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_DDR, (43): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_DDR, (44): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_DDR, (45): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# Possible options: <STOP, CMD_SDR, RADDR_SDR, CADDR_SDR, MODE1_SDR, MODE2_SDR, MODE4_SDR, MODE8_SDR, WRITE_SDR,
# READ_SDR, LEARN_SDR, DATSZ_SDR, DUMMY_SDR, DUMMY_RWDS_SDR, JMP_ON_CS, CMD_DDR, RADDR_DDR, CADDR_DDR, MODE1_DDR,
# MODE2_DDR, MODE4_DDR, MODE8_DDR, WRITE_DDR, READ_DDR, LEARN_DDR, DATSZ_DDR, DUMMY_DDR, DUMMY_RWDS_DDR>
OPERATION_CODE: STOP
lookupTable_seq2_instr1:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq2_instr2:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq2_instr3:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq2_instr4:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq2_instr5:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq2_instr6:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq2_instr7:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
# -----------------------------------===== lookupTable_seq3_instr0 [Optional] =====-----------------------------------
# Description: Offset: 0x000000B0, Width: 16b; Lookup table holds Flash command sequences 3, instruction 0
lookupTable_seq3_instr0:
# ------------------------------------------===== OPERAND [Optional] =====------------------------------------------
# Description: Offset: 0b, Width: 8b, Instruction operand. Its values depends on used instruction
OPERAND: 0
# -----------------------------------------===== NUM_PADS [Optional] =====------------------------------------------
# Description: Offset: 8b, Width: 2b, Number of pads used by instruction. Some instructions ignores this parameter.
# - 1PAD, (0): Single mode. One pad is used.
# - 2PAD, (1): Dual mode. Two pads are used.
# - 4PAD, (2): Quad mode. Four pads are used.
# - 8PAD, (3): Octal mode. Eight pads are used.
# Possible options: <1PAD, 2PAD, 4PAD, 8PAD>
NUM_PADS: 1PAD
# --------------------------------------===== OPERATION_CODE [Optional] =====---------------------------------------
# Description: Offset: 10b, Width: 6b, Instruction operation code.
# - STOP, (0): Stop execution and de-assert CS. Then, the next command sequence (to the same flash device) starts
# from instruction pointer 0.
# - CMD_SDR, (1): Transmit command code to Flash.
# - RADDR_SDR, (2): Transmit row address to Flash.
# - CADDR_SDR, (3): Transmit column address to Flash.
# - MODE1_SDR, (4): Transmit mode bits to Flash.
# - MODE2_SDR, (5): Transmit mode bits to Flash.
# - MODE4_SDR, (6): Transmit mode bits to Flash.
# - MODE8_SDR, (7): Transmit mode bits to Flash.
# - WRITE_SDR, (8): Transmit program data to Flash device.
# - READ_SDR, (9): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_SDR, (10): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_SDR, (11): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_SDR, (12): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_SDR, (13): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# - JMP_ON_CS, (31): Stop execution, de-assert CS and save operand[7:0] as the instruction start pointer for next
# sequence.Normally this instruction is used to support Execute-In-Place enhanced mode. See XIP enhanced mode for
# more details.This instruction is only allowed for AHB read commands. There is interrupt status bit set
# (INTR[IPCMDERR] or INTR[AHBCMDERR]) when using this instruction in IP command or AHB write command.
# - CMD_DDR, (33): Transmit command code to Flash.
# - RADDR_DDR, (34): Transmit row address to Flash.
# - CADDR_DDR, (35): Transmit column address to Flash.
# - MODE1_DDR, (36): Transmit mode bits to Flash.
# - MODE2_DDR, (37): Transmit mode bits to Flash.
# - MODE4_DDR, (38): Transmit mode bits to Flash.
# - MODE8_DDR, (39): Transmit mode bits to Flash.
# - WRITE_DDR, (40): Transmit program data to Flash device.
# - READ_DDR, (41): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_DDR, (42): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_DDR, (43): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_DDR, (44): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_DDR, (45): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# Possible options: <STOP, CMD_SDR, RADDR_SDR, CADDR_SDR, MODE1_SDR, MODE2_SDR, MODE4_SDR, MODE8_SDR, WRITE_SDR,
# READ_SDR, LEARN_SDR, DATSZ_SDR, DUMMY_SDR, DUMMY_RWDS_SDR, JMP_ON_CS, CMD_DDR, RADDR_DDR, CADDR_DDR, MODE1_DDR,
# MODE2_DDR, MODE4_DDR, MODE8_DDR, WRITE_DDR, READ_DDR, LEARN_DDR, DATSZ_DDR, DUMMY_DDR, DUMMY_RWDS_DDR>
OPERATION_CODE: STOP
lookupTable_seq3_instr1:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq3_instr2:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq3_instr3:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq3_instr4:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq3_instr5:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq3_instr6:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq3_instr7:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
# -----------------------------------===== lookupTable_seq4_instr0 [Optional] =====-----------------------------------
# Description: Offset: 0x000000C0, Width: 16b; Lookup table holds Flash command sequences 4, instruction 0
lookupTable_seq4_instr0:
# ------------------------------------------===== OPERAND [Optional] =====------------------------------------------
# Description: Offset: 0b, Width: 8b, Instruction operand. Its values depends on used instruction
OPERAND: 0
# -----------------------------------------===== NUM_PADS [Optional] =====------------------------------------------
# Description: Offset: 8b, Width: 2b, Number of pads used by instruction. Some instructions ignores this parameter.
# - 1PAD, (0): Single mode. One pad is used.
# - 2PAD, (1): Dual mode. Two pads are used.
# - 4PAD, (2): Quad mode. Four pads are used.
# - 8PAD, (3): Octal mode. Eight pads are used.
# Possible options: <1PAD, 2PAD, 4PAD, 8PAD>
NUM_PADS: 1PAD
# --------------------------------------===== OPERATION_CODE [Optional] =====---------------------------------------
# Description: Offset: 10b, Width: 6b, Instruction operation code.
# - STOP, (0): Stop execution and de-assert CS. Then, the next command sequence (to the same flash device) starts
# from instruction pointer 0.
# - CMD_SDR, (1): Transmit command code to Flash.
# - RADDR_SDR, (2): Transmit row address to Flash.
# - CADDR_SDR, (3): Transmit column address to Flash.
# - MODE1_SDR, (4): Transmit mode bits to Flash.
# - MODE2_SDR, (5): Transmit mode bits to Flash.
# - MODE4_SDR, (6): Transmit mode bits to Flash.
# - MODE8_SDR, (7): Transmit mode bits to Flash.
# - WRITE_SDR, (8): Transmit program data to Flash device.
# - READ_SDR, (9): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_SDR, (10): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_SDR, (11): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_SDR, (12): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_SDR, (13): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# - JMP_ON_CS, (31): Stop execution, de-assert CS and save operand[7:0] as the instruction start pointer for next
# sequence.Normally this instruction is used to support Execute-In-Place enhanced mode. See XIP enhanced mode for
# more details.This instruction is only allowed for AHB read commands. There is interrupt status bit set
# (INTR[IPCMDERR] or INTR[AHBCMDERR]) when using this instruction in IP command or AHB write command.
# - CMD_DDR, (33): Transmit command code to Flash.
# - RADDR_DDR, (34): Transmit row address to Flash.
# - CADDR_DDR, (35): Transmit column address to Flash.
# - MODE1_DDR, (36): Transmit mode bits to Flash.
# - MODE2_DDR, (37): Transmit mode bits to Flash.
# - MODE4_DDR, (38): Transmit mode bits to Flash.
# - MODE8_DDR, (39): Transmit mode bits to Flash.
# - WRITE_DDR, (40): Transmit program data to Flash device.
# - READ_DDR, (41): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_DDR, (42): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_DDR, (43): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_DDR, (44): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_DDR, (45): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# Possible options: <STOP, CMD_SDR, RADDR_SDR, CADDR_SDR, MODE1_SDR, MODE2_SDR, MODE4_SDR, MODE8_SDR, WRITE_SDR,
# READ_SDR, LEARN_SDR, DATSZ_SDR, DUMMY_SDR, DUMMY_RWDS_SDR, JMP_ON_CS, CMD_DDR, RADDR_DDR, CADDR_DDR, MODE1_DDR,
# MODE2_DDR, MODE4_DDR, MODE8_DDR, WRITE_DDR, READ_DDR, LEARN_DDR, DATSZ_DDR, DUMMY_DDR, DUMMY_RWDS_DDR>
OPERATION_CODE: STOP
lookupTable_seq4_instr1:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq4_instr2:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq4_instr3:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq4_instr4:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq4_instr5:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq4_instr6:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq4_instr7:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
# -----------------------------------===== lookupTable_seq5_instr0 [Optional] =====-----------------------------------
# Description: Offset: 0x000000D0, Width: 16b; Lookup table holds Flash command sequences 5, instruction 0
lookupTable_seq5_instr0:
# ------------------------------------------===== OPERAND [Optional] =====------------------------------------------
# Description: Offset: 0b, Width: 8b, Instruction operand. Its values depends on used instruction
OPERAND: 0
# -----------------------------------------===== NUM_PADS [Optional] =====------------------------------------------
# Description: Offset: 8b, Width: 2b, Number of pads used by instruction. Some instructions ignores this parameter.
# - 1PAD, (0): Single mode. One pad is used.
# - 2PAD, (1): Dual mode. Two pads are used.
# - 4PAD, (2): Quad mode. Four pads are used.
# - 8PAD, (3): Octal mode. Eight pads are used.
# Possible options: <1PAD, 2PAD, 4PAD, 8PAD>
NUM_PADS: 1PAD
# --------------------------------------===== OPERATION_CODE [Optional] =====---------------------------------------
# Description: Offset: 10b, Width: 6b, Instruction operation code.
# - STOP, (0): Stop execution and de-assert CS. Then, the next command sequence (to the same flash device) starts
# from instruction pointer 0.
# - CMD_SDR, (1): Transmit command code to Flash.
# - RADDR_SDR, (2): Transmit row address to Flash.
# - CADDR_SDR, (3): Transmit column address to Flash.
# - MODE1_SDR, (4): Transmit mode bits to Flash.
# - MODE2_SDR, (5): Transmit mode bits to Flash.
# - MODE4_SDR, (6): Transmit mode bits to Flash.
# - MODE8_SDR, (7): Transmit mode bits to Flash.
# - WRITE_SDR, (8): Transmit program data to Flash device.
# - READ_SDR, (9): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_SDR, (10): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_SDR, (11): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_SDR, (12): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_SDR, (13): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# - JMP_ON_CS, (31): Stop execution, de-assert CS and save operand[7:0] as the instruction start pointer for next
# sequence.Normally this instruction is used to support Execute-In-Place enhanced mode. See XIP enhanced mode for
# more details.This instruction is only allowed for AHB read commands. There is interrupt status bit set
# (INTR[IPCMDERR] or INTR[AHBCMDERR]) when using this instruction in IP command or AHB write command.
# - CMD_DDR, (33): Transmit command code to Flash.
# - RADDR_DDR, (34): Transmit row address to Flash.
# - CADDR_DDR, (35): Transmit column address to Flash.
# - MODE1_DDR, (36): Transmit mode bits to Flash.
# - MODE2_DDR, (37): Transmit mode bits to Flash.
# - MODE4_DDR, (38): Transmit mode bits to Flash.
# - MODE8_DDR, (39): Transmit mode bits to Flash.
# - WRITE_DDR, (40): Transmit program data to Flash device.
# - READ_DDR, (41): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_DDR, (42): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_DDR, (43): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_DDR, (44): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_DDR, (45): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# Possible options: <STOP, CMD_SDR, RADDR_SDR, CADDR_SDR, MODE1_SDR, MODE2_SDR, MODE4_SDR, MODE8_SDR, WRITE_SDR,
# READ_SDR, LEARN_SDR, DATSZ_SDR, DUMMY_SDR, DUMMY_RWDS_SDR, JMP_ON_CS, CMD_DDR, RADDR_DDR, CADDR_DDR, MODE1_DDR,
# MODE2_DDR, MODE4_DDR, MODE8_DDR, WRITE_DDR, READ_DDR, LEARN_DDR, DATSZ_DDR, DUMMY_DDR, DUMMY_RWDS_DDR>
OPERATION_CODE: STOP
lookupTable_seq5_instr1:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq5_instr2:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq5_instr3:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq5_instr4:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq5_instr5:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq5_instr6:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq5_instr7:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
# -----------------------------------===== lookupTable_seq6_instr0 [Optional] =====-----------------------------------
# Description: Offset: 0x000000E0, Width: 16b; Lookup table holds Flash command sequences 6, instruction 0
lookupTable_seq6_instr0:
# ------------------------------------------===== OPERAND [Optional] =====------------------------------------------
# Description: Offset: 0b, Width: 8b, Instruction operand. Its values depends on used instruction
OPERAND: 0
# -----------------------------------------===== NUM_PADS [Optional] =====------------------------------------------
# Description: Offset: 8b, Width: 2b, Number of pads used by instruction. Some instructions ignores this parameter.
# - 1PAD, (0): Single mode. One pad is used.
# - 2PAD, (1): Dual mode. Two pads are used.
# - 4PAD, (2): Quad mode. Four pads are used.
# - 8PAD, (3): Octal mode. Eight pads are used.
# Possible options: <1PAD, 2PAD, 4PAD, 8PAD>
NUM_PADS: 1PAD
# --------------------------------------===== OPERATION_CODE [Optional] =====---------------------------------------
# Description: Offset: 10b, Width: 6b, Instruction operation code.
# - STOP, (0): Stop execution and de-assert CS. Then, the next command sequence (to the same flash device) starts
# from instruction pointer 0.
# - CMD_SDR, (1): Transmit command code to Flash.
# - RADDR_SDR, (2): Transmit row address to Flash.
# - CADDR_SDR, (3): Transmit column address to Flash.
# - MODE1_SDR, (4): Transmit mode bits to Flash.
# - MODE2_SDR, (5): Transmit mode bits to Flash.
# - MODE4_SDR, (6): Transmit mode bits to Flash.
# - MODE8_SDR, (7): Transmit mode bits to Flash.
# - WRITE_SDR, (8): Transmit program data to Flash device.
# - READ_SDR, (9): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_SDR, (10): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_SDR, (11): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_SDR, (12): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_SDR, (13): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# - JMP_ON_CS, (31): Stop execution, de-assert CS and save operand[7:0] as the instruction start pointer for next
# sequence.Normally this instruction is used to support Execute-In-Place enhanced mode. See XIP enhanced mode for
# more details.This instruction is only allowed for AHB read commands. There is interrupt status bit set
# (INTR[IPCMDERR] or INTR[AHBCMDERR]) when using this instruction in IP command or AHB write command.
# - CMD_DDR, (33): Transmit command code to Flash.
# - RADDR_DDR, (34): Transmit row address to Flash.
# - CADDR_DDR, (35): Transmit column address to Flash.
# - MODE1_DDR, (36): Transmit mode bits to Flash.
# - MODE2_DDR, (37): Transmit mode bits to Flash.
# - MODE4_DDR, (38): Transmit mode bits to Flash.
# - MODE8_DDR, (39): Transmit mode bits to Flash.
# - WRITE_DDR, (40): Transmit program data to Flash device.
# - READ_DDR, (41): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_DDR, (42): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_DDR, (43): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_DDR, (44): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_DDR, (45): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# Possible options: <STOP, CMD_SDR, RADDR_SDR, CADDR_SDR, MODE1_SDR, MODE2_SDR, MODE4_SDR, MODE8_SDR, WRITE_SDR,
# READ_SDR, LEARN_SDR, DATSZ_SDR, DUMMY_SDR, DUMMY_RWDS_SDR, JMP_ON_CS, CMD_DDR, RADDR_DDR, CADDR_DDR, MODE1_DDR,
# MODE2_DDR, MODE4_DDR, MODE8_DDR, WRITE_DDR, READ_DDR, LEARN_DDR, DATSZ_DDR, DUMMY_DDR, DUMMY_RWDS_DDR>
OPERATION_CODE: STOP
lookupTable_seq6_instr1:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq6_instr2:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq6_instr3:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq6_instr4:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq6_instr5:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq6_instr6:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq6_instr7:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
# -----------------------------------===== lookupTable_seq7_instr0 [Optional] =====-----------------------------------
# Description: Offset: 0x000000F0, Width: 16b; Lookup table holds Flash command sequences 7, instruction 0
lookupTable_seq7_instr0:
# ------------------------------------------===== OPERAND [Optional] =====------------------------------------------
# Description: Offset: 0b, Width: 8b, Instruction operand. Its values depends on used instruction
OPERAND: 0
# -----------------------------------------===== NUM_PADS [Optional] =====------------------------------------------
# Description: Offset: 8b, Width: 2b, Number of pads used by instruction. Some instructions ignores this parameter.
# - 1PAD, (0): Single mode. One pad is used.
# - 2PAD, (1): Dual mode. Two pads are used.
# - 4PAD, (2): Quad mode. Four pads are used.
# - 8PAD, (3): Octal mode. Eight pads are used.
# Possible options: <1PAD, 2PAD, 4PAD, 8PAD>
NUM_PADS: 1PAD
# --------------------------------------===== OPERATION_CODE [Optional] =====---------------------------------------
# Description: Offset: 10b, Width: 6b, Instruction operation code.
# - STOP, (0): Stop execution and de-assert CS. Then, the next command sequence (to the same flash device) starts
# from instruction pointer 0.
# - CMD_SDR, (1): Transmit command code to Flash.
# - RADDR_SDR, (2): Transmit row address to Flash.
# - CADDR_SDR, (3): Transmit column address to Flash.
# - MODE1_SDR, (4): Transmit mode bits to Flash.
# - MODE2_SDR, (5): Transmit mode bits to Flash.
# - MODE4_SDR, (6): Transmit mode bits to Flash.
# - MODE8_SDR, (7): Transmit mode bits to Flash.
# - WRITE_SDR, (8): Transmit program data to Flash device.
# - READ_SDR, (9): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_SDR, (10): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_SDR, (11): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_SDR, (12): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_SDR, (13): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# - JMP_ON_CS, (31): Stop execution, de-assert CS and save operand[7:0] as the instruction start pointer for next
# sequence.Normally this instruction is used to support Execute-In-Place enhanced mode. See XIP enhanced mode for
# more details.This instruction is only allowed for AHB read commands. There is interrupt status bit set
# (INTR[IPCMDERR] or INTR[AHBCMDERR]) when using this instruction in IP command or AHB write command.
# - CMD_DDR, (33): Transmit command code to Flash.
# - RADDR_DDR, (34): Transmit row address to Flash.
# - CADDR_DDR, (35): Transmit column address to Flash.
# - MODE1_DDR, (36): Transmit mode bits to Flash.
# - MODE2_DDR, (37): Transmit mode bits to Flash.
# - MODE4_DDR, (38): Transmit mode bits to Flash.
# - MODE8_DDR, (39): Transmit mode bits to Flash.
# - WRITE_DDR, (40): Transmit program data to Flash device.
# - READ_DDR, (41): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_DDR, (42): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_DDR, (43): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_DDR, (44): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_DDR, (45): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# Possible options: <STOP, CMD_SDR, RADDR_SDR, CADDR_SDR, MODE1_SDR, MODE2_SDR, MODE4_SDR, MODE8_SDR, WRITE_SDR,
# READ_SDR, LEARN_SDR, DATSZ_SDR, DUMMY_SDR, DUMMY_RWDS_SDR, JMP_ON_CS, CMD_DDR, RADDR_DDR, CADDR_DDR, MODE1_DDR,
# MODE2_DDR, MODE4_DDR, MODE8_DDR, WRITE_DDR, READ_DDR, LEARN_DDR, DATSZ_DDR, DUMMY_DDR, DUMMY_RWDS_DDR>
OPERATION_CODE: STOP
lookupTable_seq7_instr1:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq7_instr2:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq7_instr3:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq7_instr4:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq7_instr5:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq7_instr6:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq7_instr7:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
# -----------------------------------===== lookupTable_seq8_instr0 [Optional] =====-----------------------------------
# Description: Offset: 0x00000100, Width: 16b; Lookup table holds Flash command sequences 8, instruction 0
lookupTable_seq8_instr0:
# ------------------------------------------===== OPERAND [Optional] =====------------------------------------------
# Description: Offset: 0b, Width: 8b, Instruction operand. Its values depends on used instruction
OPERAND: 0
# -----------------------------------------===== NUM_PADS [Optional] =====------------------------------------------
# Description: Offset: 8b, Width: 2b, Number of pads used by instruction. Some instructions ignores this parameter.
# - 1PAD, (0): Single mode. One pad is used.
# - 2PAD, (1): Dual mode. Two pads are used.
# - 4PAD, (2): Quad mode. Four pads are used.
# - 8PAD, (3): Octal mode. Eight pads are used.
# Possible options: <1PAD, 2PAD, 4PAD, 8PAD>
NUM_PADS: 1PAD
# --------------------------------------===== OPERATION_CODE [Optional] =====---------------------------------------
# Description: Offset: 10b, Width: 6b, Instruction operation code.
# - STOP, (0): Stop execution and de-assert CS. Then, the next command sequence (to the same flash device) starts
# from instruction pointer 0.
# - CMD_SDR, (1): Transmit command code to Flash.
# - RADDR_SDR, (2): Transmit row address to Flash.
# - CADDR_SDR, (3): Transmit column address to Flash.
# - MODE1_SDR, (4): Transmit mode bits to Flash.
# - MODE2_SDR, (5): Transmit mode bits to Flash.
# - MODE4_SDR, (6): Transmit mode bits to Flash.
# - MODE8_SDR, (7): Transmit mode bits to Flash.
# - WRITE_SDR, (8): Transmit program data to Flash device.
# - READ_SDR, (9): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_SDR, (10): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_SDR, (11): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_SDR, (12): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_SDR, (13): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# - JMP_ON_CS, (31): Stop execution, de-assert CS and save operand[7:0] as the instruction start pointer for next
# sequence.Normally this instruction is used to support Execute-In-Place enhanced mode. See XIP enhanced mode for
# more details.This instruction is only allowed for AHB read commands. There is interrupt status bit set
# (INTR[IPCMDERR] or INTR[AHBCMDERR]) when using this instruction in IP command or AHB write command.
# - CMD_DDR, (33): Transmit command code to Flash.
# - RADDR_DDR, (34): Transmit row address to Flash.
# - CADDR_DDR, (35): Transmit column address to Flash.
# - MODE1_DDR, (36): Transmit mode bits to Flash.
# - MODE2_DDR, (37): Transmit mode bits to Flash.
# - MODE4_DDR, (38): Transmit mode bits to Flash.
# - MODE8_DDR, (39): Transmit mode bits to Flash.
# - WRITE_DDR, (40): Transmit program data to Flash device.
# - READ_DDR, (41): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_DDR, (42): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_DDR, (43): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_DDR, (44): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_DDR, (45): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# Possible options: <STOP, CMD_SDR, RADDR_SDR, CADDR_SDR, MODE1_SDR, MODE2_SDR, MODE4_SDR, MODE8_SDR, WRITE_SDR,
# READ_SDR, LEARN_SDR, DATSZ_SDR, DUMMY_SDR, DUMMY_RWDS_SDR, JMP_ON_CS, CMD_DDR, RADDR_DDR, CADDR_DDR, MODE1_DDR,
# MODE2_DDR, MODE4_DDR, MODE8_DDR, WRITE_DDR, READ_DDR, LEARN_DDR, DATSZ_DDR, DUMMY_DDR, DUMMY_RWDS_DDR>
OPERATION_CODE: STOP
lookupTable_seq8_instr1:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq8_instr2:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq8_instr3:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq8_instr4:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq8_instr5:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq8_instr6:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq8_instr7:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
# -----------------------------------===== lookupTable_seq9_instr0 [Optional] =====-----------------------------------
# Description: Offset: 0x00000110, Width: 16b; Lookup table holds Flash command sequences 9, instruction 0
lookupTable_seq9_instr0:
# ------------------------------------------===== OPERAND [Optional] =====------------------------------------------
# Description: Offset: 0b, Width: 8b, Instruction operand. Its values depends on used instruction
OPERAND: 0
# -----------------------------------------===== NUM_PADS [Optional] =====------------------------------------------
# Description: Offset: 8b, Width: 2b, Number of pads used by instruction. Some instructions ignores this parameter.
# - 1PAD, (0): Single mode. One pad is used.
# - 2PAD, (1): Dual mode. Two pads are used.
# - 4PAD, (2): Quad mode. Four pads are used.
# - 8PAD, (3): Octal mode. Eight pads are used.
# Possible options: <1PAD, 2PAD, 4PAD, 8PAD>
NUM_PADS: 1PAD
# --------------------------------------===== OPERATION_CODE [Optional] =====---------------------------------------
# Description: Offset: 10b, Width: 6b, Instruction operation code.
# - STOP, (0): Stop execution and de-assert CS. Then, the next command sequence (to the same flash device) starts
# from instruction pointer 0.
# - CMD_SDR, (1): Transmit command code to Flash.
# - RADDR_SDR, (2): Transmit row address to Flash.
# - CADDR_SDR, (3): Transmit column address to Flash.
# - MODE1_SDR, (4): Transmit mode bits to Flash.
# - MODE2_SDR, (5): Transmit mode bits to Flash.
# - MODE4_SDR, (6): Transmit mode bits to Flash.
# - MODE8_SDR, (7): Transmit mode bits to Flash.
# - WRITE_SDR, (8): Transmit program data to Flash device.
# - READ_SDR, (9): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_SDR, (10): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_SDR, (11): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_SDR, (12): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_SDR, (13): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# - JMP_ON_CS, (31): Stop execution, de-assert CS and save operand[7:0] as the instruction start pointer for next
# sequence.Normally this instruction is used to support Execute-In-Place enhanced mode. See XIP enhanced mode for
# more details.This instruction is only allowed for AHB read commands. There is interrupt status bit set
# (INTR[IPCMDERR] or INTR[AHBCMDERR]) when using this instruction in IP command or AHB write command.
# - CMD_DDR, (33): Transmit command code to Flash.
# - RADDR_DDR, (34): Transmit row address to Flash.
# - CADDR_DDR, (35): Transmit column address to Flash.
# - MODE1_DDR, (36): Transmit mode bits to Flash.
# - MODE2_DDR, (37): Transmit mode bits to Flash.
# - MODE4_DDR, (38): Transmit mode bits to Flash.
# - MODE8_DDR, (39): Transmit mode bits to Flash.
# - WRITE_DDR, (40): Transmit program data to Flash device.
# - READ_DDR, (41): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_DDR, (42): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_DDR, (43): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_DDR, (44): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_DDR, (45): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# Possible options: <STOP, CMD_SDR, RADDR_SDR, CADDR_SDR, MODE1_SDR, MODE2_SDR, MODE4_SDR, MODE8_SDR, WRITE_SDR,
# READ_SDR, LEARN_SDR, DATSZ_SDR, DUMMY_SDR, DUMMY_RWDS_SDR, JMP_ON_CS, CMD_DDR, RADDR_DDR, CADDR_DDR, MODE1_DDR,
# MODE2_DDR, MODE4_DDR, MODE8_DDR, WRITE_DDR, READ_DDR, LEARN_DDR, DATSZ_DDR, DUMMY_DDR, DUMMY_RWDS_DDR>
OPERATION_CODE: STOP
lookupTable_seq9_instr1:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq9_instr2:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq9_instr3:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq9_instr4:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq9_instr5:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq9_instr6:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq9_instr7:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
# ----------------------------------===== lookupTable_seq10_instr0 [Optional] =====-----------------------------------
# Description: Offset: 0x00000120, Width: 16b; Lookup table holds Flash command sequences 10, instruction 0
lookupTable_seq10_instr0:
# ------------------------------------------===== OPERAND [Optional] =====------------------------------------------
# Description: Offset: 0b, Width: 8b, Instruction operand. Its values depends on used instruction
OPERAND: 0
# -----------------------------------------===== NUM_PADS [Optional] =====------------------------------------------
# Description: Offset: 8b, Width: 2b, Number of pads used by instruction. Some instructions ignores this parameter.
# - 1PAD, (0): Single mode. One pad is used.
# - 2PAD, (1): Dual mode. Two pads are used.
# - 4PAD, (2): Quad mode. Four pads are used.
# - 8PAD, (3): Octal mode. Eight pads are used.
# Possible options: <1PAD, 2PAD, 4PAD, 8PAD>
NUM_PADS: 1PAD
# --------------------------------------===== OPERATION_CODE [Optional] =====---------------------------------------
# Description: Offset: 10b, Width: 6b, Instruction operation code.
# - STOP, (0): Stop execution and de-assert CS. Then, the next command sequence (to the same flash device) starts
# from instruction pointer 0.
# - CMD_SDR, (1): Transmit command code to Flash.
# - RADDR_SDR, (2): Transmit row address to Flash.
# - CADDR_SDR, (3): Transmit column address to Flash.
# - MODE1_SDR, (4): Transmit mode bits to Flash.
# - MODE2_SDR, (5): Transmit mode bits to Flash.
# - MODE4_SDR, (6): Transmit mode bits to Flash.
# - MODE8_SDR, (7): Transmit mode bits to Flash.
# - WRITE_SDR, (8): Transmit program data to Flash device.
# - READ_SDR, (9): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_SDR, (10): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_SDR, (11): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_SDR, (12): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_SDR, (13): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# - JMP_ON_CS, (31): Stop execution, de-assert CS and save operand[7:0] as the instruction start pointer for next
# sequence.Normally this instruction is used to support Execute-In-Place enhanced mode. See XIP enhanced mode for
# more details.This instruction is only allowed for AHB read commands. There is interrupt status bit set
# (INTR[IPCMDERR] or INTR[AHBCMDERR]) when using this instruction in IP command or AHB write command.
# - CMD_DDR, (33): Transmit command code to Flash.
# - RADDR_DDR, (34): Transmit row address to Flash.
# - CADDR_DDR, (35): Transmit column address to Flash.
# - MODE1_DDR, (36): Transmit mode bits to Flash.
# - MODE2_DDR, (37): Transmit mode bits to Flash.
# - MODE4_DDR, (38): Transmit mode bits to Flash.
# - MODE8_DDR, (39): Transmit mode bits to Flash.
# - WRITE_DDR, (40): Transmit program data to Flash device.
# - READ_DDR, (41): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_DDR, (42): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_DDR, (43): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_DDR, (44): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_DDR, (45): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# Possible options: <STOP, CMD_SDR, RADDR_SDR, CADDR_SDR, MODE1_SDR, MODE2_SDR, MODE4_SDR, MODE8_SDR, WRITE_SDR,
# READ_SDR, LEARN_SDR, DATSZ_SDR, DUMMY_SDR, DUMMY_RWDS_SDR, JMP_ON_CS, CMD_DDR, RADDR_DDR, CADDR_DDR, MODE1_DDR,
# MODE2_DDR, MODE4_DDR, MODE8_DDR, WRITE_DDR, READ_DDR, LEARN_DDR, DATSZ_DDR, DUMMY_DDR, DUMMY_RWDS_DDR>
OPERATION_CODE: STOP
lookupTable_seq10_instr1:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq10_instr2:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq10_instr3:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq10_instr4:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq10_instr5:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq10_instr6:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq10_instr7:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
# ----------------------------------===== lookupTable_seq11_instr0 [Optional] =====-----------------------------------
# Description: Offset: 0x00000130, Width: 16b; Lookup table holds Flash command sequences 11, instruction 0
lookupTable_seq11_instr0:
# ------------------------------------------===== OPERAND [Optional] =====------------------------------------------
# Description: Offset: 0b, Width: 8b, Instruction operand. Its values depends on used instruction
OPERAND: 0
# -----------------------------------------===== NUM_PADS [Optional] =====------------------------------------------
# Description: Offset: 8b, Width: 2b, Number of pads used by instruction. Some instructions ignores this parameter.
# - 1PAD, (0): Single mode. One pad is used.
# - 2PAD, (1): Dual mode. Two pads are used.
# - 4PAD, (2): Quad mode. Four pads are used.
# - 8PAD, (3): Octal mode. Eight pads are used.
# Possible options: <1PAD, 2PAD, 4PAD, 8PAD>
NUM_PADS: 1PAD
# --------------------------------------===== OPERATION_CODE [Optional] =====---------------------------------------
# Description: Offset: 10b, Width: 6b, Instruction operation code.
# - STOP, (0): Stop execution and de-assert CS. Then, the next command sequence (to the same flash device) starts
# from instruction pointer 0.
# - CMD_SDR, (1): Transmit command code to Flash.
# - RADDR_SDR, (2): Transmit row address to Flash.
# - CADDR_SDR, (3): Transmit column address to Flash.
# - MODE1_SDR, (4): Transmit mode bits to Flash.
# - MODE2_SDR, (5): Transmit mode bits to Flash.
# - MODE4_SDR, (6): Transmit mode bits to Flash.
# - MODE8_SDR, (7): Transmit mode bits to Flash.
# - WRITE_SDR, (8): Transmit program data to Flash device.
# - READ_SDR, (9): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_SDR, (10): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_SDR, (11): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_SDR, (12): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_SDR, (13): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# - JMP_ON_CS, (31): Stop execution, de-assert CS and save operand[7:0] as the instruction start pointer for next
# sequence.Normally this instruction is used to support Execute-In-Place enhanced mode. See XIP enhanced mode for
# more details.This instruction is only allowed for AHB read commands. There is interrupt status bit set
# (INTR[IPCMDERR] or INTR[AHBCMDERR]) when using this instruction in IP command or AHB write command.
# - CMD_DDR, (33): Transmit command code to Flash.
# - RADDR_DDR, (34): Transmit row address to Flash.
# - CADDR_DDR, (35): Transmit column address to Flash.
# - MODE1_DDR, (36): Transmit mode bits to Flash.
# - MODE2_DDR, (37): Transmit mode bits to Flash.
# - MODE4_DDR, (38): Transmit mode bits to Flash.
# - MODE8_DDR, (39): Transmit mode bits to Flash.
# - WRITE_DDR, (40): Transmit program data to Flash device.
# - READ_DDR, (41): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_DDR, (42): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_DDR, (43): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_DDR, (44): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_DDR, (45): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# Possible options: <STOP, CMD_SDR, RADDR_SDR, CADDR_SDR, MODE1_SDR, MODE2_SDR, MODE4_SDR, MODE8_SDR, WRITE_SDR,
# READ_SDR, LEARN_SDR, DATSZ_SDR, DUMMY_SDR, DUMMY_RWDS_SDR, JMP_ON_CS, CMD_DDR, RADDR_DDR, CADDR_DDR, MODE1_DDR,
# MODE2_DDR, MODE4_DDR, MODE8_DDR, WRITE_DDR, READ_DDR, LEARN_DDR, DATSZ_DDR, DUMMY_DDR, DUMMY_RWDS_DDR>
OPERATION_CODE: STOP
lookupTable_seq11_instr1:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq11_instr2:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq11_instr3:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq11_instr4:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq11_instr5:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq11_instr6:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq11_instr7:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
# ----------------------------------===== lookupTable_seq12_instr0 [Optional] =====-----------------------------------
# Description: Offset: 0x00000140, Width: 16b; Lookup table holds Flash command sequences 12, instruction 0
lookupTable_seq12_instr0:
# ------------------------------------------===== OPERAND [Optional] =====------------------------------------------
# Description: Offset: 0b, Width: 8b, Instruction operand. Its values depends on used instruction
OPERAND: 0
# -----------------------------------------===== NUM_PADS [Optional] =====------------------------------------------
# Description: Offset: 8b, Width: 2b, Number of pads used by instruction. Some instructions ignores this parameter.
# - 1PAD, (0): Single mode. One pad is used.
# - 2PAD, (1): Dual mode. Two pads are used.
# - 4PAD, (2): Quad mode. Four pads are used.
# - 8PAD, (3): Octal mode. Eight pads are used.
# Possible options: <1PAD, 2PAD, 4PAD, 8PAD>
NUM_PADS: 1PAD
# --------------------------------------===== OPERATION_CODE [Optional] =====---------------------------------------
# Description: Offset: 10b, Width: 6b, Instruction operation code.
# - STOP, (0): Stop execution and de-assert CS. Then, the next command sequence (to the same flash device) starts
# from instruction pointer 0.
# - CMD_SDR, (1): Transmit command code to Flash.
# - RADDR_SDR, (2): Transmit row address to Flash.
# - CADDR_SDR, (3): Transmit column address to Flash.
# - MODE1_SDR, (4): Transmit mode bits to Flash.
# - MODE2_SDR, (5): Transmit mode bits to Flash.
# - MODE4_SDR, (6): Transmit mode bits to Flash.
# - MODE8_SDR, (7): Transmit mode bits to Flash.
# - WRITE_SDR, (8): Transmit program data to Flash device.
# - READ_SDR, (9): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_SDR, (10): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_SDR, (11): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_SDR, (12): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_SDR, (13): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# - JMP_ON_CS, (31): Stop execution, de-assert CS and save operand[7:0] as the instruction start pointer for next
# sequence.Normally this instruction is used to support Execute-In-Place enhanced mode. See XIP enhanced mode for
# more details.This instruction is only allowed for AHB read commands. There is interrupt status bit set
# (INTR[IPCMDERR] or INTR[AHBCMDERR]) when using this instruction in IP command or AHB write command.
# - CMD_DDR, (33): Transmit command code to Flash.
# - RADDR_DDR, (34): Transmit row address to Flash.
# - CADDR_DDR, (35): Transmit column address to Flash.
# - MODE1_DDR, (36): Transmit mode bits to Flash.
# - MODE2_DDR, (37): Transmit mode bits to Flash.
# - MODE4_DDR, (38): Transmit mode bits to Flash.
# - MODE8_DDR, (39): Transmit mode bits to Flash.
# - WRITE_DDR, (40): Transmit program data to Flash device.
# - READ_DDR, (41): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_DDR, (42): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_DDR, (43): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_DDR, (44): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_DDR, (45): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# Possible options: <STOP, CMD_SDR, RADDR_SDR, CADDR_SDR, MODE1_SDR, MODE2_SDR, MODE4_SDR, MODE8_SDR, WRITE_SDR,
# READ_SDR, LEARN_SDR, DATSZ_SDR, DUMMY_SDR, DUMMY_RWDS_SDR, JMP_ON_CS, CMD_DDR, RADDR_DDR, CADDR_DDR, MODE1_DDR,
# MODE2_DDR, MODE4_DDR, MODE8_DDR, WRITE_DDR, READ_DDR, LEARN_DDR, DATSZ_DDR, DUMMY_DDR, DUMMY_RWDS_DDR>
OPERATION_CODE: STOP
lookupTable_seq12_instr1:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq12_instr2:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq12_instr3:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq12_instr4:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq12_instr5:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq12_instr6:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq12_instr7:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
# ----------------------------------===== lookupTable_seq13_instr0 [Optional] =====-----------------------------------
# Description: Offset: 0x00000150, Width: 16b; Lookup table holds Flash command sequences 13, instruction 0
lookupTable_seq13_instr0:
# ------------------------------------------===== OPERAND [Optional] =====------------------------------------------
# Description: Offset: 0b, Width: 8b, Instruction operand. Its values depends on used instruction
OPERAND: 0
# -----------------------------------------===== NUM_PADS [Optional] =====------------------------------------------
# Description: Offset: 8b, Width: 2b, Number of pads used by instruction. Some instructions ignores this parameter.
# - 1PAD, (0): Single mode. One pad is used.
# - 2PAD, (1): Dual mode. Two pads are used.
# - 4PAD, (2): Quad mode. Four pads are used.
# - 8PAD, (3): Octal mode. Eight pads are used.
# Possible options: <1PAD, 2PAD, 4PAD, 8PAD>
NUM_PADS: 1PAD
# --------------------------------------===== OPERATION_CODE [Optional] =====---------------------------------------
# Description: Offset: 10b, Width: 6b, Instruction operation code.
# - STOP, (0): Stop execution and de-assert CS. Then, the next command sequence (to the same flash device) starts
# from instruction pointer 0.
# - CMD_SDR, (1): Transmit command code to Flash.
# - RADDR_SDR, (2): Transmit row address to Flash.
# - CADDR_SDR, (3): Transmit column address to Flash.
# - MODE1_SDR, (4): Transmit mode bits to Flash.
# - MODE2_SDR, (5): Transmit mode bits to Flash.
# - MODE4_SDR, (6): Transmit mode bits to Flash.
# - MODE8_SDR, (7): Transmit mode bits to Flash.
# - WRITE_SDR, (8): Transmit program data to Flash device.
# - READ_SDR, (9): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_SDR, (10): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_SDR, (11): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_SDR, (12): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_SDR, (13): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# - JMP_ON_CS, (31): Stop execution, de-assert CS and save operand[7:0] as the instruction start pointer for next
# sequence.Normally this instruction is used to support Execute-In-Place enhanced mode. See XIP enhanced mode for
# more details.This instruction is only allowed for AHB read commands. There is interrupt status bit set
# (INTR[IPCMDERR] or INTR[AHBCMDERR]) when using this instruction in IP command or AHB write command.
# - CMD_DDR, (33): Transmit command code to Flash.
# - RADDR_DDR, (34): Transmit row address to Flash.
# - CADDR_DDR, (35): Transmit column address to Flash.
# - MODE1_DDR, (36): Transmit mode bits to Flash.
# - MODE2_DDR, (37): Transmit mode bits to Flash.
# - MODE4_DDR, (38): Transmit mode bits to Flash.
# - MODE8_DDR, (39): Transmit mode bits to Flash.
# - WRITE_DDR, (40): Transmit program data to Flash device.
# - READ_DDR, (41): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_DDR, (42): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_DDR, (43): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_DDR, (44): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_DDR, (45): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# Possible options: <STOP, CMD_SDR, RADDR_SDR, CADDR_SDR, MODE1_SDR, MODE2_SDR, MODE4_SDR, MODE8_SDR, WRITE_SDR,
# READ_SDR, LEARN_SDR, DATSZ_SDR, DUMMY_SDR, DUMMY_RWDS_SDR, JMP_ON_CS, CMD_DDR, RADDR_DDR, CADDR_DDR, MODE1_DDR,
# MODE2_DDR, MODE4_DDR, MODE8_DDR, WRITE_DDR, READ_DDR, LEARN_DDR, DATSZ_DDR, DUMMY_DDR, DUMMY_RWDS_DDR>
OPERATION_CODE: STOP
lookupTable_seq13_instr1:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq13_instr2:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq13_instr3:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq13_instr4:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq13_instr5:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq13_instr6:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq13_instr7:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
# ----------------------------------===== lookupTable_seq14_instr0 [Optional] =====-----------------------------------
# Description: Offset: 0x00000160, Width: 16b; Lookup table holds Flash command sequences 14, instruction 0
lookupTable_seq14_instr0:
# ------------------------------------------===== OPERAND [Optional] =====------------------------------------------
# Description: Offset: 0b, Width: 8b, Instruction operand. Its values depends on used instruction
OPERAND: 0
# -----------------------------------------===== NUM_PADS [Optional] =====------------------------------------------
# Description: Offset: 8b, Width: 2b, Number of pads used by instruction. Some instructions ignores this parameter.
# - 1PAD, (0): Single mode. One pad is used.
# - 2PAD, (1): Dual mode. Two pads are used.
# - 4PAD, (2): Quad mode. Four pads are used.
# - 8PAD, (3): Octal mode. Eight pads are used.
# Possible options: <1PAD, 2PAD, 4PAD, 8PAD>
NUM_PADS: 1PAD
# --------------------------------------===== OPERATION_CODE [Optional] =====---------------------------------------
# Description: Offset: 10b, Width: 6b, Instruction operation code.
# - STOP, (0): Stop execution and de-assert CS. Then, the next command sequence (to the same flash device) starts
# from instruction pointer 0.
# - CMD_SDR, (1): Transmit command code to Flash.
# - RADDR_SDR, (2): Transmit row address to Flash.
# - CADDR_SDR, (3): Transmit column address to Flash.
# - MODE1_SDR, (4): Transmit mode bits to Flash.
# - MODE2_SDR, (5): Transmit mode bits to Flash.
# - MODE4_SDR, (6): Transmit mode bits to Flash.
# - MODE8_SDR, (7): Transmit mode bits to Flash.
# - WRITE_SDR, (8): Transmit program data to Flash device.
# - READ_SDR, (9): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_SDR, (10): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_SDR, (11): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_SDR, (12): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_SDR, (13): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# - JMP_ON_CS, (31): Stop execution, de-assert CS and save operand[7:0] as the instruction start pointer for next
# sequence.Normally this instruction is used to support Execute-In-Place enhanced mode. See XIP enhanced mode for
# more details.This instruction is only allowed for AHB read commands. There is interrupt status bit set
# (INTR[IPCMDERR] or INTR[AHBCMDERR]) when using this instruction in IP command or AHB write command.
# - CMD_DDR, (33): Transmit command code to Flash.
# - RADDR_DDR, (34): Transmit row address to Flash.
# - CADDR_DDR, (35): Transmit column address to Flash.
# - MODE1_DDR, (36): Transmit mode bits to Flash.
# - MODE2_DDR, (37): Transmit mode bits to Flash.
# - MODE4_DDR, (38): Transmit mode bits to Flash.
# - MODE8_DDR, (39): Transmit mode bits to Flash.
# - WRITE_DDR, (40): Transmit program data to Flash device.
# - READ_DDR, (41): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_DDR, (42): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_DDR, (43): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_DDR, (44): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_DDR, (45): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# Possible options: <STOP, CMD_SDR, RADDR_SDR, CADDR_SDR, MODE1_SDR, MODE2_SDR, MODE4_SDR, MODE8_SDR, WRITE_SDR,
# READ_SDR, LEARN_SDR, DATSZ_SDR, DUMMY_SDR, DUMMY_RWDS_SDR, JMP_ON_CS, CMD_DDR, RADDR_DDR, CADDR_DDR, MODE1_DDR,
# MODE2_DDR, MODE4_DDR, MODE8_DDR, WRITE_DDR, READ_DDR, LEARN_DDR, DATSZ_DDR, DUMMY_DDR, DUMMY_RWDS_DDR>
OPERATION_CODE: STOP
lookupTable_seq14_instr1:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq14_instr2:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq14_instr3:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq14_instr4:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq14_instr5:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq14_instr6:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq14_instr7:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
# ----------------------------------===== lookupTable_seq15_instr0 [Optional] =====-----------------------------------
# Description: Offset: 0x00000170, Width: 16b; Lookup table holds Flash command sequences 15, instruction 0
lookupTable_seq15_instr0:
# ------------------------------------------===== OPERAND [Optional] =====------------------------------------------
# Description: Offset: 0b, Width: 8b, Instruction operand. Its values depends on used instruction
OPERAND: 0
# -----------------------------------------===== NUM_PADS [Optional] =====------------------------------------------
# Description: Offset: 8b, Width: 2b, Number of pads used by instruction. Some instructions ignores this parameter.
# - 1PAD, (0): Single mode. One pad is used.
# - 2PAD, (1): Dual mode. Two pads are used.
# - 4PAD, (2): Quad mode. Four pads are used.
# - 8PAD, (3): Octal mode. Eight pads are used.
# Possible options: <1PAD, 2PAD, 4PAD, 8PAD>
NUM_PADS: 1PAD
# --------------------------------------===== OPERATION_CODE [Optional] =====---------------------------------------
# Description: Offset: 10b, Width: 6b, Instruction operation code.
# - STOP, (0): Stop execution and de-assert CS. Then, the next command sequence (to the same flash device) starts
# from instruction pointer 0.
# - CMD_SDR, (1): Transmit command code to Flash.
# - RADDR_SDR, (2): Transmit row address to Flash.
# - CADDR_SDR, (3): Transmit column address to Flash.
# - MODE1_SDR, (4): Transmit mode bits to Flash.
# - MODE2_SDR, (5): Transmit mode bits to Flash.
# - MODE4_SDR, (6): Transmit mode bits to Flash.
# - MODE8_SDR, (7): Transmit mode bits to Flash.
# - WRITE_SDR, (8): Transmit program data to Flash device.
# - READ_SDR, (9): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_SDR, (10): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_SDR, (11): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_SDR, (12): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_SDR, (13): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# - JMP_ON_CS, (31): Stop execution, de-assert CS and save operand[7:0] as the instruction start pointer for next
# sequence.Normally this instruction is used to support Execute-In-Place enhanced mode. See XIP enhanced mode for
# more details.This instruction is only allowed for AHB read commands. There is interrupt status bit set
# (INTR[IPCMDERR] or INTR[AHBCMDERR]) when using this instruction in IP command or AHB write command.
# - CMD_DDR, (33): Transmit command code to Flash.
# - RADDR_DDR, (34): Transmit row address to Flash.
# - CADDR_DDR, (35): Transmit column address to Flash.
# - MODE1_DDR, (36): Transmit mode bits to Flash.
# - MODE2_DDR, (37): Transmit mode bits to Flash.
# - MODE4_DDR, (38): Transmit mode bits to Flash.
# - MODE8_DDR, (39): Transmit mode bits to Flash.
# - WRITE_DDR, (40): Transmit program data to Flash device.
# - READ_DDR, (41): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_DDR, (42): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_DDR, (43): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_DDR, (44): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_DDR, (45): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# Possible options: <STOP, CMD_SDR, RADDR_SDR, CADDR_SDR, MODE1_SDR, MODE2_SDR, MODE4_SDR, MODE8_SDR, WRITE_SDR,
# READ_SDR, LEARN_SDR, DATSZ_SDR, DUMMY_SDR, DUMMY_RWDS_SDR, JMP_ON_CS, CMD_DDR, RADDR_DDR, CADDR_DDR, MODE1_DDR,
# MODE2_DDR, MODE4_DDR, MODE8_DDR, WRITE_DDR, READ_DDR, LEARN_DDR, DATSZ_DDR, DUMMY_DDR, DUMMY_RWDS_DDR>
OPERATION_CODE: STOP
lookupTable_seq15_instr1:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq15_instr2:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq15_instr3:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq15_instr4:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq15_instr5:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq15_instr6:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq15_instr7:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
# ---------------------------------------===== lutCustomSeq_0 [Optional] =====----------------------------------------
# Description: Offset: 0x00000180, Width: 32b; [0x180-0x1af] Customizable LUT Sequences
lutCustomSeq_0:
# ------------------------------------------===== seqNum [Optional] =====-------------------------------------------
# Description: Offset: 0b, Width: 8b, Sequence Number, valid number: 1-16
seqNum: 0
# -------------------------------------------===== seqId [Optional] =====-------------------------------------------
# Description: Offset: 8b, Width: 8b, Sequence Index, valid number: 0-15
seqId: 0
# -----------------------------------------===== reserved [Optional] =====------------------------------------------
# Description: Offset: 16b, Width: 16b, N/A
reserved: 0
# ---------------------------------------===== lutCustomSeq_1 [Optional] =====----------------------------------------
# Description: Offset: 0x00000184, Width: 32b; [0x180-0x1af] Customizable LUT Sequences
lutCustomSeq_1:
# ------------------------------------------===== seqNum [Optional] =====-------------------------------------------
# Description: Offset: 0b, Width: 8b, Sequence Number, valid number: 1-16
seqNum: 0
# -------------------------------------------===== seqId [Optional] =====-------------------------------------------
# Description: Offset: 8b, Width: 8b, Sequence Index, valid number: 0-15
seqId: 0
# -----------------------------------------===== reserved [Optional] =====------------------------------------------
# Description: Offset: 16b, Width: 16b, N/A
reserved: 0
# ---------------------------------------===== lutCustomSeq_2 [Optional] =====----------------------------------------
# Description: Offset: 0x00000188, Width: 32b; [0x180-0x1af] Customizable LUT Sequences
lutCustomSeq_2:
# ------------------------------------------===== seqNum [Optional] =====-------------------------------------------
# Description: Offset: 0b, Width: 8b, Sequence Number, valid number: 1-16
seqNum: 0
# -------------------------------------------===== seqId [Optional] =====-------------------------------------------
# Description: Offset: 8b, Width: 8b, Sequence Index, valid number: 0-15
seqId: 0
# -----------------------------------------===== reserved [Optional] =====------------------------------------------
# Description: Offset: 16b, Width: 16b, N/A
reserved: 0
# ---------------------------------------===== lutCustomSeq_3 [Optional] =====----------------------------------------
# Description: Offset: 0x0000018C, Width: 32b; [0x180-0x1af] Customizable LUT Sequences
lutCustomSeq_3:
# ------------------------------------------===== seqNum [Optional] =====-------------------------------------------
# Description: Offset: 0b, Width: 8b, Sequence Number, valid number: 1-16
seqNum: 0
# -------------------------------------------===== seqId [Optional] =====-------------------------------------------
# Description: Offset: 8b, Width: 8b, Sequence Index, valid number: 0-15
seqId: 0
# -----------------------------------------===== reserved [Optional] =====------------------------------------------
# Description: Offset: 16b, Width: 16b, N/A
reserved: 0
# ---------------------------------------===== lutCustomSeq_4 [Optional] =====----------------------------------------
# Description: Offset: 0x00000190, Width: 32b; [0x180-0x1af] Customizable LUT Sequences
lutCustomSeq_4:
# ------------------------------------------===== seqNum [Optional] =====-------------------------------------------
# Description: Offset: 0b, Width: 8b, Sequence Number, valid number: 1-16
seqNum: 0
# -------------------------------------------===== seqId [Optional] =====-------------------------------------------
# Description: Offset: 8b, Width: 8b, Sequence Index, valid number: 0-15
seqId: 0
# -----------------------------------------===== reserved [Optional] =====------------------------------------------
# Description: Offset: 16b, Width: 16b, N/A
reserved: 0
# ---------------------------------------===== lutCustomSeq_5 [Optional] =====----------------------------------------
# Description: Offset: 0x00000194, Width: 32b; [0x180-0x1af] Customizable LUT Sequences
lutCustomSeq_5:
# ------------------------------------------===== seqNum [Optional] =====-------------------------------------------
# Description: Offset: 0b, Width: 8b, Sequence Number, valid number: 1-16
seqNum: 0
# -------------------------------------------===== seqId [Optional] =====-------------------------------------------
# Description: Offset: 8b, Width: 8b, Sequence Index, valid number: 0-15
seqId: 0
# -----------------------------------------===== reserved [Optional] =====------------------------------------------
# Description: Offset: 16b, Width: 16b, N/A
reserved: 0
# ---------------------------------------===== lutCustomSeq_6 [Optional] =====----------------------------------------
# Description: Offset: 0x00000198, Width: 32b; [0x180-0x1af] Customizable LUT Sequences
lutCustomSeq_6:
# ------------------------------------------===== seqNum [Optional] =====-------------------------------------------
# Description: Offset: 0b, Width: 8b, Sequence Number, valid number: 1-16
seqNum: 0
# -------------------------------------------===== seqId [Optional] =====-------------------------------------------
# Description: Offset: 8b, Width: 8b, Sequence Index, valid number: 0-15
seqId: 0
# -----------------------------------------===== reserved [Optional] =====------------------------------------------
# Description: Offset: 16b, Width: 16b, N/A
reserved: 0
# ---------------------------------------===== lutCustomSeq_7 [Optional] =====----------------------------------------
# Description: Offset: 0x0000019C, Width: 32b; [0x180-0x1af] Customizable LUT Sequences
lutCustomSeq_7:
# ------------------------------------------===== seqNum [Optional] =====-------------------------------------------
# Description: Offset: 0b, Width: 8b, Sequence Number, valid number: 1-16
seqNum: 0
# -------------------------------------------===== seqId [Optional] =====-------------------------------------------
# Description: Offset: 8b, Width: 8b, Sequence Index, valid number: 0-15
seqId: 0
# -----------------------------------------===== reserved [Optional] =====------------------------------------------
# Description: Offset: 16b, Width: 16b, N/A
reserved: 0
# ---------------------------------------===== lutCustomSeq_8 [Optional] =====----------------------------------------
# Description: Offset: 0x000001A0, Width: 32b; [0x180-0x1af] Customizable LUT Sequences
lutCustomSeq_8:
# ------------------------------------------===== seqNum [Optional] =====-------------------------------------------
# Description: Offset: 0b, Width: 8b, Sequence Number, valid number: 1-16
seqNum: 0
# -------------------------------------------===== seqId [Optional] =====-------------------------------------------
# Description: Offset: 8b, Width: 8b, Sequence Index, valid number: 0-15
seqId: 0
# -----------------------------------------===== reserved [Optional] =====------------------------------------------
# Description: Offset: 16b, Width: 16b, N/A
reserved: 0
# ---------------------------------------===== lutCustomSeq_9 [Optional] =====----------------------------------------
# Description: Offset: 0x000001A4, Width: 32b; [0x180-0x1af] Customizable LUT Sequences
lutCustomSeq_9:
# ------------------------------------------===== seqNum [Optional] =====-------------------------------------------
# Description: Offset: 0b, Width: 8b, Sequence Number, valid number: 1-16
seqNum: 0
# -------------------------------------------===== seqId [Optional] =====-------------------------------------------
# Description: Offset: 8b, Width: 8b, Sequence Index, valid number: 0-15
seqId: 0
# -----------------------------------------===== reserved [Optional] =====------------------------------------------
# Description: Offset: 16b, Width: 16b, N/A
reserved: 0
# ---------------------------------------===== lutCustomSeq_10 [Optional] =====---------------------------------------
# Description: Offset: 0x000001A8, Width: 32b; [0x180-0x1af] Customizable LUT Sequences
lutCustomSeq_10:
# ------------------------------------------===== seqNum [Optional] =====-------------------------------------------
# Description: Offset: 0b, Width: 8b, Sequence Number, valid number: 1-16
seqNum: 0
# -------------------------------------------===== seqId [Optional] =====-------------------------------------------
# Description: Offset: 8b, Width: 8b, Sequence Index, valid number: 0-15
seqId: 0
# -----------------------------------------===== reserved [Optional] =====------------------------------------------
# Description: Offset: 16b, Width: 16b, N/A
reserved: 0
# ---------------------------------------===== lutCustomSeq_11 [Optional] =====---------------------------------------
# Description: Offset: 0x000001AC, Width: 32b; [0x180-0x1af] Customizable LUT Sequences
lutCustomSeq_11:
# ------------------------------------------===== seqNum [Optional] =====-------------------------------------------
# Description: Offset: 0b, Width: 8b, Sequence Number, valid number: 1-16
seqNum: 0
# -------------------------------------------===== seqId [Optional] =====-------------------------------------------
# Description: Offset: 8b, Width: 8b, Sequence Index, valid number: 0-15
seqId: 0
# -----------------------------------------===== reserved [Optional] =====------------------------------------------
# Description: Offset: 16b, Width: 16b, N/A
reserved: 0
# -----------------------------------------===== reserved4_0 [Optional] =====-----------------------------------------
# Description: Offset: 0x000001B0, Width: 32b; [0x1b0-0x1bf] Reserved for future use
reserved4_0: '0x00000000'
# -----------------------------------------===== reserved4_1 [Optional] =====-----------------------------------------
# Description: Offset: 0x000001B4, Width: 32b; [0x1b0-0x1bf] Reserved for future use
reserved4_1: '0x00000000'
# -----------------------------------------===== reserved4_2 [Optional] =====-----------------------------------------
# Description: Offset: 0x000001B8, Width: 32b; [0x1b0-0x1bf] Reserved for future use
reserved4_2: '0x00000000'
# -----------------------------------------===== reserved4_3 [Optional] =====-----------------------------------------
# Description: Offset: 0x000001BC, Width: 32b; [0x1b0-0x1bf] Reserved for future use
reserved4_3: '0x00000000'
# ------------------------------------------===== pageSize [Optional] =====-------------------------------------------
# Description: Offset: 0x000001C0, Width: 32b; Page size of Serial NOR
pageSize: '0x00000000'
# -----------------------------------------===== sectorSize [Optional] =====------------------------------------------
# Description: Offset: 0x000001C4, Width: 32b; Sector size of Serial NOR
sectorSize: '0x00000000'
# -------------------------------------===== ipcmdSerialClkFreq [Optional] =====--------------------------------------
# Description: Offset: 0x000001C8, Width: 8b; Clock frequency for IP command
ipcmdSerialClkFreq: '0x00'
# -------------------------------------===== isUniformBlockSize [Optional] =====--------------------------------------
# Description: Offset: 0x000001C9, Width: 8b; Sector/Block size is the same
isUniformBlockSize: '0x00'
# -----------------------------------------===== reserved0_0 [Optional] =====-----------------------------------------
# Description: Offset: 0x000001CA, Width: 8b; Reserved for future use
reserved0_0: '0x00'
# -----------------------------------------===== reserved0_1 [Optional] =====-----------------------------------------
# Description: Offset: 0x000001CB, Width: 8b; Reserved for future use
reserved0_1: '0x00'
# ----------------------------------------===== serialNorType [Optional] =====----------------------------------------
# Description: Offset: 0x000001CC, Width: 8b; Serial NOR Flash type: 0/1/2/3
serialNorType: '0x00'
# --------------------------------------===== needExitNoCmdMode [Optional] =====--------------------------------------
# Description: Offset: 0x000001CD, Width: 8b; Need to exit NoCmd mode before other IP command
needExitNoCmdMode: '0x00'
# ------------------------------------===== halfClkForNonReadCmd [Optional] =====-------------------------------------
# Description: Offset: 0x000001CE, Width: 8b; Half the Serial Clock for non-read command: true/false
halfClkForNonReadCmd: '0x00'
# ------------------------------------===== needRestoreNoCmdMode [Optional] =====-------------------------------------
# Description: Offset: 0x000001CF, Width: 8b; Need to Restore NoCmd mode after IP command execution
needRestoreNoCmdMode: '0x00'
# ------------------------------------------===== blockSize [Optional] =====------------------------------------------
# Description: Offset: 0x000001D0, Width: 32b; Block size
blockSize: '0x00000000'
# -----------------------------------------===== reserve2_0 [Optional] =====------------------------------------------
# Description: Offset: 0x000001D4, Width: 32b; Reserved for future use
reserve2_0: '0x00000000'
# -----------------------------------------===== reserve2_1 [Optional] =====------------------------------------------
# Description: Offset: 0x000001D8, Width: 32b; Reserved for future use
reserve2_1: '0x00000000'
# -----------------------------------------===== reserve2_2 [Optional] =====------------------------------------------
# Description: Offset: 0x000001DC, Width: 32b; Reserved for future use
reserve2_2: '0x00000000'
# -----------------------------------------===== reserve2_3 [Optional] =====------------------------------------------
# Description: Offset: 0x000001E0, Width: 32b; Reserved for future use
reserve2_3: '0x00000000'
# -----------------------------------------===== reserve2_4 [Optional] =====------------------------------------------
# Description: Offset: 0x000001E4, Width: 32b; Reserved for future use
reserve2_4: '0x00000000'
# -----------------------------------------===== reserve2_5 [Optional] =====------------------------------------------
# Description: Offset: 0x000001E8, Width: 32b; Reserved for future use
reserve2_5: '0x00000000'
# -----------------------------------------===== reserve2_6 [Optional] =====------------------------------------------
# Description: Offset: 0x000001EC, Width: 32b; Reserved for future use
reserve2_6: '0x00000000'
# -----------------------------------------===== reserve2_7 [Optional] =====------------------------------------------
# Description: Offset: 0x000001F0, Width: 32b; Reserved for future use
reserve2_7: '0x00000000'
# -----------------------------------------===== reserve2_8 [Optional] =====------------------------------------------
# Description: Offset: 0x000001F4, Width: 32b; Reserved for future use
reserve2_8: '0x00000000'
# -----------------------------------------===== reserve2_9 [Optional] =====------------------------------------------
# Description: Offset: 0x000001F8, Width: 32b; Reserved for future use
reserve2_9: '0x00000000'
# -----------------------------------------===== reserve2_10 [Optional] =====-----------------------------------------
# Description: Offset: 0x000001FC, Width: 32b; Reserved for future use
reserve2_10: '0x00000000'
FCB for mimxrt1020, Revision: a0 and flexspi_nor#
FCB for mimxrt1020, Revision: a0 and flexspi_nor JSON schema
FCB for mimxrt1020, Revision: a0 and flexspi_nor YAML configuration template
# ================================= FCB for mimxrt1020, Revision: a0 and flexspi_nor =================================
# ======================================================================================================================
# == FCB for mimxrt1020, Revision: a0 and flexspi_nor ==
# ======================================================================================================================
# -------------------------------------===== The chip family name [Required] =====--------------------------------------
# Description: NXP chip family identifier.
family: CHOOSE_FROM_TABLE
# -----------------------------------------===== MCU revision [Optional] =====------------------------------------------
# Description: Revision of silicon. The 'latest' name, means most current revision.
# Possible options: <a0, latest>
revision: a0
# ------------------------------------------===== Memory type [Required] =====------------------------------------------
# Description: Specify type of memory used by FCB description.
# Possible options: <flexspi_nor>
type: flexspi_nor
# ------------------------------------------===== mimxrt1020 [Required] =====-------------------------------------------
fcb_settings:
# ---------------------------------------------===== tag [Optional] =====---------------------------------------------
# Description: Offset: 0x00000000, Width: 32b; [0x000-0x003] Tag, fixed value 0x42464346UL
tag: '0x42464346'
# -------------------------------------------===== version [Optional] =====-------------------------------------------
# Description: Offset: 0x00000004, Width: 32b; [0x004-0x007] Version,[31:24] -'V', [23:16] - Major, [15:8] - Minor,
# [7:0] - bugfix
version: '0x56010400'
# ------------------------------------------===== reserved0 [Optional] =====------------------------------------------
# Description: Offset: 0x00000008, Width: 32b; [0x008-0x00b] Reserved for future use
reserved0: '0x00000000'
# --------------------------------------===== readSampleClkSrc [Optional] =====---------------------------------------
# Description: Offset: 0x0000000C, Width: 8b; [0x00c-0x00c] Read Sample Clock Source, valid value: 0/1/3
readSampleClkSrc: '0x00'
# -----------------------------------------===== csHoldTime [Optional] =====------------------------------------------
# Description: Offset: 0x0000000D, Width: 8b; [0x00d-0x00d] CS hold time, default value: 3
csHoldTime: '0x00'
# -----------------------------------------===== csSetupTime [Optional] =====-----------------------------------------
# Description: Offset: 0x0000000E, Width: 8b; [0x00e-0x00e] CS setup time, default value: 3
csSetupTime: '0x00'
# -------------------------------------===== columnAddressWidth [Optional] =====--------------------------------------
# Description: Offset: 0x0000000F, Width: 8b; [0x00f-0x00f] Column Address with, for HyperBus protocol, it is fixed
# to 3, For Serial NAND, need to refer to datasheet
columnAddressWidth: '0x00'
# -------------------------------------===== deviceModeCfgEnable [Optional] =====-------------------------------------
# Description: Offset: 0x00000010, Width: 8b; [0x010-0x010] Device Mode Configure enable flag, 1 - Enable, 0 -
# Disable
deviceModeCfgEnable: '0x00'
# ---------------------------------------===== deviceModeType [Optional] =====----------------------------------------
# Description: Offset: 0x00000011, Width: 8b; [0x011-0x011] Specify the configuration command type:Quad Enable,
# DPI/QPI/OPI switch, Generic configuration, etc.
deviceModeType: '0x00'
# -------------------------------------===== waitTimeCfgCommands [Optional] =====-------------------------------------
# Description: Offset: 0x00000012, Width: 16b; [0x012-0x013] Wait time for all configuration commands, unit: 100us,
# Used for DPI/QPI/OPI switch or reset command
waitTimeCfgCommands: '0x0000'
# ----------------------------------------===== deviceModeSeq [Optional] =====----------------------------------------
# Description: Offset: 0x00000014, Width: 32b; [0x014-0x017] Device mode sequence info, [7:0] - LUT sequence id,
# [15:8] - LUt sequence number, [31:16] Reserved
deviceModeSeq:
# ------------------------------------------===== seqNum [Optional] =====-------------------------------------------
# Description: Offset: 0b, Width: 8b, Sequence Number, valid number: 1-16
seqNum: 0
# -------------------------------------------===== seqId [Optional] =====-------------------------------------------
# Description: Offset: 8b, Width: 8b, Sequence Index, valid number: 0-15
seqId: 0
# -----------------------------------------===== reserved [Optional] =====------------------------------------------
# Description: Offset: 16b, Width: 16b, N/A
reserved: 0
# ----------------------------------------===== deviceModeArg [Optional] =====----------------------------------------
# Description: Offset: 0x00000018, Width: 32b; [0x018-0x01b] Argument/Parameter for device configuration
deviceModeArg: '0x00000000'
# ---------------------------------------===== configCmdEnable [Optional] =====---------------------------------------
# Description: Offset: 0x0000001C, Width: 8b; [0x01c-0x01c] Configure command Enable Flag, 1 - Enable, 0 - Disable
configCmdEnable: '0x00'
# --------------------------------------===== configModeType_0 [Optional] =====---------------------------------------
# Description: Offset: 0x0000001D, Width: 8b; [0x01d-0x01f] Configure Mode Type, similar as deviceModeTpe
configModeType_0: '0x00'
# --------------------------------------===== configModeType_1 [Optional] =====---------------------------------------
# Description: Offset: 0x0000001E, Width: 8b; [0x01d-0x01f] Configure Mode Type, similar as deviceModeTpe
configModeType_1: '0x00'
# --------------------------------------===== configModeType_2 [Optional] =====---------------------------------------
# Description: Offset: 0x0000001F, Width: 8b; [0x01d-0x01f] Configure Mode Type, similar as deviceModeTpe
configModeType_2: '0x00'
# ---------------------------------------===== configCmdSeqs_0 [Optional] =====---------------------------------------
# Description: Offset: 0x00000020, Width: 32b; [0x020-0x02b] Sequence info for Device Configuration command, similar
# as deviceModeSeq
configCmdSeqs_0:
# ------------------------------------------===== seqNum [Optional] =====-------------------------------------------
# Description: Offset: 0b, Width: 8b, Sequence Number, valid number: 1-16
seqNum: 0
# -------------------------------------------===== seqId [Optional] =====-------------------------------------------
# Description: Offset: 8b, Width: 8b, Sequence Index, valid number: 0-15
seqId: 0
# -----------------------------------------===== reserved [Optional] =====------------------------------------------
# Description: Offset: 16b, Width: 16b, N/A
reserved: 0
# ---------------------------------------===== configCmdSeqs_1 [Optional] =====---------------------------------------
# Description: Offset: 0x00000024, Width: 32b; [0x020-0x02b] Sequence info for Device Configuration command, similar
# as deviceModeSeq
configCmdSeqs_1:
# ------------------------------------------===== seqNum [Optional] =====-------------------------------------------
# Description: Offset: 0b, Width: 8b, Sequence Number, valid number: 1-16
seqNum: 0
# -------------------------------------------===== seqId [Optional] =====-------------------------------------------
# Description: Offset: 8b, Width: 8b, Sequence Index, valid number: 0-15
seqId: 0
# -----------------------------------------===== reserved [Optional] =====------------------------------------------
# Description: Offset: 16b, Width: 16b, N/A
reserved: 0
# ---------------------------------------===== configCmdSeqs_2 [Optional] =====---------------------------------------
# Description: Offset: 0x00000028, Width: 32b; [0x020-0x02b] Sequence info for Device Configuration command, similar
# as deviceModeSeq
configCmdSeqs_2:
# ------------------------------------------===== seqNum [Optional] =====-------------------------------------------
# Description: Offset: 0b, Width: 8b, Sequence Number, valid number: 1-16
seqNum: 0
# -------------------------------------------===== seqId [Optional] =====-------------------------------------------
# Description: Offset: 8b, Width: 8b, Sequence Index, valid number: 0-15
seqId: 0
# -----------------------------------------===== reserved [Optional] =====------------------------------------------
# Description: Offset: 16b, Width: 16b, N/A
reserved: 0
# ------------------------------------------===== reserved1 [Optional] =====------------------------------------------
# Description: Offset: 0x0000002C, Width: 32b; [0x02c-0x02f] Reserved for future use
reserved1: '0x00000000'
# ---------------------------------------===== configCmdArgs_0 [Optional] =====---------------------------------------
# Description: Offset: 0x00000030, Width: 32b; [0x030-0x03b] Arguments/Parameters for device Configuration commands
configCmdArgs_0: '0x00000000'
# ---------------------------------------===== configCmdArgs_1 [Optional] =====---------------------------------------
# Description: Offset: 0x00000034, Width: 32b; [0x030-0x03b] Arguments/Parameters for device Configuration commands
configCmdArgs_1: '0x00000000'
# ---------------------------------------===== configCmdArgs_2 [Optional] =====---------------------------------------
# Description: Offset: 0x00000038, Width: 32b; [0x030-0x03b] Arguments/Parameters for device Configuration commands
configCmdArgs_2: '0x00000000'
# ------------------------------------------===== reserved2 [Optional] =====------------------------------------------
# Description: Offset: 0x0000003C, Width: 32b; [0x03c-0x03f] Reserved for future use
reserved2: '0x00000000'
# ------------------------------------===== controllerMiscOption [Optional] =====-------------------------------------
# Description: Offset: 0x00000040, Width: 32b; [0x040-0x043] Controller Misc Options, see Misc feature bit
# definitions for more details
controllerMiscOption: '0x00000000'
# -----------------------------------------===== deviceType [Optional] =====------------------------------------------
# Description: Offset: 0x00000044, Width: 8b; [0x044-0x044] Device Type: See Flash Type Definition for more details
deviceType: '0x00'
# ----------------------------------------===== sflashPadType [Optional] =====----------------------------------------
# Description: Offset: 0x00000045, Width: 8b; [0x045-0x045] Serial Flash Pad Type: 1 - Single, 2 - Dual, 4 - Quad, 8
# - Octal
sflashPadType: '0x00'
# ----------------------------------------===== serialClkFreq [Optional] =====----------------------------------------
# Description: Offset: 0x00000046, Width: 8b; [0x046-0x046] Serial Flash Frequency, device specific definitions, See
# System Boot Chapter for more details
serialClkFreq: '0x00'
# -------------------------------------===== lutCustomSeqEnable [Optional] =====--------------------------------------
# Description: Offset: 0x00000047, Width: 8b; [0x047-0x047] LUT customization Enable, it is required if the
# program/erase cannot be done using 1 LUT sequence, currently, only applicable to HyperFLASH
lutCustomSeqEnable: '0x00'
# -----------------------------------------===== reserved3_0 [Optional] =====-----------------------------------------
# Description: Offset: 0x00000048, Width: 32b; [0x048-0x04f] Reserved for future use
reserved3_0: '0x00000000'
# -----------------------------------------===== reserved3_1 [Optional] =====-----------------------------------------
# Description: Offset: 0x0000004C, Width: 32b; [0x048-0x04f] Reserved for future use
reserved3_1: '0x00000000'
# ----------------------------------------===== sflashA1Size [Optional] =====-----------------------------------------
# Description: Offset: 0x00000050, Width: 32b; [0x050-0x053] Size of Flash connected to A1
sflashA1Size: '0x00000000'
# ----------------------------------------===== sflashA2Size [Optional] =====-----------------------------------------
# Description: Offset: 0x00000054, Width: 32b; [0x054-0x057] Size of Flash connected to A2
sflashA2Size: '0x00000000'
# ----------------------------------------===== sflashB1Size [Optional] =====-----------------------------------------
# Description: Offset: 0x00000058, Width: 32b; [0x058-0x05b] Size of Flash connected to B1
sflashB1Size: '0x00000000'
# ----------------------------------------===== sflashB2Size [Optional] =====-----------------------------------------
# Description: Offset: 0x0000005C, Width: 32b; [0x05c-0x05f] Size of Flash connected to B2
sflashB2Size: '0x00000000'
# ------------------------------------===== csPadSettingOverride [Optional] =====-------------------------------------
# Description: Offset: 0x00000060, Width: 32b; [0x060-0x063] CS pad setting override value
csPadSettingOverride: '0x00000000'
# -----------------------------------===== sclkPadSettingOverride [Optional] =====------------------------------------
# Description: Offset: 0x00000064, Width: 32b; [0x064-0x067] SCK pad setting override value
sclkPadSettingOverride: '0x00000000'
# -----------------------------------===== dataPadSettingOverride [Optional] =====------------------------------------
# Description: Offset: 0x00000068, Width: 32b; [0x068-0x06b] data pad setting override value
dataPadSettingOverride: '0x00000000'
# ------------------------------------===== dqsPadSettingOverride [Optional] =====------------------------------------
# Description: Offset: 0x0000006C, Width: 32b; [0x06c-0x06f] DQS pad setting override value
dqsPadSettingOverride: '0x00000000'
# -----------------------------------------===== timeoutInMs [Optional] =====-----------------------------------------
# Description: Offset: 0x00000070, Width: 32b; [0x070-0x073] Timeout threshold for read status command
timeoutInMs: '0x00000000'
# ---------------------------------------===== commandInterval [Optional] =====---------------------------------------
# Description: Offset: 0x00000074, Width: 32b; [0x074-0x077] CS deselect interval between two commands
commandInterval: '0x00000000'
# ---------------------------------------===== dataValidTime_0 [Optional] =====---------------------------------------
# Description: Offset: 0x00000078, Width: 16b; [0x078-0x07b] CLK edge to data valid time for PORT A and PORT B, in
# terms of 0.1ns
dataValidTime_0: '0x0000'
# ---------------------------------------===== dataValidTime_1 [Optional] =====---------------------------------------
# Description: Offset: 0x0000007A, Width: 16b; [0x078-0x07b] CLK edge to data valid time for PORT A and PORT B, in
# terms of 0.1ns
dataValidTime_1: '0x0000'
# -----------------------------------------===== busyOffset [Optional] =====------------------------------------------
# Description: Offset: 0x0000007C, Width: 16b; [0x07c-0x07d] Busy offset, valid value: 0-31
busyOffset: '0x0000'
# ---------------------------------------===== busyBitPolarity [Optional] =====---------------------------------------
# Description: Offset: 0x0000007E, Width: 16b; [0x07e-0x07f] Busy flag polarity, 0 - busy flag is 1 when flash device
# is busy, 1 - busy flag is 0 when flash device is busy
busyBitPolarity: '0x0000'
# -----------------------------------===== lookupTable_seq0_instr0 [Optional] =====-----------------------------------
# Description: Offset: 0x00000080, Width: 16b; Lookup table holds Flash command sequences 0, instruction 0
lookupTable_seq0_instr0:
# ------------------------------------------===== OPERAND [Optional] =====------------------------------------------
# Description: Offset: 0b, Width: 8b, Instruction operand. Its values depends on used instruction
OPERAND: 0
# -----------------------------------------===== NUM_PADS [Optional] =====------------------------------------------
# Description: Offset: 8b, Width: 2b, Number of pads used by instruction. Some instructions ignores this parameter.
# - 1PAD, (0): Single mode. One pad is used.
# - 2PAD, (1): Dual mode. Two pads are used.
# - 4PAD, (2): Quad mode. Four pads are used.
# - 8PAD, (3): Octal mode. Eight pads are used.
# Possible options: <1PAD, 2PAD, 4PAD, 8PAD>
NUM_PADS: 1PAD
# --------------------------------------===== OPERATION_CODE [Optional] =====---------------------------------------
# Description: Offset: 10b, Width: 6b, Instruction operation code.
# - STOP, (0): Stop execution and de-assert CS. Then, the next command sequence (to the same flash device) starts
# from instruction pointer 0.
# - CMD_SDR, (1): Transmit command code to Flash.
# - RADDR_SDR, (2): Transmit row address to Flash.
# - CADDR_SDR, (3): Transmit column address to Flash.
# - MODE1_SDR, (4): Transmit mode bits to Flash.
# - MODE2_SDR, (5): Transmit mode bits to Flash.
# - MODE4_SDR, (6): Transmit mode bits to Flash.
# - MODE8_SDR, (7): Transmit mode bits to Flash.
# - WRITE_SDR, (8): Transmit program data to Flash device.
# - READ_SDR, (9): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_SDR, (10): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_SDR, (11): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_SDR, (12): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_SDR, (13): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# - JMP_ON_CS, (31): Stop execution, de-assert CS and save operand[7:0] as the instruction start pointer for next
# sequence.Normally this instruction is used to support Execute-In-Place enhanced mode. See XIP enhanced mode for
# more details.This instruction is only allowed for AHB read commands. There is interrupt status bit set
# (INTR[IPCMDERR] or INTR[AHBCMDERR]) when using this instruction in IP command or AHB write command.
# - CMD_DDR, (33): Transmit command code to Flash.
# - RADDR_DDR, (34): Transmit row address to Flash.
# - CADDR_DDR, (35): Transmit column address to Flash.
# - MODE1_DDR, (36): Transmit mode bits to Flash.
# - MODE2_DDR, (37): Transmit mode bits to Flash.
# - MODE4_DDR, (38): Transmit mode bits to Flash.
# - MODE8_DDR, (39): Transmit mode bits to Flash.
# - WRITE_DDR, (40): Transmit program data to Flash device.
# - READ_DDR, (41): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_DDR, (42): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_DDR, (43): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_DDR, (44): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_DDR, (45): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# Possible options: <STOP, CMD_SDR, RADDR_SDR, CADDR_SDR, MODE1_SDR, MODE2_SDR, MODE4_SDR, MODE8_SDR, WRITE_SDR,
# READ_SDR, LEARN_SDR, DATSZ_SDR, DUMMY_SDR, DUMMY_RWDS_SDR, JMP_ON_CS, CMD_DDR, RADDR_DDR, CADDR_DDR, MODE1_DDR,
# MODE2_DDR, MODE4_DDR, MODE8_DDR, WRITE_DDR, READ_DDR, LEARN_DDR, DATSZ_DDR, DUMMY_DDR, DUMMY_RWDS_DDR>
OPERATION_CODE: STOP
lookupTable_seq0_instr1:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq0_instr2:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq0_instr3:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq0_instr4:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq0_instr5:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq0_instr6:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq0_instr7:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
# -----------------------------------===== lookupTable_seq1_instr0 [Optional] =====-----------------------------------
# Description: Offset: 0x00000090, Width: 16b; Lookup table holds Flash command sequences 1, instruction 0
lookupTable_seq1_instr0:
# ------------------------------------------===== OPERAND [Optional] =====------------------------------------------
# Description: Offset: 0b, Width: 8b, Instruction operand. Its values depends on used instruction
OPERAND: 0
# -----------------------------------------===== NUM_PADS [Optional] =====------------------------------------------
# Description: Offset: 8b, Width: 2b, Number of pads used by instruction. Some instructions ignores this parameter.
# - 1PAD, (0): Single mode. One pad is used.
# - 2PAD, (1): Dual mode. Two pads are used.
# - 4PAD, (2): Quad mode. Four pads are used.
# - 8PAD, (3): Octal mode. Eight pads are used.
# Possible options: <1PAD, 2PAD, 4PAD, 8PAD>
NUM_PADS: 1PAD
# --------------------------------------===== OPERATION_CODE [Optional] =====---------------------------------------
# Description: Offset: 10b, Width: 6b, Instruction operation code.
# - STOP, (0): Stop execution and de-assert CS. Then, the next command sequence (to the same flash device) starts
# from instruction pointer 0.
# - CMD_SDR, (1): Transmit command code to Flash.
# - RADDR_SDR, (2): Transmit row address to Flash.
# - CADDR_SDR, (3): Transmit column address to Flash.
# - MODE1_SDR, (4): Transmit mode bits to Flash.
# - MODE2_SDR, (5): Transmit mode bits to Flash.
# - MODE4_SDR, (6): Transmit mode bits to Flash.
# - MODE8_SDR, (7): Transmit mode bits to Flash.
# - WRITE_SDR, (8): Transmit program data to Flash device.
# - READ_SDR, (9): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_SDR, (10): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_SDR, (11): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_SDR, (12): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_SDR, (13): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# - JMP_ON_CS, (31): Stop execution, de-assert CS and save operand[7:0] as the instruction start pointer for next
# sequence.Normally this instruction is used to support Execute-In-Place enhanced mode. See XIP enhanced mode for
# more details.This instruction is only allowed for AHB read commands. There is interrupt status bit set
# (INTR[IPCMDERR] or INTR[AHBCMDERR]) when using this instruction in IP command or AHB write command.
# - CMD_DDR, (33): Transmit command code to Flash.
# - RADDR_DDR, (34): Transmit row address to Flash.
# - CADDR_DDR, (35): Transmit column address to Flash.
# - MODE1_DDR, (36): Transmit mode bits to Flash.
# - MODE2_DDR, (37): Transmit mode bits to Flash.
# - MODE4_DDR, (38): Transmit mode bits to Flash.
# - MODE8_DDR, (39): Transmit mode bits to Flash.
# - WRITE_DDR, (40): Transmit program data to Flash device.
# - READ_DDR, (41): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_DDR, (42): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_DDR, (43): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_DDR, (44): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_DDR, (45): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# Possible options: <STOP, CMD_SDR, RADDR_SDR, CADDR_SDR, MODE1_SDR, MODE2_SDR, MODE4_SDR, MODE8_SDR, WRITE_SDR,
# READ_SDR, LEARN_SDR, DATSZ_SDR, DUMMY_SDR, DUMMY_RWDS_SDR, JMP_ON_CS, CMD_DDR, RADDR_DDR, CADDR_DDR, MODE1_DDR,
# MODE2_DDR, MODE4_DDR, MODE8_DDR, WRITE_DDR, READ_DDR, LEARN_DDR, DATSZ_DDR, DUMMY_DDR, DUMMY_RWDS_DDR>
OPERATION_CODE: STOP
lookupTable_seq1_instr1:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq1_instr2:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq1_instr3:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq1_instr4:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq1_instr5:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq1_instr6:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq1_instr7:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
# -----------------------------------===== lookupTable_seq2_instr0 [Optional] =====-----------------------------------
# Description: Offset: 0x000000A0, Width: 16b; Lookup table holds Flash command sequences 2, instruction 0
lookupTable_seq2_instr0:
# ------------------------------------------===== OPERAND [Optional] =====------------------------------------------
# Description: Offset: 0b, Width: 8b, Instruction operand. Its values depends on used instruction
OPERAND: 0
# -----------------------------------------===== NUM_PADS [Optional] =====------------------------------------------
# Description: Offset: 8b, Width: 2b, Number of pads used by instruction. Some instructions ignores this parameter.
# - 1PAD, (0): Single mode. One pad is used.
# - 2PAD, (1): Dual mode. Two pads are used.
# - 4PAD, (2): Quad mode. Four pads are used.
# - 8PAD, (3): Octal mode. Eight pads are used.
# Possible options: <1PAD, 2PAD, 4PAD, 8PAD>
NUM_PADS: 1PAD
# --------------------------------------===== OPERATION_CODE [Optional] =====---------------------------------------
# Description: Offset: 10b, Width: 6b, Instruction operation code.
# - STOP, (0): Stop execution and de-assert CS. Then, the next command sequence (to the same flash device) starts
# from instruction pointer 0.
# - CMD_SDR, (1): Transmit command code to Flash.
# - RADDR_SDR, (2): Transmit row address to Flash.
# - CADDR_SDR, (3): Transmit column address to Flash.
# - MODE1_SDR, (4): Transmit mode bits to Flash.
# - MODE2_SDR, (5): Transmit mode bits to Flash.
# - MODE4_SDR, (6): Transmit mode bits to Flash.
# - MODE8_SDR, (7): Transmit mode bits to Flash.
# - WRITE_SDR, (8): Transmit program data to Flash device.
# - READ_SDR, (9): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_SDR, (10): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_SDR, (11): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_SDR, (12): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_SDR, (13): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# - JMP_ON_CS, (31): Stop execution, de-assert CS and save operand[7:0] as the instruction start pointer for next
# sequence.Normally this instruction is used to support Execute-In-Place enhanced mode. See XIP enhanced mode for
# more details.This instruction is only allowed for AHB read commands. There is interrupt status bit set
# (INTR[IPCMDERR] or INTR[AHBCMDERR]) when using this instruction in IP command or AHB write command.
# - CMD_DDR, (33): Transmit command code to Flash.
# - RADDR_DDR, (34): Transmit row address to Flash.
# - CADDR_DDR, (35): Transmit column address to Flash.
# - MODE1_DDR, (36): Transmit mode bits to Flash.
# - MODE2_DDR, (37): Transmit mode bits to Flash.
# - MODE4_DDR, (38): Transmit mode bits to Flash.
# - MODE8_DDR, (39): Transmit mode bits to Flash.
# - WRITE_DDR, (40): Transmit program data to Flash device.
# - READ_DDR, (41): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_DDR, (42): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_DDR, (43): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_DDR, (44): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_DDR, (45): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# Possible options: <STOP, CMD_SDR, RADDR_SDR, CADDR_SDR, MODE1_SDR, MODE2_SDR, MODE4_SDR, MODE8_SDR, WRITE_SDR,
# READ_SDR, LEARN_SDR, DATSZ_SDR, DUMMY_SDR, DUMMY_RWDS_SDR, JMP_ON_CS, CMD_DDR, RADDR_DDR, CADDR_DDR, MODE1_DDR,
# MODE2_DDR, MODE4_DDR, MODE8_DDR, WRITE_DDR, READ_DDR, LEARN_DDR, DATSZ_DDR, DUMMY_DDR, DUMMY_RWDS_DDR>
OPERATION_CODE: STOP
lookupTable_seq2_instr1:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq2_instr2:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq2_instr3:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq2_instr4:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq2_instr5:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq2_instr6:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq2_instr7:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
# -----------------------------------===== lookupTable_seq3_instr0 [Optional] =====-----------------------------------
# Description: Offset: 0x000000B0, Width: 16b; Lookup table holds Flash command sequences 3, instruction 0
lookupTable_seq3_instr0:
# ------------------------------------------===== OPERAND [Optional] =====------------------------------------------
# Description: Offset: 0b, Width: 8b, Instruction operand. Its values depends on used instruction
OPERAND: 0
# -----------------------------------------===== NUM_PADS [Optional] =====------------------------------------------
# Description: Offset: 8b, Width: 2b, Number of pads used by instruction. Some instructions ignores this parameter.
# - 1PAD, (0): Single mode. One pad is used.
# - 2PAD, (1): Dual mode. Two pads are used.
# - 4PAD, (2): Quad mode. Four pads are used.
# - 8PAD, (3): Octal mode. Eight pads are used.
# Possible options: <1PAD, 2PAD, 4PAD, 8PAD>
NUM_PADS: 1PAD
# --------------------------------------===== OPERATION_CODE [Optional] =====---------------------------------------
# Description: Offset: 10b, Width: 6b, Instruction operation code.
# - STOP, (0): Stop execution and de-assert CS. Then, the next command sequence (to the same flash device) starts
# from instruction pointer 0.
# - CMD_SDR, (1): Transmit command code to Flash.
# - RADDR_SDR, (2): Transmit row address to Flash.
# - CADDR_SDR, (3): Transmit column address to Flash.
# - MODE1_SDR, (4): Transmit mode bits to Flash.
# - MODE2_SDR, (5): Transmit mode bits to Flash.
# - MODE4_SDR, (6): Transmit mode bits to Flash.
# - MODE8_SDR, (7): Transmit mode bits to Flash.
# - WRITE_SDR, (8): Transmit program data to Flash device.
# - READ_SDR, (9): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_SDR, (10): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_SDR, (11): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_SDR, (12): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_SDR, (13): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# - JMP_ON_CS, (31): Stop execution, de-assert CS and save operand[7:0] as the instruction start pointer for next
# sequence.Normally this instruction is used to support Execute-In-Place enhanced mode. See XIP enhanced mode for
# more details.This instruction is only allowed for AHB read commands. There is interrupt status bit set
# (INTR[IPCMDERR] or INTR[AHBCMDERR]) when using this instruction in IP command or AHB write command.
# - CMD_DDR, (33): Transmit command code to Flash.
# - RADDR_DDR, (34): Transmit row address to Flash.
# - CADDR_DDR, (35): Transmit column address to Flash.
# - MODE1_DDR, (36): Transmit mode bits to Flash.
# - MODE2_DDR, (37): Transmit mode bits to Flash.
# - MODE4_DDR, (38): Transmit mode bits to Flash.
# - MODE8_DDR, (39): Transmit mode bits to Flash.
# - WRITE_DDR, (40): Transmit program data to Flash device.
# - READ_DDR, (41): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_DDR, (42): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_DDR, (43): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_DDR, (44): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_DDR, (45): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# Possible options: <STOP, CMD_SDR, RADDR_SDR, CADDR_SDR, MODE1_SDR, MODE2_SDR, MODE4_SDR, MODE8_SDR, WRITE_SDR,
# READ_SDR, LEARN_SDR, DATSZ_SDR, DUMMY_SDR, DUMMY_RWDS_SDR, JMP_ON_CS, CMD_DDR, RADDR_DDR, CADDR_DDR, MODE1_DDR,
# MODE2_DDR, MODE4_DDR, MODE8_DDR, WRITE_DDR, READ_DDR, LEARN_DDR, DATSZ_DDR, DUMMY_DDR, DUMMY_RWDS_DDR>
OPERATION_CODE: STOP
lookupTable_seq3_instr1:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq3_instr2:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq3_instr3:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq3_instr4:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq3_instr5:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq3_instr6:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq3_instr7:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
# -----------------------------------===== lookupTable_seq4_instr0 [Optional] =====-----------------------------------
# Description: Offset: 0x000000C0, Width: 16b; Lookup table holds Flash command sequences 4, instruction 0
lookupTable_seq4_instr0:
# ------------------------------------------===== OPERAND [Optional] =====------------------------------------------
# Description: Offset: 0b, Width: 8b, Instruction operand. Its values depends on used instruction
OPERAND: 0
# -----------------------------------------===== NUM_PADS [Optional] =====------------------------------------------
# Description: Offset: 8b, Width: 2b, Number of pads used by instruction. Some instructions ignores this parameter.
# - 1PAD, (0): Single mode. One pad is used.
# - 2PAD, (1): Dual mode. Two pads are used.
# - 4PAD, (2): Quad mode. Four pads are used.
# - 8PAD, (3): Octal mode. Eight pads are used.
# Possible options: <1PAD, 2PAD, 4PAD, 8PAD>
NUM_PADS: 1PAD
# --------------------------------------===== OPERATION_CODE [Optional] =====---------------------------------------
# Description: Offset: 10b, Width: 6b, Instruction operation code.
# - STOP, (0): Stop execution and de-assert CS. Then, the next command sequence (to the same flash device) starts
# from instruction pointer 0.
# - CMD_SDR, (1): Transmit command code to Flash.
# - RADDR_SDR, (2): Transmit row address to Flash.
# - CADDR_SDR, (3): Transmit column address to Flash.
# - MODE1_SDR, (4): Transmit mode bits to Flash.
# - MODE2_SDR, (5): Transmit mode bits to Flash.
# - MODE4_SDR, (6): Transmit mode bits to Flash.
# - MODE8_SDR, (7): Transmit mode bits to Flash.
# - WRITE_SDR, (8): Transmit program data to Flash device.
# - READ_SDR, (9): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_SDR, (10): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_SDR, (11): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_SDR, (12): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_SDR, (13): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# - JMP_ON_CS, (31): Stop execution, de-assert CS and save operand[7:0] as the instruction start pointer for next
# sequence.Normally this instruction is used to support Execute-In-Place enhanced mode. See XIP enhanced mode for
# more details.This instruction is only allowed for AHB read commands. There is interrupt status bit set
# (INTR[IPCMDERR] or INTR[AHBCMDERR]) when using this instruction in IP command or AHB write command.
# - CMD_DDR, (33): Transmit command code to Flash.
# - RADDR_DDR, (34): Transmit row address to Flash.
# - CADDR_DDR, (35): Transmit column address to Flash.
# - MODE1_DDR, (36): Transmit mode bits to Flash.
# - MODE2_DDR, (37): Transmit mode bits to Flash.
# - MODE4_DDR, (38): Transmit mode bits to Flash.
# - MODE8_DDR, (39): Transmit mode bits to Flash.
# - WRITE_DDR, (40): Transmit program data to Flash device.
# - READ_DDR, (41): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_DDR, (42): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_DDR, (43): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_DDR, (44): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_DDR, (45): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# Possible options: <STOP, CMD_SDR, RADDR_SDR, CADDR_SDR, MODE1_SDR, MODE2_SDR, MODE4_SDR, MODE8_SDR, WRITE_SDR,
# READ_SDR, LEARN_SDR, DATSZ_SDR, DUMMY_SDR, DUMMY_RWDS_SDR, JMP_ON_CS, CMD_DDR, RADDR_DDR, CADDR_DDR, MODE1_DDR,
# MODE2_DDR, MODE4_DDR, MODE8_DDR, WRITE_DDR, READ_DDR, LEARN_DDR, DATSZ_DDR, DUMMY_DDR, DUMMY_RWDS_DDR>
OPERATION_CODE: STOP
lookupTable_seq4_instr1:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq4_instr2:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq4_instr3:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq4_instr4:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq4_instr5:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq4_instr6:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq4_instr7:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
# -----------------------------------===== lookupTable_seq5_instr0 [Optional] =====-----------------------------------
# Description: Offset: 0x000000D0, Width: 16b; Lookup table holds Flash command sequences 5, instruction 0
lookupTable_seq5_instr0:
# ------------------------------------------===== OPERAND [Optional] =====------------------------------------------
# Description: Offset: 0b, Width: 8b, Instruction operand. Its values depends on used instruction
OPERAND: 0
# -----------------------------------------===== NUM_PADS [Optional] =====------------------------------------------
# Description: Offset: 8b, Width: 2b, Number of pads used by instruction. Some instructions ignores this parameter.
# - 1PAD, (0): Single mode. One pad is used.
# - 2PAD, (1): Dual mode. Two pads are used.
# - 4PAD, (2): Quad mode. Four pads are used.
# - 8PAD, (3): Octal mode. Eight pads are used.
# Possible options: <1PAD, 2PAD, 4PAD, 8PAD>
NUM_PADS: 1PAD
# --------------------------------------===== OPERATION_CODE [Optional] =====---------------------------------------
# Description: Offset: 10b, Width: 6b, Instruction operation code.
# - STOP, (0): Stop execution and de-assert CS. Then, the next command sequence (to the same flash device) starts
# from instruction pointer 0.
# - CMD_SDR, (1): Transmit command code to Flash.
# - RADDR_SDR, (2): Transmit row address to Flash.
# - CADDR_SDR, (3): Transmit column address to Flash.
# - MODE1_SDR, (4): Transmit mode bits to Flash.
# - MODE2_SDR, (5): Transmit mode bits to Flash.
# - MODE4_SDR, (6): Transmit mode bits to Flash.
# - MODE8_SDR, (7): Transmit mode bits to Flash.
# - WRITE_SDR, (8): Transmit program data to Flash device.
# - READ_SDR, (9): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_SDR, (10): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_SDR, (11): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_SDR, (12): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_SDR, (13): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# - JMP_ON_CS, (31): Stop execution, de-assert CS and save operand[7:0] as the instruction start pointer for next
# sequence.Normally this instruction is used to support Execute-In-Place enhanced mode. See XIP enhanced mode for
# more details.This instruction is only allowed for AHB read commands. There is interrupt status bit set
# (INTR[IPCMDERR] or INTR[AHBCMDERR]) when using this instruction in IP command or AHB write command.
# - CMD_DDR, (33): Transmit command code to Flash.
# - RADDR_DDR, (34): Transmit row address to Flash.
# - CADDR_DDR, (35): Transmit column address to Flash.
# - MODE1_DDR, (36): Transmit mode bits to Flash.
# - MODE2_DDR, (37): Transmit mode bits to Flash.
# - MODE4_DDR, (38): Transmit mode bits to Flash.
# - MODE8_DDR, (39): Transmit mode bits to Flash.
# - WRITE_DDR, (40): Transmit program data to Flash device.
# - READ_DDR, (41): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_DDR, (42): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_DDR, (43): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_DDR, (44): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_DDR, (45): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# Possible options: <STOP, CMD_SDR, RADDR_SDR, CADDR_SDR, MODE1_SDR, MODE2_SDR, MODE4_SDR, MODE8_SDR, WRITE_SDR,
# READ_SDR, LEARN_SDR, DATSZ_SDR, DUMMY_SDR, DUMMY_RWDS_SDR, JMP_ON_CS, CMD_DDR, RADDR_DDR, CADDR_DDR, MODE1_DDR,
# MODE2_DDR, MODE4_DDR, MODE8_DDR, WRITE_DDR, READ_DDR, LEARN_DDR, DATSZ_DDR, DUMMY_DDR, DUMMY_RWDS_DDR>
OPERATION_CODE: STOP
lookupTable_seq5_instr1:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq5_instr2:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq5_instr3:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq5_instr4:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq5_instr5:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq5_instr6:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq5_instr7:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
# -----------------------------------===== lookupTable_seq6_instr0 [Optional] =====-----------------------------------
# Description: Offset: 0x000000E0, Width: 16b; Lookup table holds Flash command sequences 6, instruction 0
lookupTable_seq6_instr0:
# ------------------------------------------===== OPERAND [Optional] =====------------------------------------------
# Description: Offset: 0b, Width: 8b, Instruction operand. Its values depends on used instruction
OPERAND: 0
# -----------------------------------------===== NUM_PADS [Optional] =====------------------------------------------
# Description: Offset: 8b, Width: 2b, Number of pads used by instruction. Some instructions ignores this parameter.
# - 1PAD, (0): Single mode. One pad is used.
# - 2PAD, (1): Dual mode. Two pads are used.
# - 4PAD, (2): Quad mode. Four pads are used.
# - 8PAD, (3): Octal mode. Eight pads are used.
# Possible options: <1PAD, 2PAD, 4PAD, 8PAD>
NUM_PADS: 1PAD
# --------------------------------------===== OPERATION_CODE [Optional] =====---------------------------------------
# Description: Offset: 10b, Width: 6b, Instruction operation code.
# - STOP, (0): Stop execution and de-assert CS. Then, the next command sequence (to the same flash device) starts
# from instruction pointer 0.
# - CMD_SDR, (1): Transmit command code to Flash.
# - RADDR_SDR, (2): Transmit row address to Flash.
# - CADDR_SDR, (3): Transmit column address to Flash.
# - MODE1_SDR, (4): Transmit mode bits to Flash.
# - MODE2_SDR, (5): Transmit mode bits to Flash.
# - MODE4_SDR, (6): Transmit mode bits to Flash.
# - MODE8_SDR, (7): Transmit mode bits to Flash.
# - WRITE_SDR, (8): Transmit program data to Flash device.
# - READ_SDR, (9): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_SDR, (10): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_SDR, (11): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_SDR, (12): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_SDR, (13): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# - JMP_ON_CS, (31): Stop execution, de-assert CS and save operand[7:0] as the instruction start pointer for next
# sequence.Normally this instruction is used to support Execute-In-Place enhanced mode. See XIP enhanced mode for
# more details.This instruction is only allowed for AHB read commands. There is interrupt status bit set
# (INTR[IPCMDERR] or INTR[AHBCMDERR]) when using this instruction in IP command or AHB write command.
# - CMD_DDR, (33): Transmit command code to Flash.
# - RADDR_DDR, (34): Transmit row address to Flash.
# - CADDR_DDR, (35): Transmit column address to Flash.
# - MODE1_DDR, (36): Transmit mode bits to Flash.
# - MODE2_DDR, (37): Transmit mode bits to Flash.
# - MODE4_DDR, (38): Transmit mode bits to Flash.
# - MODE8_DDR, (39): Transmit mode bits to Flash.
# - WRITE_DDR, (40): Transmit program data to Flash device.
# - READ_DDR, (41): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_DDR, (42): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_DDR, (43): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_DDR, (44): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_DDR, (45): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# Possible options: <STOP, CMD_SDR, RADDR_SDR, CADDR_SDR, MODE1_SDR, MODE2_SDR, MODE4_SDR, MODE8_SDR, WRITE_SDR,
# READ_SDR, LEARN_SDR, DATSZ_SDR, DUMMY_SDR, DUMMY_RWDS_SDR, JMP_ON_CS, CMD_DDR, RADDR_DDR, CADDR_DDR, MODE1_DDR,
# MODE2_DDR, MODE4_DDR, MODE8_DDR, WRITE_DDR, READ_DDR, LEARN_DDR, DATSZ_DDR, DUMMY_DDR, DUMMY_RWDS_DDR>
OPERATION_CODE: STOP
lookupTable_seq6_instr1:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq6_instr2:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq6_instr3:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq6_instr4:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq6_instr5:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq6_instr6:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq6_instr7:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
# -----------------------------------===== lookupTable_seq7_instr0 [Optional] =====-----------------------------------
# Description: Offset: 0x000000F0, Width: 16b; Lookup table holds Flash command sequences 7, instruction 0
lookupTable_seq7_instr0:
# ------------------------------------------===== OPERAND [Optional] =====------------------------------------------
# Description: Offset: 0b, Width: 8b, Instruction operand. Its values depends on used instruction
OPERAND: 0
# -----------------------------------------===== NUM_PADS [Optional] =====------------------------------------------
# Description: Offset: 8b, Width: 2b, Number of pads used by instruction. Some instructions ignores this parameter.
# - 1PAD, (0): Single mode. One pad is used.
# - 2PAD, (1): Dual mode. Two pads are used.
# - 4PAD, (2): Quad mode. Four pads are used.
# - 8PAD, (3): Octal mode. Eight pads are used.
# Possible options: <1PAD, 2PAD, 4PAD, 8PAD>
NUM_PADS: 1PAD
# --------------------------------------===== OPERATION_CODE [Optional] =====---------------------------------------
# Description: Offset: 10b, Width: 6b, Instruction operation code.
# - STOP, (0): Stop execution and de-assert CS. Then, the next command sequence (to the same flash device) starts
# from instruction pointer 0.
# - CMD_SDR, (1): Transmit command code to Flash.
# - RADDR_SDR, (2): Transmit row address to Flash.
# - CADDR_SDR, (3): Transmit column address to Flash.
# - MODE1_SDR, (4): Transmit mode bits to Flash.
# - MODE2_SDR, (5): Transmit mode bits to Flash.
# - MODE4_SDR, (6): Transmit mode bits to Flash.
# - MODE8_SDR, (7): Transmit mode bits to Flash.
# - WRITE_SDR, (8): Transmit program data to Flash device.
# - READ_SDR, (9): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_SDR, (10): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_SDR, (11): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_SDR, (12): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_SDR, (13): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# - JMP_ON_CS, (31): Stop execution, de-assert CS and save operand[7:0] as the instruction start pointer for next
# sequence.Normally this instruction is used to support Execute-In-Place enhanced mode. See XIP enhanced mode for
# more details.This instruction is only allowed for AHB read commands. There is interrupt status bit set
# (INTR[IPCMDERR] or INTR[AHBCMDERR]) when using this instruction in IP command or AHB write command.
# - CMD_DDR, (33): Transmit command code to Flash.
# - RADDR_DDR, (34): Transmit row address to Flash.
# - CADDR_DDR, (35): Transmit column address to Flash.
# - MODE1_DDR, (36): Transmit mode bits to Flash.
# - MODE2_DDR, (37): Transmit mode bits to Flash.
# - MODE4_DDR, (38): Transmit mode bits to Flash.
# - MODE8_DDR, (39): Transmit mode bits to Flash.
# - WRITE_DDR, (40): Transmit program data to Flash device.
# - READ_DDR, (41): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_DDR, (42): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_DDR, (43): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_DDR, (44): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_DDR, (45): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# Possible options: <STOP, CMD_SDR, RADDR_SDR, CADDR_SDR, MODE1_SDR, MODE2_SDR, MODE4_SDR, MODE8_SDR, WRITE_SDR,
# READ_SDR, LEARN_SDR, DATSZ_SDR, DUMMY_SDR, DUMMY_RWDS_SDR, JMP_ON_CS, CMD_DDR, RADDR_DDR, CADDR_DDR, MODE1_DDR,
# MODE2_DDR, MODE4_DDR, MODE8_DDR, WRITE_DDR, READ_DDR, LEARN_DDR, DATSZ_DDR, DUMMY_DDR, DUMMY_RWDS_DDR>
OPERATION_CODE: STOP
lookupTable_seq7_instr1:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq7_instr2:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq7_instr3:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq7_instr4:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq7_instr5:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq7_instr6:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq7_instr7:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
# -----------------------------------===== lookupTable_seq8_instr0 [Optional] =====-----------------------------------
# Description: Offset: 0x00000100, Width: 16b; Lookup table holds Flash command sequences 8, instruction 0
lookupTable_seq8_instr0:
# ------------------------------------------===== OPERAND [Optional] =====------------------------------------------
# Description: Offset: 0b, Width: 8b, Instruction operand. Its values depends on used instruction
OPERAND: 0
# -----------------------------------------===== NUM_PADS [Optional] =====------------------------------------------
# Description: Offset: 8b, Width: 2b, Number of pads used by instruction. Some instructions ignores this parameter.
# - 1PAD, (0): Single mode. One pad is used.
# - 2PAD, (1): Dual mode. Two pads are used.
# - 4PAD, (2): Quad mode. Four pads are used.
# - 8PAD, (3): Octal mode. Eight pads are used.
# Possible options: <1PAD, 2PAD, 4PAD, 8PAD>
NUM_PADS: 1PAD
# --------------------------------------===== OPERATION_CODE [Optional] =====---------------------------------------
# Description: Offset: 10b, Width: 6b, Instruction operation code.
# - STOP, (0): Stop execution and de-assert CS. Then, the next command sequence (to the same flash device) starts
# from instruction pointer 0.
# - CMD_SDR, (1): Transmit command code to Flash.
# - RADDR_SDR, (2): Transmit row address to Flash.
# - CADDR_SDR, (3): Transmit column address to Flash.
# - MODE1_SDR, (4): Transmit mode bits to Flash.
# - MODE2_SDR, (5): Transmit mode bits to Flash.
# - MODE4_SDR, (6): Transmit mode bits to Flash.
# - MODE8_SDR, (7): Transmit mode bits to Flash.
# - WRITE_SDR, (8): Transmit program data to Flash device.
# - READ_SDR, (9): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_SDR, (10): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_SDR, (11): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_SDR, (12): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_SDR, (13): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# - JMP_ON_CS, (31): Stop execution, de-assert CS and save operand[7:0] as the instruction start pointer for next
# sequence.Normally this instruction is used to support Execute-In-Place enhanced mode. See XIP enhanced mode for
# more details.This instruction is only allowed for AHB read commands. There is interrupt status bit set
# (INTR[IPCMDERR] or INTR[AHBCMDERR]) when using this instruction in IP command or AHB write command.
# - CMD_DDR, (33): Transmit command code to Flash.
# - RADDR_DDR, (34): Transmit row address to Flash.
# - CADDR_DDR, (35): Transmit column address to Flash.
# - MODE1_DDR, (36): Transmit mode bits to Flash.
# - MODE2_DDR, (37): Transmit mode bits to Flash.
# - MODE4_DDR, (38): Transmit mode bits to Flash.
# - MODE8_DDR, (39): Transmit mode bits to Flash.
# - WRITE_DDR, (40): Transmit program data to Flash device.
# - READ_DDR, (41): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_DDR, (42): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_DDR, (43): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_DDR, (44): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_DDR, (45): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# Possible options: <STOP, CMD_SDR, RADDR_SDR, CADDR_SDR, MODE1_SDR, MODE2_SDR, MODE4_SDR, MODE8_SDR, WRITE_SDR,
# READ_SDR, LEARN_SDR, DATSZ_SDR, DUMMY_SDR, DUMMY_RWDS_SDR, JMP_ON_CS, CMD_DDR, RADDR_DDR, CADDR_DDR, MODE1_DDR,
# MODE2_DDR, MODE4_DDR, MODE8_DDR, WRITE_DDR, READ_DDR, LEARN_DDR, DATSZ_DDR, DUMMY_DDR, DUMMY_RWDS_DDR>
OPERATION_CODE: STOP
lookupTable_seq8_instr1:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq8_instr2:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq8_instr3:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq8_instr4:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq8_instr5:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq8_instr6:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq8_instr7:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
# -----------------------------------===== lookupTable_seq9_instr0 [Optional] =====-----------------------------------
# Description: Offset: 0x00000110, Width: 16b; Lookup table holds Flash command sequences 9, instruction 0
lookupTable_seq9_instr0:
# ------------------------------------------===== OPERAND [Optional] =====------------------------------------------
# Description: Offset: 0b, Width: 8b, Instruction operand. Its values depends on used instruction
OPERAND: 0
# -----------------------------------------===== NUM_PADS [Optional] =====------------------------------------------
# Description: Offset: 8b, Width: 2b, Number of pads used by instruction. Some instructions ignores this parameter.
# - 1PAD, (0): Single mode. One pad is used.
# - 2PAD, (1): Dual mode. Two pads are used.
# - 4PAD, (2): Quad mode. Four pads are used.
# - 8PAD, (3): Octal mode. Eight pads are used.
# Possible options: <1PAD, 2PAD, 4PAD, 8PAD>
NUM_PADS: 1PAD
# --------------------------------------===== OPERATION_CODE [Optional] =====---------------------------------------
# Description: Offset: 10b, Width: 6b, Instruction operation code.
# - STOP, (0): Stop execution and de-assert CS. Then, the next command sequence (to the same flash device) starts
# from instruction pointer 0.
# - CMD_SDR, (1): Transmit command code to Flash.
# - RADDR_SDR, (2): Transmit row address to Flash.
# - CADDR_SDR, (3): Transmit column address to Flash.
# - MODE1_SDR, (4): Transmit mode bits to Flash.
# - MODE2_SDR, (5): Transmit mode bits to Flash.
# - MODE4_SDR, (6): Transmit mode bits to Flash.
# - MODE8_SDR, (7): Transmit mode bits to Flash.
# - WRITE_SDR, (8): Transmit program data to Flash device.
# - READ_SDR, (9): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_SDR, (10): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_SDR, (11): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_SDR, (12): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_SDR, (13): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# - JMP_ON_CS, (31): Stop execution, de-assert CS and save operand[7:0] as the instruction start pointer for next
# sequence.Normally this instruction is used to support Execute-In-Place enhanced mode. See XIP enhanced mode for
# more details.This instruction is only allowed for AHB read commands. There is interrupt status bit set
# (INTR[IPCMDERR] or INTR[AHBCMDERR]) when using this instruction in IP command or AHB write command.
# - CMD_DDR, (33): Transmit command code to Flash.
# - RADDR_DDR, (34): Transmit row address to Flash.
# - CADDR_DDR, (35): Transmit column address to Flash.
# - MODE1_DDR, (36): Transmit mode bits to Flash.
# - MODE2_DDR, (37): Transmit mode bits to Flash.
# - MODE4_DDR, (38): Transmit mode bits to Flash.
# - MODE8_DDR, (39): Transmit mode bits to Flash.
# - WRITE_DDR, (40): Transmit program data to Flash device.
# - READ_DDR, (41): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_DDR, (42): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_DDR, (43): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_DDR, (44): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_DDR, (45): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# Possible options: <STOP, CMD_SDR, RADDR_SDR, CADDR_SDR, MODE1_SDR, MODE2_SDR, MODE4_SDR, MODE8_SDR, WRITE_SDR,
# READ_SDR, LEARN_SDR, DATSZ_SDR, DUMMY_SDR, DUMMY_RWDS_SDR, JMP_ON_CS, CMD_DDR, RADDR_DDR, CADDR_DDR, MODE1_DDR,
# MODE2_DDR, MODE4_DDR, MODE8_DDR, WRITE_DDR, READ_DDR, LEARN_DDR, DATSZ_DDR, DUMMY_DDR, DUMMY_RWDS_DDR>
OPERATION_CODE: STOP
lookupTable_seq9_instr1:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq9_instr2:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq9_instr3:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq9_instr4:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq9_instr5:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq9_instr6:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq9_instr7:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
# ----------------------------------===== lookupTable_seq10_instr0 [Optional] =====-----------------------------------
# Description: Offset: 0x00000120, Width: 16b; Lookup table holds Flash command sequences 10, instruction 0
lookupTable_seq10_instr0:
# ------------------------------------------===== OPERAND [Optional] =====------------------------------------------
# Description: Offset: 0b, Width: 8b, Instruction operand. Its values depends on used instruction
OPERAND: 0
# -----------------------------------------===== NUM_PADS [Optional] =====------------------------------------------
# Description: Offset: 8b, Width: 2b, Number of pads used by instruction. Some instructions ignores this parameter.
# - 1PAD, (0): Single mode. One pad is used.
# - 2PAD, (1): Dual mode. Two pads are used.
# - 4PAD, (2): Quad mode. Four pads are used.
# - 8PAD, (3): Octal mode. Eight pads are used.
# Possible options: <1PAD, 2PAD, 4PAD, 8PAD>
NUM_PADS: 1PAD
# --------------------------------------===== OPERATION_CODE [Optional] =====---------------------------------------
# Description: Offset: 10b, Width: 6b, Instruction operation code.
# - STOP, (0): Stop execution and de-assert CS. Then, the next command sequence (to the same flash device) starts
# from instruction pointer 0.
# - CMD_SDR, (1): Transmit command code to Flash.
# - RADDR_SDR, (2): Transmit row address to Flash.
# - CADDR_SDR, (3): Transmit column address to Flash.
# - MODE1_SDR, (4): Transmit mode bits to Flash.
# - MODE2_SDR, (5): Transmit mode bits to Flash.
# - MODE4_SDR, (6): Transmit mode bits to Flash.
# - MODE8_SDR, (7): Transmit mode bits to Flash.
# - WRITE_SDR, (8): Transmit program data to Flash device.
# - READ_SDR, (9): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_SDR, (10): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_SDR, (11): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_SDR, (12): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_SDR, (13): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# - JMP_ON_CS, (31): Stop execution, de-assert CS and save operand[7:0] as the instruction start pointer for next
# sequence.Normally this instruction is used to support Execute-In-Place enhanced mode. See XIP enhanced mode for
# more details.This instruction is only allowed for AHB read commands. There is interrupt status bit set
# (INTR[IPCMDERR] or INTR[AHBCMDERR]) when using this instruction in IP command or AHB write command.
# - CMD_DDR, (33): Transmit command code to Flash.
# - RADDR_DDR, (34): Transmit row address to Flash.
# - CADDR_DDR, (35): Transmit column address to Flash.
# - MODE1_DDR, (36): Transmit mode bits to Flash.
# - MODE2_DDR, (37): Transmit mode bits to Flash.
# - MODE4_DDR, (38): Transmit mode bits to Flash.
# - MODE8_DDR, (39): Transmit mode bits to Flash.
# - WRITE_DDR, (40): Transmit program data to Flash device.
# - READ_DDR, (41): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_DDR, (42): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_DDR, (43): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_DDR, (44): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_DDR, (45): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# Possible options: <STOP, CMD_SDR, RADDR_SDR, CADDR_SDR, MODE1_SDR, MODE2_SDR, MODE4_SDR, MODE8_SDR, WRITE_SDR,
# READ_SDR, LEARN_SDR, DATSZ_SDR, DUMMY_SDR, DUMMY_RWDS_SDR, JMP_ON_CS, CMD_DDR, RADDR_DDR, CADDR_DDR, MODE1_DDR,
# MODE2_DDR, MODE4_DDR, MODE8_DDR, WRITE_DDR, READ_DDR, LEARN_DDR, DATSZ_DDR, DUMMY_DDR, DUMMY_RWDS_DDR>
OPERATION_CODE: STOP
lookupTable_seq10_instr1:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq10_instr2:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq10_instr3:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq10_instr4:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq10_instr5:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq10_instr6:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq10_instr7:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
# ----------------------------------===== lookupTable_seq11_instr0 [Optional] =====-----------------------------------
# Description: Offset: 0x00000130, Width: 16b; Lookup table holds Flash command sequences 11, instruction 0
lookupTable_seq11_instr0:
# ------------------------------------------===== OPERAND [Optional] =====------------------------------------------
# Description: Offset: 0b, Width: 8b, Instruction operand. Its values depends on used instruction
OPERAND: 0
# -----------------------------------------===== NUM_PADS [Optional] =====------------------------------------------
# Description: Offset: 8b, Width: 2b, Number of pads used by instruction. Some instructions ignores this parameter.
# - 1PAD, (0): Single mode. One pad is used.
# - 2PAD, (1): Dual mode. Two pads are used.
# - 4PAD, (2): Quad mode. Four pads are used.
# - 8PAD, (3): Octal mode. Eight pads are used.
# Possible options: <1PAD, 2PAD, 4PAD, 8PAD>
NUM_PADS: 1PAD
# --------------------------------------===== OPERATION_CODE [Optional] =====---------------------------------------
# Description: Offset: 10b, Width: 6b, Instruction operation code.
# - STOP, (0): Stop execution and de-assert CS. Then, the next command sequence (to the same flash device) starts
# from instruction pointer 0.
# - CMD_SDR, (1): Transmit command code to Flash.
# - RADDR_SDR, (2): Transmit row address to Flash.
# - CADDR_SDR, (3): Transmit column address to Flash.
# - MODE1_SDR, (4): Transmit mode bits to Flash.
# - MODE2_SDR, (5): Transmit mode bits to Flash.
# - MODE4_SDR, (6): Transmit mode bits to Flash.
# - MODE8_SDR, (7): Transmit mode bits to Flash.
# - WRITE_SDR, (8): Transmit program data to Flash device.
# - READ_SDR, (9): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_SDR, (10): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_SDR, (11): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_SDR, (12): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_SDR, (13): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# - JMP_ON_CS, (31): Stop execution, de-assert CS and save operand[7:0] as the instruction start pointer for next
# sequence.Normally this instruction is used to support Execute-In-Place enhanced mode. See XIP enhanced mode for
# more details.This instruction is only allowed for AHB read commands. There is interrupt status bit set
# (INTR[IPCMDERR] or INTR[AHBCMDERR]) when using this instruction in IP command or AHB write command.
# - CMD_DDR, (33): Transmit command code to Flash.
# - RADDR_DDR, (34): Transmit row address to Flash.
# - CADDR_DDR, (35): Transmit column address to Flash.
# - MODE1_DDR, (36): Transmit mode bits to Flash.
# - MODE2_DDR, (37): Transmit mode bits to Flash.
# - MODE4_DDR, (38): Transmit mode bits to Flash.
# - MODE8_DDR, (39): Transmit mode bits to Flash.
# - WRITE_DDR, (40): Transmit program data to Flash device.
# - READ_DDR, (41): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_DDR, (42): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_DDR, (43): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_DDR, (44): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_DDR, (45): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# Possible options: <STOP, CMD_SDR, RADDR_SDR, CADDR_SDR, MODE1_SDR, MODE2_SDR, MODE4_SDR, MODE8_SDR, WRITE_SDR,
# READ_SDR, LEARN_SDR, DATSZ_SDR, DUMMY_SDR, DUMMY_RWDS_SDR, JMP_ON_CS, CMD_DDR, RADDR_DDR, CADDR_DDR, MODE1_DDR,
# MODE2_DDR, MODE4_DDR, MODE8_DDR, WRITE_DDR, READ_DDR, LEARN_DDR, DATSZ_DDR, DUMMY_DDR, DUMMY_RWDS_DDR>
OPERATION_CODE: STOP
lookupTable_seq11_instr1:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq11_instr2:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq11_instr3:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq11_instr4:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq11_instr5:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq11_instr6:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq11_instr7:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
# ----------------------------------===== lookupTable_seq12_instr0 [Optional] =====-----------------------------------
# Description: Offset: 0x00000140, Width: 16b; Lookup table holds Flash command sequences 12, instruction 0
lookupTable_seq12_instr0:
# ------------------------------------------===== OPERAND [Optional] =====------------------------------------------
# Description: Offset: 0b, Width: 8b, Instruction operand. Its values depends on used instruction
OPERAND: 0
# -----------------------------------------===== NUM_PADS [Optional] =====------------------------------------------
# Description: Offset: 8b, Width: 2b, Number of pads used by instruction. Some instructions ignores this parameter.
# - 1PAD, (0): Single mode. One pad is used.
# - 2PAD, (1): Dual mode. Two pads are used.
# - 4PAD, (2): Quad mode. Four pads are used.
# - 8PAD, (3): Octal mode. Eight pads are used.
# Possible options: <1PAD, 2PAD, 4PAD, 8PAD>
NUM_PADS: 1PAD
# --------------------------------------===== OPERATION_CODE [Optional] =====---------------------------------------
# Description: Offset: 10b, Width: 6b, Instruction operation code.
# - STOP, (0): Stop execution and de-assert CS. Then, the next command sequence (to the same flash device) starts
# from instruction pointer 0.
# - CMD_SDR, (1): Transmit command code to Flash.
# - RADDR_SDR, (2): Transmit row address to Flash.
# - CADDR_SDR, (3): Transmit column address to Flash.
# - MODE1_SDR, (4): Transmit mode bits to Flash.
# - MODE2_SDR, (5): Transmit mode bits to Flash.
# - MODE4_SDR, (6): Transmit mode bits to Flash.
# - MODE8_SDR, (7): Transmit mode bits to Flash.
# - WRITE_SDR, (8): Transmit program data to Flash device.
# - READ_SDR, (9): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_SDR, (10): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_SDR, (11): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_SDR, (12): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_SDR, (13): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# - JMP_ON_CS, (31): Stop execution, de-assert CS and save operand[7:0] as the instruction start pointer for next
# sequence.Normally this instruction is used to support Execute-In-Place enhanced mode. See XIP enhanced mode for
# more details.This instruction is only allowed for AHB read commands. There is interrupt status bit set
# (INTR[IPCMDERR] or INTR[AHBCMDERR]) when using this instruction in IP command or AHB write command.
# - CMD_DDR, (33): Transmit command code to Flash.
# - RADDR_DDR, (34): Transmit row address to Flash.
# - CADDR_DDR, (35): Transmit column address to Flash.
# - MODE1_DDR, (36): Transmit mode bits to Flash.
# - MODE2_DDR, (37): Transmit mode bits to Flash.
# - MODE4_DDR, (38): Transmit mode bits to Flash.
# - MODE8_DDR, (39): Transmit mode bits to Flash.
# - WRITE_DDR, (40): Transmit program data to Flash device.
# - READ_DDR, (41): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_DDR, (42): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_DDR, (43): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_DDR, (44): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_DDR, (45): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# Possible options: <STOP, CMD_SDR, RADDR_SDR, CADDR_SDR, MODE1_SDR, MODE2_SDR, MODE4_SDR, MODE8_SDR, WRITE_SDR,
# READ_SDR, LEARN_SDR, DATSZ_SDR, DUMMY_SDR, DUMMY_RWDS_SDR, JMP_ON_CS, CMD_DDR, RADDR_DDR, CADDR_DDR, MODE1_DDR,
# MODE2_DDR, MODE4_DDR, MODE8_DDR, WRITE_DDR, READ_DDR, LEARN_DDR, DATSZ_DDR, DUMMY_DDR, DUMMY_RWDS_DDR>
OPERATION_CODE: STOP
lookupTable_seq12_instr1:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq12_instr2:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq12_instr3:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq12_instr4:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq12_instr5:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq12_instr6:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq12_instr7:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
# ----------------------------------===== lookupTable_seq13_instr0 [Optional] =====-----------------------------------
# Description: Offset: 0x00000150, Width: 16b; Lookup table holds Flash command sequences 13, instruction 0
lookupTable_seq13_instr0:
# ------------------------------------------===== OPERAND [Optional] =====------------------------------------------
# Description: Offset: 0b, Width: 8b, Instruction operand. Its values depends on used instruction
OPERAND: 0
# -----------------------------------------===== NUM_PADS [Optional] =====------------------------------------------
# Description: Offset: 8b, Width: 2b, Number of pads used by instruction. Some instructions ignores this parameter.
# - 1PAD, (0): Single mode. One pad is used.
# - 2PAD, (1): Dual mode. Two pads are used.
# - 4PAD, (2): Quad mode. Four pads are used.
# - 8PAD, (3): Octal mode. Eight pads are used.
# Possible options: <1PAD, 2PAD, 4PAD, 8PAD>
NUM_PADS: 1PAD
# --------------------------------------===== OPERATION_CODE [Optional] =====---------------------------------------
# Description: Offset: 10b, Width: 6b, Instruction operation code.
# - STOP, (0): Stop execution and de-assert CS. Then, the next command sequence (to the same flash device) starts
# from instruction pointer 0.
# - CMD_SDR, (1): Transmit command code to Flash.
# - RADDR_SDR, (2): Transmit row address to Flash.
# - CADDR_SDR, (3): Transmit column address to Flash.
# - MODE1_SDR, (4): Transmit mode bits to Flash.
# - MODE2_SDR, (5): Transmit mode bits to Flash.
# - MODE4_SDR, (6): Transmit mode bits to Flash.
# - MODE8_SDR, (7): Transmit mode bits to Flash.
# - WRITE_SDR, (8): Transmit program data to Flash device.
# - READ_SDR, (9): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_SDR, (10): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_SDR, (11): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_SDR, (12): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_SDR, (13): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# - JMP_ON_CS, (31): Stop execution, de-assert CS and save operand[7:0] as the instruction start pointer for next
# sequence.Normally this instruction is used to support Execute-In-Place enhanced mode. See XIP enhanced mode for
# more details.This instruction is only allowed for AHB read commands. There is interrupt status bit set
# (INTR[IPCMDERR] or INTR[AHBCMDERR]) when using this instruction in IP command or AHB write command.
# - CMD_DDR, (33): Transmit command code to Flash.
# - RADDR_DDR, (34): Transmit row address to Flash.
# - CADDR_DDR, (35): Transmit column address to Flash.
# - MODE1_DDR, (36): Transmit mode bits to Flash.
# - MODE2_DDR, (37): Transmit mode bits to Flash.
# - MODE4_DDR, (38): Transmit mode bits to Flash.
# - MODE8_DDR, (39): Transmit mode bits to Flash.
# - WRITE_DDR, (40): Transmit program data to Flash device.
# - READ_DDR, (41): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_DDR, (42): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_DDR, (43): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_DDR, (44): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_DDR, (45): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# Possible options: <STOP, CMD_SDR, RADDR_SDR, CADDR_SDR, MODE1_SDR, MODE2_SDR, MODE4_SDR, MODE8_SDR, WRITE_SDR,
# READ_SDR, LEARN_SDR, DATSZ_SDR, DUMMY_SDR, DUMMY_RWDS_SDR, JMP_ON_CS, CMD_DDR, RADDR_DDR, CADDR_DDR, MODE1_DDR,
# MODE2_DDR, MODE4_DDR, MODE8_DDR, WRITE_DDR, READ_DDR, LEARN_DDR, DATSZ_DDR, DUMMY_DDR, DUMMY_RWDS_DDR>
OPERATION_CODE: STOP
lookupTable_seq13_instr1:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq13_instr2:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq13_instr3:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq13_instr4:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq13_instr5:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq13_instr6:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq13_instr7:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
# ----------------------------------===== lookupTable_seq14_instr0 [Optional] =====-----------------------------------
# Description: Offset: 0x00000160, Width: 16b; Lookup table holds Flash command sequences 14, instruction 0
lookupTable_seq14_instr0:
# ------------------------------------------===== OPERAND [Optional] =====------------------------------------------
# Description: Offset: 0b, Width: 8b, Instruction operand. Its values depends on used instruction
OPERAND: 0
# -----------------------------------------===== NUM_PADS [Optional] =====------------------------------------------
# Description: Offset: 8b, Width: 2b, Number of pads used by instruction. Some instructions ignores this parameter.
# - 1PAD, (0): Single mode. One pad is used.
# - 2PAD, (1): Dual mode. Two pads are used.
# - 4PAD, (2): Quad mode. Four pads are used.
# - 8PAD, (3): Octal mode. Eight pads are used.
# Possible options: <1PAD, 2PAD, 4PAD, 8PAD>
NUM_PADS: 1PAD
# --------------------------------------===== OPERATION_CODE [Optional] =====---------------------------------------
# Description: Offset: 10b, Width: 6b, Instruction operation code.
# - STOP, (0): Stop execution and de-assert CS. Then, the next command sequence (to the same flash device) starts
# from instruction pointer 0.
# - CMD_SDR, (1): Transmit command code to Flash.
# - RADDR_SDR, (2): Transmit row address to Flash.
# - CADDR_SDR, (3): Transmit column address to Flash.
# - MODE1_SDR, (4): Transmit mode bits to Flash.
# - MODE2_SDR, (5): Transmit mode bits to Flash.
# - MODE4_SDR, (6): Transmit mode bits to Flash.
# - MODE8_SDR, (7): Transmit mode bits to Flash.
# - WRITE_SDR, (8): Transmit program data to Flash device.
# - READ_SDR, (9): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_SDR, (10): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_SDR, (11): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_SDR, (12): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_SDR, (13): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# - JMP_ON_CS, (31): Stop execution, de-assert CS and save operand[7:0] as the instruction start pointer for next
# sequence.Normally this instruction is used to support Execute-In-Place enhanced mode. See XIP enhanced mode for
# more details.This instruction is only allowed for AHB read commands. There is interrupt status bit set
# (INTR[IPCMDERR] or INTR[AHBCMDERR]) when using this instruction in IP command or AHB write command.
# - CMD_DDR, (33): Transmit command code to Flash.
# - RADDR_DDR, (34): Transmit row address to Flash.
# - CADDR_DDR, (35): Transmit column address to Flash.
# - MODE1_DDR, (36): Transmit mode bits to Flash.
# - MODE2_DDR, (37): Transmit mode bits to Flash.
# - MODE4_DDR, (38): Transmit mode bits to Flash.
# - MODE8_DDR, (39): Transmit mode bits to Flash.
# - WRITE_DDR, (40): Transmit program data to Flash device.
# - READ_DDR, (41): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_DDR, (42): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_DDR, (43): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_DDR, (44): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_DDR, (45): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# Possible options: <STOP, CMD_SDR, RADDR_SDR, CADDR_SDR, MODE1_SDR, MODE2_SDR, MODE4_SDR, MODE8_SDR, WRITE_SDR,
# READ_SDR, LEARN_SDR, DATSZ_SDR, DUMMY_SDR, DUMMY_RWDS_SDR, JMP_ON_CS, CMD_DDR, RADDR_DDR, CADDR_DDR, MODE1_DDR,
# MODE2_DDR, MODE4_DDR, MODE8_DDR, WRITE_DDR, READ_DDR, LEARN_DDR, DATSZ_DDR, DUMMY_DDR, DUMMY_RWDS_DDR>
OPERATION_CODE: STOP
lookupTable_seq14_instr1:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq14_instr2:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq14_instr3:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq14_instr4:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq14_instr5:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq14_instr6:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq14_instr7:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
# ----------------------------------===== lookupTable_seq15_instr0 [Optional] =====-----------------------------------
# Description: Offset: 0x00000170, Width: 16b; Lookup table holds Flash command sequences 15, instruction 0
lookupTable_seq15_instr0:
# ------------------------------------------===== OPERAND [Optional] =====------------------------------------------
# Description: Offset: 0b, Width: 8b, Instruction operand. Its values depends on used instruction
OPERAND: 0
# -----------------------------------------===== NUM_PADS [Optional] =====------------------------------------------
# Description: Offset: 8b, Width: 2b, Number of pads used by instruction. Some instructions ignores this parameter.
# - 1PAD, (0): Single mode. One pad is used.
# - 2PAD, (1): Dual mode. Two pads are used.
# - 4PAD, (2): Quad mode. Four pads are used.
# - 8PAD, (3): Octal mode. Eight pads are used.
# Possible options: <1PAD, 2PAD, 4PAD, 8PAD>
NUM_PADS: 1PAD
# --------------------------------------===== OPERATION_CODE [Optional] =====---------------------------------------
# Description: Offset: 10b, Width: 6b, Instruction operation code.
# - STOP, (0): Stop execution and de-assert CS. Then, the next command sequence (to the same flash device) starts
# from instruction pointer 0.
# - CMD_SDR, (1): Transmit command code to Flash.
# - RADDR_SDR, (2): Transmit row address to Flash.
# - CADDR_SDR, (3): Transmit column address to Flash.
# - MODE1_SDR, (4): Transmit mode bits to Flash.
# - MODE2_SDR, (5): Transmit mode bits to Flash.
# - MODE4_SDR, (6): Transmit mode bits to Flash.
# - MODE8_SDR, (7): Transmit mode bits to Flash.
# - WRITE_SDR, (8): Transmit program data to Flash device.
# - READ_SDR, (9): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_SDR, (10): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_SDR, (11): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_SDR, (12): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_SDR, (13): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# - JMP_ON_CS, (31): Stop execution, de-assert CS and save operand[7:0] as the instruction start pointer for next
# sequence.Normally this instruction is used to support Execute-In-Place enhanced mode. See XIP enhanced mode for
# more details.This instruction is only allowed for AHB read commands. There is interrupt status bit set
# (INTR[IPCMDERR] or INTR[AHBCMDERR]) when using this instruction in IP command or AHB write command.
# - CMD_DDR, (33): Transmit command code to Flash.
# - RADDR_DDR, (34): Transmit row address to Flash.
# - CADDR_DDR, (35): Transmit column address to Flash.
# - MODE1_DDR, (36): Transmit mode bits to Flash.
# - MODE2_DDR, (37): Transmit mode bits to Flash.
# - MODE4_DDR, (38): Transmit mode bits to Flash.
# - MODE8_DDR, (39): Transmit mode bits to Flash.
# - WRITE_DDR, (40): Transmit program data to Flash device.
# - READ_DDR, (41): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_DDR, (42): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_DDR, (43): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_DDR, (44): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_DDR, (45): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# Possible options: <STOP, CMD_SDR, RADDR_SDR, CADDR_SDR, MODE1_SDR, MODE2_SDR, MODE4_SDR, MODE8_SDR, WRITE_SDR,
# READ_SDR, LEARN_SDR, DATSZ_SDR, DUMMY_SDR, DUMMY_RWDS_SDR, JMP_ON_CS, CMD_DDR, RADDR_DDR, CADDR_DDR, MODE1_DDR,
# MODE2_DDR, MODE4_DDR, MODE8_DDR, WRITE_DDR, READ_DDR, LEARN_DDR, DATSZ_DDR, DUMMY_DDR, DUMMY_RWDS_DDR>
OPERATION_CODE: STOP
lookupTable_seq15_instr1:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq15_instr2:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq15_instr3:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq15_instr4:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq15_instr5:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq15_instr6:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq15_instr7:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
# ---------------------------------------===== lutCustomSeq_0 [Optional] =====----------------------------------------
# Description: Offset: 0x00000180, Width: 32b; [0x180-0x1af] Customizable LUT Sequences
lutCustomSeq_0:
# ------------------------------------------===== seqNum [Optional] =====-------------------------------------------
# Description: Offset: 0b, Width: 8b, Sequence Number, valid number: 1-16
seqNum: 0
# -------------------------------------------===== seqId [Optional] =====-------------------------------------------
# Description: Offset: 8b, Width: 8b, Sequence Index, valid number: 0-15
seqId: 0
# -----------------------------------------===== reserved [Optional] =====------------------------------------------
# Description: Offset: 16b, Width: 16b, N/A
reserved: 0
# ---------------------------------------===== lutCustomSeq_1 [Optional] =====----------------------------------------
# Description: Offset: 0x00000184, Width: 32b; [0x180-0x1af] Customizable LUT Sequences
lutCustomSeq_1:
# ------------------------------------------===== seqNum [Optional] =====-------------------------------------------
# Description: Offset: 0b, Width: 8b, Sequence Number, valid number: 1-16
seqNum: 0
# -------------------------------------------===== seqId [Optional] =====-------------------------------------------
# Description: Offset: 8b, Width: 8b, Sequence Index, valid number: 0-15
seqId: 0
# -----------------------------------------===== reserved [Optional] =====------------------------------------------
# Description: Offset: 16b, Width: 16b, N/A
reserved: 0
# ---------------------------------------===== lutCustomSeq_2 [Optional] =====----------------------------------------
# Description: Offset: 0x00000188, Width: 32b; [0x180-0x1af] Customizable LUT Sequences
lutCustomSeq_2:
# ------------------------------------------===== seqNum [Optional] =====-------------------------------------------
# Description: Offset: 0b, Width: 8b, Sequence Number, valid number: 1-16
seqNum: 0
# -------------------------------------------===== seqId [Optional] =====-------------------------------------------
# Description: Offset: 8b, Width: 8b, Sequence Index, valid number: 0-15
seqId: 0
# -----------------------------------------===== reserved [Optional] =====------------------------------------------
# Description: Offset: 16b, Width: 16b, N/A
reserved: 0
# ---------------------------------------===== lutCustomSeq_3 [Optional] =====----------------------------------------
# Description: Offset: 0x0000018C, Width: 32b; [0x180-0x1af] Customizable LUT Sequences
lutCustomSeq_3:
# ------------------------------------------===== seqNum [Optional] =====-------------------------------------------
# Description: Offset: 0b, Width: 8b, Sequence Number, valid number: 1-16
seqNum: 0
# -------------------------------------------===== seqId [Optional] =====-------------------------------------------
# Description: Offset: 8b, Width: 8b, Sequence Index, valid number: 0-15
seqId: 0
# -----------------------------------------===== reserved [Optional] =====------------------------------------------
# Description: Offset: 16b, Width: 16b, N/A
reserved: 0
# ---------------------------------------===== lutCustomSeq_4 [Optional] =====----------------------------------------
# Description: Offset: 0x00000190, Width: 32b; [0x180-0x1af] Customizable LUT Sequences
lutCustomSeq_4:
# ------------------------------------------===== seqNum [Optional] =====-------------------------------------------
# Description: Offset: 0b, Width: 8b, Sequence Number, valid number: 1-16
seqNum: 0
# -------------------------------------------===== seqId [Optional] =====-------------------------------------------
# Description: Offset: 8b, Width: 8b, Sequence Index, valid number: 0-15
seqId: 0
# -----------------------------------------===== reserved [Optional] =====------------------------------------------
# Description: Offset: 16b, Width: 16b, N/A
reserved: 0
# ---------------------------------------===== lutCustomSeq_5 [Optional] =====----------------------------------------
# Description: Offset: 0x00000194, Width: 32b; [0x180-0x1af] Customizable LUT Sequences
lutCustomSeq_5:
# ------------------------------------------===== seqNum [Optional] =====-------------------------------------------
# Description: Offset: 0b, Width: 8b, Sequence Number, valid number: 1-16
seqNum: 0
# -------------------------------------------===== seqId [Optional] =====-------------------------------------------
# Description: Offset: 8b, Width: 8b, Sequence Index, valid number: 0-15
seqId: 0
# -----------------------------------------===== reserved [Optional] =====------------------------------------------
# Description: Offset: 16b, Width: 16b, N/A
reserved: 0
# ---------------------------------------===== lutCustomSeq_6 [Optional] =====----------------------------------------
# Description: Offset: 0x00000198, Width: 32b; [0x180-0x1af] Customizable LUT Sequences
lutCustomSeq_6:
# ------------------------------------------===== seqNum [Optional] =====-------------------------------------------
# Description: Offset: 0b, Width: 8b, Sequence Number, valid number: 1-16
seqNum: 0
# -------------------------------------------===== seqId [Optional] =====-------------------------------------------
# Description: Offset: 8b, Width: 8b, Sequence Index, valid number: 0-15
seqId: 0
# -----------------------------------------===== reserved [Optional] =====------------------------------------------
# Description: Offset: 16b, Width: 16b, N/A
reserved: 0
# ---------------------------------------===== lutCustomSeq_7 [Optional] =====----------------------------------------
# Description: Offset: 0x0000019C, Width: 32b; [0x180-0x1af] Customizable LUT Sequences
lutCustomSeq_7:
# ------------------------------------------===== seqNum [Optional] =====-------------------------------------------
# Description: Offset: 0b, Width: 8b, Sequence Number, valid number: 1-16
seqNum: 0
# -------------------------------------------===== seqId [Optional] =====-------------------------------------------
# Description: Offset: 8b, Width: 8b, Sequence Index, valid number: 0-15
seqId: 0
# -----------------------------------------===== reserved [Optional] =====------------------------------------------
# Description: Offset: 16b, Width: 16b, N/A
reserved: 0
# ---------------------------------------===== lutCustomSeq_8 [Optional] =====----------------------------------------
# Description: Offset: 0x000001A0, Width: 32b; [0x180-0x1af] Customizable LUT Sequences
lutCustomSeq_8:
# ------------------------------------------===== seqNum [Optional] =====-------------------------------------------
# Description: Offset: 0b, Width: 8b, Sequence Number, valid number: 1-16
seqNum: 0
# -------------------------------------------===== seqId [Optional] =====-------------------------------------------
# Description: Offset: 8b, Width: 8b, Sequence Index, valid number: 0-15
seqId: 0
# -----------------------------------------===== reserved [Optional] =====------------------------------------------
# Description: Offset: 16b, Width: 16b, N/A
reserved: 0
# ---------------------------------------===== lutCustomSeq_9 [Optional] =====----------------------------------------
# Description: Offset: 0x000001A4, Width: 32b; [0x180-0x1af] Customizable LUT Sequences
lutCustomSeq_9:
# ------------------------------------------===== seqNum [Optional] =====-------------------------------------------
# Description: Offset: 0b, Width: 8b, Sequence Number, valid number: 1-16
seqNum: 0
# -------------------------------------------===== seqId [Optional] =====-------------------------------------------
# Description: Offset: 8b, Width: 8b, Sequence Index, valid number: 0-15
seqId: 0
# -----------------------------------------===== reserved [Optional] =====------------------------------------------
# Description: Offset: 16b, Width: 16b, N/A
reserved: 0
# ---------------------------------------===== lutCustomSeq_10 [Optional] =====---------------------------------------
# Description: Offset: 0x000001A8, Width: 32b; [0x180-0x1af] Customizable LUT Sequences
lutCustomSeq_10:
# ------------------------------------------===== seqNum [Optional] =====-------------------------------------------
# Description: Offset: 0b, Width: 8b, Sequence Number, valid number: 1-16
seqNum: 0
# -------------------------------------------===== seqId [Optional] =====-------------------------------------------
# Description: Offset: 8b, Width: 8b, Sequence Index, valid number: 0-15
seqId: 0
# -----------------------------------------===== reserved [Optional] =====------------------------------------------
# Description: Offset: 16b, Width: 16b, N/A
reserved: 0
# ---------------------------------------===== lutCustomSeq_11 [Optional] =====---------------------------------------
# Description: Offset: 0x000001AC, Width: 32b; [0x180-0x1af] Customizable LUT Sequences
lutCustomSeq_11:
# ------------------------------------------===== seqNum [Optional] =====-------------------------------------------
# Description: Offset: 0b, Width: 8b, Sequence Number, valid number: 1-16
seqNum: 0
# -------------------------------------------===== seqId [Optional] =====-------------------------------------------
# Description: Offset: 8b, Width: 8b, Sequence Index, valid number: 0-15
seqId: 0
# -----------------------------------------===== reserved [Optional] =====------------------------------------------
# Description: Offset: 16b, Width: 16b, N/A
reserved: 0
# -----------------------------------------===== reserved4_0 [Optional] =====-----------------------------------------
# Description: Offset: 0x000001B0, Width: 32b; [0x1b0-0x1bf] Reserved for future use
reserved4_0: '0x00000000'
# -----------------------------------------===== reserved4_1 [Optional] =====-----------------------------------------
# Description: Offset: 0x000001B4, Width: 32b; [0x1b0-0x1bf] Reserved for future use
reserved4_1: '0x00000000'
# -----------------------------------------===== reserved4_2 [Optional] =====-----------------------------------------
# Description: Offset: 0x000001B8, Width: 32b; [0x1b0-0x1bf] Reserved for future use
reserved4_2: '0x00000000'
# -----------------------------------------===== reserved4_3 [Optional] =====-----------------------------------------
# Description: Offset: 0x000001BC, Width: 32b; [0x1b0-0x1bf] Reserved for future use
reserved4_3: '0x00000000'
# ------------------------------------------===== pageSize [Optional] =====-------------------------------------------
# Description: Offset: 0x000001C0, Width: 32b; Page size of Serial NOR
pageSize: '0x00000000'
# -----------------------------------------===== sectorSize [Optional] =====------------------------------------------
# Description: Offset: 0x000001C4, Width: 32b; Sector size of Serial NOR
sectorSize: '0x00000000'
# -------------------------------------===== ipcmdSerialClkFreq [Optional] =====--------------------------------------
# Description: Offset: 0x000001C8, Width: 8b; Clock frequency for IP command
ipcmdSerialClkFreq: '0x00'
# -------------------------------------===== isUniformBlockSize [Optional] =====--------------------------------------
# Description: Offset: 0x000001C9, Width: 8b; Sector/Block size is the same
isUniformBlockSize: '0x00'
# -----------------------------------------===== reserved0_0 [Optional] =====-----------------------------------------
# Description: Offset: 0x000001CA, Width: 8b; Reserved for future use
reserved0_0: '0x00'
# -----------------------------------------===== reserved0_1 [Optional] =====-----------------------------------------
# Description: Offset: 0x000001CB, Width: 8b; Reserved for future use
reserved0_1: '0x00'
# ----------------------------------------===== serialNorType [Optional] =====----------------------------------------
# Description: Offset: 0x000001CC, Width: 8b; Serial NOR Flash type: 0/1/2/3
serialNorType: '0x00'
# --------------------------------------===== needExitNoCmdMode [Optional] =====--------------------------------------
# Description: Offset: 0x000001CD, Width: 8b; Need to exit NoCmd mode before other IP command
needExitNoCmdMode: '0x00'
# ------------------------------------===== halfClkForNonReadCmd [Optional] =====-------------------------------------
# Description: Offset: 0x000001CE, Width: 8b; Half the Serial Clock for non-read command: true/false
halfClkForNonReadCmd: '0x00'
# ------------------------------------===== needRestoreNoCmdMode [Optional] =====-------------------------------------
# Description: Offset: 0x000001CF, Width: 8b; Need to Restore NoCmd mode after IP command execution
needRestoreNoCmdMode: '0x00'
# ------------------------------------------===== blockSize [Optional] =====------------------------------------------
# Description: Offset: 0x000001D0, Width: 32b; Block size
blockSize: '0x00000000'
# -----------------------------------------===== reserve2_0 [Optional] =====------------------------------------------
# Description: Offset: 0x000001D4, Width: 32b; Reserved for future use
reserve2_0: '0x00000000'
# -----------------------------------------===== reserve2_1 [Optional] =====------------------------------------------
# Description: Offset: 0x000001D8, Width: 32b; Reserved for future use
reserve2_1: '0x00000000'
# -----------------------------------------===== reserve2_2 [Optional] =====------------------------------------------
# Description: Offset: 0x000001DC, Width: 32b; Reserved for future use
reserve2_2: '0x00000000'
# -----------------------------------------===== reserve2_3 [Optional] =====------------------------------------------
# Description: Offset: 0x000001E0, Width: 32b; Reserved for future use
reserve2_3: '0x00000000'
# -----------------------------------------===== reserve2_4 [Optional] =====------------------------------------------
# Description: Offset: 0x000001E4, Width: 32b; Reserved for future use
reserve2_4: '0x00000000'
# -----------------------------------------===== reserve2_5 [Optional] =====------------------------------------------
# Description: Offset: 0x000001E8, Width: 32b; Reserved for future use
reserve2_5: '0x00000000'
# -----------------------------------------===== reserve2_6 [Optional] =====------------------------------------------
# Description: Offset: 0x000001EC, Width: 32b; Reserved for future use
reserve2_6: '0x00000000'
# -----------------------------------------===== reserve2_7 [Optional] =====------------------------------------------
# Description: Offset: 0x000001F0, Width: 32b; Reserved for future use
reserve2_7: '0x00000000'
# -----------------------------------------===== reserve2_8 [Optional] =====------------------------------------------
# Description: Offset: 0x000001F4, Width: 32b; Reserved for future use
reserve2_8: '0x00000000'
# -----------------------------------------===== reserve2_9 [Optional] =====------------------------------------------
# Description: Offset: 0x000001F8, Width: 32b; Reserved for future use
reserve2_9: '0x00000000'
# -----------------------------------------===== reserve2_10 [Optional] =====-----------------------------------------
# Description: Offset: 0x000001FC, Width: 32b; Reserved for future use
reserve2_10: '0x00000000'
FCB for mimxrt1024, Revision: a0 and flexspi_nor#
FCB for mimxrt1024, Revision: a0 and flexspi_nor JSON schema
FCB for mimxrt1024, Revision: a0 and flexspi_nor YAML configuration template
# ================================= FCB for mimxrt1024, Revision: a0 and flexspi_nor =================================
# ======================================================================================================================
# == FCB for mimxrt1024, Revision: a0 and flexspi_nor ==
# ======================================================================================================================
# -------------------------------------===== The chip family name [Required] =====--------------------------------------
# Description: NXP chip family identifier.
family: CHOOSE_FROM_TABLE
# -----------------------------------------===== MCU revision [Optional] =====------------------------------------------
# Description: Revision of silicon. The 'latest' name, means most current revision.
# Possible options: <a0, latest>
revision: a0
# ------------------------------------------===== Memory type [Required] =====------------------------------------------
# Description: Specify type of memory used by FCB description.
# Possible options: <flexspi_nor>
type: flexspi_nor
# ------------------------------------------===== mimxrt1024 [Required] =====-------------------------------------------
fcb_settings:
# ---------------------------------------------===== tag [Optional] =====---------------------------------------------
# Description: Offset: 0x00000000, Width: 32b; [0x000-0x003] Tag, fixed value 0x42464346UL
tag: '0x42464346'
# -------------------------------------------===== version [Optional] =====-------------------------------------------
# Description: Offset: 0x00000004, Width: 32b; [0x004-0x007] Version,[31:24] -'V', [23:16] - Major, [15:8] - Minor,
# [7:0] - bugfix
version: '0x56010400'
# ------------------------------------------===== reserved0 [Optional] =====------------------------------------------
# Description: Offset: 0x00000008, Width: 32b; [0x008-0x00b] Reserved for future use
reserved0: '0x00000000'
# --------------------------------------===== readSampleClkSrc [Optional] =====---------------------------------------
# Description: Offset: 0x0000000C, Width: 8b; [0x00c-0x00c] Read Sample Clock Source, valid value: 0/1/3
readSampleClkSrc: '0x00'
# -----------------------------------------===== csHoldTime [Optional] =====------------------------------------------
# Description: Offset: 0x0000000D, Width: 8b; [0x00d-0x00d] CS hold time, default value: 3
csHoldTime: '0x00'
# -----------------------------------------===== csSetupTime [Optional] =====-----------------------------------------
# Description: Offset: 0x0000000E, Width: 8b; [0x00e-0x00e] CS setup time, default value: 3
csSetupTime: '0x00'
# -------------------------------------===== columnAddressWidth [Optional] =====--------------------------------------
# Description: Offset: 0x0000000F, Width: 8b; [0x00f-0x00f] Column Address with, for HyperBus protocol, it is fixed
# to 3, For Serial NAND, need to refer to datasheet
columnAddressWidth: '0x00'
# -------------------------------------===== deviceModeCfgEnable [Optional] =====-------------------------------------
# Description: Offset: 0x00000010, Width: 8b; [0x010-0x010] Device Mode Configure enable flag, 1 - Enable, 0 -
# Disable
deviceModeCfgEnable: '0x00'
# ---------------------------------------===== deviceModeType [Optional] =====----------------------------------------
# Description: Offset: 0x00000011, Width: 8b; [0x011-0x011] Specify the configuration command type:Quad Enable,
# DPI/QPI/OPI switch, Generic configuration, etc.
deviceModeType: '0x00'
# -------------------------------------===== waitTimeCfgCommands [Optional] =====-------------------------------------
# Description: Offset: 0x00000012, Width: 16b; [0x012-0x013] Wait time for all configuration commands, unit: 100us,
# Used for DPI/QPI/OPI switch or reset command
waitTimeCfgCommands: '0x0000'
# ----------------------------------------===== deviceModeSeq [Optional] =====----------------------------------------
# Description: Offset: 0x00000014, Width: 32b; [0x014-0x017] Device mode sequence info, [7:0] - LUT sequence id,
# [15:8] - LUt sequence number, [31:16] Reserved
deviceModeSeq:
# ------------------------------------------===== seqNum [Optional] =====-------------------------------------------
# Description: Offset: 0b, Width: 8b, Sequence Number, valid number: 1-16
seqNum: 0
# -------------------------------------------===== seqId [Optional] =====-------------------------------------------
# Description: Offset: 8b, Width: 8b, Sequence Index, valid number: 0-15
seqId: 0
# -----------------------------------------===== reserved [Optional] =====------------------------------------------
# Description: Offset: 16b, Width: 16b, N/A
reserved: 0
# ----------------------------------------===== deviceModeArg [Optional] =====----------------------------------------
# Description: Offset: 0x00000018, Width: 32b; [0x018-0x01b] Argument/Parameter for device configuration
deviceModeArg: '0x00000000'
# ---------------------------------------===== configCmdEnable [Optional] =====---------------------------------------
# Description: Offset: 0x0000001C, Width: 8b; [0x01c-0x01c] Configure command Enable Flag, 1 - Enable, 0 - Disable
configCmdEnable: '0x00'
# --------------------------------------===== configModeType_0 [Optional] =====---------------------------------------
# Description: Offset: 0x0000001D, Width: 8b; [0x01d-0x01f] Configure Mode Type, similar as deviceModeTpe
configModeType_0: '0x00'
# --------------------------------------===== configModeType_1 [Optional] =====---------------------------------------
# Description: Offset: 0x0000001E, Width: 8b; [0x01d-0x01f] Configure Mode Type, similar as deviceModeTpe
configModeType_1: '0x00'
# --------------------------------------===== configModeType_2 [Optional] =====---------------------------------------
# Description: Offset: 0x0000001F, Width: 8b; [0x01d-0x01f] Configure Mode Type, similar as deviceModeTpe
configModeType_2: '0x00'
# ---------------------------------------===== configCmdSeqs_0 [Optional] =====---------------------------------------
# Description: Offset: 0x00000020, Width: 32b; [0x020-0x02b] Sequence info for Device Configuration command, similar
# as deviceModeSeq
configCmdSeqs_0:
# ------------------------------------------===== seqNum [Optional] =====-------------------------------------------
# Description: Offset: 0b, Width: 8b, Sequence Number, valid number: 1-16
seqNum: 0
# -------------------------------------------===== seqId [Optional] =====-------------------------------------------
# Description: Offset: 8b, Width: 8b, Sequence Index, valid number: 0-15
seqId: 0
# -----------------------------------------===== reserved [Optional] =====------------------------------------------
# Description: Offset: 16b, Width: 16b, N/A
reserved: 0
# ---------------------------------------===== configCmdSeqs_1 [Optional] =====---------------------------------------
# Description: Offset: 0x00000024, Width: 32b; [0x020-0x02b] Sequence info for Device Configuration command, similar
# as deviceModeSeq
configCmdSeqs_1:
# ------------------------------------------===== seqNum [Optional] =====-------------------------------------------
# Description: Offset: 0b, Width: 8b, Sequence Number, valid number: 1-16
seqNum: 0
# -------------------------------------------===== seqId [Optional] =====-------------------------------------------
# Description: Offset: 8b, Width: 8b, Sequence Index, valid number: 0-15
seqId: 0
# -----------------------------------------===== reserved [Optional] =====------------------------------------------
# Description: Offset: 16b, Width: 16b, N/A
reserved: 0
# ---------------------------------------===== configCmdSeqs_2 [Optional] =====---------------------------------------
# Description: Offset: 0x00000028, Width: 32b; [0x020-0x02b] Sequence info for Device Configuration command, similar
# as deviceModeSeq
configCmdSeqs_2:
# ------------------------------------------===== seqNum [Optional] =====-------------------------------------------
# Description: Offset: 0b, Width: 8b, Sequence Number, valid number: 1-16
seqNum: 0
# -------------------------------------------===== seqId [Optional] =====-------------------------------------------
# Description: Offset: 8b, Width: 8b, Sequence Index, valid number: 0-15
seqId: 0
# -----------------------------------------===== reserved [Optional] =====------------------------------------------
# Description: Offset: 16b, Width: 16b, N/A
reserved: 0
# ------------------------------------------===== reserved1 [Optional] =====------------------------------------------
# Description: Offset: 0x0000002C, Width: 32b; [0x02c-0x02f] Reserved for future use
reserved1: '0x00000000'
# ---------------------------------------===== configCmdArgs_0 [Optional] =====---------------------------------------
# Description: Offset: 0x00000030, Width: 32b; [0x030-0x03b] Arguments/Parameters for device Configuration commands
configCmdArgs_0: '0x00000000'
# ---------------------------------------===== configCmdArgs_1 [Optional] =====---------------------------------------
# Description: Offset: 0x00000034, Width: 32b; [0x030-0x03b] Arguments/Parameters for device Configuration commands
configCmdArgs_1: '0x00000000'
# ---------------------------------------===== configCmdArgs_2 [Optional] =====---------------------------------------
# Description: Offset: 0x00000038, Width: 32b; [0x030-0x03b] Arguments/Parameters for device Configuration commands
configCmdArgs_2: '0x00000000'
# ------------------------------------------===== reserved2 [Optional] =====------------------------------------------
# Description: Offset: 0x0000003C, Width: 32b; [0x03c-0x03f] Reserved for future use
reserved2: '0x00000000'
# ------------------------------------===== controllerMiscOption [Optional] =====-------------------------------------
# Description: Offset: 0x00000040, Width: 32b; [0x040-0x043] Controller Misc Options, see Misc feature bit
# definitions for more details
controllerMiscOption: '0x00000000'
# -----------------------------------------===== deviceType [Optional] =====------------------------------------------
# Description: Offset: 0x00000044, Width: 8b; [0x044-0x044] Device Type: See Flash Type Definition for more details
deviceType: '0x00'
# ----------------------------------------===== sflashPadType [Optional] =====----------------------------------------
# Description: Offset: 0x00000045, Width: 8b; [0x045-0x045] Serial Flash Pad Type: 1 - Single, 2 - Dual, 4 - Quad, 8
# - Octal
sflashPadType: '0x00'
# ----------------------------------------===== serialClkFreq [Optional] =====----------------------------------------
# Description: Offset: 0x00000046, Width: 8b; [0x046-0x046] Serial Flash Frequency, device specific definitions, See
# System Boot Chapter for more details
serialClkFreq: '0x00'
# -------------------------------------===== lutCustomSeqEnable [Optional] =====--------------------------------------
# Description: Offset: 0x00000047, Width: 8b; [0x047-0x047] LUT customization Enable, it is required if the
# program/erase cannot be done using 1 LUT sequence, currently, only applicable to HyperFLASH
lutCustomSeqEnable: '0x00'
# -----------------------------------------===== reserved3_0 [Optional] =====-----------------------------------------
# Description: Offset: 0x00000048, Width: 32b; [0x048-0x04f] Reserved for future use
reserved3_0: '0x00000000'
# -----------------------------------------===== reserved3_1 [Optional] =====-----------------------------------------
# Description: Offset: 0x0000004C, Width: 32b; [0x048-0x04f] Reserved for future use
reserved3_1: '0x00000000'
# ----------------------------------------===== sflashA1Size [Optional] =====-----------------------------------------
# Description: Offset: 0x00000050, Width: 32b; [0x050-0x053] Size of Flash connected to A1
sflashA1Size: '0x00000000'
# ----------------------------------------===== sflashA2Size [Optional] =====-----------------------------------------
# Description: Offset: 0x00000054, Width: 32b; [0x054-0x057] Size of Flash connected to A2
sflashA2Size: '0x00000000'
# ----------------------------------------===== sflashB1Size [Optional] =====-----------------------------------------
# Description: Offset: 0x00000058, Width: 32b; [0x058-0x05b] Size of Flash connected to B1
sflashB1Size: '0x00000000'
# ----------------------------------------===== sflashB2Size [Optional] =====-----------------------------------------
# Description: Offset: 0x0000005C, Width: 32b; [0x05c-0x05f] Size of Flash connected to B2
sflashB2Size: '0x00000000'
# ------------------------------------===== csPadSettingOverride [Optional] =====-------------------------------------
# Description: Offset: 0x00000060, Width: 32b; [0x060-0x063] CS pad setting override value
csPadSettingOverride: '0x00000000'
# -----------------------------------===== sclkPadSettingOverride [Optional] =====------------------------------------
# Description: Offset: 0x00000064, Width: 32b; [0x064-0x067] SCK pad setting override value
sclkPadSettingOverride: '0x00000000'
# -----------------------------------===== dataPadSettingOverride [Optional] =====------------------------------------
# Description: Offset: 0x00000068, Width: 32b; [0x068-0x06b] data pad setting override value
dataPadSettingOverride: '0x00000000'
# ------------------------------------===== dqsPadSettingOverride [Optional] =====------------------------------------
# Description: Offset: 0x0000006C, Width: 32b; [0x06c-0x06f] DQS pad setting override value
dqsPadSettingOverride: '0x00000000'
# -----------------------------------------===== timeoutInMs [Optional] =====-----------------------------------------
# Description: Offset: 0x00000070, Width: 32b; [0x070-0x073] Timeout threshold for read status command
timeoutInMs: '0x00000000'
# ---------------------------------------===== commandInterval [Optional] =====---------------------------------------
# Description: Offset: 0x00000074, Width: 32b; [0x074-0x077] CS deselect interval between two commands
commandInterval: '0x00000000'
# ---------------------------------------===== dataValidTime_0 [Optional] =====---------------------------------------
# Description: Offset: 0x00000078, Width: 16b; [0x078-0x07b] CLK edge to data valid time for PORT A and PORT B, in
# terms of 0.1ns
dataValidTime_0: '0x0000'
# ---------------------------------------===== dataValidTime_1 [Optional] =====---------------------------------------
# Description: Offset: 0x0000007A, Width: 16b; [0x078-0x07b] CLK edge to data valid time for PORT A and PORT B, in
# terms of 0.1ns
dataValidTime_1: '0x0000'
# -----------------------------------------===== busyOffset [Optional] =====------------------------------------------
# Description: Offset: 0x0000007C, Width: 16b; [0x07c-0x07d] Busy offset, valid value: 0-31
busyOffset: '0x0000'
# ---------------------------------------===== busyBitPolarity [Optional] =====---------------------------------------
# Description: Offset: 0x0000007E, Width: 16b; [0x07e-0x07f] Busy flag polarity, 0 - busy flag is 1 when flash device
# is busy, 1 - busy flag is 0 when flash device is busy
busyBitPolarity: '0x0000'
# -----------------------------------===== lookupTable_seq0_instr0 [Optional] =====-----------------------------------
# Description: Offset: 0x00000080, Width: 16b; Lookup table holds Flash command sequences 0, instruction 0
lookupTable_seq0_instr0:
# ------------------------------------------===== OPERAND [Optional] =====------------------------------------------
# Description: Offset: 0b, Width: 8b, Instruction operand. Its values depends on used instruction
OPERAND: 0
# -----------------------------------------===== NUM_PADS [Optional] =====------------------------------------------
# Description: Offset: 8b, Width: 2b, Number of pads used by instruction. Some instructions ignores this parameter.
# - 1PAD, (0): Single mode. One pad is used.
# - 2PAD, (1): Dual mode. Two pads are used.
# - 4PAD, (2): Quad mode. Four pads are used.
# - 8PAD, (3): Octal mode. Eight pads are used.
# Possible options: <1PAD, 2PAD, 4PAD, 8PAD>
NUM_PADS: 1PAD
# --------------------------------------===== OPERATION_CODE [Optional] =====---------------------------------------
# Description: Offset: 10b, Width: 6b, Instruction operation code.
# - STOP, (0): Stop execution and de-assert CS. Then, the next command sequence (to the same flash device) starts
# from instruction pointer 0.
# - CMD_SDR, (1): Transmit command code to Flash.
# - RADDR_SDR, (2): Transmit row address to Flash.
# - CADDR_SDR, (3): Transmit column address to Flash.
# - MODE1_SDR, (4): Transmit mode bits to Flash.
# - MODE2_SDR, (5): Transmit mode bits to Flash.
# - MODE4_SDR, (6): Transmit mode bits to Flash.
# - MODE8_SDR, (7): Transmit mode bits to Flash.
# - WRITE_SDR, (8): Transmit program data to Flash device.
# - READ_SDR, (9): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_SDR, (10): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_SDR, (11): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_SDR, (12): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_SDR, (13): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# - JMP_ON_CS, (31): Stop execution, de-assert CS and save operand[7:0] as the instruction start pointer for next
# sequence.Normally this instruction is used to support Execute-In-Place enhanced mode. See XIP enhanced mode for
# more details.This instruction is only allowed for AHB read commands. There is interrupt status bit set
# (INTR[IPCMDERR] or INTR[AHBCMDERR]) when using this instruction in IP command or AHB write command.
# - CMD_DDR, (33): Transmit command code to Flash.
# - RADDR_DDR, (34): Transmit row address to Flash.
# - CADDR_DDR, (35): Transmit column address to Flash.
# - MODE1_DDR, (36): Transmit mode bits to Flash.
# - MODE2_DDR, (37): Transmit mode bits to Flash.
# - MODE4_DDR, (38): Transmit mode bits to Flash.
# - MODE8_DDR, (39): Transmit mode bits to Flash.
# - WRITE_DDR, (40): Transmit program data to Flash device.
# - READ_DDR, (41): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_DDR, (42): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_DDR, (43): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_DDR, (44): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_DDR, (45): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# Possible options: <STOP, CMD_SDR, RADDR_SDR, CADDR_SDR, MODE1_SDR, MODE2_SDR, MODE4_SDR, MODE8_SDR, WRITE_SDR,
# READ_SDR, LEARN_SDR, DATSZ_SDR, DUMMY_SDR, DUMMY_RWDS_SDR, JMP_ON_CS, CMD_DDR, RADDR_DDR, CADDR_DDR, MODE1_DDR,
# MODE2_DDR, MODE4_DDR, MODE8_DDR, WRITE_DDR, READ_DDR, LEARN_DDR, DATSZ_DDR, DUMMY_DDR, DUMMY_RWDS_DDR>
OPERATION_CODE: STOP
lookupTable_seq0_instr1:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq0_instr2:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq0_instr3:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq0_instr4:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq0_instr5:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq0_instr6:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq0_instr7:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
# -----------------------------------===== lookupTable_seq1_instr0 [Optional] =====-----------------------------------
# Description: Offset: 0x00000090, Width: 16b; Lookup table holds Flash command sequences 1, instruction 0
lookupTable_seq1_instr0:
# ------------------------------------------===== OPERAND [Optional] =====------------------------------------------
# Description: Offset: 0b, Width: 8b, Instruction operand. Its values depends on used instruction
OPERAND: 0
# -----------------------------------------===== NUM_PADS [Optional] =====------------------------------------------
# Description: Offset: 8b, Width: 2b, Number of pads used by instruction. Some instructions ignores this parameter.
# - 1PAD, (0): Single mode. One pad is used.
# - 2PAD, (1): Dual mode. Two pads are used.
# - 4PAD, (2): Quad mode. Four pads are used.
# - 8PAD, (3): Octal mode. Eight pads are used.
# Possible options: <1PAD, 2PAD, 4PAD, 8PAD>
NUM_PADS: 1PAD
# --------------------------------------===== OPERATION_CODE [Optional] =====---------------------------------------
# Description: Offset: 10b, Width: 6b, Instruction operation code.
# - STOP, (0): Stop execution and de-assert CS. Then, the next command sequence (to the same flash device) starts
# from instruction pointer 0.
# - CMD_SDR, (1): Transmit command code to Flash.
# - RADDR_SDR, (2): Transmit row address to Flash.
# - CADDR_SDR, (3): Transmit column address to Flash.
# - MODE1_SDR, (4): Transmit mode bits to Flash.
# - MODE2_SDR, (5): Transmit mode bits to Flash.
# - MODE4_SDR, (6): Transmit mode bits to Flash.
# - MODE8_SDR, (7): Transmit mode bits to Flash.
# - WRITE_SDR, (8): Transmit program data to Flash device.
# - READ_SDR, (9): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_SDR, (10): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_SDR, (11): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_SDR, (12): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_SDR, (13): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# - JMP_ON_CS, (31): Stop execution, de-assert CS and save operand[7:0] as the instruction start pointer for next
# sequence.Normally this instruction is used to support Execute-In-Place enhanced mode. See XIP enhanced mode for
# more details.This instruction is only allowed for AHB read commands. There is interrupt status bit set
# (INTR[IPCMDERR] or INTR[AHBCMDERR]) when using this instruction in IP command or AHB write command.
# - CMD_DDR, (33): Transmit command code to Flash.
# - RADDR_DDR, (34): Transmit row address to Flash.
# - CADDR_DDR, (35): Transmit column address to Flash.
# - MODE1_DDR, (36): Transmit mode bits to Flash.
# - MODE2_DDR, (37): Transmit mode bits to Flash.
# - MODE4_DDR, (38): Transmit mode bits to Flash.
# - MODE8_DDR, (39): Transmit mode bits to Flash.
# - WRITE_DDR, (40): Transmit program data to Flash device.
# - READ_DDR, (41): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_DDR, (42): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_DDR, (43): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_DDR, (44): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_DDR, (45): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# Possible options: <STOP, CMD_SDR, RADDR_SDR, CADDR_SDR, MODE1_SDR, MODE2_SDR, MODE4_SDR, MODE8_SDR, WRITE_SDR,
# READ_SDR, LEARN_SDR, DATSZ_SDR, DUMMY_SDR, DUMMY_RWDS_SDR, JMP_ON_CS, CMD_DDR, RADDR_DDR, CADDR_DDR, MODE1_DDR,
# MODE2_DDR, MODE4_DDR, MODE8_DDR, WRITE_DDR, READ_DDR, LEARN_DDR, DATSZ_DDR, DUMMY_DDR, DUMMY_RWDS_DDR>
OPERATION_CODE: STOP
lookupTable_seq1_instr1:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq1_instr2:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq1_instr3:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq1_instr4:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq1_instr5:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq1_instr6:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq1_instr7:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
# -----------------------------------===== lookupTable_seq2_instr0 [Optional] =====-----------------------------------
# Description: Offset: 0x000000A0, Width: 16b; Lookup table holds Flash command sequences 2, instruction 0
lookupTable_seq2_instr0:
# ------------------------------------------===== OPERAND [Optional] =====------------------------------------------
# Description: Offset: 0b, Width: 8b, Instruction operand. Its values depends on used instruction
OPERAND: 0
# -----------------------------------------===== NUM_PADS [Optional] =====------------------------------------------
# Description: Offset: 8b, Width: 2b, Number of pads used by instruction. Some instructions ignores this parameter.
# - 1PAD, (0): Single mode. One pad is used.
# - 2PAD, (1): Dual mode. Two pads are used.
# - 4PAD, (2): Quad mode. Four pads are used.
# - 8PAD, (3): Octal mode. Eight pads are used.
# Possible options: <1PAD, 2PAD, 4PAD, 8PAD>
NUM_PADS: 1PAD
# --------------------------------------===== OPERATION_CODE [Optional] =====---------------------------------------
# Description: Offset: 10b, Width: 6b, Instruction operation code.
# - STOP, (0): Stop execution and de-assert CS. Then, the next command sequence (to the same flash device) starts
# from instruction pointer 0.
# - CMD_SDR, (1): Transmit command code to Flash.
# - RADDR_SDR, (2): Transmit row address to Flash.
# - CADDR_SDR, (3): Transmit column address to Flash.
# - MODE1_SDR, (4): Transmit mode bits to Flash.
# - MODE2_SDR, (5): Transmit mode bits to Flash.
# - MODE4_SDR, (6): Transmit mode bits to Flash.
# - MODE8_SDR, (7): Transmit mode bits to Flash.
# - WRITE_SDR, (8): Transmit program data to Flash device.
# - READ_SDR, (9): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_SDR, (10): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_SDR, (11): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_SDR, (12): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_SDR, (13): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# - JMP_ON_CS, (31): Stop execution, de-assert CS and save operand[7:0] as the instruction start pointer for next
# sequence.Normally this instruction is used to support Execute-In-Place enhanced mode. See XIP enhanced mode for
# more details.This instruction is only allowed for AHB read commands. There is interrupt status bit set
# (INTR[IPCMDERR] or INTR[AHBCMDERR]) when using this instruction in IP command or AHB write command.
# - CMD_DDR, (33): Transmit command code to Flash.
# - RADDR_DDR, (34): Transmit row address to Flash.
# - CADDR_DDR, (35): Transmit column address to Flash.
# - MODE1_DDR, (36): Transmit mode bits to Flash.
# - MODE2_DDR, (37): Transmit mode bits to Flash.
# - MODE4_DDR, (38): Transmit mode bits to Flash.
# - MODE8_DDR, (39): Transmit mode bits to Flash.
# - WRITE_DDR, (40): Transmit program data to Flash device.
# - READ_DDR, (41): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_DDR, (42): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_DDR, (43): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_DDR, (44): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_DDR, (45): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# Possible options: <STOP, CMD_SDR, RADDR_SDR, CADDR_SDR, MODE1_SDR, MODE2_SDR, MODE4_SDR, MODE8_SDR, WRITE_SDR,
# READ_SDR, LEARN_SDR, DATSZ_SDR, DUMMY_SDR, DUMMY_RWDS_SDR, JMP_ON_CS, CMD_DDR, RADDR_DDR, CADDR_DDR, MODE1_DDR,
# MODE2_DDR, MODE4_DDR, MODE8_DDR, WRITE_DDR, READ_DDR, LEARN_DDR, DATSZ_DDR, DUMMY_DDR, DUMMY_RWDS_DDR>
OPERATION_CODE: STOP
lookupTable_seq2_instr1:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq2_instr2:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq2_instr3:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq2_instr4:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq2_instr5:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq2_instr6:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq2_instr7:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
# -----------------------------------===== lookupTable_seq3_instr0 [Optional] =====-----------------------------------
# Description: Offset: 0x000000B0, Width: 16b; Lookup table holds Flash command sequences 3, instruction 0
lookupTable_seq3_instr0:
# ------------------------------------------===== OPERAND [Optional] =====------------------------------------------
# Description: Offset: 0b, Width: 8b, Instruction operand. Its values depends on used instruction
OPERAND: 0
# -----------------------------------------===== NUM_PADS [Optional] =====------------------------------------------
# Description: Offset: 8b, Width: 2b, Number of pads used by instruction. Some instructions ignores this parameter.
# - 1PAD, (0): Single mode. One pad is used.
# - 2PAD, (1): Dual mode. Two pads are used.
# - 4PAD, (2): Quad mode. Four pads are used.
# - 8PAD, (3): Octal mode. Eight pads are used.
# Possible options: <1PAD, 2PAD, 4PAD, 8PAD>
NUM_PADS: 1PAD
# --------------------------------------===== OPERATION_CODE [Optional] =====---------------------------------------
# Description: Offset: 10b, Width: 6b, Instruction operation code.
# - STOP, (0): Stop execution and de-assert CS. Then, the next command sequence (to the same flash device) starts
# from instruction pointer 0.
# - CMD_SDR, (1): Transmit command code to Flash.
# - RADDR_SDR, (2): Transmit row address to Flash.
# - CADDR_SDR, (3): Transmit column address to Flash.
# - MODE1_SDR, (4): Transmit mode bits to Flash.
# - MODE2_SDR, (5): Transmit mode bits to Flash.
# - MODE4_SDR, (6): Transmit mode bits to Flash.
# - MODE8_SDR, (7): Transmit mode bits to Flash.
# - WRITE_SDR, (8): Transmit program data to Flash device.
# - READ_SDR, (9): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_SDR, (10): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_SDR, (11): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_SDR, (12): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_SDR, (13): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# - JMP_ON_CS, (31): Stop execution, de-assert CS and save operand[7:0] as the instruction start pointer for next
# sequence.Normally this instruction is used to support Execute-In-Place enhanced mode. See XIP enhanced mode for
# more details.This instruction is only allowed for AHB read commands. There is interrupt status bit set
# (INTR[IPCMDERR] or INTR[AHBCMDERR]) when using this instruction in IP command or AHB write command.
# - CMD_DDR, (33): Transmit command code to Flash.
# - RADDR_DDR, (34): Transmit row address to Flash.
# - CADDR_DDR, (35): Transmit column address to Flash.
# - MODE1_DDR, (36): Transmit mode bits to Flash.
# - MODE2_DDR, (37): Transmit mode bits to Flash.
# - MODE4_DDR, (38): Transmit mode bits to Flash.
# - MODE8_DDR, (39): Transmit mode bits to Flash.
# - WRITE_DDR, (40): Transmit program data to Flash device.
# - READ_DDR, (41): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_DDR, (42): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_DDR, (43): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_DDR, (44): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_DDR, (45): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# Possible options: <STOP, CMD_SDR, RADDR_SDR, CADDR_SDR, MODE1_SDR, MODE2_SDR, MODE4_SDR, MODE8_SDR, WRITE_SDR,
# READ_SDR, LEARN_SDR, DATSZ_SDR, DUMMY_SDR, DUMMY_RWDS_SDR, JMP_ON_CS, CMD_DDR, RADDR_DDR, CADDR_DDR, MODE1_DDR,
# MODE2_DDR, MODE4_DDR, MODE8_DDR, WRITE_DDR, READ_DDR, LEARN_DDR, DATSZ_DDR, DUMMY_DDR, DUMMY_RWDS_DDR>
OPERATION_CODE: STOP
lookupTable_seq3_instr1:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq3_instr2:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq3_instr3:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq3_instr4:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq3_instr5:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq3_instr6:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq3_instr7:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
# -----------------------------------===== lookupTable_seq4_instr0 [Optional] =====-----------------------------------
# Description: Offset: 0x000000C0, Width: 16b; Lookup table holds Flash command sequences 4, instruction 0
lookupTable_seq4_instr0:
# ------------------------------------------===== OPERAND [Optional] =====------------------------------------------
# Description: Offset: 0b, Width: 8b, Instruction operand. Its values depends on used instruction
OPERAND: 0
# -----------------------------------------===== NUM_PADS [Optional] =====------------------------------------------
# Description: Offset: 8b, Width: 2b, Number of pads used by instruction. Some instructions ignores this parameter.
# - 1PAD, (0): Single mode. One pad is used.
# - 2PAD, (1): Dual mode. Two pads are used.
# - 4PAD, (2): Quad mode. Four pads are used.
# - 8PAD, (3): Octal mode. Eight pads are used.
# Possible options: <1PAD, 2PAD, 4PAD, 8PAD>
NUM_PADS: 1PAD
# --------------------------------------===== OPERATION_CODE [Optional] =====---------------------------------------
# Description: Offset: 10b, Width: 6b, Instruction operation code.
# - STOP, (0): Stop execution and de-assert CS. Then, the next command sequence (to the same flash device) starts
# from instruction pointer 0.
# - CMD_SDR, (1): Transmit command code to Flash.
# - RADDR_SDR, (2): Transmit row address to Flash.
# - CADDR_SDR, (3): Transmit column address to Flash.
# - MODE1_SDR, (4): Transmit mode bits to Flash.
# - MODE2_SDR, (5): Transmit mode bits to Flash.
# - MODE4_SDR, (6): Transmit mode bits to Flash.
# - MODE8_SDR, (7): Transmit mode bits to Flash.
# - WRITE_SDR, (8): Transmit program data to Flash device.
# - READ_SDR, (9): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_SDR, (10): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_SDR, (11): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_SDR, (12): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_SDR, (13): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# - JMP_ON_CS, (31): Stop execution, de-assert CS and save operand[7:0] as the instruction start pointer for next
# sequence.Normally this instruction is used to support Execute-In-Place enhanced mode. See XIP enhanced mode for
# more details.This instruction is only allowed for AHB read commands. There is interrupt status bit set
# (INTR[IPCMDERR] or INTR[AHBCMDERR]) when using this instruction in IP command or AHB write command.
# - CMD_DDR, (33): Transmit command code to Flash.
# - RADDR_DDR, (34): Transmit row address to Flash.
# - CADDR_DDR, (35): Transmit column address to Flash.
# - MODE1_DDR, (36): Transmit mode bits to Flash.
# - MODE2_DDR, (37): Transmit mode bits to Flash.
# - MODE4_DDR, (38): Transmit mode bits to Flash.
# - MODE8_DDR, (39): Transmit mode bits to Flash.
# - WRITE_DDR, (40): Transmit program data to Flash device.
# - READ_DDR, (41): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_DDR, (42): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_DDR, (43): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_DDR, (44): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_DDR, (45): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# Possible options: <STOP, CMD_SDR, RADDR_SDR, CADDR_SDR, MODE1_SDR, MODE2_SDR, MODE4_SDR, MODE8_SDR, WRITE_SDR,
# READ_SDR, LEARN_SDR, DATSZ_SDR, DUMMY_SDR, DUMMY_RWDS_SDR, JMP_ON_CS, CMD_DDR, RADDR_DDR, CADDR_DDR, MODE1_DDR,
# MODE2_DDR, MODE4_DDR, MODE8_DDR, WRITE_DDR, READ_DDR, LEARN_DDR, DATSZ_DDR, DUMMY_DDR, DUMMY_RWDS_DDR>
OPERATION_CODE: STOP
lookupTable_seq4_instr1:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq4_instr2:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq4_instr3:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq4_instr4:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq4_instr5:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq4_instr6:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq4_instr7:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
# -----------------------------------===== lookupTable_seq5_instr0 [Optional] =====-----------------------------------
# Description: Offset: 0x000000D0, Width: 16b; Lookup table holds Flash command sequences 5, instruction 0
lookupTable_seq5_instr0:
# ------------------------------------------===== OPERAND [Optional] =====------------------------------------------
# Description: Offset: 0b, Width: 8b, Instruction operand. Its values depends on used instruction
OPERAND: 0
# -----------------------------------------===== NUM_PADS [Optional] =====------------------------------------------
# Description: Offset: 8b, Width: 2b, Number of pads used by instruction. Some instructions ignores this parameter.
# - 1PAD, (0): Single mode. One pad is used.
# - 2PAD, (1): Dual mode. Two pads are used.
# - 4PAD, (2): Quad mode. Four pads are used.
# - 8PAD, (3): Octal mode. Eight pads are used.
# Possible options: <1PAD, 2PAD, 4PAD, 8PAD>
NUM_PADS: 1PAD
# --------------------------------------===== OPERATION_CODE [Optional] =====---------------------------------------
# Description: Offset: 10b, Width: 6b, Instruction operation code.
# - STOP, (0): Stop execution and de-assert CS. Then, the next command sequence (to the same flash device) starts
# from instruction pointer 0.
# - CMD_SDR, (1): Transmit command code to Flash.
# - RADDR_SDR, (2): Transmit row address to Flash.
# - CADDR_SDR, (3): Transmit column address to Flash.
# - MODE1_SDR, (4): Transmit mode bits to Flash.
# - MODE2_SDR, (5): Transmit mode bits to Flash.
# - MODE4_SDR, (6): Transmit mode bits to Flash.
# - MODE8_SDR, (7): Transmit mode bits to Flash.
# - WRITE_SDR, (8): Transmit program data to Flash device.
# - READ_SDR, (9): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_SDR, (10): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_SDR, (11): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_SDR, (12): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_SDR, (13): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# - JMP_ON_CS, (31): Stop execution, de-assert CS and save operand[7:0] as the instruction start pointer for next
# sequence.Normally this instruction is used to support Execute-In-Place enhanced mode. See XIP enhanced mode for
# more details.This instruction is only allowed for AHB read commands. There is interrupt status bit set
# (INTR[IPCMDERR] or INTR[AHBCMDERR]) when using this instruction in IP command or AHB write command.
# - CMD_DDR, (33): Transmit command code to Flash.
# - RADDR_DDR, (34): Transmit row address to Flash.
# - CADDR_DDR, (35): Transmit column address to Flash.
# - MODE1_DDR, (36): Transmit mode bits to Flash.
# - MODE2_DDR, (37): Transmit mode bits to Flash.
# - MODE4_DDR, (38): Transmit mode bits to Flash.
# - MODE8_DDR, (39): Transmit mode bits to Flash.
# - WRITE_DDR, (40): Transmit program data to Flash device.
# - READ_DDR, (41): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_DDR, (42): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_DDR, (43): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_DDR, (44): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_DDR, (45): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# Possible options: <STOP, CMD_SDR, RADDR_SDR, CADDR_SDR, MODE1_SDR, MODE2_SDR, MODE4_SDR, MODE8_SDR, WRITE_SDR,
# READ_SDR, LEARN_SDR, DATSZ_SDR, DUMMY_SDR, DUMMY_RWDS_SDR, JMP_ON_CS, CMD_DDR, RADDR_DDR, CADDR_DDR, MODE1_DDR,
# MODE2_DDR, MODE4_DDR, MODE8_DDR, WRITE_DDR, READ_DDR, LEARN_DDR, DATSZ_DDR, DUMMY_DDR, DUMMY_RWDS_DDR>
OPERATION_CODE: STOP
lookupTable_seq5_instr1:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq5_instr2:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq5_instr3:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq5_instr4:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq5_instr5:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq5_instr6:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq5_instr7:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
# -----------------------------------===== lookupTable_seq6_instr0 [Optional] =====-----------------------------------
# Description: Offset: 0x000000E0, Width: 16b; Lookup table holds Flash command sequences 6, instruction 0
lookupTable_seq6_instr0:
# ------------------------------------------===== OPERAND [Optional] =====------------------------------------------
# Description: Offset: 0b, Width: 8b, Instruction operand. Its values depends on used instruction
OPERAND: 0
# -----------------------------------------===== NUM_PADS [Optional] =====------------------------------------------
# Description: Offset: 8b, Width: 2b, Number of pads used by instruction. Some instructions ignores this parameter.
# - 1PAD, (0): Single mode. One pad is used.
# - 2PAD, (1): Dual mode. Two pads are used.
# - 4PAD, (2): Quad mode. Four pads are used.
# - 8PAD, (3): Octal mode. Eight pads are used.
# Possible options: <1PAD, 2PAD, 4PAD, 8PAD>
NUM_PADS: 1PAD
# --------------------------------------===== OPERATION_CODE [Optional] =====---------------------------------------
# Description: Offset: 10b, Width: 6b, Instruction operation code.
# - STOP, (0): Stop execution and de-assert CS. Then, the next command sequence (to the same flash device) starts
# from instruction pointer 0.
# - CMD_SDR, (1): Transmit command code to Flash.
# - RADDR_SDR, (2): Transmit row address to Flash.
# - CADDR_SDR, (3): Transmit column address to Flash.
# - MODE1_SDR, (4): Transmit mode bits to Flash.
# - MODE2_SDR, (5): Transmit mode bits to Flash.
# - MODE4_SDR, (6): Transmit mode bits to Flash.
# - MODE8_SDR, (7): Transmit mode bits to Flash.
# - WRITE_SDR, (8): Transmit program data to Flash device.
# - READ_SDR, (9): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_SDR, (10): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_SDR, (11): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_SDR, (12): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_SDR, (13): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# - JMP_ON_CS, (31): Stop execution, de-assert CS and save operand[7:0] as the instruction start pointer for next
# sequence.Normally this instruction is used to support Execute-In-Place enhanced mode. See XIP enhanced mode for
# more details.This instruction is only allowed for AHB read commands. There is interrupt status bit set
# (INTR[IPCMDERR] or INTR[AHBCMDERR]) when using this instruction in IP command or AHB write command.
# - CMD_DDR, (33): Transmit command code to Flash.
# - RADDR_DDR, (34): Transmit row address to Flash.
# - CADDR_DDR, (35): Transmit column address to Flash.
# - MODE1_DDR, (36): Transmit mode bits to Flash.
# - MODE2_DDR, (37): Transmit mode bits to Flash.
# - MODE4_DDR, (38): Transmit mode bits to Flash.
# - MODE8_DDR, (39): Transmit mode bits to Flash.
# - WRITE_DDR, (40): Transmit program data to Flash device.
# - READ_DDR, (41): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_DDR, (42): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_DDR, (43): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_DDR, (44): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_DDR, (45): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# Possible options: <STOP, CMD_SDR, RADDR_SDR, CADDR_SDR, MODE1_SDR, MODE2_SDR, MODE4_SDR, MODE8_SDR, WRITE_SDR,
# READ_SDR, LEARN_SDR, DATSZ_SDR, DUMMY_SDR, DUMMY_RWDS_SDR, JMP_ON_CS, CMD_DDR, RADDR_DDR, CADDR_DDR, MODE1_DDR,
# MODE2_DDR, MODE4_DDR, MODE8_DDR, WRITE_DDR, READ_DDR, LEARN_DDR, DATSZ_DDR, DUMMY_DDR, DUMMY_RWDS_DDR>
OPERATION_CODE: STOP
lookupTable_seq6_instr1:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq6_instr2:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq6_instr3:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq6_instr4:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq6_instr5:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq6_instr6:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq6_instr7:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
# -----------------------------------===== lookupTable_seq7_instr0 [Optional] =====-----------------------------------
# Description: Offset: 0x000000F0, Width: 16b; Lookup table holds Flash command sequences 7, instruction 0
lookupTable_seq7_instr0:
# ------------------------------------------===== OPERAND [Optional] =====------------------------------------------
# Description: Offset: 0b, Width: 8b, Instruction operand. Its values depends on used instruction
OPERAND: 0
# -----------------------------------------===== NUM_PADS [Optional] =====------------------------------------------
# Description: Offset: 8b, Width: 2b, Number of pads used by instruction. Some instructions ignores this parameter.
# - 1PAD, (0): Single mode. One pad is used.
# - 2PAD, (1): Dual mode. Two pads are used.
# - 4PAD, (2): Quad mode. Four pads are used.
# - 8PAD, (3): Octal mode. Eight pads are used.
# Possible options: <1PAD, 2PAD, 4PAD, 8PAD>
NUM_PADS: 1PAD
# --------------------------------------===== OPERATION_CODE [Optional] =====---------------------------------------
# Description: Offset: 10b, Width: 6b, Instruction operation code.
# - STOP, (0): Stop execution and de-assert CS. Then, the next command sequence (to the same flash device) starts
# from instruction pointer 0.
# - CMD_SDR, (1): Transmit command code to Flash.
# - RADDR_SDR, (2): Transmit row address to Flash.
# - CADDR_SDR, (3): Transmit column address to Flash.
# - MODE1_SDR, (4): Transmit mode bits to Flash.
# - MODE2_SDR, (5): Transmit mode bits to Flash.
# - MODE4_SDR, (6): Transmit mode bits to Flash.
# - MODE8_SDR, (7): Transmit mode bits to Flash.
# - WRITE_SDR, (8): Transmit program data to Flash device.
# - READ_SDR, (9): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_SDR, (10): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_SDR, (11): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_SDR, (12): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_SDR, (13): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# - JMP_ON_CS, (31): Stop execution, de-assert CS and save operand[7:0] as the instruction start pointer for next
# sequence.Normally this instruction is used to support Execute-In-Place enhanced mode. See XIP enhanced mode for
# more details.This instruction is only allowed for AHB read commands. There is interrupt status bit set
# (INTR[IPCMDERR] or INTR[AHBCMDERR]) when using this instruction in IP command or AHB write command.
# - CMD_DDR, (33): Transmit command code to Flash.
# - RADDR_DDR, (34): Transmit row address to Flash.
# - CADDR_DDR, (35): Transmit column address to Flash.
# - MODE1_DDR, (36): Transmit mode bits to Flash.
# - MODE2_DDR, (37): Transmit mode bits to Flash.
# - MODE4_DDR, (38): Transmit mode bits to Flash.
# - MODE8_DDR, (39): Transmit mode bits to Flash.
# - WRITE_DDR, (40): Transmit program data to Flash device.
# - READ_DDR, (41): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_DDR, (42): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_DDR, (43): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_DDR, (44): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_DDR, (45): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# Possible options: <STOP, CMD_SDR, RADDR_SDR, CADDR_SDR, MODE1_SDR, MODE2_SDR, MODE4_SDR, MODE8_SDR, WRITE_SDR,
# READ_SDR, LEARN_SDR, DATSZ_SDR, DUMMY_SDR, DUMMY_RWDS_SDR, JMP_ON_CS, CMD_DDR, RADDR_DDR, CADDR_DDR, MODE1_DDR,
# MODE2_DDR, MODE4_DDR, MODE8_DDR, WRITE_DDR, READ_DDR, LEARN_DDR, DATSZ_DDR, DUMMY_DDR, DUMMY_RWDS_DDR>
OPERATION_CODE: STOP
lookupTable_seq7_instr1:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq7_instr2:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq7_instr3:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq7_instr4:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq7_instr5:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq7_instr6:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq7_instr7:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
# -----------------------------------===== lookupTable_seq8_instr0 [Optional] =====-----------------------------------
# Description: Offset: 0x00000100, Width: 16b; Lookup table holds Flash command sequences 8, instruction 0
lookupTable_seq8_instr0:
# ------------------------------------------===== OPERAND [Optional] =====------------------------------------------
# Description: Offset: 0b, Width: 8b, Instruction operand. Its values depends on used instruction
OPERAND: 0
# -----------------------------------------===== NUM_PADS [Optional] =====------------------------------------------
# Description: Offset: 8b, Width: 2b, Number of pads used by instruction. Some instructions ignores this parameter.
# - 1PAD, (0): Single mode. One pad is used.
# - 2PAD, (1): Dual mode. Two pads are used.
# - 4PAD, (2): Quad mode. Four pads are used.
# - 8PAD, (3): Octal mode. Eight pads are used.
# Possible options: <1PAD, 2PAD, 4PAD, 8PAD>
NUM_PADS: 1PAD
# --------------------------------------===== OPERATION_CODE [Optional] =====---------------------------------------
# Description: Offset: 10b, Width: 6b, Instruction operation code.
# - STOP, (0): Stop execution and de-assert CS. Then, the next command sequence (to the same flash device) starts
# from instruction pointer 0.
# - CMD_SDR, (1): Transmit command code to Flash.
# - RADDR_SDR, (2): Transmit row address to Flash.
# - CADDR_SDR, (3): Transmit column address to Flash.
# - MODE1_SDR, (4): Transmit mode bits to Flash.
# - MODE2_SDR, (5): Transmit mode bits to Flash.
# - MODE4_SDR, (6): Transmit mode bits to Flash.
# - MODE8_SDR, (7): Transmit mode bits to Flash.
# - WRITE_SDR, (8): Transmit program data to Flash device.
# - READ_SDR, (9): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_SDR, (10): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_SDR, (11): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_SDR, (12): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_SDR, (13): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# - JMP_ON_CS, (31): Stop execution, de-assert CS and save operand[7:0] as the instruction start pointer for next
# sequence.Normally this instruction is used to support Execute-In-Place enhanced mode. See XIP enhanced mode for
# more details.This instruction is only allowed for AHB read commands. There is interrupt status bit set
# (INTR[IPCMDERR] or INTR[AHBCMDERR]) when using this instruction in IP command or AHB write command.
# - CMD_DDR, (33): Transmit command code to Flash.
# - RADDR_DDR, (34): Transmit row address to Flash.
# - CADDR_DDR, (35): Transmit column address to Flash.
# - MODE1_DDR, (36): Transmit mode bits to Flash.
# - MODE2_DDR, (37): Transmit mode bits to Flash.
# - MODE4_DDR, (38): Transmit mode bits to Flash.
# - MODE8_DDR, (39): Transmit mode bits to Flash.
# - WRITE_DDR, (40): Transmit program data to Flash device.
# - READ_DDR, (41): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_DDR, (42): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_DDR, (43): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_DDR, (44): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_DDR, (45): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# Possible options: <STOP, CMD_SDR, RADDR_SDR, CADDR_SDR, MODE1_SDR, MODE2_SDR, MODE4_SDR, MODE8_SDR, WRITE_SDR,
# READ_SDR, LEARN_SDR, DATSZ_SDR, DUMMY_SDR, DUMMY_RWDS_SDR, JMP_ON_CS, CMD_DDR, RADDR_DDR, CADDR_DDR, MODE1_DDR,
# MODE2_DDR, MODE4_DDR, MODE8_DDR, WRITE_DDR, READ_DDR, LEARN_DDR, DATSZ_DDR, DUMMY_DDR, DUMMY_RWDS_DDR>
OPERATION_CODE: STOP
lookupTable_seq8_instr1:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq8_instr2:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq8_instr3:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq8_instr4:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq8_instr5:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq8_instr6:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq8_instr7:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
# -----------------------------------===== lookupTable_seq9_instr0 [Optional] =====-----------------------------------
# Description: Offset: 0x00000110, Width: 16b; Lookup table holds Flash command sequences 9, instruction 0
lookupTable_seq9_instr0:
# ------------------------------------------===== OPERAND [Optional] =====------------------------------------------
# Description: Offset: 0b, Width: 8b, Instruction operand. Its values depends on used instruction
OPERAND: 0
# -----------------------------------------===== NUM_PADS [Optional] =====------------------------------------------
# Description: Offset: 8b, Width: 2b, Number of pads used by instruction. Some instructions ignores this parameter.
# - 1PAD, (0): Single mode. One pad is used.
# - 2PAD, (1): Dual mode. Two pads are used.
# - 4PAD, (2): Quad mode. Four pads are used.
# - 8PAD, (3): Octal mode. Eight pads are used.
# Possible options: <1PAD, 2PAD, 4PAD, 8PAD>
NUM_PADS: 1PAD
# --------------------------------------===== OPERATION_CODE [Optional] =====---------------------------------------
# Description: Offset: 10b, Width: 6b, Instruction operation code.
# - STOP, (0): Stop execution and de-assert CS. Then, the next command sequence (to the same flash device) starts
# from instruction pointer 0.
# - CMD_SDR, (1): Transmit command code to Flash.
# - RADDR_SDR, (2): Transmit row address to Flash.
# - CADDR_SDR, (3): Transmit column address to Flash.
# - MODE1_SDR, (4): Transmit mode bits to Flash.
# - MODE2_SDR, (5): Transmit mode bits to Flash.
# - MODE4_SDR, (6): Transmit mode bits to Flash.
# - MODE8_SDR, (7): Transmit mode bits to Flash.
# - WRITE_SDR, (8): Transmit program data to Flash device.
# - READ_SDR, (9): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_SDR, (10): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_SDR, (11): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_SDR, (12): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_SDR, (13): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# - JMP_ON_CS, (31): Stop execution, de-assert CS and save operand[7:0] as the instruction start pointer for next
# sequence.Normally this instruction is used to support Execute-In-Place enhanced mode. See XIP enhanced mode for
# more details.This instruction is only allowed for AHB read commands. There is interrupt status bit set
# (INTR[IPCMDERR] or INTR[AHBCMDERR]) when using this instruction in IP command or AHB write command.
# - CMD_DDR, (33): Transmit command code to Flash.
# - RADDR_DDR, (34): Transmit row address to Flash.
# - CADDR_DDR, (35): Transmit column address to Flash.
# - MODE1_DDR, (36): Transmit mode bits to Flash.
# - MODE2_DDR, (37): Transmit mode bits to Flash.
# - MODE4_DDR, (38): Transmit mode bits to Flash.
# - MODE8_DDR, (39): Transmit mode bits to Flash.
# - WRITE_DDR, (40): Transmit program data to Flash device.
# - READ_DDR, (41): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_DDR, (42): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_DDR, (43): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_DDR, (44): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_DDR, (45): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# Possible options: <STOP, CMD_SDR, RADDR_SDR, CADDR_SDR, MODE1_SDR, MODE2_SDR, MODE4_SDR, MODE8_SDR, WRITE_SDR,
# READ_SDR, LEARN_SDR, DATSZ_SDR, DUMMY_SDR, DUMMY_RWDS_SDR, JMP_ON_CS, CMD_DDR, RADDR_DDR, CADDR_DDR, MODE1_DDR,
# MODE2_DDR, MODE4_DDR, MODE8_DDR, WRITE_DDR, READ_DDR, LEARN_DDR, DATSZ_DDR, DUMMY_DDR, DUMMY_RWDS_DDR>
OPERATION_CODE: STOP
lookupTable_seq9_instr1:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq9_instr2:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq9_instr3:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq9_instr4:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq9_instr5:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq9_instr6:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq9_instr7:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
# ----------------------------------===== lookupTable_seq10_instr0 [Optional] =====-----------------------------------
# Description: Offset: 0x00000120, Width: 16b; Lookup table holds Flash command sequences 10, instruction 0
lookupTable_seq10_instr0:
# ------------------------------------------===== OPERAND [Optional] =====------------------------------------------
# Description: Offset: 0b, Width: 8b, Instruction operand. Its values depends on used instruction
OPERAND: 0
# -----------------------------------------===== NUM_PADS [Optional] =====------------------------------------------
# Description: Offset: 8b, Width: 2b, Number of pads used by instruction. Some instructions ignores this parameter.
# - 1PAD, (0): Single mode. One pad is used.
# - 2PAD, (1): Dual mode. Two pads are used.
# - 4PAD, (2): Quad mode. Four pads are used.
# - 8PAD, (3): Octal mode. Eight pads are used.
# Possible options: <1PAD, 2PAD, 4PAD, 8PAD>
NUM_PADS: 1PAD
# --------------------------------------===== OPERATION_CODE [Optional] =====---------------------------------------
# Description: Offset: 10b, Width: 6b, Instruction operation code.
# - STOP, (0): Stop execution and de-assert CS. Then, the next command sequence (to the same flash device) starts
# from instruction pointer 0.
# - CMD_SDR, (1): Transmit command code to Flash.
# - RADDR_SDR, (2): Transmit row address to Flash.
# - CADDR_SDR, (3): Transmit column address to Flash.
# - MODE1_SDR, (4): Transmit mode bits to Flash.
# - MODE2_SDR, (5): Transmit mode bits to Flash.
# - MODE4_SDR, (6): Transmit mode bits to Flash.
# - MODE8_SDR, (7): Transmit mode bits to Flash.
# - WRITE_SDR, (8): Transmit program data to Flash device.
# - READ_SDR, (9): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_SDR, (10): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_SDR, (11): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_SDR, (12): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_SDR, (13): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# - JMP_ON_CS, (31): Stop execution, de-assert CS and save operand[7:0] as the instruction start pointer for next
# sequence.Normally this instruction is used to support Execute-In-Place enhanced mode. See XIP enhanced mode for
# more details.This instruction is only allowed for AHB read commands. There is interrupt status bit set
# (INTR[IPCMDERR] or INTR[AHBCMDERR]) when using this instruction in IP command or AHB write command.
# - CMD_DDR, (33): Transmit command code to Flash.
# - RADDR_DDR, (34): Transmit row address to Flash.
# - CADDR_DDR, (35): Transmit column address to Flash.
# - MODE1_DDR, (36): Transmit mode bits to Flash.
# - MODE2_DDR, (37): Transmit mode bits to Flash.
# - MODE4_DDR, (38): Transmit mode bits to Flash.
# - MODE8_DDR, (39): Transmit mode bits to Flash.
# - WRITE_DDR, (40): Transmit program data to Flash device.
# - READ_DDR, (41): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_DDR, (42): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_DDR, (43): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_DDR, (44): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_DDR, (45): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# Possible options: <STOP, CMD_SDR, RADDR_SDR, CADDR_SDR, MODE1_SDR, MODE2_SDR, MODE4_SDR, MODE8_SDR, WRITE_SDR,
# READ_SDR, LEARN_SDR, DATSZ_SDR, DUMMY_SDR, DUMMY_RWDS_SDR, JMP_ON_CS, CMD_DDR, RADDR_DDR, CADDR_DDR, MODE1_DDR,
# MODE2_DDR, MODE4_DDR, MODE8_DDR, WRITE_DDR, READ_DDR, LEARN_DDR, DATSZ_DDR, DUMMY_DDR, DUMMY_RWDS_DDR>
OPERATION_CODE: STOP
lookupTable_seq10_instr1:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq10_instr2:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq10_instr3:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq10_instr4:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq10_instr5:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq10_instr6:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq10_instr7:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
# ----------------------------------===== lookupTable_seq11_instr0 [Optional] =====-----------------------------------
# Description: Offset: 0x00000130, Width: 16b; Lookup table holds Flash command sequences 11, instruction 0
lookupTable_seq11_instr0:
# ------------------------------------------===== OPERAND [Optional] =====------------------------------------------
# Description: Offset: 0b, Width: 8b, Instruction operand. Its values depends on used instruction
OPERAND: 0
# -----------------------------------------===== NUM_PADS [Optional] =====------------------------------------------
# Description: Offset: 8b, Width: 2b, Number of pads used by instruction. Some instructions ignores this parameter.
# - 1PAD, (0): Single mode. One pad is used.
# - 2PAD, (1): Dual mode. Two pads are used.
# - 4PAD, (2): Quad mode. Four pads are used.
# - 8PAD, (3): Octal mode. Eight pads are used.
# Possible options: <1PAD, 2PAD, 4PAD, 8PAD>
NUM_PADS: 1PAD
# --------------------------------------===== OPERATION_CODE [Optional] =====---------------------------------------
# Description: Offset: 10b, Width: 6b, Instruction operation code.
# - STOP, (0): Stop execution and de-assert CS. Then, the next command sequence (to the same flash device) starts
# from instruction pointer 0.
# - CMD_SDR, (1): Transmit command code to Flash.
# - RADDR_SDR, (2): Transmit row address to Flash.
# - CADDR_SDR, (3): Transmit column address to Flash.
# - MODE1_SDR, (4): Transmit mode bits to Flash.
# - MODE2_SDR, (5): Transmit mode bits to Flash.
# - MODE4_SDR, (6): Transmit mode bits to Flash.
# - MODE8_SDR, (7): Transmit mode bits to Flash.
# - WRITE_SDR, (8): Transmit program data to Flash device.
# - READ_SDR, (9): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_SDR, (10): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_SDR, (11): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_SDR, (12): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_SDR, (13): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# - JMP_ON_CS, (31): Stop execution, de-assert CS and save operand[7:0] as the instruction start pointer for next
# sequence.Normally this instruction is used to support Execute-In-Place enhanced mode. See XIP enhanced mode for
# more details.This instruction is only allowed for AHB read commands. There is interrupt status bit set
# (INTR[IPCMDERR] or INTR[AHBCMDERR]) when using this instruction in IP command or AHB write command.
# - CMD_DDR, (33): Transmit command code to Flash.
# - RADDR_DDR, (34): Transmit row address to Flash.
# - CADDR_DDR, (35): Transmit column address to Flash.
# - MODE1_DDR, (36): Transmit mode bits to Flash.
# - MODE2_DDR, (37): Transmit mode bits to Flash.
# - MODE4_DDR, (38): Transmit mode bits to Flash.
# - MODE8_DDR, (39): Transmit mode bits to Flash.
# - WRITE_DDR, (40): Transmit program data to Flash device.
# - READ_DDR, (41): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_DDR, (42): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_DDR, (43): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_DDR, (44): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_DDR, (45): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# Possible options: <STOP, CMD_SDR, RADDR_SDR, CADDR_SDR, MODE1_SDR, MODE2_SDR, MODE4_SDR, MODE8_SDR, WRITE_SDR,
# READ_SDR, LEARN_SDR, DATSZ_SDR, DUMMY_SDR, DUMMY_RWDS_SDR, JMP_ON_CS, CMD_DDR, RADDR_DDR, CADDR_DDR, MODE1_DDR,
# MODE2_DDR, MODE4_DDR, MODE8_DDR, WRITE_DDR, READ_DDR, LEARN_DDR, DATSZ_DDR, DUMMY_DDR, DUMMY_RWDS_DDR>
OPERATION_CODE: STOP
lookupTable_seq11_instr1:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq11_instr2:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq11_instr3:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq11_instr4:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq11_instr5:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq11_instr6:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq11_instr7:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
# ----------------------------------===== lookupTable_seq12_instr0 [Optional] =====-----------------------------------
# Description: Offset: 0x00000140, Width: 16b; Lookup table holds Flash command sequences 12, instruction 0
lookupTable_seq12_instr0:
# ------------------------------------------===== OPERAND [Optional] =====------------------------------------------
# Description: Offset: 0b, Width: 8b, Instruction operand. Its values depends on used instruction
OPERAND: 0
# -----------------------------------------===== NUM_PADS [Optional] =====------------------------------------------
# Description: Offset: 8b, Width: 2b, Number of pads used by instruction. Some instructions ignores this parameter.
# - 1PAD, (0): Single mode. One pad is used.
# - 2PAD, (1): Dual mode. Two pads are used.
# - 4PAD, (2): Quad mode. Four pads are used.
# - 8PAD, (3): Octal mode. Eight pads are used.
# Possible options: <1PAD, 2PAD, 4PAD, 8PAD>
NUM_PADS: 1PAD
# --------------------------------------===== OPERATION_CODE [Optional] =====---------------------------------------
# Description: Offset: 10b, Width: 6b, Instruction operation code.
# - STOP, (0): Stop execution and de-assert CS. Then, the next command sequence (to the same flash device) starts
# from instruction pointer 0.
# - CMD_SDR, (1): Transmit command code to Flash.
# - RADDR_SDR, (2): Transmit row address to Flash.
# - CADDR_SDR, (3): Transmit column address to Flash.
# - MODE1_SDR, (4): Transmit mode bits to Flash.
# - MODE2_SDR, (5): Transmit mode bits to Flash.
# - MODE4_SDR, (6): Transmit mode bits to Flash.
# - MODE8_SDR, (7): Transmit mode bits to Flash.
# - WRITE_SDR, (8): Transmit program data to Flash device.
# - READ_SDR, (9): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_SDR, (10): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_SDR, (11): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_SDR, (12): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_SDR, (13): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# - JMP_ON_CS, (31): Stop execution, de-assert CS and save operand[7:0] as the instruction start pointer for next
# sequence.Normally this instruction is used to support Execute-In-Place enhanced mode. See XIP enhanced mode for
# more details.This instruction is only allowed for AHB read commands. There is interrupt status bit set
# (INTR[IPCMDERR] or INTR[AHBCMDERR]) when using this instruction in IP command or AHB write command.
# - CMD_DDR, (33): Transmit command code to Flash.
# - RADDR_DDR, (34): Transmit row address to Flash.
# - CADDR_DDR, (35): Transmit column address to Flash.
# - MODE1_DDR, (36): Transmit mode bits to Flash.
# - MODE2_DDR, (37): Transmit mode bits to Flash.
# - MODE4_DDR, (38): Transmit mode bits to Flash.
# - MODE8_DDR, (39): Transmit mode bits to Flash.
# - WRITE_DDR, (40): Transmit program data to Flash device.
# - READ_DDR, (41): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_DDR, (42): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_DDR, (43): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_DDR, (44): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_DDR, (45): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# Possible options: <STOP, CMD_SDR, RADDR_SDR, CADDR_SDR, MODE1_SDR, MODE2_SDR, MODE4_SDR, MODE8_SDR, WRITE_SDR,
# READ_SDR, LEARN_SDR, DATSZ_SDR, DUMMY_SDR, DUMMY_RWDS_SDR, JMP_ON_CS, CMD_DDR, RADDR_DDR, CADDR_DDR, MODE1_DDR,
# MODE2_DDR, MODE4_DDR, MODE8_DDR, WRITE_DDR, READ_DDR, LEARN_DDR, DATSZ_DDR, DUMMY_DDR, DUMMY_RWDS_DDR>
OPERATION_CODE: STOP
lookupTable_seq12_instr1:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq12_instr2:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq12_instr3:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq12_instr4:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq12_instr5:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq12_instr6:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq12_instr7:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
# ----------------------------------===== lookupTable_seq13_instr0 [Optional] =====-----------------------------------
# Description: Offset: 0x00000150, Width: 16b; Lookup table holds Flash command sequences 13, instruction 0
lookupTable_seq13_instr0:
# ------------------------------------------===== OPERAND [Optional] =====------------------------------------------
# Description: Offset: 0b, Width: 8b, Instruction operand. Its values depends on used instruction
OPERAND: 0
# -----------------------------------------===== NUM_PADS [Optional] =====------------------------------------------
# Description: Offset: 8b, Width: 2b, Number of pads used by instruction. Some instructions ignores this parameter.
# - 1PAD, (0): Single mode. One pad is used.
# - 2PAD, (1): Dual mode. Two pads are used.
# - 4PAD, (2): Quad mode. Four pads are used.
# - 8PAD, (3): Octal mode. Eight pads are used.
# Possible options: <1PAD, 2PAD, 4PAD, 8PAD>
NUM_PADS: 1PAD
# --------------------------------------===== OPERATION_CODE [Optional] =====---------------------------------------
# Description: Offset: 10b, Width: 6b, Instruction operation code.
# - STOP, (0): Stop execution and de-assert CS. Then, the next command sequence (to the same flash device) starts
# from instruction pointer 0.
# - CMD_SDR, (1): Transmit command code to Flash.
# - RADDR_SDR, (2): Transmit row address to Flash.
# - CADDR_SDR, (3): Transmit column address to Flash.
# - MODE1_SDR, (4): Transmit mode bits to Flash.
# - MODE2_SDR, (5): Transmit mode bits to Flash.
# - MODE4_SDR, (6): Transmit mode bits to Flash.
# - MODE8_SDR, (7): Transmit mode bits to Flash.
# - WRITE_SDR, (8): Transmit program data to Flash device.
# - READ_SDR, (9): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_SDR, (10): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_SDR, (11): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_SDR, (12): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_SDR, (13): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# - JMP_ON_CS, (31): Stop execution, de-assert CS and save operand[7:0] as the instruction start pointer for next
# sequence.Normally this instruction is used to support Execute-In-Place enhanced mode. See XIP enhanced mode for
# more details.This instruction is only allowed for AHB read commands. There is interrupt status bit set
# (INTR[IPCMDERR] or INTR[AHBCMDERR]) when using this instruction in IP command or AHB write command.
# - CMD_DDR, (33): Transmit command code to Flash.
# - RADDR_DDR, (34): Transmit row address to Flash.
# - CADDR_DDR, (35): Transmit column address to Flash.
# - MODE1_DDR, (36): Transmit mode bits to Flash.
# - MODE2_DDR, (37): Transmit mode bits to Flash.
# - MODE4_DDR, (38): Transmit mode bits to Flash.
# - MODE8_DDR, (39): Transmit mode bits to Flash.
# - WRITE_DDR, (40): Transmit program data to Flash device.
# - READ_DDR, (41): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_DDR, (42): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_DDR, (43): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_DDR, (44): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_DDR, (45): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# Possible options: <STOP, CMD_SDR, RADDR_SDR, CADDR_SDR, MODE1_SDR, MODE2_SDR, MODE4_SDR, MODE8_SDR, WRITE_SDR,
# READ_SDR, LEARN_SDR, DATSZ_SDR, DUMMY_SDR, DUMMY_RWDS_SDR, JMP_ON_CS, CMD_DDR, RADDR_DDR, CADDR_DDR, MODE1_DDR,
# MODE2_DDR, MODE4_DDR, MODE8_DDR, WRITE_DDR, READ_DDR, LEARN_DDR, DATSZ_DDR, DUMMY_DDR, DUMMY_RWDS_DDR>
OPERATION_CODE: STOP
lookupTable_seq13_instr1:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq13_instr2:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq13_instr3:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq13_instr4:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq13_instr5:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq13_instr6:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq13_instr7:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
# ----------------------------------===== lookupTable_seq14_instr0 [Optional] =====-----------------------------------
# Description: Offset: 0x00000160, Width: 16b; Lookup table holds Flash command sequences 14, instruction 0
lookupTable_seq14_instr0:
# ------------------------------------------===== OPERAND [Optional] =====------------------------------------------
# Description: Offset: 0b, Width: 8b, Instruction operand. Its values depends on used instruction
OPERAND: 0
# -----------------------------------------===== NUM_PADS [Optional] =====------------------------------------------
# Description: Offset: 8b, Width: 2b, Number of pads used by instruction. Some instructions ignores this parameter.
# - 1PAD, (0): Single mode. One pad is used.
# - 2PAD, (1): Dual mode. Two pads are used.
# - 4PAD, (2): Quad mode. Four pads are used.
# - 8PAD, (3): Octal mode. Eight pads are used.
# Possible options: <1PAD, 2PAD, 4PAD, 8PAD>
NUM_PADS: 1PAD
# --------------------------------------===== OPERATION_CODE [Optional] =====---------------------------------------
# Description: Offset: 10b, Width: 6b, Instruction operation code.
# - STOP, (0): Stop execution and de-assert CS. Then, the next command sequence (to the same flash device) starts
# from instruction pointer 0.
# - CMD_SDR, (1): Transmit command code to Flash.
# - RADDR_SDR, (2): Transmit row address to Flash.
# - CADDR_SDR, (3): Transmit column address to Flash.
# - MODE1_SDR, (4): Transmit mode bits to Flash.
# - MODE2_SDR, (5): Transmit mode bits to Flash.
# - MODE4_SDR, (6): Transmit mode bits to Flash.
# - MODE8_SDR, (7): Transmit mode bits to Flash.
# - WRITE_SDR, (8): Transmit program data to Flash device.
# - READ_SDR, (9): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_SDR, (10): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_SDR, (11): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_SDR, (12): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_SDR, (13): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# - JMP_ON_CS, (31): Stop execution, de-assert CS and save operand[7:0] as the instruction start pointer for next
# sequence.Normally this instruction is used to support Execute-In-Place enhanced mode. See XIP enhanced mode for
# more details.This instruction is only allowed for AHB read commands. There is interrupt status bit set
# (INTR[IPCMDERR] or INTR[AHBCMDERR]) when using this instruction in IP command or AHB write command.
# - CMD_DDR, (33): Transmit command code to Flash.
# - RADDR_DDR, (34): Transmit row address to Flash.
# - CADDR_DDR, (35): Transmit column address to Flash.
# - MODE1_DDR, (36): Transmit mode bits to Flash.
# - MODE2_DDR, (37): Transmit mode bits to Flash.
# - MODE4_DDR, (38): Transmit mode bits to Flash.
# - MODE8_DDR, (39): Transmit mode bits to Flash.
# - WRITE_DDR, (40): Transmit program data to Flash device.
# - READ_DDR, (41): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_DDR, (42): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_DDR, (43): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_DDR, (44): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_DDR, (45): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# Possible options: <STOP, CMD_SDR, RADDR_SDR, CADDR_SDR, MODE1_SDR, MODE2_SDR, MODE4_SDR, MODE8_SDR, WRITE_SDR,
# READ_SDR, LEARN_SDR, DATSZ_SDR, DUMMY_SDR, DUMMY_RWDS_SDR, JMP_ON_CS, CMD_DDR, RADDR_DDR, CADDR_DDR, MODE1_DDR,
# MODE2_DDR, MODE4_DDR, MODE8_DDR, WRITE_DDR, READ_DDR, LEARN_DDR, DATSZ_DDR, DUMMY_DDR, DUMMY_RWDS_DDR>
OPERATION_CODE: STOP
lookupTable_seq14_instr1:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq14_instr2:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq14_instr3:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq14_instr4:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq14_instr5:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq14_instr6:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq14_instr7:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
# ----------------------------------===== lookupTable_seq15_instr0 [Optional] =====-----------------------------------
# Description: Offset: 0x00000170, Width: 16b; Lookup table holds Flash command sequences 15, instruction 0
lookupTable_seq15_instr0:
# ------------------------------------------===== OPERAND [Optional] =====------------------------------------------
# Description: Offset: 0b, Width: 8b, Instruction operand. Its values depends on used instruction
OPERAND: 0
# -----------------------------------------===== NUM_PADS [Optional] =====------------------------------------------
# Description: Offset: 8b, Width: 2b, Number of pads used by instruction. Some instructions ignores this parameter.
# - 1PAD, (0): Single mode. One pad is used.
# - 2PAD, (1): Dual mode. Two pads are used.
# - 4PAD, (2): Quad mode. Four pads are used.
# - 8PAD, (3): Octal mode. Eight pads are used.
# Possible options: <1PAD, 2PAD, 4PAD, 8PAD>
NUM_PADS: 1PAD
# --------------------------------------===== OPERATION_CODE [Optional] =====---------------------------------------
# Description: Offset: 10b, Width: 6b, Instruction operation code.
# - STOP, (0): Stop execution and de-assert CS. Then, the next command sequence (to the same flash device) starts
# from instruction pointer 0.
# - CMD_SDR, (1): Transmit command code to Flash.
# - RADDR_SDR, (2): Transmit row address to Flash.
# - CADDR_SDR, (3): Transmit column address to Flash.
# - MODE1_SDR, (4): Transmit mode bits to Flash.
# - MODE2_SDR, (5): Transmit mode bits to Flash.
# - MODE4_SDR, (6): Transmit mode bits to Flash.
# - MODE8_SDR, (7): Transmit mode bits to Flash.
# - WRITE_SDR, (8): Transmit program data to Flash device.
# - READ_SDR, (9): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_SDR, (10): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_SDR, (11): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_SDR, (12): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_SDR, (13): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# - JMP_ON_CS, (31): Stop execution, de-assert CS and save operand[7:0] as the instruction start pointer for next
# sequence.Normally this instruction is used to support Execute-In-Place enhanced mode. See XIP enhanced mode for
# more details.This instruction is only allowed for AHB read commands. There is interrupt status bit set
# (INTR[IPCMDERR] or INTR[AHBCMDERR]) when using this instruction in IP command or AHB write command.
# - CMD_DDR, (33): Transmit command code to Flash.
# - RADDR_DDR, (34): Transmit row address to Flash.
# - CADDR_DDR, (35): Transmit column address to Flash.
# - MODE1_DDR, (36): Transmit mode bits to Flash.
# - MODE2_DDR, (37): Transmit mode bits to Flash.
# - MODE4_DDR, (38): Transmit mode bits to Flash.
# - MODE8_DDR, (39): Transmit mode bits to Flash.
# - WRITE_DDR, (40): Transmit program data to Flash device.
# - READ_DDR, (41): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_DDR, (42): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_DDR, (43): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_DDR, (44): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_DDR, (45): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# Possible options: <STOP, CMD_SDR, RADDR_SDR, CADDR_SDR, MODE1_SDR, MODE2_SDR, MODE4_SDR, MODE8_SDR, WRITE_SDR,
# READ_SDR, LEARN_SDR, DATSZ_SDR, DUMMY_SDR, DUMMY_RWDS_SDR, JMP_ON_CS, CMD_DDR, RADDR_DDR, CADDR_DDR, MODE1_DDR,
# MODE2_DDR, MODE4_DDR, MODE8_DDR, WRITE_DDR, READ_DDR, LEARN_DDR, DATSZ_DDR, DUMMY_DDR, DUMMY_RWDS_DDR>
OPERATION_CODE: STOP
lookupTable_seq15_instr1:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq15_instr2:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq15_instr3:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq15_instr4:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq15_instr5:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq15_instr6:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq15_instr7:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
# ---------------------------------------===== lutCustomSeq_0 [Optional] =====----------------------------------------
# Description: Offset: 0x00000180, Width: 32b; [0x180-0x1af] Customizable LUT Sequences
lutCustomSeq_0:
# ------------------------------------------===== seqNum [Optional] =====-------------------------------------------
# Description: Offset: 0b, Width: 8b, Sequence Number, valid number: 1-16
seqNum: 0
# -------------------------------------------===== seqId [Optional] =====-------------------------------------------
# Description: Offset: 8b, Width: 8b, Sequence Index, valid number: 0-15
seqId: 0
# -----------------------------------------===== reserved [Optional] =====------------------------------------------
# Description: Offset: 16b, Width: 16b, N/A
reserved: 0
# ---------------------------------------===== lutCustomSeq_1 [Optional] =====----------------------------------------
# Description: Offset: 0x00000184, Width: 32b; [0x180-0x1af] Customizable LUT Sequences
lutCustomSeq_1:
# ------------------------------------------===== seqNum [Optional] =====-------------------------------------------
# Description: Offset: 0b, Width: 8b, Sequence Number, valid number: 1-16
seqNum: 0
# -------------------------------------------===== seqId [Optional] =====-------------------------------------------
# Description: Offset: 8b, Width: 8b, Sequence Index, valid number: 0-15
seqId: 0
# -----------------------------------------===== reserved [Optional] =====------------------------------------------
# Description: Offset: 16b, Width: 16b, N/A
reserved: 0
# ---------------------------------------===== lutCustomSeq_2 [Optional] =====----------------------------------------
# Description: Offset: 0x00000188, Width: 32b; [0x180-0x1af] Customizable LUT Sequences
lutCustomSeq_2:
# ------------------------------------------===== seqNum [Optional] =====-------------------------------------------
# Description: Offset: 0b, Width: 8b, Sequence Number, valid number: 1-16
seqNum: 0
# -------------------------------------------===== seqId [Optional] =====-------------------------------------------
# Description: Offset: 8b, Width: 8b, Sequence Index, valid number: 0-15
seqId: 0
# -----------------------------------------===== reserved [Optional] =====------------------------------------------
# Description: Offset: 16b, Width: 16b, N/A
reserved: 0
# ---------------------------------------===== lutCustomSeq_3 [Optional] =====----------------------------------------
# Description: Offset: 0x0000018C, Width: 32b; [0x180-0x1af] Customizable LUT Sequences
lutCustomSeq_3:
# ------------------------------------------===== seqNum [Optional] =====-------------------------------------------
# Description: Offset: 0b, Width: 8b, Sequence Number, valid number: 1-16
seqNum: 0
# -------------------------------------------===== seqId [Optional] =====-------------------------------------------
# Description: Offset: 8b, Width: 8b, Sequence Index, valid number: 0-15
seqId: 0
# -----------------------------------------===== reserved [Optional] =====------------------------------------------
# Description: Offset: 16b, Width: 16b, N/A
reserved: 0
# ---------------------------------------===== lutCustomSeq_4 [Optional] =====----------------------------------------
# Description: Offset: 0x00000190, Width: 32b; [0x180-0x1af] Customizable LUT Sequences
lutCustomSeq_4:
# ------------------------------------------===== seqNum [Optional] =====-------------------------------------------
# Description: Offset: 0b, Width: 8b, Sequence Number, valid number: 1-16
seqNum: 0
# -------------------------------------------===== seqId [Optional] =====-------------------------------------------
# Description: Offset: 8b, Width: 8b, Sequence Index, valid number: 0-15
seqId: 0
# -----------------------------------------===== reserved [Optional] =====------------------------------------------
# Description: Offset: 16b, Width: 16b, N/A
reserved: 0
# ---------------------------------------===== lutCustomSeq_5 [Optional] =====----------------------------------------
# Description: Offset: 0x00000194, Width: 32b; [0x180-0x1af] Customizable LUT Sequences
lutCustomSeq_5:
# ------------------------------------------===== seqNum [Optional] =====-------------------------------------------
# Description: Offset: 0b, Width: 8b, Sequence Number, valid number: 1-16
seqNum: 0
# -------------------------------------------===== seqId [Optional] =====-------------------------------------------
# Description: Offset: 8b, Width: 8b, Sequence Index, valid number: 0-15
seqId: 0
# -----------------------------------------===== reserved [Optional] =====------------------------------------------
# Description: Offset: 16b, Width: 16b, N/A
reserved: 0
# ---------------------------------------===== lutCustomSeq_6 [Optional] =====----------------------------------------
# Description: Offset: 0x00000198, Width: 32b; [0x180-0x1af] Customizable LUT Sequences
lutCustomSeq_6:
# ------------------------------------------===== seqNum [Optional] =====-------------------------------------------
# Description: Offset: 0b, Width: 8b, Sequence Number, valid number: 1-16
seqNum: 0
# -------------------------------------------===== seqId [Optional] =====-------------------------------------------
# Description: Offset: 8b, Width: 8b, Sequence Index, valid number: 0-15
seqId: 0
# -----------------------------------------===== reserved [Optional] =====------------------------------------------
# Description: Offset: 16b, Width: 16b, N/A
reserved: 0
# ---------------------------------------===== lutCustomSeq_7 [Optional] =====----------------------------------------
# Description: Offset: 0x0000019C, Width: 32b; [0x180-0x1af] Customizable LUT Sequences
lutCustomSeq_7:
# ------------------------------------------===== seqNum [Optional] =====-------------------------------------------
# Description: Offset: 0b, Width: 8b, Sequence Number, valid number: 1-16
seqNum: 0
# -------------------------------------------===== seqId [Optional] =====-------------------------------------------
# Description: Offset: 8b, Width: 8b, Sequence Index, valid number: 0-15
seqId: 0
# -----------------------------------------===== reserved [Optional] =====------------------------------------------
# Description: Offset: 16b, Width: 16b, N/A
reserved: 0
# ---------------------------------------===== lutCustomSeq_8 [Optional] =====----------------------------------------
# Description: Offset: 0x000001A0, Width: 32b; [0x180-0x1af] Customizable LUT Sequences
lutCustomSeq_8:
# ------------------------------------------===== seqNum [Optional] =====-------------------------------------------
# Description: Offset: 0b, Width: 8b, Sequence Number, valid number: 1-16
seqNum: 0
# -------------------------------------------===== seqId [Optional] =====-------------------------------------------
# Description: Offset: 8b, Width: 8b, Sequence Index, valid number: 0-15
seqId: 0
# -----------------------------------------===== reserved [Optional] =====------------------------------------------
# Description: Offset: 16b, Width: 16b, N/A
reserved: 0
# ---------------------------------------===== lutCustomSeq_9 [Optional] =====----------------------------------------
# Description: Offset: 0x000001A4, Width: 32b; [0x180-0x1af] Customizable LUT Sequences
lutCustomSeq_9:
# ------------------------------------------===== seqNum [Optional] =====-------------------------------------------
# Description: Offset: 0b, Width: 8b, Sequence Number, valid number: 1-16
seqNum: 0
# -------------------------------------------===== seqId [Optional] =====-------------------------------------------
# Description: Offset: 8b, Width: 8b, Sequence Index, valid number: 0-15
seqId: 0
# -----------------------------------------===== reserved [Optional] =====------------------------------------------
# Description: Offset: 16b, Width: 16b, N/A
reserved: 0
# ---------------------------------------===== lutCustomSeq_10 [Optional] =====---------------------------------------
# Description: Offset: 0x000001A8, Width: 32b; [0x180-0x1af] Customizable LUT Sequences
lutCustomSeq_10:
# ------------------------------------------===== seqNum [Optional] =====-------------------------------------------
# Description: Offset: 0b, Width: 8b, Sequence Number, valid number: 1-16
seqNum: 0
# -------------------------------------------===== seqId [Optional] =====-------------------------------------------
# Description: Offset: 8b, Width: 8b, Sequence Index, valid number: 0-15
seqId: 0
# -----------------------------------------===== reserved [Optional] =====------------------------------------------
# Description: Offset: 16b, Width: 16b, N/A
reserved: 0
# ---------------------------------------===== lutCustomSeq_11 [Optional] =====---------------------------------------
# Description: Offset: 0x000001AC, Width: 32b; [0x180-0x1af] Customizable LUT Sequences
lutCustomSeq_11:
# ------------------------------------------===== seqNum [Optional] =====-------------------------------------------
# Description: Offset: 0b, Width: 8b, Sequence Number, valid number: 1-16
seqNum: 0
# -------------------------------------------===== seqId [Optional] =====-------------------------------------------
# Description: Offset: 8b, Width: 8b, Sequence Index, valid number: 0-15
seqId: 0
# -----------------------------------------===== reserved [Optional] =====------------------------------------------
# Description: Offset: 16b, Width: 16b, N/A
reserved: 0
# -----------------------------------------===== reserved4_0 [Optional] =====-----------------------------------------
# Description: Offset: 0x000001B0, Width: 32b; [0x1b0-0x1bf] Reserved for future use
reserved4_0: '0x00000000'
# -----------------------------------------===== reserved4_1 [Optional] =====-----------------------------------------
# Description: Offset: 0x000001B4, Width: 32b; [0x1b0-0x1bf] Reserved for future use
reserved4_1: '0x00000000'
# -----------------------------------------===== reserved4_2 [Optional] =====-----------------------------------------
# Description: Offset: 0x000001B8, Width: 32b; [0x1b0-0x1bf] Reserved for future use
reserved4_2: '0x00000000'
# -----------------------------------------===== reserved4_3 [Optional] =====-----------------------------------------
# Description: Offset: 0x000001BC, Width: 32b; [0x1b0-0x1bf] Reserved for future use
reserved4_3: '0x00000000'
# ------------------------------------------===== pageSize [Optional] =====-------------------------------------------
# Description: Offset: 0x000001C0, Width: 32b; Page size of Serial NOR
pageSize: '0x00000000'
# -----------------------------------------===== sectorSize [Optional] =====------------------------------------------
# Description: Offset: 0x000001C4, Width: 32b; Sector size of Serial NOR
sectorSize: '0x00000000'
# -------------------------------------===== ipcmdSerialClkFreq [Optional] =====--------------------------------------
# Description: Offset: 0x000001C8, Width: 8b; Clock frequency for IP command
ipcmdSerialClkFreq: '0x00'
# -------------------------------------===== isUniformBlockSize [Optional] =====--------------------------------------
# Description: Offset: 0x000001C9, Width: 8b; Sector/Block size is the same
isUniformBlockSize: '0x00'
# -----------------------------------------===== reserved0_0 [Optional] =====-----------------------------------------
# Description: Offset: 0x000001CA, Width: 8b; Reserved for future use
reserved0_0: '0x00'
# -----------------------------------------===== reserved0_1 [Optional] =====-----------------------------------------
# Description: Offset: 0x000001CB, Width: 8b; Reserved for future use
reserved0_1: '0x00'
# ----------------------------------------===== serialNorType [Optional] =====----------------------------------------
# Description: Offset: 0x000001CC, Width: 8b; Serial NOR Flash type: 0/1/2/3
serialNorType: '0x00'
# --------------------------------------===== needExitNoCmdMode [Optional] =====--------------------------------------
# Description: Offset: 0x000001CD, Width: 8b; Need to exit NoCmd mode before other IP command
needExitNoCmdMode: '0x00'
# ------------------------------------===== halfClkForNonReadCmd [Optional] =====-------------------------------------
# Description: Offset: 0x000001CE, Width: 8b; Half the Serial Clock for non-read command: true/false
halfClkForNonReadCmd: '0x00'
# ------------------------------------===== needRestoreNoCmdMode [Optional] =====-------------------------------------
# Description: Offset: 0x000001CF, Width: 8b; Need to Restore NoCmd mode after IP command execution
needRestoreNoCmdMode: '0x00'
# ------------------------------------------===== blockSize [Optional] =====------------------------------------------
# Description: Offset: 0x000001D0, Width: 32b; Block size
blockSize: '0x00000000'
# -----------------------------------------===== reserve2_0 [Optional] =====------------------------------------------
# Description: Offset: 0x000001D4, Width: 32b; Reserved for future use
reserve2_0: '0x00000000'
# -----------------------------------------===== reserve2_1 [Optional] =====------------------------------------------
# Description: Offset: 0x000001D8, Width: 32b; Reserved for future use
reserve2_1: '0x00000000'
# -----------------------------------------===== reserve2_2 [Optional] =====------------------------------------------
# Description: Offset: 0x000001DC, Width: 32b; Reserved for future use
reserve2_2: '0x00000000'
# -----------------------------------------===== reserve2_3 [Optional] =====------------------------------------------
# Description: Offset: 0x000001E0, Width: 32b; Reserved for future use
reserve2_3: '0x00000000'
# -----------------------------------------===== reserve2_4 [Optional] =====------------------------------------------
# Description: Offset: 0x000001E4, Width: 32b; Reserved for future use
reserve2_4: '0x00000000'
# -----------------------------------------===== reserve2_5 [Optional] =====------------------------------------------
# Description: Offset: 0x000001E8, Width: 32b; Reserved for future use
reserve2_5: '0x00000000'
# -----------------------------------------===== reserve2_6 [Optional] =====------------------------------------------
# Description: Offset: 0x000001EC, Width: 32b; Reserved for future use
reserve2_6: '0x00000000'
# -----------------------------------------===== reserve2_7 [Optional] =====------------------------------------------
# Description: Offset: 0x000001F0, Width: 32b; Reserved for future use
reserve2_7: '0x00000000'
# -----------------------------------------===== reserve2_8 [Optional] =====------------------------------------------
# Description: Offset: 0x000001F4, Width: 32b; Reserved for future use
reserve2_8: '0x00000000'
# -----------------------------------------===== reserve2_9 [Optional] =====------------------------------------------
# Description: Offset: 0x000001F8, Width: 32b; Reserved for future use
reserve2_9: '0x00000000'
# -----------------------------------------===== reserve2_10 [Optional] =====-----------------------------------------
# Description: Offset: 0x000001FC, Width: 32b; Reserved for future use
reserve2_10: '0x00000000'
FCB for mimxrt1040, Revision: a0 and flexspi_nor#
FCB for mimxrt1040, Revision: a0 and flexspi_nor JSON schema
FCB for mimxrt1040, Revision: a0 and flexspi_nor YAML configuration template
# ================================= FCB for mimxrt1040, Revision: a0 and flexspi_nor =================================
# ======================================================================================================================
# == FCB for mimxrt1040, Revision: a0 and flexspi_nor ==
# ======================================================================================================================
# -------------------------------------===== The chip family name [Required] =====--------------------------------------
# Description: NXP chip family identifier.
family: CHOOSE_FROM_TABLE
# -----------------------------------------===== MCU revision [Optional] =====------------------------------------------
# Description: Revision of silicon. The 'latest' name, means most current revision.
# Possible options: <a0, latest>
revision: a0
# ------------------------------------------===== Memory type [Required] =====------------------------------------------
# Description: Specify type of memory used by FCB description.
# Possible options: <flexspi_nor>
type: flexspi_nor
# ------------------------------------------===== mimxrt1040 [Required] =====-------------------------------------------
fcb_settings:
# ---------------------------------------------===== tag [Optional] =====---------------------------------------------
# Description: Offset: 0x00000000, Width: 32b; [0x000-0x003] Tag, fixed value 0x42464346UL
tag: '0x42464346'
# -------------------------------------------===== version [Optional] =====-------------------------------------------
# Description: Offset: 0x00000004, Width: 32b; [0x004-0x007] Version,[31:24] -'V', [23:16] - Major, [15:8] - Minor,
# [7:0] - bugfix
version: '0x56010400'
# ------------------------------------------===== reserved0 [Optional] =====------------------------------------------
# Description: Offset: 0x00000008, Width: 32b; [0x008-0x00b] Reserved for future use
reserved0: '0x00000000'
# --------------------------------------===== readSampleClkSrc [Optional] =====---------------------------------------
# Description: Offset: 0x0000000C, Width: 8b; [0x00c-0x00c] Read Sample Clock Source, valid value: 0/1/3
readSampleClkSrc: '0x00'
# -----------------------------------------===== csHoldTime [Optional] =====------------------------------------------
# Description: Offset: 0x0000000D, Width: 8b; [0x00d-0x00d] CS hold time, default value: 3
csHoldTime: '0x00'
# -----------------------------------------===== csSetupTime [Optional] =====-----------------------------------------
# Description: Offset: 0x0000000E, Width: 8b; [0x00e-0x00e] CS setup time, default value: 3
csSetupTime: '0x00'
# -------------------------------------===== columnAddressWidth [Optional] =====--------------------------------------
# Description: Offset: 0x0000000F, Width: 8b; [0x00f-0x00f] Column Address with, for HyperBus protocol, it is fixed
# to 3, For Serial NAND, need to refer to datasheet
columnAddressWidth: '0x00'
# -------------------------------------===== deviceModeCfgEnable [Optional] =====-------------------------------------
# Description: Offset: 0x00000010, Width: 8b; [0x010-0x010] Device Mode Configure enable flag, 1 - Enable, 0 -
# Disable
deviceModeCfgEnable: '0x00'
# ---------------------------------------===== deviceModeType [Optional] =====----------------------------------------
# Description: Offset: 0x00000011, Width: 8b; [0x011-0x011] Specify the configuration command type:Quad Enable,
# DPI/QPI/OPI switch, Generic configuration, etc.
deviceModeType: '0x00'
# -------------------------------------===== waitTimeCfgCommands [Optional] =====-------------------------------------
# Description: Offset: 0x00000012, Width: 16b; [0x012-0x013] Wait time for all configuration commands, unit: 100us,
# Used for DPI/QPI/OPI switch or reset command
waitTimeCfgCommands: '0x0000'
# ----------------------------------------===== deviceModeSeq [Optional] =====----------------------------------------
# Description: Offset: 0x00000014, Width: 32b; [0x014-0x017] Device mode sequence info, [7:0] - LUT sequence id,
# [15:8] - LUt sequence number, [31:16] Reserved
deviceModeSeq:
# ------------------------------------------===== seqNum [Optional] =====-------------------------------------------
# Description: Offset: 0b, Width: 8b, Sequence Number, valid number: 1-16
seqNum: 0
# -------------------------------------------===== seqId [Optional] =====-------------------------------------------
# Description: Offset: 8b, Width: 8b, Sequence Index, valid number: 0-15
seqId: 0
# -----------------------------------------===== reserved [Optional] =====------------------------------------------
# Description: Offset: 16b, Width: 16b, N/A
reserved: 0
# ----------------------------------------===== deviceModeArg [Optional] =====----------------------------------------
# Description: Offset: 0x00000018, Width: 32b; [0x018-0x01b] Argument/Parameter for device configuration
deviceModeArg: '0x00000000'
# ---------------------------------------===== configCmdEnable [Optional] =====---------------------------------------
# Description: Offset: 0x0000001C, Width: 8b; [0x01c-0x01c] Configure command Enable Flag, 1 - Enable, 0 - Disable
configCmdEnable: '0x00'
# --------------------------------------===== configModeType_0 [Optional] =====---------------------------------------
# Description: Offset: 0x0000001D, Width: 8b; [0x01d-0x01f] Configure Mode Type, similar as deviceModeTpe
configModeType_0: '0x00'
# --------------------------------------===== configModeType_1 [Optional] =====---------------------------------------
# Description: Offset: 0x0000001E, Width: 8b; [0x01d-0x01f] Configure Mode Type, similar as deviceModeTpe
configModeType_1: '0x00'
# --------------------------------------===== configModeType_2 [Optional] =====---------------------------------------
# Description: Offset: 0x0000001F, Width: 8b; [0x01d-0x01f] Configure Mode Type, similar as deviceModeTpe
configModeType_2: '0x00'
# ---------------------------------------===== configCmdSeqs_0 [Optional] =====---------------------------------------
# Description: Offset: 0x00000020, Width: 32b; [0x020-0x02b] Sequence info for Device Configuration command, similar
# as deviceModeSeq
configCmdSeqs_0:
# ------------------------------------------===== seqNum [Optional] =====-------------------------------------------
# Description: Offset: 0b, Width: 8b, Sequence Number, valid number: 1-16
seqNum: 0
# -------------------------------------------===== seqId [Optional] =====-------------------------------------------
# Description: Offset: 8b, Width: 8b, Sequence Index, valid number: 0-15
seqId: 0
# -----------------------------------------===== reserved [Optional] =====------------------------------------------
# Description: Offset: 16b, Width: 16b, N/A
reserved: 0
# ---------------------------------------===== configCmdSeqs_1 [Optional] =====---------------------------------------
# Description: Offset: 0x00000024, Width: 32b; [0x020-0x02b] Sequence info for Device Configuration command, similar
# as deviceModeSeq
configCmdSeqs_1:
# ------------------------------------------===== seqNum [Optional] =====-------------------------------------------
# Description: Offset: 0b, Width: 8b, Sequence Number, valid number: 1-16
seqNum: 0
# -------------------------------------------===== seqId [Optional] =====-------------------------------------------
# Description: Offset: 8b, Width: 8b, Sequence Index, valid number: 0-15
seqId: 0
# -----------------------------------------===== reserved [Optional] =====------------------------------------------
# Description: Offset: 16b, Width: 16b, N/A
reserved: 0
# ---------------------------------------===== configCmdSeqs_2 [Optional] =====---------------------------------------
# Description: Offset: 0x00000028, Width: 32b; [0x020-0x02b] Sequence info for Device Configuration command, similar
# as deviceModeSeq
configCmdSeqs_2:
# ------------------------------------------===== seqNum [Optional] =====-------------------------------------------
# Description: Offset: 0b, Width: 8b, Sequence Number, valid number: 1-16
seqNum: 0
# -------------------------------------------===== seqId [Optional] =====-------------------------------------------
# Description: Offset: 8b, Width: 8b, Sequence Index, valid number: 0-15
seqId: 0
# -----------------------------------------===== reserved [Optional] =====------------------------------------------
# Description: Offset: 16b, Width: 16b, N/A
reserved: 0
# ------------------------------------------===== reserved1 [Optional] =====------------------------------------------
# Description: Offset: 0x0000002C, Width: 32b; [0x02c-0x02f] Reserved for future use
reserved1: '0x00000000'
# ---------------------------------------===== configCmdArgs_0 [Optional] =====---------------------------------------
# Description: Offset: 0x00000030, Width: 32b; [0x030-0x03b] Arguments/Parameters for device Configuration commands
configCmdArgs_0: '0x00000000'
# ---------------------------------------===== configCmdArgs_1 [Optional] =====---------------------------------------
# Description: Offset: 0x00000034, Width: 32b; [0x030-0x03b] Arguments/Parameters for device Configuration commands
configCmdArgs_1: '0x00000000'
# ---------------------------------------===== configCmdArgs_2 [Optional] =====---------------------------------------
# Description: Offset: 0x00000038, Width: 32b; [0x030-0x03b] Arguments/Parameters for device Configuration commands
configCmdArgs_2: '0x00000000'
# ------------------------------------------===== reserved2 [Optional] =====------------------------------------------
# Description: Offset: 0x0000003C, Width: 32b; [0x03c-0x03f] Reserved for future use
reserved2: '0x00000000'
# ------------------------------------===== controllerMiscOption [Optional] =====-------------------------------------
# Description: Offset: 0x00000040, Width: 32b; [0x040-0x043] Controller Misc Options, see Misc feature bit
# definitions for more details
controllerMiscOption: '0x00000000'
# -----------------------------------------===== deviceType [Optional] =====------------------------------------------
# Description: Offset: 0x00000044, Width: 8b; [0x044-0x044] Device Type: See Flash Type Definition for more details
deviceType: '0x00'
# ----------------------------------------===== sflashPadType [Optional] =====----------------------------------------
# Description: Offset: 0x00000045, Width: 8b; [0x045-0x045] Serial Flash Pad Type: 1 - Single, 2 - Dual, 4 - Quad, 8
# - Octal
sflashPadType: '0x00'
# ----------------------------------------===== serialClkFreq [Optional] =====----------------------------------------
# Description: Offset: 0x00000046, Width: 8b; [0x046-0x046] Serial Flash Frequency, device specific definitions, See
# System Boot Chapter for more details
serialClkFreq: '0x00'
# -------------------------------------===== lutCustomSeqEnable [Optional] =====--------------------------------------
# Description: Offset: 0x00000047, Width: 8b; [0x047-0x047] LUT customization Enable, it is required if the
# program/erase cannot be done using 1 LUT sequence, currently, only applicable to HyperFLASH
lutCustomSeqEnable: '0x00'
# -----------------------------------------===== reserved3_0 [Optional] =====-----------------------------------------
# Description: Offset: 0x00000048, Width: 32b; [0x048-0x04f] Reserved for future use
reserved3_0: '0x00000000'
# -----------------------------------------===== reserved3_1 [Optional] =====-----------------------------------------
# Description: Offset: 0x0000004C, Width: 32b; [0x048-0x04f] Reserved for future use
reserved3_1: '0x00000000'
# ----------------------------------------===== sflashA1Size [Optional] =====-----------------------------------------
# Description: Offset: 0x00000050, Width: 32b; [0x050-0x053] Size of Flash connected to A1
sflashA1Size: '0x00000000'
# ----------------------------------------===== sflashA2Size [Optional] =====-----------------------------------------
# Description: Offset: 0x00000054, Width: 32b; [0x054-0x057] Size of Flash connected to A2
sflashA2Size: '0x00000000'
# ----------------------------------------===== sflashB1Size [Optional] =====-----------------------------------------
# Description: Offset: 0x00000058, Width: 32b; [0x058-0x05b] Size of Flash connected to B1
sflashB1Size: '0x00000000'
# ----------------------------------------===== sflashB2Size [Optional] =====-----------------------------------------
# Description: Offset: 0x0000005C, Width: 32b; [0x05c-0x05f] Size of Flash connected to B2
sflashB2Size: '0x00000000'
# ------------------------------------===== csPadSettingOverride [Optional] =====-------------------------------------
# Description: Offset: 0x00000060, Width: 32b; [0x060-0x063] CS pad setting override value
csPadSettingOverride: '0x00000000'
# -----------------------------------===== sclkPadSettingOverride [Optional] =====------------------------------------
# Description: Offset: 0x00000064, Width: 32b; [0x064-0x067] SCK pad setting override value
sclkPadSettingOverride: '0x00000000'
# -----------------------------------===== dataPadSettingOverride [Optional] =====------------------------------------
# Description: Offset: 0x00000068, Width: 32b; [0x068-0x06b] data pad setting override value
dataPadSettingOverride: '0x00000000'
# ------------------------------------===== dqsPadSettingOverride [Optional] =====------------------------------------
# Description: Offset: 0x0000006C, Width: 32b; [0x06c-0x06f] DQS pad setting override value
dqsPadSettingOverride: '0x00000000'
# -----------------------------------------===== timeoutInMs [Optional] =====-----------------------------------------
# Description: Offset: 0x00000070, Width: 32b; [0x070-0x073] Timeout threshold for read status command
timeoutInMs: '0x00000000'
# ---------------------------------------===== commandInterval [Optional] =====---------------------------------------
# Description: Offset: 0x00000074, Width: 32b; [0x074-0x077] CS deselect interval between two commands
commandInterval: '0x00000000'
# ---------------------------------------===== dataValidTime_0 [Optional] =====---------------------------------------
# Description: Offset: 0x00000078, Width: 16b; [0x078-0x07b] CLK edge to data valid time for PORT A and PORT B, in
# terms of 0.1ns
dataValidTime_0: '0x0000'
# ---------------------------------------===== dataValidTime_1 [Optional] =====---------------------------------------
# Description: Offset: 0x0000007A, Width: 16b; [0x078-0x07b] CLK edge to data valid time for PORT A and PORT B, in
# terms of 0.1ns
dataValidTime_1: '0x0000'
# -----------------------------------------===== busyOffset [Optional] =====------------------------------------------
# Description: Offset: 0x0000007C, Width: 16b; [0x07c-0x07d] Busy offset, valid value: 0-31
busyOffset: '0x0000'
# ---------------------------------------===== busyBitPolarity [Optional] =====---------------------------------------
# Description: Offset: 0x0000007E, Width: 16b; [0x07e-0x07f] Busy flag polarity, 0 - busy flag is 1 when flash device
# is busy, 1 - busy flag is 0 when flash device is busy
busyBitPolarity: '0x0000'
# -----------------------------------===== lookupTable_seq0_instr0 [Optional] =====-----------------------------------
# Description: Offset: 0x00000080, Width: 16b; Lookup table holds Flash command sequences 0, instruction 0
lookupTable_seq0_instr0:
# ------------------------------------------===== OPERAND [Optional] =====------------------------------------------
# Description: Offset: 0b, Width: 8b, Instruction operand. Its values depends on used instruction
OPERAND: 0
# -----------------------------------------===== NUM_PADS [Optional] =====------------------------------------------
# Description: Offset: 8b, Width: 2b, Number of pads used by instruction. Some instructions ignores this parameter.
# - 1PAD, (0): Single mode. One pad is used.
# - 2PAD, (1): Dual mode. Two pads are used.
# - 4PAD, (2): Quad mode. Four pads are used.
# - 8PAD, (3): Octal mode. Eight pads are used.
# Possible options: <1PAD, 2PAD, 4PAD, 8PAD>
NUM_PADS: 1PAD
# --------------------------------------===== OPERATION_CODE [Optional] =====---------------------------------------
# Description: Offset: 10b, Width: 6b, Instruction operation code.
# - STOP, (0): Stop execution and de-assert CS. Then, the next command sequence (to the same flash device) starts
# from instruction pointer 0.
# - CMD_SDR, (1): Transmit command code to Flash.
# - RADDR_SDR, (2): Transmit row address to Flash.
# - CADDR_SDR, (3): Transmit column address to Flash.
# - MODE1_SDR, (4): Transmit mode bits to Flash.
# - MODE2_SDR, (5): Transmit mode bits to Flash.
# - MODE4_SDR, (6): Transmit mode bits to Flash.
# - MODE8_SDR, (7): Transmit mode bits to Flash.
# - WRITE_SDR, (8): Transmit program data to Flash device.
# - READ_SDR, (9): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_SDR, (10): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_SDR, (11): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_SDR, (12): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_SDR, (13): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# - JMP_ON_CS, (31): Stop execution, de-assert CS and save operand[7:0] as the instruction start pointer for next
# sequence.Normally this instruction is used to support Execute-In-Place enhanced mode. See XIP enhanced mode for
# more details.This instruction is only allowed for AHB read commands. There is interrupt status bit set
# (INTR[IPCMDERR] or INTR[AHBCMDERR]) when using this instruction in IP command or AHB write command.
# - CMD_DDR, (33): Transmit command code to Flash.
# - RADDR_DDR, (34): Transmit row address to Flash.
# - CADDR_DDR, (35): Transmit column address to Flash.
# - MODE1_DDR, (36): Transmit mode bits to Flash.
# - MODE2_DDR, (37): Transmit mode bits to Flash.
# - MODE4_DDR, (38): Transmit mode bits to Flash.
# - MODE8_DDR, (39): Transmit mode bits to Flash.
# - WRITE_DDR, (40): Transmit program data to Flash device.
# - READ_DDR, (41): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_DDR, (42): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_DDR, (43): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_DDR, (44): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_DDR, (45): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# Possible options: <STOP, CMD_SDR, RADDR_SDR, CADDR_SDR, MODE1_SDR, MODE2_SDR, MODE4_SDR, MODE8_SDR, WRITE_SDR,
# READ_SDR, LEARN_SDR, DATSZ_SDR, DUMMY_SDR, DUMMY_RWDS_SDR, JMP_ON_CS, CMD_DDR, RADDR_DDR, CADDR_DDR, MODE1_DDR,
# MODE2_DDR, MODE4_DDR, MODE8_DDR, WRITE_DDR, READ_DDR, LEARN_DDR, DATSZ_DDR, DUMMY_DDR, DUMMY_RWDS_DDR>
OPERATION_CODE: STOP
lookupTable_seq0_instr1:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq0_instr2:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq0_instr3:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq0_instr4:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq0_instr5:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq0_instr6:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq0_instr7:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
# -----------------------------------===== lookupTable_seq1_instr0 [Optional] =====-----------------------------------
# Description: Offset: 0x00000090, Width: 16b; Lookup table holds Flash command sequences 1, instruction 0
lookupTable_seq1_instr0:
# ------------------------------------------===== OPERAND [Optional] =====------------------------------------------
# Description: Offset: 0b, Width: 8b, Instruction operand. Its values depends on used instruction
OPERAND: 0
# -----------------------------------------===== NUM_PADS [Optional] =====------------------------------------------
# Description: Offset: 8b, Width: 2b, Number of pads used by instruction. Some instructions ignores this parameter.
# - 1PAD, (0): Single mode. One pad is used.
# - 2PAD, (1): Dual mode. Two pads are used.
# - 4PAD, (2): Quad mode. Four pads are used.
# - 8PAD, (3): Octal mode. Eight pads are used.
# Possible options: <1PAD, 2PAD, 4PAD, 8PAD>
NUM_PADS: 1PAD
# --------------------------------------===== OPERATION_CODE [Optional] =====---------------------------------------
# Description: Offset: 10b, Width: 6b, Instruction operation code.
# - STOP, (0): Stop execution and de-assert CS. Then, the next command sequence (to the same flash device) starts
# from instruction pointer 0.
# - CMD_SDR, (1): Transmit command code to Flash.
# - RADDR_SDR, (2): Transmit row address to Flash.
# - CADDR_SDR, (3): Transmit column address to Flash.
# - MODE1_SDR, (4): Transmit mode bits to Flash.
# - MODE2_SDR, (5): Transmit mode bits to Flash.
# - MODE4_SDR, (6): Transmit mode bits to Flash.
# - MODE8_SDR, (7): Transmit mode bits to Flash.
# - WRITE_SDR, (8): Transmit program data to Flash device.
# - READ_SDR, (9): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_SDR, (10): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_SDR, (11): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_SDR, (12): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_SDR, (13): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# - JMP_ON_CS, (31): Stop execution, de-assert CS and save operand[7:0] as the instruction start pointer for next
# sequence.Normally this instruction is used to support Execute-In-Place enhanced mode. See XIP enhanced mode for
# more details.This instruction is only allowed for AHB read commands. There is interrupt status bit set
# (INTR[IPCMDERR] or INTR[AHBCMDERR]) when using this instruction in IP command or AHB write command.
# - CMD_DDR, (33): Transmit command code to Flash.
# - RADDR_DDR, (34): Transmit row address to Flash.
# - CADDR_DDR, (35): Transmit column address to Flash.
# - MODE1_DDR, (36): Transmit mode bits to Flash.
# - MODE2_DDR, (37): Transmit mode bits to Flash.
# - MODE4_DDR, (38): Transmit mode bits to Flash.
# - MODE8_DDR, (39): Transmit mode bits to Flash.
# - WRITE_DDR, (40): Transmit program data to Flash device.
# - READ_DDR, (41): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_DDR, (42): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_DDR, (43): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_DDR, (44): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_DDR, (45): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# Possible options: <STOP, CMD_SDR, RADDR_SDR, CADDR_SDR, MODE1_SDR, MODE2_SDR, MODE4_SDR, MODE8_SDR, WRITE_SDR,
# READ_SDR, LEARN_SDR, DATSZ_SDR, DUMMY_SDR, DUMMY_RWDS_SDR, JMP_ON_CS, CMD_DDR, RADDR_DDR, CADDR_DDR, MODE1_DDR,
# MODE2_DDR, MODE4_DDR, MODE8_DDR, WRITE_DDR, READ_DDR, LEARN_DDR, DATSZ_DDR, DUMMY_DDR, DUMMY_RWDS_DDR>
OPERATION_CODE: STOP
lookupTable_seq1_instr1:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq1_instr2:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq1_instr3:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq1_instr4:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq1_instr5:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq1_instr6:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq1_instr7:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
# -----------------------------------===== lookupTable_seq2_instr0 [Optional] =====-----------------------------------
# Description: Offset: 0x000000A0, Width: 16b; Lookup table holds Flash command sequences 2, instruction 0
lookupTable_seq2_instr0:
# ------------------------------------------===== OPERAND [Optional] =====------------------------------------------
# Description: Offset: 0b, Width: 8b, Instruction operand. Its values depends on used instruction
OPERAND: 0
# -----------------------------------------===== NUM_PADS [Optional] =====------------------------------------------
# Description: Offset: 8b, Width: 2b, Number of pads used by instruction. Some instructions ignores this parameter.
# - 1PAD, (0): Single mode. One pad is used.
# - 2PAD, (1): Dual mode. Two pads are used.
# - 4PAD, (2): Quad mode. Four pads are used.
# - 8PAD, (3): Octal mode. Eight pads are used.
# Possible options: <1PAD, 2PAD, 4PAD, 8PAD>
NUM_PADS: 1PAD
# --------------------------------------===== OPERATION_CODE [Optional] =====---------------------------------------
# Description: Offset: 10b, Width: 6b, Instruction operation code.
# - STOP, (0): Stop execution and de-assert CS. Then, the next command sequence (to the same flash device) starts
# from instruction pointer 0.
# - CMD_SDR, (1): Transmit command code to Flash.
# - RADDR_SDR, (2): Transmit row address to Flash.
# - CADDR_SDR, (3): Transmit column address to Flash.
# - MODE1_SDR, (4): Transmit mode bits to Flash.
# - MODE2_SDR, (5): Transmit mode bits to Flash.
# - MODE4_SDR, (6): Transmit mode bits to Flash.
# - MODE8_SDR, (7): Transmit mode bits to Flash.
# - WRITE_SDR, (8): Transmit program data to Flash device.
# - READ_SDR, (9): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_SDR, (10): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_SDR, (11): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_SDR, (12): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_SDR, (13): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# - JMP_ON_CS, (31): Stop execution, de-assert CS and save operand[7:0] as the instruction start pointer for next
# sequence.Normally this instruction is used to support Execute-In-Place enhanced mode. See XIP enhanced mode for
# more details.This instruction is only allowed for AHB read commands. There is interrupt status bit set
# (INTR[IPCMDERR] or INTR[AHBCMDERR]) when using this instruction in IP command or AHB write command.
# - CMD_DDR, (33): Transmit command code to Flash.
# - RADDR_DDR, (34): Transmit row address to Flash.
# - CADDR_DDR, (35): Transmit column address to Flash.
# - MODE1_DDR, (36): Transmit mode bits to Flash.
# - MODE2_DDR, (37): Transmit mode bits to Flash.
# - MODE4_DDR, (38): Transmit mode bits to Flash.
# - MODE8_DDR, (39): Transmit mode bits to Flash.
# - WRITE_DDR, (40): Transmit program data to Flash device.
# - READ_DDR, (41): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_DDR, (42): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_DDR, (43): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_DDR, (44): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_DDR, (45): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# Possible options: <STOP, CMD_SDR, RADDR_SDR, CADDR_SDR, MODE1_SDR, MODE2_SDR, MODE4_SDR, MODE8_SDR, WRITE_SDR,
# READ_SDR, LEARN_SDR, DATSZ_SDR, DUMMY_SDR, DUMMY_RWDS_SDR, JMP_ON_CS, CMD_DDR, RADDR_DDR, CADDR_DDR, MODE1_DDR,
# MODE2_DDR, MODE4_DDR, MODE8_DDR, WRITE_DDR, READ_DDR, LEARN_DDR, DATSZ_DDR, DUMMY_DDR, DUMMY_RWDS_DDR>
OPERATION_CODE: STOP
lookupTable_seq2_instr1:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq2_instr2:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq2_instr3:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq2_instr4:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq2_instr5:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq2_instr6:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq2_instr7:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
# -----------------------------------===== lookupTable_seq3_instr0 [Optional] =====-----------------------------------
# Description: Offset: 0x000000B0, Width: 16b; Lookup table holds Flash command sequences 3, instruction 0
lookupTable_seq3_instr0:
# ------------------------------------------===== OPERAND [Optional] =====------------------------------------------
# Description: Offset: 0b, Width: 8b, Instruction operand. Its values depends on used instruction
OPERAND: 0
# -----------------------------------------===== NUM_PADS [Optional] =====------------------------------------------
# Description: Offset: 8b, Width: 2b, Number of pads used by instruction. Some instructions ignores this parameter.
# - 1PAD, (0): Single mode. One pad is used.
# - 2PAD, (1): Dual mode. Two pads are used.
# - 4PAD, (2): Quad mode. Four pads are used.
# - 8PAD, (3): Octal mode. Eight pads are used.
# Possible options: <1PAD, 2PAD, 4PAD, 8PAD>
NUM_PADS: 1PAD
# --------------------------------------===== OPERATION_CODE [Optional] =====---------------------------------------
# Description: Offset: 10b, Width: 6b, Instruction operation code.
# - STOP, (0): Stop execution and de-assert CS. Then, the next command sequence (to the same flash device) starts
# from instruction pointer 0.
# - CMD_SDR, (1): Transmit command code to Flash.
# - RADDR_SDR, (2): Transmit row address to Flash.
# - CADDR_SDR, (3): Transmit column address to Flash.
# - MODE1_SDR, (4): Transmit mode bits to Flash.
# - MODE2_SDR, (5): Transmit mode bits to Flash.
# - MODE4_SDR, (6): Transmit mode bits to Flash.
# - MODE8_SDR, (7): Transmit mode bits to Flash.
# - WRITE_SDR, (8): Transmit program data to Flash device.
# - READ_SDR, (9): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_SDR, (10): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_SDR, (11): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_SDR, (12): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_SDR, (13): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# - JMP_ON_CS, (31): Stop execution, de-assert CS and save operand[7:0] as the instruction start pointer for next
# sequence.Normally this instruction is used to support Execute-In-Place enhanced mode. See XIP enhanced mode for
# more details.This instruction is only allowed for AHB read commands. There is interrupt status bit set
# (INTR[IPCMDERR] or INTR[AHBCMDERR]) when using this instruction in IP command or AHB write command.
# - CMD_DDR, (33): Transmit command code to Flash.
# - RADDR_DDR, (34): Transmit row address to Flash.
# - CADDR_DDR, (35): Transmit column address to Flash.
# - MODE1_DDR, (36): Transmit mode bits to Flash.
# - MODE2_DDR, (37): Transmit mode bits to Flash.
# - MODE4_DDR, (38): Transmit mode bits to Flash.
# - MODE8_DDR, (39): Transmit mode bits to Flash.
# - WRITE_DDR, (40): Transmit program data to Flash device.
# - READ_DDR, (41): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_DDR, (42): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_DDR, (43): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_DDR, (44): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_DDR, (45): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# Possible options: <STOP, CMD_SDR, RADDR_SDR, CADDR_SDR, MODE1_SDR, MODE2_SDR, MODE4_SDR, MODE8_SDR, WRITE_SDR,
# READ_SDR, LEARN_SDR, DATSZ_SDR, DUMMY_SDR, DUMMY_RWDS_SDR, JMP_ON_CS, CMD_DDR, RADDR_DDR, CADDR_DDR, MODE1_DDR,
# MODE2_DDR, MODE4_DDR, MODE8_DDR, WRITE_DDR, READ_DDR, LEARN_DDR, DATSZ_DDR, DUMMY_DDR, DUMMY_RWDS_DDR>
OPERATION_CODE: STOP
lookupTable_seq3_instr1:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq3_instr2:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq3_instr3:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq3_instr4:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq3_instr5:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq3_instr6:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq3_instr7:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
# -----------------------------------===== lookupTable_seq4_instr0 [Optional] =====-----------------------------------
# Description: Offset: 0x000000C0, Width: 16b; Lookup table holds Flash command sequences 4, instruction 0
lookupTable_seq4_instr0:
# ------------------------------------------===== OPERAND [Optional] =====------------------------------------------
# Description: Offset: 0b, Width: 8b, Instruction operand. Its values depends on used instruction
OPERAND: 0
# -----------------------------------------===== NUM_PADS [Optional] =====------------------------------------------
# Description: Offset: 8b, Width: 2b, Number of pads used by instruction. Some instructions ignores this parameter.
# - 1PAD, (0): Single mode. One pad is used.
# - 2PAD, (1): Dual mode. Two pads are used.
# - 4PAD, (2): Quad mode. Four pads are used.
# - 8PAD, (3): Octal mode. Eight pads are used.
# Possible options: <1PAD, 2PAD, 4PAD, 8PAD>
NUM_PADS: 1PAD
# --------------------------------------===== OPERATION_CODE [Optional] =====---------------------------------------
# Description: Offset: 10b, Width: 6b, Instruction operation code.
# - STOP, (0): Stop execution and de-assert CS. Then, the next command sequence (to the same flash device) starts
# from instruction pointer 0.
# - CMD_SDR, (1): Transmit command code to Flash.
# - RADDR_SDR, (2): Transmit row address to Flash.
# - CADDR_SDR, (3): Transmit column address to Flash.
# - MODE1_SDR, (4): Transmit mode bits to Flash.
# - MODE2_SDR, (5): Transmit mode bits to Flash.
# - MODE4_SDR, (6): Transmit mode bits to Flash.
# - MODE8_SDR, (7): Transmit mode bits to Flash.
# - WRITE_SDR, (8): Transmit program data to Flash device.
# - READ_SDR, (9): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_SDR, (10): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_SDR, (11): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_SDR, (12): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_SDR, (13): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# - JMP_ON_CS, (31): Stop execution, de-assert CS and save operand[7:0] as the instruction start pointer for next
# sequence.Normally this instruction is used to support Execute-In-Place enhanced mode. See XIP enhanced mode for
# more details.This instruction is only allowed for AHB read commands. There is interrupt status bit set
# (INTR[IPCMDERR] or INTR[AHBCMDERR]) when using this instruction in IP command or AHB write command.
# - CMD_DDR, (33): Transmit command code to Flash.
# - RADDR_DDR, (34): Transmit row address to Flash.
# - CADDR_DDR, (35): Transmit column address to Flash.
# - MODE1_DDR, (36): Transmit mode bits to Flash.
# - MODE2_DDR, (37): Transmit mode bits to Flash.
# - MODE4_DDR, (38): Transmit mode bits to Flash.
# - MODE8_DDR, (39): Transmit mode bits to Flash.
# - WRITE_DDR, (40): Transmit program data to Flash device.
# - READ_DDR, (41): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_DDR, (42): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_DDR, (43): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_DDR, (44): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_DDR, (45): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# Possible options: <STOP, CMD_SDR, RADDR_SDR, CADDR_SDR, MODE1_SDR, MODE2_SDR, MODE4_SDR, MODE8_SDR, WRITE_SDR,
# READ_SDR, LEARN_SDR, DATSZ_SDR, DUMMY_SDR, DUMMY_RWDS_SDR, JMP_ON_CS, CMD_DDR, RADDR_DDR, CADDR_DDR, MODE1_DDR,
# MODE2_DDR, MODE4_DDR, MODE8_DDR, WRITE_DDR, READ_DDR, LEARN_DDR, DATSZ_DDR, DUMMY_DDR, DUMMY_RWDS_DDR>
OPERATION_CODE: STOP
lookupTable_seq4_instr1:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq4_instr2:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq4_instr3:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq4_instr4:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq4_instr5:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq4_instr6:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq4_instr7:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
# -----------------------------------===== lookupTable_seq5_instr0 [Optional] =====-----------------------------------
# Description: Offset: 0x000000D0, Width: 16b; Lookup table holds Flash command sequences 5, instruction 0
lookupTable_seq5_instr0:
# ------------------------------------------===== OPERAND [Optional] =====------------------------------------------
# Description: Offset: 0b, Width: 8b, Instruction operand. Its values depends on used instruction
OPERAND: 0
# -----------------------------------------===== NUM_PADS [Optional] =====------------------------------------------
# Description: Offset: 8b, Width: 2b, Number of pads used by instruction. Some instructions ignores this parameter.
# - 1PAD, (0): Single mode. One pad is used.
# - 2PAD, (1): Dual mode. Two pads are used.
# - 4PAD, (2): Quad mode. Four pads are used.
# - 8PAD, (3): Octal mode. Eight pads are used.
# Possible options: <1PAD, 2PAD, 4PAD, 8PAD>
NUM_PADS: 1PAD
# --------------------------------------===== OPERATION_CODE [Optional] =====---------------------------------------
# Description: Offset: 10b, Width: 6b, Instruction operation code.
# - STOP, (0): Stop execution and de-assert CS. Then, the next command sequence (to the same flash device) starts
# from instruction pointer 0.
# - CMD_SDR, (1): Transmit command code to Flash.
# - RADDR_SDR, (2): Transmit row address to Flash.
# - CADDR_SDR, (3): Transmit column address to Flash.
# - MODE1_SDR, (4): Transmit mode bits to Flash.
# - MODE2_SDR, (5): Transmit mode bits to Flash.
# - MODE4_SDR, (6): Transmit mode bits to Flash.
# - MODE8_SDR, (7): Transmit mode bits to Flash.
# - WRITE_SDR, (8): Transmit program data to Flash device.
# - READ_SDR, (9): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_SDR, (10): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_SDR, (11): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_SDR, (12): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_SDR, (13): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# - JMP_ON_CS, (31): Stop execution, de-assert CS and save operand[7:0] as the instruction start pointer for next
# sequence.Normally this instruction is used to support Execute-In-Place enhanced mode. See XIP enhanced mode for
# more details.This instruction is only allowed for AHB read commands. There is interrupt status bit set
# (INTR[IPCMDERR] or INTR[AHBCMDERR]) when using this instruction in IP command or AHB write command.
# - CMD_DDR, (33): Transmit command code to Flash.
# - RADDR_DDR, (34): Transmit row address to Flash.
# - CADDR_DDR, (35): Transmit column address to Flash.
# - MODE1_DDR, (36): Transmit mode bits to Flash.
# - MODE2_DDR, (37): Transmit mode bits to Flash.
# - MODE4_DDR, (38): Transmit mode bits to Flash.
# - MODE8_DDR, (39): Transmit mode bits to Flash.
# - WRITE_DDR, (40): Transmit program data to Flash device.
# - READ_DDR, (41): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_DDR, (42): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_DDR, (43): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_DDR, (44): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_DDR, (45): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# Possible options: <STOP, CMD_SDR, RADDR_SDR, CADDR_SDR, MODE1_SDR, MODE2_SDR, MODE4_SDR, MODE8_SDR, WRITE_SDR,
# READ_SDR, LEARN_SDR, DATSZ_SDR, DUMMY_SDR, DUMMY_RWDS_SDR, JMP_ON_CS, CMD_DDR, RADDR_DDR, CADDR_DDR, MODE1_DDR,
# MODE2_DDR, MODE4_DDR, MODE8_DDR, WRITE_DDR, READ_DDR, LEARN_DDR, DATSZ_DDR, DUMMY_DDR, DUMMY_RWDS_DDR>
OPERATION_CODE: STOP
lookupTable_seq5_instr1:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq5_instr2:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq5_instr3:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq5_instr4:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq5_instr5:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq5_instr6:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq5_instr7:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
# -----------------------------------===== lookupTable_seq6_instr0 [Optional] =====-----------------------------------
# Description: Offset: 0x000000E0, Width: 16b; Lookup table holds Flash command sequences 6, instruction 0
lookupTable_seq6_instr0:
# ------------------------------------------===== OPERAND [Optional] =====------------------------------------------
# Description: Offset: 0b, Width: 8b, Instruction operand. Its values depends on used instruction
OPERAND: 0
# -----------------------------------------===== NUM_PADS [Optional] =====------------------------------------------
# Description: Offset: 8b, Width: 2b, Number of pads used by instruction. Some instructions ignores this parameter.
# - 1PAD, (0): Single mode. One pad is used.
# - 2PAD, (1): Dual mode. Two pads are used.
# - 4PAD, (2): Quad mode. Four pads are used.
# - 8PAD, (3): Octal mode. Eight pads are used.
# Possible options: <1PAD, 2PAD, 4PAD, 8PAD>
NUM_PADS: 1PAD
# --------------------------------------===== OPERATION_CODE [Optional] =====---------------------------------------
# Description: Offset: 10b, Width: 6b, Instruction operation code.
# - STOP, (0): Stop execution and de-assert CS. Then, the next command sequence (to the same flash device) starts
# from instruction pointer 0.
# - CMD_SDR, (1): Transmit command code to Flash.
# - RADDR_SDR, (2): Transmit row address to Flash.
# - CADDR_SDR, (3): Transmit column address to Flash.
# - MODE1_SDR, (4): Transmit mode bits to Flash.
# - MODE2_SDR, (5): Transmit mode bits to Flash.
# - MODE4_SDR, (6): Transmit mode bits to Flash.
# - MODE8_SDR, (7): Transmit mode bits to Flash.
# - WRITE_SDR, (8): Transmit program data to Flash device.
# - READ_SDR, (9): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_SDR, (10): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_SDR, (11): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_SDR, (12): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_SDR, (13): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# - JMP_ON_CS, (31): Stop execution, de-assert CS and save operand[7:0] as the instruction start pointer for next
# sequence.Normally this instruction is used to support Execute-In-Place enhanced mode. See XIP enhanced mode for
# more details.This instruction is only allowed for AHB read commands. There is interrupt status bit set
# (INTR[IPCMDERR] or INTR[AHBCMDERR]) when using this instruction in IP command or AHB write command.
# - CMD_DDR, (33): Transmit command code to Flash.
# - RADDR_DDR, (34): Transmit row address to Flash.
# - CADDR_DDR, (35): Transmit column address to Flash.
# - MODE1_DDR, (36): Transmit mode bits to Flash.
# - MODE2_DDR, (37): Transmit mode bits to Flash.
# - MODE4_DDR, (38): Transmit mode bits to Flash.
# - MODE8_DDR, (39): Transmit mode bits to Flash.
# - WRITE_DDR, (40): Transmit program data to Flash device.
# - READ_DDR, (41): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_DDR, (42): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_DDR, (43): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_DDR, (44): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_DDR, (45): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# Possible options: <STOP, CMD_SDR, RADDR_SDR, CADDR_SDR, MODE1_SDR, MODE2_SDR, MODE4_SDR, MODE8_SDR, WRITE_SDR,
# READ_SDR, LEARN_SDR, DATSZ_SDR, DUMMY_SDR, DUMMY_RWDS_SDR, JMP_ON_CS, CMD_DDR, RADDR_DDR, CADDR_DDR, MODE1_DDR,
# MODE2_DDR, MODE4_DDR, MODE8_DDR, WRITE_DDR, READ_DDR, LEARN_DDR, DATSZ_DDR, DUMMY_DDR, DUMMY_RWDS_DDR>
OPERATION_CODE: STOP
lookupTable_seq6_instr1:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq6_instr2:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq6_instr3:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq6_instr4:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq6_instr5:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq6_instr6:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq6_instr7:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
# -----------------------------------===== lookupTable_seq7_instr0 [Optional] =====-----------------------------------
# Description: Offset: 0x000000F0, Width: 16b; Lookup table holds Flash command sequences 7, instruction 0
lookupTable_seq7_instr0:
# ------------------------------------------===== OPERAND [Optional] =====------------------------------------------
# Description: Offset: 0b, Width: 8b, Instruction operand. Its values depends on used instruction
OPERAND: 0
# -----------------------------------------===== NUM_PADS [Optional] =====------------------------------------------
# Description: Offset: 8b, Width: 2b, Number of pads used by instruction. Some instructions ignores this parameter.
# - 1PAD, (0): Single mode. One pad is used.
# - 2PAD, (1): Dual mode. Two pads are used.
# - 4PAD, (2): Quad mode. Four pads are used.
# - 8PAD, (3): Octal mode. Eight pads are used.
# Possible options: <1PAD, 2PAD, 4PAD, 8PAD>
NUM_PADS: 1PAD
# --------------------------------------===== OPERATION_CODE [Optional] =====---------------------------------------
# Description: Offset: 10b, Width: 6b, Instruction operation code.
# - STOP, (0): Stop execution and de-assert CS. Then, the next command sequence (to the same flash device) starts
# from instruction pointer 0.
# - CMD_SDR, (1): Transmit command code to Flash.
# - RADDR_SDR, (2): Transmit row address to Flash.
# - CADDR_SDR, (3): Transmit column address to Flash.
# - MODE1_SDR, (4): Transmit mode bits to Flash.
# - MODE2_SDR, (5): Transmit mode bits to Flash.
# - MODE4_SDR, (6): Transmit mode bits to Flash.
# - MODE8_SDR, (7): Transmit mode bits to Flash.
# - WRITE_SDR, (8): Transmit program data to Flash device.
# - READ_SDR, (9): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_SDR, (10): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_SDR, (11): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_SDR, (12): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_SDR, (13): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# - JMP_ON_CS, (31): Stop execution, de-assert CS and save operand[7:0] as the instruction start pointer for next
# sequence.Normally this instruction is used to support Execute-In-Place enhanced mode. See XIP enhanced mode for
# more details.This instruction is only allowed for AHB read commands. There is interrupt status bit set
# (INTR[IPCMDERR] or INTR[AHBCMDERR]) when using this instruction in IP command or AHB write command.
# - CMD_DDR, (33): Transmit command code to Flash.
# - RADDR_DDR, (34): Transmit row address to Flash.
# - CADDR_DDR, (35): Transmit column address to Flash.
# - MODE1_DDR, (36): Transmit mode bits to Flash.
# - MODE2_DDR, (37): Transmit mode bits to Flash.
# - MODE4_DDR, (38): Transmit mode bits to Flash.
# - MODE8_DDR, (39): Transmit mode bits to Flash.
# - WRITE_DDR, (40): Transmit program data to Flash device.
# - READ_DDR, (41): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_DDR, (42): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_DDR, (43): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_DDR, (44): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_DDR, (45): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# Possible options: <STOP, CMD_SDR, RADDR_SDR, CADDR_SDR, MODE1_SDR, MODE2_SDR, MODE4_SDR, MODE8_SDR, WRITE_SDR,
# READ_SDR, LEARN_SDR, DATSZ_SDR, DUMMY_SDR, DUMMY_RWDS_SDR, JMP_ON_CS, CMD_DDR, RADDR_DDR, CADDR_DDR, MODE1_DDR,
# MODE2_DDR, MODE4_DDR, MODE8_DDR, WRITE_DDR, READ_DDR, LEARN_DDR, DATSZ_DDR, DUMMY_DDR, DUMMY_RWDS_DDR>
OPERATION_CODE: STOP
lookupTable_seq7_instr1:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq7_instr2:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq7_instr3:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq7_instr4:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq7_instr5:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq7_instr6:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq7_instr7:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
# -----------------------------------===== lookupTable_seq8_instr0 [Optional] =====-----------------------------------
# Description: Offset: 0x00000100, Width: 16b; Lookup table holds Flash command sequences 8, instruction 0
lookupTable_seq8_instr0:
# ------------------------------------------===== OPERAND [Optional] =====------------------------------------------
# Description: Offset: 0b, Width: 8b, Instruction operand. Its values depends on used instruction
OPERAND: 0
# -----------------------------------------===== NUM_PADS [Optional] =====------------------------------------------
# Description: Offset: 8b, Width: 2b, Number of pads used by instruction. Some instructions ignores this parameter.
# - 1PAD, (0): Single mode. One pad is used.
# - 2PAD, (1): Dual mode. Two pads are used.
# - 4PAD, (2): Quad mode. Four pads are used.
# - 8PAD, (3): Octal mode. Eight pads are used.
# Possible options: <1PAD, 2PAD, 4PAD, 8PAD>
NUM_PADS: 1PAD
# --------------------------------------===== OPERATION_CODE [Optional] =====---------------------------------------
# Description: Offset: 10b, Width: 6b, Instruction operation code.
# - STOP, (0): Stop execution and de-assert CS. Then, the next command sequence (to the same flash device) starts
# from instruction pointer 0.
# - CMD_SDR, (1): Transmit command code to Flash.
# - RADDR_SDR, (2): Transmit row address to Flash.
# - CADDR_SDR, (3): Transmit column address to Flash.
# - MODE1_SDR, (4): Transmit mode bits to Flash.
# - MODE2_SDR, (5): Transmit mode bits to Flash.
# - MODE4_SDR, (6): Transmit mode bits to Flash.
# - MODE8_SDR, (7): Transmit mode bits to Flash.
# - WRITE_SDR, (8): Transmit program data to Flash device.
# - READ_SDR, (9): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_SDR, (10): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_SDR, (11): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_SDR, (12): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_SDR, (13): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# - JMP_ON_CS, (31): Stop execution, de-assert CS and save operand[7:0] as the instruction start pointer for next
# sequence.Normally this instruction is used to support Execute-In-Place enhanced mode. See XIP enhanced mode for
# more details.This instruction is only allowed for AHB read commands. There is interrupt status bit set
# (INTR[IPCMDERR] or INTR[AHBCMDERR]) when using this instruction in IP command or AHB write command.
# - CMD_DDR, (33): Transmit command code to Flash.
# - RADDR_DDR, (34): Transmit row address to Flash.
# - CADDR_DDR, (35): Transmit column address to Flash.
# - MODE1_DDR, (36): Transmit mode bits to Flash.
# - MODE2_DDR, (37): Transmit mode bits to Flash.
# - MODE4_DDR, (38): Transmit mode bits to Flash.
# - MODE8_DDR, (39): Transmit mode bits to Flash.
# - WRITE_DDR, (40): Transmit program data to Flash device.
# - READ_DDR, (41): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_DDR, (42): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_DDR, (43): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_DDR, (44): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_DDR, (45): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# Possible options: <STOP, CMD_SDR, RADDR_SDR, CADDR_SDR, MODE1_SDR, MODE2_SDR, MODE4_SDR, MODE8_SDR, WRITE_SDR,
# READ_SDR, LEARN_SDR, DATSZ_SDR, DUMMY_SDR, DUMMY_RWDS_SDR, JMP_ON_CS, CMD_DDR, RADDR_DDR, CADDR_DDR, MODE1_DDR,
# MODE2_DDR, MODE4_DDR, MODE8_DDR, WRITE_DDR, READ_DDR, LEARN_DDR, DATSZ_DDR, DUMMY_DDR, DUMMY_RWDS_DDR>
OPERATION_CODE: STOP
lookupTable_seq8_instr1:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq8_instr2:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq8_instr3:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq8_instr4:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq8_instr5:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq8_instr6:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq8_instr7:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
# -----------------------------------===== lookupTable_seq9_instr0 [Optional] =====-----------------------------------
# Description: Offset: 0x00000110, Width: 16b; Lookup table holds Flash command sequences 9, instruction 0
lookupTable_seq9_instr0:
# ------------------------------------------===== OPERAND [Optional] =====------------------------------------------
# Description: Offset: 0b, Width: 8b, Instruction operand. Its values depends on used instruction
OPERAND: 0
# -----------------------------------------===== NUM_PADS [Optional] =====------------------------------------------
# Description: Offset: 8b, Width: 2b, Number of pads used by instruction. Some instructions ignores this parameter.
# - 1PAD, (0): Single mode. One pad is used.
# - 2PAD, (1): Dual mode. Two pads are used.
# - 4PAD, (2): Quad mode. Four pads are used.
# - 8PAD, (3): Octal mode. Eight pads are used.
# Possible options: <1PAD, 2PAD, 4PAD, 8PAD>
NUM_PADS: 1PAD
# --------------------------------------===== OPERATION_CODE [Optional] =====---------------------------------------
# Description: Offset: 10b, Width: 6b, Instruction operation code.
# - STOP, (0): Stop execution and de-assert CS. Then, the next command sequence (to the same flash device) starts
# from instruction pointer 0.
# - CMD_SDR, (1): Transmit command code to Flash.
# - RADDR_SDR, (2): Transmit row address to Flash.
# - CADDR_SDR, (3): Transmit column address to Flash.
# - MODE1_SDR, (4): Transmit mode bits to Flash.
# - MODE2_SDR, (5): Transmit mode bits to Flash.
# - MODE4_SDR, (6): Transmit mode bits to Flash.
# - MODE8_SDR, (7): Transmit mode bits to Flash.
# - WRITE_SDR, (8): Transmit program data to Flash device.
# - READ_SDR, (9): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_SDR, (10): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_SDR, (11): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_SDR, (12): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_SDR, (13): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# - JMP_ON_CS, (31): Stop execution, de-assert CS and save operand[7:0] as the instruction start pointer for next
# sequence.Normally this instruction is used to support Execute-In-Place enhanced mode. See XIP enhanced mode for
# more details.This instruction is only allowed for AHB read commands. There is interrupt status bit set
# (INTR[IPCMDERR] or INTR[AHBCMDERR]) when using this instruction in IP command or AHB write command.
# - CMD_DDR, (33): Transmit command code to Flash.
# - RADDR_DDR, (34): Transmit row address to Flash.
# - CADDR_DDR, (35): Transmit column address to Flash.
# - MODE1_DDR, (36): Transmit mode bits to Flash.
# - MODE2_DDR, (37): Transmit mode bits to Flash.
# - MODE4_DDR, (38): Transmit mode bits to Flash.
# - MODE8_DDR, (39): Transmit mode bits to Flash.
# - WRITE_DDR, (40): Transmit program data to Flash device.
# - READ_DDR, (41): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_DDR, (42): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_DDR, (43): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_DDR, (44): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_DDR, (45): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# Possible options: <STOP, CMD_SDR, RADDR_SDR, CADDR_SDR, MODE1_SDR, MODE2_SDR, MODE4_SDR, MODE8_SDR, WRITE_SDR,
# READ_SDR, LEARN_SDR, DATSZ_SDR, DUMMY_SDR, DUMMY_RWDS_SDR, JMP_ON_CS, CMD_DDR, RADDR_DDR, CADDR_DDR, MODE1_DDR,
# MODE2_DDR, MODE4_DDR, MODE8_DDR, WRITE_DDR, READ_DDR, LEARN_DDR, DATSZ_DDR, DUMMY_DDR, DUMMY_RWDS_DDR>
OPERATION_CODE: STOP
lookupTable_seq9_instr1:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq9_instr2:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq9_instr3:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq9_instr4:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq9_instr5:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq9_instr6:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq9_instr7:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
# ----------------------------------===== lookupTable_seq10_instr0 [Optional] =====-----------------------------------
# Description: Offset: 0x00000120, Width: 16b; Lookup table holds Flash command sequences 10, instruction 0
lookupTable_seq10_instr0:
# ------------------------------------------===== OPERAND [Optional] =====------------------------------------------
# Description: Offset: 0b, Width: 8b, Instruction operand. Its values depends on used instruction
OPERAND: 0
# -----------------------------------------===== NUM_PADS [Optional] =====------------------------------------------
# Description: Offset: 8b, Width: 2b, Number of pads used by instruction. Some instructions ignores this parameter.
# - 1PAD, (0): Single mode. One pad is used.
# - 2PAD, (1): Dual mode. Two pads are used.
# - 4PAD, (2): Quad mode. Four pads are used.
# - 8PAD, (3): Octal mode. Eight pads are used.
# Possible options: <1PAD, 2PAD, 4PAD, 8PAD>
NUM_PADS: 1PAD
# --------------------------------------===== OPERATION_CODE [Optional] =====---------------------------------------
# Description: Offset: 10b, Width: 6b, Instruction operation code.
# - STOP, (0): Stop execution and de-assert CS. Then, the next command sequence (to the same flash device) starts
# from instruction pointer 0.
# - CMD_SDR, (1): Transmit command code to Flash.
# - RADDR_SDR, (2): Transmit row address to Flash.
# - CADDR_SDR, (3): Transmit column address to Flash.
# - MODE1_SDR, (4): Transmit mode bits to Flash.
# - MODE2_SDR, (5): Transmit mode bits to Flash.
# - MODE4_SDR, (6): Transmit mode bits to Flash.
# - MODE8_SDR, (7): Transmit mode bits to Flash.
# - WRITE_SDR, (8): Transmit program data to Flash device.
# - READ_SDR, (9): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_SDR, (10): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_SDR, (11): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_SDR, (12): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_SDR, (13): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# - JMP_ON_CS, (31): Stop execution, de-assert CS and save operand[7:0] as the instruction start pointer for next
# sequence.Normally this instruction is used to support Execute-In-Place enhanced mode. See XIP enhanced mode for
# more details.This instruction is only allowed for AHB read commands. There is interrupt status bit set
# (INTR[IPCMDERR] or INTR[AHBCMDERR]) when using this instruction in IP command or AHB write command.
# - CMD_DDR, (33): Transmit command code to Flash.
# - RADDR_DDR, (34): Transmit row address to Flash.
# - CADDR_DDR, (35): Transmit column address to Flash.
# - MODE1_DDR, (36): Transmit mode bits to Flash.
# - MODE2_DDR, (37): Transmit mode bits to Flash.
# - MODE4_DDR, (38): Transmit mode bits to Flash.
# - MODE8_DDR, (39): Transmit mode bits to Flash.
# - WRITE_DDR, (40): Transmit program data to Flash device.
# - READ_DDR, (41): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_DDR, (42): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_DDR, (43): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_DDR, (44): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_DDR, (45): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# Possible options: <STOP, CMD_SDR, RADDR_SDR, CADDR_SDR, MODE1_SDR, MODE2_SDR, MODE4_SDR, MODE8_SDR, WRITE_SDR,
# READ_SDR, LEARN_SDR, DATSZ_SDR, DUMMY_SDR, DUMMY_RWDS_SDR, JMP_ON_CS, CMD_DDR, RADDR_DDR, CADDR_DDR, MODE1_DDR,
# MODE2_DDR, MODE4_DDR, MODE8_DDR, WRITE_DDR, READ_DDR, LEARN_DDR, DATSZ_DDR, DUMMY_DDR, DUMMY_RWDS_DDR>
OPERATION_CODE: STOP
lookupTable_seq10_instr1:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq10_instr2:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq10_instr3:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq10_instr4:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq10_instr5:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq10_instr6:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq10_instr7:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
# ----------------------------------===== lookupTable_seq11_instr0 [Optional] =====-----------------------------------
# Description: Offset: 0x00000130, Width: 16b; Lookup table holds Flash command sequences 11, instruction 0
lookupTable_seq11_instr0:
# ------------------------------------------===== OPERAND [Optional] =====------------------------------------------
# Description: Offset: 0b, Width: 8b, Instruction operand. Its values depends on used instruction
OPERAND: 0
# -----------------------------------------===== NUM_PADS [Optional] =====------------------------------------------
# Description: Offset: 8b, Width: 2b, Number of pads used by instruction. Some instructions ignores this parameter.
# - 1PAD, (0): Single mode. One pad is used.
# - 2PAD, (1): Dual mode. Two pads are used.
# - 4PAD, (2): Quad mode. Four pads are used.
# - 8PAD, (3): Octal mode. Eight pads are used.
# Possible options: <1PAD, 2PAD, 4PAD, 8PAD>
NUM_PADS: 1PAD
# --------------------------------------===== OPERATION_CODE [Optional] =====---------------------------------------
# Description: Offset: 10b, Width: 6b, Instruction operation code.
# - STOP, (0): Stop execution and de-assert CS. Then, the next command sequence (to the same flash device) starts
# from instruction pointer 0.
# - CMD_SDR, (1): Transmit command code to Flash.
# - RADDR_SDR, (2): Transmit row address to Flash.
# - CADDR_SDR, (3): Transmit column address to Flash.
# - MODE1_SDR, (4): Transmit mode bits to Flash.
# - MODE2_SDR, (5): Transmit mode bits to Flash.
# - MODE4_SDR, (6): Transmit mode bits to Flash.
# - MODE8_SDR, (7): Transmit mode bits to Flash.
# - WRITE_SDR, (8): Transmit program data to Flash device.
# - READ_SDR, (9): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_SDR, (10): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_SDR, (11): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_SDR, (12): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_SDR, (13): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# - JMP_ON_CS, (31): Stop execution, de-assert CS and save operand[7:0] as the instruction start pointer for next
# sequence.Normally this instruction is used to support Execute-In-Place enhanced mode. See XIP enhanced mode for
# more details.This instruction is only allowed for AHB read commands. There is interrupt status bit set
# (INTR[IPCMDERR] or INTR[AHBCMDERR]) when using this instruction in IP command or AHB write command.
# - CMD_DDR, (33): Transmit command code to Flash.
# - RADDR_DDR, (34): Transmit row address to Flash.
# - CADDR_DDR, (35): Transmit column address to Flash.
# - MODE1_DDR, (36): Transmit mode bits to Flash.
# - MODE2_DDR, (37): Transmit mode bits to Flash.
# - MODE4_DDR, (38): Transmit mode bits to Flash.
# - MODE8_DDR, (39): Transmit mode bits to Flash.
# - WRITE_DDR, (40): Transmit program data to Flash device.
# - READ_DDR, (41): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_DDR, (42): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_DDR, (43): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_DDR, (44): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_DDR, (45): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# Possible options: <STOP, CMD_SDR, RADDR_SDR, CADDR_SDR, MODE1_SDR, MODE2_SDR, MODE4_SDR, MODE8_SDR, WRITE_SDR,
# READ_SDR, LEARN_SDR, DATSZ_SDR, DUMMY_SDR, DUMMY_RWDS_SDR, JMP_ON_CS, CMD_DDR, RADDR_DDR, CADDR_DDR, MODE1_DDR,
# MODE2_DDR, MODE4_DDR, MODE8_DDR, WRITE_DDR, READ_DDR, LEARN_DDR, DATSZ_DDR, DUMMY_DDR, DUMMY_RWDS_DDR>
OPERATION_CODE: STOP
lookupTable_seq11_instr1:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq11_instr2:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq11_instr3:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq11_instr4:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq11_instr5:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq11_instr6:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq11_instr7:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
# ----------------------------------===== lookupTable_seq12_instr0 [Optional] =====-----------------------------------
# Description: Offset: 0x00000140, Width: 16b; Lookup table holds Flash command sequences 12, instruction 0
lookupTable_seq12_instr0:
# ------------------------------------------===== OPERAND [Optional] =====------------------------------------------
# Description: Offset: 0b, Width: 8b, Instruction operand. Its values depends on used instruction
OPERAND: 0
# -----------------------------------------===== NUM_PADS [Optional] =====------------------------------------------
# Description: Offset: 8b, Width: 2b, Number of pads used by instruction. Some instructions ignores this parameter.
# - 1PAD, (0): Single mode. One pad is used.
# - 2PAD, (1): Dual mode. Two pads are used.
# - 4PAD, (2): Quad mode. Four pads are used.
# - 8PAD, (3): Octal mode. Eight pads are used.
# Possible options: <1PAD, 2PAD, 4PAD, 8PAD>
NUM_PADS: 1PAD
# --------------------------------------===== OPERATION_CODE [Optional] =====---------------------------------------
# Description: Offset: 10b, Width: 6b, Instruction operation code.
# - STOP, (0): Stop execution and de-assert CS. Then, the next command sequence (to the same flash device) starts
# from instruction pointer 0.
# - CMD_SDR, (1): Transmit command code to Flash.
# - RADDR_SDR, (2): Transmit row address to Flash.
# - CADDR_SDR, (3): Transmit column address to Flash.
# - MODE1_SDR, (4): Transmit mode bits to Flash.
# - MODE2_SDR, (5): Transmit mode bits to Flash.
# - MODE4_SDR, (6): Transmit mode bits to Flash.
# - MODE8_SDR, (7): Transmit mode bits to Flash.
# - WRITE_SDR, (8): Transmit program data to Flash device.
# - READ_SDR, (9): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_SDR, (10): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_SDR, (11): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_SDR, (12): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_SDR, (13): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# - JMP_ON_CS, (31): Stop execution, de-assert CS and save operand[7:0] as the instruction start pointer for next
# sequence.Normally this instruction is used to support Execute-In-Place enhanced mode. See XIP enhanced mode for
# more details.This instruction is only allowed for AHB read commands. There is interrupt status bit set
# (INTR[IPCMDERR] or INTR[AHBCMDERR]) when using this instruction in IP command or AHB write command.
# - CMD_DDR, (33): Transmit command code to Flash.
# - RADDR_DDR, (34): Transmit row address to Flash.
# - CADDR_DDR, (35): Transmit column address to Flash.
# - MODE1_DDR, (36): Transmit mode bits to Flash.
# - MODE2_DDR, (37): Transmit mode bits to Flash.
# - MODE4_DDR, (38): Transmit mode bits to Flash.
# - MODE8_DDR, (39): Transmit mode bits to Flash.
# - WRITE_DDR, (40): Transmit program data to Flash device.
# - READ_DDR, (41): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_DDR, (42): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_DDR, (43): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_DDR, (44): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_DDR, (45): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# Possible options: <STOP, CMD_SDR, RADDR_SDR, CADDR_SDR, MODE1_SDR, MODE2_SDR, MODE4_SDR, MODE8_SDR, WRITE_SDR,
# READ_SDR, LEARN_SDR, DATSZ_SDR, DUMMY_SDR, DUMMY_RWDS_SDR, JMP_ON_CS, CMD_DDR, RADDR_DDR, CADDR_DDR, MODE1_DDR,
# MODE2_DDR, MODE4_DDR, MODE8_DDR, WRITE_DDR, READ_DDR, LEARN_DDR, DATSZ_DDR, DUMMY_DDR, DUMMY_RWDS_DDR>
OPERATION_CODE: STOP
lookupTable_seq12_instr1:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq12_instr2:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq12_instr3:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq12_instr4:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq12_instr5:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq12_instr6:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq12_instr7:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
# ----------------------------------===== lookupTable_seq13_instr0 [Optional] =====-----------------------------------
# Description: Offset: 0x00000150, Width: 16b; Lookup table holds Flash command sequences 13, instruction 0
lookupTable_seq13_instr0:
# ------------------------------------------===== OPERAND [Optional] =====------------------------------------------
# Description: Offset: 0b, Width: 8b, Instruction operand. Its values depends on used instruction
OPERAND: 0
# -----------------------------------------===== NUM_PADS [Optional] =====------------------------------------------
# Description: Offset: 8b, Width: 2b, Number of pads used by instruction. Some instructions ignores this parameter.
# - 1PAD, (0): Single mode. One pad is used.
# - 2PAD, (1): Dual mode. Two pads are used.
# - 4PAD, (2): Quad mode. Four pads are used.
# - 8PAD, (3): Octal mode. Eight pads are used.
# Possible options: <1PAD, 2PAD, 4PAD, 8PAD>
NUM_PADS: 1PAD
# --------------------------------------===== OPERATION_CODE [Optional] =====---------------------------------------
# Description: Offset: 10b, Width: 6b, Instruction operation code.
# - STOP, (0): Stop execution and de-assert CS. Then, the next command sequence (to the same flash device) starts
# from instruction pointer 0.
# - CMD_SDR, (1): Transmit command code to Flash.
# - RADDR_SDR, (2): Transmit row address to Flash.
# - CADDR_SDR, (3): Transmit column address to Flash.
# - MODE1_SDR, (4): Transmit mode bits to Flash.
# - MODE2_SDR, (5): Transmit mode bits to Flash.
# - MODE4_SDR, (6): Transmit mode bits to Flash.
# - MODE8_SDR, (7): Transmit mode bits to Flash.
# - WRITE_SDR, (8): Transmit program data to Flash device.
# - READ_SDR, (9): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_SDR, (10): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_SDR, (11): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_SDR, (12): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_SDR, (13): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# - JMP_ON_CS, (31): Stop execution, de-assert CS and save operand[7:0] as the instruction start pointer for next
# sequence.Normally this instruction is used to support Execute-In-Place enhanced mode. See XIP enhanced mode for
# more details.This instruction is only allowed for AHB read commands. There is interrupt status bit set
# (INTR[IPCMDERR] or INTR[AHBCMDERR]) when using this instruction in IP command or AHB write command.
# - CMD_DDR, (33): Transmit command code to Flash.
# - RADDR_DDR, (34): Transmit row address to Flash.
# - CADDR_DDR, (35): Transmit column address to Flash.
# - MODE1_DDR, (36): Transmit mode bits to Flash.
# - MODE2_DDR, (37): Transmit mode bits to Flash.
# - MODE4_DDR, (38): Transmit mode bits to Flash.
# - MODE8_DDR, (39): Transmit mode bits to Flash.
# - WRITE_DDR, (40): Transmit program data to Flash device.
# - READ_DDR, (41): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_DDR, (42): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_DDR, (43): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_DDR, (44): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_DDR, (45): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# Possible options: <STOP, CMD_SDR, RADDR_SDR, CADDR_SDR, MODE1_SDR, MODE2_SDR, MODE4_SDR, MODE8_SDR, WRITE_SDR,
# READ_SDR, LEARN_SDR, DATSZ_SDR, DUMMY_SDR, DUMMY_RWDS_SDR, JMP_ON_CS, CMD_DDR, RADDR_DDR, CADDR_DDR, MODE1_DDR,
# MODE2_DDR, MODE4_DDR, MODE8_DDR, WRITE_DDR, READ_DDR, LEARN_DDR, DATSZ_DDR, DUMMY_DDR, DUMMY_RWDS_DDR>
OPERATION_CODE: STOP
lookupTable_seq13_instr1:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq13_instr2:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq13_instr3:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq13_instr4:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq13_instr5:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq13_instr6:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq13_instr7:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
# ----------------------------------===== lookupTable_seq14_instr0 [Optional] =====-----------------------------------
# Description: Offset: 0x00000160, Width: 16b; Lookup table holds Flash command sequences 14, instruction 0
lookupTable_seq14_instr0:
# ------------------------------------------===== OPERAND [Optional] =====------------------------------------------
# Description: Offset: 0b, Width: 8b, Instruction operand. Its values depends on used instruction
OPERAND: 0
# -----------------------------------------===== NUM_PADS [Optional] =====------------------------------------------
# Description: Offset: 8b, Width: 2b, Number of pads used by instruction. Some instructions ignores this parameter.
# - 1PAD, (0): Single mode. One pad is used.
# - 2PAD, (1): Dual mode. Two pads are used.
# - 4PAD, (2): Quad mode. Four pads are used.
# - 8PAD, (3): Octal mode. Eight pads are used.
# Possible options: <1PAD, 2PAD, 4PAD, 8PAD>
NUM_PADS: 1PAD
# --------------------------------------===== OPERATION_CODE [Optional] =====---------------------------------------
# Description: Offset: 10b, Width: 6b, Instruction operation code.
# - STOP, (0): Stop execution and de-assert CS. Then, the next command sequence (to the same flash device) starts
# from instruction pointer 0.
# - CMD_SDR, (1): Transmit command code to Flash.
# - RADDR_SDR, (2): Transmit row address to Flash.
# - CADDR_SDR, (3): Transmit column address to Flash.
# - MODE1_SDR, (4): Transmit mode bits to Flash.
# - MODE2_SDR, (5): Transmit mode bits to Flash.
# - MODE4_SDR, (6): Transmit mode bits to Flash.
# - MODE8_SDR, (7): Transmit mode bits to Flash.
# - WRITE_SDR, (8): Transmit program data to Flash device.
# - READ_SDR, (9): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_SDR, (10): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_SDR, (11): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_SDR, (12): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_SDR, (13): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# - JMP_ON_CS, (31): Stop execution, de-assert CS and save operand[7:0] as the instruction start pointer for next
# sequence.Normally this instruction is used to support Execute-In-Place enhanced mode. See XIP enhanced mode for
# more details.This instruction is only allowed for AHB read commands. There is interrupt status bit set
# (INTR[IPCMDERR] or INTR[AHBCMDERR]) when using this instruction in IP command or AHB write command.
# - CMD_DDR, (33): Transmit command code to Flash.
# - RADDR_DDR, (34): Transmit row address to Flash.
# - CADDR_DDR, (35): Transmit column address to Flash.
# - MODE1_DDR, (36): Transmit mode bits to Flash.
# - MODE2_DDR, (37): Transmit mode bits to Flash.
# - MODE4_DDR, (38): Transmit mode bits to Flash.
# - MODE8_DDR, (39): Transmit mode bits to Flash.
# - WRITE_DDR, (40): Transmit program data to Flash device.
# - READ_DDR, (41): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_DDR, (42): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_DDR, (43): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_DDR, (44): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_DDR, (45): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# Possible options: <STOP, CMD_SDR, RADDR_SDR, CADDR_SDR, MODE1_SDR, MODE2_SDR, MODE4_SDR, MODE8_SDR, WRITE_SDR,
# READ_SDR, LEARN_SDR, DATSZ_SDR, DUMMY_SDR, DUMMY_RWDS_SDR, JMP_ON_CS, CMD_DDR, RADDR_DDR, CADDR_DDR, MODE1_DDR,
# MODE2_DDR, MODE4_DDR, MODE8_DDR, WRITE_DDR, READ_DDR, LEARN_DDR, DATSZ_DDR, DUMMY_DDR, DUMMY_RWDS_DDR>
OPERATION_CODE: STOP
lookupTable_seq14_instr1:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq14_instr2:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq14_instr3:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq14_instr4:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq14_instr5:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq14_instr6:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq14_instr7:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
# ----------------------------------===== lookupTable_seq15_instr0 [Optional] =====-----------------------------------
# Description: Offset: 0x00000170, Width: 16b; Lookup table holds Flash command sequences 15, instruction 0
lookupTable_seq15_instr0:
# ------------------------------------------===== OPERAND [Optional] =====------------------------------------------
# Description: Offset: 0b, Width: 8b, Instruction operand. Its values depends on used instruction
OPERAND: 0
# -----------------------------------------===== NUM_PADS [Optional] =====------------------------------------------
# Description: Offset: 8b, Width: 2b, Number of pads used by instruction. Some instructions ignores this parameter.
# - 1PAD, (0): Single mode. One pad is used.
# - 2PAD, (1): Dual mode. Two pads are used.
# - 4PAD, (2): Quad mode. Four pads are used.
# - 8PAD, (3): Octal mode. Eight pads are used.
# Possible options: <1PAD, 2PAD, 4PAD, 8PAD>
NUM_PADS: 1PAD
# --------------------------------------===== OPERATION_CODE [Optional] =====---------------------------------------
# Description: Offset: 10b, Width: 6b, Instruction operation code.
# - STOP, (0): Stop execution and de-assert CS. Then, the next command sequence (to the same flash device) starts
# from instruction pointer 0.
# - CMD_SDR, (1): Transmit command code to Flash.
# - RADDR_SDR, (2): Transmit row address to Flash.
# - CADDR_SDR, (3): Transmit column address to Flash.
# - MODE1_SDR, (4): Transmit mode bits to Flash.
# - MODE2_SDR, (5): Transmit mode bits to Flash.
# - MODE4_SDR, (6): Transmit mode bits to Flash.
# - MODE8_SDR, (7): Transmit mode bits to Flash.
# - WRITE_SDR, (8): Transmit program data to Flash device.
# - READ_SDR, (9): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_SDR, (10): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_SDR, (11): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_SDR, (12): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_SDR, (13): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# - JMP_ON_CS, (31): Stop execution, de-assert CS and save operand[7:0] as the instruction start pointer for next
# sequence.Normally this instruction is used to support Execute-In-Place enhanced mode. See XIP enhanced mode for
# more details.This instruction is only allowed for AHB read commands. There is interrupt status bit set
# (INTR[IPCMDERR] or INTR[AHBCMDERR]) when using this instruction in IP command or AHB write command.
# - CMD_DDR, (33): Transmit command code to Flash.
# - RADDR_DDR, (34): Transmit row address to Flash.
# - CADDR_DDR, (35): Transmit column address to Flash.
# - MODE1_DDR, (36): Transmit mode bits to Flash.
# - MODE2_DDR, (37): Transmit mode bits to Flash.
# - MODE4_DDR, (38): Transmit mode bits to Flash.
# - MODE8_DDR, (39): Transmit mode bits to Flash.
# - WRITE_DDR, (40): Transmit program data to Flash device.
# - READ_DDR, (41): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_DDR, (42): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_DDR, (43): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_DDR, (44): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_DDR, (45): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# Possible options: <STOP, CMD_SDR, RADDR_SDR, CADDR_SDR, MODE1_SDR, MODE2_SDR, MODE4_SDR, MODE8_SDR, WRITE_SDR,
# READ_SDR, LEARN_SDR, DATSZ_SDR, DUMMY_SDR, DUMMY_RWDS_SDR, JMP_ON_CS, CMD_DDR, RADDR_DDR, CADDR_DDR, MODE1_DDR,
# MODE2_DDR, MODE4_DDR, MODE8_DDR, WRITE_DDR, READ_DDR, LEARN_DDR, DATSZ_DDR, DUMMY_DDR, DUMMY_RWDS_DDR>
OPERATION_CODE: STOP
lookupTable_seq15_instr1:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq15_instr2:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq15_instr3:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq15_instr4:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq15_instr5:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq15_instr6:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq15_instr7:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
# ---------------------------------------===== lutCustomSeq_0 [Optional] =====----------------------------------------
# Description: Offset: 0x00000180, Width: 32b; [0x180-0x1af] Customizable LUT Sequences
lutCustomSeq_0:
# ------------------------------------------===== seqNum [Optional] =====-------------------------------------------
# Description: Offset: 0b, Width: 8b, Sequence Number, valid number: 1-16
seqNum: 0
# -------------------------------------------===== seqId [Optional] =====-------------------------------------------
# Description: Offset: 8b, Width: 8b, Sequence Index, valid number: 0-15
seqId: 0
# -----------------------------------------===== reserved [Optional] =====------------------------------------------
# Description: Offset: 16b, Width: 16b, N/A
reserved: 0
# ---------------------------------------===== lutCustomSeq_1 [Optional] =====----------------------------------------
# Description: Offset: 0x00000184, Width: 32b; [0x180-0x1af] Customizable LUT Sequences
lutCustomSeq_1:
# ------------------------------------------===== seqNum [Optional] =====-------------------------------------------
# Description: Offset: 0b, Width: 8b, Sequence Number, valid number: 1-16
seqNum: 0
# -------------------------------------------===== seqId [Optional] =====-------------------------------------------
# Description: Offset: 8b, Width: 8b, Sequence Index, valid number: 0-15
seqId: 0
# -----------------------------------------===== reserved [Optional] =====------------------------------------------
# Description: Offset: 16b, Width: 16b, N/A
reserved: 0
# ---------------------------------------===== lutCustomSeq_2 [Optional] =====----------------------------------------
# Description: Offset: 0x00000188, Width: 32b; [0x180-0x1af] Customizable LUT Sequences
lutCustomSeq_2:
# ------------------------------------------===== seqNum [Optional] =====-------------------------------------------
# Description: Offset: 0b, Width: 8b, Sequence Number, valid number: 1-16
seqNum: 0
# -------------------------------------------===== seqId [Optional] =====-------------------------------------------
# Description: Offset: 8b, Width: 8b, Sequence Index, valid number: 0-15
seqId: 0
# -----------------------------------------===== reserved [Optional] =====------------------------------------------
# Description: Offset: 16b, Width: 16b, N/A
reserved: 0
# ---------------------------------------===== lutCustomSeq_3 [Optional] =====----------------------------------------
# Description: Offset: 0x0000018C, Width: 32b; [0x180-0x1af] Customizable LUT Sequences
lutCustomSeq_3:
# ------------------------------------------===== seqNum [Optional] =====-------------------------------------------
# Description: Offset: 0b, Width: 8b, Sequence Number, valid number: 1-16
seqNum: 0
# -------------------------------------------===== seqId [Optional] =====-------------------------------------------
# Description: Offset: 8b, Width: 8b, Sequence Index, valid number: 0-15
seqId: 0
# -----------------------------------------===== reserved [Optional] =====------------------------------------------
# Description: Offset: 16b, Width: 16b, N/A
reserved: 0
# ---------------------------------------===== lutCustomSeq_4 [Optional] =====----------------------------------------
# Description: Offset: 0x00000190, Width: 32b; [0x180-0x1af] Customizable LUT Sequences
lutCustomSeq_4:
# ------------------------------------------===== seqNum [Optional] =====-------------------------------------------
# Description: Offset: 0b, Width: 8b, Sequence Number, valid number: 1-16
seqNum: 0
# -------------------------------------------===== seqId [Optional] =====-------------------------------------------
# Description: Offset: 8b, Width: 8b, Sequence Index, valid number: 0-15
seqId: 0
# -----------------------------------------===== reserved [Optional] =====------------------------------------------
# Description: Offset: 16b, Width: 16b, N/A
reserved: 0
# ---------------------------------------===== lutCustomSeq_5 [Optional] =====----------------------------------------
# Description: Offset: 0x00000194, Width: 32b; [0x180-0x1af] Customizable LUT Sequences
lutCustomSeq_5:
# ------------------------------------------===== seqNum [Optional] =====-------------------------------------------
# Description: Offset: 0b, Width: 8b, Sequence Number, valid number: 1-16
seqNum: 0
# -------------------------------------------===== seqId [Optional] =====-------------------------------------------
# Description: Offset: 8b, Width: 8b, Sequence Index, valid number: 0-15
seqId: 0
# -----------------------------------------===== reserved [Optional] =====------------------------------------------
# Description: Offset: 16b, Width: 16b, N/A
reserved: 0
# ---------------------------------------===== lutCustomSeq_6 [Optional] =====----------------------------------------
# Description: Offset: 0x00000198, Width: 32b; [0x180-0x1af] Customizable LUT Sequences
lutCustomSeq_6:
# ------------------------------------------===== seqNum [Optional] =====-------------------------------------------
# Description: Offset: 0b, Width: 8b, Sequence Number, valid number: 1-16
seqNum: 0
# -------------------------------------------===== seqId [Optional] =====-------------------------------------------
# Description: Offset: 8b, Width: 8b, Sequence Index, valid number: 0-15
seqId: 0
# -----------------------------------------===== reserved [Optional] =====------------------------------------------
# Description: Offset: 16b, Width: 16b, N/A
reserved: 0
# ---------------------------------------===== lutCustomSeq_7 [Optional] =====----------------------------------------
# Description: Offset: 0x0000019C, Width: 32b; [0x180-0x1af] Customizable LUT Sequences
lutCustomSeq_7:
# ------------------------------------------===== seqNum [Optional] =====-------------------------------------------
# Description: Offset: 0b, Width: 8b, Sequence Number, valid number: 1-16
seqNum: 0
# -------------------------------------------===== seqId [Optional] =====-------------------------------------------
# Description: Offset: 8b, Width: 8b, Sequence Index, valid number: 0-15
seqId: 0
# -----------------------------------------===== reserved [Optional] =====------------------------------------------
# Description: Offset: 16b, Width: 16b, N/A
reserved: 0
# ---------------------------------------===== lutCustomSeq_8 [Optional] =====----------------------------------------
# Description: Offset: 0x000001A0, Width: 32b; [0x180-0x1af] Customizable LUT Sequences
lutCustomSeq_8:
# ------------------------------------------===== seqNum [Optional] =====-------------------------------------------
# Description: Offset: 0b, Width: 8b, Sequence Number, valid number: 1-16
seqNum: 0
# -------------------------------------------===== seqId [Optional] =====-------------------------------------------
# Description: Offset: 8b, Width: 8b, Sequence Index, valid number: 0-15
seqId: 0
# -----------------------------------------===== reserved [Optional] =====------------------------------------------
# Description: Offset: 16b, Width: 16b, N/A
reserved: 0
# ---------------------------------------===== lutCustomSeq_9 [Optional] =====----------------------------------------
# Description: Offset: 0x000001A4, Width: 32b; [0x180-0x1af] Customizable LUT Sequences
lutCustomSeq_9:
# ------------------------------------------===== seqNum [Optional] =====-------------------------------------------
# Description: Offset: 0b, Width: 8b, Sequence Number, valid number: 1-16
seqNum: 0
# -------------------------------------------===== seqId [Optional] =====-------------------------------------------
# Description: Offset: 8b, Width: 8b, Sequence Index, valid number: 0-15
seqId: 0
# -----------------------------------------===== reserved [Optional] =====------------------------------------------
# Description: Offset: 16b, Width: 16b, N/A
reserved: 0
# ---------------------------------------===== lutCustomSeq_10 [Optional] =====---------------------------------------
# Description: Offset: 0x000001A8, Width: 32b; [0x180-0x1af] Customizable LUT Sequences
lutCustomSeq_10:
# ------------------------------------------===== seqNum [Optional] =====-------------------------------------------
# Description: Offset: 0b, Width: 8b, Sequence Number, valid number: 1-16
seqNum: 0
# -------------------------------------------===== seqId [Optional] =====-------------------------------------------
# Description: Offset: 8b, Width: 8b, Sequence Index, valid number: 0-15
seqId: 0
# -----------------------------------------===== reserved [Optional] =====------------------------------------------
# Description: Offset: 16b, Width: 16b, N/A
reserved: 0
# ---------------------------------------===== lutCustomSeq_11 [Optional] =====---------------------------------------
# Description: Offset: 0x000001AC, Width: 32b; [0x180-0x1af] Customizable LUT Sequences
lutCustomSeq_11:
# ------------------------------------------===== seqNum [Optional] =====-------------------------------------------
# Description: Offset: 0b, Width: 8b, Sequence Number, valid number: 1-16
seqNum: 0
# -------------------------------------------===== seqId [Optional] =====-------------------------------------------
# Description: Offset: 8b, Width: 8b, Sequence Index, valid number: 0-15
seqId: 0
# -----------------------------------------===== reserved [Optional] =====------------------------------------------
# Description: Offset: 16b, Width: 16b, N/A
reserved: 0
# -----------------------------------------===== reserved4_0 [Optional] =====-----------------------------------------
# Description: Offset: 0x000001B0, Width: 32b; [0x1b0-0x1bf] Reserved for future use
reserved4_0: '0x00000000'
# -----------------------------------------===== reserved4_1 [Optional] =====-----------------------------------------
# Description: Offset: 0x000001B4, Width: 32b; [0x1b0-0x1bf] Reserved for future use
reserved4_1: '0x00000000'
# -----------------------------------------===== reserved4_2 [Optional] =====-----------------------------------------
# Description: Offset: 0x000001B8, Width: 32b; [0x1b0-0x1bf] Reserved for future use
reserved4_2: '0x00000000'
# -----------------------------------------===== reserved4_3 [Optional] =====-----------------------------------------
# Description: Offset: 0x000001BC, Width: 32b; [0x1b0-0x1bf] Reserved for future use
reserved4_3: '0x00000000'
# ------------------------------------------===== pageSize [Optional] =====-------------------------------------------
# Description: Offset: 0x000001C0, Width: 32b; Page size of Serial NOR
pageSize: '0x00000000'
# -----------------------------------------===== sectorSize [Optional] =====------------------------------------------
# Description: Offset: 0x000001C4, Width: 32b; Sector size of Serial NOR
sectorSize: '0x00000000'
# -------------------------------------===== ipcmdSerialClkFreq [Optional] =====--------------------------------------
# Description: Offset: 0x000001C8, Width: 8b; Clock frequency for IP command
ipcmdSerialClkFreq: '0x00'
# -------------------------------------===== isUniformBlockSize [Optional] =====--------------------------------------
# Description: Offset: 0x000001C9, Width: 8b; Sector/Block size is the same
isUniformBlockSize: '0x00'
# -----------------------------------------===== reserved0_0 [Optional] =====-----------------------------------------
# Description: Offset: 0x000001CA, Width: 8b; Reserved for future use
reserved0_0: '0x00'
# -----------------------------------------===== reserved0_1 [Optional] =====-----------------------------------------
# Description: Offset: 0x000001CB, Width: 8b; Reserved for future use
reserved0_1: '0x00'
# ----------------------------------------===== serialNorType [Optional] =====----------------------------------------
# Description: Offset: 0x000001CC, Width: 8b; Serial NOR Flash type: 0/1/2/3
serialNorType: '0x00'
# --------------------------------------===== needExitNoCmdMode [Optional] =====--------------------------------------
# Description: Offset: 0x000001CD, Width: 8b; Need to exit NoCmd mode before other IP command
needExitNoCmdMode: '0x00'
# ------------------------------------===== halfClkForNonReadCmd [Optional] =====-------------------------------------
# Description: Offset: 0x000001CE, Width: 8b; Half the Serial Clock for non-read command: true/false
halfClkForNonReadCmd: '0x00'
# ------------------------------------===== needRestoreNoCmdMode [Optional] =====-------------------------------------
# Description: Offset: 0x000001CF, Width: 8b; Need to Restore NoCmd mode after IP command execution
needRestoreNoCmdMode: '0x00'
# ------------------------------------------===== blockSize [Optional] =====------------------------------------------
# Description: Offset: 0x000001D0, Width: 32b; Block size
blockSize: '0x00000000'
# -----------------------------------------===== reserve2_0 [Optional] =====------------------------------------------
# Description: Offset: 0x000001D4, Width: 32b; Reserved for future use
reserve2_0: '0x00000000'
# -----------------------------------------===== reserve2_1 [Optional] =====------------------------------------------
# Description: Offset: 0x000001D8, Width: 32b; Reserved for future use
reserve2_1: '0x00000000'
# -----------------------------------------===== reserve2_2 [Optional] =====------------------------------------------
# Description: Offset: 0x000001DC, Width: 32b; Reserved for future use
reserve2_2: '0x00000000'
# -----------------------------------------===== reserve2_3 [Optional] =====------------------------------------------
# Description: Offset: 0x000001E0, Width: 32b; Reserved for future use
reserve2_3: '0x00000000'
# -----------------------------------------===== reserve2_4 [Optional] =====------------------------------------------
# Description: Offset: 0x000001E4, Width: 32b; Reserved for future use
reserve2_4: '0x00000000'
# -----------------------------------------===== reserve2_5 [Optional] =====------------------------------------------
# Description: Offset: 0x000001E8, Width: 32b; Reserved for future use
reserve2_5: '0x00000000'
# -----------------------------------------===== reserve2_6 [Optional] =====------------------------------------------
# Description: Offset: 0x000001EC, Width: 32b; Reserved for future use
reserve2_6: '0x00000000'
# -----------------------------------------===== reserve2_7 [Optional] =====------------------------------------------
# Description: Offset: 0x000001F0, Width: 32b; Reserved for future use
reserve2_7: '0x00000000'
# -----------------------------------------===== reserve2_8 [Optional] =====------------------------------------------
# Description: Offset: 0x000001F4, Width: 32b; Reserved for future use
reserve2_8: '0x00000000'
# -----------------------------------------===== reserve2_9 [Optional] =====------------------------------------------
# Description: Offset: 0x000001F8, Width: 32b; Reserved for future use
reserve2_9: '0x00000000'
# -----------------------------------------===== reserve2_10 [Optional] =====-----------------------------------------
# Description: Offset: 0x000001FC, Width: 32b; Reserved for future use
reserve2_10: '0x00000000'
FCB for mimxrt1043, Revision: a0 and flexspi_nor#
FCB for mimxrt1043, Revision: a0 and flexspi_nor JSON schema
FCB for mimxrt1043, Revision: a0 and flexspi_nor YAML configuration template
# ================================= FCB for mimxrt1043, Revision: a0 and flexspi_nor =================================
# ======================================================================================================================
# == FCB for mimxrt1043, Revision: a0 and flexspi_nor ==
# ======================================================================================================================
# -------------------------------------===== The chip family name [Required] =====--------------------------------------
# Description: NXP chip family identifier.
family: CHOOSE_FROM_TABLE
# -----------------------------------------===== MCU revision [Optional] =====------------------------------------------
# Description: Revision of silicon. The 'latest' name, means most current revision.
# Possible options: <a0, latest>
revision: a0
# ------------------------------------------===== Memory type [Required] =====------------------------------------------
# Description: Specify type of memory used by FCB description.
# Possible options: <flexspi_nor>
type: flexspi_nor
# ------------------------------------------===== mimxrt1043 [Required] =====-------------------------------------------
fcb_settings:
# ---------------------------------------------===== tag [Optional] =====---------------------------------------------
# Description: Offset: 0x00000000, Width: 32b; [0x000-0x003] Tag, fixed value 0x42464346UL
tag: '0x42464346'
# -------------------------------------------===== version [Optional] =====-------------------------------------------
# Description: Offset: 0x00000004, Width: 32b; [0x004-0x007] Version,[31:24] -'V', [23:16] - Major, [15:8] - Minor,
# [7:0] - bugfix
version: '0x56010400'
# ------------------------------------------===== reserved0 [Optional] =====------------------------------------------
# Description: Offset: 0x00000008, Width: 32b; [0x008-0x00b] Reserved for future use
reserved0: '0x00000000'
# --------------------------------------===== readSampleClkSrc [Optional] =====---------------------------------------
# Description: Offset: 0x0000000C, Width: 8b; [0x00c-0x00c] Read Sample Clock Source, valid value: 0/1/3
readSampleClkSrc: '0x00'
# -----------------------------------------===== csHoldTime [Optional] =====------------------------------------------
# Description: Offset: 0x0000000D, Width: 8b; [0x00d-0x00d] CS hold time, default value: 3
csHoldTime: '0x00'
# -----------------------------------------===== csSetupTime [Optional] =====-----------------------------------------
# Description: Offset: 0x0000000E, Width: 8b; [0x00e-0x00e] CS setup time, default value: 3
csSetupTime: '0x00'
# -------------------------------------===== columnAddressWidth [Optional] =====--------------------------------------
# Description: Offset: 0x0000000F, Width: 8b; [0x00f-0x00f] Column Address with, for HyperBus protocol, it is fixed
# to 3, For Serial NAND, need to refer to datasheet
columnAddressWidth: '0x00'
# -------------------------------------===== deviceModeCfgEnable [Optional] =====-------------------------------------
# Description: Offset: 0x00000010, Width: 8b; [0x010-0x010] Device Mode Configure enable flag, 1 - Enable, 0 -
# Disable
deviceModeCfgEnable: '0x00'
# ---------------------------------------===== deviceModeType [Optional] =====----------------------------------------
# Description: Offset: 0x00000011, Width: 8b; [0x011-0x011] Specify the configuration command type:Quad Enable,
# DPI/QPI/OPI switch, Generic configuration, etc.
deviceModeType: '0x00'
# -------------------------------------===== waitTimeCfgCommands [Optional] =====-------------------------------------
# Description: Offset: 0x00000012, Width: 16b; [0x012-0x013] Wait time for all configuration commands, unit: 100us,
# Used for DPI/QPI/OPI switch or reset command
waitTimeCfgCommands: '0x0000'
# ----------------------------------------===== deviceModeSeq [Optional] =====----------------------------------------
# Description: Offset: 0x00000014, Width: 32b; [0x014-0x017] Device mode sequence info, [7:0] - LUT sequence id,
# [15:8] - LUt sequence number, [31:16] Reserved
deviceModeSeq:
# ------------------------------------------===== seqNum [Optional] =====-------------------------------------------
# Description: Offset: 0b, Width: 8b, Sequence Number, valid number: 1-16
seqNum: 0
# -------------------------------------------===== seqId [Optional] =====-------------------------------------------
# Description: Offset: 8b, Width: 8b, Sequence Index, valid number: 0-15
seqId: 0
# -----------------------------------------===== reserved [Optional] =====------------------------------------------
# Description: Offset: 16b, Width: 16b, N/A
reserved: 0
# ----------------------------------------===== deviceModeArg [Optional] =====----------------------------------------
# Description: Offset: 0x00000018, Width: 32b; [0x018-0x01b] Argument/Parameter for device configuration
deviceModeArg: '0x00000000'
# ---------------------------------------===== configCmdEnable [Optional] =====---------------------------------------
# Description: Offset: 0x0000001C, Width: 8b; [0x01c-0x01c] Configure command Enable Flag, 1 - Enable, 0 - Disable
configCmdEnable: '0x00'
# --------------------------------------===== configModeType_0 [Optional] =====---------------------------------------
# Description: Offset: 0x0000001D, Width: 8b; [0x01d-0x01f] Configure Mode Type, similar as deviceModeTpe
configModeType_0: '0x00'
# --------------------------------------===== configModeType_1 [Optional] =====---------------------------------------
# Description: Offset: 0x0000001E, Width: 8b; [0x01d-0x01f] Configure Mode Type, similar as deviceModeTpe
configModeType_1: '0x00'
# --------------------------------------===== configModeType_2 [Optional] =====---------------------------------------
# Description: Offset: 0x0000001F, Width: 8b; [0x01d-0x01f] Configure Mode Type, similar as deviceModeTpe
configModeType_2: '0x00'
# ---------------------------------------===== configCmdSeqs_0 [Optional] =====---------------------------------------
# Description: Offset: 0x00000020, Width: 32b; [0x020-0x02b] Sequence info for Device Configuration command, similar
# as deviceModeSeq
configCmdSeqs_0:
# ------------------------------------------===== seqNum [Optional] =====-------------------------------------------
# Description: Offset: 0b, Width: 8b, Sequence Number, valid number: 1-16
seqNum: 0
# -------------------------------------------===== seqId [Optional] =====-------------------------------------------
# Description: Offset: 8b, Width: 8b, Sequence Index, valid number: 0-15
seqId: 0
# -----------------------------------------===== reserved [Optional] =====------------------------------------------
# Description: Offset: 16b, Width: 16b, N/A
reserved: 0
# ---------------------------------------===== configCmdSeqs_1 [Optional] =====---------------------------------------
# Description: Offset: 0x00000024, Width: 32b; [0x020-0x02b] Sequence info for Device Configuration command, similar
# as deviceModeSeq
configCmdSeqs_1:
# ------------------------------------------===== seqNum [Optional] =====-------------------------------------------
# Description: Offset: 0b, Width: 8b, Sequence Number, valid number: 1-16
seqNum: 0
# -------------------------------------------===== seqId [Optional] =====-------------------------------------------
# Description: Offset: 8b, Width: 8b, Sequence Index, valid number: 0-15
seqId: 0
# -----------------------------------------===== reserved [Optional] =====------------------------------------------
# Description: Offset: 16b, Width: 16b, N/A
reserved: 0
# ---------------------------------------===== configCmdSeqs_2 [Optional] =====---------------------------------------
# Description: Offset: 0x00000028, Width: 32b; [0x020-0x02b] Sequence info for Device Configuration command, similar
# as deviceModeSeq
configCmdSeqs_2:
# ------------------------------------------===== seqNum [Optional] =====-------------------------------------------
# Description: Offset: 0b, Width: 8b, Sequence Number, valid number: 1-16
seqNum: 0
# -------------------------------------------===== seqId [Optional] =====-------------------------------------------
# Description: Offset: 8b, Width: 8b, Sequence Index, valid number: 0-15
seqId: 0
# -----------------------------------------===== reserved [Optional] =====------------------------------------------
# Description: Offset: 16b, Width: 16b, N/A
reserved: 0
# ------------------------------------------===== reserved1 [Optional] =====------------------------------------------
# Description: Offset: 0x0000002C, Width: 32b; [0x02c-0x02f] Reserved for future use
reserved1: '0x00000000'
# ---------------------------------------===== configCmdArgs_0 [Optional] =====---------------------------------------
# Description: Offset: 0x00000030, Width: 32b; [0x030-0x03b] Arguments/Parameters for device Configuration commands
configCmdArgs_0: '0x00000000'
# ---------------------------------------===== configCmdArgs_1 [Optional] =====---------------------------------------
# Description: Offset: 0x00000034, Width: 32b; [0x030-0x03b] Arguments/Parameters for device Configuration commands
configCmdArgs_1: '0x00000000'
# ---------------------------------------===== configCmdArgs_2 [Optional] =====---------------------------------------
# Description: Offset: 0x00000038, Width: 32b; [0x030-0x03b] Arguments/Parameters for device Configuration commands
configCmdArgs_2: '0x00000000'
# ------------------------------------------===== reserved2 [Optional] =====------------------------------------------
# Description: Offset: 0x0000003C, Width: 32b; [0x03c-0x03f] Reserved for future use
reserved2: '0x00000000'
# ------------------------------------===== controllerMiscOption [Optional] =====-------------------------------------
# Description: Offset: 0x00000040, Width: 32b; [0x040-0x043] Controller Misc Options, see Misc feature bit
# definitions for more details
controllerMiscOption: '0x00000000'
# -----------------------------------------===== deviceType [Optional] =====------------------------------------------
# Description: Offset: 0x00000044, Width: 8b; [0x044-0x044] Device Type: See Flash Type Definition for more details
deviceType: '0x00'
# ----------------------------------------===== sflashPadType [Optional] =====----------------------------------------
# Description: Offset: 0x00000045, Width: 8b; [0x045-0x045] Serial Flash Pad Type: 1 - Single, 2 - Dual, 4 - Quad, 8
# - Octal
sflashPadType: '0x00'
# ----------------------------------------===== serialClkFreq [Optional] =====----------------------------------------
# Description: Offset: 0x00000046, Width: 8b; [0x046-0x046] Serial Flash Frequency, device specific definitions, See
# System Boot Chapter for more details
serialClkFreq: '0x00'
# -------------------------------------===== lutCustomSeqEnable [Optional] =====--------------------------------------
# Description: Offset: 0x00000047, Width: 8b; [0x047-0x047] LUT customization Enable, it is required if the
# program/erase cannot be done using 1 LUT sequence, currently, only applicable to HyperFLASH
lutCustomSeqEnable: '0x00'
# -----------------------------------------===== reserved3_0 [Optional] =====-----------------------------------------
# Description: Offset: 0x00000048, Width: 32b; [0x048-0x04f] Reserved for future use
reserved3_0: '0x00000000'
# -----------------------------------------===== reserved3_1 [Optional] =====-----------------------------------------
# Description: Offset: 0x0000004C, Width: 32b; [0x048-0x04f] Reserved for future use
reserved3_1: '0x00000000'
# ----------------------------------------===== sflashA1Size [Optional] =====-----------------------------------------
# Description: Offset: 0x00000050, Width: 32b; [0x050-0x053] Size of Flash connected to A1
sflashA1Size: '0x00000000'
# ----------------------------------------===== sflashA2Size [Optional] =====-----------------------------------------
# Description: Offset: 0x00000054, Width: 32b; [0x054-0x057] Size of Flash connected to A2
sflashA2Size: '0x00000000'
# ----------------------------------------===== sflashB1Size [Optional] =====-----------------------------------------
# Description: Offset: 0x00000058, Width: 32b; [0x058-0x05b] Size of Flash connected to B1
sflashB1Size: '0x00000000'
# ----------------------------------------===== sflashB2Size [Optional] =====-----------------------------------------
# Description: Offset: 0x0000005C, Width: 32b; [0x05c-0x05f] Size of Flash connected to B2
sflashB2Size: '0x00000000'
# ------------------------------------===== csPadSettingOverride [Optional] =====-------------------------------------
# Description: Offset: 0x00000060, Width: 32b; [0x060-0x063] CS pad setting override value
csPadSettingOverride: '0x00000000'
# -----------------------------------===== sclkPadSettingOverride [Optional] =====------------------------------------
# Description: Offset: 0x00000064, Width: 32b; [0x064-0x067] SCK pad setting override value
sclkPadSettingOverride: '0x00000000'
# -----------------------------------===== dataPadSettingOverride [Optional] =====------------------------------------
# Description: Offset: 0x00000068, Width: 32b; [0x068-0x06b] data pad setting override value
dataPadSettingOverride: '0x00000000'
# ------------------------------------===== dqsPadSettingOverride [Optional] =====------------------------------------
# Description: Offset: 0x0000006C, Width: 32b; [0x06c-0x06f] DQS pad setting override value
dqsPadSettingOverride: '0x00000000'
# -----------------------------------------===== timeoutInMs [Optional] =====-----------------------------------------
# Description: Offset: 0x00000070, Width: 32b; [0x070-0x073] Timeout threshold for read status command
timeoutInMs: '0x00000000'
# ---------------------------------------===== commandInterval [Optional] =====---------------------------------------
# Description: Offset: 0x00000074, Width: 32b; [0x074-0x077] CS deselect interval between two commands
commandInterval: '0x00000000'
# ---------------------------------------===== dataValidTime_0 [Optional] =====---------------------------------------
# Description: Offset: 0x00000078, Width: 16b; [0x078-0x07b] CLK edge to data valid time for PORT A and PORT B, in
# terms of 0.1ns
dataValidTime_0: '0x0000'
# ---------------------------------------===== dataValidTime_1 [Optional] =====---------------------------------------
# Description: Offset: 0x0000007A, Width: 16b; [0x078-0x07b] CLK edge to data valid time for PORT A and PORT B, in
# terms of 0.1ns
dataValidTime_1: '0x0000'
# -----------------------------------------===== busyOffset [Optional] =====------------------------------------------
# Description: Offset: 0x0000007C, Width: 16b; [0x07c-0x07d] Busy offset, valid value: 0-31
busyOffset: '0x0000'
# ---------------------------------------===== busyBitPolarity [Optional] =====---------------------------------------
# Description: Offset: 0x0000007E, Width: 16b; [0x07e-0x07f] Busy flag polarity, 0 - busy flag is 1 when flash device
# is busy, 1 - busy flag is 0 when flash device is busy
busyBitPolarity: '0x0000'
# -----------------------------------===== lookupTable_seq0_instr0 [Optional] =====-----------------------------------
# Description: Offset: 0x00000080, Width: 16b; Lookup table holds Flash command sequences 0, instruction 0
lookupTable_seq0_instr0:
# ------------------------------------------===== OPERAND [Optional] =====------------------------------------------
# Description: Offset: 0b, Width: 8b, Instruction operand. Its values depends on used instruction
OPERAND: 0
# -----------------------------------------===== NUM_PADS [Optional] =====------------------------------------------
# Description: Offset: 8b, Width: 2b, Number of pads used by instruction. Some instructions ignores this parameter.
# - 1PAD, (0): Single mode. One pad is used.
# - 2PAD, (1): Dual mode. Two pads are used.
# - 4PAD, (2): Quad mode. Four pads are used.
# - 8PAD, (3): Octal mode. Eight pads are used.
# Possible options: <1PAD, 2PAD, 4PAD, 8PAD>
NUM_PADS: 1PAD
# --------------------------------------===== OPERATION_CODE [Optional] =====---------------------------------------
# Description: Offset: 10b, Width: 6b, Instruction operation code.
# - STOP, (0): Stop execution and de-assert CS. Then, the next command sequence (to the same flash device) starts
# from instruction pointer 0.
# - CMD_SDR, (1): Transmit command code to Flash.
# - RADDR_SDR, (2): Transmit row address to Flash.
# - CADDR_SDR, (3): Transmit column address to Flash.
# - MODE1_SDR, (4): Transmit mode bits to Flash.
# - MODE2_SDR, (5): Transmit mode bits to Flash.
# - MODE4_SDR, (6): Transmit mode bits to Flash.
# - MODE8_SDR, (7): Transmit mode bits to Flash.
# - WRITE_SDR, (8): Transmit program data to Flash device.
# - READ_SDR, (9): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_SDR, (10): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_SDR, (11): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_SDR, (12): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_SDR, (13): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# - JMP_ON_CS, (31): Stop execution, de-assert CS and save operand[7:0] as the instruction start pointer for next
# sequence.Normally this instruction is used to support Execute-In-Place enhanced mode. See XIP enhanced mode for
# more details.This instruction is only allowed for AHB read commands. There is interrupt status bit set
# (INTR[IPCMDERR] or INTR[AHBCMDERR]) when using this instruction in IP command or AHB write command.
# - CMD_DDR, (33): Transmit command code to Flash.
# - RADDR_DDR, (34): Transmit row address to Flash.
# - CADDR_DDR, (35): Transmit column address to Flash.
# - MODE1_DDR, (36): Transmit mode bits to Flash.
# - MODE2_DDR, (37): Transmit mode bits to Flash.
# - MODE4_DDR, (38): Transmit mode bits to Flash.
# - MODE8_DDR, (39): Transmit mode bits to Flash.
# - WRITE_DDR, (40): Transmit program data to Flash device.
# - READ_DDR, (41): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_DDR, (42): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_DDR, (43): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_DDR, (44): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_DDR, (45): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# Possible options: <STOP, CMD_SDR, RADDR_SDR, CADDR_SDR, MODE1_SDR, MODE2_SDR, MODE4_SDR, MODE8_SDR, WRITE_SDR,
# READ_SDR, LEARN_SDR, DATSZ_SDR, DUMMY_SDR, DUMMY_RWDS_SDR, JMP_ON_CS, CMD_DDR, RADDR_DDR, CADDR_DDR, MODE1_DDR,
# MODE2_DDR, MODE4_DDR, MODE8_DDR, WRITE_DDR, READ_DDR, LEARN_DDR, DATSZ_DDR, DUMMY_DDR, DUMMY_RWDS_DDR>
OPERATION_CODE: STOP
lookupTable_seq0_instr1:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq0_instr2:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq0_instr3:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq0_instr4:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq0_instr5:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq0_instr6:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq0_instr7:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
# -----------------------------------===== lookupTable_seq1_instr0 [Optional] =====-----------------------------------
# Description: Offset: 0x00000090, Width: 16b; Lookup table holds Flash command sequences 1, instruction 0
lookupTable_seq1_instr0:
# ------------------------------------------===== OPERAND [Optional] =====------------------------------------------
# Description: Offset: 0b, Width: 8b, Instruction operand. Its values depends on used instruction
OPERAND: 0
# -----------------------------------------===== NUM_PADS [Optional] =====------------------------------------------
# Description: Offset: 8b, Width: 2b, Number of pads used by instruction. Some instructions ignores this parameter.
# - 1PAD, (0): Single mode. One pad is used.
# - 2PAD, (1): Dual mode. Two pads are used.
# - 4PAD, (2): Quad mode. Four pads are used.
# - 8PAD, (3): Octal mode. Eight pads are used.
# Possible options: <1PAD, 2PAD, 4PAD, 8PAD>
NUM_PADS: 1PAD
# --------------------------------------===== OPERATION_CODE [Optional] =====---------------------------------------
# Description: Offset: 10b, Width: 6b, Instruction operation code.
# - STOP, (0): Stop execution and de-assert CS. Then, the next command sequence (to the same flash device) starts
# from instruction pointer 0.
# - CMD_SDR, (1): Transmit command code to Flash.
# - RADDR_SDR, (2): Transmit row address to Flash.
# - CADDR_SDR, (3): Transmit column address to Flash.
# - MODE1_SDR, (4): Transmit mode bits to Flash.
# - MODE2_SDR, (5): Transmit mode bits to Flash.
# - MODE4_SDR, (6): Transmit mode bits to Flash.
# - MODE8_SDR, (7): Transmit mode bits to Flash.
# - WRITE_SDR, (8): Transmit program data to Flash device.
# - READ_SDR, (9): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_SDR, (10): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_SDR, (11): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_SDR, (12): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_SDR, (13): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# - JMP_ON_CS, (31): Stop execution, de-assert CS and save operand[7:0] as the instruction start pointer for next
# sequence.Normally this instruction is used to support Execute-In-Place enhanced mode. See XIP enhanced mode for
# more details.This instruction is only allowed for AHB read commands. There is interrupt status bit set
# (INTR[IPCMDERR] or INTR[AHBCMDERR]) when using this instruction in IP command or AHB write command.
# - CMD_DDR, (33): Transmit command code to Flash.
# - RADDR_DDR, (34): Transmit row address to Flash.
# - CADDR_DDR, (35): Transmit column address to Flash.
# - MODE1_DDR, (36): Transmit mode bits to Flash.
# - MODE2_DDR, (37): Transmit mode bits to Flash.
# - MODE4_DDR, (38): Transmit mode bits to Flash.
# - MODE8_DDR, (39): Transmit mode bits to Flash.
# - WRITE_DDR, (40): Transmit program data to Flash device.
# - READ_DDR, (41): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_DDR, (42): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_DDR, (43): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_DDR, (44): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_DDR, (45): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# Possible options: <STOP, CMD_SDR, RADDR_SDR, CADDR_SDR, MODE1_SDR, MODE2_SDR, MODE4_SDR, MODE8_SDR, WRITE_SDR,
# READ_SDR, LEARN_SDR, DATSZ_SDR, DUMMY_SDR, DUMMY_RWDS_SDR, JMP_ON_CS, CMD_DDR, RADDR_DDR, CADDR_DDR, MODE1_DDR,
# MODE2_DDR, MODE4_DDR, MODE8_DDR, WRITE_DDR, READ_DDR, LEARN_DDR, DATSZ_DDR, DUMMY_DDR, DUMMY_RWDS_DDR>
OPERATION_CODE: STOP
lookupTable_seq1_instr1:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq1_instr2:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq1_instr3:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq1_instr4:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq1_instr5:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq1_instr6:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq1_instr7:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
# -----------------------------------===== lookupTable_seq2_instr0 [Optional] =====-----------------------------------
# Description: Offset: 0x000000A0, Width: 16b; Lookup table holds Flash command sequences 2, instruction 0
lookupTable_seq2_instr0:
# ------------------------------------------===== OPERAND [Optional] =====------------------------------------------
# Description: Offset: 0b, Width: 8b, Instruction operand. Its values depends on used instruction
OPERAND: 0
# -----------------------------------------===== NUM_PADS [Optional] =====------------------------------------------
# Description: Offset: 8b, Width: 2b, Number of pads used by instruction. Some instructions ignores this parameter.
# - 1PAD, (0): Single mode. One pad is used.
# - 2PAD, (1): Dual mode. Two pads are used.
# - 4PAD, (2): Quad mode. Four pads are used.
# - 8PAD, (3): Octal mode. Eight pads are used.
# Possible options: <1PAD, 2PAD, 4PAD, 8PAD>
NUM_PADS: 1PAD
# --------------------------------------===== OPERATION_CODE [Optional] =====---------------------------------------
# Description: Offset: 10b, Width: 6b, Instruction operation code.
# - STOP, (0): Stop execution and de-assert CS. Then, the next command sequence (to the same flash device) starts
# from instruction pointer 0.
# - CMD_SDR, (1): Transmit command code to Flash.
# - RADDR_SDR, (2): Transmit row address to Flash.
# - CADDR_SDR, (3): Transmit column address to Flash.
# - MODE1_SDR, (4): Transmit mode bits to Flash.
# - MODE2_SDR, (5): Transmit mode bits to Flash.
# - MODE4_SDR, (6): Transmit mode bits to Flash.
# - MODE8_SDR, (7): Transmit mode bits to Flash.
# - WRITE_SDR, (8): Transmit program data to Flash device.
# - READ_SDR, (9): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_SDR, (10): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_SDR, (11): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_SDR, (12): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_SDR, (13): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# - JMP_ON_CS, (31): Stop execution, de-assert CS and save operand[7:0] as the instruction start pointer for next
# sequence.Normally this instruction is used to support Execute-In-Place enhanced mode. See XIP enhanced mode for
# more details.This instruction is only allowed for AHB read commands. There is interrupt status bit set
# (INTR[IPCMDERR] or INTR[AHBCMDERR]) when using this instruction in IP command or AHB write command.
# - CMD_DDR, (33): Transmit command code to Flash.
# - RADDR_DDR, (34): Transmit row address to Flash.
# - CADDR_DDR, (35): Transmit column address to Flash.
# - MODE1_DDR, (36): Transmit mode bits to Flash.
# - MODE2_DDR, (37): Transmit mode bits to Flash.
# - MODE4_DDR, (38): Transmit mode bits to Flash.
# - MODE8_DDR, (39): Transmit mode bits to Flash.
# - WRITE_DDR, (40): Transmit program data to Flash device.
# - READ_DDR, (41): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_DDR, (42): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_DDR, (43): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_DDR, (44): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_DDR, (45): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# Possible options: <STOP, CMD_SDR, RADDR_SDR, CADDR_SDR, MODE1_SDR, MODE2_SDR, MODE4_SDR, MODE8_SDR, WRITE_SDR,
# READ_SDR, LEARN_SDR, DATSZ_SDR, DUMMY_SDR, DUMMY_RWDS_SDR, JMP_ON_CS, CMD_DDR, RADDR_DDR, CADDR_DDR, MODE1_DDR,
# MODE2_DDR, MODE4_DDR, MODE8_DDR, WRITE_DDR, READ_DDR, LEARN_DDR, DATSZ_DDR, DUMMY_DDR, DUMMY_RWDS_DDR>
OPERATION_CODE: STOP
lookupTable_seq2_instr1:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq2_instr2:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq2_instr3:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq2_instr4:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq2_instr5:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq2_instr6:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq2_instr7:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
# -----------------------------------===== lookupTable_seq3_instr0 [Optional] =====-----------------------------------
# Description: Offset: 0x000000B0, Width: 16b; Lookup table holds Flash command sequences 3, instruction 0
lookupTable_seq3_instr0:
# ------------------------------------------===== OPERAND [Optional] =====------------------------------------------
# Description: Offset: 0b, Width: 8b, Instruction operand. Its values depends on used instruction
OPERAND: 0
# -----------------------------------------===== NUM_PADS [Optional] =====------------------------------------------
# Description: Offset: 8b, Width: 2b, Number of pads used by instruction. Some instructions ignores this parameter.
# - 1PAD, (0): Single mode. One pad is used.
# - 2PAD, (1): Dual mode. Two pads are used.
# - 4PAD, (2): Quad mode. Four pads are used.
# - 8PAD, (3): Octal mode. Eight pads are used.
# Possible options: <1PAD, 2PAD, 4PAD, 8PAD>
NUM_PADS: 1PAD
# --------------------------------------===== OPERATION_CODE [Optional] =====---------------------------------------
# Description: Offset: 10b, Width: 6b, Instruction operation code.
# - STOP, (0): Stop execution and de-assert CS. Then, the next command sequence (to the same flash device) starts
# from instruction pointer 0.
# - CMD_SDR, (1): Transmit command code to Flash.
# - RADDR_SDR, (2): Transmit row address to Flash.
# - CADDR_SDR, (3): Transmit column address to Flash.
# - MODE1_SDR, (4): Transmit mode bits to Flash.
# - MODE2_SDR, (5): Transmit mode bits to Flash.
# - MODE4_SDR, (6): Transmit mode bits to Flash.
# - MODE8_SDR, (7): Transmit mode bits to Flash.
# - WRITE_SDR, (8): Transmit program data to Flash device.
# - READ_SDR, (9): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_SDR, (10): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_SDR, (11): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_SDR, (12): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_SDR, (13): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# - JMP_ON_CS, (31): Stop execution, de-assert CS and save operand[7:0] as the instruction start pointer for next
# sequence.Normally this instruction is used to support Execute-In-Place enhanced mode. See XIP enhanced mode for
# more details.This instruction is only allowed for AHB read commands. There is interrupt status bit set
# (INTR[IPCMDERR] or INTR[AHBCMDERR]) when using this instruction in IP command or AHB write command.
# - CMD_DDR, (33): Transmit command code to Flash.
# - RADDR_DDR, (34): Transmit row address to Flash.
# - CADDR_DDR, (35): Transmit column address to Flash.
# - MODE1_DDR, (36): Transmit mode bits to Flash.
# - MODE2_DDR, (37): Transmit mode bits to Flash.
# - MODE4_DDR, (38): Transmit mode bits to Flash.
# - MODE8_DDR, (39): Transmit mode bits to Flash.
# - WRITE_DDR, (40): Transmit program data to Flash device.
# - READ_DDR, (41): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_DDR, (42): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_DDR, (43): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_DDR, (44): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_DDR, (45): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# Possible options: <STOP, CMD_SDR, RADDR_SDR, CADDR_SDR, MODE1_SDR, MODE2_SDR, MODE4_SDR, MODE8_SDR, WRITE_SDR,
# READ_SDR, LEARN_SDR, DATSZ_SDR, DUMMY_SDR, DUMMY_RWDS_SDR, JMP_ON_CS, CMD_DDR, RADDR_DDR, CADDR_DDR, MODE1_DDR,
# MODE2_DDR, MODE4_DDR, MODE8_DDR, WRITE_DDR, READ_DDR, LEARN_DDR, DATSZ_DDR, DUMMY_DDR, DUMMY_RWDS_DDR>
OPERATION_CODE: STOP
lookupTable_seq3_instr1:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq3_instr2:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq3_instr3:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq3_instr4:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq3_instr5:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq3_instr6:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq3_instr7:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
# -----------------------------------===== lookupTable_seq4_instr0 [Optional] =====-----------------------------------
# Description: Offset: 0x000000C0, Width: 16b; Lookup table holds Flash command sequences 4, instruction 0
lookupTable_seq4_instr0:
# ------------------------------------------===== OPERAND [Optional] =====------------------------------------------
# Description: Offset: 0b, Width: 8b, Instruction operand. Its values depends on used instruction
OPERAND: 0
# -----------------------------------------===== NUM_PADS [Optional] =====------------------------------------------
# Description: Offset: 8b, Width: 2b, Number of pads used by instruction. Some instructions ignores this parameter.
# - 1PAD, (0): Single mode. One pad is used.
# - 2PAD, (1): Dual mode. Two pads are used.
# - 4PAD, (2): Quad mode. Four pads are used.
# - 8PAD, (3): Octal mode. Eight pads are used.
# Possible options: <1PAD, 2PAD, 4PAD, 8PAD>
NUM_PADS: 1PAD
# --------------------------------------===== OPERATION_CODE [Optional] =====---------------------------------------
# Description: Offset: 10b, Width: 6b, Instruction operation code.
# - STOP, (0): Stop execution and de-assert CS. Then, the next command sequence (to the same flash device) starts
# from instruction pointer 0.
# - CMD_SDR, (1): Transmit command code to Flash.
# - RADDR_SDR, (2): Transmit row address to Flash.
# - CADDR_SDR, (3): Transmit column address to Flash.
# - MODE1_SDR, (4): Transmit mode bits to Flash.
# - MODE2_SDR, (5): Transmit mode bits to Flash.
# - MODE4_SDR, (6): Transmit mode bits to Flash.
# - MODE8_SDR, (7): Transmit mode bits to Flash.
# - WRITE_SDR, (8): Transmit program data to Flash device.
# - READ_SDR, (9): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_SDR, (10): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_SDR, (11): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_SDR, (12): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_SDR, (13): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# - JMP_ON_CS, (31): Stop execution, de-assert CS and save operand[7:0] as the instruction start pointer for next
# sequence.Normally this instruction is used to support Execute-In-Place enhanced mode. See XIP enhanced mode for
# more details.This instruction is only allowed for AHB read commands. There is interrupt status bit set
# (INTR[IPCMDERR] or INTR[AHBCMDERR]) when using this instruction in IP command or AHB write command.
# - CMD_DDR, (33): Transmit command code to Flash.
# - RADDR_DDR, (34): Transmit row address to Flash.
# - CADDR_DDR, (35): Transmit column address to Flash.
# - MODE1_DDR, (36): Transmit mode bits to Flash.
# - MODE2_DDR, (37): Transmit mode bits to Flash.
# - MODE4_DDR, (38): Transmit mode bits to Flash.
# - MODE8_DDR, (39): Transmit mode bits to Flash.
# - WRITE_DDR, (40): Transmit program data to Flash device.
# - READ_DDR, (41): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_DDR, (42): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_DDR, (43): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_DDR, (44): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_DDR, (45): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# Possible options: <STOP, CMD_SDR, RADDR_SDR, CADDR_SDR, MODE1_SDR, MODE2_SDR, MODE4_SDR, MODE8_SDR, WRITE_SDR,
# READ_SDR, LEARN_SDR, DATSZ_SDR, DUMMY_SDR, DUMMY_RWDS_SDR, JMP_ON_CS, CMD_DDR, RADDR_DDR, CADDR_DDR, MODE1_DDR,
# MODE2_DDR, MODE4_DDR, MODE8_DDR, WRITE_DDR, READ_DDR, LEARN_DDR, DATSZ_DDR, DUMMY_DDR, DUMMY_RWDS_DDR>
OPERATION_CODE: STOP
lookupTable_seq4_instr1:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq4_instr2:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq4_instr3:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq4_instr4:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq4_instr5:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq4_instr6:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq4_instr7:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
# -----------------------------------===== lookupTable_seq5_instr0 [Optional] =====-----------------------------------
# Description: Offset: 0x000000D0, Width: 16b; Lookup table holds Flash command sequences 5, instruction 0
lookupTable_seq5_instr0:
# ------------------------------------------===== OPERAND [Optional] =====------------------------------------------
# Description: Offset: 0b, Width: 8b, Instruction operand. Its values depends on used instruction
OPERAND: 0
# -----------------------------------------===== NUM_PADS [Optional] =====------------------------------------------
# Description: Offset: 8b, Width: 2b, Number of pads used by instruction. Some instructions ignores this parameter.
# - 1PAD, (0): Single mode. One pad is used.
# - 2PAD, (1): Dual mode. Two pads are used.
# - 4PAD, (2): Quad mode. Four pads are used.
# - 8PAD, (3): Octal mode. Eight pads are used.
# Possible options: <1PAD, 2PAD, 4PAD, 8PAD>
NUM_PADS: 1PAD
# --------------------------------------===== OPERATION_CODE [Optional] =====---------------------------------------
# Description: Offset: 10b, Width: 6b, Instruction operation code.
# - STOP, (0): Stop execution and de-assert CS. Then, the next command sequence (to the same flash device) starts
# from instruction pointer 0.
# - CMD_SDR, (1): Transmit command code to Flash.
# - RADDR_SDR, (2): Transmit row address to Flash.
# - CADDR_SDR, (3): Transmit column address to Flash.
# - MODE1_SDR, (4): Transmit mode bits to Flash.
# - MODE2_SDR, (5): Transmit mode bits to Flash.
# - MODE4_SDR, (6): Transmit mode bits to Flash.
# - MODE8_SDR, (7): Transmit mode bits to Flash.
# - WRITE_SDR, (8): Transmit program data to Flash device.
# - READ_SDR, (9): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_SDR, (10): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_SDR, (11): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_SDR, (12): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_SDR, (13): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# - JMP_ON_CS, (31): Stop execution, de-assert CS and save operand[7:0] as the instruction start pointer for next
# sequence.Normally this instruction is used to support Execute-In-Place enhanced mode. See XIP enhanced mode for
# more details.This instruction is only allowed for AHB read commands. There is interrupt status bit set
# (INTR[IPCMDERR] or INTR[AHBCMDERR]) when using this instruction in IP command or AHB write command.
# - CMD_DDR, (33): Transmit command code to Flash.
# - RADDR_DDR, (34): Transmit row address to Flash.
# - CADDR_DDR, (35): Transmit column address to Flash.
# - MODE1_DDR, (36): Transmit mode bits to Flash.
# - MODE2_DDR, (37): Transmit mode bits to Flash.
# - MODE4_DDR, (38): Transmit mode bits to Flash.
# - MODE8_DDR, (39): Transmit mode bits to Flash.
# - WRITE_DDR, (40): Transmit program data to Flash device.
# - READ_DDR, (41): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_DDR, (42): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_DDR, (43): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_DDR, (44): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_DDR, (45): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# Possible options: <STOP, CMD_SDR, RADDR_SDR, CADDR_SDR, MODE1_SDR, MODE2_SDR, MODE4_SDR, MODE8_SDR, WRITE_SDR,
# READ_SDR, LEARN_SDR, DATSZ_SDR, DUMMY_SDR, DUMMY_RWDS_SDR, JMP_ON_CS, CMD_DDR, RADDR_DDR, CADDR_DDR, MODE1_DDR,
# MODE2_DDR, MODE4_DDR, MODE8_DDR, WRITE_DDR, READ_DDR, LEARN_DDR, DATSZ_DDR, DUMMY_DDR, DUMMY_RWDS_DDR>
OPERATION_CODE: STOP
lookupTable_seq5_instr1:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq5_instr2:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq5_instr3:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq5_instr4:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq5_instr5:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq5_instr6:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq5_instr7:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
# -----------------------------------===== lookupTable_seq6_instr0 [Optional] =====-----------------------------------
# Description: Offset: 0x000000E0, Width: 16b; Lookup table holds Flash command sequences 6, instruction 0
lookupTable_seq6_instr0:
# ------------------------------------------===== OPERAND [Optional] =====------------------------------------------
# Description: Offset: 0b, Width: 8b, Instruction operand. Its values depends on used instruction
OPERAND: 0
# -----------------------------------------===== NUM_PADS [Optional] =====------------------------------------------
# Description: Offset: 8b, Width: 2b, Number of pads used by instruction. Some instructions ignores this parameter.
# - 1PAD, (0): Single mode. One pad is used.
# - 2PAD, (1): Dual mode. Two pads are used.
# - 4PAD, (2): Quad mode. Four pads are used.
# - 8PAD, (3): Octal mode. Eight pads are used.
# Possible options: <1PAD, 2PAD, 4PAD, 8PAD>
NUM_PADS: 1PAD
# --------------------------------------===== OPERATION_CODE [Optional] =====---------------------------------------
# Description: Offset: 10b, Width: 6b, Instruction operation code.
# - STOP, (0): Stop execution and de-assert CS. Then, the next command sequence (to the same flash device) starts
# from instruction pointer 0.
# - CMD_SDR, (1): Transmit command code to Flash.
# - RADDR_SDR, (2): Transmit row address to Flash.
# - CADDR_SDR, (3): Transmit column address to Flash.
# - MODE1_SDR, (4): Transmit mode bits to Flash.
# - MODE2_SDR, (5): Transmit mode bits to Flash.
# - MODE4_SDR, (6): Transmit mode bits to Flash.
# - MODE8_SDR, (7): Transmit mode bits to Flash.
# - WRITE_SDR, (8): Transmit program data to Flash device.
# - READ_SDR, (9): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_SDR, (10): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_SDR, (11): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_SDR, (12): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_SDR, (13): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# - JMP_ON_CS, (31): Stop execution, de-assert CS and save operand[7:0] as the instruction start pointer for next
# sequence.Normally this instruction is used to support Execute-In-Place enhanced mode. See XIP enhanced mode for
# more details.This instruction is only allowed for AHB read commands. There is interrupt status bit set
# (INTR[IPCMDERR] or INTR[AHBCMDERR]) when using this instruction in IP command or AHB write command.
# - CMD_DDR, (33): Transmit command code to Flash.
# - RADDR_DDR, (34): Transmit row address to Flash.
# - CADDR_DDR, (35): Transmit column address to Flash.
# - MODE1_DDR, (36): Transmit mode bits to Flash.
# - MODE2_DDR, (37): Transmit mode bits to Flash.
# - MODE4_DDR, (38): Transmit mode bits to Flash.
# - MODE8_DDR, (39): Transmit mode bits to Flash.
# - WRITE_DDR, (40): Transmit program data to Flash device.
# - READ_DDR, (41): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_DDR, (42): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_DDR, (43): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_DDR, (44): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_DDR, (45): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# Possible options: <STOP, CMD_SDR, RADDR_SDR, CADDR_SDR, MODE1_SDR, MODE2_SDR, MODE4_SDR, MODE8_SDR, WRITE_SDR,
# READ_SDR, LEARN_SDR, DATSZ_SDR, DUMMY_SDR, DUMMY_RWDS_SDR, JMP_ON_CS, CMD_DDR, RADDR_DDR, CADDR_DDR, MODE1_DDR,
# MODE2_DDR, MODE4_DDR, MODE8_DDR, WRITE_DDR, READ_DDR, LEARN_DDR, DATSZ_DDR, DUMMY_DDR, DUMMY_RWDS_DDR>
OPERATION_CODE: STOP
lookupTable_seq6_instr1:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq6_instr2:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq6_instr3:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq6_instr4:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq6_instr5:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq6_instr6:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq6_instr7:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
# -----------------------------------===== lookupTable_seq7_instr0 [Optional] =====-----------------------------------
# Description: Offset: 0x000000F0, Width: 16b; Lookup table holds Flash command sequences 7, instruction 0
lookupTable_seq7_instr0:
# ------------------------------------------===== OPERAND [Optional] =====------------------------------------------
# Description: Offset: 0b, Width: 8b, Instruction operand. Its values depends on used instruction
OPERAND: 0
# -----------------------------------------===== NUM_PADS [Optional] =====------------------------------------------
# Description: Offset: 8b, Width: 2b, Number of pads used by instruction. Some instructions ignores this parameter.
# - 1PAD, (0): Single mode. One pad is used.
# - 2PAD, (1): Dual mode. Two pads are used.
# - 4PAD, (2): Quad mode. Four pads are used.
# - 8PAD, (3): Octal mode. Eight pads are used.
# Possible options: <1PAD, 2PAD, 4PAD, 8PAD>
NUM_PADS: 1PAD
# --------------------------------------===== OPERATION_CODE [Optional] =====---------------------------------------
# Description: Offset: 10b, Width: 6b, Instruction operation code.
# - STOP, (0): Stop execution and de-assert CS. Then, the next command sequence (to the same flash device) starts
# from instruction pointer 0.
# - CMD_SDR, (1): Transmit command code to Flash.
# - RADDR_SDR, (2): Transmit row address to Flash.
# - CADDR_SDR, (3): Transmit column address to Flash.
# - MODE1_SDR, (4): Transmit mode bits to Flash.
# - MODE2_SDR, (5): Transmit mode bits to Flash.
# - MODE4_SDR, (6): Transmit mode bits to Flash.
# - MODE8_SDR, (7): Transmit mode bits to Flash.
# - WRITE_SDR, (8): Transmit program data to Flash device.
# - READ_SDR, (9): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_SDR, (10): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_SDR, (11): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_SDR, (12): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_SDR, (13): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# - JMP_ON_CS, (31): Stop execution, de-assert CS and save operand[7:0] as the instruction start pointer for next
# sequence.Normally this instruction is used to support Execute-In-Place enhanced mode. See XIP enhanced mode for
# more details.This instruction is only allowed for AHB read commands. There is interrupt status bit set
# (INTR[IPCMDERR] or INTR[AHBCMDERR]) when using this instruction in IP command or AHB write command.
# - CMD_DDR, (33): Transmit command code to Flash.
# - RADDR_DDR, (34): Transmit row address to Flash.
# - CADDR_DDR, (35): Transmit column address to Flash.
# - MODE1_DDR, (36): Transmit mode bits to Flash.
# - MODE2_DDR, (37): Transmit mode bits to Flash.
# - MODE4_DDR, (38): Transmit mode bits to Flash.
# - MODE8_DDR, (39): Transmit mode bits to Flash.
# - WRITE_DDR, (40): Transmit program data to Flash device.
# - READ_DDR, (41): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_DDR, (42): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_DDR, (43): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_DDR, (44): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_DDR, (45): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# Possible options: <STOP, CMD_SDR, RADDR_SDR, CADDR_SDR, MODE1_SDR, MODE2_SDR, MODE4_SDR, MODE8_SDR, WRITE_SDR,
# READ_SDR, LEARN_SDR, DATSZ_SDR, DUMMY_SDR, DUMMY_RWDS_SDR, JMP_ON_CS, CMD_DDR, RADDR_DDR, CADDR_DDR, MODE1_DDR,
# MODE2_DDR, MODE4_DDR, MODE8_DDR, WRITE_DDR, READ_DDR, LEARN_DDR, DATSZ_DDR, DUMMY_DDR, DUMMY_RWDS_DDR>
OPERATION_CODE: STOP
lookupTable_seq7_instr1:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq7_instr2:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq7_instr3:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq7_instr4:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq7_instr5:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq7_instr6:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq7_instr7:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
# -----------------------------------===== lookupTable_seq8_instr0 [Optional] =====-----------------------------------
# Description: Offset: 0x00000100, Width: 16b; Lookup table holds Flash command sequences 8, instruction 0
lookupTable_seq8_instr0:
# ------------------------------------------===== OPERAND [Optional] =====------------------------------------------
# Description: Offset: 0b, Width: 8b, Instruction operand. Its values depends on used instruction
OPERAND: 0
# -----------------------------------------===== NUM_PADS [Optional] =====------------------------------------------
# Description: Offset: 8b, Width: 2b, Number of pads used by instruction. Some instructions ignores this parameter.
# - 1PAD, (0): Single mode. One pad is used.
# - 2PAD, (1): Dual mode. Two pads are used.
# - 4PAD, (2): Quad mode. Four pads are used.
# - 8PAD, (3): Octal mode. Eight pads are used.
# Possible options: <1PAD, 2PAD, 4PAD, 8PAD>
NUM_PADS: 1PAD
# --------------------------------------===== OPERATION_CODE [Optional] =====---------------------------------------
# Description: Offset: 10b, Width: 6b, Instruction operation code.
# - STOP, (0): Stop execution and de-assert CS. Then, the next command sequence (to the same flash device) starts
# from instruction pointer 0.
# - CMD_SDR, (1): Transmit command code to Flash.
# - RADDR_SDR, (2): Transmit row address to Flash.
# - CADDR_SDR, (3): Transmit column address to Flash.
# - MODE1_SDR, (4): Transmit mode bits to Flash.
# - MODE2_SDR, (5): Transmit mode bits to Flash.
# - MODE4_SDR, (6): Transmit mode bits to Flash.
# - MODE8_SDR, (7): Transmit mode bits to Flash.
# - WRITE_SDR, (8): Transmit program data to Flash device.
# - READ_SDR, (9): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_SDR, (10): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_SDR, (11): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_SDR, (12): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_SDR, (13): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# - JMP_ON_CS, (31): Stop execution, de-assert CS and save operand[7:0] as the instruction start pointer for next
# sequence.Normally this instruction is used to support Execute-In-Place enhanced mode. See XIP enhanced mode for
# more details.This instruction is only allowed for AHB read commands. There is interrupt status bit set
# (INTR[IPCMDERR] or INTR[AHBCMDERR]) when using this instruction in IP command or AHB write command.
# - CMD_DDR, (33): Transmit command code to Flash.
# - RADDR_DDR, (34): Transmit row address to Flash.
# - CADDR_DDR, (35): Transmit column address to Flash.
# - MODE1_DDR, (36): Transmit mode bits to Flash.
# - MODE2_DDR, (37): Transmit mode bits to Flash.
# - MODE4_DDR, (38): Transmit mode bits to Flash.
# - MODE8_DDR, (39): Transmit mode bits to Flash.
# - WRITE_DDR, (40): Transmit program data to Flash device.
# - READ_DDR, (41): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_DDR, (42): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_DDR, (43): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_DDR, (44): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_DDR, (45): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# Possible options: <STOP, CMD_SDR, RADDR_SDR, CADDR_SDR, MODE1_SDR, MODE2_SDR, MODE4_SDR, MODE8_SDR, WRITE_SDR,
# READ_SDR, LEARN_SDR, DATSZ_SDR, DUMMY_SDR, DUMMY_RWDS_SDR, JMP_ON_CS, CMD_DDR, RADDR_DDR, CADDR_DDR, MODE1_DDR,
# MODE2_DDR, MODE4_DDR, MODE8_DDR, WRITE_DDR, READ_DDR, LEARN_DDR, DATSZ_DDR, DUMMY_DDR, DUMMY_RWDS_DDR>
OPERATION_CODE: STOP
lookupTable_seq8_instr1:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq8_instr2:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq8_instr3:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq8_instr4:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq8_instr5:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq8_instr6:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq8_instr7:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
# -----------------------------------===== lookupTable_seq9_instr0 [Optional] =====-----------------------------------
# Description: Offset: 0x00000110, Width: 16b; Lookup table holds Flash command sequences 9, instruction 0
lookupTable_seq9_instr0:
# ------------------------------------------===== OPERAND [Optional] =====------------------------------------------
# Description: Offset: 0b, Width: 8b, Instruction operand. Its values depends on used instruction
OPERAND: 0
# -----------------------------------------===== NUM_PADS [Optional] =====------------------------------------------
# Description: Offset: 8b, Width: 2b, Number of pads used by instruction. Some instructions ignores this parameter.
# - 1PAD, (0): Single mode. One pad is used.
# - 2PAD, (1): Dual mode. Two pads are used.
# - 4PAD, (2): Quad mode. Four pads are used.
# - 8PAD, (3): Octal mode. Eight pads are used.
# Possible options: <1PAD, 2PAD, 4PAD, 8PAD>
NUM_PADS: 1PAD
# --------------------------------------===== OPERATION_CODE [Optional] =====---------------------------------------
# Description: Offset: 10b, Width: 6b, Instruction operation code.
# - STOP, (0): Stop execution and de-assert CS. Then, the next command sequence (to the same flash device) starts
# from instruction pointer 0.
# - CMD_SDR, (1): Transmit command code to Flash.
# - RADDR_SDR, (2): Transmit row address to Flash.
# - CADDR_SDR, (3): Transmit column address to Flash.
# - MODE1_SDR, (4): Transmit mode bits to Flash.
# - MODE2_SDR, (5): Transmit mode bits to Flash.
# - MODE4_SDR, (6): Transmit mode bits to Flash.
# - MODE8_SDR, (7): Transmit mode bits to Flash.
# - WRITE_SDR, (8): Transmit program data to Flash device.
# - READ_SDR, (9): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_SDR, (10): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_SDR, (11): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_SDR, (12): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_SDR, (13): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# - JMP_ON_CS, (31): Stop execution, de-assert CS and save operand[7:0] as the instruction start pointer for next
# sequence.Normally this instruction is used to support Execute-In-Place enhanced mode. See XIP enhanced mode for
# more details.This instruction is only allowed for AHB read commands. There is interrupt status bit set
# (INTR[IPCMDERR] or INTR[AHBCMDERR]) when using this instruction in IP command or AHB write command.
# - CMD_DDR, (33): Transmit command code to Flash.
# - RADDR_DDR, (34): Transmit row address to Flash.
# - CADDR_DDR, (35): Transmit column address to Flash.
# - MODE1_DDR, (36): Transmit mode bits to Flash.
# - MODE2_DDR, (37): Transmit mode bits to Flash.
# - MODE4_DDR, (38): Transmit mode bits to Flash.
# - MODE8_DDR, (39): Transmit mode bits to Flash.
# - WRITE_DDR, (40): Transmit program data to Flash device.
# - READ_DDR, (41): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_DDR, (42): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_DDR, (43): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_DDR, (44): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_DDR, (45): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# Possible options: <STOP, CMD_SDR, RADDR_SDR, CADDR_SDR, MODE1_SDR, MODE2_SDR, MODE4_SDR, MODE8_SDR, WRITE_SDR,
# READ_SDR, LEARN_SDR, DATSZ_SDR, DUMMY_SDR, DUMMY_RWDS_SDR, JMP_ON_CS, CMD_DDR, RADDR_DDR, CADDR_DDR, MODE1_DDR,
# MODE2_DDR, MODE4_DDR, MODE8_DDR, WRITE_DDR, READ_DDR, LEARN_DDR, DATSZ_DDR, DUMMY_DDR, DUMMY_RWDS_DDR>
OPERATION_CODE: STOP
lookupTable_seq9_instr1:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq9_instr2:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq9_instr3:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq9_instr4:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq9_instr5:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq9_instr6:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq9_instr7:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
# ----------------------------------===== lookupTable_seq10_instr0 [Optional] =====-----------------------------------
# Description: Offset: 0x00000120, Width: 16b; Lookup table holds Flash command sequences 10, instruction 0
lookupTable_seq10_instr0:
# ------------------------------------------===== OPERAND [Optional] =====------------------------------------------
# Description: Offset: 0b, Width: 8b, Instruction operand. Its values depends on used instruction
OPERAND: 0
# -----------------------------------------===== NUM_PADS [Optional] =====------------------------------------------
# Description: Offset: 8b, Width: 2b, Number of pads used by instruction. Some instructions ignores this parameter.
# - 1PAD, (0): Single mode. One pad is used.
# - 2PAD, (1): Dual mode. Two pads are used.
# - 4PAD, (2): Quad mode. Four pads are used.
# - 8PAD, (3): Octal mode. Eight pads are used.
# Possible options: <1PAD, 2PAD, 4PAD, 8PAD>
NUM_PADS: 1PAD
# --------------------------------------===== OPERATION_CODE [Optional] =====---------------------------------------
# Description: Offset: 10b, Width: 6b, Instruction operation code.
# - STOP, (0): Stop execution and de-assert CS. Then, the next command sequence (to the same flash device) starts
# from instruction pointer 0.
# - CMD_SDR, (1): Transmit command code to Flash.
# - RADDR_SDR, (2): Transmit row address to Flash.
# - CADDR_SDR, (3): Transmit column address to Flash.
# - MODE1_SDR, (4): Transmit mode bits to Flash.
# - MODE2_SDR, (5): Transmit mode bits to Flash.
# - MODE4_SDR, (6): Transmit mode bits to Flash.
# - MODE8_SDR, (7): Transmit mode bits to Flash.
# - WRITE_SDR, (8): Transmit program data to Flash device.
# - READ_SDR, (9): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_SDR, (10): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_SDR, (11): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_SDR, (12): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_SDR, (13): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# - JMP_ON_CS, (31): Stop execution, de-assert CS and save operand[7:0] as the instruction start pointer for next
# sequence.Normally this instruction is used to support Execute-In-Place enhanced mode. See XIP enhanced mode for
# more details.This instruction is only allowed for AHB read commands. There is interrupt status bit set
# (INTR[IPCMDERR] or INTR[AHBCMDERR]) when using this instruction in IP command or AHB write command.
# - CMD_DDR, (33): Transmit command code to Flash.
# - RADDR_DDR, (34): Transmit row address to Flash.
# - CADDR_DDR, (35): Transmit column address to Flash.
# - MODE1_DDR, (36): Transmit mode bits to Flash.
# - MODE2_DDR, (37): Transmit mode bits to Flash.
# - MODE4_DDR, (38): Transmit mode bits to Flash.
# - MODE8_DDR, (39): Transmit mode bits to Flash.
# - WRITE_DDR, (40): Transmit program data to Flash device.
# - READ_DDR, (41): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_DDR, (42): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_DDR, (43): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_DDR, (44): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_DDR, (45): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# Possible options: <STOP, CMD_SDR, RADDR_SDR, CADDR_SDR, MODE1_SDR, MODE2_SDR, MODE4_SDR, MODE8_SDR, WRITE_SDR,
# READ_SDR, LEARN_SDR, DATSZ_SDR, DUMMY_SDR, DUMMY_RWDS_SDR, JMP_ON_CS, CMD_DDR, RADDR_DDR, CADDR_DDR, MODE1_DDR,
# MODE2_DDR, MODE4_DDR, MODE8_DDR, WRITE_DDR, READ_DDR, LEARN_DDR, DATSZ_DDR, DUMMY_DDR, DUMMY_RWDS_DDR>
OPERATION_CODE: STOP
lookupTable_seq10_instr1:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq10_instr2:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq10_instr3:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq10_instr4:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq10_instr5:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq10_instr6:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq10_instr7:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
# ----------------------------------===== lookupTable_seq11_instr0 [Optional] =====-----------------------------------
# Description: Offset: 0x00000130, Width: 16b; Lookup table holds Flash command sequences 11, instruction 0
lookupTable_seq11_instr0:
# ------------------------------------------===== OPERAND [Optional] =====------------------------------------------
# Description: Offset: 0b, Width: 8b, Instruction operand. Its values depends on used instruction
OPERAND: 0
# -----------------------------------------===== NUM_PADS [Optional] =====------------------------------------------
# Description: Offset: 8b, Width: 2b, Number of pads used by instruction. Some instructions ignores this parameter.
# - 1PAD, (0): Single mode. One pad is used.
# - 2PAD, (1): Dual mode. Two pads are used.
# - 4PAD, (2): Quad mode. Four pads are used.
# - 8PAD, (3): Octal mode. Eight pads are used.
# Possible options: <1PAD, 2PAD, 4PAD, 8PAD>
NUM_PADS: 1PAD
# --------------------------------------===== OPERATION_CODE [Optional] =====---------------------------------------
# Description: Offset: 10b, Width: 6b, Instruction operation code.
# - STOP, (0): Stop execution and de-assert CS. Then, the next command sequence (to the same flash device) starts
# from instruction pointer 0.
# - CMD_SDR, (1): Transmit command code to Flash.
# - RADDR_SDR, (2): Transmit row address to Flash.
# - CADDR_SDR, (3): Transmit column address to Flash.
# - MODE1_SDR, (4): Transmit mode bits to Flash.
# - MODE2_SDR, (5): Transmit mode bits to Flash.
# - MODE4_SDR, (6): Transmit mode bits to Flash.
# - MODE8_SDR, (7): Transmit mode bits to Flash.
# - WRITE_SDR, (8): Transmit program data to Flash device.
# - READ_SDR, (9): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_SDR, (10): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_SDR, (11): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_SDR, (12): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_SDR, (13): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# - JMP_ON_CS, (31): Stop execution, de-assert CS and save operand[7:0] as the instruction start pointer for next
# sequence.Normally this instruction is used to support Execute-In-Place enhanced mode. See XIP enhanced mode for
# more details.This instruction is only allowed for AHB read commands. There is interrupt status bit set
# (INTR[IPCMDERR] or INTR[AHBCMDERR]) when using this instruction in IP command or AHB write command.
# - CMD_DDR, (33): Transmit command code to Flash.
# - RADDR_DDR, (34): Transmit row address to Flash.
# - CADDR_DDR, (35): Transmit column address to Flash.
# - MODE1_DDR, (36): Transmit mode bits to Flash.
# - MODE2_DDR, (37): Transmit mode bits to Flash.
# - MODE4_DDR, (38): Transmit mode bits to Flash.
# - MODE8_DDR, (39): Transmit mode bits to Flash.
# - WRITE_DDR, (40): Transmit program data to Flash device.
# - READ_DDR, (41): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_DDR, (42): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_DDR, (43): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_DDR, (44): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_DDR, (45): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# Possible options: <STOP, CMD_SDR, RADDR_SDR, CADDR_SDR, MODE1_SDR, MODE2_SDR, MODE4_SDR, MODE8_SDR, WRITE_SDR,
# READ_SDR, LEARN_SDR, DATSZ_SDR, DUMMY_SDR, DUMMY_RWDS_SDR, JMP_ON_CS, CMD_DDR, RADDR_DDR, CADDR_DDR, MODE1_DDR,
# MODE2_DDR, MODE4_DDR, MODE8_DDR, WRITE_DDR, READ_DDR, LEARN_DDR, DATSZ_DDR, DUMMY_DDR, DUMMY_RWDS_DDR>
OPERATION_CODE: STOP
lookupTable_seq11_instr1:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq11_instr2:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq11_instr3:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq11_instr4:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq11_instr5:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq11_instr6:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq11_instr7:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
# ----------------------------------===== lookupTable_seq12_instr0 [Optional] =====-----------------------------------
# Description: Offset: 0x00000140, Width: 16b; Lookup table holds Flash command sequences 12, instruction 0
lookupTable_seq12_instr0:
# ------------------------------------------===== OPERAND [Optional] =====------------------------------------------
# Description: Offset: 0b, Width: 8b, Instruction operand. Its values depends on used instruction
OPERAND: 0
# -----------------------------------------===== NUM_PADS [Optional] =====------------------------------------------
# Description: Offset: 8b, Width: 2b, Number of pads used by instruction. Some instructions ignores this parameter.
# - 1PAD, (0): Single mode. One pad is used.
# - 2PAD, (1): Dual mode. Two pads are used.
# - 4PAD, (2): Quad mode. Four pads are used.
# - 8PAD, (3): Octal mode. Eight pads are used.
# Possible options: <1PAD, 2PAD, 4PAD, 8PAD>
NUM_PADS: 1PAD
# --------------------------------------===== OPERATION_CODE [Optional] =====---------------------------------------
# Description: Offset: 10b, Width: 6b, Instruction operation code.
# - STOP, (0): Stop execution and de-assert CS. Then, the next command sequence (to the same flash device) starts
# from instruction pointer 0.
# - CMD_SDR, (1): Transmit command code to Flash.
# - RADDR_SDR, (2): Transmit row address to Flash.
# - CADDR_SDR, (3): Transmit column address to Flash.
# - MODE1_SDR, (4): Transmit mode bits to Flash.
# - MODE2_SDR, (5): Transmit mode bits to Flash.
# - MODE4_SDR, (6): Transmit mode bits to Flash.
# - MODE8_SDR, (7): Transmit mode bits to Flash.
# - WRITE_SDR, (8): Transmit program data to Flash device.
# - READ_SDR, (9): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_SDR, (10): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_SDR, (11): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_SDR, (12): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_SDR, (13): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# - JMP_ON_CS, (31): Stop execution, de-assert CS and save operand[7:0] as the instruction start pointer for next
# sequence.Normally this instruction is used to support Execute-In-Place enhanced mode. See XIP enhanced mode for
# more details.This instruction is only allowed for AHB read commands. There is interrupt status bit set
# (INTR[IPCMDERR] or INTR[AHBCMDERR]) when using this instruction in IP command or AHB write command.
# - CMD_DDR, (33): Transmit command code to Flash.
# - RADDR_DDR, (34): Transmit row address to Flash.
# - CADDR_DDR, (35): Transmit column address to Flash.
# - MODE1_DDR, (36): Transmit mode bits to Flash.
# - MODE2_DDR, (37): Transmit mode bits to Flash.
# - MODE4_DDR, (38): Transmit mode bits to Flash.
# - MODE8_DDR, (39): Transmit mode bits to Flash.
# - WRITE_DDR, (40): Transmit program data to Flash device.
# - READ_DDR, (41): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_DDR, (42): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_DDR, (43): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_DDR, (44): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_DDR, (45): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# Possible options: <STOP, CMD_SDR, RADDR_SDR, CADDR_SDR, MODE1_SDR, MODE2_SDR, MODE4_SDR, MODE8_SDR, WRITE_SDR,
# READ_SDR, LEARN_SDR, DATSZ_SDR, DUMMY_SDR, DUMMY_RWDS_SDR, JMP_ON_CS, CMD_DDR, RADDR_DDR, CADDR_DDR, MODE1_DDR,
# MODE2_DDR, MODE4_DDR, MODE8_DDR, WRITE_DDR, READ_DDR, LEARN_DDR, DATSZ_DDR, DUMMY_DDR, DUMMY_RWDS_DDR>
OPERATION_CODE: STOP
lookupTable_seq12_instr1:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq12_instr2:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq12_instr3:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq12_instr4:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq12_instr5:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq12_instr6:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq12_instr7:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
# ----------------------------------===== lookupTable_seq13_instr0 [Optional] =====-----------------------------------
# Description: Offset: 0x00000150, Width: 16b; Lookup table holds Flash command sequences 13, instruction 0
lookupTable_seq13_instr0:
# ------------------------------------------===== OPERAND [Optional] =====------------------------------------------
# Description: Offset: 0b, Width: 8b, Instruction operand. Its values depends on used instruction
OPERAND: 0
# -----------------------------------------===== NUM_PADS [Optional] =====------------------------------------------
# Description: Offset: 8b, Width: 2b, Number of pads used by instruction. Some instructions ignores this parameter.
# - 1PAD, (0): Single mode. One pad is used.
# - 2PAD, (1): Dual mode. Two pads are used.
# - 4PAD, (2): Quad mode. Four pads are used.
# - 8PAD, (3): Octal mode. Eight pads are used.
# Possible options: <1PAD, 2PAD, 4PAD, 8PAD>
NUM_PADS: 1PAD
# --------------------------------------===== OPERATION_CODE [Optional] =====---------------------------------------
# Description: Offset: 10b, Width: 6b, Instruction operation code.
# - STOP, (0): Stop execution and de-assert CS. Then, the next command sequence (to the same flash device) starts
# from instruction pointer 0.
# - CMD_SDR, (1): Transmit command code to Flash.
# - RADDR_SDR, (2): Transmit row address to Flash.
# - CADDR_SDR, (3): Transmit column address to Flash.
# - MODE1_SDR, (4): Transmit mode bits to Flash.
# - MODE2_SDR, (5): Transmit mode bits to Flash.
# - MODE4_SDR, (6): Transmit mode bits to Flash.
# - MODE8_SDR, (7): Transmit mode bits to Flash.
# - WRITE_SDR, (8): Transmit program data to Flash device.
# - READ_SDR, (9): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_SDR, (10): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_SDR, (11): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_SDR, (12): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_SDR, (13): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# - JMP_ON_CS, (31): Stop execution, de-assert CS and save operand[7:0] as the instruction start pointer for next
# sequence.Normally this instruction is used to support Execute-In-Place enhanced mode. See XIP enhanced mode for
# more details.This instruction is only allowed for AHB read commands. There is interrupt status bit set
# (INTR[IPCMDERR] or INTR[AHBCMDERR]) when using this instruction in IP command or AHB write command.
# - CMD_DDR, (33): Transmit command code to Flash.
# - RADDR_DDR, (34): Transmit row address to Flash.
# - CADDR_DDR, (35): Transmit column address to Flash.
# - MODE1_DDR, (36): Transmit mode bits to Flash.
# - MODE2_DDR, (37): Transmit mode bits to Flash.
# - MODE4_DDR, (38): Transmit mode bits to Flash.
# - MODE8_DDR, (39): Transmit mode bits to Flash.
# - WRITE_DDR, (40): Transmit program data to Flash device.
# - READ_DDR, (41): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_DDR, (42): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_DDR, (43): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_DDR, (44): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_DDR, (45): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# Possible options: <STOP, CMD_SDR, RADDR_SDR, CADDR_SDR, MODE1_SDR, MODE2_SDR, MODE4_SDR, MODE8_SDR, WRITE_SDR,
# READ_SDR, LEARN_SDR, DATSZ_SDR, DUMMY_SDR, DUMMY_RWDS_SDR, JMP_ON_CS, CMD_DDR, RADDR_DDR, CADDR_DDR, MODE1_DDR,
# MODE2_DDR, MODE4_DDR, MODE8_DDR, WRITE_DDR, READ_DDR, LEARN_DDR, DATSZ_DDR, DUMMY_DDR, DUMMY_RWDS_DDR>
OPERATION_CODE: STOP
lookupTable_seq13_instr1:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq13_instr2:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq13_instr3:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq13_instr4:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq13_instr5:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq13_instr6:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq13_instr7:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
# ----------------------------------===== lookupTable_seq14_instr0 [Optional] =====-----------------------------------
# Description: Offset: 0x00000160, Width: 16b; Lookup table holds Flash command sequences 14, instruction 0
lookupTable_seq14_instr0:
# ------------------------------------------===== OPERAND [Optional] =====------------------------------------------
# Description: Offset: 0b, Width: 8b, Instruction operand. Its values depends on used instruction
OPERAND: 0
# -----------------------------------------===== NUM_PADS [Optional] =====------------------------------------------
# Description: Offset: 8b, Width: 2b, Number of pads used by instruction. Some instructions ignores this parameter.
# - 1PAD, (0): Single mode. One pad is used.
# - 2PAD, (1): Dual mode. Two pads are used.
# - 4PAD, (2): Quad mode. Four pads are used.
# - 8PAD, (3): Octal mode. Eight pads are used.
# Possible options: <1PAD, 2PAD, 4PAD, 8PAD>
NUM_PADS: 1PAD
# --------------------------------------===== OPERATION_CODE [Optional] =====---------------------------------------
# Description: Offset: 10b, Width: 6b, Instruction operation code.
# - STOP, (0): Stop execution and de-assert CS. Then, the next command sequence (to the same flash device) starts
# from instruction pointer 0.
# - CMD_SDR, (1): Transmit command code to Flash.
# - RADDR_SDR, (2): Transmit row address to Flash.
# - CADDR_SDR, (3): Transmit column address to Flash.
# - MODE1_SDR, (4): Transmit mode bits to Flash.
# - MODE2_SDR, (5): Transmit mode bits to Flash.
# - MODE4_SDR, (6): Transmit mode bits to Flash.
# - MODE8_SDR, (7): Transmit mode bits to Flash.
# - WRITE_SDR, (8): Transmit program data to Flash device.
# - READ_SDR, (9): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_SDR, (10): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_SDR, (11): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_SDR, (12): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_SDR, (13): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# - JMP_ON_CS, (31): Stop execution, de-assert CS and save operand[7:0] as the instruction start pointer for next
# sequence.Normally this instruction is used to support Execute-In-Place enhanced mode. See XIP enhanced mode for
# more details.This instruction is only allowed for AHB read commands. There is interrupt status bit set
# (INTR[IPCMDERR] or INTR[AHBCMDERR]) when using this instruction in IP command or AHB write command.
# - CMD_DDR, (33): Transmit command code to Flash.
# - RADDR_DDR, (34): Transmit row address to Flash.
# - CADDR_DDR, (35): Transmit column address to Flash.
# - MODE1_DDR, (36): Transmit mode bits to Flash.
# - MODE2_DDR, (37): Transmit mode bits to Flash.
# - MODE4_DDR, (38): Transmit mode bits to Flash.
# - MODE8_DDR, (39): Transmit mode bits to Flash.
# - WRITE_DDR, (40): Transmit program data to Flash device.
# - READ_DDR, (41): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_DDR, (42): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_DDR, (43): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_DDR, (44): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_DDR, (45): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# Possible options: <STOP, CMD_SDR, RADDR_SDR, CADDR_SDR, MODE1_SDR, MODE2_SDR, MODE4_SDR, MODE8_SDR, WRITE_SDR,
# READ_SDR, LEARN_SDR, DATSZ_SDR, DUMMY_SDR, DUMMY_RWDS_SDR, JMP_ON_CS, CMD_DDR, RADDR_DDR, CADDR_DDR, MODE1_DDR,
# MODE2_DDR, MODE4_DDR, MODE8_DDR, WRITE_DDR, READ_DDR, LEARN_DDR, DATSZ_DDR, DUMMY_DDR, DUMMY_RWDS_DDR>
OPERATION_CODE: STOP
lookupTable_seq14_instr1:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq14_instr2:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq14_instr3:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq14_instr4:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq14_instr5:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq14_instr6:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq14_instr7:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
# ----------------------------------===== lookupTable_seq15_instr0 [Optional] =====-----------------------------------
# Description: Offset: 0x00000170, Width: 16b; Lookup table holds Flash command sequences 15, instruction 0
lookupTable_seq15_instr0:
# ------------------------------------------===== OPERAND [Optional] =====------------------------------------------
# Description: Offset: 0b, Width: 8b, Instruction operand. Its values depends on used instruction
OPERAND: 0
# -----------------------------------------===== NUM_PADS [Optional] =====------------------------------------------
# Description: Offset: 8b, Width: 2b, Number of pads used by instruction. Some instructions ignores this parameter.
# - 1PAD, (0): Single mode. One pad is used.
# - 2PAD, (1): Dual mode. Two pads are used.
# - 4PAD, (2): Quad mode. Four pads are used.
# - 8PAD, (3): Octal mode. Eight pads are used.
# Possible options: <1PAD, 2PAD, 4PAD, 8PAD>
NUM_PADS: 1PAD
# --------------------------------------===== OPERATION_CODE [Optional] =====---------------------------------------
# Description: Offset: 10b, Width: 6b, Instruction operation code.
# - STOP, (0): Stop execution and de-assert CS. Then, the next command sequence (to the same flash device) starts
# from instruction pointer 0.
# - CMD_SDR, (1): Transmit command code to Flash.
# - RADDR_SDR, (2): Transmit row address to Flash.
# - CADDR_SDR, (3): Transmit column address to Flash.
# - MODE1_SDR, (4): Transmit mode bits to Flash.
# - MODE2_SDR, (5): Transmit mode bits to Flash.
# - MODE4_SDR, (6): Transmit mode bits to Flash.
# - MODE8_SDR, (7): Transmit mode bits to Flash.
# - WRITE_SDR, (8): Transmit program data to Flash device.
# - READ_SDR, (9): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_SDR, (10): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_SDR, (11): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_SDR, (12): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_SDR, (13): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# - JMP_ON_CS, (31): Stop execution, de-assert CS and save operand[7:0] as the instruction start pointer for next
# sequence.Normally this instruction is used to support Execute-In-Place enhanced mode. See XIP enhanced mode for
# more details.This instruction is only allowed for AHB read commands. There is interrupt status bit set
# (INTR[IPCMDERR] or INTR[AHBCMDERR]) when using this instruction in IP command or AHB write command.
# - CMD_DDR, (33): Transmit command code to Flash.
# - RADDR_DDR, (34): Transmit row address to Flash.
# - CADDR_DDR, (35): Transmit column address to Flash.
# - MODE1_DDR, (36): Transmit mode bits to Flash.
# - MODE2_DDR, (37): Transmit mode bits to Flash.
# - MODE4_DDR, (38): Transmit mode bits to Flash.
# - MODE8_DDR, (39): Transmit mode bits to Flash.
# - WRITE_DDR, (40): Transmit program data to Flash device.
# - READ_DDR, (41): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_DDR, (42): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_DDR, (43): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_DDR, (44): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_DDR, (45): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# Possible options: <STOP, CMD_SDR, RADDR_SDR, CADDR_SDR, MODE1_SDR, MODE2_SDR, MODE4_SDR, MODE8_SDR, WRITE_SDR,
# READ_SDR, LEARN_SDR, DATSZ_SDR, DUMMY_SDR, DUMMY_RWDS_SDR, JMP_ON_CS, CMD_DDR, RADDR_DDR, CADDR_DDR, MODE1_DDR,
# MODE2_DDR, MODE4_DDR, MODE8_DDR, WRITE_DDR, READ_DDR, LEARN_DDR, DATSZ_DDR, DUMMY_DDR, DUMMY_RWDS_DDR>
OPERATION_CODE: STOP
lookupTable_seq15_instr1:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq15_instr2:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq15_instr3:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq15_instr4:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq15_instr5:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq15_instr6:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq15_instr7:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
# ---------------------------------------===== lutCustomSeq_0 [Optional] =====----------------------------------------
# Description: Offset: 0x00000180, Width: 32b; [0x180-0x1af] Customizable LUT Sequences
lutCustomSeq_0:
# ------------------------------------------===== seqNum [Optional] =====-------------------------------------------
# Description: Offset: 0b, Width: 8b, Sequence Number, valid number: 1-16
seqNum: 0
# -------------------------------------------===== seqId [Optional] =====-------------------------------------------
# Description: Offset: 8b, Width: 8b, Sequence Index, valid number: 0-15
seqId: 0
# -----------------------------------------===== reserved [Optional] =====------------------------------------------
# Description: Offset: 16b, Width: 16b, N/A
reserved: 0
# ---------------------------------------===== lutCustomSeq_1 [Optional] =====----------------------------------------
# Description: Offset: 0x00000184, Width: 32b; [0x180-0x1af] Customizable LUT Sequences
lutCustomSeq_1:
# ------------------------------------------===== seqNum [Optional] =====-------------------------------------------
# Description: Offset: 0b, Width: 8b, Sequence Number, valid number: 1-16
seqNum: 0
# -------------------------------------------===== seqId [Optional] =====-------------------------------------------
# Description: Offset: 8b, Width: 8b, Sequence Index, valid number: 0-15
seqId: 0
# -----------------------------------------===== reserved [Optional] =====------------------------------------------
# Description: Offset: 16b, Width: 16b, N/A
reserved: 0
# ---------------------------------------===== lutCustomSeq_2 [Optional] =====----------------------------------------
# Description: Offset: 0x00000188, Width: 32b; [0x180-0x1af] Customizable LUT Sequences
lutCustomSeq_2:
# ------------------------------------------===== seqNum [Optional] =====-------------------------------------------
# Description: Offset: 0b, Width: 8b, Sequence Number, valid number: 1-16
seqNum: 0
# -------------------------------------------===== seqId [Optional] =====-------------------------------------------
# Description: Offset: 8b, Width: 8b, Sequence Index, valid number: 0-15
seqId: 0
# -----------------------------------------===== reserved [Optional] =====------------------------------------------
# Description: Offset: 16b, Width: 16b, N/A
reserved: 0
# ---------------------------------------===== lutCustomSeq_3 [Optional] =====----------------------------------------
# Description: Offset: 0x0000018C, Width: 32b; [0x180-0x1af] Customizable LUT Sequences
lutCustomSeq_3:
# ------------------------------------------===== seqNum [Optional] =====-------------------------------------------
# Description: Offset: 0b, Width: 8b, Sequence Number, valid number: 1-16
seqNum: 0
# -------------------------------------------===== seqId [Optional] =====-------------------------------------------
# Description: Offset: 8b, Width: 8b, Sequence Index, valid number: 0-15
seqId: 0
# -----------------------------------------===== reserved [Optional] =====------------------------------------------
# Description: Offset: 16b, Width: 16b, N/A
reserved: 0
# ---------------------------------------===== lutCustomSeq_4 [Optional] =====----------------------------------------
# Description: Offset: 0x00000190, Width: 32b; [0x180-0x1af] Customizable LUT Sequences
lutCustomSeq_4:
# ------------------------------------------===== seqNum [Optional] =====-------------------------------------------
# Description: Offset: 0b, Width: 8b, Sequence Number, valid number: 1-16
seqNum: 0
# -------------------------------------------===== seqId [Optional] =====-------------------------------------------
# Description: Offset: 8b, Width: 8b, Sequence Index, valid number: 0-15
seqId: 0
# -----------------------------------------===== reserved [Optional] =====------------------------------------------
# Description: Offset: 16b, Width: 16b, N/A
reserved: 0
# ---------------------------------------===== lutCustomSeq_5 [Optional] =====----------------------------------------
# Description: Offset: 0x00000194, Width: 32b; [0x180-0x1af] Customizable LUT Sequences
lutCustomSeq_5:
# ------------------------------------------===== seqNum [Optional] =====-------------------------------------------
# Description: Offset: 0b, Width: 8b, Sequence Number, valid number: 1-16
seqNum: 0
# -------------------------------------------===== seqId [Optional] =====-------------------------------------------
# Description: Offset: 8b, Width: 8b, Sequence Index, valid number: 0-15
seqId: 0
# -----------------------------------------===== reserved [Optional] =====------------------------------------------
# Description: Offset: 16b, Width: 16b, N/A
reserved: 0
# ---------------------------------------===== lutCustomSeq_6 [Optional] =====----------------------------------------
# Description: Offset: 0x00000198, Width: 32b; [0x180-0x1af] Customizable LUT Sequences
lutCustomSeq_6:
# ------------------------------------------===== seqNum [Optional] =====-------------------------------------------
# Description: Offset: 0b, Width: 8b, Sequence Number, valid number: 1-16
seqNum: 0
# -------------------------------------------===== seqId [Optional] =====-------------------------------------------
# Description: Offset: 8b, Width: 8b, Sequence Index, valid number: 0-15
seqId: 0
# -----------------------------------------===== reserved [Optional] =====------------------------------------------
# Description: Offset: 16b, Width: 16b, N/A
reserved: 0
# ---------------------------------------===== lutCustomSeq_7 [Optional] =====----------------------------------------
# Description: Offset: 0x0000019C, Width: 32b; [0x180-0x1af] Customizable LUT Sequences
lutCustomSeq_7:
# ------------------------------------------===== seqNum [Optional] =====-------------------------------------------
# Description: Offset: 0b, Width: 8b, Sequence Number, valid number: 1-16
seqNum: 0
# -------------------------------------------===== seqId [Optional] =====-------------------------------------------
# Description: Offset: 8b, Width: 8b, Sequence Index, valid number: 0-15
seqId: 0
# -----------------------------------------===== reserved [Optional] =====------------------------------------------
# Description: Offset: 16b, Width: 16b, N/A
reserved: 0
# ---------------------------------------===== lutCustomSeq_8 [Optional] =====----------------------------------------
# Description: Offset: 0x000001A0, Width: 32b; [0x180-0x1af] Customizable LUT Sequences
lutCustomSeq_8:
# ------------------------------------------===== seqNum [Optional] =====-------------------------------------------
# Description: Offset: 0b, Width: 8b, Sequence Number, valid number: 1-16
seqNum: 0
# -------------------------------------------===== seqId [Optional] =====-------------------------------------------
# Description: Offset: 8b, Width: 8b, Sequence Index, valid number: 0-15
seqId: 0
# -----------------------------------------===== reserved [Optional] =====------------------------------------------
# Description: Offset: 16b, Width: 16b, N/A
reserved: 0
# ---------------------------------------===== lutCustomSeq_9 [Optional] =====----------------------------------------
# Description: Offset: 0x000001A4, Width: 32b; [0x180-0x1af] Customizable LUT Sequences
lutCustomSeq_9:
# ------------------------------------------===== seqNum [Optional] =====-------------------------------------------
# Description: Offset: 0b, Width: 8b, Sequence Number, valid number: 1-16
seqNum: 0
# -------------------------------------------===== seqId [Optional] =====-------------------------------------------
# Description: Offset: 8b, Width: 8b, Sequence Index, valid number: 0-15
seqId: 0
# -----------------------------------------===== reserved [Optional] =====------------------------------------------
# Description: Offset: 16b, Width: 16b, N/A
reserved: 0
# ---------------------------------------===== lutCustomSeq_10 [Optional] =====---------------------------------------
# Description: Offset: 0x000001A8, Width: 32b; [0x180-0x1af] Customizable LUT Sequences
lutCustomSeq_10:
# ------------------------------------------===== seqNum [Optional] =====-------------------------------------------
# Description: Offset: 0b, Width: 8b, Sequence Number, valid number: 1-16
seqNum: 0
# -------------------------------------------===== seqId [Optional] =====-------------------------------------------
# Description: Offset: 8b, Width: 8b, Sequence Index, valid number: 0-15
seqId: 0
# -----------------------------------------===== reserved [Optional] =====------------------------------------------
# Description: Offset: 16b, Width: 16b, N/A
reserved: 0
# ---------------------------------------===== lutCustomSeq_11 [Optional] =====---------------------------------------
# Description: Offset: 0x000001AC, Width: 32b; [0x180-0x1af] Customizable LUT Sequences
lutCustomSeq_11:
# ------------------------------------------===== seqNum [Optional] =====-------------------------------------------
# Description: Offset: 0b, Width: 8b, Sequence Number, valid number: 1-16
seqNum: 0
# -------------------------------------------===== seqId [Optional] =====-------------------------------------------
# Description: Offset: 8b, Width: 8b, Sequence Index, valid number: 0-15
seqId: 0
# -----------------------------------------===== reserved [Optional] =====------------------------------------------
# Description: Offset: 16b, Width: 16b, N/A
reserved: 0
# -----------------------------------------===== reserved4_0 [Optional] =====-----------------------------------------
# Description: Offset: 0x000001B0, Width: 32b; [0x1b0-0x1bf] Reserved for future use
reserved4_0: '0x00000000'
# -----------------------------------------===== reserved4_1 [Optional] =====-----------------------------------------
# Description: Offset: 0x000001B4, Width: 32b; [0x1b0-0x1bf] Reserved for future use
reserved4_1: '0x00000000'
# -----------------------------------------===== reserved4_2 [Optional] =====-----------------------------------------
# Description: Offset: 0x000001B8, Width: 32b; [0x1b0-0x1bf] Reserved for future use
reserved4_2: '0x00000000'
# -----------------------------------------===== reserved4_3 [Optional] =====-----------------------------------------
# Description: Offset: 0x000001BC, Width: 32b; [0x1b0-0x1bf] Reserved for future use
reserved4_3: '0x00000000'
# ------------------------------------------===== pageSize [Optional] =====-------------------------------------------
# Description: Offset: 0x000001C0, Width: 32b; Page size of Serial NOR
pageSize: '0x00000000'
# -----------------------------------------===== sectorSize [Optional] =====------------------------------------------
# Description: Offset: 0x000001C4, Width: 32b; Sector size of Serial NOR
sectorSize: '0x00000000'
# -------------------------------------===== ipcmdSerialClkFreq [Optional] =====--------------------------------------
# Description: Offset: 0x000001C8, Width: 8b; Clock frequency for IP command
ipcmdSerialClkFreq: '0x00'
# -------------------------------------===== isUniformBlockSize [Optional] =====--------------------------------------
# Description: Offset: 0x000001C9, Width: 8b; Sector/Block size is the same
isUniformBlockSize: '0x00'
# -----------------------------------------===== reserved0_0 [Optional] =====-----------------------------------------
# Description: Offset: 0x000001CA, Width: 8b; Reserved for future use
reserved0_0: '0x00'
# -----------------------------------------===== reserved0_1 [Optional] =====-----------------------------------------
# Description: Offset: 0x000001CB, Width: 8b; Reserved for future use
reserved0_1: '0x00'
# ----------------------------------------===== serialNorType [Optional] =====----------------------------------------
# Description: Offset: 0x000001CC, Width: 8b; Serial NOR Flash type: 0/1/2/3
serialNorType: '0x00'
# --------------------------------------===== needExitNoCmdMode [Optional] =====--------------------------------------
# Description: Offset: 0x000001CD, Width: 8b; Need to exit NoCmd mode before other IP command
needExitNoCmdMode: '0x00'
# ------------------------------------===== halfClkForNonReadCmd [Optional] =====-------------------------------------
# Description: Offset: 0x000001CE, Width: 8b; Half the Serial Clock for non-read command: true/false
halfClkForNonReadCmd: '0x00'
# ------------------------------------===== needRestoreNoCmdMode [Optional] =====-------------------------------------
# Description: Offset: 0x000001CF, Width: 8b; Need to Restore NoCmd mode after IP command execution
needRestoreNoCmdMode: '0x00'
# ------------------------------------------===== blockSize [Optional] =====------------------------------------------
# Description: Offset: 0x000001D0, Width: 32b; Block size
blockSize: '0x00000000'
# -----------------------------------------===== reserve2_0 [Optional] =====------------------------------------------
# Description: Offset: 0x000001D4, Width: 32b; Reserved for future use
reserve2_0: '0x00000000'
# -----------------------------------------===== reserve2_1 [Optional] =====------------------------------------------
# Description: Offset: 0x000001D8, Width: 32b; Reserved for future use
reserve2_1: '0x00000000'
# -----------------------------------------===== reserve2_2 [Optional] =====------------------------------------------
# Description: Offset: 0x000001DC, Width: 32b; Reserved for future use
reserve2_2: '0x00000000'
# -----------------------------------------===== reserve2_3 [Optional] =====------------------------------------------
# Description: Offset: 0x000001E0, Width: 32b; Reserved for future use
reserve2_3: '0x00000000'
# -----------------------------------------===== reserve2_4 [Optional] =====------------------------------------------
# Description: Offset: 0x000001E4, Width: 32b; Reserved for future use
reserve2_4: '0x00000000'
# -----------------------------------------===== reserve2_5 [Optional] =====------------------------------------------
# Description: Offset: 0x000001E8, Width: 32b; Reserved for future use
reserve2_5: '0x00000000'
# -----------------------------------------===== reserve2_6 [Optional] =====------------------------------------------
# Description: Offset: 0x000001EC, Width: 32b; Reserved for future use
reserve2_6: '0x00000000'
# -----------------------------------------===== reserve2_7 [Optional] =====------------------------------------------
# Description: Offset: 0x000001F0, Width: 32b; Reserved for future use
reserve2_7: '0x00000000'
# -----------------------------------------===== reserve2_8 [Optional] =====------------------------------------------
# Description: Offset: 0x000001F4, Width: 32b; Reserved for future use
reserve2_8: '0x00000000'
# -----------------------------------------===== reserve2_9 [Optional] =====------------------------------------------
# Description: Offset: 0x000001F8, Width: 32b; Reserved for future use
reserve2_9: '0x00000000'
# -----------------------------------------===== reserve2_10 [Optional] =====-----------------------------------------
# Description: Offset: 0x000001FC, Width: 32b; Reserved for future use
reserve2_10: '0x00000000'
FCB for mimxrt1046, Revision: a0 and flexspi_nor#
FCB for mimxrt1046, Revision: a0 and flexspi_nor JSON schema
FCB for mimxrt1046, Revision: a0 and flexspi_nor YAML configuration template
# ================================= FCB for mimxrt1046, Revision: a0 and flexspi_nor =================================
# ======================================================================================================================
# == FCB for mimxrt1046, Revision: a0 and flexspi_nor ==
# ======================================================================================================================
# -------------------------------------===== The chip family name [Required] =====--------------------------------------
# Description: NXP chip family identifier.
family: CHOOSE_FROM_TABLE
# -----------------------------------------===== MCU revision [Optional] =====------------------------------------------
# Description: Revision of silicon. The 'latest' name, means most current revision.
# Possible options: <a0, latest>
revision: a0
# ------------------------------------------===== Memory type [Required] =====------------------------------------------
# Description: Specify type of memory used by FCB description.
# Possible options: <flexspi_nor>
type: flexspi_nor
# ------------------------------------------===== mimxrt1046 [Required] =====-------------------------------------------
fcb_settings:
# ---------------------------------------------===== tag [Optional] =====---------------------------------------------
# Description: Offset: 0x00000000, Width: 32b; [0x000-0x003] Tag, fixed value 0x42464346UL
tag: '0x42464346'
# -------------------------------------------===== version [Optional] =====-------------------------------------------
# Description: Offset: 0x00000004, Width: 32b; [0x004-0x007] Version,[31:24] -'V', [23:16] - Major, [15:8] - Minor,
# [7:0] - bugfix
version: '0x56010400'
# ------------------------------------------===== reserved0 [Optional] =====------------------------------------------
# Description: Offset: 0x00000008, Width: 32b; [0x008-0x00b] Reserved for future use
reserved0: '0x00000000'
# --------------------------------------===== readSampleClkSrc [Optional] =====---------------------------------------
# Description: Offset: 0x0000000C, Width: 8b; [0x00c-0x00c] Read Sample Clock Source, valid value: 0/1/3
readSampleClkSrc: '0x00'
# -----------------------------------------===== csHoldTime [Optional] =====------------------------------------------
# Description: Offset: 0x0000000D, Width: 8b; [0x00d-0x00d] CS hold time, default value: 3
csHoldTime: '0x00'
# -----------------------------------------===== csSetupTime [Optional] =====-----------------------------------------
# Description: Offset: 0x0000000E, Width: 8b; [0x00e-0x00e] CS setup time, default value: 3
csSetupTime: '0x00'
# -------------------------------------===== columnAddressWidth [Optional] =====--------------------------------------
# Description: Offset: 0x0000000F, Width: 8b; [0x00f-0x00f] Column Address with, for HyperBus protocol, it is fixed
# to 3, For Serial NAND, need to refer to datasheet
columnAddressWidth: '0x00'
# -------------------------------------===== deviceModeCfgEnable [Optional] =====-------------------------------------
# Description: Offset: 0x00000010, Width: 8b; [0x010-0x010] Device Mode Configure enable flag, 1 - Enable, 0 -
# Disable
deviceModeCfgEnable: '0x00'
# ---------------------------------------===== deviceModeType [Optional] =====----------------------------------------
# Description: Offset: 0x00000011, Width: 8b; [0x011-0x011] Specify the configuration command type:Quad Enable,
# DPI/QPI/OPI switch, Generic configuration, etc.
deviceModeType: '0x00'
# -------------------------------------===== waitTimeCfgCommands [Optional] =====-------------------------------------
# Description: Offset: 0x00000012, Width: 16b; [0x012-0x013] Wait time for all configuration commands, unit: 100us,
# Used for DPI/QPI/OPI switch or reset command
waitTimeCfgCommands: '0x0000'
# ----------------------------------------===== deviceModeSeq [Optional] =====----------------------------------------
# Description: Offset: 0x00000014, Width: 32b; [0x014-0x017] Device mode sequence info, [7:0] - LUT sequence id,
# [15:8] - LUt sequence number, [31:16] Reserved
deviceModeSeq:
# ------------------------------------------===== seqNum [Optional] =====-------------------------------------------
# Description: Offset: 0b, Width: 8b, Sequence Number, valid number: 1-16
seqNum: 0
# -------------------------------------------===== seqId [Optional] =====-------------------------------------------
# Description: Offset: 8b, Width: 8b, Sequence Index, valid number: 0-15
seqId: 0
# -----------------------------------------===== reserved [Optional] =====------------------------------------------
# Description: Offset: 16b, Width: 16b, N/A
reserved: 0
# ----------------------------------------===== deviceModeArg [Optional] =====----------------------------------------
# Description: Offset: 0x00000018, Width: 32b; [0x018-0x01b] Argument/Parameter for device configuration
deviceModeArg: '0x00000000'
# ---------------------------------------===== configCmdEnable [Optional] =====---------------------------------------
# Description: Offset: 0x0000001C, Width: 8b; [0x01c-0x01c] Configure command Enable Flag, 1 - Enable, 0 - Disable
configCmdEnable: '0x00'
# --------------------------------------===== configModeType_0 [Optional] =====---------------------------------------
# Description: Offset: 0x0000001D, Width: 8b; [0x01d-0x01f] Configure Mode Type, similar as deviceModeTpe
configModeType_0: '0x00'
# --------------------------------------===== configModeType_1 [Optional] =====---------------------------------------
# Description: Offset: 0x0000001E, Width: 8b; [0x01d-0x01f] Configure Mode Type, similar as deviceModeTpe
configModeType_1: '0x00'
# --------------------------------------===== configModeType_2 [Optional] =====---------------------------------------
# Description: Offset: 0x0000001F, Width: 8b; [0x01d-0x01f] Configure Mode Type, similar as deviceModeTpe
configModeType_2: '0x00'
# ---------------------------------------===== configCmdSeqs_0 [Optional] =====---------------------------------------
# Description: Offset: 0x00000020, Width: 32b; [0x020-0x02b] Sequence info for Device Configuration command, similar
# as deviceModeSeq
configCmdSeqs_0:
# ------------------------------------------===== seqNum [Optional] =====-------------------------------------------
# Description: Offset: 0b, Width: 8b, Sequence Number, valid number: 1-16
seqNum: 0
# -------------------------------------------===== seqId [Optional] =====-------------------------------------------
# Description: Offset: 8b, Width: 8b, Sequence Index, valid number: 0-15
seqId: 0
# -----------------------------------------===== reserved [Optional] =====------------------------------------------
# Description: Offset: 16b, Width: 16b, N/A
reserved: 0
# ---------------------------------------===== configCmdSeqs_1 [Optional] =====---------------------------------------
# Description: Offset: 0x00000024, Width: 32b; [0x020-0x02b] Sequence info for Device Configuration command, similar
# as deviceModeSeq
configCmdSeqs_1:
# ------------------------------------------===== seqNum [Optional] =====-------------------------------------------
# Description: Offset: 0b, Width: 8b, Sequence Number, valid number: 1-16
seqNum: 0
# -------------------------------------------===== seqId [Optional] =====-------------------------------------------
# Description: Offset: 8b, Width: 8b, Sequence Index, valid number: 0-15
seqId: 0
# -----------------------------------------===== reserved [Optional] =====------------------------------------------
# Description: Offset: 16b, Width: 16b, N/A
reserved: 0
# ---------------------------------------===== configCmdSeqs_2 [Optional] =====---------------------------------------
# Description: Offset: 0x00000028, Width: 32b; [0x020-0x02b] Sequence info for Device Configuration command, similar
# as deviceModeSeq
configCmdSeqs_2:
# ------------------------------------------===== seqNum [Optional] =====-------------------------------------------
# Description: Offset: 0b, Width: 8b, Sequence Number, valid number: 1-16
seqNum: 0
# -------------------------------------------===== seqId [Optional] =====-------------------------------------------
# Description: Offset: 8b, Width: 8b, Sequence Index, valid number: 0-15
seqId: 0
# -----------------------------------------===== reserved [Optional] =====------------------------------------------
# Description: Offset: 16b, Width: 16b, N/A
reserved: 0
# ------------------------------------------===== reserved1 [Optional] =====------------------------------------------
# Description: Offset: 0x0000002C, Width: 32b; [0x02c-0x02f] Reserved for future use
reserved1: '0x00000000'
# ---------------------------------------===== configCmdArgs_0 [Optional] =====---------------------------------------
# Description: Offset: 0x00000030, Width: 32b; [0x030-0x03b] Arguments/Parameters for device Configuration commands
configCmdArgs_0: '0x00000000'
# ---------------------------------------===== configCmdArgs_1 [Optional] =====---------------------------------------
# Description: Offset: 0x00000034, Width: 32b; [0x030-0x03b] Arguments/Parameters for device Configuration commands
configCmdArgs_1: '0x00000000'
# ---------------------------------------===== configCmdArgs_2 [Optional] =====---------------------------------------
# Description: Offset: 0x00000038, Width: 32b; [0x030-0x03b] Arguments/Parameters for device Configuration commands
configCmdArgs_2: '0x00000000'
# ------------------------------------------===== reserved2 [Optional] =====------------------------------------------
# Description: Offset: 0x0000003C, Width: 32b; [0x03c-0x03f] Reserved for future use
reserved2: '0x00000000'
# ------------------------------------===== controllerMiscOption [Optional] =====-------------------------------------
# Description: Offset: 0x00000040, Width: 32b; [0x040-0x043] Controller Misc Options, see Misc feature bit
# definitions for more details
controllerMiscOption: '0x00000000'
# -----------------------------------------===== deviceType [Optional] =====------------------------------------------
# Description: Offset: 0x00000044, Width: 8b; [0x044-0x044] Device Type: See Flash Type Definition for more details
deviceType: '0x00'
# ----------------------------------------===== sflashPadType [Optional] =====----------------------------------------
# Description: Offset: 0x00000045, Width: 8b; [0x045-0x045] Serial Flash Pad Type: 1 - Single, 2 - Dual, 4 - Quad, 8
# - Octal
sflashPadType: '0x00'
# ----------------------------------------===== serialClkFreq [Optional] =====----------------------------------------
# Description: Offset: 0x00000046, Width: 8b; [0x046-0x046] Serial Flash Frequency, device specific definitions, See
# System Boot Chapter for more details
serialClkFreq: '0x00'
# -------------------------------------===== lutCustomSeqEnable [Optional] =====--------------------------------------
# Description: Offset: 0x00000047, Width: 8b; [0x047-0x047] LUT customization Enable, it is required if the
# program/erase cannot be done using 1 LUT sequence, currently, only applicable to HyperFLASH
lutCustomSeqEnable: '0x00'
# -----------------------------------------===== reserved3_0 [Optional] =====-----------------------------------------
# Description: Offset: 0x00000048, Width: 32b; [0x048-0x04f] Reserved for future use
reserved3_0: '0x00000000'
# -----------------------------------------===== reserved3_1 [Optional] =====-----------------------------------------
# Description: Offset: 0x0000004C, Width: 32b; [0x048-0x04f] Reserved for future use
reserved3_1: '0x00000000'
# ----------------------------------------===== sflashA1Size [Optional] =====-----------------------------------------
# Description: Offset: 0x00000050, Width: 32b; [0x050-0x053] Size of Flash connected to A1
sflashA1Size: '0x00000000'
# ----------------------------------------===== sflashA2Size [Optional] =====-----------------------------------------
# Description: Offset: 0x00000054, Width: 32b; [0x054-0x057] Size of Flash connected to A2
sflashA2Size: '0x00000000'
# ----------------------------------------===== sflashB1Size [Optional] =====-----------------------------------------
# Description: Offset: 0x00000058, Width: 32b; [0x058-0x05b] Size of Flash connected to B1
sflashB1Size: '0x00000000'
# ----------------------------------------===== sflashB2Size [Optional] =====-----------------------------------------
# Description: Offset: 0x0000005C, Width: 32b; [0x05c-0x05f] Size of Flash connected to B2
sflashB2Size: '0x00000000'
# ------------------------------------===== csPadSettingOverride [Optional] =====-------------------------------------
# Description: Offset: 0x00000060, Width: 32b; [0x060-0x063] CS pad setting override value
csPadSettingOverride: '0x00000000'
# -----------------------------------===== sclkPadSettingOverride [Optional] =====------------------------------------
# Description: Offset: 0x00000064, Width: 32b; [0x064-0x067] SCK pad setting override value
sclkPadSettingOverride: '0x00000000'
# -----------------------------------===== dataPadSettingOverride [Optional] =====------------------------------------
# Description: Offset: 0x00000068, Width: 32b; [0x068-0x06b] data pad setting override value
dataPadSettingOverride: '0x00000000'
# ------------------------------------===== dqsPadSettingOverride [Optional] =====------------------------------------
# Description: Offset: 0x0000006C, Width: 32b; [0x06c-0x06f] DQS pad setting override value
dqsPadSettingOverride: '0x00000000'
# -----------------------------------------===== timeoutInMs [Optional] =====-----------------------------------------
# Description: Offset: 0x00000070, Width: 32b; [0x070-0x073] Timeout threshold for read status command
timeoutInMs: '0x00000000'
# ---------------------------------------===== commandInterval [Optional] =====---------------------------------------
# Description: Offset: 0x00000074, Width: 32b; [0x074-0x077] CS deselect interval between two commands
commandInterval: '0x00000000'
# ---------------------------------------===== dataValidTime_0 [Optional] =====---------------------------------------
# Description: Offset: 0x00000078, Width: 16b; [0x078-0x07b] CLK edge to data valid time for PORT A and PORT B, in
# terms of 0.1ns
dataValidTime_0: '0x0000'
# ---------------------------------------===== dataValidTime_1 [Optional] =====---------------------------------------
# Description: Offset: 0x0000007A, Width: 16b; [0x078-0x07b] CLK edge to data valid time for PORT A and PORT B, in
# terms of 0.1ns
dataValidTime_1: '0x0000'
# -----------------------------------------===== busyOffset [Optional] =====------------------------------------------
# Description: Offset: 0x0000007C, Width: 16b; [0x07c-0x07d] Busy offset, valid value: 0-31
busyOffset: '0x0000'
# ---------------------------------------===== busyBitPolarity [Optional] =====---------------------------------------
# Description: Offset: 0x0000007E, Width: 16b; [0x07e-0x07f] Busy flag polarity, 0 - busy flag is 1 when flash device
# is busy, 1 - busy flag is 0 when flash device is busy
busyBitPolarity: '0x0000'
# -----------------------------------===== lookupTable_seq0_instr0 [Optional] =====-----------------------------------
# Description: Offset: 0x00000080, Width: 16b; Lookup table holds Flash command sequences 0, instruction 0
lookupTable_seq0_instr0:
# ------------------------------------------===== OPERAND [Optional] =====------------------------------------------
# Description: Offset: 0b, Width: 8b, Instruction operand. Its values depends on used instruction
OPERAND: 0
# -----------------------------------------===== NUM_PADS [Optional] =====------------------------------------------
# Description: Offset: 8b, Width: 2b, Number of pads used by instruction. Some instructions ignores this parameter.
# - 1PAD, (0): Single mode. One pad is used.
# - 2PAD, (1): Dual mode. Two pads are used.
# - 4PAD, (2): Quad mode. Four pads are used.
# - 8PAD, (3): Octal mode. Eight pads are used.
# Possible options: <1PAD, 2PAD, 4PAD, 8PAD>
NUM_PADS: 1PAD
# --------------------------------------===== OPERATION_CODE [Optional] =====---------------------------------------
# Description: Offset: 10b, Width: 6b, Instruction operation code.
# - STOP, (0): Stop execution and de-assert CS. Then, the next command sequence (to the same flash device) starts
# from instruction pointer 0.
# - CMD_SDR, (1): Transmit command code to Flash.
# - RADDR_SDR, (2): Transmit row address to Flash.
# - CADDR_SDR, (3): Transmit column address to Flash.
# - MODE1_SDR, (4): Transmit mode bits to Flash.
# - MODE2_SDR, (5): Transmit mode bits to Flash.
# - MODE4_SDR, (6): Transmit mode bits to Flash.
# - MODE8_SDR, (7): Transmit mode bits to Flash.
# - WRITE_SDR, (8): Transmit program data to Flash device.
# - READ_SDR, (9): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_SDR, (10): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_SDR, (11): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_SDR, (12): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_SDR, (13): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# - JMP_ON_CS, (31): Stop execution, de-assert CS and save operand[7:0] as the instruction start pointer for next
# sequence.Normally this instruction is used to support Execute-In-Place enhanced mode. See XIP enhanced mode for
# more details.This instruction is only allowed for AHB read commands. There is interrupt status bit set
# (INTR[IPCMDERR] or INTR[AHBCMDERR]) when using this instruction in IP command or AHB write command.
# - CMD_DDR, (33): Transmit command code to Flash.
# - RADDR_DDR, (34): Transmit row address to Flash.
# - CADDR_DDR, (35): Transmit column address to Flash.
# - MODE1_DDR, (36): Transmit mode bits to Flash.
# - MODE2_DDR, (37): Transmit mode bits to Flash.
# - MODE4_DDR, (38): Transmit mode bits to Flash.
# - MODE8_DDR, (39): Transmit mode bits to Flash.
# - WRITE_DDR, (40): Transmit program data to Flash device.
# - READ_DDR, (41): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_DDR, (42): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_DDR, (43): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_DDR, (44): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_DDR, (45): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# Possible options: <STOP, CMD_SDR, RADDR_SDR, CADDR_SDR, MODE1_SDR, MODE2_SDR, MODE4_SDR, MODE8_SDR, WRITE_SDR,
# READ_SDR, LEARN_SDR, DATSZ_SDR, DUMMY_SDR, DUMMY_RWDS_SDR, JMP_ON_CS, CMD_DDR, RADDR_DDR, CADDR_DDR, MODE1_DDR,
# MODE2_DDR, MODE4_DDR, MODE8_DDR, WRITE_DDR, READ_DDR, LEARN_DDR, DATSZ_DDR, DUMMY_DDR, DUMMY_RWDS_DDR>
OPERATION_CODE: STOP
lookupTable_seq0_instr1:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq0_instr2:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq0_instr3:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq0_instr4:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq0_instr5:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq0_instr6:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq0_instr7:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
# -----------------------------------===== lookupTable_seq1_instr0 [Optional] =====-----------------------------------
# Description: Offset: 0x00000090, Width: 16b; Lookup table holds Flash command sequences 1, instruction 0
lookupTable_seq1_instr0:
# ------------------------------------------===== OPERAND [Optional] =====------------------------------------------
# Description: Offset: 0b, Width: 8b, Instruction operand. Its values depends on used instruction
OPERAND: 0
# -----------------------------------------===== NUM_PADS [Optional] =====------------------------------------------
# Description: Offset: 8b, Width: 2b, Number of pads used by instruction. Some instructions ignores this parameter.
# - 1PAD, (0): Single mode. One pad is used.
# - 2PAD, (1): Dual mode. Two pads are used.
# - 4PAD, (2): Quad mode. Four pads are used.
# - 8PAD, (3): Octal mode. Eight pads are used.
# Possible options: <1PAD, 2PAD, 4PAD, 8PAD>
NUM_PADS: 1PAD
# --------------------------------------===== OPERATION_CODE [Optional] =====---------------------------------------
# Description: Offset: 10b, Width: 6b, Instruction operation code.
# - STOP, (0): Stop execution and de-assert CS. Then, the next command sequence (to the same flash device) starts
# from instruction pointer 0.
# - CMD_SDR, (1): Transmit command code to Flash.
# - RADDR_SDR, (2): Transmit row address to Flash.
# - CADDR_SDR, (3): Transmit column address to Flash.
# - MODE1_SDR, (4): Transmit mode bits to Flash.
# - MODE2_SDR, (5): Transmit mode bits to Flash.
# - MODE4_SDR, (6): Transmit mode bits to Flash.
# - MODE8_SDR, (7): Transmit mode bits to Flash.
# - WRITE_SDR, (8): Transmit program data to Flash device.
# - READ_SDR, (9): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_SDR, (10): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_SDR, (11): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_SDR, (12): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_SDR, (13): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# - JMP_ON_CS, (31): Stop execution, de-assert CS and save operand[7:0] as the instruction start pointer for next
# sequence.Normally this instruction is used to support Execute-In-Place enhanced mode. See XIP enhanced mode for
# more details.This instruction is only allowed for AHB read commands. There is interrupt status bit set
# (INTR[IPCMDERR] or INTR[AHBCMDERR]) when using this instruction in IP command or AHB write command.
# - CMD_DDR, (33): Transmit command code to Flash.
# - RADDR_DDR, (34): Transmit row address to Flash.
# - CADDR_DDR, (35): Transmit column address to Flash.
# - MODE1_DDR, (36): Transmit mode bits to Flash.
# - MODE2_DDR, (37): Transmit mode bits to Flash.
# - MODE4_DDR, (38): Transmit mode bits to Flash.
# - MODE8_DDR, (39): Transmit mode bits to Flash.
# - WRITE_DDR, (40): Transmit program data to Flash device.
# - READ_DDR, (41): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_DDR, (42): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_DDR, (43): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_DDR, (44): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_DDR, (45): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# Possible options: <STOP, CMD_SDR, RADDR_SDR, CADDR_SDR, MODE1_SDR, MODE2_SDR, MODE4_SDR, MODE8_SDR, WRITE_SDR,
# READ_SDR, LEARN_SDR, DATSZ_SDR, DUMMY_SDR, DUMMY_RWDS_SDR, JMP_ON_CS, CMD_DDR, RADDR_DDR, CADDR_DDR, MODE1_DDR,
# MODE2_DDR, MODE4_DDR, MODE8_DDR, WRITE_DDR, READ_DDR, LEARN_DDR, DATSZ_DDR, DUMMY_DDR, DUMMY_RWDS_DDR>
OPERATION_CODE: STOP
lookupTable_seq1_instr1:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq1_instr2:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq1_instr3:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq1_instr4:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq1_instr5:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq1_instr6:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq1_instr7:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
# -----------------------------------===== lookupTable_seq2_instr0 [Optional] =====-----------------------------------
# Description: Offset: 0x000000A0, Width: 16b; Lookup table holds Flash command sequences 2, instruction 0
lookupTable_seq2_instr0:
# ------------------------------------------===== OPERAND [Optional] =====------------------------------------------
# Description: Offset: 0b, Width: 8b, Instruction operand. Its values depends on used instruction
OPERAND: 0
# -----------------------------------------===== NUM_PADS [Optional] =====------------------------------------------
# Description: Offset: 8b, Width: 2b, Number of pads used by instruction. Some instructions ignores this parameter.
# - 1PAD, (0): Single mode. One pad is used.
# - 2PAD, (1): Dual mode. Two pads are used.
# - 4PAD, (2): Quad mode. Four pads are used.
# - 8PAD, (3): Octal mode. Eight pads are used.
# Possible options: <1PAD, 2PAD, 4PAD, 8PAD>
NUM_PADS: 1PAD
# --------------------------------------===== OPERATION_CODE [Optional] =====---------------------------------------
# Description: Offset: 10b, Width: 6b, Instruction operation code.
# - STOP, (0): Stop execution and de-assert CS. Then, the next command sequence (to the same flash device) starts
# from instruction pointer 0.
# - CMD_SDR, (1): Transmit command code to Flash.
# - RADDR_SDR, (2): Transmit row address to Flash.
# - CADDR_SDR, (3): Transmit column address to Flash.
# - MODE1_SDR, (4): Transmit mode bits to Flash.
# - MODE2_SDR, (5): Transmit mode bits to Flash.
# - MODE4_SDR, (6): Transmit mode bits to Flash.
# - MODE8_SDR, (7): Transmit mode bits to Flash.
# - WRITE_SDR, (8): Transmit program data to Flash device.
# - READ_SDR, (9): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_SDR, (10): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_SDR, (11): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_SDR, (12): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_SDR, (13): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# - JMP_ON_CS, (31): Stop execution, de-assert CS and save operand[7:0] as the instruction start pointer for next
# sequence.Normally this instruction is used to support Execute-In-Place enhanced mode. See XIP enhanced mode for
# more details.This instruction is only allowed for AHB read commands. There is interrupt status bit set
# (INTR[IPCMDERR] or INTR[AHBCMDERR]) when using this instruction in IP command or AHB write command.
# - CMD_DDR, (33): Transmit command code to Flash.
# - RADDR_DDR, (34): Transmit row address to Flash.
# - CADDR_DDR, (35): Transmit column address to Flash.
# - MODE1_DDR, (36): Transmit mode bits to Flash.
# - MODE2_DDR, (37): Transmit mode bits to Flash.
# - MODE4_DDR, (38): Transmit mode bits to Flash.
# - MODE8_DDR, (39): Transmit mode bits to Flash.
# - WRITE_DDR, (40): Transmit program data to Flash device.
# - READ_DDR, (41): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_DDR, (42): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_DDR, (43): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_DDR, (44): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_DDR, (45): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# Possible options: <STOP, CMD_SDR, RADDR_SDR, CADDR_SDR, MODE1_SDR, MODE2_SDR, MODE4_SDR, MODE8_SDR, WRITE_SDR,
# READ_SDR, LEARN_SDR, DATSZ_SDR, DUMMY_SDR, DUMMY_RWDS_SDR, JMP_ON_CS, CMD_DDR, RADDR_DDR, CADDR_DDR, MODE1_DDR,
# MODE2_DDR, MODE4_DDR, MODE8_DDR, WRITE_DDR, READ_DDR, LEARN_DDR, DATSZ_DDR, DUMMY_DDR, DUMMY_RWDS_DDR>
OPERATION_CODE: STOP
lookupTable_seq2_instr1:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq2_instr2:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq2_instr3:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq2_instr4:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq2_instr5:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq2_instr6:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq2_instr7:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
# -----------------------------------===== lookupTable_seq3_instr0 [Optional] =====-----------------------------------
# Description: Offset: 0x000000B0, Width: 16b; Lookup table holds Flash command sequences 3, instruction 0
lookupTable_seq3_instr0:
# ------------------------------------------===== OPERAND [Optional] =====------------------------------------------
# Description: Offset: 0b, Width: 8b, Instruction operand. Its values depends on used instruction
OPERAND: 0
# -----------------------------------------===== NUM_PADS [Optional] =====------------------------------------------
# Description: Offset: 8b, Width: 2b, Number of pads used by instruction. Some instructions ignores this parameter.
# - 1PAD, (0): Single mode. One pad is used.
# - 2PAD, (1): Dual mode. Two pads are used.
# - 4PAD, (2): Quad mode. Four pads are used.
# - 8PAD, (3): Octal mode. Eight pads are used.
# Possible options: <1PAD, 2PAD, 4PAD, 8PAD>
NUM_PADS: 1PAD
# --------------------------------------===== OPERATION_CODE [Optional] =====---------------------------------------
# Description: Offset: 10b, Width: 6b, Instruction operation code.
# - STOP, (0): Stop execution and de-assert CS. Then, the next command sequence (to the same flash device) starts
# from instruction pointer 0.
# - CMD_SDR, (1): Transmit command code to Flash.
# - RADDR_SDR, (2): Transmit row address to Flash.
# - CADDR_SDR, (3): Transmit column address to Flash.
# - MODE1_SDR, (4): Transmit mode bits to Flash.
# - MODE2_SDR, (5): Transmit mode bits to Flash.
# - MODE4_SDR, (6): Transmit mode bits to Flash.
# - MODE8_SDR, (7): Transmit mode bits to Flash.
# - WRITE_SDR, (8): Transmit program data to Flash device.
# - READ_SDR, (9): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_SDR, (10): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_SDR, (11): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_SDR, (12): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_SDR, (13): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# - JMP_ON_CS, (31): Stop execution, de-assert CS and save operand[7:0] as the instruction start pointer for next
# sequence.Normally this instruction is used to support Execute-In-Place enhanced mode. See XIP enhanced mode for
# more details.This instruction is only allowed for AHB read commands. There is interrupt status bit set
# (INTR[IPCMDERR] or INTR[AHBCMDERR]) when using this instruction in IP command or AHB write command.
# - CMD_DDR, (33): Transmit command code to Flash.
# - RADDR_DDR, (34): Transmit row address to Flash.
# - CADDR_DDR, (35): Transmit column address to Flash.
# - MODE1_DDR, (36): Transmit mode bits to Flash.
# - MODE2_DDR, (37): Transmit mode bits to Flash.
# - MODE4_DDR, (38): Transmit mode bits to Flash.
# - MODE8_DDR, (39): Transmit mode bits to Flash.
# - WRITE_DDR, (40): Transmit program data to Flash device.
# - READ_DDR, (41): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_DDR, (42): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_DDR, (43): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_DDR, (44): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_DDR, (45): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# Possible options: <STOP, CMD_SDR, RADDR_SDR, CADDR_SDR, MODE1_SDR, MODE2_SDR, MODE4_SDR, MODE8_SDR, WRITE_SDR,
# READ_SDR, LEARN_SDR, DATSZ_SDR, DUMMY_SDR, DUMMY_RWDS_SDR, JMP_ON_CS, CMD_DDR, RADDR_DDR, CADDR_DDR, MODE1_DDR,
# MODE2_DDR, MODE4_DDR, MODE8_DDR, WRITE_DDR, READ_DDR, LEARN_DDR, DATSZ_DDR, DUMMY_DDR, DUMMY_RWDS_DDR>
OPERATION_CODE: STOP
lookupTable_seq3_instr1:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq3_instr2:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq3_instr3:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq3_instr4:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq3_instr5:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq3_instr6:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq3_instr7:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
# -----------------------------------===== lookupTable_seq4_instr0 [Optional] =====-----------------------------------
# Description: Offset: 0x000000C0, Width: 16b; Lookup table holds Flash command sequences 4, instruction 0
lookupTable_seq4_instr0:
# ------------------------------------------===== OPERAND [Optional] =====------------------------------------------
# Description: Offset: 0b, Width: 8b, Instruction operand. Its values depends on used instruction
OPERAND: 0
# -----------------------------------------===== NUM_PADS [Optional] =====------------------------------------------
# Description: Offset: 8b, Width: 2b, Number of pads used by instruction. Some instructions ignores this parameter.
# - 1PAD, (0): Single mode. One pad is used.
# - 2PAD, (1): Dual mode. Two pads are used.
# - 4PAD, (2): Quad mode. Four pads are used.
# - 8PAD, (3): Octal mode. Eight pads are used.
# Possible options: <1PAD, 2PAD, 4PAD, 8PAD>
NUM_PADS: 1PAD
# --------------------------------------===== OPERATION_CODE [Optional] =====---------------------------------------
# Description: Offset: 10b, Width: 6b, Instruction operation code.
# - STOP, (0): Stop execution and de-assert CS. Then, the next command sequence (to the same flash device) starts
# from instruction pointer 0.
# - CMD_SDR, (1): Transmit command code to Flash.
# - RADDR_SDR, (2): Transmit row address to Flash.
# - CADDR_SDR, (3): Transmit column address to Flash.
# - MODE1_SDR, (4): Transmit mode bits to Flash.
# - MODE2_SDR, (5): Transmit mode bits to Flash.
# - MODE4_SDR, (6): Transmit mode bits to Flash.
# - MODE8_SDR, (7): Transmit mode bits to Flash.
# - WRITE_SDR, (8): Transmit program data to Flash device.
# - READ_SDR, (9): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_SDR, (10): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_SDR, (11): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_SDR, (12): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_SDR, (13): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# - JMP_ON_CS, (31): Stop execution, de-assert CS and save operand[7:0] as the instruction start pointer for next
# sequence.Normally this instruction is used to support Execute-In-Place enhanced mode. See XIP enhanced mode for
# more details.This instruction is only allowed for AHB read commands. There is interrupt status bit set
# (INTR[IPCMDERR] or INTR[AHBCMDERR]) when using this instruction in IP command or AHB write command.
# - CMD_DDR, (33): Transmit command code to Flash.
# - RADDR_DDR, (34): Transmit row address to Flash.
# - CADDR_DDR, (35): Transmit column address to Flash.
# - MODE1_DDR, (36): Transmit mode bits to Flash.
# - MODE2_DDR, (37): Transmit mode bits to Flash.
# - MODE4_DDR, (38): Transmit mode bits to Flash.
# - MODE8_DDR, (39): Transmit mode bits to Flash.
# - WRITE_DDR, (40): Transmit program data to Flash device.
# - READ_DDR, (41): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_DDR, (42): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_DDR, (43): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_DDR, (44): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_DDR, (45): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# Possible options: <STOP, CMD_SDR, RADDR_SDR, CADDR_SDR, MODE1_SDR, MODE2_SDR, MODE4_SDR, MODE8_SDR, WRITE_SDR,
# READ_SDR, LEARN_SDR, DATSZ_SDR, DUMMY_SDR, DUMMY_RWDS_SDR, JMP_ON_CS, CMD_DDR, RADDR_DDR, CADDR_DDR, MODE1_DDR,
# MODE2_DDR, MODE4_DDR, MODE8_DDR, WRITE_DDR, READ_DDR, LEARN_DDR, DATSZ_DDR, DUMMY_DDR, DUMMY_RWDS_DDR>
OPERATION_CODE: STOP
lookupTable_seq4_instr1:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq4_instr2:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq4_instr3:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq4_instr4:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq4_instr5:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq4_instr6:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq4_instr7:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
# -----------------------------------===== lookupTable_seq5_instr0 [Optional] =====-----------------------------------
# Description: Offset: 0x000000D0, Width: 16b; Lookup table holds Flash command sequences 5, instruction 0
lookupTable_seq5_instr0:
# ------------------------------------------===== OPERAND [Optional] =====------------------------------------------
# Description: Offset: 0b, Width: 8b, Instruction operand. Its values depends on used instruction
OPERAND: 0
# -----------------------------------------===== NUM_PADS [Optional] =====------------------------------------------
# Description: Offset: 8b, Width: 2b, Number of pads used by instruction. Some instructions ignores this parameter.
# - 1PAD, (0): Single mode. One pad is used.
# - 2PAD, (1): Dual mode. Two pads are used.
# - 4PAD, (2): Quad mode. Four pads are used.
# - 8PAD, (3): Octal mode. Eight pads are used.
# Possible options: <1PAD, 2PAD, 4PAD, 8PAD>
NUM_PADS: 1PAD
# --------------------------------------===== OPERATION_CODE [Optional] =====---------------------------------------
# Description: Offset: 10b, Width: 6b, Instruction operation code.
# - STOP, (0): Stop execution and de-assert CS. Then, the next command sequence (to the same flash device) starts
# from instruction pointer 0.
# - CMD_SDR, (1): Transmit command code to Flash.
# - RADDR_SDR, (2): Transmit row address to Flash.
# - CADDR_SDR, (3): Transmit column address to Flash.
# - MODE1_SDR, (4): Transmit mode bits to Flash.
# - MODE2_SDR, (5): Transmit mode bits to Flash.
# - MODE4_SDR, (6): Transmit mode bits to Flash.
# - MODE8_SDR, (7): Transmit mode bits to Flash.
# - WRITE_SDR, (8): Transmit program data to Flash device.
# - READ_SDR, (9): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_SDR, (10): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_SDR, (11): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_SDR, (12): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_SDR, (13): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# - JMP_ON_CS, (31): Stop execution, de-assert CS and save operand[7:0] as the instruction start pointer for next
# sequence.Normally this instruction is used to support Execute-In-Place enhanced mode. See XIP enhanced mode for
# more details.This instruction is only allowed for AHB read commands. There is interrupt status bit set
# (INTR[IPCMDERR] or INTR[AHBCMDERR]) when using this instruction in IP command or AHB write command.
# - CMD_DDR, (33): Transmit command code to Flash.
# - RADDR_DDR, (34): Transmit row address to Flash.
# - CADDR_DDR, (35): Transmit column address to Flash.
# - MODE1_DDR, (36): Transmit mode bits to Flash.
# - MODE2_DDR, (37): Transmit mode bits to Flash.
# - MODE4_DDR, (38): Transmit mode bits to Flash.
# - MODE8_DDR, (39): Transmit mode bits to Flash.
# - WRITE_DDR, (40): Transmit program data to Flash device.
# - READ_DDR, (41): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_DDR, (42): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_DDR, (43): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_DDR, (44): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_DDR, (45): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# Possible options: <STOP, CMD_SDR, RADDR_SDR, CADDR_SDR, MODE1_SDR, MODE2_SDR, MODE4_SDR, MODE8_SDR, WRITE_SDR,
# READ_SDR, LEARN_SDR, DATSZ_SDR, DUMMY_SDR, DUMMY_RWDS_SDR, JMP_ON_CS, CMD_DDR, RADDR_DDR, CADDR_DDR, MODE1_DDR,
# MODE2_DDR, MODE4_DDR, MODE8_DDR, WRITE_DDR, READ_DDR, LEARN_DDR, DATSZ_DDR, DUMMY_DDR, DUMMY_RWDS_DDR>
OPERATION_CODE: STOP
lookupTable_seq5_instr1:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq5_instr2:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq5_instr3:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq5_instr4:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq5_instr5:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq5_instr6:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq5_instr7:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
# -----------------------------------===== lookupTable_seq6_instr0 [Optional] =====-----------------------------------
# Description: Offset: 0x000000E0, Width: 16b; Lookup table holds Flash command sequences 6, instruction 0
lookupTable_seq6_instr0:
# ------------------------------------------===== OPERAND [Optional] =====------------------------------------------
# Description: Offset: 0b, Width: 8b, Instruction operand. Its values depends on used instruction
OPERAND: 0
# -----------------------------------------===== NUM_PADS [Optional] =====------------------------------------------
# Description: Offset: 8b, Width: 2b, Number of pads used by instruction. Some instructions ignores this parameter.
# - 1PAD, (0): Single mode. One pad is used.
# - 2PAD, (1): Dual mode. Two pads are used.
# - 4PAD, (2): Quad mode. Four pads are used.
# - 8PAD, (3): Octal mode. Eight pads are used.
# Possible options: <1PAD, 2PAD, 4PAD, 8PAD>
NUM_PADS: 1PAD
# --------------------------------------===== OPERATION_CODE [Optional] =====---------------------------------------
# Description: Offset: 10b, Width: 6b, Instruction operation code.
# - STOP, (0): Stop execution and de-assert CS. Then, the next command sequence (to the same flash device) starts
# from instruction pointer 0.
# - CMD_SDR, (1): Transmit command code to Flash.
# - RADDR_SDR, (2): Transmit row address to Flash.
# - CADDR_SDR, (3): Transmit column address to Flash.
# - MODE1_SDR, (4): Transmit mode bits to Flash.
# - MODE2_SDR, (5): Transmit mode bits to Flash.
# - MODE4_SDR, (6): Transmit mode bits to Flash.
# - MODE8_SDR, (7): Transmit mode bits to Flash.
# - WRITE_SDR, (8): Transmit program data to Flash device.
# - READ_SDR, (9): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_SDR, (10): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_SDR, (11): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_SDR, (12): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_SDR, (13): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# - JMP_ON_CS, (31): Stop execution, de-assert CS and save operand[7:0] as the instruction start pointer for next
# sequence.Normally this instruction is used to support Execute-In-Place enhanced mode. See XIP enhanced mode for
# more details.This instruction is only allowed for AHB read commands. There is interrupt status bit set
# (INTR[IPCMDERR] or INTR[AHBCMDERR]) when using this instruction in IP command or AHB write command.
# - CMD_DDR, (33): Transmit command code to Flash.
# - RADDR_DDR, (34): Transmit row address to Flash.
# - CADDR_DDR, (35): Transmit column address to Flash.
# - MODE1_DDR, (36): Transmit mode bits to Flash.
# - MODE2_DDR, (37): Transmit mode bits to Flash.
# - MODE4_DDR, (38): Transmit mode bits to Flash.
# - MODE8_DDR, (39): Transmit mode bits to Flash.
# - WRITE_DDR, (40): Transmit program data to Flash device.
# - READ_DDR, (41): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_DDR, (42): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_DDR, (43): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_DDR, (44): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_DDR, (45): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# Possible options: <STOP, CMD_SDR, RADDR_SDR, CADDR_SDR, MODE1_SDR, MODE2_SDR, MODE4_SDR, MODE8_SDR, WRITE_SDR,
# READ_SDR, LEARN_SDR, DATSZ_SDR, DUMMY_SDR, DUMMY_RWDS_SDR, JMP_ON_CS, CMD_DDR, RADDR_DDR, CADDR_DDR, MODE1_DDR,
# MODE2_DDR, MODE4_DDR, MODE8_DDR, WRITE_DDR, READ_DDR, LEARN_DDR, DATSZ_DDR, DUMMY_DDR, DUMMY_RWDS_DDR>
OPERATION_CODE: STOP
lookupTable_seq6_instr1:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq6_instr2:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq6_instr3:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq6_instr4:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq6_instr5:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq6_instr6:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq6_instr7:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
# -----------------------------------===== lookupTable_seq7_instr0 [Optional] =====-----------------------------------
# Description: Offset: 0x000000F0, Width: 16b; Lookup table holds Flash command sequences 7, instruction 0
lookupTable_seq7_instr0:
# ------------------------------------------===== OPERAND [Optional] =====------------------------------------------
# Description: Offset: 0b, Width: 8b, Instruction operand. Its values depends on used instruction
OPERAND: 0
# -----------------------------------------===== NUM_PADS [Optional] =====------------------------------------------
# Description: Offset: 8b, Width: 2b, Number of pads used by instruction. Some instructions ignores this parameter.
# - 1PAD, (0): Single mode. One pad is used.
# - 2PAD, (1): Dual mode. Two pads are used.
# - 4PAD, (2): Quad mode. Four pads are used.
# - 8PAD, (3): Octal mode. Eight pads are used.
# Possible options: <1PAD, 2PAD, 4PAD, 8PAD>
NUM_PADS: 1PAD
# --------------------------------------===== OPERATION_CODE [Optional] =====---------------------------------------
# Description: Offset: 10b, Width: 6b, Instruction operation code.
# - STOP, (0): Stop execution and de-assert CS. Then, the next command sequence (to the same flash device) starts
# from instruction pointer 0.
# - CMD_SDR, (1): Transmit command code to Flash.
# - RADDR_SDR, (2): Transmit row address to Flash.
# - CADDR_SDR, (3): Transmit column address to Flash.
# - MODE1_SDR, (4): Transmit mode bits to Flash.
# - MODE2_SDR, (5): Transmit mode bits to Flash.
# - MODE4_SDR, (6): Transmit mode bits to Flash.
# - MODE8_SDR, (7): Transmit mode bits to Flash.
# - WRITE_SDR, (8): Transmit program data to Flash device.
# - READ_SDR, (9): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_SDR, (10): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_SDR, (11): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_SDR, (12): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_SDR, (13): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# - JMP_ON_CS, (31): Stop execution, de-assert CS and save operand[7:0] as the instruction start pointer for next
# sequence.Normally this instruction is used to support Execute-In-Place enhanced mode. See XIP enhanced mode for
# more details.This instruction is only allowed for AHB read commands. There is interrupt status bit set
# (INTR[IPCMDERR] or INTR[AHBCMDERR]) when using this instruction in IP command or AHB write command.
# - CMD_DDR, (33): Transmit command code to Flash.
# - RADDR_DDR, (34): Transmit row address to Flash.
# - CADDR_DDR, (35): Transmit column address to Flash.
# - MODE1_DDR, (36): Transmit mode bits to Flash.
# - MODE2_DDR, (37): Transmit mode bits to Flash.
# - MODE4_DDR, (38): Transmit mode bits to Flash.
# - MODE8_DDR, (39): Transmit mode bits to Flash.
# - WRITE_DDR, (40): Transmit program data to Flash device.
# - READ_DDR, (41): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_DDR, (42): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_DDR, (43): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_DDR, (44): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_DDR, (45): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# Possible options: <STOP, CMD_SDR, RADDR_SDR, CADDR_SDR, MODE1_SDR, MODE2_SDR, MODE4_SDR, MODE8_SDR, WRITE_SDR,
# READ_SDR, LEARN_SDR, DATSZ_SDR, DUMMY_SDR, DUMMY_RWDS_SDR, JMP_ON_CS, CMD_DDR, RADDR_DDR, CADDR_DDR, MODE1_DDR,
# MODE2_DDR, MODE4_DDR, MODE8_DDR, WRITE_DDR, READ_DDR, LEARN_DDR, DATSZ_DDR, DUMMY_DDR, DUMMY_RWDS_DDR>
OPERATION_CODE: STOP
lookupTable_seq7_instr1:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq7_instr2:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq7_instr3:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq7_instr4:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq7_instr5:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq7_instr6:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq7_instr7:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
# -----------------------------------===== lookupTable_seq8_instr0 [Optional] =====-----------------------------------
# Description: Offset: 0x00000100, Width: 16b; Lookup table holds Flash command sequences 8, instruction 0
lookupTable_seq8_instr0:
# ------------------------------------------===== OPERAND [Optional] =====------------------------------------------
# Description: Offset: 0b, Width: 8b, Instruction operand. Its values depends on used instruction
OPERAND: 0
# -----------------------------------------===== NUM_PADS [Optional] =====------------------------------------------
# Description: Offset: 8b, Width: 2b, Number of pads used by instruction. Some instructions ignores this parameter.
# - 1PAD, (0): Single mode. One pad is used.
# - 2PAD, (1): Dual mode. Two pads are used.
# - 4PAD, (2): Quad mode. Four pads are used.
# - 8PAD, (3): Octal mode. Eight pads are used.
# Possible options: <1PAD, 2PAD, 4PAD, 8PAD>
NUM_PADS: 1PAD
# --------------------------------------===== OPERATION_CODE [Optional] =====---------------------------------------
# Description: Offset: 10b, Width: 6b, Instruction operation code.
# - STOP, (0): Stop execution and de-assert CS. Then, the next command sequence (to the same flash device) starts
# from instruction pointer 0.
# - CMD_SDR, (1): Transmit command code to Flash.
# - RADDR_SDR, (2): Transmit row address to Flash.
# - CADDR_SDR, (3): Transmit column address to Flash.
# - MODE1_SDR, (4): Transmit mode bits to Flash.
# - MODE2_SDR, (5): Transmit mode bits to Flash.
# - MODE4_SDR, (6): Transmit mode bits to Flash.
# - MODE8_SDR, (7): Transmit mode bits to Flash.
# - WRITE_SDR, (8): Transmit program data to Flash device.
# - READ_SDR, (9): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_SDR, (10): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_SDR, (11): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_SDR, (12): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_SDR, (13): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# - JMP_ON_CS, (31): Stop execution, de-assert CS and save operand[7:0] as the instruction start pointer for next
# sequence.Normally this instruction is used to support Execute-In-Place enhanced mode. See XIP enhanced mode for
# more details.This instruction is only allowed for AHB read commands. There is interrupt status bit set
# (INTR[IPCMDERR] or INTR[AHBCMDERR]) when using this instruction in IP command or AHB write command.
# - CMD_DDR, (33): Transmit command code to Flash.
# - RADDR_DDR, (34): Transmit row address to Flash.
# - CADDR_DDR, (35): Transmit column address to Flash.
# - MODE1_DDR, (36): Transmit mode bits to Flash.
# - MODE2_DDR, (37): Transmit mode bits to Flash.
# - MODE4_DDR, (38): Transmit mode bits to Flash.
# - MODE8_DDR, (39): Transmit mode bits to Flash.
# - WRITE_DDR, (40): Transmit program data to Flash device.
# - READ_DDR, (41): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_DDR, (42): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_DDR, (43): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_DDR, (44): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_DDR, (45): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# Possible options: <STOP, CMD_SDR, RADDR_SDR, CADDR_SDR, MODE1_SDR, MODE2_SDR, MODE4_SDR, MODE8_SDR, WRITE_SDR,
# READ_SDR, LEARN_SDR, DATSZ_SDR, DUMMY_SDR, DUMMY_RWDS_SDR, JMP_ON_CS, CMD_DDR, RADDR_DDR, CADDR_DDR, MODE1_DDR,
# MODE2_DDR, MODE4_DDR, MODE8_DDR, WRITE_DDR, READ_DDR, LEARN_DDR, DATSZ_DDR, DUMMY_DDR, DUMMY_RWDS_DDR>
OPERATION_CODE: STOP
lookupTable_seq8_instr1:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq8_instr2:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq8_instr3:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq8_instr4:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq8_instr5:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq8_instr6:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq8_instr7:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
# -----------------------------------===== lookupTable_seq9_instr0 [Optional] =====-----------------------------------
# Description: Offset: 0x00000110, Width: 16b; Lookup table holds Flash command sequences 9, instruction 0
lookupTable_seq9_instr0:
# ------------------------------------------===== OPERAND [Optional] =====------------------------------------------
# Description: Offset: 0b, Width: 8b, Instruction operand. Its values depends on used instruction
OPERAND: 0
# -----------------------------------------===== NUM_PADS [Optional] =====------------------------------------------
# Description: Offset: 8b, Width: 2b, Number of pads used by instruction. Some instructions ignores this parameter.
# - 1PAD, (0): Single mode. One pad is used.
# - 2PAD, (1): Dual mode. Two pads are used.
# - 4PAD, (2): Quad mode. Four pads are used.
# - 8PAD, (3): Octal mode. Eight pads are used.
# Possible options: <1PAD, 2PAD, 4PAD, 8PAD>
NUM_PADS: 1PAD
# --------------------------------------===== OPERATION_CODE [Optional] =====---------------------------------------
# Description: Offset: 10b, Width: 6b, Instruction operation code.
# - STOP, (0): Stop execution and de-assert CS. Then, the next command sequence (to the same flash device) starts
# from instruction pointer 0.
# - CMD_SDR, (1): Transmit command code to Flash.
# - RADDR_SDR, (2): Transmit row address to Flash.
# - CADDR_SDR, (3): Transmit column address to Flash.
# - MODE1_SDR, (4): Transmit mode bits to Flash.
# - MODE2_SDR, (5): Transmit mode bits to Flash.
# - MODE4_SDR, (6): Transmit mode bits to Flash.
# - MODE8_SDR, (7): Transmit mode bits to Flash.
# - WRITE_SDR, (8): Transmit program data to Flash device.
# - READ_SDR, (9): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_SDR, (10): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_SDR, (11): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_SDR, (12): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_SDR, (13): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# - JMP_ON_CS, (31): Stop execution, de-assert CS and save operand[7:0] as the instruction start pointer for next
# sequence.Normally this instruction is used to support Execute-In-Place enhanced mode. See XIP enhanced mode for
# more details.This instruction is only allowed for AHB read commands. There is interrupt status bit set
# (INTR[IPCMDERR] or INTR[AHBCMDERR]) when using this instruction in IP command or AHB write command.
# - CMD_DDR, (33): Transmit command code to Flash.
# - RADDR_DDR, (34): Transmit row address to Flash.
# - CADDR_DDR, (35): Transmit column address to Flash.
# - MODE1_DDR, (36): Transmit mode bits to Flash.
# - MODE2_DDR, (37): Transmit mode bits to Flash.
# - MODE4_DDR, (38): Transmit mode bits to Flash.
# - MODE8_DDR, (39): Transmit mode bits to Flash.
# - WRITE_DDR, (40): Transmit program data to Flash device.
# - READ_DDR, (41): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_DDR, (42): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_DDR, (43): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_DDR, (44): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_DDR, (45): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# Possible options: <STOP, CMD_SDR, RADDR_SDR, CADDR_SDR, MODE1_SDR, MODE2_SDR, MODE4_SDR, MODE8_SDR, WRITE_SDR,
# READ_SDR, LEARN_SDR, DATSZ_SDR, DUMMY_SDR, DUMMY_RWDS_SDR, JMP_ON_CS, CMD_DDR, RADDR_DDR, CADDR_DDR, MODE1_DDR,
# MODE2_DDR, MODE4_DDR, MODE8_DDR, WRITE_DDR, READ_DDR, LEARN_DDR, DATSZ_DDR, DUMMY_DDR, DUMMY_RWDS_DDR>
OPERATION_CODE: STOP
lookupTable_seq9_instr1:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq9_instr2:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq9_instr3:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq9_instr4:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq9_instr5:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq9_instr6:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq9_instr7:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
# ----------------------------------===== lookupTable_seq10_instr0 [Optional] =====-----------------------------------
# Description: Offset: 0x00000120, Width: 16b; Lookup table holds Flash command sequences 10, instruction 0
lookupTable_seq10_instr0:
# ------------------------------------------===== OPERAND [Optional] =====------------------------------------------
# Description: Offset: 0b, Width: 8b, Instruction operand. Its values depends on used instruction
OPERAND: 0
# -----------------------------------------===== NUM_PADS [Optional] =====------------------------------------------
# Description: Offset: 8b, Width: 2b, Number of pads used by instruction. Some instructions ignores this parameter.
# - 1PAD, (0): Single mode. One pad is used.
# - 2PAD, (1): Dual mode. Two pads are used.
# - 4PAD, (2): Quad mode. Four pads are used.
# - 8PAD, (3): Octal mode. Eight pads are used.
# Possible options: <1PAD, 2PAD, 4PAD, 8PAD>
NUM_PADS: 1PAD
# --------------------------------------===== OPERATION_CODE [Optional] =====---------------------------------------
# Description: Offset: 10b, Width: 6b, Instruction operation code.
# - STOP, (0): Stop execution and de-assert CS. Then, the next command sequence (to the same flash device) starts
# from instruction pointer 0.
# - CMD_SDR, (1): Transmit command code to Flash.
# - RADDR_SDR, (2): Transmit row address to Flash.
# - CADDR_SDR, (3): Transmit column address to Flash.
# - MODE1_SDR, (4): Transmit mode bits to Flash.
# - MODE2_SDR, (5): Transmit mode bits to Flash.
# - MODE4_SDR, (6): Transmit mode bits to Flash.
# - MODE8_SDR, (7): Transmit mode bits to Flash.
# - WRITE_SDR, (8): Transmit program data to Flash device.
# - READ_SDR, (9): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_SDR, (10): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_SDR, (11): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_SDR, (12): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_SDR, (13): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# - JMP_ON_CS, (31): Stop execution, de-assert CS and save operand[7:0] as the instruction start pointer for next
# sequence.Normally this instruction is used to support Execute-In-Place enhanced mode. See XIP enhanced mode for
# more details.This instruction is only allowed for AHB read commands. There is interrupt status bit set
# (INTR[IPCMDERR] or INTR[AHBCMDERR]) when using this instruction in IP command or AHB write command.
# - CMD_DDR, (33): Transmit command code to Flash.
# - RADDR_DDR, (34): Transmit row address to Flash.
# - CADDR_DDR, (35): Transmit column address to Flash.
# - MODE1_DDR, (36): Transmit mode bits to Flash.
# - MODE2_DDR, (37): Transmit mode bits to Flash.
# - MODE4_DDR, (38): Transmit mode bits to Flash.
# - MODE8_DDR, (39): Transmit mode bits to Flash.
# - WRITE_DDR, (40): Transmit program data to Flash device.
# - READ_DDR, (41): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_DDR, (42): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_DDR, (43): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_DDR, (44): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_DDR, (45): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# Possible options: <STOP, CMD_SDR, RADDR_SDR, CADDR_SDR, MODE1_SDR, MODE2_SDR, MODE4_SDR, MODE8_SDR, WRITE_SDR,
# READ_SDR, LEARN_SDR, DATSZ_SDR, DUMMY_SDR, DUMMY_RWDS_SDR, JMP_ON_CS, CMD_DDR, RADDR_DDR, CADDR_DDR, MODE1_DDR,
# MODE2_DDR, MODE4_DDR, MODE8_DDR, WRITE_DDR, READ_DDR, LEARN_DDR, DATSZ_DDR, DUMMY_DDR, DUMMY_RWDS_DDR>
OPERATION_CODE: STOP
lookupTable_seq10_instr1:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq10_instr2:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq10_instr3:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq10_instr4:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq10_instr5:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq10_instr6:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq10_instr7:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
# ----------------------------------===== lookupTable_seq11_instr0 [Optional] =====-----------------------------------
# Description: Offset: 0x00000130, Width: 16b; Lookup table holds Flash command sequences 11, instruction 0
lookupTable_seq11_instr0:
# ------------------------------------------===== OPERAND [Optional] =====------------------------------------------
# Description: Offset: 0b, Width: 8b, Instruction operand. Its values depends on used instruction
OPERAND: 0
# -----------------------------------------===== NUM_PADS [Optional] =====------------------------------------------
# Description: Offset: 8b, Width: 2b, Number of pads used by instruction. Some instructions ignores this parameter.
# - 1PAD, (0): Single mode. One pad is used.
# - 2PAD, (1): Dual mode. Two pads are used.
# - 4PAD, (2): Quad mode. Four pads are used.
# - 8PAD, (3): Octal mode. Eight pads are used.
# Possible options: <1PAD, 2PAD, 4PAD, 8PAD>
NUM_PADS: 1PAD
# --------------------------------------===== OPERATION_CODE [Optional] =====---------------------------------------
# Description: Offset: 10b, Width: 6b, Instruction operation code.
# - STOP, (0): Stop execution and de-assert CS. Then, the next command sequence (to the same flash device) starts
# from instruction pointer 0.
# - CMD_SDR, (1): Transmit command code to Flash.
# - RADDR_SDR, (2): Transmit row address to Flash.
# - CADDR_SDR, (3): Transmit column address to Flash.
# - MODE1_SDR, (4): Transmit mode bits to Flash.
# - MODE2_SDR, (5): Transmit mode bits to Flash.
# - MODE4_SDR, (6): Transmit mode bits to Flash.
# - MODE8_SDR, (7): Transmit mode bits to Flash.
# - WRITE_SDR, (8): Transmit program data to Flash device.
# - READ_SDR, (9): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_SDR, (10): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_SDR, (11): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_SDR, (12): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_SDR, (13): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# - JMP_ON_CS, (31): Stop execution, de-assert CS and save operand[7:0] as the instruction start pointer for next
# sequence.Normally this instruction is used to support Execute-In-Place enhanced mode. See XIP enhanced mode for
# more details.This instruction is only allowed for AHB read commands. There is interrupt status bit set
# (INTR[IPCMDERR] or INTR[AHBCMDERR]) when using this instruction in IP command or AHB write command.
# - CMD_DDR, (33): Transmit command code to Flash.
# - RADDR_DDR, (34): Transmit row address to Flash.
# - CADDR_DDR, (35): Transmit column address to Flash.
# - MODE1_DDR, (36): Transmit mode bits to Flash.
# - MODE2_DDR, (37): Transmit mode bits to Flash.
# - MODE4_DDR, (38): Transmit mode bits to Flash.
# - MODE8_DDR, (39): Transmit mode bits to Flash.
# - WRITE_DDR, (40): Transmit program data to Flash device.
# - READ_DDR, (41): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_DDR, (42): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_DDR, (43): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_DDR, (44): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_DDR, (45): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# Possible options: <STOP, CMD_SDR, RADDR_SDR, CADDR_SDR, MODE1_SDR, MODE2_SDR, MODE4_SDR, MODE8_SDR, WRITE_SDR,
# READ_SDR, LEARN_SDR, DATSZ_SDR, DUMMY_SDR, DUMMY_RWDS_SDR, JMP_ON_CS, CMD_DDR, RADDR_DDR, CADDR_DDR, MODE1_DDR,
# MODE2_DDR, MODE4_DDR, MODE8_DDR, WRITE_DDR, READ_DDR, LEARN_DDR, DATSZ_DDR, DUMMY_DDR, DUMMY_RWDS_DDR>
OPERATION_CODE: STOP
lookupTable_seq11_instr1:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq11_instr2:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq11_instr3:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq11_instr4:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq11_instr5:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq11_instr6:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq11_instr7:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
# ----------------------------------===== lookupTable_seq12_instr0 [Optional] =====-----------------------------------
# Description: Offset: 0x00000140, Width: 16b; Lookup table holds Flash command sequences 12, instruction 0
lookupTable_seq12_instr0:
# ------------------------------------------===== OPERAND [Optional] =====------------------------------------------
# Description: Offset: 0b, Width: 8b, Instruction operand. Its values depends on used instruction
OPERAND: 0
# -----------------------------------------===== NUM_PADS [Optional] =====------------------------------------------
# Description: Offset: 8b, Width: 2b, Number of pads used by instruction. Some instructions ignores this parameter.
# - 1PAD, (0): Single mode. One pad is used.
# - 2PAD, (1): Dual mode. Two pads are used.
# - 4PAD, (2): Quad mode. Four pads are used.
# - 8PAD, (3): Octal mode. Eight pads are used.
# Possible options: <1PAD, 2PAD, 4PAD, 8PAD>
NUM_PADS: 1PAD
# --------------------------------------===== OPERATION_CODE [Optional] =====---------------------------------------
# Description: Offset: 10b, Width: 6b, Instruction operation code.
# - STOP, (0): Stop execution and de-assert CS. Then, the next command sequence (to the same flash device) starts
# from instruction pointer 0.
# - CMD_SDR, (1): Transmit command code to Flash.
# - RADDR_SDR, (2): Transmit row address to Flash.
# - CADDR_SDR, (3): Transmit column address to Flash.
# - MODE1_SDR, (4): Transmit mode bits to Flash.
# - MODE2_SDR, (5): Transmit mode bits to Flash.
# - MODE4_SDR, (6): Transmit mode bits to Flash.
# - MODE8_SDR, (7): Transmit mode bits to Flash.
# - WRITE_SDR, (8): Transmit program data to Flash device.
# - READ_SDR, (9): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_SDR, (10): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_SDR, (11): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_SDR, (12): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_SDR, (13): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# - JMP_ON_CS, (31): Stop execution, de-assert CS and save operand[7:0] as the instruction start pointer for next
# sequence.Normally this instruction is used to support Execute-In-Place enhanced mode. See XIP enhanced mode for
# more details.This instruction is only allowed for AHB read commands. There is interrupt status bit set
# (INTR[IPCMDERR] or INTR[AHBCMDERR]) when using this instruction in IP command or AHB write command.
# - CMD_DDR, (33): Transmit command code to Flash.
# - RADDR_DDR, (34): Transmit row address to Flash.
# - CADDR_DDR, (35): Transmit column address to Flash.
# - MODE1_DDR, (36): Transmit mode bits to Flash.
# - MODE2_DDR, (37): Transmit mode bits to Flash.
# - MODE4_DDR, (38): Transmit mode bits to Flash.
# - MODE8_DDR, (39): Transmit mode bits to Flash.
# - WRITE_DDR, (40): Transmit program data to Flash device.
# - READ_DDR, (41): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_DDR, (42): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_DDR, (43): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_DDR, (44): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_DDR, (45): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# Possible options: <STOP, CMD_SDR, RADDR_SDR, CADDR_SDR, MODE1_SDR, MODE2_SDR, MODE4_SDR, MODE8_SDR, WRITE_SDR,
# READ_SDR, LEARN_SDR, DATSZ_SDR, DUMMY_SDR, DUMMY_RWDS_SDR, JMP_ON_CS, CMD_DDR, RADDR_DDR, CADDR_DDR, MODE1_DDR,
# MODE2_DDR, MODE4_DDR, MODE8_DDR, WRITE_DDR, READ_DDR, LEARN_DDR, DATSZ_DDR, DUMMY_DDR, DUMMY_RWDS_DDR>
OPERATION_CODE: STOP
lookupTable_seq12_instr1:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq12_instr2:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq12_instr3:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq12_instr4:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq12_instr5:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq12_instr6:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq12_instr7:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
# ----------------------------------===== lookupTable_seq13_instr0 [Optional] =====-----------------------------------
# Description: Offset: 0x00000150, Width: 16b; Lookup table holds Flash command sequences 13, instruction 0
lookupTable_seq13_instr0:
# ------------------------------------------===== OPERAND [Optional] =====------------------------------------------
# Description: Offset: 0b, Width: 8b, Instruction operand. Its values depends on used instruction
OPERAND: 0
# -----------------------------------------===== NUM_PADS [Optional] =====------------------------------------------
# Description: Offset: 8b, Width: 2b, Number of pads used by instruction. Some instructions ignores this parameter.
# - 1PAD, (0): Single mode. One pad is used.
# - 2PAD, (1): Dual mode. Two pads are used.
# - 4PAD, (2): Quad mode. Four pads are used.
# - 8PAD, (3): Octal mode. Eight pads are used.
# Possible options: <1PAD, 2PAD, 4PAD, 8PAD>
NUM_PADS: 1PAD
# --------------------------------------===== OPERATION_CODE [Optional] =====---------------------------------------
# Description: Offset: 10b, Width: 6b, Instruction operation code.
# - STOP, (0): Stop execution and de-assert CS. Then, the next command sequence (to the same flash device) starts
# from instruction pointer 0.
# - CMD_SDR, (1): Transmit command code to Flash.
# - RADDR_SDR, (2): Transmit row address to Flash.
# - CADDR_SDR, (3): Transmit column address to Flash.
# - MODE1_SDR, (4): Transmit mode bits to Flash.
# - MODE2_SDR, (5): Transmit mode bits to Flash.
# - MODE4_SDR, (6): Transmit mode bits to Flash.
# - MODE8_SDR, (7): Transmit mode bits to Flash.
# - WRITE_SDR, (8): Transmit program data to Flash device.
# - READ_SDR, (9): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_SDR, (10): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_SDR, (11): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_SDR, (12): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_SDR, (13): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# - JMP_ON_CS, (31): Stop execution, de-assert CS and save operand[7:0] as the instruction start pointer for next
# sequence.Normally this instruction is used to support Execute-In-Place enhanced mode. See XIP enhanced mode for
# more details.This instruction is only allowed for AHB read commands. There is interrupt status bit set
# (INTR[IPCMDERR] or INTR[AHBCMDERR]) when using this instruction in IP command or AHB write command.
# - CMD_DDR, (33): Transmit command code to Flash.
# - RADDR_DDR, (34): Transmit row address to Flash.
# - CADDR_DDR, (35): Transmit column address to Flash.
# - MODE1_DDR, (36): Transmit mode bits to Flash.
# - MODE2_DDR, (37): Transmit mode bits to Flash.
# - MODE4_DDR, (38): Transmit mode bits to Flash.
# - MODE8_DDR, (39): Transmit mode bits to Flash.
# - WRITE_DDR, (40): Transmit program data to Flash device.
# - READ_DDR, (41): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_DDR, (42): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_DDR, (43): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_DDR, (44): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_DDR, (45): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# Possible options: <STOP, CMD_SDR, RADDR_SDR, CADDR_SDR, MODE1_SDR, MODE2_SDR, MODE4_SDR, MODE8_SDR, WRITE_SDR,
# READ_SDR, LEARN_SDR, DATSZ_SDR, DUMMY_SDR, DUMMY_RWDS_SDR, JMP_ON_CS, CMD_DDR, RADDR_DDR, CADDR_DDR, MODE1_DDR,
# MODE2_DDR, MODE4_DDR, MODE8_DDR, WRITE_DDR, READ_DDR, LEARN_DDR, DATSZ_DDR, DUMMY_DDR, DUMMY_RWDS_DDR>
OPERATION_CODE: STOP
lookupTable_seq13_instr1:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq13_instr2:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq13_instr3:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq13_instr4:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq13_instr5:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq13_instr6:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq13_instr7:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
# ----------------------------------===== lookupTable_seq14_instr0 [Optional] =====-----------------------------------
# Description: Offset: 0x00000160, Width: 16b; Lookup table holds Flash command sequences 14, instruction 0
lookupTable_seq14_instr0:
# ------------------------------------------===== OPERAND [Optional] =====------------------------------------------
# Description: Offset: 0b, Width: 8b, Instruction operand. Its values depends on used instruction
OPERAND: 0
# -----------------------------------------===== NUM_PADS [Optional] =====------------------------------------------
# Description: Offset: 8b, Width: 2b, Number of pads used by instruction. Some instructions ignores this parameter.
# - 1PAD, (0): Single mode. One pad is used.
# - 2PAD, (1): Dual mode. Two pads are used.
# - 4PAD, (2): Quad mode. Four pads are used.
# - 8PAD, (3): Octal mode. Eight pads are used.
# Possible options: <1PAD, 2PAD, 4PAD, 8PAD>
NUM_PADS: 1PAD
# --------------------------------------===== OPERATION_CODE [Optional] =====---------------------------------------
# Description: Offset: 10b, Width: 6b, Instruction operation code.
# - STOP, (0): Stop execution and de-assert CS. Then, the next command sequence (to the same flash device) starts
# from instruction pointer 0.
# - CMD_SDR, (1): Transmit command code to Flash.
# - RADDR_SDR, (2): Transmit row address to Flash.
# - CADDR_SDR, (3): Transmit column address to Flash.
# - MODE1_SDR, (4): Transmit mode bits to Flash.
# - MODE2_SDR, (5): Transmit mode bits to Flash.
# - MODE4_SDR, (6): Transmit mode bits to Flash.
# - MODE8_SDR, (7): Transmit mode bits to Flash.
# - WRITE_SDR, (8): Transmit program data to Flash device.
# - READ_SDR, (9): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_SDR, (10): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_SDR, (11): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_SDR, (12): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_SDR, (13): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# - JMP_ON_CS, (31): Stop execution, de-assert CS and save operand[7:0] as the instruction start pointer for next
# sequence.Normally this instruction is used to support Execute-In-Place enhanced mode. See XIP enhanced mode for
# more details.This instruction is only allowed for AHB read commands. There is interrupt status bit set
# (INTR[IPCMDERR] or INTR[AHBCMDERR]) when using this instruction in IP command or AHB write command.
# - CMD_DDR, (33): Transmit command code to Flash.
# - RADDR_DDR, (34): Transmit row address to Flash.
# - CADDR_DDR, (35): Transmit column address to Flash.
# - MODE1_DDR, (36): Transmit mode bits to Flash.
# - MODE2_DDR, (37): Transmit mode bits to Flash.
# - MODE4_DDR, (38): Transmit mode bits to Flash.
# - MODE8_DDR, (39): Transmit mode bits to Flash.
# - WRITE_DDR, (40): Transmit program data to Flash device.
# - READ_DDR, (41): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_DDR, (42): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_DDR, (43): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_DDR, (44): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_DDR, (45): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# Possible options: <STOP, CMD_SDR, RADDR_SDR, CADDR_SDR, MODE1_SDR, MODE2_SDR, MODE4_SDR, MODE8_SDR, WRITE_SDR,
# READ_SDR, LEARN_SDR, DATSZ_SDR, DUMMY_SDR, DUMMY_RWDS_SDR, JMP_ON_CS, CMD_DDR, RADDR_DDR, CADDR_DDR, MODE1_DDR,
# MODE2_DDR, MODE4_DDR, MODE8_DDR, WRITE_DDR, READ_DDR, LEARN_DDR, DATSZ_DDR, DUMMY_DDR, DUMMY_RWDS_DDR>
OPERATION_CODE: STOP
lookupTable_seq14_instr1:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq14_instr2:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq14_instr3:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq14_instr4:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq14_instr5:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq14_instr6:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq14_instr7:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
# ----------------------------------===== lookupTable_seq15_instr0 [Optional] =====-----------------------------------
# Description: Offset: 0x00000170, Width: 16b; Lookup table holds Flash command sequences 15, instruction 0
lookupTable_seq15_instr0:
# ------------------------------------------===== OPERAND [Optional] =====------------------------------------------
# Description: Offset: 0b, Width: 8b, Instruction operand. Its values depends on used instruction
OPERAND: 0
# -----------------------------------------===== NUM_PADS [Optional] =====------------------------------------------
# Description: Offset: 8b, Width: 2b, Number of pads used by instruction. Some instructions ignores this parameter.
# - 1PAD, (0): Single mode. One pad is used.
# - 2PAD, (1): Dual mode. Two pads are used.
# - 4PAD, (2): Quad mode. Four pads are used.
# - 8PAD, (3): Octal mode. Eight pads are used.
# Possible options: <1PAD, 2PAD, 4PAD, 8PAD>
NUM_PADS: 1PAD
# --------------------------------------===== OPERATION_CODE [Optional] =====---------------------------------------
# Description: Offset: 10b, Width: 6b, Instruction operation code.
# - STOP, (0): Stop execution and de-assert CS. Then, the next command sequence (to the same flash device) starts
# from instruction pointer 0.
# - CMD_SDR, (1): Transmit command code to Flash.
# - RADDR_SDR, (2): Transmit row address to Flash.
# - CADDR_SDR, (3): Transmit column address to Flash.
# - MODE1_SDR, (4): Transmit mode bits to Flash.
# - MODE2_SDR, (5): Transmit mode bits to Flash.
# - MODE4_SDR, (6): Transmit mode bits to Flash.
# - MODE8_SDR, (7): Transmit mode bits to Flash.
# - WRITE_SDR, (8): Transmit program data to Flash device.
# - READ_SDR, (9): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_SDR, (10): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_SDR, (11): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_SDR, (12): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_SDR, (13): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# - JMP_ON_CS, (31): Stop execution, de-assert CS and save operand[7:0] as the instruction start pointer for next
# sequence.Normally this instruction is used to support Execute-In-Place enhanced mode. See XIP enhanced mode for
# more details.This instruction is only allowed for AHB read commands. There is interrupt status bit set
# (INTR[IPCMDERR] or INTR[AHBCMDERR]) when using this instruction in IP command or AHB write command.
# - CMD_DDR, (33): Transmit command code to Flash.
# - RADDR_DDR, (34): Transmit row address to Flash.
# - CADDR_DDR, (35): Transmit column address to Flash.
# - MODE1_DDR, (36): Transmit mode bits to Flash.
# - MODE2_DDR, (37): Transmit mode bits to Flash.
# - MODE4_DDR, (38): Transmit mode bits to Flash.
# - MODE8_DDR, (39): Transmit mode bits to Flash.
# - WRITE_DDR, (40): Transmit program data to Flash device.
# - READ_DDR, (41): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_DDR, (42): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_DDR, (43): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_DDR, (44): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_DDR, (45): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# Possible options: <STOP, CMD_SDR, RADDR_SDR, CADDR_SDR, MODE1_SDR, MODE2_SDR, MODE4_SDR, MODE8_SDR, WRITE_SDR,
# READ_SDR, LEARN_SDR, DATSZ_SDR, DUMMY_SDR, DUMMY_RWDS_SDR, JMP_ON_CS, CMD_DDR, RADDR_DDR, CADDR_DDR, MODE1_DDR,
# MODE2_DDR, MODE4_DDR, MODE8_DDR, WRITE_DDR, READ_DDR, LEARN_DDR, DATSZ_DDR, DUMMY_DDR, DUMMY_RWDS_DDR>
OPERATION_CODE: STOP
lookupTable_seq15_instr1:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq15_instr2:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq15_instr3:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq15_instr4:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq15_instr5:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq15_instr6:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq15_instr7:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
# ---------------------------------------===== lutCustomSeq_0 [Optional] =====----------------------------------------
# Description: Offset: 0x00000180, Width: 32b; [0x180-0x1af] Customizable LUT Sequences
lutCustomSeq_0:
# ------------------------------------------===== seqNum [Optional] =====-------------------------------------------
# Description: Offset: 0b, Width: 8b, Sequence Number, valid number: 1-16
seqNum: 0
# -------------------------------------------===== seqId [Optional] =====-------------------------------------------
# Description: Offset: 8b, Width: 8b, Sequence Index, valid number: 0-15
seqId: 0
# -----------------------------------------===== reserved [Optional] =====------------------------------------------
# Description: Offset: 16b, Width: 16b, N/A
reserved: 0
# ---------------------------------------===== lutCustomSeq_1 [Optional] =====----------------------------------------
# Description: Offset: 0x00000184, Width: 32b; [0x180-0x1af] Customizable LUT Sequences
lutCustomSeq_1:
# ------------------------------------------===== seqNum [Optional] =====-------------------------------------------
# Description: Offset: 0b, Width: 8b, Sequence Number, valid number: 1-16
seqNum: 0
# -------------------------------------------===== seqId [Optional] =====-------------------------------------------
# Description: Offset: 8b, Width: 8b, Sequence Index, valid number: 0-15
seqId: 0
# -----------------------------------------===== reserved [Optional] =====------------------------------------------
# Description: Offset: 16b, Width: 16b, N/A
reserved: 0
# ---------------------------------------===== lutCustomSeq_2 [Optional] =====----------------------------------------
# Description: Offset: 0x00000188, Width: 32b; [0x180-0x1af] Customizable LUT Sequences
lutCustomSeq_2:
# ------------------------------------------===== seqNum [Optional] =====-------------------------------------------
# Description: Offset: 0b, Width: 8b, Sequence Number, valid number: 1-16
seqNum: 0
# -------------------------------------------===== seqId [Optional] =====-------------------------------------------
# Description: Offset: 8b, Width: 8b, Sequence Index, valid number: 0-15
seqId: 0
# -----------------------------------------===== reserved [Optional] =====------------------------------------------
# Description: Offset: 16b, Width: 16b, N/A
reserved: 0
# ---------------------------------------===== lutCustomSeq_3 [Optional] =====----------------------------------------
# Description: Offset: 0x0000018C, Width: 32b; [0x180-0x1af] Customizable LUT Sequences
lutCustomSeq_3:
# ------------------------------------------===== seqNum [Optional] =====-------------------------------------------
# Description: Offset: 0b, Width: 8b, Sequence Number, valid number: 1-16
seqNum: 0
# -------------------------------------------===== seqId [Optional] =====-------------------------------------------
# Description: Offset: 8b, Width: 8b, Sequence Index, valid number: 0-15
seqId: 0
# -----------------------------------------===== reserved [Optional] =====------------------------------------------
# Description: Offset: 16b, Width: 16b, N/A
reserved: 0
# ---------------------------------------===== lutCustomSeq_4 [Optional] =====----------------------------------------
# Description: Offset: 0x00000190, Width: 32b; [0x180-0x1af] Customizable LUT Sequences
lutCustomSeq_4:
# ------------------------------------------===== seqNum [Optional] =====-------------------------------------------
# Description: Offset: 0b, Width: 8b, Sequence Number, valid number: 1-16
seqNum: 0
# -------------------------------------------===== seqId [Optional] =====-------------------------------------------
# Description: Offset: 8b, Width: 8b, Sequence Index, valid number: 0-15
seqId: 0
# -----------------------------------------===== reserved [Optional] =====------------------------------------------
# Description: Offset: 16b, Width: 16b, N/A
reserved: 0
# ---------------------------------------===== lutCustomSeq_5 [Optional] =====----------------------------------------
# Description: Offset: 0x00000194, Width: 32b; [0x180-0x1af] Customizable LUT Sequences
lutCustomSeq_5:
# ------------------------------------------===== seqNum [Optional] =====-------------------------------------------
# Description: Offset: 0b, Width: 8b, Sequence Number, valid number: 1-16
seqNum: 0
# -------------------------------------------===== seqId [Optional] =====-------------------------------------------
# Description: Offset: 8b, Width: 8b, Sequence Index, valid number: 0-15
seqId: 0
# -----------------------------------------===== reserved [Optional] =====------------------------------------------
# Description: Offset: 16b, Width: 16b, N/A
reserved: 0
# ---------------------------------------===== lutCustomSeq_6 [Optional] =====----------------------------------------
# Description: Offset: 0x00000198, Width: 32b; [0x180-0x1af] Customizable LUT Sequences
lutCustomSeq_6:
# ------------------------------------------===== seqNum [Optional] =====-------------------------------------------
# Description: Offset: 0b, Width: 8b, Sequence Number, valid number: 1-16
seqNum: 0
# -------------------------------------------===== seqId [Optional] =====-------------------------------------------
# Description: Offset: 8b, Width: 8b, Sequence Index, valid number: 0-15
seqId: 0
# -----------------------------------------===== reserved [Optional] =====------------------------------------------
# Description: Offset: 16b, Width: 16b, N/A
reserved: 0
# ---------------------------------------===== lutCustomSeq_7 [Optional] =====----------------------------------------
# Description: Offset: 0x0000019C, Width: 32b; [0x180-0x1af] Customizable LUT Sequences
lutCustomSeq_7:
# ------------------------------------------===== seqNum [Optional] =====-------------------------------------------
# Description: Offset: 0b, Width: 8b, Sequence Number, valid number: 1-16
seqNum: 0
# -------------------------------------------===== seqId [Optional] =====-------------------------------------------
# Description: Offset: 8b, Width: 8b, Sequence Index, valid number: 0-15
seqId: 0
# -----------------------------------------===== reserved [Optional] =====------------------------------------------
# Description: Offset: 16b, Width: 16b, N/A
reserved: 0
# ---------------------------------------===== lutCustomSeq_8 [Optional] =====----------------------------------------
# Description: Offset: 0x000001A0, Width: 32b; [0x180-0x1af] Customizable LUT Sequences
lutCustomSeq_8:
# ------------------------------------------===== seqNum [Optional] =====-------------------------------------------
# Description: Offset: 0b, Width: 8b, Sequence Number, valid number: 1-16
seqNum: 0
# -------------------------------------------===== seqId [Optional] =====-------------------------------------------
# Description: Offset: 8b, Width: 8b, Sequence Index, valid number: 0-15
seqId: 0
# -----------------------------------------===== reserved [Optional] =====------------------------------------------
# Description: Offset: 16b, Width: 16b, N/A
reserved: 0
# ---------------------------------------===== lutCustomSeq_9 [Optional] =====----------------------------------------
# Description: Offset: 0x000001A4, Width: 32b; [0x180-0x1af] Customizable LUT Sequences
lutCustomSeq_9:
# ------------------------------------------===== seqNum [Optional] =====-------------------------------------------
# Description: Offset: 0b, Width: 8b, Sequence Number, valid number: 1-16
seqNum: 0
# -------------------------------------------===== seqId [Optional] =====-------------------------------------------
# Description: Offset: 8b, Width: 8b, Sequence Index, valid number: 0-15
seqId: 0
# -----------------------------------------===== reserved [Optional] =====------------------------------------------
# Description: Offset: 16b, Width: 16b, N/A
reserved: 0
# ---------------------------------------===== lutCustomSeq_10 [Optional] =====---------------------------------------
# Description: Offset: 0x000001A8, Width: 32b; [0x180-0x1af] Customizable LUT Sequences
lutCustomSeq_10:
# ------------------------------------------===== seqNum [Optional] =====-------------------------------------------
# Description: Offset: 0b, Width: 8b, Sequence Number, valid number: 1-16
seqNum: 0
# -------------------------------------------===== seqId [Optional] =====-------------------------------------------
# Description: Offset: 8b, Width: 8b, Sequence Index, valid number: 0-15
seqId: 0
# -----------------------------------------===== reserved [Optional] =====------------------------------------------
# Description: Offset: 16b, Width: 16b, N/A
reserved: 0
# ---------------------------------------===== lutCustomSeq_11 [Optional] =====---------------------------------------
# Description: Offset: 0x000001AC, Width: 32b; [0x180-0x1af] Customizable LUT Sequences
lutCustomSeq_11:
# ------------------------------------------===== seqNum [Optional] =====-------------------------------------------
# Description: Offset: 0b, Width: 8b, Sequence Number, valid number: 1-16
seqNum: 0
# -------------------------------------------===== seqId [Optional] =====-------------------------------------------
# Description: Offset: 8b, Width: 8b, Sequence Index, valid number: 0-15
seqId: 0
# -----------------------------------------===== reserved [Optional] =====------------------------------------------
# Description: Offset: 16b, Width: 16b, N/A
reserved: 0
# -----------------------------------------===== reserved4_0 [Optional] =====-----------------------------------------
# Description: Offset: 0x000001B0, Width: 32b; [0x1b0-0x1bf] Reserved for future use
reserved4_0: '0x00000000'
# -----------------------------------------===== reserved4_1 [Optional] =====-----------------------------------------
# Description: Offset: 0x000001B4, Width: 32b; [0x1b0-0x1bf] Reserved for future use
reserved4_1: '0x00000000'
# -----------------------------------------===== reserved4_2 [Optional] =====-----------------------------------------
# Description: Offset: 0x000001B8, Width: 32b; [0x1b0-0x1bf] Reserved for future use
reserved4_2: '0x00000000'
# -----------------------------------------===== reserved4_3 [Optional] =====-----------------------------------------
# Description: Offset: 0x000001BC, Width: 32b; [0x1b0-0x1bf] Reserved for future use
reserved4_3: '0x00000000'
# ------------------------------------------===== pageSize [Optional] =====-------------------------------------------
# Description: Offset: 0x000001C0, Width: 32b; Page size of Serial NOR
pageSize: '0x00000000'
# -----------------------------------------===== sectorSize [Optional] =====------------------------------------------
# Description: Offset: 0x000001C4, Width: 32b; Sector size of Serial NOR
sectorSize: '0x00000000'
# -------------------------------------===== ipcmdSerialClkFreq [Optional] =====--------------------------------------
# Description: Offset: 0x000001C8, Width: 8b; Clock frequency for IP command
ipcmdSerialClkFreq: '0x00'
# -------------------------------------===== isUniformBlockSize [Optional] =====--------------------------------------
# Description: Offset: 0x000001C9, Width: 8b; Sector/Block size is the same
isUniformBlockSize: '0x00'
# -----------------------------------------===== reserved0_0 [Optional] =====-----------------------------------------
# Description: Offset: 0x000001CA, Width: 8b; Reserved for future use
reserved0_0: '0x00'
# -----------------------------------------===== reserved0_1 [Optional] =====-----------------------------------------
# Description: Offset: 0x000001CB, Width: 8b; Reserved for future use
reserved0_1: '0x00'
# ----------------------------------------===== serialNorType [Optional] =====----------------------------------------
# Description: Offset: 0x000001CC, Width: 8b; Serial NOR Flash type: 0/1/2/3
serialNorType: '0x00'
# --------------------------------------===== needExitNoCmdMode [Optional] =====--------------------------------------
# Description: Offset: 0x000001CD, Width: 8b; Need to exit NoCmd mode before other IP command
needExitNoCmdMode: '0x00'
# ------------------------------------===== halfClkForNonReadCmd [Optional] =====-------------------------------------
# Description: Offset: 0x000001CE, Width: 8b; Half the Serial Clock for non-read command: true/false
halfClkForNonReadCmd: '0x00'
# ------------------------------------===== needRestoreNoCmdMode [Optional] =====-------------------------------------
# Description: Offset: 0x000001CF, Width: 8b; Need to Restore NoCmd mode after IP command execution
needRestoreNoCmdMode: '0x00'
# ------------------------------------------===== blockSize [Optional] =====------------------------------------------
# Description: Offset: 0x000001D0, Width: 32b; Block size
blockSize: '0x00000000'
# -----------------------------------------===== reserve2_0 [Optional] =====------------------------------------------
# Description: Offset: 0x000001D4, Width: 32b; Reserved for future use
reserve2_0: '0x00000000'
# -----------------------------------------===== reserve2_1 [Optional] =====------------------------------------------
# Description: Offset: 0x000001D8, Width: 32b; Reserved for future use
reserve2_1: '0x00000000'
# -----------------------------------------===== reserve2_2 [Optional] =====------------------------------------------
# Description: Offset: 0x000001DC, Width: 32b; Reserved for future use
reserve2_2: '0x00000000'
# -----------------------------------------===== reserve2_3 [Optional] =====------------------------------------------
# Description: Offset: 0x000001E0, Width: 32b; Reserved for future use
reserve2_3: '0x00000000'
# -----------------------------------------===== reserve2_4 [Optional] =====------------------------------------------
# Description: Offset: 0x000001E4, Width: 32b; Reserved for future use
reserve2_4: '0x00000000'
# -----------------------------------------===== reserve2_5 [Optional] =====------------------------------------------
# Description: Offset: 0x000001E8, Width: 32b; Reserved for future use
reserve2_5: '0x00000000'
# -----------------------------------------===== reserve2_6 [Optional] =====------------------------------------------
# Description: Offset: 0x000001EC, Width: 32b; Reserved for future use
reserve2_6: '0x00000000'
# -----------------------------------------===== reserve2_7 [Optional] =====------------------------------------------
# Description: Offset: 0x000001F0, Width: 32b; Reserved for future use
reserve2_7: '0x00000000'
# -----------------------------------------===== reserve2_8 [Optional] =====------------------------------------------
# Description: Offset: 0x000001F4, Width: 32b; Reserved for future use
reserve2_8: '0x00000000'
# -----------------------------------------===== reserve2_9 [Optional] =====------------------------------------------
# Description: Offset: 0x000001F8, Width: 32b; Reserved for future use
reserve2_9: '0x00000000'
# -----------------------------------------===== reserve2_10 [Optional] =====-----------------------------------------
# Description: Offset: 0x000001FC, Width: 32b; Reserved for future use
reserve2_10: '0x00000000'
FCB for mimxrt1050, Revision: a0 and flexspi_nor#
FCB for mimxrt1050, Revision: a0 and flexspi_nor JSON schema
FCB for mimxrt1050, Revision: a0 and flexspi_nor YAML configuration template
# ================================= FCB for mimxrt1050, Revision: a0 and flexspi_nor =================================
# ======================================================================================================================
# == FCB for mimxrt1050, Revision: a0 and flexspi_nor ==
# ======================================================================================================================
# -------------------------------------===== The chip family name [Required] =====--------------------------------------
# Description: NXP chip family identifier.
family: CHOOSE_FROM_TABLE
# -----------------------------------------===== MCU revision [Optional] =====------------------------------------------
# Description: Revision of silicon. The 'latest' name, means most current revision.
# Possible options: <a0, latest>
revision: a0
# ------------------------------------------===== Memory type [Required] =====------------------------------------------
# Description: Specify type of memory used by FCB description.
# Possible options: <flexspi_nor>
type: flexspi_nor
# ------------------------------------------===== mimxrt1050 [Required] =====-------------------------------------------
fcb_settings:
# ---------------------------------------------===== tag [Optional] =====---------------------------------------------
# Description: Offset: 0x00000000, Width: 32b; [0x000-0x003] Tag, fixed value 0x42464346UL
tag: '0x42464346'
# -------------------------------------------===== version [Optional] =====-------------------------------------------
# Description: Offset: 0x00000004, Width: 32b; [0x004-0x007] Version,[31:24] -'V', [23:16] - Major, [15:8] - Minor,
# [7:0] - bugfix
version: '0x56010400'
# ------------------------------------------===== reserved0 [Optional] =====------------------------------------------
# Description: Offset: 0x00000008, Width: 32b; [0x008-0x00b] Reserved for future use
reserved0: '0x00000000'
# --------------------------------------===== readSampleClkSrc [Optional] =====---------------------------------------
# Description: Offset: 0x0000000C, Width: 8b; [0x00c-0x00c] Read Sample Clock Source, valid value: 0/1/3
readSampleClkSrc: '0x00'
# -----------------------------------------===== csHoldTime [Optional] =====------------------------------------------
# Description: Offset: 0x0000000D, Width: 8b; [0x00d-0x00d] CS hold time, default value: 3
csHoldTime: '0x00'
# -----------------------------------------===== csSetupTime [Optional] =====-----------------------------------------
# Description: Offset: 0x0000000E, Width: 8b; [0x00e-0x00e] CS setup time, default value: 3
csSetupTime: '0x00'
# -------------------------------------===== columnAddressWidth [Optional] =====--------------------------------------
# Description: Offset: 0x0000000F, Width: 8b; [0x00f-0x00f] Column Address with, for HyperBus protocol, it is fixed
# to 3, For Serial NAND, need to refer to datasheet
columnAddressWidth: '0x00'
# -------------------------------------===== deviceModeCfgEnable [Optional] =====-------------------------------------
# Description: Offset: 0x00000010, Width: 8b; [0x010-0x010] Device Mode Configure enable flag, 1 - Enable, 0 -
# Disable
deviceModeCfgEnable: '0x00'
# ---------------------------------------===== deviceModeType [Optional] =====----------------------------------------
# Description: Offset: 0x00000011, Width: 8b; [0x011-0x011] Specify the configuration command type:Quad Enable,
# DPI/QPI/OPI switch, Generic configuration, etc.
deviceModeType: '0x00'
# -------------------------------------===== waitTimeCfgCommands [Optional] =====-------------------------------------
# Description: Offset: 0x00000012, Width: 16b; [0x012-0x013] Wait time for all configuration commands, unit: 100us,
# Used for DPI/QPI/OPI switch or reset command
waitTimeCfgCommands: '0x0000'
# ----------------------------------------===== deviceModeSeq [Optional] =====----------------------------------------
# Description: Offset: 0x00000014, Width: 32b; [0x014-0x017] Device mode sequence info, [7:0] - LUT sequence id,
# [15:8] - LUt sequence number, [31:16] Reserved
deviceModeSeq:
# ------------------------------------------===== seqNum [Optional] =====-------------------------------------------
# Description: Offset: 0b, Width: 8b, Sequence Number, valid number: 1-16
seqNum: 0
# -------------------------------------------===== seqId [Optional] =====-------------------------------------------
# Description: Offset: 8b, Width: 8b, Sequence Index, valid number: 0-15
seqId: 0
# -----------------------------------------===== reserved [Optional] =====------------------------------------------
# Description: Offset: 16b, Width: 16b, N/A
reserved: 0
# ----------------------------------------===== deviceModeArg [Optional] =====----------------------------------------
# Description: Offset: 0x00000018, Width: 32b; [0x018-0x01b] Argument/Parameter for device configuration
deviceModeArg: '0x00000000'
# ---------------------------------------===== configCmdEnable [Optional] =====---------------------------------------
# Description: Offset: 0x0000001C, Width: 8b; [0x01c-0x01c] Configure command Enable Flag, 1 - Enable, 0 - Disable
configCmdEnable: '0x00'
# --------------------------------------===== configModeType_0 [Optional] =====---------------------------------------
# Description: Offset: 0x0000001D, Width: 8b; [0x01d-0x01f] Configure Mode Type, similar as deviceModeTpe
configModeType_0: '0x00'
# --------------------------------------===== configModeType_1 [Optional] =====---------------------------------------
# Description: Offset: 0x0000001E, Width: 8b; [0x01d-0x01f] Configure Mode Type, similar as deviceModeTpe
configModeType_1: '0x00'
# --------------------------------------===== configModeType_2 [Optional] =====---------------------------------------
# Description: Offset: 0x0000001F, Width: 8b; [0x01d-0x01f] Configure Mode Type, similar as deviceModeTpe
configModeType_2: '0x00'
# ---------------------------------------===== configCmdSeqs_0 [Optional] =====---------------------------------------
# Description: Offset: 0x00000020, Width: 32b; [0x020-0x02b] Sequence info for Device Configuration command, similar
# as deviceModeSeq
configCmdSeqs_0:
# ------------------------------------------===== seqNum [Optional] =====-------------------------------------------
# Description: Offset: 0b, Width: 8b, Sequence Number, valid number: 1-16
seqNum: 0
# -------------------------------------------===== seqId [Optional] =====-------------------------------------------
# Description: Offset: 8b, Width: 8b, Sequence Index, valid number: 0-15
seqId: 0
# -----------------------------------------===== reserved [Optional] =====------------------------------------------
# Description: Offset: 16b, Width: 16b, N/A
reserved: 0
# ---------------------------------------===== configCmdSeqs_1 [Optional] =====---------------------------------------
# Description: Offset: 0x00000024, Width: 32b; [0x020-0x02b] Sequence info for Device Configuration command, similar
# as deviceModeSeq
configCmdSeqs_1:
# ------------------------------------------===== seqNum [Optional] =====-------------------------------------------
# Description: Offset: 0b, Width: 8b, Sequence Number, valid number: 1-16
seqNum: 0
# -------------------------------------------===== seqId [Optional] =====-------------------------------------------
# Description: Offset: 8b, Width: 8b, Sequence Index, valid number: 0-15
seqId: 0
# -----------------------------------------===== reserved [Optional] =====------------------------------------------
# Description: Offset: 16b, Width: 16b, N/A
reserved: 0
# ---------------------------------------===== configCmdSeqs_2 [Optional] =====---------------------------------------
# Description: Offset: 0x00000028, Width: 32b; [0x020-0x02b] Sequence info for Device Configuration command, similar
# as deviceModeSeq
configCmdSeqs_2:
# ------------------------------------------===== seqNum [Optional] =====-------------------------------------------
# Description: Offset: 0b, Width: 8b, Sequence Number, valid number: 1-16
seqNum: 0
# -------------------------------------------===== seqId [Optional] =====-------------------------------------------
# Description: Offset: 8b, Width: 8b, Sequence Index, valid number: 0-15
seqId: 0
# -----------------------------------------===== reserved [Optional] =====------------------------------------------
# Description: Offset: 16b, Width: 16b, N/A
reserved: 0
# ------------------------------------------===== reserved1 [Optional] =====------------------------------------------
# Description: Offset: 0x0000002C, Width: 32b; [0x02c-0x02f] Reserved for future use
reserved1: '0x00000000'
# ---------------------------------------===== configCmdArgs_0 [Optional] =====---------------------------------------
# Description: Offset: 0x00000030, Width: 32b; [0x030-0x03b] Arguments/Parameters for device Configuration commands
configCmdArgs_0: '0x00000000'
# ---------------------------------------===== configCmdArgs_1 [Optional] =====---------------------------------------
# Description: Offset: 0x00000034, Width: 32b; [0x030-0x03b] Arguments/Parameters for device Configuration commands
configCmdArgs_1: '0x00000000'
# ---------------------------------------===== configCmdArgs_2 [Optional] =====---------------------------------------
# Description: Offset: 0x00000038, Width: 32b; [0x030-0x03b] Arguments/Parameters for device Configuration commands
configCmdArgs_2: '0x00000000'
# ------------------------------------------===== reserved2 [Optional] =====------------------------------------------
# Description: Offset: 0x0000003C, Width: 32b; [0x03c-0x03f] Reserved for future use
reserved2: '0x00000000'
# ------------------------------------===== controllerMiscOption [Optional] =====-------------------------------------
# Description: Offset: 0x00000040, Width: 32b; [0x040-0x043] Controller Misc Options, see Misc feature bit
# definitions for more details
controllerMiscOption: '0x00000000'
# -----------------------------------------===== deviceType [Optional] =====------------------------------------------
# Description: Offset: 0x00000044, Width: 8b; [0x044-0x044] Device Type: See Flash Type Definition for more details
deviceType: '0x00'
# ----------------------------------------===== sflashPadType [Optional] =====----------------------------------------
# Description: Offset: 0x00000045, Width: 8b; [0x045-0x045] Serial Flash Pad Type: 1 - Single, 2 - Dual, 4 - Quad, 8
# - Octal
sflashPadType: '0x00'
# ----------------------------------------===== serialClkFreq [Optional] =====----------------------------------------
# Description: Offset: 0x00000046, Width: 8b; [0x046-0x046] Serial Flash Frequency, device specific definitions, See
# System Boot Chapter for more details
serialClkFreq: '0x00'
# -------------------------------------===== lutCustomSeqEnable [Optional] =====--------------------------------------
# Description: Offset: 0x00000047, Width: 8b; [0x047-0x047] LUT customization Enable, it is required if the
# program/erase cannot be done using 1 LUT sequence, currently, only applicable to HyperFLASH
lutCustomSeqEnable: '0x00'
# -----------------------------------------===== reserved3_0 [Optional] =====-----------------------------------------
# Description: Offset: 0x00000048, Width: 32b; [0x048-0x04f] Reserved for future use
reserved3_0: '0x00000000'
# -----------------------------------------===== reserved3_1 [Optional] =====-----------------------------------------
# Description: Offset: 0x0000004C, Width: 32b; [0x048-0x04f] Reserved for future use
reserved3_1: '0x00000000'
# ----------------------------------------===== sflashA1Size [Optional] =====-----------------------------------------
# Description: Offset: 0x00000050, Width: 32b; [0x050-0x053] Size of Flash connected to A1
sflashA1Size: '0x00000000'
# ----------------------------------------===== sflashA2Size [Optional] =====-----------------------------------------
# Description: Offset: 0x00000054, Width: 32b; [0x054-0x057] Size of Flash connected to A2
sflashA2Size: '0x00000000'
# ----------------------------------------===== sflashB1Size [Optional] =====-----------------------------------------
# Description: Offset: 0x00000058, Width: 32b; [0x058-0x05b] Size of Flash connected to B1
sflashB1Size: '0x00000000'
# ----------------------------------------===== sflashB2Size [Optional] =====-----------------------------------------
# Description: Offset: 0x0000005C, Width: 32b; [0x05c-0x05f] Size of Flash connected to B2
sflashB2Size: '0x00000000'
# ------------------------------------===== csPadSettingOverride [Optional] =====-------------------------------------
# Description: Offset: 0x00000060, Width: 32b; [0x060-0x063] CS pad setting override value
csPadSettingOverride: '0x00000000'
# -----------------------------------===== sclkPadSettingOverride [Optional] =====------------------------------------
# Description: Offset: 0x00000064, Width: 32b; [0x064-0x067] SCK pad setting override value
sclkPadSettingOverride: '0x00000000'
# -----------------------------------===== dataPadSettingOverride [Optional] =====------------------------------------
# Description: Offset: 0x00000068, Width: 32b; [0x068-0x06b] data pad setting override value
dataPadSettingOverride: '0x00000000'
# ------------------------------------===== dqsPadSettingOverride [Optional] =====------------------------------------
# Description: Offset: 0x0000006C, Width: 32b; [0x06c-0x06f] DQS pad setting override value
dqsPadSettingOverride: '0x00000000'
# -----------------------------------------===== timeoutInMs [Optional] =====-----------------------------------------
# Description: Offset: 0x00000070, Width: 32b; [0x070-0x073] Timeout threshold for read status command
timeoutInMs: '0x00000000'
# ---------------------------------------===== commandInterval [Optional] =====---------------------------------------
# Description: Offset: 0x00000074, Width: 32b; [0x074-0x077] CS deselect interval between two commands
commandInterval: '0x00000000'
# ---------------------------------------===== dataValidTime_0 [Optional] =====---------------------------------------
# Description: Offset: 0x00000078, Width: 16b; [0x078-0x07b] CLK edge to data valid time for PORT A and PORT B, in
# terms of 0.1ns
dataValidTime_0: '0x0000'
# ---------------------------------------===== dataValidTime_1 [Optional] =====---------------------------------------
# Description: Offset: 0x0000007A, Width: 16b; [0x078-0x07b] CLK edge to data valid time for PORT A and PORT B, in
# terms of 0.1ns
dataValidTime_1: '0x0000'
# -----------------------------------------===== busyOffset [Optional] =====------------------------------------------
# Description: Offset: 0x0000007C, Width: 16b; [0x07c-0x07d] Busy offset, valid value: 0-31
busyOffset: '0x0000'
# ---------------------------------------===== busyBitPolarity [Optional] =====---------------------------------------
# Description: Offset: 0x0000007E, Width: 16b; [0x07e-0x07f] Busy flag polarity, 0 - busy flag is 1 when flash device
# is busy, 1 - busy flag is 0 when flash device is busy
busyBitPolarity: '0x0000'
# -----------------------------------===== lookupTable_seq0_instr0 [Optional] =====-----------------------------------
# Description: Offset: 0x00000080, Width: 16b; Lookup table holds Flash command sequences 0, instruction 0
lookupTable_seq0_instr0:
# ------------------------------------------===== OPERAND [Optional] =====------------------------------------------
# Description: Offset: 0b, Width: 8b, Instruction operand. Its values depends on used instruction
OPERAND: 0
# -----------------------------------------===== NUM_PADS [Optional] =====------------------------------------------
# Description: Offset: 8b, Width: 2b, Number of pads used by instruction. Some instructions ignores this parameter.
# - 1PAD, (0): Single mode. One pad is used.
# - 2PAD, (1): Dual mode. Two pads are used.
# - 4PAD, (2): Quad mode. Four pads are used.
# - 8PAD, (3): Octal mode. Eight pads are used.
# Possible options: <1PAD, 2PAD, 4PAD, 8PAD>
NUM_PADS: 1PAD
# --------------------------------------===== OPERATION_CODE [Optional] =====---------------------------------------
# Description: Offset: 10b, Width: 6b, Instruction operation code.
# - STOP, (0): Stop execution and de-assert CS. Then, the next command sequence (to the same flash device) starts
# from instruction pointer 0.
# - CMD_SDR, (1): Transmit command code to Flash.
# - RADDR_SDR, (2): Transmit row address to Flash.
# - CADDR_SDR, (3): Transmit column address to Flash.
# - MODE1_SDR, (4): Transmit mode bits to Flash.
# - MODE2_SDR, (5): Transmit mode bits to Flash.
# - MODE4_SDR, (6): Transmit mode bits to Flash.
# - MODE8_SDR, (7): Transmit mode bits to Flash.
# - WRITE_SDR, (8): Transmit program data to Flash device.
# - READ_SDR, (9): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_SDR, (10): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_SDR, (11): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_SDR, (12): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_SDR, (13): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# - JMP_ON_CS, (31): Stop execution, de-assert CS and save operand[7:0] as the instruction start pointer for next
# sequence.Normally this instruction is used to support Execute-In-Place enhanced mode. See XIP enhanced mode for
# more details.This instruction is only allowed for AHB read commands. There is interrupt status bit set
# (INTR[IPCMDERR] or INTR[AHBCMDERR]) when using this instruction in IP command or AHB write command.
# - CMD_DDR, (33): Transmit command code to Flash.
# - RADDR_DDR, (34): Transmit row address to Flash.
# - CADDR_DDR, (35): Transmit column address to Flash.
# - MODE1_DDR, (36): Transmit mode bits to Flash.
# - MODE2_DDR, (37): Transmit mode bits to Flash.
# - MODE4_DDR, (38): Transmit mode bits to Flash.
# - MODE8_DDR, (39): Transmit mode bits to Flash.
# - WRITE_DDR, (40): Transmit program data to Flash device.
# - READ_DDR, (41): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_DDR, (42): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_DDR, (43): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_DDR, (44): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_DDR, (45): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# Possible options: <STOP, CMD_SDR, RADDR_SDR, CADDR_SDR, MODE1_SDR, MODE2_SDR, MODE4_SDR, MODE8_SDR, WRITE_SDR,
# READ_SDR, LEARN_SDR, DATSZ_SDR, DUMMY_SDR, DUMMY_RWDS_SDR, JMP_ON_CS, CMD_DDR, RADDR_DDR, CADDR_DDR, MODE1_DDR,
# MODE2_DDR, MODE4_DDR, MODE8_DDR, WRITE_DDR, READ_DDR, LEARN_DDR, DATSZ_DDR, DUMMY_DDR, DUMMY_RWDS_DDR>
OPERATION_CODE: STOP
lookupTable_seq0_instr1:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq0_instr2:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq0_instr3:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq0_instr4:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq0_instr5:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq0_instr6:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq0_instr7:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
# -----------------------------------===== lookupTable_seq1_instr0 [Optional] =====-----------------------------------
# Description: Offset: 0x00000090, Width: 16b; Lookup table holds Flash command sequences 1, instruction 0
lookupTable_seq1_instr0:
# ------------------------------------------===== OPERAND [Optional] =====------------------------------------------
# Description: Offset: 0b, Width: 8b, Instruction operand. Its values depends on used instruction
OPERAND: 0
# -----------------------------------------===== NUM_PADS [Optional] =====------------------------------------------
# Description: Offset: 8b, Width: 2b, Number of pads used by instruction. Some instructions ignores this parameter.
# - 1PAD, (0): Single mode. One pad is used.
# - 2PAD, (1): Dual mode. Two pads are used.
# - 4PAD, (2): Quad mode. Four pads are used.
# - 8PAD, (3): Octal mode. Eight pads are used.
# Possible options: <1PAD, 2PAD, 4PAD, 8PAD>
NUM_PADS: 1PAD
# --------------------------------------===== OPERATION_CODE [Optional] =====---------------------------------------
# Description: Offset: 10b, Width: 6b, Instruction operation code.
# - STOP, (0): Stop execution and de-assert CS. Then, the next command sequence (to the same flash device) starts
# from instruction pointer 0.
# - CMD_SDR, (1): Transmit command code to Flash.
# - RADDR_SDR, (2): Transmit row address to Flash.
# - CADDR_SDR, (3): Transmit column address to Flash.
# - MODE1_SDR, (4): Transmit mode bits to Flash.
# - MODE2_SDR, (5): Transmit mode bits to Flash.
# - MODE4_SDR, (6): Transmit mode bits to Flash.
# - MODE8_SDR, (7): Transmit mode bits to Flash.
# - WRITE_SDR, (8): Transmit program data to Flash device.
# - READ_SDR, (9): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_SDR, (10): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_SDR, (11): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_SDR, (12): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_SDR, (13): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# - JMP_ON_CS, (31): Stop execution, de-assert CS and save operand[7:0] as the instruction start pointer for next
# sequence.Normally this instruction is used to support Execute-In-Place enhanced mode. See XIP enhanced mode for
# more details.This instruction is only allowed for AHB read commands. There is interrupt status bit set
# (INTR[IPCMDERR] or INTR[AHBCMDERR]) when using this instruction in IP command or AHB write command.
# - CMD_DDR, (33): Transmit command code to Flash.
# - RADDR_DDR, (34): Transmit row address to Flash.
# - CADDR_DDR, (35): Transmit column address to Flash.
# - MODE1_DDR, (36): Transmit mode bits to Flash.
# - MODE2_DDR, (37): Transmit mode bits to Flash.
# - MODE4_DDR, (38): Transmit mode bits to Flash.
# - MODE8_DDR, (39): Transmit mode bits to Flash.
# - WRITE_DDR, (40): Transmit program data to Flash device.
# - READ_DDR, (41): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_DDR, (42): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_DDR, (43): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_DDR, (44): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_DDR, (45): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# Possible options: <STOP, CMD_SDR, RADDR_SDR, CADDR_SDR, MODE1_SDR, MODE2_SDR, MODE4_SDR, MODE8_SDR, WRITE_SDR,
# READ_SDR, LEARN_SDR, DATSZ_SDR, DUMMY_SDR, DUMMY_RWDS_SDR, JMP_ON_CS, CMD_DDR, RADDR_DDR, CADDR_DDR, MODE1_DDR,
# MODE2_DDR, MODE4_DDR, MODE8_DDR, WRITE_DDR, READ_DDR, LEARN_DDR, DATSZ_DDR, DUMMY_DDR, DUMMY_RWDS_DDR>
OPERATION_CODE: STOP
lookupTable_seq1_instr1:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq1_instr2:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq1_instr3:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq1_instr4:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq1_instr5:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq1_instr6:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq1_instr7:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
# -----------------------------------===== lookupTable_seq2_instr0 [Optional] =====-----------------------------------
# Description: Offset: 0x000000A0, Width: 16b; Lookup table holds Flash command sequences 2, instruction 0
lookupTable_seq2_instr0:
# ------------------------------------------===== OPERAND [Optional] =====------------------------------------------
# Description: Offset: 0b, Width: 8b, Instruction operand. Its values depends on used instruction
OPERAND: 0
# -----------------------------------------===== NUM_PADS [Optional] =====------------------------------------------
# Description: Offset: 8b, Width: 2b, Number of pads used by instruction. Some instructions ignores this parameter.
# - 1PAD, (0): Single mode. One pad is used.
# - 2PAD, (1): Dual mode. Two pads are used.
# - 4PAD, (2): Quad mode. Four pads are used.
# - 8PAD, (3): Octal mode. Eight pads are used.
# Possible options: <1PAD, 2PAD, 4PAD, 8PAD>
NUM_PADS: 1PAD
# --------------------------------------===== OPERATION_CODE [Optional] =====---------------------------------------
# Description: Offset: 10b, Width: 6b, Instruction operation code.
# - STOP, (0): Stop execution and de-assert CS. Then, the next command sequence (to the same flash device) starts
# from instruction pointer 0.
# - CMD_SDR, (1): Transmit command code to Flash.
# - RADDR_SDR, (2): Transmit row address to Flash.
# - CADDR_SDR, (3): Transmit column address to Flash.
# - MODE1_SDR, (4): Transmit mode bits to Flash.
# - MODE2_SDR, (5): Transmit mode bits to Flash.
# - MODE4_SDR, (6): Transmit mode bits to Flash.
# - MODE8_SDR, (7): Transmit mode bits to Flash.
# - WRITE_SDR, (8): Transmit program data to Flash device.
# - READ_SDR, (9): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_SDR, (10): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_SDR, (11): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_SDR, (12): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_SDR, (13): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# - JMP_ON_CS, (31): Stop execution, de-assert CS and save operand[7:0] as the instruction start pointer for next
# sequence.Normally this instruction is used to support Execute-In-Place enhanced mode. See XIP enhanced mode for
# more details.This instruction is only allowed for AHB read commands. There is interrupt status bit set
# (INTR[IPCMDERR] or INTR[AHBCMDERR]) when using this instruction in IP command or AHB write command.
# - CMD_DDR, (33): Transmit command code to Flash.
# - RADDR_DDR, (34): Transmit row address to Flash.
# - CADDR_DDR, (35): Transmit column address to Flash.
# - MODE1_DDR, (36): Transmit mode bits to Flash.
# - MODE2_DDR, (37): Transmit mode bits to Flash.
# - MODE4_DDR, (38): Transmit mode bits to Flash.
# - MODE8_DDR, (39): Transmit mode bits to Flash.
# - WRITE_DDR, (40): Transmit program data to Flash device.
# - READ_DDR, (41): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_DDR, (42): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_DDR, (43): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_DDR, (44): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_DDR, (45): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# Possible options: <STOP, CMD_SDR, RADDR_SDR, CADDR_SDR, MODE1_SDR, MODE2_SDR, MODE4_SDR, MODE8_SDR, WRITE_SDR,
# READ_SDR, LEARN_SDR, DATSZ_SDR, DUMMY_SDR, DUMMY_RWDS_SDR, JMP_ON_CS, CMD_DDR, RADDR_DDR, CADDR_DDR, MODE1_DDR,
# MODE2_DDR, MODE4_DDR, MODE8_DDR, WRITE_DDR, READ_DDR, LEARN_DDR, DATSZ_DDR, DUMMY_DDR, DUMMY_RWDS_DDR>
OPERATION_CODE: STOP
lookupTable_seq2_instr1:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq2_instr2:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq2_instr3:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq2_instr4:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq2_instr5:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq2_instr6:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq2_instr7:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
# -----------------------------------===== lookupTable_seq3_instr0 [Optional] =====-----------------------------------
# Description: Offset: 0x000000B0, Width: 16b; Lookup table holds Flash command sequences 3, instruction 0
lookupTable_seq3_instr0:
# ------------------------------------------===== OPERAND [Optional] =====------------------------------------------
# Description: Offset: 0b, Width: 8b, Instruction operand. Its values depends on used instruction
OPERAND: 0
# -----------------------------------------===== NUM_PADS [Optional] =====------------------------------------------
# Description: Offset: 8b, Width: 2b, Number of pads used by instruction. Some instructions ignores this parameter.
# - 1PAD, (0): Single mode. One pad is used.
# - 2PAD, (1): Dual mode. Two pads are used.
# - 4PAD, (2): Quad mode. Four pads are used.
# - 8PAD, (3): Octal mode. Eight pads are used.
# Possible options: <1PAD, 2PAD, 4PAD, 8PAD>
NUM_PADS: 1PAD
# --------------------------------------===== OPERATION_CODE [Optional] =====---------------------------------------
# Description: Offset: 10b, Width: 6b, Instruction operation code.
# - STOP, (0): Stop execution and de-assert CS. Then, the next command sequence (to the same flash device) starts
# from instruction pointer 0.
# - CMD_SDR, (1): Transmit command code to Flash.
# - RADDR_SDR, (2): Transmit row address to Flash.
# - CADDR_SDR, (3): Transmit column address to Flash.
# - MODE1_SDR, (4): Transmit mode bits to Flash.
# - MODE2_SDR, (5): Transmit mode bits to Flash.
# - MODE4_SDR, (6): Transmit mode bits to Flash.
# - MODE8_SDR, (7): Transmit mode bits to Flash.
# - WRITE_SDR, (8): Transmit program data to Flash device.
# - READ_SDR, (9): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_SDR, (10): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_SDR, (11): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_SDR, (12): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_SDR, (13): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# - JMP_ON_CS, (31): Stop execution, de-assert CS and save operand[7:0] as the instruction start pointer for next
# sequence.Normally this instruction is used to support Execute-In-Place enhanced mode. See XIP enhanced mode for
# more details.This instruction is only allowed for AHB read commands. There is interrupt status bit set
# (INTR[IPCMDERR] or INTR[AHBCMDERR]) when using this instruction in IP command or AHB write command.
# - CMD_DDR, (33): Transmit command code to Flash.
# - RADDR_DDR, (34): Transmit row address to Flash.
# - CADDR_DDR, (35): Transmit column address to Flash.
# - MODE1_DDR, (36): Transmit mode bits to Flash.
# - MODE2_DDR, (37): Transmit mode bits to Flash.
# - MODE4_DDR, (38): Transmit mode bits to Flash.
# - MODE8_DDR, (39): Transmit mode bits to Flash.
# - WRITE_DDR, (40): Transmit program data to Flash device.
# - READ_DDR, (41): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_DDR, (42): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_DDR, (43): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_DDR, (44): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_DDR, (45): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# Possible options: <STOP, CMD_SDR, RADDR_SDR, CADDR_SDR, MODE1_SDR, MODE2_SDR, MODE4_SDR, MODE8_SDR, WRITE_SDR,
# READ_SDR, LEARN_SDR, DATSZ_SDR, DUMMY_SDR, DUMMY_RWDS_SDR, JMP_ON_CS, CMD_DDR, RADDR_DDR, CADDR_DDR, MODE1_DDR,
# MODE2_DDR, MODE4_DDR, MODE8_DDR, WRITE_DDR, READ_DDR, LEARN_DDR, DATSZ_DDR, DUMMY_DDR, DUMMY_RWDS_DDR>
OPERATION_CODE: STOP
lookupTable_seq3_instr1:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq3_instr2:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq3_instr3:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq3_instr4:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq3_instr5:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq3_instr6:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq3_instr7:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
# -----------------------------------===== lookupTable_seq4_instr0 [Optional] =====-----------------------------------
# Description: Offset: 0x000000C0, Width: 16b; Lookup table holds Flash command sequences 4, instruction 0
lookupTable_seq4_instr0:
# ------------------------------------------===== OPERAND [Optional] =====------------------------------------------
# Description: Offset: 0b, Width: 8b, Instruction operand. Its values depends on used instruction
OPERAND: 0
# -----------------------------------------===== NUM_PADS [Optional] =====------------------------------------------
# Description: Offset: 8b, Width: 2b, Number of pads used by instruction. Some instructions ignores this parameter.
# - 1PAD, (0): Single mode. One pad is used.
# - 2PAD, (1): Dual mode. Two pads are used.
# - 4PAD, (2): Quad mode. Four pads are used.
# - 8PAD, (3): Octal mode. Eight pads are used.
# Possible options: <1PAD, 2PAD, 4PAD, 8PAD>
NUM_PADS: 1PAD
# --------------------------------------===== OPERATION_CODE [Optional] =====---------------------------------------
# Description: Offset: 10b, Width: 6b, Instruction operation code.
# - STOP, (0): Stop execution and de-assert CS. Then, the next command sequence (to the same flash device) starts
# from instruction pointer 0.
# - CMD_SDR, (1): Transmit command code to Flash.
# - RADDR_SDR, (2): Transmit row address to Flash.
# - CADDR_SDR, (3): Transmit column address to Flash.
# - MODE1_SDR, (4): Transmit mode bits to Flash.
# - MODE2_SDR, (5): Transmit mode bits to Flash.
# - MODE4_SDR, (6): Transmit mode bits to Flash.
# - MODE8_SDR, (7): Transmit mode bits to Flash.
# - WRITE_SDR, (8): Transmit program data to Flash device.
# - READ_SDR, (9): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_SDR, (10): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_SDR, (11): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_SDR, (12): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_SDR, (13): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# - JMP_ON_CS, (31): Stop execution, de-assert CS and save operand[7:0] as the instruction start pointer for next
# sequence.Normally this instruction is used to support Execute-In-Place enhanced mode. See XIP enhanced mode for
# more details.This instruction is only allowed for AHB read commands. There is interrupt status bit set
# (INTR[IPCMDERR] or INTR[AHBCMDERR]) when using this instruction in IP command or AHB write command.
# - CMD_DDR, (33): Transmit command code to Flash.
# - RADDR_DDR, (34): Transmit row address to Flash.
# - CADDR_DDR, (35): Transmit column address to Flash.
# - MODE1_DDR, (36): Transmit mode bits to Flash.
# - MODE2_DDR, (37): Transmit mode bits to Flash.
# - MODE4_DDR, (38): Transmit mode bits to Flash.
# - MODE8_DDR, (39): Transmit mode bits to Flash.
# - WRITE_DDR, (40): Transmit program data to Flash device.
# - READ_DDR, (41): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_DDR, (42): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_DDR, (43): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_DDR, (44): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_DDR, (45): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# Possible options: <STOP, CMD_SDR, RADDR_SDR, CADDR_SDR, MODE1_SDR, MODE2_SDR, MODE4_SDR, MODE8_SDR, WRITE_SDR,
# READ_SDR, LEARN_SDR, DATSZ_SDR, DUMMY_SDR, DUMMY_RWDS_SDR, JMP_ON_CS, CMD_DDR, RADDR_DDR, CADDR_DDR, MODE1_DDR,
# MODE2_DDR, MODE4_DDR, MODE8_DDR, WRITE_DDR, READ_DDR, LEARN_DDR, DATSZ_DDR, DUMMY_DDR, DUMMY_RWDS_DDR>
OPERATION_CODE: STOP
lookupTable_seq4_instr1:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq4_instr2:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq4_instr3:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq4_instr4:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq4_instr5:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq4_instr6:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq4_instr7:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
# -----------------------------------===== lookupTable_seq5_instr0 [Optional] =====-----------------------------------
# Description: Offset: 0x000000D0, Width: 16b; Lookup table holds Flash command sequences 5, instruction 0
lookupTable_seq5_instr0:
# ------------------------------------------===== OPERAND [Optional] =====------------------------------------------
# Description: Offset: 0b, Width: 8b, Instruction operand. Its values depends on used instruction
OPERAND: 0
# -----------------------------------------===== NUM_PADS [Optional] =====------------------------------------------
# Description: Offset: 8b, Width: 2b, Number of pads used by instruction. Some instructions ignores this parameter.
# - 1PAD, (0): Single mode. One pad is used.
# - 2PAD, (1): Dual mode. Two pads are used.
# - 4PAD, (2): Quad mode. Four pads are used.
# - 8PAD, (3): Octal mode. Eight pads are used.
# Possible options: <1PAD, 2PAD, 4PAD, 8PAD>
NUM_PADS: 1PAD
# --------------------------------------===== OPERATION_CODE [Optional] =====---------------------------------------
# Description: Offset: 10b, Width: 6b, Instruction operation code.
# - STOP, (0): Stop execution and de-assert CS. Then, the next command sequence (to the same flash device) starts
# from instruction pointer 0.
# - CMD_SDR, (1): Transmit command code to Flash.
# - RADDR_SDR, (2): Transmit row address to Flash.
# - CADDR_SDR, (3): Transmit column address to Flash.
# - MODE1_SDR, (4): Transmit mode bits to Flash.
# - MODE2_SDR, (5): Transmit mode bits to Flash.
# - MODE4_SDR, (6): Transmit mode bits to Flash.
# - MODE8_SDR, (7): Transmit mode bits to Flash.
# - WRITE_SDR, (8): Transmit program data to Flash device.
# - READ_SDR, (9): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_SDR, (10): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_SDR, (11): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_SDR, (12): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_SDR, (13): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# - JMP_ON_CS, (31): Stop execution, de-assert CS and save operand[7:0] as the instruction start pointer for next
# sequence.Normally this instruction is used to support Execute-In-Place enhanced mode. See XIP enhanced mode for
# more details.This instruction is only allowed for AHB read commands. There is interrupt status bit set
# (INTR[IPCMDERR] or INTR[AHBCMDERR]) when using this instruction in IP command or AHB write command.
# - CMD_DDR, (33): Transmit command code to Flash.
# - RADDR_DDR, (34): Transmit row address to Flash.
# - CADDR_DDR, (35): Transmit column address to Flash.
# - MODE1_DDR, (36): Transmit mode bits to Flash.
# - MODE2_DDR, (37): Transmit mode bits to Flash.
# - MODE4_DDR, (38): Transmit mode bits to Flash.
# - MODE8_DDR, (39): Transmit mode bits to Flash.
# - WRITE_DDR, (40): Transmit program data to Flash device.
# - READ_DDR, (41): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_DDR, (42): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_DDR, (43): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_DDR, (44): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_DDR, (45): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# Possible options: <STOP, CMD_SDR, RADDR_SDR, CADDR_SDR, MODE1_SDR, MODE2_SDR, MODE4_SDR, MODE8_SDR, WRITE_SDR,
# READ_SDR, LEARN_SDR, DATSZ_SDR, DUMMY_SDR, DUMMY_RWDS_SDR, JMP_ON_CS, CMD_DDR, RADDR_DDR, CADDR_DDR, MODE1_DDR,
# MODE2_DDR, MODE4_DDR, MODE8_DDR, WRITE_DDR, READ_DDR, LEARN_DDR, DATSZ_DDR, DUMMY_DDR, DUMMY_RWDS_DDR>
OPERATION_CODE: STOP
lookupTable_seq5_instr1:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq5_instr2:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq5_instr3:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq5_instr4:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq5_instr5:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq5_instr6:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq5_instr7:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
# -----------------------------------===== lookupTable_seq6_instr0 [Optional] =====-----------------------------------
# Description: Offset: 0x000000E0, Width: 16b; Lookup table holds Flash command sequences 6, instruction 0
lookupTable_seq6_instr0:
# ------------------------------------------===== OPERAND [Optional] =====------------------------------------------
# Description: Offset: 0b, Width: 8b, Instruction operand. Its values depends on used instruction
OPERAND: 0
# -----------------------------------------===== NUM_PADS [Optional] =====------------------------------------------
# Description: Offset: 8b, Width: 2b, Number of pads used by instruction. Some instructions ignores this parameter.
# - 1PAD, (0): Single mode. One pad is used.
# - 2PAD, (1): Dual mode. Two pads are used.
# - 4PAD, (2): Quad mode. Four pads are used.
# - 8PAD, (3): Octal mode. Eight pads are used.
# Possible options: <1PAD, 2PAD, 4PAD, 8PAD>
NUM_PADS: 1PAD
# --------------------------------------===== OPERATION_CODE [Optional] =====---------------------------------------
# Description: Offset: 10b, Width: 6b, Instruction operation code.
# - STOP, (0): Stop execution and de-assert CS. Then, the next command sequence (to the same flash device) starts
# from instruction pointer 0.
# - CMD_SDR, (1): Transmit command code to Flash.
# - RADDR_SDR, (2): Transmit row address to Flash.
# - CADDR_SDR, (3): Transmit column address to Flash.
# - MODE1_SDR, (4): Transmit mode bits to Flash.
# - MODE2_SDR, (5): Transmit mode bits to Flash.
# - MODE4_SDR, (6): Transmit mode bits to Flash.
# - MODE8_SDR, (7): Transmit mode bits to Flash.
# - WRITE_SDR, (8): Transmit program data to Flash device.
# - READ_SDR, (9): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_SDR, (10): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_SDR, (11): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_SDR, (12): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_SDR, (13): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# - JMP_ON_CS, (31): Stop execution, de-assert CS and save operand[7:0] as the instruction start pointer for next
# sequence.Normally this instruction is used to support Execute-In-Place enhanced mode. See XIP enhanced mode for
# more details.This instruction is only allowed for AHB read commands. There is interrupt status bit set
# (INTR[IPCMDERR] or INTR[AHBCMDERR]) when using this instruction in IP command or AHB write command.
# - CMD_DDR, (33): Transmit command code to Flash.
# - RADDR_DDR, (34): Transmit row address to Flash.
# - CADDR_DDR, (35): Transmit column address to Flash.
# - MODE1_DDR, (36): Transmit mode bits to Flash.
# - MODE2_DDR, (37): Transmit mode bits to Flash.
# - MODE4_DDR, (38): Transmit mode bits to Flash.
# - MODE8_DDR, (39): Transmit mode bits to Flash.
# - WRITE_DDR, (40): Transmit program data to Flash device.
# - READ_DDR, (41): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_DDR, (42): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_DDR, (43): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_DDR, (44): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_DDR, (45): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# Possible options: <STOP, CMD_SDR, RADDR_SDR, CADDR_SDR, MODE1_SDR, MODE2_SDR, MODE4_SDR, MODE8_SDR, WRITE_SDR,
# READ_SDR, LEARN_SDR, DATSZ_SDR, DUMMY_SDR, DUMMY_RWDS_SDR, JMP_ON_CS, CMD_DDR, RADDR_DDR, CADDR_DDR, MODE1_DDR,
# MODE2_DDR, MODE4_DDR, MODE8_DDR, WRITE_DDR, READ_DDR, LEARN_DDR, DATSZ_DDR, DUMMY_DDR, DUMMY_RWDS_DDR>
OPERATION_CODE: STOP
lookupTable_seq6_instr1:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq6_instr2:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq6_instr3:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq6_instr4:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq6_instr5:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq6_instr6:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq6_instr7:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
# -----------------------------------===== lookupTable_seq7_instr0 [Optional] =====-----------------------------------
# Description: Offset: 0x000000F0, Width: 16b; Lookup table holds Flash command sequences 7, instruction 0
lookupTable_seq7_instr0:
# ------------------------------------------===== OPERAND [Optional] =====------------------------------------------
# Description: Offset: 0b, Width: 8b, Instruction operand. Its values depends on used instruction
OPERAND: 0
# -----------------------------------------===== NUM_PADS [Optional] =====------------------------------------------
# Description: Offset: 8b, Width: 2b, Number of pads used by instruction. Some instructions ignores this parameter.
# - 1PAD, (0): Single mode. One pad is used.
# - 2PAD, (1): Dual mode. Two pads are used.
# - 4PAD, (2): Quad mode. Four pads are used.
# - 8PAD, (3): Octal mode. Eight pads are used.
# Possible options: <1PAD, 2PAD, 4PAD, 8PAD>
NUM_PADS: 1PAD
# --------------------------------------===== OPERATION_CODE [Optional] =====---------------------------------------
# Description: Offset: 10b, Width: 6b, Instruction operation code.
# - STOP, (0): Stop execution and de-assert CS. Then, the next command sequence (to the same flash device) starts
# from instruction pointer 0.
# - CMD_SDR, (1): Transmit command code to Flash.
# - RADDR_SDR, (2): Transmit row address to Flash.
# - CADDR_SDR, (3): Transmit column address to Flash.
# - MODE1_SDR, (4): Transmit mode bits to Flash.
# - MODE2_SDR, (5): Transmit mode bits to Flash.
# - MODE4_SDR, (6): Transmit mode bits to Flash.
# - MODE8_SDR, (7): Transmit mode bits to Flash.
# - WRITE_SDR, (8): Transmit program data to Flash device.
# - READ_SDR, (9): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_SDR, (10): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_SDR, (11): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_SDR, (12): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_SDR, (13): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# - JMP_ON_CS, (31): Stop execution, de-assert CS and save operand[7:0] as the instruction start pointer for next
# sequence.Normally this instruction is used to support Execute-In-Place enhanced mode. See XIP enhanced mode for
# more details.This instruction is only allowed for AHB read commands. There is interrupt status bit set
# (INTR[IPCMDERR] or INTR[AHBCMDERR]) when using this instruction in IP command or AHB write command.
# - CMD_DDR, (33): Transmit command code to Flash.
# - RADDR_DDR, (34): Transmit row address to Flash.
# - CADDR_DDR, (35): Transmit column address to Flash.
# - MODE1_DDR, (36): Transmit mode bits to Flash.
# - MODE2_DDR, (37): Transmit mode bits to Flash.
# - MODE4_DDR, (38): Transmit mode bits to Flash.
# - MODE8_DDR, (39): Transmit mode bits to Flash.
# - WRITE_DDR, (40): Transmit program data to Flash device.
# - READ_DDR, (41): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_DDR, (42): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_DDR, (43): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_DDR, (44): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_DDR, (45): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# Possible options: <STOP, CMD_SDR, RADDR_SDR, CADDR_SDR, MODE1_SDR, MODE2_SDR, MODE4_SDR, MODE8_SDR, WRITE_SDR,
# READ_SDR, LEARN_SDR, DATSZ_SDR, DUMMY_SDR, DUMMY_RWDS_SDR, JMP_ON_CS, CMD_DDR, RADDR_DDR, CADDR_DDR, MODE1_DDR,
# MODE2_DDR, MODE4_DDR, MODE8_DDR, WRITE_DDR, READ_DDR, LEARN_DDR, DATSZ_DDR, DUMMY_DDR, DUMMY_RWDS_DDR>
OPERATION_CODE: STOP
lookupTable_seq7_instr1:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq7_instr2:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq7_instr3:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq7_instr4:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq7_instr5:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq7_instr6:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq7_instr7:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
# -----------------------------------===== lookupTable_seq8_instr0 [Optional] =====-----------------------------------
# Description: Offset: 0x00000100, Width: 16b; Lookup table holds Flash command sequences 8, instruction 0
lookupTable_seq8_instr0:
# ------------------------------------------===== OPERAND [Optional] =====------------------------------------------
# Description: Offset: 0b, Width: 8b, Instruction operand. Its values depends on used instruction
OPERAND: 0
# -----------------------------------------===== NUM_PADS [Optional] =====------------------------------------------
# Description: Offset: 8b, Width: 2b, Number of pads used by instruction. Some instructions ignores this parameter.
# - 1PAD, (0): Single mode. One pad is used.
# - 2PAD, (1): Dual mode. Two pads are used.
# - 4PAD, (2): Quad mode. Four pads are used.
# - 8PAD, (3): Octal mode. Eight pads are used.
# Possible options: <1PAD, 2PAD, 4PAD, 8PAD>
NUM_PADS: 1PAD
# --------------------------------------===== OPERATION_CODE [Optional] =====---------------------------------------
# Description: Offset: 10b, Width: 6b, Instruction operation code.
# - STOP, (0): Stop execution and de-assert CS. Then, the next command sequence (to the same flash device) starts
# from instruction pointer 0.
# - CMD_SDR, (1): Transmit command code to Flash.
# - RADDR_SDR, (2): Transmit row address to Flash.
# - CADDR_SDR, (3): Transmit column address to Flash.
# - MODE1_SDR, (4): Transmit mode bits to Flash.
# - MODE2_SDR, (5): Transmit mode bits to Flash.
# - MODE4_SDR, (6): Transmit mode bits to Flash.
# - MODE8_SDR, (7): Transmit mode bits to Flash.
# - WRITE_SDR, (8): Transmit program data to Flash device.
# - READ_SDR, (9): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_SDR, (10): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_SDR, (11): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_SDR, (12): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_SDR, (13): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# - JMP_ON_CS, (31): Stop execution, de-assert CS and save operand[7:0] as the instruction start pointer for next
# sequence.Normally this instruction is used to support Execute-In-Place enhanced mode. See XIP enhanced mode for
# more details.This instruction is only allowed for AHB read commands. There is interrupt status bit set
# (INTR[IPCMDERR] or INTR[AHBCMDERR]) when using this instruction in IP command or AHB write command.
# - CMD_DDR, (33): Transmit command code to Flash.
# - RADDR_DDR, (34): Transmit row address to Flash.
# - CADDR_DDR, (35): Transmit column address to Flash.
# - MODE1_DDR, (36): Transmit mode bits to Flash.
# - MODE2_DDR, (37): Transmit mode bits to Flash.
# - MODE4_DDR, (38): Transmit mode bits to Flash.
# - MODE8_DDR, (39): Transmit mode bits to Flash.
# - WRITE_DDR, (40): Transmit program data to Flash device.
# - READ_DDR, (41): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_DDR, (42): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_DDR, (43): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_DDR, (44): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_DDR, (45): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# Possible options: <STOP, CMD_SDR, RADDR_SDR, CADDR_SDR, MODE1_SDR, MODE2_SDR, MODE4_SDR, MODE8_SDR, WRITE_SDR,
# READ_SDR, LEARN_SDR, DATSZ_SDR, DUMMY_SDR, DUMMY_RWDS_SDR, JMP_ON_CS, CMD_DDR, RADDR_DDR, CADDR_DDR, MODE1_DDR,
# MODE2_DDR, MODE4_DDR, MODE8_DDR, WRITE_DDR, READ_DDR, LEARN_DDR, DATSZ_DDR, DUMMY_DDR, DUMMY_RWDS_DDR>
OPERATION_CODE: STOP
lookupTable_seq8_instr1:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq8_instr2:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq8_instr3:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq8_instr4:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq8_instr5:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq8_instr6:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq8_instr7:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
# -----------------------------------===== lookupTable_seq9_instr0 [Optional] =====-----------------------------------
# Description: Offset: 0x00000110, Width: 16b; Lookup table holds Flash command sequences 9, instruction 0
lookupTable_seq9_instr0:
# ------------------------------------------===== OPERAND [Optional] =====------------------------------------------
# Description: Offset: 0b, Width: 8b, Instruction operand. Its values depends on used instruction
OPERAND: 0
# -----------------------------------------===== NUM_PADS [Optional] =====------------------------------------------
# Description: Offset: 8b, Width: 2b, Number of pads used by instruction. Some instructions ignores this parameter.
# - 1PAD, (0): Single mode. One pad is used.
# - 2PAD, (1): Dual mode. Two pads are used.
# - 4PAD, (2): Quad mode. Four pads are used.
# - 8PAD, (3): Octal mode. Eight pads are used.
# Possible options: <1PAD, 2PAD, 4PAD, 8PAD>
NUM_PADS: 1PAD
# --------------------------------------===== OPERATION_CODE [Optional] =====---------------------------------------
# Description: Offset: 10b, Width: 6b, Instruction operation code.
# - STOP, (0): Stop execution and de-assert CS. Then, the next command sequence (to the same flash device) starts
# from instruction pointer 0.
# - CMD_SDR, (1): Transmit command code to Flash.
# - RADDR_SDR, (2): Transmit row address to Flash.
# - CADDR_SDR, (3): Transmit column address to Flash.
# - MODE1_SDR, (4): Transmit mode bits to Flash.
# - MODE2_SDR, (5): Transmit mode bits to Flash.
# - MODE4_SDR, (6): Transmit mode bits to Flash.
# - MODE8_SDR, (7): Transmit mode bits to Flash.
# - WRITE_SDR, (8): Transmit program data to Flash device.
# - READ_SDR, (9): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_SDR, (10): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_SDR, (11): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_SDR, (12): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_SDR, (13): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# - JMP_ON_CS, (31): Stop execution, de-assert CS and save operand[7:0] as the instruction start pointer for next
# sequence.Normally this instruction is used to support Execute-In-Place enhanced mode. See XIP enhanced mode for
# more details.This instruction is only allowed for AHB read commands. There is interrupt status bit set
# (INTR[IPCMDERR] or INTR[AHBCMDERR]) when using this instruction in IP command or AHB write command.
# - CMD_DDR, (33): Transmit command code to Flash.
# - RADDR_DDR, (34): Transmit row address to Flash.
# - CADDR_DDR, (35): Transmit column address to Flash.
# - MODE1_DDR, (36): Transmit mode bits to Flash.
# - MODE2_DDR, (37): Transmit mode bits to Flash.
# - MODE4_DDR, (38): Transmit mode bits to Flash.
# - MODE8_DDR, (39): Transmit mode bits to Flash.
# - WRITE_DDR, (40): Transmit program data to Flash device.
# - READ_DDR, (41): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_DDR, (42): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_DDR, (43): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_DDR, (44): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_DDR, (45): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# Possible options: <STOP, CMD_SDR, RADDR_SDR, CADDR_SDR, MODE1_SDR, MODE2_SDR, MODE4_SDR, MODE8_SDR, WRITE_SDR,
# READ_SDR, LEARN_SDR, DATSZ_SDR, DUMMY_SDR, DUMMY_RWDS_SDR, JMP_ON_CS, CMD_DDR, RADDR_DDR, CADDR_DDR, MODE1_DDR,
# MODE2_DDR, MODE4_DDR, MODE8_DDR, WRITE_DDR, READ_DDR, LEARN_DDR, DATSZ_DDR, DUMMY_DDR, DUMMY_RWDS_DDR>
OPERATION_CODE: STOP
lookupTable_seq9_instr1:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq9_instr2:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq9_instr3:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq9_instr4:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq9_instr5:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq9_instr6:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq9_instr7:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
# ----------------------------------===== lookupTable_seq10_instr0 [Optional] =====-----------------------------------
# Description: Offset: 0x00000120, Width: 16b; Lookup table holds Flash command sequences 10, instruction 0
lookupTable_seq10_instr0:
# ------------------------------------------===== OPERAND [Optional] =====------------------------------------------
# Description: Offset: 0b, Width: 8b, Instruction operand. Its values depends on used instruction
OPERAND: 0
# -----------------------------------------===== NUM_PADS [Optional] =====------------------------------------------
# Description: Offset: 8b, Width: 2b, Number of pads used by instruction. Some instructions ignores this parameter.
# - 1PAD, (0): Single mode. One pad is used.
# - 2PAD, (1): Dual mode. Two pads are used.
# - 4PAD, (2): Quad mode. Four pads are used.
# - 8PAD, (3): Octal mode. Eight pads are used.
# Possible options: <1PAD, 2PAD, 4PAD, 8PAD>
NUM_PADS: 1PAD
# --------------------------------------===== OPERATION_CODE [Optional] =====---------------------------------------
# Description: Offset: 10b, Width: 6b, Instruction operation code.
# - STOP, (0): Stop execution and de-assert CS. Then, the next command sequence (to the same flash device) starts
# from instruction pointer 0.
# - CMD_SDR, (1): Transmit command code to Flash.
# - RADDR_SDR, (2): Transmit row address to Flash.
# - CADDR_SDR, (3): Transmit column address to Flash.
# - MODE1_SDR, (4): Transmit mode bits to Flash.
# - MODE2_SDR, (5): Transmit mode bits to Flash.
# - MODE4_SDR, (6): Transmit mode bits to Flash.
# - MODE8_SDR, (7): Transmit mode bits to Flash.
# - WRITE_SDR, (8): Transmit program data to Flash device.
# - READ_SDR, (9): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_SDR, (10): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_SDR, (11): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_SDR, (12): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_SDR, (13): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# - JMP_ON_CS, (31): Stop execution, de-assert CS and save operand[7:0] as the instruction start pointer for next
# sequence.Normally this instruction is used to support Execute-In-Place enhanced mode. See XIP enhanced mode for
# more details.This instruction is only allowed for AHB read commands. There is interrupt status bit set
# (INTR[IPCMDERR] or INTR[AHBCMDERR]) when using this instruction in IP command or AHB write command.
# - CMD_DDR, (33): Transmit command code to Flash.
# - RADDR_DDR, (34): Transmit row address to Flash.
# - CADDR_DDR, (35): Transmit column address to Flash.
# - MODE1_DDR, (36): Transmit mode bits to Flash.
# - MODE2_DDR, (37): Transmit mode bits to Flash.
# - MODE4_DDR, (38): Transmit mode bits to Flash.
# - MODE8_DDR, (39): Transmit mode bits to Flash.
# - WRITE_DDR, (40): Transmit program data to Flash device.
# - READ_DDR, (41): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_DDR, (42): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_DDR, (43): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_DDR, (44): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_DDR, (45): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# Possible options: <STOP, CMD_SDR, RADDR_SDR, CADDR_SDR, MODE1_SDR, MODE2_SDR, MODE4_SDR, MODE8_SDR, WRITE_SDR,
# READ_SDR, LEARN_SDR, DATSZ_SDR, DUMMY_SDR, DUMMY_RWDS_SDR, JMP_ON_CS, CMD_DDR, RADDR_DDR, CADDR_DDR, MODE1_DDR,
# MODE2_DDR, MODE4_DDR, MODE8_DDR, WRITE_DDR, READ_DDR, LEARN_DDR, DATSZ_DDR, DUMMY_DDR, DUMMY_RWDS_DDR>
OPERATION_CODE: STOP
lookupTable_seq10_instr1:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq10_instr2:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq10_instr3:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq10_instr4:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq10_instr5:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq10_instr6:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq10_instr7:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
# ----------------------------------===== lookupTable_seq11_instr0 [Optional] =====-----------------------------------
# Description: Offset: 0x00000130, Width: 16b; Lookup table holds Flash command sequences 11, instruction 0
lookupTable_seq11_instr0:
# ------------------------------------------===== OPERAND [Optional] =====------------------------------------------
# Description: Offset: 0b, Width: 8b, Instruction operand. Its values depends on used instruction
OPERAND: 0
# -----------------------------------------===== NUM_PADS [Optional] =====------------------------------------------
# Description: Offset: 8b, Width: 2b, Number of pads used by instruction. Some instructions ignores this parameter.
# - 1PAD, (0): Single mode. One pad is used.
# - 2PAD, (1): Dual mode. Two pads are used.
# - 4PAD, (2): Quad mode. Four pads are used.
# - 8PAD, (3): Octal mode. Eight pads are used.
# Possible options: <1PAD, 2PAD, 4PAD, 8PAD>
NUM_PADS: 1PAD
# --------------------------------------===== OPERATION_CODE [Optional] =====---------------------------------------
# Description: Offset: 10b, Width: 6b, Instruction operation code.
# - STOP, (0): Stop execution and de-assert CS. Then, the next command sequence (to the same flash device) starts
# from instruction pointer 0.
# - CMD_SDR, (1): Transmit command code to Flash.
# - RADDR_SDR, (2): Transmit row address to Flash.
# - CADDR_SDR, (3): Transmit column address to Flash.
# - MODE1_SDR, (4): Transmit mode bits to Flash.
# - MODE2_SDR, (5): Transmit mode bits to Flash.
# - MODE4_SDR, (6): Transmit mode bits to Flash.
# - MODE8_SDR, (7): Transmit mode bits to Flash.
# - WRITE_SDR, (8): Transmit program data to Flash device.
# - READ_SDR, (9): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_SDR, (10): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_SDR, (11): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_SDR, (12): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_SDR, (13): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# - JMP_ON_CS, (31): Stop execution, de-assert CS and save operand[7:0] as the instruction start pointer for next
# sequence.Normally this instruction is used to support Execute-In-Place enhanced mode. See XIP enhanced mode for
# more details.This instruction is only allowed for AHB read commands. There is interrupt status bit set
# (INTR[IPCMDERR] or INTR[AHBCMDERR]) when using this instruction in IP command or AHB write command.
# - CMD_DDR, (33): Transmit command code to Flash.
# - RADDR_DDR, (34): Transmit row address to Flash.
# - CADDR_DDR, (35): Transmit column address to Flash.
# - MODE1_DDR, (36): Transmit mode bits to Flash.
# - MODE2_DDR, (37): Transmit mode bits to Flash.
# - MODE4_DDR, (38): Transmit mode bits to Flash.
# - MODE8_DDR, (39): Transmit mode bits to Flash.
# - WRITE_DDR, (40): Transmit program data to Flash device.
# - READ_DDR, (41): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_DDR, (42): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_DDR, (43): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_DDR, (44): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_DDR, (45): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# Possible options: <STOP, CMD_SDR, RADDR_SDR, CADDR_SDR, MODE1_SDR, MODE2_SDR, MODE4_SDR, MODE8_SDR, WRITE_SDR,
# READ_SDR, LEARN_SDR, DATSZ_SDR, DUMMY_SDR, DUMMY_RWDS_SDR, JMP_ON_CS, CMD_DDR, RADDR_DDR, CADDR_DDR, MODE1_DDR,
# MODE2_DDR, MODE4_DDR, MODE8_DDR, WRITE_DDR, READ_DDR, LEARN_DDR, DATSZ_DDR, DUMMY_DDR, DUMMY_RWDS_DDR>
OPERATION_CODE: STOP
lookupTable_seq11_instr1:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq11_instr2:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq11_instr3:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq11_instr4:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq11_instr5:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq11_instr6:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq11_instr7:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
# ----------------------------------===== lookupTable_seq12_instr0 [Optional] =====-----------------------------------
# Description: Offset: 0x00000140, Width: 16b; Lookup table holds Flash command sequences 12, instruction 0
lookupTable_seq12_instr0:
# ------------------------------------------===== OPERAND [Optional] =====------------------------------------------
# Description: Offset: 0b, Width: 8b, Instruction operand. Its values depends on used instruction
OPERAND: 0
# -----------------------------------------===== NUM_PADS [Optional] =====------------------------------------------
# Description: Offset: 8b, Width: 2b, Number of pads used by instruction. Some instructions ignores this parameter.
# - 1PAD, (0): Single mode. One pad is used.
# - 2PAD, (1): Dual mode. Two pads are used.
# - 4PAD, (2): Quad mode. Four pads are used.
# - 8PAD, (3): Octal mode. Eight pads are used.
# Possible options: <1PAD, 2PAD, 4PAD, 8PAD>
NUM_PADS: 1PAD
# --------------------------------------===== OPERATION_CODE [Optional] =====---------------------------------------
# Description: Offset: 10b, Width: 6b, Instruction operation code.
# - STOP, (0): Stop execution and de-assert CS. Then, the next command sequence (to the same flash device) starts
# from instruction pointer 0.
# - CMD_SDR, (1): Transmit command code to Flash.
# - RADDR_SDR, (2): Transmit row address to Flash.
# - CADDR_SDR, (3): Transmit column address to Flash.
# - MODE1_SDR, (4): Transmit mode bits to Flash.
# - MODE2_SDR, (5): Transmit mode bits to Flash.
# - MODE4_SDR, (6): Transmit mode bits to Flash.
# - MODE8_SDR, (7): Transmit mode bits to Flash.
# - WRITE_SDR, (8): Transmit program data to Flash device.
# - READ_SDR, (9): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_SDR, (10): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_SDR, (11): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_SDR, (12): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_SDR, (13): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# - JMP_ON_CS, (31): Stop execution, de-assert CS and save operand[7:0] as the instruction start pointer for next
# sequence.Normally this instruction is used to support Execute-In-Place enhanced mode. See XIP enhanced mode for
# more details.This instruction is only allowed for AHB read commands. There is interrupt status bit set
# (INTR[IPCMDERR] or INTR[AHBCMDERR]) when using this instruction in IP command or AHB write command.
# - CMD_DDR, (33): Transmit command code to Flash.
# - RADDR_DDR, (34): Transmit row address to Flash.
# - CADDR_DDR, (35): Transmit column address to Flash.
# - MODE1_DDR, (36): Transmit mode bits to Flash.
# - MODE2_DDR, (37): Transmit mode bits to Flash.
# - MODE4_DDR, (38): Transmit mode bits to Flash.
# - MODE8_DDR, (39): Transmit mode bits to Flash.
# - WRITE_DDR, (40): Transmit program data to Flash device.
# - READ_DDR, (41): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_DDR, (42): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_DDR, (43): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_DDR, (44): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_DDR, (45): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# Possible options: <STOP, CMD_SDR, RADDR_SDR, CADDR_SDR, MODE1_SDR, MODE2_SDR, MODE4_SDR, MODE8_SDR, WRITE_SDR,
# READ_SDR, LEARN_SDR, DATSZ_SDR, DUMMY_SDR, DUMMY_RWDS_SDR, JMP_ON_CS, CMD_DDR, RADDR_DDR, CADDR_DDR, MODE1_DDR,
# MODE2_DDR, MODE4_DDR, MODE8_DDR, WRITE_DDR, READ_DDR, LEARN_DDR, DATSZ_DDR, DUMMY_DDR, DUMMY_RWDS_DDR>
OPERATION_CODE: STOP
lookupTable_seq12_instr1:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq12_instr2:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq12_instr3:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq12_instr4:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq12_instr5:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq12_instr6:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq12_instr7:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
# ----------------------------------===== lookupTable_seq13_instr0 [Optional] =====-----------------------------------
# Description: Offset: 0x00000150, Width: 16b; Lookup table holds Flash command sequences 13, instruction 0
lookupTable_seq13_instr0:
# ------------------------------------------===== OPERAND [Optional] =====------------------------------------------
# Description: Offset: 0b, Width: 8b, Instruction operand. Its values depends on used instruction
OPERAND: 0
# -----------------------------------------===== NUM_PADS [Optional] =====------------------------------------------
# Description: Offset: 8b, Width: 2b, Number of pads used by instruction. Some instructions ignores this parameter.
# - 1PAD, (0): Single mode. One pad is used.
# - 2PAD, (1): Dual mode. Two pads are used.
# - 4PAD, (2): Quad mode. Four pads are used.
# - 8PAD, (3): Octal mode. Eight pads are used.
# Possible options: <1PAD, 2PAD, 4PAD, 8PAD>
NUM_PADS: 1PAD
# --------------------------------------===== OPERATION_CODE [Optional] =====---------------------------------------
# Description: Offset: 10b, Width: 6b, Instruction operation code.
# - STOP, (0): Stop execution and de-assert CS. Then, the next command sequence (to the same flash device) starts
# from instruction pointer 0.
# - CMD_SDR, (1): Transmit command code to Flash.
# - RADDR_SDR, (2): Transmit row address to Flash.
# - CADDR_SDR, (3): Transmit column address to Flash.
# - MODE1_SDR, (4): Transmit mode bits to Flash.
# - MODE2_SDR, (5): Transmit mode bits to Flash.
# - MODE4_SDR, (6): Transmit mode bits to Flash.
# - MODE8_SDR, (7): Transmit mode bits to Flash.
# - WRITE_SDR, (8): Transmit program data to Flash device.
# - READ_SDR, (9): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_SDR, (10): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_SDR, (11): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_SDR, (12): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_SDR, (13): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# - JMP_ON_CS, (31): Stop execution, de-assert CS and save operand[7:0] as the instruction start pointer for next
# sequence.Normally this instruction is used to support Execute-In-Place enhanced mode. See XIP enhanced mode for
# more details.This instruction is only allowed for AHB read commands. There is interrupt status bit set
# (INTR[IPCMDERR] or INTR[AHBCMDERR]) when using this instruction in IP command or AHB write command.
# - CMD_DDR, (33): Transmit command code to Flash.
# - RADDR_DDR, (34): Transmit row address to Flash.
# - CADDR_DDR, (35): Transmit column address to Flash.
# - MODE1_DDR, (36): Transmit mode bits to Flash.
# - MODE2_DDR, (37): Transmit mode bits to Flash.
# - MODE4_DDR, (38): Transmit mode bits to Flash.
# - MODE8_DDR, (39): Transmit mode bits to Flash.
# - WRITE_DDR, (40): Transmit program data to Flash device.
# - READ_DDR, (41): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_DDR, (42): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_DDR, (43): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_DDR, (44): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_DDR, (45): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# Possible options: <STOP, CMD_SDR, RADDR_SDR, CADDR_SDR, MODE1_SDR, MODE2_SDR, MODE4_SDR, MODE8_SDR, WRITE_SDR,
# READ_SDR, LEARN_SDR, DATSZ_SDR, DUMMY_SDR, DUMMY_RWDS_SDR, JMP_ON_CS, CMD_DDR, RADDR_DDR, CADDR_DDR, MODE1_DDR,
# MODE2_DDR, MODE4_DDR, MODE8_DDR, WRITE_DDR, READ_DDR, LEARN_DDR, DATSZ_DDR, DUMMY_DDR, DUMMY_RWDS_DDR>
OPERATION_CODE: STOP
lookupTable_seq13_instr1:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq13_instr2:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq13_instr3:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq13_instr4:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq13_instr5:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq13_instr6:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq13_instr7:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
# ----------------------------------===== lookupTable_seq14_instr0 [Optional] =====-----------------------------------
# Description: Offset: 0x00000160, Width: 16b; Lookup table holds Flash command sequences 14, instruction 0
lookupTable_seq14_instr0:
# ------------------------------------------===== OPERAND [Optional] =====------------------------------------------
# Description: Offset: 0b, Width: 8b, Instruction operand. Its values depends on used instruction
OPERAND: 0
# -----------------------------------------===== NUM_PADS [Optional] =====------------------------------------------
# Description: Offset: 8b, Width: 2b, Number of pads used by instruction. Some instructions ignores this parameter.
# - 1PAD, (0): Single mode. One pad is used.
# - 2PAD, (1): Dual mode. Two pads are used.
# - 4PAD, (2): Quad mode. Four pads are used.
# - 8PAD, (3): Octal mode. Eight pads are used.
# Possible options: <1PAD, 2PAD, 4PAD, 8PAD>
NUM_PADS: 1PAD
# --------------------------------------===== OPERATION_CODE [Optional] =====---------------------------------------
# Description: Offset: 10b, Width: 6b, Instruction operation code.
# - STOP, (0): Stop execution and de-assert CS. Then, the next command sequence (to the same flash device) starts
# from instruction pointer 0.
# - CMD_SDR, (1): Transmit command code to Flash.
# - RADDR_SDR, (2): Transmit row address to Flash.
# - CADDR_SDR, (3): Transmit column address to Flash.
# - MODE1_SDR, (4): Transmit mode bits to Flash.
# - MODE2_SDR, (5): Transmit mode bits to Flash.
# - MODE4_SDR, (6): Transmit mode bits to Flash.
# - MODE8_SDR, (7): Transmit mode bits to Flash.
# - WRITE_SDR, (8): Transmit program data to Flash device.
# - READ_SDR, (9): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_SDR, (10): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_SDR, (11): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_SDR, (12): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_SDR, (13): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# - JMP_ON_CS, (31): Stop execution, de-assert CS and save operand[7:0] as the instruction start pointer for next
# sequence.Normally this instruction is used to support Execute-In-Place enhanced mode. See XIP enhanced mode for
# more details.This instruction is only allowed for AHB read commands. There is interrupt status bit set
# (INTR[IPCMDERR] or INTR[AHBCMDERR]) when using this instruction in IP command or AHB write command.
# - CMD_DDR, (33): Transmit command code to Flash.
# - RADDR_DDR, (34): Transmit row address to Flash.
# - CADDR_DDR, (35): Transmit column address to Flash.
# - MODE1_DDR, (36): Transmit mode bits to Flash.
# - MODE2_DDR, (37): Transmit mode bits to Flash.
# - MODE4_DDR, (38): Transmit mode bits to Flash.
# - MODE8_DDR, (39): Transmit mode bits to Flash.
# - WRITE_DDR, (40): Transmit program data to Flash device.
# - READ_DDR, (41): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_DDR, (42): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_DDR, (43): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_DDR, (44): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_DDR, (45): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# Possible options: <STOP, CMD_SDR, RADDR_SDR, CADDR_SDR, MODE1_SDR, MODE2_SDR, MODE4_SDR, MODE8_SDR, WRITE_SDR,
# READ_SDR, LEARN_SDR, DATSZ_SDR, DUMMY_SDR, DUMMY_RWDS_SDR, JMP_ON_CS, CMD_DDR, RADDR_DDR, CADDR_DDR, MODE1_DDR,
# MODE2_DDR, MODE4_DDR, MODE8_DDR, WRITE_DDR, READ_DDR, LEARN_DDR, DATSZ_DDR, DUMMY_DDR, DUMMY_RWDS_DDR>
OPERATION_CODE: STOP
lookupTable_seq14_instr1:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq14_instr2:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq14_instr3:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq14_instr4:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq14_instr5:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq14_instr6:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq14_instr7:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
# ----------------------------------===== lookupTable_seq15_instr0 [Optional] =====-----------------------------------
# Description: Offset: 0x00000170, Width: 16b; Lookup table holds Flash command sequences 15, instruction 0
lookupTable_seq15_instr0:
# ------------------------------------------===== OPERAND [Optional] =====------------------------------------------
# Description: Offset: 0b, Width: 8b, Instruction operand. Its values depends on used instruction
OPERAND: 0
# -----------------------------------------===== NUM_PADS [Optional] =====------------------------------------------
# Description: Offset: 8b, Width: 2b, Number of pads used by instruction. Some instructions ignores this parameter.
# - 1PAD, (0): Single mode. One pad is used.
# - 2PAD, (1): Dual mode. Two pads are used.
# - 4PAD, (2): Quad mode. Four pads are used.
# - 8PAD, (3): Octal mode. Eight pads are used.
# Possible options: <1PAD, 2PAD, 4PAD, 8PAD>
NUM_PADS: 1PAD
# --------------------------------------===== OPERATION_CODE [Optional] =====---------------------------------------
# Description: Offset: 10b, Width: 6b, Instruction operation code.
# - STOP, (0): Stop execution and de-assert CS. Then, the next command sequence (to the same flash device) starts
# from instruction pointer 0.
# - CMD_SDR, (1): Transmit command code to Flash.
# - RADDR_SDR, (2): Transmit row address to Flash.
# - CADDR_SDR, (3): Transmit column address to Flash.
# - MODE1_SDR, (4): Transmit mode bits to Flash.
# - MODE2_SDR, (5): Transmit mode bits to Flash.
# - MODE4_SDR, (6): Transmit mode bits to Flash.
# - MODE8_SDR, (7): Transmit mode bits to Flash.
# - WRITE_SDR, (8): Transmit program data to Flash device.
# - READ_SDR, (9): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_SDR, (10): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_SDR, (11): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_SDR, (12): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_SDR, (13): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# - JMP_ON_CS, (31): Stop execution, de-assert CS and save operand[7:0] as the instruction start pointer for next
# sequence.Normally this instruction is used to support Execute-In-Place enhanced mode. See XIP enhanced mode for
# more details.This instruction is only allowed for AHB read commands. There is interrupt status bit set
# (INTR[IPCMDERR] or INTR[AHBCMDERR]) when using this instruction in IP command or AHB write command.
# - CMD_DDR, (33): Transmit command code to Flash.
# - RADDR_DDR, (34): Transmit row address to Flash.
# - CADDR_DDR, (35): Transmit column address to Flash.
# - MODE1_DDR, (36): Transmit mode bits to Flash.
# - MODE2_DDR, (37): Transmit mode bits to Flash.
# - MODE4_DDR, (38): Transmit mode bits to Flash.
# - MODE8_DDR, (39): Transmit mode bits to Flash.
# - WRITE_DDR, (40): Transmit program data to Flash device.
# - READ_DDR, (41): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_DDR, (42): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_DDR, (43): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_DDR, (44): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_DDR, (45): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# Possible options: <STOP, CMD_SDR, RADDR_SDR, CADDR_SDR, MODE1_SDR, MODE2_SDR, MODE4_SDR, MODE8_SDR, WRITE_SDR,
# READ_SDR, LEARN_SDR, DATSZ_SDR, DUMMY_SDR, DUMMY_RWDS_SDR, JMP_ON_CS, CMD_DDR, RADDR_DDR, CADDR_DDR, MODE1_DDR,
# MODE2_DDR, MODE4_DDR, MODE8_DDR, WRITE_DDR, READ_DDR, LEARN_DDR, DATSZ_DDR, DUMMY_DDR, DUMMY_RWDS_DDR>
OPERATION_CODE: STOP
lookupTable_seq15_instr1:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq15_instr2:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq15_instr3:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq15_instr4:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq15_instr5:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq15_instr6:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq15_instr7:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
# ---------------------------------------===== lutCustomSeq_0 [Optional] =====----------------------------------------
# Description: Offset: 0x00000180, Width: 32b; [0x180-0x1af] Customizable LUT Sequences
lutCustomSeq_0:
# ------------------------------------------===== seqNum [Optional] =====-------------------------------------------
# Description: Offset: 0b, Width: 8b, Sequence Number, valid number: 1-16
seqNum: 0
# -------------------------------------------===== seqId [Optional] =====-------------------------------------------
# Description: Offset: 8b, Width: 8b, Sequence Index, valid number: 0-15
seqId: 0
# -----------------------------------------===== reserved [Optional] =====------------------------------------------
# Description: Offset: 16b, Width: 16b, N/A
reserved: 0
# ---------------------------------------===== lutCustomSeq_1 [Optional] =====----------------------------------------
# Description: Offset: 0x00000184, Width: 32b; [0x180-0x1af] Customizable LUT Sequences
lutCustomSeq_1:
# ------------------------------------------===== seqNum [Optional] =====-------------------------------------------
# Description: Offset: 0b, Width: 8b, Sequence Number, valid number: 1-16
seqNum: 0
# -------------------------------------------===== seqId [Optional] =====-------------------------------------------
# Description: Offset: 8b, Width: 8b, Sequence Index, valid number: 0-15
seqId: 0
# -----------------------------------------===== reserved [Optional] =====------------------------------------------
# Description: Offset: 16b, Width: 16b, N/A
reserved: 0
# ---------------------------------------===== lutCustomSeq_2 [Optional] =====----------------------------------------
# Description: Offset: 0x00000188, Width: 32b; [0x180-0x1af] Customizable LUT Sequences
lutCustomSeq_2:
# ------------------------------------------===== seqNum [Optional] =====-------------------------------------------
# Description: Offset: 0b, Width: 8b, Sequence Number, valid number: 1-16
seqNum: 0
# -------------------------------------------===== seqId [Optional] =====-------------------------------------------
# Description: Offset: 8b, Width: 8b, Sequence Index, valid number: 0-15
seqId: 0
# -----------------------------------------===== reserved [Optional] =====------------------------------------------
# Description: Offset: 16b, Width: 16b, N/A
reserved: 0
# ---------------------------------------===== lutCustomSeq_3 [Optional] =====----------------------------------------
# Description: Offset: 0x0000018C, Width: 32b; [0x180-0x1af] Customizable LUT Sequences
lutCustomSeq_3:
# ------------------------------------------===== seqNum [Optional] =====-------------------------------------------
# Description: Offset: 0b, Width: 8b, Sequence Number, valid number: 1-16
seqNum: 0
# -------------------------------------------===== seqId [Optional] =====-------------------------------------------
# Description: Offset: 8b, Width: 8b, Sequence Index, valid number: 0-15
seqId: 0
# -----------------------------------------===== reserved [Optional] =====------------------------------------------
# Description: Offset: 16b, Width: 16b, N/A
reserved: 0
# ---------------------------------------===== lutCustomSeq_4 [Optional] =====----------------------------------------
# Description: Offset: 0x00000190, Width: 32b; [0x180-0x1af] Customizable LUT Sequences
lutCustomSeq_4:
# ------------------------------------------===== seqNum [Optional] =====-------------------------------------------
# Description: Offset: 0b, Width: 8b, Sequence Number, valid number: 1-16
seqNum: 0
# -------------------------------------------===== seqId [Optional] =====-------------------------------------------
# Description: Offset: 8b, Width: 8b, Sequence Index, valid number: 0-15
seqId: 0
# -----------------------------------------===== reserved [Optional] =====------------------------------------------
# Description: Offset: 16b, Width: 16b, N/A
reserved: 0
# ---------------------------------------===== lutCustomSeq_5 [Optional] =====----------------------------------------
# Description: Offset: 0x00000194, Width: 32b; [0x180-0x1af] Customizable LUT Sequences
lutCustomSeq_5:
# ------------------------------------------===== seqNum [Optional] =====-------------------------------------------
# Description: Offset: 0b, Width: 8b, Sequence Number, valid number: 1-16
seqNum: 0
# -------------------------------------------===== seqId [Optional] =====-------------------------------------------
# Description: Offset: 8b, Width: 8b, Sequence Index, valid number: 0-15
seqId: 0
# -----------------------------------------===== reserved [Optional] =====------------------------------------------
# Description: Offset: 16b, Width: 16b, N/A
reserved: 0
# ---------------------------------------===== lutCustomSeq_6 [Optional] =====----------------------------------------
# Description: Offset: 0x00000198, Width: 32b; [0x180-0x1af] Customizable LUT Sequences
lutCustomSeq_6:
# ------------------------------------------===== seqNum [Optional] =====-------------------------------------------
# Description: Offset: 0b, Width: 8b, Sequence Number, valid number: 1-16
seqNum: 0
# -------------------------------------------===== seqId [Optional] =====-------------------------------------------
# Description: Offset: 8b, Width: 8b, Sequence Index, valid number: 0-15
seqId: 0
# -----------------------------------------===== reserved [Optional] =====------------------------------------------
# Description: Offset: 16b, Width: 16b, N/A
reserved: 0
# ---------------------------------------===== lutCustomSeq_7 [Optional] =====----------------------------------------
# Description: Offset: 0x0000019C, Width: 32b; [0x180-0x1af] Customizable LUT Sequences
lutCustomSeq_7:
# ------------------------------------------===== seqNum [Optional] =====-------------------------------------------
# Description: Offset: 0b, Width: 8b, Sequence Number, valid number: 1-16
seqNum: 0
# -------------------------------------------===== seqId [Optional] =====-------------------------------------------
# Description: Offset: 8b, Width: 8b, Sequence Index, valid number: 0-15
seqId: 0
# -----------------------------------------===== reserved [Optional] =====------------------------------------------
# Description: Offset: 16b, Width: 16b, N/A
reserved: 0
# ---------------------------------------===== lutCustomSeq_8 [Optional] =====----------------------------------------
# Description: Offset: 0x000001A0, Width: 32b; [0x180-0x1af] Customizable LUT Sequences
lutCustomSeq_8:
# ------------------------------------------===== seqNum [Optional] =====-------------------------------------------
# Description: Offset: 0b, Width: 8b, Sequence Number, valid number: 1-16
seqNum: 0
# -------------------------------------------===== seqId [Optional] =====-------------------------------------------
# Description: Offset: 8b, Width: 8b, Sequence Index, valid number: 0-15
seqId: 0
# -----------------------------------------===== reserved [Optional] =====------------------------------------------
# Description: Offset: 16b, Width: 16b, N/A
reserved: 0
# ---------------------------------------===== lutCustomSeq_9 [Optional] =====----------------------------------------
# Description: Offset: 0x000001A4, Width: 32b; [0x180-0x1af] Customizable LUT Sequences
lutCustomSeq_9:
# ------------------------------------------===== seqNum [Optional] =====-------------------------------------------
# Description: Offset: 0b, Width: 8b, Sequence Number, valid number: 1-16
seqNum: 0
# -------------------------------------------===== seqId [Optional] =====-------------------------------------------
# Description: Offset: 8b, Width: 8b, Sequence Index, valid number: 0-15
seqId: 0
# -----------------------------------------===== reserved [Optional] =====------------------------------------------
# Description: Offset: 16b, Width: 16b, N/A
reserved: 0
# ---------------------------------------===== lutCustomSeq_10 [Optional] =====---------------------------------------
# Description: Offset: 0x000001A8, Width: 32b; [0x180-0x1af] Customizable LUT Sequences
lutCustomSeq_10:
# ------------------------------------------===== seqNum [Optional] =====-------------------------------------------
# Description: Offset: 0b, Width: 8b, Sequence Number, valid number: 1-16
seqNum: 0
# -------------------------------------------===== seqId [Optional] =====-------------------------------------------
# Description: Offset: 8b, Width: 8b, Sequence Index, valid number: 0-15
seqId: 0
# -----------------------------------------===== reserved [Optional] =====------------------------------------------
# Description: Offset: 16b, Width: 16b, N/A
reserved: 0
# ---------------------------------------===== lutCustomSeq_11 [Optional] =====---------------------------------------
# Description: Offset: 0x000001AC, Width: 32b; [0x180-0x1af] Customizable LUT Sequences
lutCustomSeq_11:
# ------------------------------------------===== seqNum [Optional] =====-------------------------------------------
# Description: Offset: 0b, Width: 8b, Sequence Number, valid number: 1-16
seqNum: 0
# -------------------------------------------===== seqId [Optional] =====-------------------------------------------
# Description: Offset: 8b, Width: 8b, Sequence Index, valid number: 0-15
seqId: 0
# -----------------------------------------===== reserved [Optional] =====------------------------------------------
# Description: Offset: 16b, Width: 16b, N/A
reserved: 0
# -----------------------------------------===== reserved4_0 [Optional] =====-----------------------------------------
# Description: Offset: 0x000001B0, Width: 32b; [0x1b0-0x1bf] Reserved for future use
reserved4_0: '0x00000000'
# -----------------------------------------===== reserved4_1 [Optional] =====-----------------------------------------
# Description: Offset: 0x000001B4, Width: 32b; [0x1b0-0x1bf] Reserved for future use
reserved4_1: '0x00000000'
# -----------------------------------------===== reserved4_2 [Optional] =====-----------------------------------------
# Description: Offset: 0x000001B8, Width: 32b; [0x1b0-0x1bf] Reserved for future use
reserved4_2: '0x00000000'
# -----------------------------------------===== reserved4_3 [Optional] =====-----------------------------------------
# Description: Offset: 0x000001BC, Width: 32b; [0x1b0-0x1bf] Reserved for future use
reserved4_3: '0x00000000'
# ------------------------------------------===== pageSize [Optional] =====-------------------------------------------
# Description: Offset: 0x000001C0, Width: 32b; Page size of Serial NOR
pageSize: '0x00000000'
# -----------------------------------------===== sectorSize [Optional] =====------------------------------------------
# Description: Offset: 0x000001C4, Width: 32b; Sector size of Serial NOR
sectorSize: '0x00000000'
# -------------------------------------===== ipcmdSerialClkFreq [Optional] =====--------------------------------------
# Description: Offset: 0x000001C8, Width: 8b; Clock frequency for IP command
ipcmdSerialClkFreq: '0x00'
# -------------------------------------===== isUniformBlockSize [Optional] =====--------------------------------------
# Description: Offset: 0x000001C9, Width: 8b; Sector/Block size is the same
isUniformBlockSize: '0x00'
# -----------------------------------------===== reserved0_0 [Optional] =====-----------------------------------------
# Description: Offset: 0x000001CA, Width: 8b; Reserved for future use
reserved0_0: '0x00'
# -----------------------------------------===== reserved0_1 [Optional] =====-----------------------------------------
# Description: Offset: 0x000001CB, Width: 8b; Reserved for future use
reserved0_1: '0x00'
# ----------------------------------------===== serialNorType [Optional] =====----------------------------------------
# Description: Offset: 0x000001CC, Width: 8b; Serial NOR Flash type: 0/1/2/3
serialNorType: '0x00'
# --------------------------------------===== needExitNoCmdMode [Optional] =====--------------------------------------
# Description: Offset: 0x000001CD, Width: 8b; Need to exit NoCmd mode before other IP command
needExitNoCmdMode: '0x00'
# ------------------------------------===== halfClkForNonReadCmd [Optional] =====-------------------------------------
# Description: Offset: 0x000001CE, Width: 8b; Half the Serial Clock for non-read command: true/false
halfClkForNonReadCmd: '0x00'
# ------------------------------------===== needRestoreNoCmdMode [Optional] =====-------------------------------------
# Description: Offset: 0x000001CF, Width: 8b; Need to Restore NoCmd mode after IP command execution
needRestoreNoCmdMode: '0x00'
# ------------------------------------------===== blockSize [Optional] =====------------------------------------------
# Description: Offset: 0x000001D0, Width: 32b; Block size
blockSize: '0x00000000'
# -----------------------------------------===== reserve2_0 [Optional] =====------------------------------------------
# Description: Offset: 0x000001D4, Width: 32b; Reserved for future use
reserve2_0: '0x00000000'
# -----------------------------------------===== reserve2_1 [Optional] =====------------------------------------------
# Description: Offset: 0x000001D8, Width: 32b; Reserved for future use
reserve2_1: '0x00000000'
# -----------------------------------------===== reserve2_2 [Optional] =====------------------------------------------
# Description: Offset: 0x000001DC, Width: 32b; Reserved for future use
reserve2_2: '0x00000000'
# -----------------------------------------===== reserve2_3 [Optional] =====------------------------------------------
# Description: Offset: 0x000001E0, Width: 32b; Reserved for future use
reserve2_3: '0x00000000'
# -----------------------------------------===== reserve2_4 [Optional] =====------------------------------------------
# Description: Offset: 0x000001E4, Width: 32b; Reserved for future use
reserve2_4: '0x00000000'
# -----------------------------------------===== reserve2_5 [Optional] =====------------------------------------------
# Description: Offset: 0x000001E8, Width: 32b; Reserved for future use
reserve2_5: '0x00000000'
# -----------------------------------------===== reserve2_6 [Optional] =====------------------------------------------
# Description: Offset: 0x000001EC, Width: 32b; Reserved for future use
reserve2_6: '0x00000000'
# -----------------------------------------===== reserve2_7 [Optional] =====------------------------------------------
# Description: Offset: 0x000001F0, Width: 32b; Reserved for future use
reserve2_7: '0x00000000'
# -----------------------------------------===== reserve2_8 [Optional] =====------------------------------------------
# Description: Offset: 0x000001F4, Width: 32b; Reserved for future use
reserve2_8: '0x00000000'
# -----------------------------------------===== reserve2_9 [Optional] =====------------------------------------------
# Description: Offset: 0x000001F8, Width: 32b; Reserved for future use
reserve2_9: '0x00000000'
# -----------------------------------------===== reserve2_10 [Optional] =====-----------------------------------------
# Description: Offset: 0x000001FC, Width: 32b; Reserved for future use
reserve2_10: '0x00000000'
FCB for mimxrt1060, Revision: a0 and flexspi_nor#
FCB for mimxrt1060, Revision: a0 and flexspi_nor JSON schema
FCB for mimxrt1060, Revision: a0 and flexspi_nor YAML configuration template
# ================================= FCB for mimxrt1060, Revision: a0 and flexspi_nor =================================
# ======================================================================================================================
# == FCB for mimxrt1060, Revision: a0 and flexspi_nor ==
# ======================================================================================================================
# -------------------------------------===== The chip family name [Required] =====--------------------------------------
# Description: NXP chip family identifier.
family: CHOOSE_FROM_TABLE
# -----------------------------------------===== MCU revision [Optional] =====------------------------------------------
# Description: Revision of silicon. The 'latest' name, means most current revision.
# Possible options: <a0, latest>
revision: a0
# ------------------------------------------===== Memory type [Required] =====------------------------------------------
# Description: Specify type of memory used by FCB description.
# Possible options: <flexspi_nor>
type: flexspi_nor
# ------------------------------------------===== mimxrt1060 [Required] =====-------------------------------------------
fcb_settings:
# ---------------------------------------------===== tag [Optional] =====---------------------------------------------
# Description: Offset: 0x00000000, Width: 32b; [0x000-0x003] Tag, fixed value 0x42464346UL
tag: '0x42464346'
# -------------------------------------------===== version [Optional] =====-------------------------------------------
# Description: Offset: 0x00000004, Width: 32b; [0x004-0x007] Version,[31:24] -'V', [23:16] - Major, [15:8] - Minor,
# [7:0] - bugfix
version: '0x56010400'
# ------------------------------------------===== reserved0 [Optional] =====------------------------------------------
# Description: Offset: 0x00000008, Width: 32b; [0x008-0x00b] Reserved for future use
reserved0: '0x00000000'
# --------------------------------------===== readSampleClkSrc [Optional] =====---------------------------------------
# Description: Offset: 0x0000000C, Width: 8b; [0x00c-0x00c] Read Sample Clock Source, valid value: 0/1/3
readSampleClkSrc: '0x00'
# -----------------------------------------===== csHoldTime [Optional] =====------------------------------------------
# Description: Offset: 0x0000000D, Width: 8b; [0x00d-0x00d] CS hold time, default value: 3
csHoldTime: '0x00'
# -----------------------------------------===== csSetupTime [Optional] =====-----------------------------------------
# Description: Offset: 0x0000000E, Width: 8b; [0x00e-0x00e] CS setup time, default value: 3
csSetupTime: '0x00'
# -------------------------------------===== columnAddressWidth [Optional] =====--------------------------------------
# Description: Offset: 0x0000000F, Width: 8b; [0x00f-0x00f] Column Address with, for HyperBus protocol, it is fixed
# to 3, For Serial NAND, need to refer to datasheet
columnAddressWidth: '0x00'
# -------------------------------------===== deviceModeCfgEnable [Optional] =====-------------------------------------
# Description: Offset: 0x00000010, Width: 8b; [0x010-0x010] Device Mode Configure enable flag, 1 - Enable, 0 -
# Disable
deviceModeCfgEnable: '0x00'
# ---------------------------------------===== deviceModeType [Optional] =====----------------------------------------
# Description: Offset: 0x00000011, Width: 8b; [0x011-0x011] Specify the configuration command type:Quad Enable,
# DPI/QPI/OPI switch, Generic configuration, etc.
deviceModeType: '0x00'
# -------------------------------------===== waitTimeCfgCommands [Optional] =====-------------------------------------
# Description: Offset: 0x00000012, Width: 16b; [0x012-0x013] Wait time for all configuration commands, unit: 100us,
# Used for DPI/QPI/OPI switch or reset command
waitTimeCfgCommands: '0x0000'
# ----------------------------------------===== deviceModeSeq [Optional] =====----------------------------------------
# Description: Offset: 0x00000014, Width: 32b; [0x014-0x017] Device mode sequence info, [7:0] - LUT sequence id,
# [15:8] - LUt sequence number, [31:16] Reserved
deviceModeSeq:
# ------------------------------------------===== seqNum [Optional] =====-------------------------------------------
# Description: Offset: 0b, Width: 8b, Sequence Number, valid number: 1-16
seqNum: 0
# -------------------------------------------===== seqId [Optional] =====-------------------------------------------
# Description: Offset: 8b, Width: 8b, Sequence Index, valid number: 0-15
seqId: 0
# -----------------------------------------===== reserved [Optional] =====------------------------------------------
# Description: Offset: 16b, Width: 16b, N/A
reserved: 0
# ----------------------------------------===== deviceModeArg [Optional] =====----------------------------------------
# Description: Offset: 0x00000018, Width: 32b; [0x018-0x01b] Argument/Parameter for device configuration
deviceModeArg: '0x00000000'
# ---------------------------------------===== configCmdEnable [Optional] =====---------------------------------------
# Description: Offset: 0x0000001C, Width: 8b; [0x01c-0x01c] Configure command Enable Flag, 1 - Enable, 0 - Disable
configCmdEnable: '0x00'
# --------------------------------------===== configModeType_0 [Optional] =====---------------------------------------
# Description: Offset: 0x0000001D, Width: 8b; [0x01d-0x01f] Configure Mode Type, similar as deviceModeTpe
configModeType_0: '0x00'
# --------------------------------------===== configModeType_1 [Optional] =====---------------------------------------
# Description: Offset: 0x0000001E, Width: 8b; [0x01d-0x01f] Configure Mode Type, similar as deviceModeTpe
configModeType_1: '0x00'
# --------------------------------------===== configModeType_2 [Optional] =====---------------------------------------
# Description: Offset: 0x0000001F, Width: 8b; [0x01d-0x01f] Configure Mode Type, similar as deviceModeTpe
configModeType_2: '0x00'
# ---------------------------------------===== configCmdSeqs_0 [Optional] =====---------------------------------------
# Description: Offset: 0x00000020, Width: 32b; [0x020-0x02b] Sequence info for Device Configuration command, similar
# as deviceModeSeq
configCmdSeqs_0:
# ------------------------------------------===== seqNum [Optional] =====-------------------------------------------
# Description: Offset: 0b, Width: 8b, Sequence Number, valid number: 1-16
seqNum: 0
# -------------------------------------------===== seqId [Optional] =====-------------------------------------------
# Description: Offset: 8b, Width: 8b, Sequence Index, valid number: 0-15
seqId: 0
# -----------------------------------------===== reserved [Optional] =====------------------------------------------
# Description: Offset: 16b, Width: 16b, N/A
reserved: 0
# ---------------------------------------===== configCmdSeqs_1 [Optional] =====---------------------------------------
# Description: Offset: 0x00000024, Width: 32b; [0x020-0x02b] Sequence info for Device Configuration command, similar
# as deviceModeSeq
configCmdSeqs_1:
# ------------------------------------------===== seqNum [Optional] =====-------------------------------------------
# Description: Offset: 0b, Width: 8b, Sequence Number, valid number: 1-16
seqNum: 0
# -------------------------------------------===== seqId [Optional] =====-------------------------------------------
# Description: Offset: 8b, Width: 8b, Sequence Index, valid number: 0-15
seqId: 0
# -----------------------------------------===== reserved [Optional] =====------------------------------------------
# Description: Offset: 16b, Width: 16b, N/A
reserved: 0
# ---------------------------------------===== configCmdSeqs_2 [Optional] =====---------------------------------------
# Description: Offset: 0x00000028, Width: 32b; [0x020-0x02b] Sequence info for Device Configuration command, similar
# as deviceModeSeq
configCmdSeqs_2:
# ------------------------------------------===== seqNum [Optional] =====-------------------------------------------
# Description: Offset: 0b, Width: 8b, Sequence Number, valid number: 1-16
seqNum: 0
# -------------------------------------------===== seqId [Optional] =====-------------------------------------------
# Description: Offset: 8b, Width: 8b, Sequence Index, valid number: 0-15
seqId: 0
# -----------------------------------------===== reserved [Optional] =====------------------------------------------
# Description: Offset: 16b, Width: 16b, N/A
reserved: 0
# ------------------------------------------===== reserved1 [Optional] =====------------------------------------------
# Description: Offset: 0x0000002C, Width: 32b; [0x02c-0x02f] Reserved for future use
reserved1: '0x00000000'
# ---------------------------------------===== configCmdArgs_0 [Optional] =====---------------------------------------
# Description: Offset: 0x00000030, Width: 32b; [0x030-0x03b] Arguments/Parameters for device Configuration commands
configCmdArgs_0: '0x00000000'
# ---------------------------------------===== configCmdArgs_1 [Optional] =====---------------------------------------
# Description: Offset: 0x00000034, Width: 32b; [0x030-0x03b] Arguments/Parameters for device Configuration commands
configCmdArgs_1: '0x00000000'
# ---------------------------------------===== configCmdArgs_2 [Optional] =====---------------------------------------
# Description: Offset: 0x00000038, Width: 32b; [0x030-0x03b] Arguments/Parameters for device Configuration commands
configCmdArgs_2: '0x00000000'
# ------------------------------------------===== reserved2 [Optional] =====------------------------------------------
# Description: Offset: 0x0000003C, Width: 32b; [0x03c-0x03f] Reserved for future use
reserved2: '0x00000000'
# ------------------------------------===== controllerMiscOption [Optional] =====-------------------------------------
# Description: Offset: 0x00000040, Width: 32b; [0x040-0x043] Controller Misc Options, see Misc feature bit
# definitions for more details
controllerMiscOption: '0x00000000'
# -----------------------------------------===== deviceType [Optional] =====------------------------------------------
# Description: Offset: 0x00000044, Width: 8b; [0x044-0x044] Device Type: See Flash Type Definition for more details
deviceType: '0x00'
# ----------------------------------------===== sflashPadType [Optional] =====----------------------------------------
# Description: Offset: 0x00000045, Width: 8b; [0x045-0x045] Serial Flash Pad Type: 1 - Single, 2 - Dual, 4 - Quad, 8
# - Octal
sflashPadType: '0x00'
# ----------------------------------------===== serialClkFreq [Optional] =====----------------------------------------
# Description: Offset: 0x00000046, Width: 8b; [0x046-0x046] Serial Flash Frequency, device specific definitions, See
# System Boot Chapter for more details
serialClkFreq: '0x00'
# -------------------------------------===== lutCustomSeqEnable [Optional] =====--------------------------------------
# Description: Offset: 0x00000047, Width: 8b; [0x047-0x047] LUT customization Enable, it is required if the
# program/erase cannot be done using 1 LUT sequence, currently, only applicable to HyperFLASH
lutCustomSeqEnable: '0x00'
# -----------------------------------------===== reserved3_0 [Optional] =====-----------------------------------------
# Description: Offset: 0x00000048, Width: 32b; [0x048-0x04f] Reserved for future use
reserved3_0: '0x00000000'
# -----------------------------------------===== reserved3_1 [Optional] =====-----------------------------------------
# Description: Offset: 0x0000004C, Width: 32b; [0x048-0x04f] Reserved for future use
reserved3_1: '0x00000000'
# ----------------------------------------===== sflashA1Size [Optional] =====-----------------------------------------
# Description: Offset: 0x00000050, Width: 32b; [0x050-0x053] Size of Flash connected to A1
sflashA1Size: '0x00000000'
# ----------------------------------------===== sflashA2Size [Optional] =====-----------------------------------------
# Description: Offset: 0x00000054, Width: 32b; [0x054-0x057] Size of Flash connected to A2
sflashA2Size: '0x00000000'
# ----------------------------------------===== sflashB1Size [Optional] =====-----------------------------------------
# Description: Offset: 0x00000058, Width: 32b; [0x058-0x05b] Size of Flash connected to B1
sflashB1Size: '0x00000000'
# ----------------------------------------===== sflashB2Size [Optional] =====-----------------------------------------
# Description: Offset: 0x0000005C, Width: 32b; [0x05c-0x05f] Size of Flash connected to B2
sflashB2Size: '0x00000000'
# ------------------------------------===== csPadSettingOverride [Optional] =====-------------------------------------
# Description: Offset: 0x00000060, Width: 32b; [0x060-0x063] CS pad setting override value
csPadSettingOverride: '0x00000000'
# -----------------------------------===== sclkPadSettingOverride [Optional] =====------------------------------------
# Description: Offset: 0x00000064, Width: 32b; [0x064-0x067] SCK pad setting override value
sclkPadSettingOverride: '0x00000000'
# -----------------------------------===== dataPadSettingOverride [Optional] =====------------------------------------
# Description: Offset: 0x00000068, Width: 32b; [0x068-0x06b] data pad setting override value
dataPadSettingOverride: '0x00000000'
# ------------------------------------===== dqsPadSettingOverride [Optional] =====------------------------------------
# Description: Offset: 0x0000006C, Width: 32b; [0x06c-0x06f] DQS pad setting override value
dqsPadSettingOverride: '0x00000000'
# -----------------------------------------===== timeoutInMs [Optional] =====-----------------------------------------
# Description: Offset: 0x00000070, Width: 32b; [0x070-0x073] Timeout threshold for read status command
timeoutInMs: '0x00000000'
# ---------------------------------------===== commandInterval [Optional] =====---------------------------------------
# Description: Offset: 0x00000074, Width: 32b; [0x074-0x077] CS deselect interval between two commands
commandInterval: '0x00000000'
# ---------------------------------------===== dataValidTime_0 [Optional] =====---------------------------------------
# Description: Offset: 0x00000078, Width: 16b; [0x078-0x07b] CLK edge to data valid time for PORT A and PORT B, in
# terms of 0.1ns
dataValidTime_0: '0x0000'
# ---------------------------------------===== dataValidTime_1 [Optional] =====---------------------------------------
# Description: Offset: 0x0000007A, Width: 16b; [0x078-0x07b] CLK edge to data valid time for PORT A and PORT B, in
# terms of 0.1ns
dataValidTime_1: '0x0000'
# -----------------------------------------===== busyOffset [Optional] =====------------------------------------------
# Description: Offset: 0x0000007C, Width: 16b; [0x07c-0x07d] Busy offset, valid value: 0-31
busyOffset: '0x0000'
# ---------------------------------------===== busyBitPolarity [Optional] =====---------------------------------------
# Description: Offset: 0x0000007E, Width: 16b; [0x07e-0x07f] Busy flag polarity, 0 - busy flag is 1 when flash device
# is busy, 1 - busy flag is 0 when flash device is busy
busyBitPolarity: '0x0000'
# -----------------------------------===== lookupTable_seq0_instr0 [Optional] =====-----------------------------------
# Description: Offset: 0x00000080, Width: 16b; Lookup table holds Flash command sequences 0, instruction 0
lookupTable_seq0_instr0:
# ------------------------------------------===== OPERAND [Optional] =====------------------------------------------
# Description: Offset: 0b, Width: 8b, Instruction operand. Its values depends on used instruction
OPERAND: 0
# -----------------------------------------===== NUM_PADS [Optional] =====------------------------------------------
# Description: Offset: 8b, Width: 2b, Number of pads used by instruction. Some instructions ignores this parameter.
# - 1PAD, (0): Single mode. One pad is used.
# - 2PAD, (1): Dual mode. Two pads are used.
# - 4PAD, (2): Quad mode. Four pads are used.
# - 8PAD, (3): Octal mode. Eight pads are used.
# Possible options: <1PAD, 2PAD, 4PAD, 8PAD>
NUM_PADS: 1PAD
# --------------------------------------===== OPERATION_CODE [Optional] =====---------------------------------------
# Description: Offset: 10b, Width: 6b, Instruction operation code.
# - STOP, (0): Stop execution and de-assert CS. Then, the next command sequence (to the same flash device) starts
# from instruction pointer 0.
# - CMD_SDR, (1): Transmit command code to Flash.
# - RADDR_SDR, (2): Transmit row address to Flash.
# - CADDR_SDR, (3): Transmit column address to Flash.
# - MODE1_SDR, (4): Transmit mode bits to Flash.
# - MODE2_SDR, (5): Transmit mode bits to Flash.
# - MODE4_SDR, (6): Transmit mode bits to Flash.
# - MODE8_SDR, (7): Transmit mode bits to Flash.
# - WRITE_SDR, (8): Transmit program data to Flash device.
# - READ_SDR, (9): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_SDR, (10): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_SDR, (11): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_SDR, (12): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_SDR, (13): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# - JMP_ON_CS, (31): Stop execution, de-assert CS and save operand[7:0] as the instruction start pointer for next
# sequence.Normally this instruction is used to support Execute-In-Place enhanced mode. See XIP enhanced mode for
# more details.This instruction is only allowed for AHB read commands. There is interrupt status bit set
# (INTR[IPCMDERR] or INTR[AHBCMDERR]) when using this instruction in IP command or AHB write command.
# - CMD_DDR, (33): Transmit command code to Flash.
# - RADDR_DDR, (34): Transmit row address to Flash.
# - CADDR_DDR, (35): Transmit column address to Flash.
# - MODE1_DDR, (36): Transmit mode bits to Flash.
# - MODE2_DDR, (37): Transmit mode bits to Flash.
# - MODE4_DDR, (38): Transmit mode bits to Flash.
# - MODE8_DDR, (39): Transmit mode bits to Flash.
# - WRITE_DDR, (40): Transmit program data to Flash device.
# - READ_DDR, (41): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_DDR, (42): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_DDR, (43): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_DDR, (44): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_DDR, (45): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# Possible options: <STOP, CMD_SDR, RADDR_SDR, CADDR_SDR, MODE1_SDR, MODE2_SDR, MODE4_SDR, MODE8_SDR, WRITE_SDR,
# READ_SDR, LEARN_SDR, DATSZ_SDR, DUMMY_SDR, DUMMY_RWDS_SDR, JMP_ON_CS, CMD_DDR, RADDR_DDR, CADDR_DDR, MODE1_DDR,
# MODE2_DDR, MODE4_DDR, MODE8_DDR, WRITE_DDR, READ_DDR, LEARN_DDR, DATSZ_DDR, DUMMY_DDR, DUMMY_RWDS_DDR>
OPERATION_CODE: STOP
lookupTable_seq0_instr1:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq0_instr2:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq0_instr3:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq0_instr4:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq0_instr5:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq0_instr6:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq0_instr7:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
# -----------------------------------===== lookupTable_seq1_instr0 [Optional] =====-----------------------------------
# Description: Offset: 0x00000090, Width: 16b; Lookup table holds Flash command sequences 1, instruction 0
lookupTable_seq1_instr0:
# ------------------------------------------===== OPERAND [Optional] =====------------------------------------------
# Description: Offset: 0b, Width: 8b, Instruction operand. Its values depends on used instruction
OPERAND: 0
# -----------------------------------------===== NUM_PADS [Optional] =====------------------------------------------
# Description: Offset: 8b, Width: 2b, Number of pads used by instruction. Some instructions ignores this parameter.
# - 1PAD, (0): Single mode. One pad is used.
# - 2PAD, (1): Dual mode. Two pads are used.
# - 4PAD, (2): Quad mode. Four pads are used.
# - 8PAD, (3): Octal mode. Eight pads are used.
# Possible options: <1PAD, 2PAD, 4PAD, 8PAD>
NUM_PADS: 1PAD
# --------------------------------------===== OPERATION_CODE [Optional] =====---------------------------------------
# Description: Offset: 10b, Width: 6b, Instruction operation code.
# - STOP, (0): Stop execution and de-assert CS. Then, the next command sequence (to the same flash device) starts
# from instruction pointer 0.
# - CMD_SDR, (1): Transmit command code to Flash.
# - RADDR_SDR, (2): Transmit row address to Flash.
# - CADDR_SDR, (3): Transmit column address to Flash.
# - MODE1_SDR, (4): Transmit mode bits to Flash.
# - MODE2_SDR, (5): Transmit mode bits to Flash.
# - MODE4_SDR, (6): Transmit mode bits to Flash.
# - MODE8_SDR, (7): Transmit mode bits to Flash.
# - WRITE_SDR, (8): Transmit program data to Flash device.
# - READ_SDR, (9): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_SDR, (10): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_SDR, (11): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_SDR, (12): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_SDR, (13): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# - JMP_ON_CS, (31): Stop execution, de-assert CS and save operand[7:0] as the instruction start pointer for next
# sequence.Normally this instruction is used to support Execute-In-Place enhanced mode. See XIP enhanced mode for
# more details.This instruction is only allowed for AHB read commands. There is interrupt status bit set
# (INTR[IPCMDERR] or INTR[AHBCMDERR]) when using this instruction in IP command or AHB write command.
# - CMD_DDR, (33): Transmit command code to Flash.
# - RADDR_DDR, (34): Transmit row address to Flash.
# - CADDR_DDR, (35): Transmit column address to Flash.
# - MODE1_DDR, (36): Transmit mode bits to Flash.
# - MODE2_DDR, (37): Transmit mode bits to Flash.
# - MODE4_DDR, (38): Transmit mode bits to Flash.
# - MODE8_DDR, (39): Transmit mode bits to Flash.
# - WRITE_DDR, (40): Transmit program data to Flash device.
# - READ_DDR, (41): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_DDR, (42): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_DDR, (43): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_DDR, (44): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_DDR, (45): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# Possible options: <STOP, CMD_SDR, RADDR_SDR, CADDR_SDR, MODE1_SDR, MODE2_SDR, MODE4_SDR, MODE8_SDR, WRITE_SDR,
# READ_SDR, LEARN_SDR, DATSZ_SDR, DUMMY_SDR, DUMMY_RWDS_SDR, JMP_ON_CS, CMD_DDR, RADDR_DDR, CADDR_DDR, MODE1_DDR,
# MODE2_DDR, MODE4_DDR, MODE8_DDR, WRITE_DDR, READ_DDR, LEARN_DDR, DATSZ_DDR, DUMMY_DDR, DUMMY_RWDS_DDR>
OPERATION_CODE: STOP
lookupTable_seq1_instr1:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq1_instr2:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq1_instr3:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq1_instr4:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq1_instr5:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq1_instr6:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq1_instr7:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
# -----------------------------------===== lookupTable_seq2_instr0 [Optional] =====-----------------------------------
# Description: Offset: 0x000000A0, Width: 16b; Lookup table holds Flash command sequences 2, instruction 0
lookupTable_seq2_instr0:
# ------------------------------------------===== OPERAND [Optional] =====------------------------------------------
# Description: Offset: 0b, Width: 8b, Instruction operand. Its values depends on used instruction
OPERAND: 0
# -----------------------------------------===== NUM_PADS [Optional] =====------------------------------------------
# Description: Offset: 8b, Width: 2b, Number of pads used by instruction. Some instructions ignores this parameter.
# - 1PAD, (0): Single mode. One pad is used.
# - 2PAD, (1): Dual mode. Two pads are used.
# - 4PAD, (2): Quad mode. Four pads are used.
# - 8PAD, (3): Octal mode. Eight pads are used.
# Possible options: <1PAD, 2PAD, 4PAD, 8PAD>
NUM_PADS: 1PAD
# --------------------------------------===== OPERATION_CODE [Optional] =====---------------------------------------
# Description: Offset: 10b, Width: 6b, Instruction operation code.
# - STOP, (0): Stop execution and de-assert CS. Then, the next command sequence (to the same flash device) starts
# from instruction pointer 0.
# - CMD_SDR, (1): Transmit command code to Flash.
# - RADDR_SDR, (2): Transmit row address to Flash.
# - CADDR_SDR, (3): Transmit column address to Flash.
# - MODE1_SDR, (4): Transmit mode bits to Flash.
# - MODE2_SDR, (5): Transmit mode bits to Flash.
# - MODE4_SDR, (6): Transmit mode bits to Flash.
# - MODE8_SDR, (7): Transmit mode bits to Flash.
# - WRITE_SDR, (8): Transmit program data to Flash device.
# - READ_SDR, (9): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_SDR, (10): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_SDR, (11): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_SDR, (12): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_SDR, (13): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# - JMP_ON_CS, (31): Stop execution, de-assert CS and save operand[7:0] as the instruction start pointer for next
# sequence.Normally this instruction is used to support Execute-In-Place enhanced mode. See XIP enhanced mode for
# more details.This instruction is only allowed for AHB read commands. There is interrupt status bit set
# (INTR[IPCMDERR] or INTR[AHBCMDERR]) when using this instruction in IP command or AHB write command.
# - CMD_DDR, (33): Transmit command code to Flash.
# - RADDR_DDR, (34): Transmit row address to Flash.
# - CADDR_DDR, (35): Transmit column address to Flash.
# - MODE1_DDR, (36): Transmit mode bits to Flash.
# - MODE2_DDR, (37): Transmit mode bits to Flash.
# - MODE4_DDR, (38): Transmit mode bits to Flash.
# - MODE8_DDR, (39): Transmit mode bits to Flash.
# - WRITE_DDR, (40): Transmit program data to Flash device.
# - READ_DDR, (41): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_DDR, (42): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_DDR, (43): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_DDR, (44): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_DDR, (45): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# Possible options: <STOP, CMD_SDR, RADDR_SDR, CADDR_SDR, MODE1_SDR, MODE2_SDR, MODE4_SDR, MODE8_SDR, WRITE_SDR,
# READ_SDR, LEARN_SDR, DATSZ_SDR, DUMMY_SDR, DUMMY_RWDS_SDR, JMP_ON_CS, CMD_DDR, RADDR_DDR, CADDR_DDR, MODE1_DDR,
# MODE2_DDR, MODE4_DDR, MODE8_DDR, WRITE_DDR, READ_DDR, LEARN_DDR, DATSZ_DDR, DUMMY_DDR, DUMMY_RWDS_DDR>
OPERATION_CODE: STOP
lookupTable_seq2_instr1:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq2_instr2:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq2_instr3:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq2_instr4:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq2_instr5:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq2_instr6:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq2_instr7:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
# -----------------------------------===== lookupTable_seq3_instr0 [Optional] =====-----------------------------------
# Description: Offset: 0x000000B0, Width: 16b; Lookup table holds Flash command sequences 3, instruction 0
lookupTable_seq3_instr0:
# ------------------------------------------===== OPERAND [Optional] =====------------------------------------------
# Description: Offset: 0b, Width: 8b, Instruction operand. Its values depends on used instruction
OPERAND: 0
# -----------------------------------------===== NUM_PADS [Optional] =====------------------------------------------
# Description: Offset: 8b, Width: 2b, Number of pads used by instruction. Some instructions ignores this parameter.
# - 1PAD, (0): Single mode. One pad is used.
# - 2PAD, (1): Dual mode. Two pads are used.
# - 4PAD, (2): Quad mode. Four pads are used.
# - 8PAD, (3): Octal mode. Eight pads are used.
# Possible options: <1PAD, 2PAD, 4PAD, 8PAD>
NUM_PADS: 1PAD
# --------------------------------------===== OPERATION_CODE [Optional] =====---------------------------------------
# Description: Offset: 10b, Width: 6b, Instruction operation code.
# - STOP, (0): Stop execution and de-assert CS. Then, the next command sequence (to the same flash device) starts
# from instruction pointer 0.
# - CMD_SDR, (1): Transmit command code to Flash.
# - RADDR_SDR, (2): Transmit row address to Flash.
# - CADDR_SDR, (3): Transmit column address to Flash.
# - MODE1_SDR, (4): Transmit mode bits to Flash.
# - MODE2_SDR, (5): Transmit mode bits to Flash.
# - MODE4_SDR, (6): Transmit mode bits to Flash.
# - MODE8_SDR, (7): Transmit mode bits to Flash.
# - WRITE_SDR, (8): Transmit program data to Flash device.
# - READ_SDR, (9): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_SDR, (10): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_SDR, (11): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_SDR, (12): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_SDR, (13): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# - JMP_ON_CS, (31): Stop execution, de-assert CS and save operand[7:0] as the instruction start pointer for next
# sequence.Normally this instruction is used to support Execute-In-Place enhanced mode. See XIP enhanced mode for
# more details.This instruction is only allowed for AHB read commands. There is interrupt status bit set
# (INTR[IPCMDERR] or INTR[AHBCMDERR]) when using this instruction in IP command or AHB write command.
# - CMD_DDR, (33): Transmit command code to Flash.
# - RADDR_DDR, (34): Transmit row address to Flash.
# - CADDR_DDR, (35): Transmit column address to Flash.
# - MODE1_DDR, (36): Transmit mode bits to Flash.
# - MODE2_DDR, (37): Transmit mode bits to Flash.
# - MODE4_DDR, (38): Transmit mode bits to Flash.
# - MODE8_DDR, (39): Transmit mode bits to Flash.
# - WRITE_DDR, (40): Transmit program data to Flash device.
# - READ_DDR, (41): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_DDR, (42): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_DDR, (43): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_DDR, (44): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_DDR, (45): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# Possible options: <STOP, CMD_SDR, RADDR_SDR, CADDR_SDR, MODE1_SDR, MODE2_SDR, MODE4_SDR, MODE8_SDR, WRITE_SDR,
# READ_SDR, LEARN_SDR, DATSZ_SDR, DUMMY_SDR, DUMMY_RWDS_SDR, JMP_ON_CS, CMD_DDR, RADDR_DDR, CADDR_DDR, MODE1_DDR,
# MODE2_DDR, MODE4_DDR, MODE8_DDR, WRITE_DDR, READ_DDR, LEARN_DDR, DATSZ_DDR, DUMMY_DDR, DUMMY_RWDS_DDR>
OPERATION_CODE: STOP
lookupTable_seq3_instr1:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq3_instr2:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq3_instr3:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq3_instr4:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq3_instr5:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq3_instr6:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq3_instr7:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
# -----------------------------------===== lookupTable_seq4_instr0 [Optional] =====-----------------------------------
# Description: Offset: 0x000000C0, Width: 16b; Lookup table holds Flash command sequences 4, instruction 0
lookupTable_seq4_instr0:
# ------------------------------------------===== OPERAND [Optional] =====------------------------------------------
# Description: Offset: 0b, Width: 8b, Instruction operand. Its values depends on used instruction
OPERAND: 0
# -----------------------------------------===== NUM_PADS [Optional] =====------------------------------------------
# Description: Offset: 8b, Width: 2b, Number of pads used by instruction. Some instructions ignores this parameter.
# - 1PAD, (0): Single mode. One pad is used.
# - 2PAD, (1): Dual mode. Two pads are used.
# - 4PAD, (2): Quad mode. Four pads are used.
# - 8PAD, (3): Octal mode. Eight pads are used.
# Possible options: <1PAD, 2PAD, 4PAD, 8PAD>
NUM_PADS: 1PAD
# --------------------------------------===== OPERATION_CODE [Optional] =====---------------------------------------
# Description: Offset: 10b, Width: 6b, Instruction operation code.
# - STOP, (0): Stop execution and de-assert CS. Then, the next command sequence (to the same flash device) starts
# from instruction pointer 0.
# - CMD_SDR, (1): Transmit command code to Flash.
# - RADDR_SDR, (2): Transmit row address to Flash.
# - CADDR_SDR, (3): Transmit column address to Flash.
# - MODE1_SDR, (4): Transmit mode bits to Flash.
# - MODE2_SDR, (5): Transmit mode bits to Flash.
# - MODE4_SDR, (6): Transmit mode bits to Flash.
# - MODE8_SDR, (7): Transmit mode bits to Flash.
# - WRITE_SDR, (8): Transmit program data to Flash device.
# - READ_SDR, (9): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_SDR, (10): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_SDR, (11): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_SDR, (12): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_SDR, (13): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# - JMP_ON_CS, (31): Stop execution, de-assert CS and save operand[7:0] as the instruction start pointer for next
# sequence.Normally this instruction is used to support Execute-In-Place enhanced mode. See XIP enhanced mode for
# more details.This instruction is only allowed for AHB read commands. There is interrupt status bit set
# (INTR[IPCMDERR] or INTR[AHBCMDERR]) when using this instruction in IP command or AHB write command.
# - CMD_DDR, (33): Transmit command code to Flash.
# - RADDR_DDR, (34): Transmit row address to Flash.
# - CADDR_DDR, (35): Transmit column address to Flash.
# - MODE1_DDR, (36): Transmit mode bits to Flash.
# - MODE2_DDR, (37): Transmit mode bits to Flash.
# - MODE4_DDR, (38): Transmit mode bits to Flash.
# - MODE8_DDR, (39): Transmit mode bits to Flash.
# - WRITE_DDR, (40): Transmit program data to Flash device.
# - READ_DDR, (41): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_DDR, (42): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_DDR, (43): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_DDR, (44): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_DDR, (45): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# Possible options: <STOP, CMD_SDR, RADDR_SDR, CADDR_SDR, MODE1_SDR, MODE2_SDR, MODE4_SDR, MODE8_SDR, WRITE_SDR,
# READ_SDR, LEARN_SDR, DATSZ_SDR, DUMMY_SDR, DUMMY_RWDS_SDR, JMP_ON_CS, CMD_DDR, RADDR_DDR, CADDR_DDR, MODE1_DDR,
# MODE2_DDR, MODE4_DDR, MODE8_DDR, WRITE_DDR, READ_DDR, LEARN_DDR, DATSZ_DDR, DUMMY_DDR, DUMMY_RWDS_DDR>
OPERATION_CODE: STOP
lookupTable_seq4_instr1:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq4_instr2:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq4_instr3:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq4_instr4:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq4_instr5:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq4_instr6:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq4_instr7:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
# -----------------------------------===== lookupTable_seq5_instr0 [Optional] =====-----------------------------------
# Description: Offset: 0x000000D0, Width: 16b; Lookup table holds Flash command sequences 5, instruction 0
lookupTable_seq5_instr0:
# ------------------------------------------===== OPERAND [Optional] =====------------------------------------------
# Description: Offset: 0b, Width: 8b, Instruction operand. Its values depends on used instruction
OPERAND: 0
# -----------------------------------------===== NUM_PADS [Optional] =====------------------------------------------
# Description: Offset: 8b, Width: 2b, Number of pads used by instruction. Some instructions ignores this parameter.
# - 1PAD, (0): Single mode. One pad is used.
# - 2PAD, (1): Dual mode. Two pads are used.
# - 4PAD, (2): Quad mode. Four pads are used.
# - 8PAD, (3): Octal mode. Eight pads are used.
# Possible options: <1PAD, 2PAD, 4PAD, 8PAD>
NUM_PADS: 1PAD
# --------------------------------------===== OPERATION_CODE [Optional] =====---------------------------------------
# Description: Offset: 10b, Width: 6b, Instruction operation code.
# - STOP, (0): Stop execution and de-assert CS. Then, the next command sequence (to the same flash device) starts
# from instruction pointer 0.
# - CMD_SDR, (1): Transmit command code to Flash.
# - RADDR_SDR, (2): Transmit row address to Flash.
# - CADDR_SDR, (3): Transmit column address to Flash.
# - MODE1_SDR, (4): Transmit mode bits to Flash.
# - MODE2_SDR, (5): Transmit mode bits to Flash.
# - MODE4_SDR, (6): Transmit mode bits to Flash.
# - MODE8_SDR, (7): Transmit mode bits to Flash.
# - WRITE_SDR, (8): Transmit program data to Flash device.
# - READ_SDR, (9): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_SDR, (10): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_SDR, (11): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_SDR, (12): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_SDR, (13): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# - JMP_ON_CS, (31): Stop execution, de-assert CS and save operand[7:0] as the instruction start pointer for next
# sequence.Normally this instruction is used to support Execute-In-Place enhanced mode. See XIP enhanced mode for
# more details.This instruction is only allowed for AHB read commands. There is interrupt status bit set
# (INTR[IPCMDERR] or INTR[AHBCMDERR]) when using this instruction in IP command or AHB write command.
# - CMD_DDR, (33): Transmit command code to Flash.
# - RADDR_DDR, (34): Transmit row address to Flash.
# - CADDR_DDR, (35): Transmit column address to Flash.
# - MODE1_DDR, (36): Transmit mode bits to Flash.
# - MODE2_DDR, (37): Transmit mode bits to Flash.
# - MODE4_DDR, (38): Transmit mode bits to Flash.
# - MODE8_DDR, (39): Transmit mode bits to Flash.
# - WRITE_DDR, (40): Transmit program data to Flash device.
# - READ_DDR, (41): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_DDR, (42): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_DDR, (43): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_DDR, (44): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_DDR, (45): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# Possible options: <STOP, CMD_SDR, RADDR_SDR, CADDR_SDR, MODE1_SDR, MODE2_SDR, MODE4_SDR, MODE8_SDR, WRITE_SDR,
# READ_SDR, LEARN_SDR, DATSZ_SDR, DUMMY_SDR, DUMMY_RWDS_SDR, JMP_ON_CS, CMD_DDR, RADDR_DDR, CADDR_DDR, MODE1_DDR,
# MODE2_DDR, MODE4_DDR, MODE8_DDR, WRITE_DDR, READ_DDR, LEARN_DDR, DATSZ_DDR, DUMMY_DDR, DUMMY_RWDS_DDR>
OPERATION_CODE: STOP
lookupTable_seq5_instr1:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq5_instr2:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq5_instr3:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq5_instr4:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq5_instr5:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq5_instr6:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq5_instr7:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
# -----------------------------------===== lookupTable_seq6_instr0 [Optional] =====-----------------------------------
# Description: Offset: 0x000000E0, Width: 16b; Lookup table holds Flash command sequences 6, instruction 0
lookupTable_seq6_instr0:
# ------------------------------------------===== OPERAND [Optional] =====------------------------------------------
# Description: Offset: 0b, Width: 8b, Instruction operand. Its values depends on used instruction
OPERAND: 0
# -----------------------------------------===== NUM_PADS [Optional] =====------------------------------------------
# Description: Offset: 8b, Width: 2b, Number of pads used by instruction. Some instructions ignores this parameter.
# - 1PAD, (0): Single mode. One pad is used.
# - 2PAD, (1): Dual mode. Two pads are used.
# - 4PAD, (2): Quad mode. Four pads are used.
# - 8PAD, (3): Octal mode. Eight pads are used.
# Possible options: <1PAD, 2PAD, 4PAD, 8PAD>
NUM_PADS: 1PAD
# --------------------------------------===== OPERATION_CODE [Optional] =====---------------------------------------
# Description: Offset: 10b, Width: 6b, Instruction operation code.
# - STOP, (0): Stop execution and de-assert CS. Then, the next command sequence (to the same flash device) starts
# from instruction pointer 0.
# - CMD_SDR, (1): Transmit command code to Flash.
# - RADDR_SDR, (2): Transmit row address to Flash.
# - CADDR_SDR, (3): Transmit column address to Flash.
# - MODE1_SDR, (4): Transmit mode bits to Flash.
# - MODE2_SDR, (5): Transmit mode bits to Flash.
# - MODE4_SDR, (6): Transmit mode bits to Flash.
# - MODE8_SDR, (7): Transmit mode bits to Flash.
# - WRITE_SDR, (8): Transmit program data to Flash device.
# - READ_SDR, (9): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_SDR, (10): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_SDR, (11): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_SDR, (12): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_SDR, (13): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# - JMP_ON_CS, (31): Stop execution, de-assert CS and save operand[7:0] as the instruction start pointer for next
# sequence.Normally this instruction is used to support Execute-In-Place enhanced mode. See XIP enhanced mode for
# more details.This instruction is only allowed for AHB read commands. There is interrupt status bit set
# (INTR[IPCMDERR] or INTR[AHBCMDERR]) when using this instruction in IP command or AHB write command.
# - CMD_DDR, (33): Transmit command code to Flash.
# - RADDR_DDR, (34): Transmit row address to Flash.
# - CADDR_DDR, (35): Transmit column address to Flash.
# - MODE1_DDR, (36): Transmit mode bits to Flash.
# - MODE2_DDR, (37): Transmit mode bits to Flash.
# - MODE4_DDR, (38): Transmit mode bits to Flash.
# - MODE8_DDR, (39): Transmit mode bits to Flash.
# - WRITE_DDR, (40): Transmit program data to Flash device.
# - READ_DDR, (41): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_DDR, (42): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_DDR, (43): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_DDR, (44): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_DDR, (45): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# Possible options: <STOP, CMD_SDR, RADDR_SDR, CADDR_SDR, MODE1_SDR, MODE2_SDR, MODE4_SDR, MODE8_SDR, WRITE_SDR,
# READ_SDR, LEARN_SDR, DATSZ_SDR, DUMMY_SDR, DUMMY_RWDS_SDR, JMP_ON_CS, CMD_DDR, RADDR_DDR, CADDR_DDR, MODE1_DDR,
# MODE2_DDR, MODE4_DDR, MODE8_DDR, WRITE_DDR, READ_DDR, LEARN_DDR, DATSZ_DDR, DUMMY_DDR, DUMMY_RWDS_DDR>
OPERATION_CODE: STOP
lookupTable_seq6_instr1:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq6_instr2:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq6_instr3:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq6_instr4:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq6_instr5:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq6_instr6:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq6_instr7:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
# -----------------------------------===== lookupTable_seq7_instr0 [Optional] =====-----------------------------------
# Description: Offset: 0x000000F0, Width: 16b; Lookup table holds Flash command sequences 7, instruction 0
lookupTable_seq7_instr0:
# ------------------------------------------===== OPERAND [Optional] =====------------------------------------------
# Description: Offset: 0b, Width: 8b, Instruction operand. Its values depends on used instruction
OPERAND: 0
# -----------------------------------------===== NUM_PADS [Optional] =====------------------------------------------
# Description: Offset: 8b, Width: 2b, Number of pads used by instruction. Some instructions ignores this parameter.
# - 1PAD, (0): Single mode. One pad is used.
# - 2PAD, (1): Dual mode. Two pads are used.
# - 4PAD, (2): Quad mode. Four pads are used.
# - 8PAD, (3): Octal mode. Eight pads are used.
# Possible options: <1PAD, 2PAD, 4PAD, 8PAD>
NUM_PADS: 1PAD
# --------------------------------------===== OPERATION_CODE [Optional] =====---------------------------------------
# Description: Offset: 10b, Width: 6b, Instruction operation code.
# - STOP, (0): Stop execution and de-assert CS. Then, the next command sequence (to the same flash device) starts
# from instruction pointer 0.
# - CMD_SDR, (1): Transmit command code to Flash.
# - RADDR_SDR, (2): Transmit row address to Flash.
# - CADDR_SDR, (3): Transmit column address to Flash.
# - MODE1_SDR, (4): Transmit mode bits to Flash.
# - MODE2_SDR, (5): Transmit mode bits to Flash.
# - MODE4_SDR, (6): Transmit mode bits to Flash.
# - MODE8_SDR, (7): Transmit mode bits to Flash.
# - WRITE_SDR, (8): Transmit program data to Flash device.
# - READ_SDR, (9): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_SDR, (10): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_SDR, (11): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_SDR, (12): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_SDR, (13): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# - JMP_ON_CS, (31): Stop execution, de-assert CS and save operand[7:0] as the instruction start pointer for next
# sequence.Normally this instruction is used to support Execute-In-Place enhanced mode. See XIP enhanced mode for
# more details.This instruction is only allowed for AHB read commands. There is interrupt status bit set
# (INTR[IPCMDERR] or INTR[AHBCMDERR]) when using this instruction in IP command or AHB write command.
# - CMD_DDR, (33): Transmit command code to Flash.
# - RADDR_DDR, (34): Transmit row address to Flash.
# - CADDR_DDR, (35): Transmit column address to Flash.
# - MODE1_DDR, (36): Transmit mode bits to Flash.
# - MODE2_DDR, (37): Transmit mode bits to Flash.
# - MODE4_DDR, (38): Transmit mode bits to Flash.
# - MODE8_DDR, (39): Transmit mode bits to Flash.
# - WRITE_DDR, (40): Transmit program data to Flash device.
# - READ_DDR, (41): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_DDR, (42): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_DDR, (43): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_DDR, (44): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_DDR, (45): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# Possible options: <STOP, CMD_SDR, RADDR_SDR, CADDR_SDR, MODE1_SDR, MODE2_SDR, MODE4_SDR, MODE8_SDR, WRITE_SDR,
# READ_SDR, LEARN_SDR, DATSZ_SDR, DUMMY_SDR, DUMMY_RWDS_SDR, JMP_ON_CS, CMD_DDR, RADDR_DDR, CADDR_DDR, MODE1_DDR,
# MODE2_DDR, MODE4_DDR, MODE8_DDR, WRITE_DDR, READ_DDR, LEARN_DDR, DATSZ_DDR, DUMMY_DDR, DUMMY_RWDS_DDR>
OPERATION_CODE: STOP
lookupTable_seq7_instr1:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq7_instr2:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq7_instr3:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq7_instr4:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq7_instr5:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq7_instr6:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq7_instr7:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
# -----------------------------------===== lookupTable_seq8_instr0 [Optional] =====-----------------------------------
# Description: Offset: 0x00000100, Width: 16b; Lookup table holds Flash command sequences 8, instruction 0
lookupTable_seq8_instr0:
# ------------------------------------------===== OPERAND [Optional] =====------------------------------------------
# Description: Offset: 0b, Width: 8b, Instruction operand. Its values depends on used instruction
OPERAND: 0
# -----------------------------------------===== NUM_PADS [Optional] =====------------------------------------------
# Description: Offset: 8b, Width: 2b, Number of pads used by instruction. Some instructions ignores this parameter.
# - 1PAD, (0): Single mode. One pad is used.
# - 2PAD, (1): Dual mode. Two pads are used.
# - 4PAD, (2): Quad mode. Four pads are used.
# - 8PAD, (3): Octal mode. Eight pads are used.
# Possible options: <1PAD, 2PAD, 4PAD, 8PAD>
NUM_PADS: 1PAD
# --------------------------------------===== OPERATION_CODE [Optional] =====---------------------------------------
# Description: Offset: 10b, Width: 6b, Instruction operation code.
# - STOP, (0): Stop execution and de-assert CS. Then, the next command sequence (to the same flash device) starts
# from instruction pointer 0.
# - CMD_SDR, (1): Transmit command code to Flash.
# - RADDR_SDR, (2): Transmit row address to Flash.
# - CADDR_SDR, (3): Transmit column address to Flash.
# - MODE1_SDR, (4): Transmit mode bits to Flash.
# - MODE2_SDR, (5): Transmit mode bits to Flash.
# - MODE4_SDR, (6): Transmit mode bits to Flash.
# - MODE8_SDR, (7): Transmit mode bits to Flash.
# - WRITE_SDR, (8): Transmit program data to Flash device.
# - READ_SDR, (9): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_SDR, (10): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_SDR, (11): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_SDR, (12): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_SDR, (13): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# - JMP_ON_CS, (31): Stop execution, de-assert CS and save operand[7:0] as the instruction start pointer for next
# sequence.Normally this instruction is used to support Execute-In-Place enhanced mode. See XIP enhanced mode for
# more details.This instruction is only allowed for AHB read commands. There is interrupt status bit set
# (INTR[IPCMDERR] or INTR[AHBCMDERR]) when using this instruction in IP command or AHB write command.
# - CMD_DDR, (33): Transmit command code to Flash.
# - RADDR_DDR, (34): Transmit row address to Flash.
# - CADDR_DDR, (35): Transmit column address to Flash.
# - MODE1_DDR, (36): Transmit mode bits to Flash.
# - MODE2_DDR, (37): Transmit mode bits to Flash.
# - MODE4_DDR, (38): Transmit mode bits to Flash.
# - MODE8_DDR, (39): Transmit mode bits to Flash.
# - WRITE_DDR, (40): Transmit program data to Flash device.
# - READ_DDR, (41): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_DDR, (42): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_DDR, (43): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_DDR, (44): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_DDR, (45): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# Possible options: <STOP, CMD_SDR, RADDR_SDR, CADDR_SDR, MODE1_SDR, MODE2_SDR, MODE4_SDR, MODE8_SDR, WRITE_SDR,
# READ_SDR, LEARN_SDR, DATSZ_SDR, DUMMY_SDR, DUMMY_RWDS_SDR, JMP_ON_CS, CMD_DDR, RADDR_DDR, CADDR_DDR, MODE1_DDR,
# MODE2_DDR, MODE4_DDR, MODE8_DDR, WRITE_DDR, READ_DDR, LEARN_DDR, DATSZ_DDR, DUMMY_DDR, DUMMY_RWDS_DDR>
OPERATION_CODE: STOP
lookupTable_seq8_instr1:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq8_instr2:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq8_instr3:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq8_instr4:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq8_instr5:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq8_instr6:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq8_instr7:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
# -----------------------------------===== lookupTable_seq9_instr0 [Optional] =====-----------------------------------
# Description: Offset: 0x00000110, Width: 16b; Lookup table holds Flash command sequences 9, instruction 0
lookupTable_seq9_instr0:
# ------------------------------------------===== OPERAND [Optional] =====------------------------------------------
# Description: Offset: 0b, Width: 8b, Instruction operand. Its values depends on used instruction
OPERAND: 0
# -----------------------------------------===== NUM_PADS [Optional] =====------------------------------------------
# Description: Offset: 8b, Width: 2b, Number of pads used by instruction. Some instructions ignores this parameter.
# - 1PAD, (0): Single mode. One pad is used.
# - 2PAD, (1): Dual mode. Two pads are used.
# - 4PAD, (2): Quad mode. Four pads are used.
# - 8PAD, (3): Octal mode. Eight pads are used.
# Possible options: <1PAD, 2PAD, 4PAD, 8PAD>
NUM_PADS: 1PAD
# --------------------------------------===== OPERATION_CODE [Optional] =====---------------------------------------
# Description: Offset: 10b, Width: 6b, Instruction operation code.
# - STOP, (0): Stop execution and de-assert CS. Then, the next command sequence (to the same flash device) starts
# from instruction pointer 0.
# - CMD_SDR, (1): Transmit command code to Flash.
# - RADDR_SDR, (2): Transmit row address to Flash.
# - CADDR_SDR, (3): Transmit column address to Flash.
# - MODE1_SDR, (4): Transmit mode bits to Flash.
# - MODE2_SDR, (5): Transmit mode bits to Flash.
# - MODE4_SDR, (6): Transmit mode bits to Flash.
# - MODE8_SDR, (7): Transmit mode bits to Flash.
# - WRITE_SDR, (8): Transmit program data to Flash device.
# - READ_SDR, (9): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_SDR, (10): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_SDR, (11): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_SDR, (12): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_SDR, (13): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# - JMP_ON_CS, (31): Stop execution, de-assert CS and save operand[7:0] as the instruction start pointer for next
# sequence.Normally this instruction is used to support Execute-In-Place enhanced mode. See XIP enhanced mode for
# more details.This instruction is only allowed for AHB read commands. There is interrupt status bit set
# (INTR[IPCMDERR] or INTR[AHBCMDERR]) when using this instruction in IP command or AHB write command.
# - CMD_DDR, (33): Transmit command code to Flash.
# - RADDR_DDR, (34): Transmit row address to Flash.
# - CADDR_DDR, (35): Transmit column address to Flash.
# - MODE1_DDR, (36): Transmit mode bits to Flash.
# - MODE2_DDR, (37): Transmit mode bits to Flash.
# - MODE4_DDR, (38): Transmit mode bits to Flash.
# - MODE8_DDR, (39): Transmit mode bits to Flash.
# - WRITE_DDR, (40): Transmit program data to Flash device.
# - READ_DDR, (41): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_DDR, (42): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_DDR, (43): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_DDR, (44): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_DDR, (45): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# Possible options: <STOP, CMD_SDR, RADDR_SDR, CADDR_SDR, MODE1_SDR, MODE2_SDR, MODE4_SDR, MODE8_SDR, WRITE_SDR,
# READ_SDR, LEARN_SDR, DATSZ_SDR, DUMMY_SDR, DUMMY_RWDS_SDR, JMP_ON_CS, CMD_DDR, RADDR_DDR, CADDR_DDR, MODE1_DDR,
# MODE2_DDR, MODE4_DDR, MODE8_DDR, WRITE_DDR, READ_DDR, LEARN_DDR, DATSZ_DDR, DUMMY_DDR, DUMMY_RWDS_DDR>
OPERATION_CODE: STOP
lookupTable_seq9_instr1:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq9_instr2:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq9_instr3:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq9_instr4:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq9_instr5:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq9_instr6:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq9_instr7:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
# ----------------------------------===== lookupTable_seq10_instr0 [Optional] =====-----------------------------------
# Description: Offset: 0x00000120, Width: 16b; Lookup table holds Flash command sequences 10, instruction 0
lookupTable_seq10_instr0:
# ------------------------------------------===== OPERAND [Optional] =====------------------------------------------
# Description: Offset: 0b, Width: 8b, Instruction operand. Its values depends on used instruction
OPERAND: 0
# -----------------------------------------===== NUM_PADS [Optional] =====------------------------------------------
# Description: Offset: 8b, Width: 2b, Number of pads used by instruction. Some instructions ignores this parameter.
# - 1PAD, (0): Single mode. One pad is used.
# - 2PAD, (1): Dual mode. Two pads are used.
# - 4PAD, (2): Quad mode. Four pads are used.
# - 8PAD, (3): Octal mode. Eight pads are used.
# Possible options: <1PAD, 2PAD, 4PAD, 8PAD>
NUM_PADS: 1PAD
# --------------------------------------===== OPERATION_CODE [Optional] =====---------------------------------------
# Description: Offset: 10b, Width: 6b, Instruction operation code.
# - STOP, (0): Stop execution and de-assert CS. Then, the next command sequence (to the same flash device) starts
# from instruction pointer 0.
# - CMD_SDR, (1): Transmit command code to Flash.
# - RADDR_SDR, (2): Transmit row address to Flash.
# - CADDR_SDR, (3): Transmit column address to Flash.
# - MODE1_SDR, (4): Transmit mode bits to Flash.
# - MODE2_SDR, (5): Transmit mode bits to Flash.
# - MODE4_SDR, (6): Transmit mode bits to Flash.
# - MODE8_SDR, (7): Transmit mode bits to Flash.
# - WRITE_SDR, (8): Transmit program data to Flash device.
# - READ_SDR, (9): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_SDR, (10): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_SDR, (11): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_SDR, (12): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_SDR, (13): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# - JMP_ON_CS, (31): Stop execution, de-assert CS and save operand[7:0] as the instruction start pointer for next
# sequence.Normally this instruction is used to support Execute-In-Place enhanced mode. See XIP enhanced mode for
# more details.This instruction is only allowed for AHB read commands. There is interrupt status bit set
# (INTR[IPCMDERR] or INTR[AHBCMDERR]) when using this instruction in IP command or AHB write command.
# - CMD_DDR, (33): Transmit command code to Flash.
# - RADDR_DDR, (34): Transmit row address to Flash.
# - CADDR_DDR, (35): Transmit column address to Flash.
# - MODE1_DDR, (36): Transmit mode bits to Flash.
# - MODE2_DDR, (37): Transmit mode bits to Flash.
# - MODE4_DDR, (38): Transmit mode bits to Flash.
# - MODE8_DDR, (39): Transmit mode bits to Flash.
# - WRITE_DDR, (40): Transmit program data to Flash device.
# - READ_DDR, (41): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_DDR, (42): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_DDR, (43): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_DDR, (44): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_DDR, (45): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# Possible options: <STOP, CMD_SDR, RADDR_SDR, CADDR_SDR, MODE1_SDR, MODE2_SDR, MODE4_SDR, MODE8_SDR, WRITE_SDR,
# READ_SDR, LEARN_SDR, DATSZ_SDR, DUMMY_SDR, DUMMY_RWDS_SDR, JMP_ON_CS, CMD_DDR, RADDR_DDR, CADDR_DDR, MODE1_DDR,
# MODE2_DDR, MODE4_DDR, MODE8_DDR, WRITE_DDR, READ_DDR, LEARN_DDR, DATSZ_DDR, DUMMY_DDR, DUMMY_RWDS_DDR>
OPERATION_CODE: STOP
lookupTable_seq10_instr1:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq10_instr2:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq10_instr3:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq10_instr4:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq10_instr5:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq10_instr6:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq10_instr7:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
# ----------------------------------===== lookupTable_seq11_instr0 [Optional] =====-----------------------------------
# Description: Offset: 0x00000130, Width: 16b; Lookup table holds Flash command sequences 11, instruction 0
lookupTable_seq11_instr0:
# ------------------------------------------===== OPERAND [Optional] =====------------------------------------------
# Description: Offset: 0b, Width: 8b, Instruction operand. Its values depends on used instruction
OPERAND: 0
# -----------------------------------------===== NUM_PADS [Optional] =====------------------------------------------
# Description: Offset: 8b, Width: 2b, Number of pads used by instruction. Some instructions ignores this parameter.
# - 1PAD, (0): Single mode. One pad is used.
# - 2PAD, (1): Dual mode. Two pads are used.
# - 4PAD, (2): Quad mode. Four pads are used.
# - 8PAD, (3): Octal mode. Eight pads are used.
# Possible options: <1PAD, 2PAD, 4PAD, 8PAD>
NUM_PADS: 1PAD
# --------------------------------------===== OPERATION_CODE [Optional] =====---------------------------------------
# Description: Offset: 10b, Width: 6b, Instruction operation code.
# - STOP, (0): Stop execution and de-assert CS. Then, the next command sequence (to the same flash device) starts
# from instruction pointer 0.
# - CMD_SDR, (1): Transmit command code to Flash.
# - RADDR_SDR, (2): Transmit row address to Flash.
# - CADDR_SDR, (3): Transmit column address to Flash.
# - MODE1_SDR, (4): Transmit mode bits to Flash.
# - MODE2_SDR, (5): Transmit mode bits to Flash.
# - MODE4_SDR, (6): Transmit mode bits to Flash.
# - MODE8_SDR, (7): Transmit mode bits to Flash.
# - WRITE_SDR, (8): Transmit program data to Flash device.
# - READ_SDR, (9): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_SDR, (10): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_SDR, (11): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_SDR, (12): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_SDR, (13): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# - JMP_ON_CS, (31): Stop execution, de-assert CS and save operand[7:0] as the instruction start pointer for next
# sequence.Normally this instruction is used to support Execute-In-Place enhanced mode. See XIP enhanced mode for
# more details.This instruction is only allowed for AHB read commands. There is interrupt status bit set
# (INTR[IPCMDERR] or INTR[AHBCMDERR]) when using this instruction in IP command or AHB write command.
# - CMD_DDR, (33): Transmit command code to Flash.
# - RADDR_DDR, (34): Transmit row address to Flash.
# - CADDR_DDR, (35): Transmit column address to Flash.
# - MODE1_DDR, (36): Transmit mode bits to Flash.
# - MODE2_DDR, (37): Transmit mode bits to Flash.
# - MODE4_DDR, (38): Transmit mode bits to Flash.
# - MODE8_DDR, (39): Transmit mode bits to Flash.
# - WRITE_DDR, (40): Transmit program data to Flash device.
# - READ_DDR, (41): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_DDR, (42): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_DDR, (43): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_DDR, (44): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_DDR, (45): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# Possible options: <STOP, CMD_SDR, RADDR_SDR, CADDR_SDR, MODE1_SDR, MODE2_SDR, MODE4_SDR, MODE8_SDR, WRITE_SDR,
# READ_SDR, LEARN_SDR, DATSZ_SDR, DUMMY_SDR, DUMMY_RWDS_SDR, JMP_ON_CS, CMD_DDR, RADDR_DDR, CADDR_DDR, MODE1_DDR,
# MODE2_DDR, MODE4_DDR, MODE8_DDR, WRITE_DDR, READ_DDR, LEARN_DDR, DATSZ_DDR, DUMMY_DDR, DUMMY_RWDS_DDR>
OPERATION_CODE: STOP
lookupTable_seq11_instr1:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq11_instr2:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq11_instr3:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq11_instr4:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq11_instr5:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq11_instr6:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq11_instr7:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
# ----------------------------------===== lookupTable_seq12_instr0 [Optional] =====-----------------------------------
# Description: Offset: 0x00000140, Width: 16b; Lookup table holds Flash command sequences 12, instruction 0
lookupTable_seq12_instr0:
# ------------------------------------------===== OPERAND [Optional] =====------------------------------------------
# Description: Offset: 0b, Width: 8b, Instruction operand. Its values depends on used instruction
OPERAND: 0
# -----------------------------------------===== NUM_PADS [Optional] =====------------------------------------------
# Description: Offset: 8b, Width: 2b, Number of pads used by instruction. Some instructions ignores this parameter.
# - 1PAD, (0): Single mode. One pad is used.
# - 2PAD, (1): Dual mode. Two pads are used.
# - 4PAD, (2): Quad mode. Four pads are used.
# - 8PAD, (3): Octal mode. Eight pads are used.
# Possible options: <1PAD, 2PAD, 4PAD, 8PAD>
NUM_PADS: 1PAD
# --------------------------------------===== OPERATION_CODE [Optional] =====---------------------------------------
# Description: Offset: 10b, Width: 6b, Instruction operation code.
# - STOP, (0): Stop execution and de-assert CS. Then, the next command sequence (to the same flash device) starts
# from instruction pointer 0.
# - CMD_SDR, (1): Transmit command code to Flash.
# - RADDR_SDR, (2): Transmit row address to Flash.
# - CADDR_SDR, (3): Transmit column address to Flash.
# - MODE1_SDR, (4): Transmit mode bits to Flash.
# - MODE2_SDR, (5): Transmit mode bits to Flash.
# - MODE4_SDR, (6): Transmit mode bits to Flash.
# - MODE8_SDR, (7): Transmit mode bits to Flash.
# - WRITE_SDR, (8): Transmit program data to Flash device.
# - READ_SDR, (9): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_SDR, (10): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_SDR, (11): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_SDR, (12): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_SDR, (13): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# - JMP_ON_CS, (31): Stop execution, de-assert CS and save operand[7:0] as the instruction start pointer for next
# sequence.Normally this instruction is used to support Execute-In-Place enhanced mode. See XIP enhanced mode for
# more details.This instruction is only allowed for AHB read commands. There is interrupt status bit set
# (INTR[IPCMDERR] or INTR[AHBCMDERR]) when using this instruction in IP command or AHB write command.
# - CMD_DDR, (33): Transmit command code to Flash.
# - RADDR_DDR, (34): Transmit row address to Flash.
# - CADDR_DDR, (35): Transmit column address to Flash.
# - MODE1_DDR, (36): Transmit mode bits to Flash.
# - MODE2_DDR, (37): Transmit mode bits to Flash.
# - MODE4_DDR, (38): Transmit mode bits to Flash.
# - MODE8_DDR, (39): Transmit mode bits to Flash.
# - WRITE_DDR, (40): Transmit program data to Flash device.
# - READ_DDR, (41): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_DDR, (42): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_DDR, (43): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_DDR, (44): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_DDR, (45): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# Possible options: <STOP, CMD_SDR, RADDR_SDR, CADDR_SDR, MODE1_SDR, MODE2_SDR, MODE4_SDR, MODE8_SDR, WRITE_SDR,
# READ_SDR, LEARN_SDR, DATSZ_SDR, DUMMY_SDR, DUMMY_RWDS_SDR, JMP_ON_CS, CMD_DDR, RADDR_DDR, CADDR_DDR, MODE1_DDR,
# MODE2_DDR, MODE4_DDR, MODE8_DDR, WRITE_DDR, READ_DDR, LEARN_DDR, DATSZ_DDR, DUMMY_DDR, DUMMY_RWDS_DDR>
OPERATION_CODE: STOP
lookupTable_seq12_instr1:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq12_instr2:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq12_instr3:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq12_instr4:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq12_instr5:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq12_instr6:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq12_instr7:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
# ----------------------------------===== lookupTable_seq13_instr0 [Optional] =====-----------------------------------
# Description: Offset: 0x00000150, Width: 16b; Lookup table holds Flash command sequences 13, instruction 0
lookupTable_seq13_instr0:
# ------------------------------------------===== OPERAND [Optional] =====------------------------------------------
# Description: Offset: 0b, Width: 8b, Instruction operand. Its values depends on used instruction
OPERAND: 0
# -----------------------------------------===== NUM_PADS [Optional] =====------------------------------------------
# Description: Offset: 8b, Width: 2b, Number of pads used by instruction. Some instructions ignores this parameter.
# - 1PAD, (0): Single mode. One pad is used.
# - 2PAD, (1): Dual mode. Two pads are used.
# - 4PAD, (2): Quad mode. Four pads are used.
# - 8PAD, (3): Octal mode. Eight pads are used.
# Possible options: <1PAD, 2PAD, 4PAD, 8PAD>
NUM_PADS: 1PAD
# --------------------------------------===== OPERATION_CODE [Optional] =====---------------------------------------
# Description: Offset: 10b, Width: 6b, Instruction operation code.
# - STOP, (0): Stop execution and de-assert CS. Then, the next command sequence (to the same flash device) starts
# from instruction pointer 0.
# - CMD_SDR, (1): Transmit command code to Flash.
# - RADDR_SDR, (2): Transmit row address to Flash.
# - CADDR_SDR, (3): Transmit column address to Flash.
# - MODE1_SDR, (4): Transmit mode bits to Flash.
# - MODE2_SDR, (5): Transmit mode bits to Flash.
# - MODE4_SDR, (6): Transmit mode bits to Flash.
# - MODE8_SDR, (7): Transmit mode bits to Flash.
# - WRITE_SDR, (8): Transmit program data to Flash device.
# - READ_SDR, (9): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_SDR, (10): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_SDR, (11): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_SDR, (12): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_SDR, (13): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# - JMP_ON_CS, (31): Stop execution, de-assert CS and save operand[7:0] as the instruction start pointer for next
# sequence.Normally this instruction is used to support Execute-In-Place enhanced mode. See XIP enhanced mode for
# more details.This instruction is only allowed for AHB read commands. There is interrupt status bit set
# (INTR[IPCMDERR] or INTR[AHBCMDERR]) when using this instruction in IP command or AHB write command.
# - CMD_DDR, (33): Transmit command code to Flash.
# - RADDR_DDR, (34): Transmit row address to Flash.
# - CADDR_DDR, (35): Transmit column address to Flash.
# - MODE1_DDR, (36): Transmit mode bits to Flash.
# - MODE2_DDR, (37): Transmit mode bits to Flash.
# - MODE4_DDR, (38): Transmit mode bits to Flash.
# - MODE8_DDR, (39): Transmit mode bits to Flash.
# - WRITE_DDR, (40): Transmit program data to Flash device.
# - READ_DDR, (41): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_DDR, (42): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_DDR, (43): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_DDR, (44): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_DDR, (45): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# Possible options: <STOP, CMD_SDR, RADDR_SDR, CADDR_SDR, MODE1_SDR, MODE2_SDR, MODE4_SDR, MODE8_SDR, WRITE_SDR,
# READ_SDR, LEARN_SDR, DATSZ_SDR, DUMMY_SDR, DUMMY_RWDS_SDR, JMP_ON_CS, CMD_DDR, RADDR_DDR, CADDR_DDR, MODE1_DDR,
# MODE2_DDR, MODE4_DDR, MODE8_DDR, WRITE_DDR, READ_DDR, LEARN_DDR, DATSZ_DDR, DUMMY_DDR, DUMMY_RWDS_DDR>
OPERATION_CODE: STOP
lookupTable_seq13_instr1:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq13_instr2:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq13_instr3:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq13_instr4:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq13_instr5:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq13_instr6:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq13_instr7:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
# ----------------------------------===== lookupTable_seq14_instr0 [Optional] =====-----------------------------------
# Description: Offset: 0x00000160, Width: 16b; Lookup table holds Flash command sequences 14, instruction 0
lookupTable_seq14_instr0:
# ------------------------------------------===== OPERAND [Optional] =====------------------------------------------
# Description: Offset: 0b, Width: 8b, Instruction operand. Its values depends on used instruction
OPERAND: 0
# -----------------------------------------===== NUM_PADS [Optional] =====------------------------------------------
# Description: Offset: 8b, Width: 2b, Number of pads used by instruction. Some instructions ignores this parameter.
# - 1PAD, (0): Single mode. One pad is used.
# - 2PAD, (1): Dual mode. Two pads are used.
# - 4PAD, (2): Quad mode. Four pads are used.
# - 8PAD, (3): Octal mode. Eight pads are used.
# Possible options: <1PAD, 2PAD, 4PAD, 8PAD>
NUM_PADS: 1PAD
# --------------------------------------===== OPERATION_CODE [Optional] =====---------------------------------------
# Description: Offset: 10b, Width: 6b, Instruction operation code.
# - STOP, (0): Stop execution and de-assert CS. Then, the next command sequence (to the same flash device) starts
# from instruction pointer 0.
# - CMD_SDR, (1): Transmit command code to Flash.
# - RADDR_SDR, (2): Transmit row address to Flash.
# - CADDR_SDR, (3): Transmit column address to Flash.
# - MODE1_SDR, (4): Transmit mode bits to Flash.
# - MODE2_SDR, (5): Transmit mode bits to Flash.
# - MODE4_SDR, (6): Transmit mode bits to Flash.
# - MODE8_SDR, (7): Transmit mode bits to Flash.
# - WRITE_SDR, (8): Transmit program data to Flash device.
# - READ_SDR, (9): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_SDR, (10): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_SDR, (11): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_SDR, (12): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_SDR, (13): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# - JMP_ON_CS, (31): Stop execution, de-assert CS and save operand[7:0] as the instruction start pointer for next
# sequence.Normally this instruction is used to support Execute-In-Place enhanced mode. See XIP enhanced mode for
# more details.This instruction is only allowed for AHB read commands. There is interrupt status bit set
# (INTR[IPCMDERR] or INTR[AHBCMDERR]) when using this instruction in IP command or AHB write command.
# - CMD_DDR, (33): Transmit command code to Flash.
# - RADDR_DDR, (34): Transmit row address to Flash.
# - CADDR_DDR, (35): Transmit column address to Flash.
# - MODE1_DDR, (36): Transmit mode bits to Flash.
# - MODE2_DDR, (37): Transmit mode bits to Flash.
# - MODE4_DDR, (38): Transmit mode bits to Flash.
# - MODE8_DDR, (39): Transmit mode bits to Flash.
# - WRITE_DDR, (40): Transmit program data to Flash device.
# - READ_DDR, (41): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_DDR, (42): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_DDR, (43): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_DDR, (44): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_DDR, (45): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# Possible options: <STOP, CMD_SDR, RADDR_SDR, CADDR_SDR, MODE1_SDR, MODE2_SDR, MODE4_SDR, MODE8_SDR, WRITE_SDR,
# READ_SDR, LEARN_SDR, DATSZ_SDR, DUMMY_SDR, DUMMY_RWDS_SDR, JMP_ON_CS, CMD_DDR, RADDR_DDR, CADDR_DDR, MODE1_DDR,
# MODE2_DDR, MODE4_DDR, MODE8_DDR, WRITE_DDR, READ_DDR, LEARN_DDR, DATSZ_DDR, DUMMY_DDR, DUMMY_RWDS_DDR>
OPERATION_CODE: STOP
lookupTable_seq14_instr1:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq14_instr2:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq14_instr3:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq14_instr4:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq14_instr5:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq14_instr6:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq14_instr7:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
# ----------------------------------===== lookupTable_seq15_instr0 [Optional] =====-----------------------------------
# Description: Offset: 0x00000170, Width: 16b; Lookup table holds Flash command sequences 15, instruction 0
lookupTable_seq15_instr0:
# ------------------------------------------===== OPERAND [Optional] =====------------------------------------------
# Description: Offset: 0b, Width: 8b, Instruction operand. Its values depends on used instruction
OPERAND: 0
# -----------------------------------------===== NUM_PADS [Optional] =====------------------------------------------
# Description: Offset: 8b, Width: 2b, Number of pads used by instruction. Some instructions ignores this parameter.
# - 1PAD, (0): Single mode. One pad is used.
# - 2PAD, (1): Dual mode. Two pads are used.
# - 4PAD, (2): Quad mode. Four pads are used.
# - 8PAD, (3): Octal mode. Eight pads are used.
# Possible options: <1PAD, 2PAD, 4PAD, 8PAD>
NUM_PADS: 1PAD
# --------------------------------------===== OPERATION_CODE [Optional] =====---------------------------------------
# Description: Offset: 10b, Width: 6b, Instruction operation code.
# - STOP, (0): Stop execution and de-assert CS. Then, the next command sequence (to the same flash device) starts
# from instruction pointer 0.
# - CMD_SDR, (1): Transmit command code to Flash.
# - RADDR_SDR, (2): Transmit row address to Flash.
# - CADDR_SDR, (3): Transmit column address to Flash.
# - MODE1_SDR, (4): Transmit mode bits to Flash.
# - MODE2_SDR, (5): Transmit mode bits to Flash.
# - MODE4_SDR, (6): Transmit mode bits to Flash.
# - MODE8_SDR, (7): Transmit mode bits to Flash.
# - WRITE_SDR, (8): Transmit program data to Flash device.
# - READ_SDR, (9): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_SDR, (10): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_SDR, (11): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_SDR, (12): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_SDR, (13): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# - JMP_ON_CS, (31): Stop execution, de-assert CS and save operand[7:0] as the instruction start pointer for next
# sequence.Normally this instruction is used to support Execute-In-Place enhanced mode. See XIP enhanced mode for
# more details.This instruction is only allowed for AHB read commands. There is interrupt status bit set
# (INTR[IPCMDERR] or INTR[AHBCMDERR]) when using this instruction in IP command or AHB write command.
# - CMD_DDR, (33): Transmit command code to Flash.
# - RADDR_DDR, (34): Transmit row address to Flash.
# - CADDR_DDR, (35): Transmit column address to Flash.
# - MODE1_DDR, (36): Transmit mode bits to Flash.
# - MODE2_DDR, (37): Transmit mode bits to Flash.
# - MODE4_DDR, (38): Transmit mode bits to Flash.
# - MODE8_DDR, (39): Transmit mode bits to Flash.
# - WRITE_DDR, (40): Transmit program data to Flash device.
# - READ_DDR, (41): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_DDR, (42): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_DDR, (43): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_DDR, (44): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_DDR, (45): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# Possible options: <STOP, CMD_SDR, RADDR_SDR, CADDR_SDR, MODE1_SDR, MODE2_SDR, MODE4_SDR, MODE8_SDR, WRITE_SDR,
# READ_SDR, LEARN_SDR, DATSZ_SDR, DUMMY_SDR, DUMMY_RWDS_SDR, JMP_ON_CS, CMD_DDR, RADDR_DDR, CADDR_DDR, MODE1_DDR,
# MODE2_DDR, MODE4_DDR, MODE8_DDR, WRITE_DDR, READ_DDR, LEARN_DDR, DATSZ_DDR, DUMMY_DDR, DUMMY_RWDS_DDR>
OPERATION_CODE: STOP
lookupTable_seq15_instr1:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq15_instr2:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq15_instr3:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq15_instr4:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq15_instr5:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq15_instr6:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq15_instr7:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
# ---------------------------------------===== lutCustomSeq_0 [Optional] =====----------------------------------------
# Description: Offset: 0x00000180, Width: 32b; [0x180-0x1af] Customizable LUT Sequences
lutCustomSeq_0:
# ------------------------------------------===== seqNum [Optional] =====-------------------------------------------
# Description: Offset: 0b, Width: 8b, Sequence Number, valid number: 1-16
seqNum: 0
# -------------------------------------------===== seqId [Optional] =====-------------------------------------------
# Description: Offset: 8b, Width: 8b, Sequence Index, valid number: 0-15
seqId: 0
# -----------------------------------------===== reserved [Optional] =====------------------------------------------
# Description: Offset: 16b, Width: 16b, N/A
reserved: 0
# ---------------------------------------===== lutCustomSeq_1 [Optional] =====----------------------------------------
# Description: Offset: 0x00000184, Width: 32b; [0x180-0x1af] Customizable LUT Sequences
lutCustomSeq_1:
# ------------------------------------------===== seqNum [Optional] =====-------------------------------------------
# Description: Offset: 0b, Width: 8b, Sequence Number, valid number: 1-16
seqNum: 0
# -------------------------------------------===== seqId [Optional] =====-------------------------------------------
# Description: Offset: 8b, Width: 8b, Sequence Index, valid number: 0-15
seqId: 0
# -----------------------------------------===== reserved [Optional] =====------------------------------------------
# Description: Offset: 16b, Width: 16b, N/A
reserved: 0
# ---------------------------------------===== lutCustomSeq_2 [Optional] =====----------------------------------------
# Description: Offset: 0x00000188, Width: 32b; [0x180-0x1af] Customizable LUT Sequences
lutCustomSeq_2:
# ------------------------------------------===== seqNum [Optional] =====-------------------------------------------
# Description: Offset: 0b, Width: 8b, Sequence Number, valid number: 1-16
seqNum: 0
# -------------------------------------------===== seqId [Optional] =====-------------------------------------------
# Description: Offset: 8b, Width: 8b, Sequence Index, valid number: 0-15
seqId: 0
# -----------------------------------------===== reserved [Optional] =====------------------------------------------
# Description: Offset: 16b, Width: 16b, N/A
reserved: 0
# ---------------------------------------===== lutCustomSeq_3 [Optional] =====----------------------------------------
# Description: Offset: 0x0000018C, Width: 32b; [0x180-0x1af] Customizable LUT Sequences
lutCustomSeq_3:
# ------------------------------------------===== seqNum [Optional] =====-------------------------------------------
# Description: Offset: 0b, Width: 8b, Sequence Number, valid number: 1-16
seqNum: 0
# -------------------------------------------===== seqId [Optional] =====-------------------------------------------
# Description: Offset: 8b, Width: 8b, Sequence Index, valid number: 0-15
seqId: 0
# -----------------------------------------===== reserved [Optional] =====------------------------------------------
# Description: Offset: 16b, Width: 16b, N/A
reserved: 0
# ---------------------------------------===== lutCustomSeq_4 [Optional] =====----------------------------------------
# Description: Offset: 0x00000190, Width: 32b; [0x180-0x1af] Customizable LUT Sequences
lutCustomSeq_4:
# ------------------------------------------===== seqNum [Optional] =====-------------------------------------------
# Description: Offset: 0b, Width: 8b, Sequence Number, valid number: 1-16
seqNum: 0
# -------------------------------------------===== seqId [Optional] =====-------------------------------------------
# Description: Offset: 8b, Width: 8b, Sequence Index, valid number: 0-15
seqId: 0
# -----------------------------------------===== reserved [Optional] =====------------------------------------------
# Description: Offset: 16b, Width: 16b, N/A
reserved: 0
# ---------------------------------------===== lutCustomSeq_5 [Optional] =====----------------------------------------
# Description: Offset: 0x00000194, Width: 32b; [0x180-0x1af] Customizable LUT Sequences
lutCustomSeq_5:
# ------------------------------------------===== seqNum [Optional] =====-------------------------------------------
# Description: Offset: 0b, Width: 8b, Sequence Number, valid number: 1-16
seqNum: 0
# -------------------------------------------===== seqId [Optional] =====-------------------------------------------
# Description: Offset: 8b, Width: 8b, Sequence Index, valid number: 0-15
seqId: 0
# -----------------------------------------===== reserved [Optional] =====------------------------------------------
# Description: Offset: 16b, Width: 16b, N/A
reserved: 0
# ---------------------------------------===== lutCustomSeq_6 [Optional] =====----------------------------------------
# Description: Offset: 0x00000198, Width: 32b; [0x180-0x1af] Customizable LUT Sequences
lutCustomSeq_6:
# ------------------------------------------===== seqNum [Optional] =====-------------------------------------------
# Description: Offset: 0b, Width: 8b, Sequence Number, valid number: 1-16
seqNum: 0
# -------------------------------------------===== seqId [Optional] =====-------------------------------------------
# Description: Offset: 8b, Width: 8b, Sequence Index, valid number: 0-15
seqId: 0
# -----------------------------------------===== reserved [Optional] =====------------------------------------------
# Description: Offset: 16b, Width: 16b, N/A
reserved: 0
# ---------------------------------------===== lutCustomSeq_7 [Optional] =====----------------------------------------
# Description: Offset: 0x0000019C, Width: 32b; [0x180-0x1af] Customizable LUT Sequences
lutCustomSeq_7:
# ------------------------------------------===== seqNum [Optional] =====-------------------------------------------
# Description: Offset: 0b, Width: 8b, Sequence Number, valid number: 1-16
seqNum: 0
# -------------------------------------------===== seqId [Optional] =====-------------------------------------------
# Description: Offset: 8b, Width: 8b, Sequence Index, valid number: 0-15
seqId: 0
# -----------------------------------------===== reserved [Optional] =====------------------------------------------
# Description: Offset: 16b, Width: 16b, N/A
reserved: 0
# ---------------------------------------===== lutCustomSeq_8 [Optional] =====----------------------------------------
# Description: Offset: 0x000001A0, Width: 32b; [0x180-0x1af] Customizable LUT Sequences
lutCustomSeq_8:
# ------------------------------------------===== seqNum [Optional] =====-------------------------------------------
# Description: Offset: 0b, Width: 8b, Sequence Number, valid number: 1-16
seqNum: 0
# -------------------------------------------===== seqId [Optional] =====-------------------------------------------
# Description: Offset: 8b, Width: 8b, Sequence Index, valid number: 0-15
seqId: 0
# -----------------------------------------===== reserved [Optional] =====------------------------------------------
# Description: Offset: 16b, Width: 16b, N/A
reserved: 0
# ---------------------------------------===== lutCustomSeq_9 [Optional] =====----------------------------------------
# Description: Offset: 0x000001A4, Width: 32b; [0x180-0x1af] Customizable LUT Sequences
lutCustomSeq_9:
# ------------------------------------------===== seqNum [Optional] =====-------------------------------------------
# Description: Offset: 0b, Width: 8b, Sequence Number, valid number: 1-16
seqNum: 0
# -------------------------------------------===== seqId [Optional] =====-------------------------------------------
# Description: Offset: 8b, Width: 8b, Sequence Index, valid number: 0-15
seqId: 0
# -----------------------------------------===== reserved [Optional] =====------------------------------------------
# Description: Offset: 16b, Width: 16b, N/A
reserved: 0
# ---------------------------------------===== lutCustomSeq_10 [Optional] =====---------------------------------------
# Description: Offset: 0x000001A8, Width: 32b; [0x180-0x1af] Customizable LUT Sequences
lutCustomSeq_10:
# ------------------------------------------===== seqNum [Optional] =====-------------------------------------------
# Description: Offset: 0b, Width: 8b, Sequence Number, valid number: 1-16
seqNum: 0
# -------------------------------------------===== seqId [Optional] =====-------------------------------------------
# Description: Offset: 8b, Width: 8b, Sequence Index, valid number: 0-15
seqId: 0
# -----------------------------------------===== reserved [Optional] =====------------------------------------------
# Description: Offset: 16b, Width: 16b, N/A
reserved: 0
# ---------------------------------------===== lutCustomSeq_11 [Optional] =====---------------------------------------
# Description: Offset: 0x000001AC, Width: 32b; [0x180-0x1af] Customizable LUT Sequences
lutCustomSeq_11:
# ------------------------------------------===== seqNum [Optional] =====-------------------------------------------
# Description: Offset: 0b, Width: 8b, Sequence Number, valid number: 1-16
seqNum: 0
# -------------------------------------------===== seqId [Optional] =====-------------------------------------------
# Description: Offset: 8b, Width: 8b, Sequence Index, valid number: 0-15
seqId: 0
# -----------------------------------------===== reserved [Optional] =====------------------------------------------
# Description: Offset: 16b, Width: 16b, N/A
reserved: 0
# -----------------------------------------===== reserved4_0 [Optional] =====-----------------------------------------
# Description: Offset: 0x000001B0, Width: 32b; [0x1b0-0x1bf] Reserved for future use
reserved4_0: '0x00000000'
# -----------------------------------------===== reserved4_1 [Optional] =====-----------------------------------------
# Description: Offset: 0x000001B4, Width: 32b; [0x1b0-0x1bf] Reserved for future use
reserved4_1: '0x00000000'
# -----------------------------------------===== reserved4_2 [Optional] =====-----------------------------------------
# Description: Offset: 0x000001B8, Width: 32b; [0x1b0-0x1bf] Reserved for future use
reserved4_2: '0x00000000'
# -----------------------------------------===== reserved4_3 [Optional] =====-----------------------------------------
# Description: Offset: 0x000001BC, Width: 32b; [0x1b0-0x1bf] Reserved for future use
reserved4_3: '0x00000000'
# ------------------------------------------===== pageSize [Optional] =====-------------------------------------------
# Description: Offset: 0x000001C0, Width: 32b; Page size of Serial NOR
pageSize: '0x00000000'
# -----------------------------------------===== sectorSize [Optional] =====------------------------------------------
# Description: Offset: 0x000001C4, Width: 32b; Sector size of Serial NOR
sectorSize: '0x00000000'
# -------------------------------------===== ipcmdSerialClkFreq [Optional] =====--------------------------------------
# Description: Offset: 0x000001C8, Width: 8b; Clock frequency for IP command
ipcmdSerialClkFreq: '0x00'
# -------------------------------------===== isUniformBlockSize [Optional] =====--------------------------------------
# Description: Offset: 0x000001C9, Width: 8b; Sector/Block size is the same
isUniformBlockSize: '0x00'
# -----------------------------------------===== reserved0_0 [Optional] =====-----------------------------------------
# Description: Offset: 0x000001CA, Width: 8b; Reserved for future use
reserved0_0: '0x00'
# -----------------------------------------===== reserved0_1 [Optional] =====-----------------------------------------
# Description: Offset: 0x000001CB, Width: 8b; Reserved for future use
reserved0_1: '0x00'
# ----------------------------------------===== serialNorType [Optional] =====----------------------------------------
# Description: Offset: 0x000001CC, Width: 8b; Serial NOR Flash type: 0/1/2/3
serialNorType: '0x00'
# --------------------------------------===== needExitNoCmdMode [Optional] =====--------------------------------------
# Description: Offset: 0x000001CD, Width: 8b; Need to exit NoCmd mode before other IP command
needExitNoCmdMode: '0x00'
# ------------------------------------===== halfClkForNonReadCmd [Optional] =====-------------------------------------
# Description: Offset: 0x000001CE, Width: 8b; Half the Serial Clock for non-read command: true/false
halfClkForNonReadCmd: '0x00'
# ------------------------------------===== needRestoreNoCmdMode [Optional] =====-------------------------------------
# Description: Offset: 0x000001CF, Width: 8b; Need to Restore NoCmd mode after IP command execution
needRestoreNoCmdMode: '0x00'
# ------------------------------------------===== blockSize [Optional] =====------------------------------------------
# Description: Offset: 0x000001D0, Width: 32b; Block size
blockSize: '0x00000000'
# -----------------------------------------===== reserve2_0 [Optional] =====------------------------------------------
# Description: Offset: 0x000001D4, Width: 32b; Reserved for future use
reserve2_0: '0x00000000'
# -----------------------------------------===== reserve2_1 [Optional] =====------------------------------------------
# Description: Offset: 0x000001D8, Width: 32b; Reserved for future use
reserve2_1: '0x00000000'
# -----------------------------------------===== reserve2_2 [Optional] =====------------------------------------------
# Description: Offset: 0x000001DC, Width: 32b; Reserved for future use
reserve2_2: '0x00000000'
# -----------------------------------------===== reserve2_3 [Optional] =====------------------------------------------
# Description: Offset: 0x000001E0, Width: 32b; Reserved for future use
reserve2_3: '0x00000000'
# -----------------------------------------===== reserve2_4 [Optional] =====------------------------------------------
# Description: Offset: 0x000001E4, Width: 32b; Reserved for future use
reserve2_4: '0x00000000'
# -----------------------------------------===== reserve2_5 [Optional] =====------------------------------------------
# Description: Offset: 0x000001E8, Width: 32b; Reserved for future use
reserve2_5: '0x00000000'
# -----------------------------------------===== reserve2_6 [Optional] =====------------------------------------------
# Description: Offset: 0x000001EC, Width: 32b; Reserved for future use
reserve2_6: '0x00000000'
# -----------------------------------------===== reserve2_7 [Optional] =====------------------------------------------
# Description: Offset: 0x000001F0, Width: 32b; Reserved for future use
reserve2_7: '0x00000000'
# -----------------------------------------===== reserve2_8 [Optional] =====------------------------------------------
# Description: Offset: 0x000001F4, Width: 32b; Reserved for future use
reserve2_8: '0x00000000'
# -----------------------------------------===== reserve2_9 [Optional] =====------------------------------------------
# Description: Offset: 0x000001F8, Width: 32b; Reserved for future use
reserve2_9: '0x00000000'
# -----------------------------------------===== reserve2_10 [Optional] =====-----------------------------------------
# Description: Offset: 0x000001FC, Width: 32b; Reserved for future use
reserve2_10: '0x00000000'
FCB for mimxrt1064, Revision: a0 and flexspi_nor#
FCB for mimxrt1064, Revision: a0 and flexspi_nor JSON schema
FCB for mimxrt1064, Revision: a0 and flexspi_nor YAML configuration template
# ================================= FCB for mimxrt1064, Revision: a0 and flexspi_nor =================================
# ======================================================================================================================
# == FCB for mimxrt1064, Revision: a0 and flexspi_nor ==
# ======================================================================================================================
# -------------------------------------===== The chip family name [Required] =====--------------------------------------
# Description: NXP chip family identifier.
family: CHOOSE_FROM_TABLE
# -----------------------------------------===== MCU revision [Optional] =====------------------------------------------
# Description: Revision of silicon. The 'latest' name, means most current revision.
# Possible options: <a0, latest>
revision: a0
# ------------------------------------------===== Memory type [Required] =====------------------------------------------
# Description: Specify type of memory used by FCB description.
# Possible options: <flexspi_nor>
type: flexspi_nor
# ------------------------------------------===== mimxrt1064 [Required] =====-------------------------------------------
fcb_settings:
# ---------------------------------------------===== tag [Optional] =====---------------------------------------------
# Description: Offset: 0x00000000, Width: 32b; [0x000-0x003] Tag, fixed value 0x42464346UL
tag: '0x42464346'
# -------------------------------------------===== version [Optional] =====-------------------------------------------
# Description: Offset: 0x00000004, Width: 32b; [0x004-0x007] Version,[31:24] -'V', [23:16] - Major, [15:8] - Minor,
# [7:0] - bugfix
version: '0x56010400'
# ------------------------------------------===== reserved0 [Optional] =====------------------------------------------
# Description: Offset: 0x00000008, Width: 32b; [0x008-0x00b] Reserved for future use
reserved0: '0x00000000'
# --------------------------------------===== readSampleClkSrc [Optional] =====---------------------------------------
# Description: Offset: 0x0000000C, Width: 8b; [0x00c-0x00c] Read Sample Clock Source, valid value: 0/1/3
readSampleClkSrc: '0x00'
# -----------------------------------------===== csHoldTime [Optional] =====------------------------------------------
# Description: Offset: 0x0000000D, Width: 8b; [0x00d-0x00d] CS hold time, default value: 3
csHoldTime: '0x00'
# -----------------------------------------===== csSetupTime [Optional] =====-----------------------------------------
# Description: Offset: 0x0000000E, Width: 8b; [0x00e-0x00e] CS setup time, default value: 3
csSetupTime: '0x00'
# -------------------------------------===== columnAddressWidth [Optional] =====--------------------------------------
# Description: Offset: 0x0000000F, Width: 8b; [0x00f-0x00f] Column Address with, for HyperBus protocol, it is fixed
# to 3, For Serial NAND, need to refer to datasheet
columnAddressWidth: '0x00'
# -------------------------------------===== deviceModeCfgEnable [Optional] =====-------------------------------------
# Description: Offset: 0x00000010, Width: 8b; [0x010-0x010] Device Mode Configure enable flag, 1 - Enable, 0 -
# Disable
deviceModeCfgEnable: '0x00'
# ---------------------------------------===== deviceModeType [Optional] =====----------------------------------------
# Description: Offset: 0x00000011, Width: 8b; [0x011-0x011] Specify the configuration command type:Quad Enable,
# DPI/QPI/OPI switch, Generic configuration, etc.
deviceModeType: '0x00'
# -------------------------------------===== waitTimeCfgCommands [Optional] =====-------------------------------------
# Description: Offset: 0x00000012, Width: 16b; [0x012-0x013] Wait time for all configuration commands, unit: 100us,
# Used for DPI/QPI/OPI switch or reset command
waitTimeCfgCommands: '0x0000'
# ----------------------------------------===== deviceModeSeq [Optional] =====----------------------------------------
# Description: Offset: 0x00000014, Width: 32b; [0x014-0x017] Device mode sequence info, [7:0] - LUT sequence id,
# [15:8] - LUt sequence number, [31:16] Reserved
deviceModeSeq:
# ------------------------------------------===== seqNum [Optional] =====-------------------------------------------
# Description: Offset: 0b, Width: 8b, Sequence Number, valid number: 1-16
seqNum: 0
# -------------------------------------------===== seqId [Optional] =====-------------------------------------------
# Description: Offset: 8b, Width: 8b, Sequence Index, valid number: 0-15
seqId: 0
# -----------------------------------------===== reserved [Optional] =====------------------------------------------
# Description: Offset: 16b, Width: 16b, N/A
reserved: 0
# ----------------------------------------===== deviceModeArg [Optional] =====----------------------------------------
# Description: Offset: 0x00000018, Width: 32b; [0x018-0x01b] Argument/Parameter for device configuration
deviceModeArg: '0x00000000'
# ---------------------------------------===== configCmdEnable [Optional] =====---------------------------------------
# Description: Offset: 0x0000001C, Width: 8b; [0x01c-0x01c] Configure command Enable Flag, 1 - Enable, 0 - Disable
configCmdEnable: '0x00'
# --------------------------------------===== configModeType_0 [Optional] =====---------------------------------------
# Description: Offset: 0x0000001D, Width: 8b; [0x01d-0x01f] Configure Mode Type, similar as deviceModeTpe
configModeType_0: '0x00'
# --------------------------------------===== configModeType_1 [Optional] =====---------------------------------------
# Description: Offset: 0x0000001E, Width: 8b; [0x01d-0x01f] Configure Mode Type, similar as deviceModeTpe
configModeType_1: '0x00'
# --------------------------------------===== configModeType_2 [Optional] =====---------------------------------------
# Description: Offset: 0x0000001F, Width: 8b; [0x01d-0x01f] Configure Mode Type, similar as deviceModeTpe
configModeType_2: '0x00'
# ---------------------------------------===== configCmdSeqs_0 [Optional] =====---------------------------------------
# Description: Offset: 0x00000020, Width: 32b; [0x020-0x02b] Sequence info for Device Configuration command, similar
# as deviceModeSeq
configCmdSeqs_0:
# ------------------------------------------===== seqNum [Optional] =====-------------------------------------------
# Description: Offset: 0b, Width: 8b, Sequence Number, valid number: 1-16
seqNum: 0
# -------------------------------------------===== seqId [Optional] =====-------------------------------------------
# Description: Offset: 8b, Width: 8b, Sequence Index, valid number: 0-15
seqId: 0
# -----------------------------------------===== reserved [Optional] =====------------------------------------------
# Description: Offset: 16b, Width: 16b, N/A
reserved: 0
# ---------------------------------------===== configCmdSeqs_1 [Optional] =====---------------------------------------
# Description: Offset: 0x00000024, Width: 32b; [0x020-0x02b] Sequence info for Device Configuration command, similar
# as deviceModeSeq
configCmdSeqs_1:
# ------------------------------------------===== seqNum [Optional] =====-------------------------------------------
# Description: Offset: 0b, Width: 8b, Sequence Number, valid number: 1-16
seqNum: 0
# -------------------------------------------===== seqId [Optional] =====-------------------------------------------
# Description: Offset: 8b, Width: 8b, Sequence Index, valid number: 0-15
seqId: 0
# -----------------------------------------===== reserved [Optional] =====------------------------------------------
# Description: Offset: 16b, Width: 16b, N/A
reserved: 0
# ---------------------------------------===== configCmdSeqs_2 [Optional] =====---------------------------------------
# Description: Offset: 0x00000028, Width: 32b; [0x020-0x02b] Sequence info for Device Configuration command, similar
# as deviceModeSeq
configCmdSeqs_2:
# ------------------------------------------===== seqNum [Optional] =====-------------------------------------------
# Description: Offset: 0b, Width: 8b, Sequence Number, valid number: 1-16
seqNum: 0
# -------------------------------------------===== seqId [Optional] =====-------------------------------------------
# Description: Offset: 8b, Width: 8b, Sequence Index, valid number: 0-15
seqId: 0
# -----------------------------------------===== reserved [Optional] =====------------------------------------------
# Description: Offset: 16b, Width: 16b, N/A
reserved: 0
# ------------------------------------------===== reserved1 [Optional] =====------------------------------------------
# Description: Offset: 0x0000002C, Width: 32b; [0x02c-0x02f] Reserved for future use
reserved1: '0x00000000'
# ---------------------------------------===== configCmdArgs_0 [Optional] =====---------------------------------------
# Description: Offset: 0x00000030, Width: 32b; [0x030-0x03b] Arguments/Parameters for device Configuration commands
configCmdArgs_0: '0x00000000'
# ---------------------------------------===== configCmdArgs_1 [Optional] =====---------------------------------------
# Description: Offset: 0x00000034, Width: 32b; [0x030-0x03b] Arguments/Parameters for device Configuration commands
configCmdArgs_1: '0x00000000'
# ---------------------------------------===== configCmdArgs_2 [Optional] =====---------------------------------------
# Description: Offset: 0x00000038, Width: 32b; [0x030-0x03b] Arguments/Parameters for device Configuration commands
configCmdArgs_2: '0x00000000'
# ------------------------------------------===== reserved2 [Optional] =====------------------------------------------
# Description: Offset: 0x0000003C, Width: 32b; [0x03c-0x03f] Reserved for future use
reserved2: '0x00000000'
# ------------------------------------===== controllerMiscOption [Optional] =====-------------------------------------
# Description: Offset: 0x00000040, Width: 32b; [0x040-0x043] Controller Misc Options, see Misc feature bit
# definitions for more details
controllerMiscOption: '0x00000000'
# -----------------------------------------===== deviceType [Optional] =====------------------------------------------
# Description: Offset: 0x00000044, Width: 8b; [0x044-0x044] Device Type: See Flash Type Definition for more details
deviceType: '0x00'
# ----------------------------------------===== sflashPadType [Optional] =====----------------------------------------
# Description: Offset: 0x00000045, Width: 8b; [0x045-0x045] Serial Flash Pad Type: 1 - Single, 2 - Dual, 4 - Quad, 8
# - Octal
sflashPadType: '0x00'
# ----------------------------------------===== serialClkFreq [Optional] =====----------------------------------------
# Description: Offset: 0x00000046, Width: 8b; [0x046-0x046] Serial Flash Frequency, device specific definitions, See
# System Boot Chapter for more details
serialClkFreq: '0x00'
# -------------------------------------===== lutCustomSeqEnable [Optional] =====--------------------------------------
# Description: Offset: 0x00000047, Width: 8b; [0x047-0x047] LUT customization Enable, it is required if the
# program/erase cannot be done using 1 LUT sequence, currently, only applicable to HyperFLASH
lutCustomSeqEnable: '0x00'
# -----------------------------------------===== reserved3_0 [Optional] =====-----------------------------------------
# Description: Offset: 0x00000048, Width: 32b; [0x048-0x04f] Reserved for future use
reserved3_0: '0x00000000'
# -----------------------------------------===== reserved3_1 [Optional] =====-----------------------------------------
# Description: Offset: 0x0000004C, Width: 32b; [0x048-0x04f] Reserved for future use
reserved3_1: '0x00000000'
# ----------------------------------------===== sflashA1Size [Optional] =====-----------------------------------------
# Description: Offset: 0x00000050, Width: 32b; [0x050-0x053] Size of Flash connected to A1
sflashA1Size: '0x00000000'
# ----------------------------------------===== sflashA2Size [Optional] =====-----------------------------------------
# Description: Offset: 0x00000054, Width: 32b; [0x054-0x057] Size of Flash connected to A2
sflashA2Size: '0x00000000'
# ----------------------------------------===== sflashB1Size [Optional] =====-----------------------------------------
# Description: Offset: 0x00000058, Width: 32b; [0x058-0x05b] Size of Flash connected to B1
sflashB1Size: '0x00000000'
# ----------------------------------------===== sflashB2Size [Optional] =====-----------------------------------------
# Description: Offset: 0x0000005C, Width: 32b; [0x05c-0x05f] Size of Flash connected to B2
sflashB2Size: '0x00000000'
# ------------------------------------===== csPadSettingOverride [Optional] =====-------------------------------------
# Description: Offset: 0x00000060, Width: 32b; [0x060-0x063] CS pad setting override value
csPadSettingOverride: '0x00000000'
# -----------------------------------===== sclkPadSettingOverride [Optional] =====------------------------------------
# Description: Offset: 0x00000064, Width: 32b; [0x064-0x067] SCK pad setting override value
sclkPadSettingOverride: '0x00000000'
# -----------------------------------===== dataPadSettingOverride [Optional] =====------------------------------------
# Description: Offset: 0x00000068, Width: 32b; [0x068-0x06b] data pad setting override value
dataPadSettingOverride: '0x00000000'
# ------------------------------------===== dqsPadSettingOverride [Optional] =====------------------------------------
# Description: Offset: 0x0000006C, Width: 32b; [0x06c-0x06f] DQS pad setting override value
dqsPadSettingOverride: '0x00000000'
# -----------------------------------------===== timeoutInMs [Optional] =====-----------------------------------------
# Description: Offset: 0x00000070, Width: 32b; [0x070-0x073] Timeout threshold for read status command
timeoutInMs: '0x00000000'
# ---------------------------------------===== commandInterval [Optional] =====---------------------------------------
# Description: Offset: 0x00000074, Width: 32b; [0x074-0x077] CS deselect interval between two commands
commandInterval: '0x00000000'
# ---------------------------------------===== dataValidTime_0 [Optional] =====---------------------------------------
# Description: Offset: 0x00000078, Width: 16b; [0x078-0x07b] CLK edge to data valid time for PORT A and PORT B, in
# terms of 0.1ns
dataValidTime_0: '0x0000'
# ---------------------------------------===== dataValidTime_1 [Optional] =====---------------------------------------
# Description: Offset: 0x0000007A, Width: 16b; [0x078-0x07b] CLK edge to data valid time for PORT A and PORT B, in
# terms of 0.1ns
dataValidTime_1: '0x0000'
# -----------------------------------------===== busyOffset [Optional] =====------------------------------------------
# Description: Offset: 0x0000007C, Width: 16b; [0x07c-0x07d] Busy offset, valid value: 0-31
busyOffset: '0x0000'
# ---------------------------------------===== busyBitPolarity [Optional] =====---------------------------------------
# Description: Offset: 0x0000007E, Width: 16b; [0x07e-0x07f] Busy flag polarity, 0 - busy flag is 1 when flash device
# is busy, 1 - busy flag is 0 when flash device is busy
busyBitPolarity: '0x0000'
# -----------------------------------===== lookupTable_seq0_instr0 [Optional] =====-----------------------------------
# Description: Offset: 0x00000080, Width: 16b; Lookup table holds Flash command sequences 0, instruction 0
lookupTable_seq0_instr0:
# ------------------------------------------===== OPERAND [Optional] =====------------------------------------------
# Description: Offset: 0b, Width: 8b, Instruction operand. Its values depends on used instruction
OPERAND: 0
# -----------------------------------------===== NUM_PADS [Optional] =====------------------------------------------
# Description: Offset: 8b, Width: 2b, Number of pads used by instruction. Some instructions ignores this parameter.
# - 1PAD, (0): Single mode. One pad is used.
# - 2PAD, (1): Dual mode. Two pads are used.
# - 4PAD, (2): Quad mode. Four pads are used.
# - 8PAD, (3): Octal mode. Eight pads are used.
# Possible options: <1PAD, 2PAD, 4PAD, 8PAD>
NUM_PADS: 1PAD
# --------------------------------------===== OPERATION_CODE [Optional] =====---------------------------------------
# Description: Offset: 10b, Width: 6b, Instruction operation code.
# - STOP, (0): Stop execution and de-assert CS. Then, the next command sequence (to the same flash device) starts
# from instruction pointer 0.
# - CMD_SDR, (1): Transmit command code to Flash.
# - RADDR_SDR, (2): Transmit row address to Flash.
# - CADDR_SDR, (3): Transmit column address to Flash.
# - MODE1_SDR, (4): Transmit mode bits to Flash.
# - MODE2_SDR, (5): Transmit mode bits to Flash.
# - MODE4_SDR, (6): Transmit mode bits to Flash.
# - MODE8_SDR, (7): Transmit mode bits to Flash.
# - WRITE_SDR, (8): Transmit program data to Flash device.
# - READ_SDR, (9): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_SDR, (10): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_SDR, (11): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_SDR, (12): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_SDR, (13): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# - JMP_ON_CS, (31): Stop execution, de-assert CS and save operand[7:0] as the instruction start pointer for next
# sequence.Normally this instruction is used to support Execute-In-Place enhanced mode. See XIP enhanced mode for
# more details.This instruction is only allowed for AHB read commands. There is interrupt status bit set
# (INTR[IPCMDERR] or INTR[AHBCMDERR]) when using this instruction in IP command or AHB write command.
# - CMD_DDR, (33): Transmit command code to Flash.
# - RADDR_DDR, (34): Transmit row address to Flash.
# - CADDR_DDR, (35): Transmit column address to Flash.
# - MODE1_DDR, (36): Transmit mode bits to Flash.
# - MODE2_DDR, (37): Transmit mode bits to Flash.
# - MODE4_DDR, (38): Transmit mode bits to Flash.
# - MODE8_DDR, (39): Transmit mode bits to Flash.
# - WRITE_DDR, (40): Transmit program data to Flash device.
# - READ_DDR, (41): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_DDR, (42): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_DDR, (43): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_DDR, (44): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_DDR, (45): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# Possible options: <STOP, CMD_SDR, RADDR_SDR, CADDR_SDR, MODE1_SDR, MODE2_SDR, MODE4_SDR, MODE8_SDR, WRITE_SDR,
# READ_SDR, LEARN_SDR, DATSZ_SDR, DUMMY_SDR, DUMMY_RWDS_SDR, JMP_ON_CS, CMD_DDR, RADDR_DDR, CADDR_DDR, MODE1_DDR,
# MODE2_DDR, MODE4_DDR, MODE8_DDR, WRITE_DDR, READ_DDR, LEARN_DDR, DATSZ_DDR, DUMMY_DDR, DUMMY_RWDS_DDR>
OPERATION_CODE: STOP
lookupTable_seq0_instr1:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq0_instr2:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq0_instr3:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq0_instr4:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq0_instr5:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq0_instr6:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq0_instr7:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
# -----------------------------------===== lookupTable_seq1_instr0 [Optional] =====-----------------------------------
# Description: Offset: 0x00000090, Width: 16b; Lookup table holds Flash command sequences 1, instruction 0
lookupTable_seq1_instr0:
# ------------------------------------------===== OPERAND [Optional] =====------------------------------------------
# Description: Offset: 0b, Width: 8b, Instruction operand. Its values depends on used instruction
OPERAND: 0
# -----------------------------------------===== NUM_PADS [Optional] =====------------------------------------------
# Description: Offset: 8b, Width: 2b, Number of pads used by instruction. Some instructions ignores this parameter.
# - 1PAD, (0): Single mode. One pad is used.
# - 2PAD, (1): Dual mode. Two pads are used.
# - 4PAD, (2): Quad mode. Four pads are used.
# - 8PAD, (3): Octal mode. Eight pads are used.
# Possible options: <1PAD, 2PAD, 4PAD, 8PAD>
NUM_PADS: 1PAD
# --------------------------------------===== OPERATION_CODE [Optional] =====---------------------------------------
# Description: Offset: 10b, Width: 6b, Instruction operation code.
# - STOP, (0): Stop execution and de-assert CS. Then, the next command sequence (to the same flash device) starts
# from instruction pointer 0.
# - CMD_SDR, (1): Transmit command code to Flash.
# - RADDR_SDR, (2): Transmit row address to Flash.
# - CADDR_SDR, (3): Transmit column address to Flash.
# - MODE1_SDR, (4): Transmit mode bits to Flash.
# - MODE2_SDR, (5): Transmit mode bits to Flash.
# - MODE4_SDR, (6): Transmit mode bits to Flash.
# - MODE8_SDR, (7): Transmit mode bits to Flash.
# - WRITE_SDR, (8): Transmit program data to Flash device.
# - READ_SDR, (9): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_SDR, (10): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_SDR, (11): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_SDR, (12): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_SDR, (13): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# - JMP_ON_CS, (31): Stop execution, de-assert CS and save operand[7:0] as the instruction start pointer for next
# sequence.Normally this instruction is used to support Execute-In-Place enhanced mode. See XIP enhanced mode for
# more details.This instruction is only allowed for AHB read commands. There is interrupt status bit set
# (INTR[IPCMDERR] or INTR[AHBCMDERR]) when using this instruction in IP command or AHB write command.
# - CMD_DDR, (33): Transmit command code to Flash.
# - RADDR_DDR, (34): Transmit row address to Flash.
# - CADDR_DDR, (35): Transmit column address to Flash.
# - MODE1_DDR, (36): Transmit mode bits to Flash.
# - MODE2_DDR, (37): Transmit mode bits to Flash.
# - MODE4_DDR, (38): Transmit mode bits to Flash.
# - MODE8_DDR, (39): Transmit mode bits to Flash.
# - WRITE_DDR, (40): Transmit program data to Flash device.
# - READ_DDR, (41): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_DDR, (42): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_DDR, (43): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_DDR, (44): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_DDR, (45): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# Possible options: <STOP, CMD_SDR, RADDR_SDR, CADDR_SDR, MODE1_SDR, MODE2_SDR, MODE4_SDR, MODE8_SDR, WRITE_SDR,
# READ_SDR, LEARN_SDR, DATSZ_SDR, DUMMY_SDR, DUMMY_RWDS_SDR, JMP_ON_CS, CMD_DDR, RADDR_DDR, CADDR_DDR, MODE1_DDR,
# MODE2_DDR, MODE4_DDR, MODE8_DDR, WRITE_DDR, READ_DDR, LEARN_DDR, DATSZ_DDR, DUMMY_DDR, DUMMY_RWDS_DDR>
OPERATION_CODE: STOP
lookupTable_seq1_instr1:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq1_instr2:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq1_instr3:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq1_instr4:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq1_instr5:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq1_instr6:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq1_instr7:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
# -----------------------------------===== lookupTable_seq2_instr0 [Optional] =====-----------------------------------
# Description: Offset: 0x000000A0, Width: 16b; Lookup table holds Flash command sequences 2, instruction 0
lookupTable_seq2_instr0:
# ------------------------------------------===== OPERAND [Optional] =====------------------------------------------
# Description: Offset: 0b, Width: 8b, Instruction operand. Its values depends on used instruction
OPERAND: 0
# -----------------------------------------===== NUM_PADS [Optional] =====------------------------------------------
# Description: Offset: 8b, Width: 2b, Number of pads used by instruction. Some instructions ignores this parameter.
# - 1PAD, (0): Single mode. One pad is used.
# - 2PAD, (1): Dual mode. Two pads are used.
# - 4PAD, (2): Quad mode. Four pads are used.
# - 8PAD, (3): Octal mode. Eight pads are used.
# Possible options: <1PAD, 2PAD, 4PAD, 8PAD>
NUM_PADS: 1PAD
# --------------------------------------===== OPERATION_CODE [Optional] =====---------------------------------------
# Description: Offset: 10b, Width: 6b, Instruction operation code.
# - STOP, (0): Stop execution and de-assert CS. Then, the next command sequence (to the same flash device) starts
# from instruction pointer 0.
# - CMD_SDR, (1): Transmit command code to Flash.
# - RADDR_SDR, (2): Transmit row address to Flash.
# - CADDR_SDR, (3): Transmit column address to Flash.
# - MODE1_SDR, (4): Transmit mode bits to Flash.
# - MODE2_SDR, (5): Transmit mode bits to Flash.
# - MODE4_SDR, (6): Transmit mode bits to Flash.
# - MODE8_SDR, (7): Transmit mode bits to Flash.
# - WRITE_SDR, (8): Transmit program data to Flash device.
# - READ_SDR, (9): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_SDR, (10): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_SDR, (11): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_SDR, (12): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_SDR, (13): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# - JMP_ON_CS, (31): Stop execution, de-assert CS and save operand[7:0] as the instruction start pointer for next
# sequence.Normally this instruction is used to support Execute-In-Place enhanced mode. See XIP enhanced mode for
# more details.This instruction is only allowed for AHB read commands. There is interrupt status bit set
# (INTR[IPCMDERR] or INTR[AHBCMDERR]) when using this instruction in IP command or AHB write command.
# - CMD_DDR, (33): Transmit command code to Flash.
# - RADDR_DDR, (34): Transmit row address to Flash.
# - CADDR_DDR, (35): Transmit column address to Flash.
# - MODE1_DDR, (36): Transmit mode bits to Flash.
# - MODE2_DDR, (37): Transmit mode bits to Flash.
# - MODE4_DDR, (38): Transmit mode bits to Flash.
# - MODE8_DDR, (39): Transmit mode bits to Flash.
# - WRITE_DDR, (40): Transmit program data to Flash device.
# - READ_DDR, (41): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_DDR, (42): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_DDR, (43): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_DDR, (44): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_DDR, (45): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# Possible options: <STOP, CMD_SDR, RADDR_SDR, CADDR_SDR, MODE1_SDR, MODE2_SDR, MODE4_SDR, MODE8_SDR, WRITE_SDR,
# READ_SDR, LEARN_SDR, DATSZ_SDR, DUMMY_SDR, DUMMY_RWDS_SDR, JMP_ON_CS, CMD_DDR, RADDR_DDR, CADDR_DDR, MODE1_DDR,
# MODE2_DDR, MODE4_DDR, MODE8_DDR, WRITE_DDR, READ_DDR, LEARN_DDR, DATSZ_DDR, DUMMY_DDR, DUMMY_RWDS_DDR>
OPERATION_CODE: STOP
lookupTable_seq2_instr1:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq2_instr2:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq2_instr3:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq2_instr4:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq2_instr5:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq2_instr6:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq2_instr7:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
# -----------------------------------===== lookupTable_seq3_instr0 [Optional] =====-----------------------------------
# Description: Offset: 0x000000B0, Width: 16b; Lookup table holds Flash command sequences 3, instruction 0
lookupTable_seq3_instr0:
# ------------------------------------------===== OPERAND [Optional] =====------------------------------------------
# Description: Offset: 0b, Width: 8b, Instruction operand. Its values depends on used instruction
OPERAND: 0
# -----------------------------------------===== NUM_PADS [Optional] =====------------------------------------------
# Description: Offset: 8b, Width: 2b, Number of pads used by instruction. Some instructions ignores this parameter.
# - 1PAD, (0): Single mode. One pad is used.
# - 2PAD, (1): Dual mode. Two pads are used.
# - 4PAD, (2): Quad mode. Four pads are used.
# - 8PAD, (3): Octal mode. Eight pads are used.
# Possible options: <1PAD, 2PAD, 4PAD, 8PAD>
NUM_PADS: 1PAD
# --------------------------------------===== OPERATION_CODE [Optional] =====---------------------------------------
# Description: Offset: 10b, Width: 6b, Instruction operation code.
# - STOP, (0): Stop execution and de-assert CS. Then, the next command sequence (to the same flash device) starts
# from instruction pointer 0.
# - CMD_SDR, (1): Transmit command code to Flash.
# - RADDR_SDR, (2): Transmit row address to Flash.
# - CADDR_SDR, (3): Transmit column address to Flash.
# - MODE1_SDR, (4): Transmit mode bits to Flash.
# - MODE2_SDR, (5): Transmit mode bits to Flash.
# - MODE4_SDR, (6): Transmit mode bits to Flash.
# - MODE8_SDR, (7): Transmit mode bits to Flash.
# - WRITE_SDR, (8): Transmit program data to Flash device.
# - READ_SDR, (9): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_SDR, (10): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_SDR, (11): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_SDR, (12): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_SDR, (13): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# - JMP_ON_CS, (31): Stop execution, de-assert CS and save operand[7:0] as the instruction start pointer for next
# sequence.Normally this instruction is used to support Execute-In-Place enhanced mode. See XIP enhanced mode for
# more details.This instruction is only allowed for AHB read commands. There is interrupt status bit set
# (INTR[IPCMDERR] or INTR[AHBCMDERR]) when using this instruction in IP command or AHB write command.
# - CMD_DDR, (33): Transmit command code to Flash.
# - RADDR_DDR, (34): Transmit row address to Flash.
# - CADDR_DDR, (35): Transmit column address to Flash.
# - MODE1_DDR, (36): Transmit mode bits to Flash.
# - MODE2_DDR, (37): Transmit mode bits to Flash.
# - MODE4_DDR, (38): Transmit mode bits to Flash.
# - MODE8_DDR, (39): Transmit mode bits to Flash.
# - WRITE_DDR, (40): Transmit program data to Flash device.
# - READ_DDR, (41): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_DDR, (42): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_DDR, (43): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_DDR, (44): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_DDR, (45): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# Possible options: <STOP, CMD_SDR, RADDR_SDR, CADDR_SDR, MODE1_SDR, MODE2_SDR, MODE4_SDR, MODE8_SDR, WRITE_SDR,
# READ_SDR, LEARN_SDR, DATSZ_SDR, DUMMY_SDR, DUMMY_RWDS_SDR, JMP_ON_CS, CMD_DDR, RADDR_DDR, CADDR_DDR, MODE1_DDR,
# MODE2_DDR, MODE4_DDR, MODE8_DDR, WRITE_DDR, READ_DDR, LEARN_DDR, DATSZ_DDR, DUMMY_DDR, DUMMY_RWDS_DDR>
OPERATION_CODE: STOP
lookupTable_seq3_instr1:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq3_instr2:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq3_instr3:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq3_instr4:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq3_instr5:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq3_instr6:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq3_instr7:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
# -----------------------------------===== lookupTable_seq4_instr0 [Optional] =====-----------------------------------
# Description: Offset: 0x000000C0, Width: 16b; Lookup table holds Flash command sequences 4, instruction 0
lookupTable_seq4_instr0:
# ------------------------------------------===== OPERAND [Optional] =====------------------------------------------
# Description: Offset: 0b, Width: 8b, Instruction operand. Its values depends on used instruction
OPERAND: 0
# -----------------------------------------===== NUM_PADS [Optional] =====------------------------------------------
# Description: Offset: 8b, Width: 2b, Number of pads used by instruction. Some instructions ignores this parameter.
# - 1PAD, (0): Single mode. One pad is used.
# - 2PAD, (1): Dual mode. Two pads are used.
# - 4PAD, (2): Quad mode. Four pads are used.
# - 8PAD, (3): Octal mode. Eight pads are used.
# Possible options: <1PAD, 2PAD, 4PAD, 8PAD>
NUM_PADS: 1PAD
# --------------------------------------===== OPERATION_CODE [Optional] =====---------------------------------------
# Description: Offset: 10b, Width: 6b, Instruction operation code.
# - STOP, (0): Stop execution and de-assert CS. Then, the next command sequence (to the same flash device) starts
# from instruction pointer 0.
# - CMD_SDR, (1): Transmit command code to Flash.
# - RADDR_SDR, (2): Transmit row address to Flash.
# - CADDR_SDR, (3): Transmit column address to Flash.
# - MODE1_SDR, (4): Transmit mode bits to Flash.
# - MODE2_SDR, (5): Transmit mode bits to Flash.
# - MODE4_SDR, (6): Transmit mode bits to Flash.
# - MODE8_SDR, (7): Transmit mode bits to Flash.
# - WRITE_SDR, (8): Transmit program data to Flash device.
# - READ_SDR, (9): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_SDR, (10): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_SDR, (11): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_SDR, (12): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_SDR, (13): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# - JMP_ON_CS, (31): Stop execution, de-assert CS and save operand[7:0] as the instruction start pointer for next
# sequence.Normally this instruction is used to support Execute-In-Place enhanced mode. See XIP enhanced mode for
# more details.This instruction is only allowed for AHB read commands. There is interrupt status bit set
# (INTR[IPCMDERR] or INTR[AHBCMDERR]) when using this instruction in IP command or AHB write command.
# - CMD_DDR, (33): Transmit command code to Flash.
# - RADDR_DDR, (34): Transmit row address to Flash.
# - CADDR_DDR, (35): Transmit column address to Flash.
# - MODE1_DDR, (36): Transmit mode bits to Flash.
# - MODE2_DDR, (37): Transmit mode bits to Flash.
# - MODE4_DDR, (38): Transmit mode bits to Flash.
# - MODE8_DDR, (39): Transmit mode bits to Flash.
# - WRITE_DDR, (40): Transmit program data to Flash device.
# - READ_DDR, (41): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_DDR, (42): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_DDR, (43): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_DDR, (44): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_DDR, (45): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# Possible options: <STOP, CMD_SDR, RADDR_SDR, CADDR_SDR, MODE1_SDR, MODE2_SDR, MODE4_SDR, MODE8_SDR, WRITE_SDR,
# READ_SDR, LEARN_SDR, DATSZ_SDR, DUMMY_SDR, DUMMY_RWDS_SDR, JMP_ON_CS, CMD_DDR, RADDR_DDR, CADDR_DDR, MODE1_DDR,
# MODE2_DDR, MODE4_DDR, MODE8_DDR, WRITE_DDR, READ_DDR, LEARN_DDR, DATSZ_DDR, DUMMY_DDR, DUMMY_RWDS_DDR>
OPERATION_CODE: STOP
lookupTable_seq4_instr1:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq4_instr2:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq4_instr3:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq4_instr4:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq4_instr5:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq4_instr6:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq4_instr7:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
# -----------------------------------===== lookupTable_seq5_instr0 [Optional] =====-----------------------------------
# Description: Offset: 0x000000D0, Width: 16b; Lookup table holds Flash command sequences 5, instruction 0
lookupTable_seq5_instr0:
# ------------------------------------------===== OPERAND [Optional] =====------------------------------------------
# Description: Offset: 0b, Width: 8b, Instruction operand. Its values depends on used instruction
OPERAND: 0
# -----------------------------------------===== NUM_PADS [Optional] =====------------------------------------------
# Description: Offset: 8b, Width: 2b, Number of pads used by instruction. Some instructions ignores this parameter.
# - 1PAD, (0): Single mode. One pad is used.
# - 2PAD, (1): Dual mode. Two pads are used.
# - 4PAD, (2): Quad mode. Four pads are used.
# - 8PAD, (3): Octal mode. Eight pads are used.
# Possible options: <1PAD, 2PAD, 4PAD, 8PAD>
NUM_PADS: 1PAD
# --------------------------------------===== OPERATION_CODE [Optional] =====---------------------------------------
# Description: Offset: 10b, Width: 6b, Instruction operation code.
# - STOP, (0): Stop execution and de-assert CS. Then, the next command sequence (to the same flash device) starts
# from instruction pointer 0.
# - CMD_SDR, (1): Transmit command code to Flash.
# - RADDR_SDR, (2): Transmit row address to Flash.
# - CADDR_SDR, (3): Transmit column address to Flash.
# - MODE1_SDR, (4): Transmit mode bits to Flash.
# - MODE2_SDR, (5): Transmit mode bits to Flash.
# - MODE4_SDR, (6): Transmit mode bits to Flash.
# - MODE8_SDR, (7): Transmit mode bits to Flash.
# - WRITE_SDR, (8): Transmit program data to Flash device.
# - READ_SDR, (9): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_SDR, (10): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_SDR, (11): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_SDR, (12): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_SDR, (13): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# - JMP_ON_CS, (31): Stop execution, de-assert CS and save operand[7:0] as the instruction start pointer for next
# sequence.Normally this instruction is used to support Execute-In-Place enhanced mode. See XIP enhanced mode for
# more details.This instruction is only allowed for AHB read commands. There is interrupt status bit set
# (INTR[IPCMDERR] or INTR[AHBCMDERR]) when using this instruction in IP command or AHB write command.
# - CMD_DDR, (33): Transmit command code to Flash.
# - RADDR_DDR, (34): Transmit row address to Flash.
# - CADDR_DDR, (35): Transmit column address to Flash.
# - MODE1_DDR, (36): Transmit mode bits to Flash.
# - MODE2_DDR, (37): Transmit mode bits to Flash.
# - MODE4_DDR, (38): Transmit mode bits to Flash.
# - MODE8_DDR, (39): Transmit mode bits to Flash.
# - WRITE_DDR, (40): Transmit program data to Flash device.
# - READ_DDR, (41): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_DDR, (42): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_DDR, (43): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_DDR, (44): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_DDR, (45): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# Possible options: <STOP, CMD_SDR, RADDR_SDR, CADDR_SDR, MODE1_SDR, MODE2_SDR, MODE4_SDR, MODE8_SDR, WRITE_SDR,
# READ_SDR, LEARN_SDR, DATSZ_SDR, DUMMY_SDR, DUMMY_RWDS_SDR, JMP_ON_CS, CMD_DDR, RADDR_DDR, CADDR_DDR, MODE1_DDR,
# MODE2_DDR, MODE4_DDR, MODE8_DDR, WRITE_DDR, READ_DDR, LEARN_DDR, DATSZ_DDR, DUMMY_DDR, DUMMY_RWDS_DDR>
OPERATION_CODE: STOP
lookupTable_seq5_instr1:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq5_instr2:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq5_instr3:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq5_instr4:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq5_instr5:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq5_instr6:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq5_instr7:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
# -----------------------------------===== lookupTable_seq6_instr0 [Optional] =====-----------------------------------
# Description: Offset: 0x000000E0, Width: 16b; Lookup table holds Flash command sequences 6, instruction 0
lookupTable_seq6_instr0:
# ------------------------------------------===== OPERAND [Optional] =====------------------------------------------
# Description: Offset: 0b, Width: 8b, Instruction operand. Its values depends on used instruction
OPERAND: 0
# -----------------------------------------===== NUM_PADS [Optional] =====------------------------------------------
# Description: Offset: 8b, Width: 2b, Number of pads used by instruction. Some instructions ignores this parameter.
# - 1PAD, (0): Single mode. One pad is used.
# - 2PAD, (1): Dual mode. Two pads are used.
# - 4PAD, (2): Quad mode. Four pads are used.
# - 8PAD, (3): Octal mode. Eight pads are used.
# Possible options: <1PAD, 2PAD, 4PAD, 8PAD>
NUM_PADS: 1PAD
# --------------------------------------===== OPERATION_CODE [Optional] =====---------------------------------------
# Description: Offset: 10b, Width: 6b, Instruction operation code.
# - STOP, (0): Stop execution and de-assert CS. Then, the next command sequence (to the same flash device) starts
# from instruction pointer 0.
# - CMD_SDR, (1): Transmit command code to Flash.
# - RADDR_SDR, (2): Transmit row address to Flash.
# - CADDR_SDR, (3): Transmit column address to Flash.
# - MODE1_SDR, (4): Transmit mode bits to Flash.
# - MODE2_SDR, (5): Transmit mode bits to Flash.
# - MODE4_SDR, (6): Transmit mode bits to Flash.
# - MODE8_SDR, (7): Transmit mode bits to Flash.
# - WRITE_SDR, (8): Transmit program data to Flash device.
# - READ_SDR, (9): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_SDR, (10): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_SDR, (11): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_SDR, (12): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_SDR, (13): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# - JMP_ON_CS, (31): Stop execution, de-assert CS and save operand[7:0] as the instruction start pointer for next
# sequence.Normally this instruction is used to support Execute-In-Place enhanced mode. See XIP enhanced mode for
# more details.This instruction is only allowed for AHB read commands. There is interrupt status bit set
# (INTR[IPCMDERR] or INTR[AHBCMDERR]) when using this instruction in IP command or AHB write command.
# - CMD_DDR, (33): Transmit command code to Flash.
# - RADDR_DDR, (34): Transmit row address to Flash.
# - CADDR_DDR, (35): Transmit column address to Flash.
# - MODE1_DDR, (36): Transmit mode bits to Flash.
# - MODE2_DDR, (37): Transmit mode bits to Flash.
# - MODE4_DDR, (38): Transmit mode bits to Flash.
# - MODE8_DDR, (39): Transmit mode bits to Flash.
# - WRITE_DDR, (40): Transmit program data to Flash device.
# - READ_DDR, (41): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_DDR, (42): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_DDR, (43): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_DDR, (44): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_DDR, (45): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# Possible options: <STOP, CMD_SDR, RADDR_SDR, CADDR_SDR, MODE1_SDR, MODE2_SDR, MODE4_SDR, MODE8_SDR, WRITE_SDR,
# READ_SDR, LEARN_SDR, DATSZ_SDR, DUMMY_SDR, DUMMY_RWDS_SDR, JMP_ON_CS, CMD_DDR, RADDR_DDR, CADDR_DDR, MODE1_DDR,
# MODE2_DDR, MODE4_DDR, MODE8_DDR, WRITE_DDR, READ_DDR, LEARN_DDR, DATSZ_DDR, DUMMY_DDR, DUMMY_RWDS_DDR>
OPERATION_CODE: STOP
lookupTable_seq6_instr1:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq6_instr2:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq6_instr3:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq6_instr4:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq6_instr5:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq6_instr6:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq6_instr7:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
# -----------------------------------===== lookupTable_seq7_instr0 [Optional] =====-----------------------------------
# Description: Offset: 0x000000F0, Width: 16b; Lookup table holds Flash command sequences 7, instruction 0
lookupTable_seq7_instr0:
# ------------------------------------------===== OPERAND [Optional] =====------------------------------------------
# Description: Offset: 0b, Width: 8b, Instruction operand. Its values depends on used instruction
OPERAND: 0
# -----------------------------------------===== NUM_PADS [Optional] =====------------------------------------------
# Description: Offset: 8b, Width: 2b, Number of pads used by instruction. Some instructions ignores this parameter.
# - 1PAD, (0): Single mode. One pad is used.
# - 2PAD, (1): Dual mode. Two pads are used.
# - 4PAD, (2): Quad mode. Four pads are used.
# - 8PAD, (3): Octal mode. Eight pads are used.
# Possible options: <1PAD, 2PAD, 4PAD, 8PAD>
NUM_PADS: 1PAD
# --------------------------------------===== OPERATION_CODE [Optional] =====---------------------------------------
# Description: Offset: 10b, Width: 6b, Instruction operation code.
# - STOP, (0): Stop execution and de-assert CS. Then, the next command sequence (to the same flash device) starts
# from instruction pointer 0.
# - CMD_SDR, (1): Transmit command code to Flash.
# - RADDR_SDR, (2): Transmit row address to Flash.
# - CADDR_SDR, (3): Transmit column address to Flash.
# - MODE1_SDR, (4): Transmit mode bits to Flash.
# - MODE2_SDR, (5): Transmit mode bits to Flash.
# - MODE4_SDR, (6): Transmit mode bits to Flash.
# - MODE8_SDR, (7): Transmit mode bits to Flash.
# - WRITE_SDR, (8): Transmit program data to Flash device.
# - READ_SDR, (9): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_SDR, (10): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_SDR, (11): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_SDR, (12): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_SDR, (13): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# - JMP_ON_CS, (31): Stop execution, de-assert CS and save operand[7:0] as the instruction start pointer for next
# sequence.Normally this instruction is used to support Execute-In-Place enhanced mode. See XIP enhanced mode for
# more details.This instruction is only allowed for AHB read commands. There is interrupt status bit set
# (INTR[IPCMDERR] or INTR[AHBCMDERR]) when using this instruction in IP command or AHB write command.
# - CMD_DDR, (33): Transmit command code to Flash.
# - RADDR_DDR, (34): Transmit row address to Flash.
# - CADDR_DDR, (35): Transmit column address to Flash.
# - MODE1_DDR, (36): Transmit mode bits to Flash.
# - MODE2_DDR, (37): Transmit mode bits to Flash.
# - MODE4_DDR, (38): Transmit mode bits to Flash.
# - MODE8_DDR, (39): Transmit mode bits to Flash.
# - WRITE_DDR, (40): Transmit program data to Flash device.
# - READ_DDR, (41): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_DDR, (42): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_DDR, (43): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_DDR, (44): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_DDR, (45): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# Possible options: <STOP, CMD_SDR, RADDR_SDR, CADDR_SDR, MODE1_SDR, MODE2_SDR, MODE4_SDR, MODE8_SDR, WRITE_SDR,
# READ_SDR, LEARN_SDR, DATSZ_SDR, DUMMY_SDR, DUMMY_RWDS_SDR, JMP_ON_CS, CMD_DDR, RADDR_DDR, CADDR_DDR, MODE1_DDR,
# MODE2_DDR, MODE4_DDR, MODE8_DDR, WRITE_DDR, READ_DDR, LEARN_DDR, DATSZ_DDR, DUMMY_DDR, DUMMY_RWDS_DDR>
OPERATION_CODE: STOP
lookupTable_seq7_instr1:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq7_instr2:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq7_instr3:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq7_instr4:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq7_instr5:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq7_instr6:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq7_instr7:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
# -----------------------------------===== lookupTable_seq8_instr0 [Optional] =====-----------------------------------
# Description: Offset: 0x00000100, Width: 16b; Lookup table holds Flash command sequences 8, instruction 0
lookupTable_seq8_instr0:
# ------------------------------------------===== OPERAND [Optional] =====------------------------------------------
# Description: Offset: 0b, Width: 8b, Instruction operand. Its values depends on used instruction
OPERAND: 0
# -----------------------------------------===== NUM_PADS [Optional] =====------------------------------------------
# Description: Offset: 8b, Width: 2b, Number of pads used by instruction. Some instructions ignores this parameter.
# - 1PAD, (0): Single mode. One pad is used.
# - 2PAD, (1): Dual mode. Two pads are used.
# - 4PAD, (2): Quad mode. Four pads are used.
# - 8PAD, (3): Octal mode. Eight pads are used.
# Possible options: <1PAD, 2PAD, 4PAD, 8PAD>
NUM_PADS: 1PAD
# --------------------------------------===== OPERATION_CODE [Optional] =====---------------------------------------
# Description: Offset: 10b, Width: 6b, Instruction operation code.
# - STOP, (0): Stop execution and de-assert CS. Then, the next command sequence (to the same flash device) starts
# from instruction pointer 0.
# - CMD_SDR, (1): Transmit command code to Flash.
# - RADDR_SDR, (2): Transmit row address to Flash.
# - CADDR_SDR, (3): Transmit column address to Flash.
# - MODE1_SDR, (4): Transmit mode bits to Flash.
# - MODE2_SDR, (5): Transmit mode bits to Flash.
# - MODE4_SDR, (6): Transmit mode bits to Flash.
# - MODE8_SDR, (7): Transmit mode bits to Flash.
# - WRITE_SDR, (8): Transmit program data to Flash device.
# - READ_SDR, (9): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_SDR, (10): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_SDR, (11): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_SDR, (12): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_SDR, (13): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# - JMP_ON_CS, (31): Stop execution, de-assert CS and save operand[7:0] as the instruction start pointer for next
# sequence.Normally this instruction is used to support Execute-In-Place enhanced mode. See XIP enhanced mode for
# more details.This instruction is only allowed for AHB read commands. There is interrupt status bit set
# (INTR[IPCMDERR] or INTR[AHBCMDERR]) when using this instruction in IP command or AHB write command.
# - CMD_DDR, (33): Transmit command code to Flash.
# - RADDR_DDR, (34): Transmit row address to Flash.
# - CADDR_DDR, (35): Transmit column address to Flash.
# - MODE1_DDR, (36): Transmit mode bits to Flash.
# - MODE2_DDR, (37): Transmit mode bits to Flash.
# - MODE4_DDR, (38): Transmit mode bits to Flash.
# - MODE8_DDR, (39): Transmit mode bits to Flash.
# - WRITE_DDR, (40): Transmit program data to Flash device.
# - READ_DDR, (41): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_DDR, (42): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_DDR, (43): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_DDR, (44): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_DDR, (45): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# Possible options: <STOP, CMD_SDR, RADDR_SDR, CADDR_SDR, MODE1_SDR, MODE2_SDR, MODE4_SDR, MODE8_SDR, WRITE_SDR,
# READ_SDR, LEARN_SDR, DATSZ_SDR, DUMMY_SDR, DUMMY_RWDS_SDR, JMP_ON_CS, CMD_DDR, RADDR_DDR, CADDR_DDR, MODE1_DDR,
# MODE2_DDR, MODE4_DDR, MODE8_DDR, WRITE_DDR, READ_DDR, LEARN_DDR, DATSZ_DDR, DUMMY_DDR, DUMMY_RWDS_DDR>
OPERATION_CODE: STOP
lookupTable_seq8_instr1:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq8_instr2:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq8_instr3:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq8_instr4:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq8_instr5:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq8_instr6:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq8_instr7:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
# -----------------------------------===== lookupTable_seq9_instr0 [Optional] =====-----------------------------------
# Description: Offset: 0x00000110, Width: 16b; Lookup table holds Flash command sequences 9, instruction 0
lookupTable_seq9_instr0:
# ------------------------------------------===== OPERAND [Optional] =====------------------------------------------
# Description: Offset: 0b, Width: 8b, Instruction operand. Its values depends on used instruction
OPERAND: 0
# -----------------------------------------===== NUM_PADS [Optional] =====------------------------------------------
# Description: Offset: 8b, Width: 2b, Number of pads used by instruction. Some instructions ignores this parameter.
# - 1PAD, (0): Single mode. One pad is used.
# - 2PAD, (1): Dual mode. Two pads are used.
# - 4PAD, (2): Quad mode. Four pads are used.
# - 8PAD, (3): Octal mode. Eight pads are used.
# Possible options: <1PAD, 2PAD, 4PAD, 8PAD>
NUM_PADS: 1PAD
# --------------------------------------===== OPERATION_CODE [Optional] =====---------------------------------------
# Description: Offset: 10b, Width: 6b, Instruction operation code.
# - STOP, (0): Stop execution and de-assert CS. Then, the next command sequence (to the same flash device) starts
# from instruction pointer 0.
# - CMD_SDR, (1): Transmit command code to Flash.
# - RADDR_SDR, (2): Transmit row address to Flash.
# - CADDR_SDR, (3): Transmit column address to Flash.
# - MODE1_SDR, (4): Transmit mode bits to Flash.
# - MODE2_SDR, (5): Transmit mode bits to Flash.
# - MODE4_SDR, (6): Transmit mode bits to Flash.
# - MODE8_SDR, (7): Transmit mode bits to Flash.
# - WRITE_SDR, (8): Transmit program data to Flash device.
# - READ_SDR, (9): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_SDR, (10): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_SDR, (11): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_SDR, (12): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_SDR, (13): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# - JMP_ON_CS, (31): Stop execution, de-assert CS and save operand[7:0] as the instruction start pointer for next
# sequence.Normally this instruction is used to support Execute-In-Place enhanced mode. See XIP enhanced mode for
# more details.This instruction is only allowed for AHB read commands. There is interrupt status bit set
# (INTR[IPCMDERR] or INTR[AHBCMDERR]) when using this instruction in IP command or AHB write command.
# - CMD_DDR, (33): Transmit command code to Flash.
# - RADDR_DDR, (34): Transmit row address to Flash.
# - CADDR_DDR, (35): Transmit column address to Flash.
# - MODE1_DDR, (36): Transmit mode bits to Flash.
# - MODE2_DDR, (37): Transmit mode bits to Flash.
# - MODE4_DDR, (38): Transmit mode bits to Flash.
# - MODE8_DDR, (39): Transmit mode bits to Flash.
# - WRITE_DDR, (40): Transmit program data to Flash device.
# - READ_DDR, (41): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_DDR, (42): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_DDR, (43): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_DDR, (44): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_DDR, (45): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# Possible options: <STOP, CMD_SDR, RADDR_SDR, CADDR_SDR, MODE1_SDR, MODE2_SDR, MODE4_SDR, MODE8_SDR, WRITE_SDR,
# READ_SDR, LEARN_SDR, DATSZ_SDR, DUMMY_SDR, DUMMY_RWDS_SDR, JMP_ON_CS, CMD_DDR, RADDR_DDR, CADDR_DDR, MODE1_DDR,
# MODE2_DDR, MODE4_DDR, MODE8_DDR, WRITE_DDR, READ_DDR, LEARN_DDR, DATSZ_DDR, DUMMY_DDR, DUMMY_RWDS_DDR>
OPERATION_CODE: STOP
lookupTable_seq9_instr1:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq9_instr2:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq9_instr3:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq9_instr4:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq9_instr5:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq9_instr6:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq9_instr7:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
# ----------------------------------===== lookupTable_seq10_instr0 [Optional] =====-----------------------------------
# Description: Offset: 0x00000120, Width: 16b; Lookup table holds Flash command sequences 10, instruction 0
lookupTable_seq10_instr0:
# ------------------------------------------===== OPERAND [Optional] =====------------------------------------------
# Description: Offset: 0b, Width: 8b, Instruction operand. Its values depends on used instruction
OPERAND: 0
# -----------------------------------------===== NUM_PADS [Optional] =====------------------------------------------
# Description: Offset: 8b, Width: 2b, Number of pads used by instruction. Some instructions ignores this parameter.
# - 1PAD, (0): Single mode. One pad is used.
# - 2PAD, (1): Dual mode. Two pads are used.
# - 4PAD, (2): Quad mode. Four pads are used.
# - 8PAD, (3): Octal mode. Eight pads are used.
# Possible options: <1PAD, 2PAD, 4PAD, 8PAD>
NUM_PADS: 1PAD
# --------------------------------------===== OPERATION_CODE [Optional] =====---------------------------------------
# Description: Offset: 10b, Width: 6b, Instruction operation code.
# - STOP, (0): Stop execution and de-assert CS. Then, the next command sequence (to the same flash device) starts
# from instruction pointer 0.
# - CMD_SDR, (1): Transmit command code to Flash.
# - RADDR_SDR, (2): Transmit row address to Flash.
# - CADDR_SDR, (3): Transmit column address to Flash.
# - MODE1_SDR, (4): Transmit mode bits to Flash.
# - MODE2_SDR, (5): Transmit mode bits to Flash.
# - MODE4_SDR, (6): Transmit mode bits to Flash.
# - MODE8_SDR, (7): Transmit mode bits to Flash.
# - WRITE_SDR, (8): Transmit program data to Flash device.
# - READ_SDR, (9): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_SDR, (10): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_SDR, (11): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_SDR, (12): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_SDR, (13): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# - JMP_ON_CS, (31): Stop execution, de-assert CS and save operand[7:0] as the instruction start pointer for next
# sequence.Normally this instruction is used to support Execute-In-Place enhanced mode. See XIP enhanced mode for
# more details.This instruction is only allowed for AHB read commands. There is interrupt status bit set
# (INTR[IPCMDERR] or INTR[AHBCMDERR]) when using this instruction in IP command or AHB write command.
# - CMD_DDR, (33): Transmit command code to Flash.
# - RADDR_DDR, (34): Transmit row address to Flash.
# - CADDR_DDR, (35): Transmit column address to Flash.
# - MODE1_DDR, (36): Transmit mode bits to Flash.
# - MODE2_DDR, (37): Transmit mode bits to Flash.
# - MODE4_DDR, (38): Transmit mode bits to Flash.
# - MODE8_DDR, (39): Transmit mode bits to Flash.
# - WRITE_DDR, (40): Transmit program data to Flash device.
# - READ_DDR, (41): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_DDR, (42): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_DDR, (43): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_DDR, (44): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_DDR, (45): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# Possible options: <STOP, CMD_SDR, RADDR_SDR, CADDR_SDR, MODE1_SDR, MODE2_SDR, MODE4_SDR, MODE8_SDR, WRITE_SDR,
# READ_SDR, LEARN_SDR, DATSZ_SDR, DUMMY_SDR, DUMMY_RWDS_SDR, JMP_ON_CS, CMD_DDR, RADDR_DDR, CADDR_DDR, MODE1_DDR,
# MODE2_DDR, MODE4_DDR, MODE8_DDR, WRITE_DDR, READ_DDR, LEARN_DDR, DATSZ_DDR, DUMMY_DDR, DUMMY_RWDS_DDR>
OPERATION_CODE: STOP
lookupTable_seq10_instr1:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq10_instr2:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq10_instr3:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq10_instr4:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq10_instr5:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq10_instr6:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq10_instr7:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
# ----------------------------------===== lookupTable_seq11_instr0 [Optional] =====-----------------------------------
# Description: Offset: 0x00000130, Width: 16b; Lookup table holds Flash command sequences 11, instruction 0
lookupTable_seq11_instr0:
# ------------------------------------------===== OPERAND [Optional] =====------------------------------------------
# Description: Offset: 0b, Width: 8b, Instruction operand. Its values depends on used instruction
OPERAND: 0
# -----------------------------------------===== NUM_PADS [Optional] =====------------------------------------------
# Description: Offset: 8b, Width: 2b, Number of pads used by instruction. Some instructions ignores this parameter.
# - 1PAD, (0): Single mode. One pad is used.
# - 2PAD, (1): Dual mode. Two pads are used.
# - 4PAD, (2): Quad mode. Four pads are used.
# - 8PAD, (3): Octal mode. Eight pads are used.
# Possible options: <1PAD, 2PAD, 4PAD, 8PAD>
NUM_PADS: 1PAD
# --------------------------------------===== OPERATION_CODE [Optional] =====---------------------------------------
# Description: Offset: 10b, Width: 6b, Instruction operation code.
# - STOP, (0): Stop execution and de-assert CS. Then, the next command sequence (to the same flash device) starts
# from instruction pointer 0.
# - CMD_SDR, (1): Transmit command code to Flash.
# - RADDR_SDR, (2): Transmit row address to Flash.
# - CADDR_SDR, (3): Transmit column address to Flash.
# - MODE1_SDR, (4): Transmit mode bits to Flash.
# - MODE2_SDR, (5): Transmit mode bits to Flash.
# - MODE4_SDR, (6): Transmit mode bits to Flash.
# - MODE8_SDR, (7): Transmit mode bits to Flash.
# - WRITE_SDR, (8): Transmit program data to Flash device.
# - READ_SDR, (9): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_SDR, (10): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_SDR, (11): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_SDR, (12): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_SDR, (13): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# - JMP_ON_CS, (31): Stop execution, de-assert CS and save operand[7:0] as the instruction start pointer for next
# sequence.Normally this instruction is used to support Execute-In-Place enhanced mode. See XIP enhanced mode for
# more details.This instruction is only allowed for AHB read commands. There is interrupt status bit set
# (INTR[IPCMDERR] or INTR[AHBCMDERR]) when using this instruction in IP command or AHB write command.
# - CMD_DDR, (33): Transmit command code to Flash.
# - RADDR_DDR, (34): Transmit row address to Flash.
# - CADDR_DDR, (35): Transmit column address to Flash.
# - MODE1_DDR, (36): Transmit mode bits to Flash.
# - MODE2_DDR, (37): Transmit mode bits to Flash.
# - MODE4_DDR, (38): Transmit mode bits to Flash.
# - MODE8_DDR, (39): Transmit mode bits to Flash.
# - WRITE_DDR, (40): Transmit program data to Flash device.
# - READ_DDR, (41): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_DDR, (42): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_DDR, (43): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_DDR, (44): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_DDR, (45): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# Possible options: <STOP, CMD_SDR, RADDR_SDR, CADDR_SDR, MODE1_SDR, MODE2_SDR, MODE4_SDR, MODE8_SDR, WRITE_SDR,
# READ_SDR, LEARN_SDR, DATSZ_SDR, DUMMY_SDR, DUMMY_RWDS_SDR, JMP_ON_CS, CMD_DDR, RADDR_DDR, CADDR_DDR, MODE1_DDR,
# MODE2_DDR, MODE4_DDR, MODE8_DDR, WRITE_DDR, READ_DDR, LEARN_DDR, DATSZ_DDR, DUMMY_DDR, DUMMY_RWDS_DDR>
OPERATION_CODE: STOP
lookupTable_seq11_instr1:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq11_instr2:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq11_instr3:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq11_instr4:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq11_instr5:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq11_instr6:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq11_instr7:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
# ----------------------------------===== lookupTable_seq12_instr0 [Optional] =====-----------------------------------
# Description: Offset: 0x00000140, Width: 16b; Lookup table holds Flash command sequences 12, instruction 0
lookupTable_seq12_instr0:
# ------------------------------------------===== OPERAND [Optional] =====------------------------------------------
# Description: Offset: 0b, Width: 8b, Instruction operand. Its values depends on used instruction
OPERAND: 0
# -----------------------------------------===== NUM_PADS [Optional] =====------------------------------------------
# Description: Offset: 8b, Width: 2b, Number of pads used by instruction. Some instructions ignores this parameter.
# - 1PAD, (0): Single mode. One pad is used.
# - 2PAD, (1): Dual mode. Two pads are used.
# - 4PAD, (2): Quad mode. Four pads are used.
# - 8PAD, (3): Octal mode. Eight pads are used.
# Possible options: <1PAD, 2PAD, 4PAD, 8PAD>
NUM_PADS: 1PAD
# --------------------------------------===== OPERATION_CODE [Optional] =====---------------------------------------
# Description: Offset: 10b, Width: 6b, Instruction operation code.
# - STOP, (0): Stop execution and de-assert CS. Then, the next command sequence (to the same flash device) starts
# from instruction pointer 0.
# - CMD_SDR, (1): Transmit command code to Flash.
# - RADDR_SDR, (2): Transmit row address to Flash.
# - CADDR_SDR, (3): Transmit column address to Flash.
# - MODE1_SDR, (4): Transmit mode bits to Flash.
# - MODE2_SDR, (5): Transmit mode bits to Flash.
# - MODE4_SDR, (6): Transmit mode bits to Flash.
# - MODE8_SDR, (7): Transmit mode bits to Flash.
# - WRITE_SDR, (8): Transmit program data to Flash device.
# - READ_SDR, (9): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_SDR, (10): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_SDR, (11): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_SDR, (12): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_SDR, (13): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# - JMP_ON_CS, (31): Stop execution, de-assert CS and save operand[7:0] as the instruction start pointer for next
# sequence.Normally this instruction is used to support Execute-In-Place enhanced mode. See XIP enhanced mode for
# more details.This instruction is only allowed for AHB read commands. There is interrupt status bit set
# (INTR[IPCMDERR] or INTR[AHBCMDERR]) when using this instruction in IP command or AHB write command.
# - CMD_DDR, (33): Transmit command code to Flash.
# - RADDR_DDR, (34): Transmit row address to Flash.
# - CADDR_DDR, (35): Transmit column address to Flash.
# - MODE1_DDR, (36): Transmit mode bits to Flash.
# - MODE2_DDR, (37): Transmit mode bits to Flash.
# - MODE4_DDR, (38): Transmit mode bits to Flash.
# - MODE8_DDR, (39): Transmit mode bits to Flash.
# - WRITE_DDR, (40): Transmit program data to Flash device.
# - READ_DDR, (41): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_DDR, (42): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_DDR, (43): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_DDR, (44): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_DDR, (45): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# Possible options: <STOP, CMD_SDR, RADDR_SDR, CADDR_SDR, MODE1_SDR, MODE2_SDR, MODE4_SDR, MODE8_SDR, WRITE_SDR,
# READ_SDR, LEARN_SDR, DATSZ_SDR, DUMMY_SDR, DUMMY_RWDS_SDR, JMP_ON_CS, CMD_DDR, RADDR_DDR, CADDR_DDR, MODE1_DDR,
# MODE2_DDR, MODE4_DDR, MODE8_DDR, WRITE_DDR, READ_DDR, LEARN_DDR, DATSZ_DDR, DUMMY_DDR, DUMMY_RWDS_DDR>
OPERATION_CODE: STOP
lookupTable_seq12_instr1:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq12_instr2:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq12_instr3:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq12_instr4:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq12_instr5:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq12_instr6:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq12_instr7:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
# ----------------------------------===== lookupTable_seq13_instr0 [Optional] =====-----------------------------------
# Description: Offset: 0x00000150, Width: 16b; Lookup table holds Flash command sequences 13, instruction 0
lookupTable_seq13_instr0:
# ------------------------------------------===== OPERAND [Optional] =====------------------------------------------
# Description: Offset: 0b, Width: 8b, Instruction operand. Its values depends on used instruction
OPERAND: 0
# -----------------------------------------===== NUM_PADS [Optional] =====------------------------------------------
# Description: Offset: 8b, Width: 2b, Number of pads used by instruction. Some instructions ignores this parameter.
# - 1PAD, (0): Single mode. One pad is used.
# - 2PAD, (1): Dual mode. Two pads are used.
# - 4PAD, (2): Quad mode. Four pads are used.
# - 8PAD, (3): Octal mode. Eight pads are used.
# Possible options: <1PAD, 2PAD, 4PAD, 8PAD>
NUM_PADS: 1PAD
# --------------------------------------===== OPERATION_CODE [Optional] =====---------------------------------------
# Description: Offset: 10b, Width: 6b, Instruction operation code.
# - STOP, (0): Stop execution and de-assert CS. Then, the next command sequence (to the same flash device) starts
# from instruction pointer 0.
# - CMD_SDR, (1): Transmit command code to Flash.
# - RADDR_SDR, (2): Transmit row address to Flash.
# - CADDR_SDR, (3): Transmit column address to Flash.
# - MODE1_SDR, (4): Transmit mode bits to Flash.
# - MODE2_SDR, (5): Transmit mode bits to Flash.
# - MODE4_SDR, (6): Transmit mode bits to Flash.
# - MODE8_SDR, (7): Transmit mode bits to Flash.
# - WRITE_SDR, (8): Transmit program data to Flash device.
# - READ_SDR, (9): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_SDR, (10): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_SDR, (11): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_SDR, (12): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_SDR, (13): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# - JMP_ON_CS, (31): Stop execution, de-assert CS and save operand[7:0] as the instruction start pointer for next
# sequence.Normally this instruction is used to support Execute-In-Place enhanced mode. See XIP enhanced mode for
# more details.This instruction is only allowed for AHB read commands. There is interrupt status bit set
# (INTR[IPCMDERR] or INTR[AHBCMDERR]) when using this instruction in IP command or AHB write command.
# - CMD_DDR, (33): Transmit command code to Flash.
# - RADDR_DDR, (34): Transmit row address to Flash.
# - CADDR_DDR, (35): Transmit column address to Flash.
# - MODE1_DDR, (36): Transmit mode bits to Flash.
# - MODE2_DDR, (37): Transmit mode bits to Flash.
# - MODE4_DDR, (38): Transmit mode bits to Flash.
# - MODE8_DDR, (39): Transmit mode bits to Flash.
# - WRITE_DDR, (40): Transmit program data to Flash device.
# - READ_DDR, (41): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_DDR, (42): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_DDR, (43): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_DDR, (44): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_DDR, (45): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# Possible options: <STOP, CMD_SDR, RADDR_SDR, CADDR_SDR, MODE1_SDR, MODE2_SDR, MODE4_SDR, MODE8_SDR, WRITE_SDR,
# READ_SDR, LEARN_SDR, DATSZ_SDR, DUMMY_SDR, DUMMY_RWDS_SDR, JMP_ON_CS, CMD_DDR, RADDR_DDR, CADDR_DDR, MODE1_DDR,
# MODE2_DDR, MODE4_DDR, MODE8_DDR, WRITE_DDR, READ_DDR, LEARN_DDR, DATSZ_DDR, DUMMY_DDR, DUMMY_RWDS_DDR>
OPERATION_CODE: STOP
lookupTable_seq13_instr1:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq13_instr2:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq13_instr3:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq13_instr4:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq13_instr5:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq13_instr6:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq13_instr7:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
# ----------------------------------===== lookupTable_seq14_instr0 [Optional] =====-----------------------------------
# Description: Offset: 0x00000160, Width: 16b; Lookup table holds Flash command sequences 14, instruction 0
lookupTable_seq14_instr0:
# ------------------------------------------===== OPERAND [Optional] =====------------------------------------------
# Description: Offset: 0b, Width: 8b, Instruction operand. Its values depends on used instruction
OPERAND: 0
# -----------------------------------------===== NUM_PADS [Optional] =====------------------------------------------
# Description: Offset: 8b, Width: 2b, Number of pads used by instruction. Some instructions ignores this parameter.
# - 1PAD, (0): Single mode. One pad is used.
# - 2PAD, (1): Dual mode. Two pads are used.
# - 4PAD, (2): Quad mode. Four pads are used.
# - 8PAD, (3): Octal mode. Eight pads are used.
# Possible options: <1PAD, 2PAD, 4PAD, 8PAD>
NUM_PADS: 1PAD
# --------------------------------------===== OPERATION_CODE [Optional] =====---------------------------------------
# Description: Offset: 10b, Width: 6b, Instruction operation code.
# - STOP, (0): Stop execution and de-assert CS. Then, the next command sequence (to the same flash device) starts
# from instruction pointer 0.
# - CMD_SDR, (1): Transmit command code to Flash.
# - RADDR_SDR, (2): Transmit row address to Flash.
# - CADDR_SDR, (3): Transmit column address to Flash.
# - MODE1_SDR, (4): Transmit mode bits to Flash.
# - MODE2_SDR, (5): Transmit mode bits to Flash.
# - MODE4_SDR, (6): Transmit mode bits to Flash.
# - MODE8_SDR, (7): Transmit mode bits to Flash.
# - WRITE_SDR, (8): Transmit program data to Flash device.
# - READ_SDR, (9): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_SDR, (10): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_SDR, (11): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_SDR, (12): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_SDR, (13): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# - JMP_ON_CS, (31): Stop execution, de-assert CS and save operand[7:0] as the instruction start pointer for next
# sequence.Normally this instruction is used to support Execute-In-Place enhanced mode. See XIP enhanced mode for
# more details.This instruction is only allowed for AHB read commands. There is interrupt status bit set
# (INTR[IPCMDERR] or INTR[AHBCMDERR]) when using this instruction in IP command or AHB write command.
# - CMD_DDR, (33): Transmit command code to Flash.
# - RADDR_DDR, (34): Transmit row address to Flash.
# - CADDR_DDR, (35): Transmit column address to Flash.
# - MODE1_DDR, (36): Transmit mode bits to Flash.
# - MODE2_DDR, (37): Transmit mode bits to Flash.
# - MODE4_DDR, (38): Transmit mode bits to Flash.
# - MODE8_DDR, (39): Transmit mode bits to Flash.
# - WRITE_DDR, (40): Transmit program data to Flash device.
# - READ_DDR, (41): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_DDR, (42): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_DDR, (43): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_DDR, (44): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_DDR, (45): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# Possible options: <STOP, CMD_SDR, RADDR_SDR, CADDR_SDR, MODE1_SDR, MODE2_SDR, MODE4_SDR, MODE8_SDR, WRITE_SDR,
# READ_SDR, LEARN_SDR, DATSZ_SDR, DUMMY_SDR, DUMMY_RWDS_SDR, JMP_ON_CS, CMD_DDR, RADDR_DDR, CADDR_DDR, MODE1_DDR,
# MODE2_DDR, MODE4_DDR, MODE8_DDR, WRITE_DDR, READ_DDR, LEARN_DDR, DATSZ_DDR, DUMMY_DDR, DUMMY_RWDS_DDR>
OPERATION_CODE: STOP
lookupTable_seq14_instr1:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq14_instr2:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq14_instr3:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq14_instr4:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq14_instr5:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq14_instr6:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq14_instr7:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
# ----------------------------------===== lookupTable_seq15_instr0 [Optional] =====-----------------------------------
# Description: Offset: 0x00000170, Width: 16b; Lookup table holds Flash command sequences 15, instruction 0
lookupTable_seq15_instr0:
# ------------------------------------------===== OPERAND [Optional] =====------------------------------------------
# Description: Offset: 0b, Width: 8b, Instruction operand. Its values depends on used instruction
OPERAND: 0
# -----------------------------------------===== NUM_PADS [Optional] =====------------------------------------------
# Description: Offset: 8b, Width: 2b, Number of pads used by instruction. Some instructions ignores this parameter.
# - 1PAD, (0): Single mode. One pad is used.
# - 2PAD, (1): Dual mode. Two pads are used.
# - 4PAD, (2): Quad mode. Four pads are used.
# - 8PAD, (3): Octal mode. Eight pads are used.
# Possible options: <1PAD, 2PAD, 4PAD, 8PAD>
NUM_PADS: 1PAD
# --------------------------------------===== OPERATION_CODE [Optional] =====---------------------------------------
# Description: Offset: 10b, Width: 6b, Instruction operation code.
# - STOP, (0): Stop execution and de-assert CS. Then, the next command sequence (to the same flash device) starts
# from instruction pointer 0.
# - CMD_SDR, (1): Transmit command code to Flash.
# - RADDR_SDR, (2): Transmit row address to Flash.
# - CADDR_SDR, (3): Transmit column address to Flash.
# - MODE1_SDR, (4): Transmit mode bits to Flash.
# - MODE2_SDR, (5): Transmit mode bits to Flash.
# - MODE4_SDR, (6): Transmit mode bits to Flash.
# - MODE8_SDR, (7): Transmit mode bits to Flash.
# - WRITE_SDR, (8): Transmit program data to Flash device.
# - READ_SDR, (9): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_SDR, (10): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_SDR, (11): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_SDR, (12): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_SDR, (13): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# - JMP_ON_CS, (31): Stop execution, de-assert CS and save operand[7:0] as the instruction start pointer for next
# sequence.Normally this instruction is used to support Execute-In-Place enhanced mode. See XIP enhanced mode for
# more details.This instruction is only allowed for AHB read commands. There is interrupt status bit set
# (INTR[IPCMDERR] or INTR[AHBCMDERR]) when using this instruction in IP command or AHB write command.
# - CMD_DDR, (33): Transmit command code to Flash.
# - RADDR_DDR, (34): Transmit row address to Flash.
# - CADDR_DDR, (35): Transmit column address to Flash.
# - MODE1_DDR, (36): Transmit mode bits to Flash.
# - MODE2_DDR, (37): Transmit mode bits to Flash.
# - MODE4_DDR, (38): Transmit mode bits to Flash.
# - MODE8_DDR, (39): Transmit mode bits to Flash.
# - WRITE_DDR, (40): Transmit program data to Flash device.
# - READ_DDR, (41): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_DDR, (42): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_DDR, (43): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_DDR, (44): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_DDR, (45): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# Possible options: <STOP, CMD_SDR, RADDR_SDR, CADDR_SDR, MODE1_SDR, MODE2_SDR, MODE4_SDR, MODE8_SDR, WRITE_SDR,
# READ_SDR, LEARN_SDR, DATSZ_SDR, DUMMY_SDR, DUMMY_RWDS_SDR, JMP_ON_CS, CMD_DDR, RADDR_DDR, CADDR_DDR, MODE1_DDR,
# MODE2_DDR, MODE4_DDR, MODE8_DDR, WRITE_DDR, READ_DDR, LEARN_DDR, DATSZ_DDR, DUMMY_DDR, DUMMY_RWDS_DDR>
OPERATION_CODE: STOP
lookupTable_seq15_instr1:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq15_instr2:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq15_instr3:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq15_instr4:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq15_instr5:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq15_instr6:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq15_instr7:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
# ---------------------------------------===== lutCustomSeq_0 [Optional] =====----------------------------------------
# Description: Offset: 0x00000180, Width: 32b; [0x180-0x1af] Customizable LUT Sequences
lutCustomSeq_0:
# ------------------------------------------===== seqNum [Optional] =====-------------------------------------------
# Description: Offset: 0b, Width: 8b, Sequence Number, valid number: 1-16
seqNum: 0
# -------------------------------------------===== seqId [Optional] =====-------------------------------------------
# Description: Offset: 8b, Width: 8b, Sequence Index, valid number: 0-15
seqId: 0
# -----------------------------------------===== reserved [Optional] =====------------------------------------------
# Description: Offset: 16b, Width: 16b, N/A
reserved: 0
# ---------------------------------------===== lutCustomSeq_1 [Optional] =====----------------------------------------
# Description: Offset: 0x00000184, Width: 32b; [0x180-0x1af] Customizable LUT Sequences
lutCustomSeq_1:
# ------------------------------------------===== seqNum [Optional] =====-------------------------------------------
# Description: Offset: 0b, Width: 8b, Sequence Number, valid number: 1-16
seqNum: 0
# -------------------------------------------===== seqId [Optional] =====-------------------------------------------
# Description: Offset: 8b, Width: 8b, Sequence Index, valid number: 0-15
seqId: 0
# -----------------------------------------===== reserved [Optional] =====------------------------------------------
# Description: Offset: 16b, Width: 16b, N/A
reserved: 0
# ---------------------------------------===== lutCustomSeq_2 [Optional] =====----------------------------------------
# Description: Offset: 0x00000188, Width: 32b; [0x180-0x1af] Customizable LUT Sequences
lutCustomSeq_2:
# ------------------------------------------===== seqNum [Optional] =====-------------------------------------------
# Description: Offset: 0b, Width: 8b, Sequence Number, valid number: 1-16
seqNum: 0
# -------------------------------------------===== seqId [Optional] =====-------------------------------------------
# Description: Offset: 8b, Width: 8b, Sequence Index, valid number: 0-15
seqId: 0
# -----------------------------------------===== reserved [Optional] =====------------------------------------------
# Description: Offset: 16b, Width: 16b, N/A
reserved: 0
# ---------------------------------------===== lutCustomSeq_3 [Optional] =====----------------------------------------
# Description: Offset: 0x0000018C, Width: 32b; [0x180-0x1af] Customizable LUT Sequences
lutCustomSeq_3:
# ------------------------------------------===== seqNum [Optional] =====-------------------------------------------
# Description: Offset: 0b, Width: 8b, Sequence Number, valid number: 1-16
seqNum: 0
# -------------------------------------------===== seqId [Optional] =====-------------------------------------------
# Description: Offset: 8b, Width: 8b, Sequence Index, valid number: 0-15
seqId: 0
# -----------------------------------------===== reserved [Optional] =====------------------------------------------
# Description: Offset: 16b, Width: 16b, N/A
reserved: 0
# ---------------------------------------===== lutCustomSeq_4 [Optional] =====----------------------------------------
# Description: Offset: 0x00000190, Width: 32b; [0x180-0x1af] Customizable LUT Sequences
lutCustomSeq_4:
# ------------------------------------------===== seqNum [Optional] =====-------------------------------------------
# Description: Offset: 0b, Width: 8b, Sequence Number, valid number: 1-16
seqNum: 0
# -------------------------------------------===== seqId [Optional] =====-------------------------------------------
# Description: Offset: 8b, Width: 8b, Sequence Index, valid number: 0-15
seqId: 0
# -----------------------------------------===== reserved [Optional] =====------------------------------------------
# Description: Offset: 16b, Width: 16b, N/A
reserved: 0
# ---------------------------------------===== lutCustomSeq_5 [Optional] =====----------------------------------------
# Description: Offset: 0x00000194, Width: 32b; [0x180-0x1af] Customizable LUT Sequences
lutCustomSeq_5:
# ------------------------------------------===== seqNum [Optional] =====-------------------------------------------
# Description: Offset: 0b, Width: 8b, Sequence Number, valid number: 1-16
seqNum: 0
# -------------------------------------------===== seqId [Optional] =====-------------------------------------------
# Description: Offset: 8b, Width: 8b, Sequence Index, valid number: 0-15
seqId: 0
# -----------------------------------------===== reserved [Optional] =====------------------------------------------
# Description: Offset: 16b, Width: 16b, N/A
reserved: 0
# ---------------------------------------===== lutCustomSeq_6 [Optional] =====----------------------------------------
# Description: Offset: 0x00000198, Width: 32b; [0x180-0x1af] Customizable LUT Sequences
lutCustomSeq_6:
# ------------------------------------------===== seqNum [Optional] =====-------------------------------------------
# Description: Offset: 0b, Width: 8b, Sequence Number, valid number: 1-16
seqNum: 0
# -------------------------------------------===== seqId [Optional] =====-------------------------------------------
# Description: Offset: 8b, Width: 8b, Sequence Index, valid number: 0-15
seqId: 0
# -----------------------------------------===== reserved [Optional] =====------------------------------------------
# Description: Offset: 16b, Width: 16b, N/A
reserved: 0
# ---------------------------------------===== lutCustomSeq_7 [Optional] =====----------------------------------------
# Description: Offset: 0x0000019C, Width: 32b; [0x180-0x1af] Customizable LUT Sequences
lutCustomSeq_7:
# ------------------------------------------===== seqNum [Optional] =====-------------------------------------------
# Description: Offset: 0b, Width: 8b, Sequence Number, valid number: 1-16
seqNum: 0
# -------------------------------------------===== seqId [Optional] =====-------------------------------------------
# Description: Offset: 8b, Width: 8b, Sequence Index, valid number: 0-15
seqId: 0
# -----------------------------------------===== reserved [Optional] =====------------------------------------------
# Description: Offset: 16b, Width: 16b, N/A
reserved: 0
# ---------------------------------------===== lutCustomSeq_8 [Optional] =====----------------------------------------
# Description: Offset: 0x000001A0, Width: 32b; [0x180-0x1af] Customizable LUT Sequences
lutCustomSeq_8:
# ------------------------------------------===== seqNum [Optional] =====-------------------------------------------
# Description: Offset: 0b, Width: 8b, Sequence Number, valid number: 1-16
seqNum: 0
# -------------------------------------------===== seqId [Optional] =====-------------------------------------------
# Description: Offset: 8b, Width: 8b, Sequence Index, valid number: 0-15
seqId: 0
# -----------------------------------------===== reserved [Optional] =====------------------------------------------
# Description: Offset: 16b, Width: 16b, N/A
reserved: 0
# ---------------------------------------===== lutCustomSeq_9 [Optional] =====----------------------------------------
# Description: Offset: 0x000001A4, Width: 32b; [0x180-0x1af] Customizable LUT Sequences
lutCustomSeq_9:
# ------------------------------------------===== seqNum [Optional] =====-------------------------------------------
# Description: Offset: 0b, Width: 8b, Sequence Number, valid number: 1-16
seqNum: 0
# -------------------------------------------===== seqId [Optional] =====-------------------------------------------
# Description: Offset: 8b, Width: 8b, Sequence Index, valid number: 0-15
seqId: 0
# -----------------------------------------===== reserved [Optional] =====------------------------------------------
# Description: Offset: 16b, Width: 16b, N/A
reserved: 0
# ---------------------------------------===== lutCustomSeq_10 [Optional] =====---------------------------------------
# Description: Offset: 0x000001A8, Width: 32b; [0x180-0x1af] Customizable LUT Sequences
lutCustomSeq_10:
# ------------------------------------------===== seqNum [Optional] =====-------------------------------------------
# Description: Offset: 0b, Width: 8b, Sequence Number, valid number: 1-16
seqNum: 0
# -------------------------------------------===== seqId [Optional] =====-------------------------------------------
# Description: Offset: 8b, Width: 8b, Sequence Index, valid number: 0-15
seqId: 0
# -----------------------------------------===== reserved [Optional] =====------------------------------------------
# Description: Offset: 16b, Width: 16b, N/A
reserved: 0
# ---------------------------------------===== lutCustomSeq_11 [Optional] =====---------------------------------------
# Description: Offset: 0x000001AC, Width: 32b; [0x180-0x1af] Customizable LUT Sequences
lutCustomSeq_11:
# ------------------------------------------===== seqNum [Optional] =====-------------------------------------------
# Description: Offset: 0b, Width: 8b, Sequence Number, valid number: 1-16
seqNum: 0
# -------------------------------------------===== seqId [Optional] =====-------------------------------------------
# Description: Offset: 8b, Width: 8b, Sequence Index, valid number: 0-15
seqId: 0
# -----------------------------------------===== reserved [Optional] =====------------------------------------------
# Description: Offset: 16b, Width: 16b, N/A
reserved: 0
# -----------------------------------------===== reserved4_0 [Optional] =====-----------------------------------------
# Description: Offset: 0x000001B0, Width: 32b; [0x1b0-0x1bf] Reserved for future use
reserved4_0: '0x00000000'
# -----------------------------------------===== reserved4_1 [Optional] =====-----------------------------------------
# Description: Offset: 0x000001B4, Width: 32b; [0x1b0-0x1bf] Reserved for future use
reserved4_1: '0x00000000'
# -----------------------------------------===== reserved4_2 [Optional] =====-----------------------------------------
# Description: Offset: 0x000001B8, Width: 32b; [0x1b0-0x1bf] Reserved for future use
reserved4_2: '0x00000000'
# -----------------------------------------===== reserved4_3 [Optional] =====-----------------------------------------
# Description: Offset: 0x000001BC, Width: 32b; [0x1b0-0x1bf] Reserved for future use
reserved4_3: '0x00000000'
# ------------------------------------------===== pageSize [Optional] =====-------------------------------------------
# Description: Offset: 0x000001C0, Width: 32b; Page size of Serial NOR
pageSize: '0x00000000'
# -----------------------------------------===== sectorSize [Optional] =====------------------------------------------
# Description: Offset: 0x000001C4, Width: 32b; Sector size of Serial NOR
sectorSize: '0x00000000'
# -------------------------------------===== ipcmdSerialClkFreq [Optional] =====--------------------------------------
# Description: Offset: 0x000001C8, Width: 8b; Clock frequency for IP command
ipcmdSerialClkFreq: '0x00'
# -------------------------------------===== isUniformBlockSize [Optional] =====--------------------------------------
# Description: Offset: 0x000001C9, Width: 8b; Sector/Block size is the same
isUniformBlockSize: '0x00'
# -----------------------------------------===== reserved0_0 [Optional] =====-----------------------------------------
# Description: Offset: 0x000001CA, Width: 8b; Reserved for future use
reserved0_0: '0x00'
# -----------------------------------------===== reserved0_1 [Optional] =====-----------------------------------------
# Description: Offset: 0x000001CB, Width: 8b; Reserved for future use
reserved0_1: '0x00'
# ----------------------------------------===== serialNorType [Optional] =====----------------------------------------
# Description: Offset: 0x000001CC, Width: 8b; Serial NOR Flash type: 0/1/2/3
serialNorType: '0x00'
# --------------------------------------===== needExitNoCmdMode [Optional] =====--------------------------------------
# Description: Offset: 0x000001CD, Width: 8b; Need to exit NoCmd mode before other IP command
needExitNoCmdMode: '0x00'
# ------------------------------------===== halfClkForNonReadCmd [Optional] =====-------------------------------------
# Description: Offset: 0x000001CE, Width: 8b; Half the Serial Clock for non-read command: true/false
halfClkForNonReadCmd: '0x00'
# ------------------------------------===== needRestoreNoCmdMode [Optional] =====-------------------------------------
# Description: Offset: 0x000001CF, Width: 8b; Need to Restore NoCmd mode after IP command execution
needRestoreNoCmdMode: '0x00'
# ------------------------------------------===== blockSize [Optional] =====------------------------------------------
# Description: Offset: 0x000001D0, Width: 32b; Block size
blockSize: '0x00000000'
# -----------------------------------------===== reserve2_0 [Optional] =====------------------------------------------
# Description: Offset: 0x000001D4, Width: 32b; Reserved for future use
reserve2_0: '0x00000000'
# -----------------------------------------===== reserve2_1 [Optional] =====------------------------------------------
# Description: Offset: 0x000001D8, Width: 32b; Reserved for future use
reserve2_1: '0x00000000'
# -----------------------------------------===== reserve2_2 [Optional] =====------------------------------------------
# Description: Offset: 0x000001DC, Width: 32b; Reserved for future use
reserve2_2: '0x00000000'
# -----------------------------------------===== reserve2_3 [Optional] =====------------------------------------------
# Description: Offset: 0x000001E0, Width: 32b; Reserved for future use
reserve2_3: '0x00000000'
# -----------------------------------------===== reserve2_4 [Optional] =====------------------------------------------
# Description: Offset: 0x000001E4, Width: 32b; Reserved for future use
reserve2_4: '0x00000000'
# -----------------------------------------===== reserve2_5 [Optional] =====------------------------------------------
# Description: Offset: 0x000001E8, Width: 32b; Reserved for future use
reserve2_5: '0x00000000'
# -----------------------------------------===== reserve2_6 [Optional] =====------------------------------------------
# Description: Offset: 0x000001EC, Width: 32b; Reserved for future use
reserve2_6: '0x00000000'
# -----------------------------------------===== reserve2_7 [Optional] =====------------------------------------------
# Description: Offset: 0x000001F0, Width: 32b; Reserved for future use
reserve2_7: '0x00000000'
# -----------------------------------------===== reserve2_8 [Optional] =====------------------------------------------
# Description: Offset: 0x000001F4, Width: 32b; Reserved for future use
reserve2_8: '0x00000000'
# -----------------------------------------===== reserve2_9 [Optional] =====------------------------------------------
# Description: Offset: 0x000001F8, Width: 32b; Reserved for future use
reserve2_9: '0x00000000'
# -----------------------------------------===== reserve2_10 [Optional] =====-----------------------------------------
# Description: Offset: 0x000001FC, Width: 32b; Reserved for future use
reserve2_10: '0x00000000'
FCB for mimxrt1165, Revision: a0 and flexspi_nor#
FCB for mimxrt1165, Revision: a0 and flexspi_nor JSON schema
FCB for mimxrt1165, Revision: a0 and flexspi_nor YAML configuration template
# ================================= FCB for mimxrt1165, Revision: a0 and flexspi_nor =================================
# ======================================================================================================================
# == FCB for mimxrt1165, Revision: a0 and flexspi_nor ==
# ======================================================================================================================
# -------------------------------------===== The chip family name [Required] =====--------------------------------------
# Description: NXP chip family identifier.
family: CHOOSE_FROM_TABLE
# -----------------------------------------===== MCU revision [Optional] =====------------------------------------------
# Description: Revision of silicon. The 'latest' name, means most current revision.
# Possible options: <a0, latest>
revision: a0
# ------------------------------------------===== Memory type [Required] =====------------------------------------------
# Description: Specify type of memory used by FCB description.
# Possible options: <flexspi_nor>
type: flexspi_nor
# ------------------------------------------===== mimxrt1165 [Required] =====-------------------------------------------
fcb_settings:
# ---------------------------------------------===== tag [Optional] =====---------------------------------------------
# Description: Offset: 0x00000000, Width: 32b; [0x000-0x003] Tag, fixed value 0x42464346UL
tag: '0x42464346'
# -------------------------------------------===== version [Optional] =====-------------------------------------------
# Description: Offset: 0x00000004, Width: 32b; [0x004-0x007] Version,[31:24] -'V', [23:16] - Major, [15:8] - Minor,
# [7:0] - bugfix
version: '0x56010400'
# ------------------------------------------===== reserved0 [Optional] =====------------------------------------------
# Description: Offset: 0x00000008, Width: 32b; [0x008-0x00b] Reserved for future use
reserved0: '0x00000000'
# --------------------------------------===== readSampleClkSrc [Optional] =====---------------------------------------
# Description: Offset: 0x0000000C, Width: 8b; [0x00c-0x00c] Read Sample Clock Source, valid value: 0/1/3
readSampleClkSrc: '0x00'
# -----------------------------------------===== csHoldTime [Optional] =====------------------------------------------
# Description: Offset: 0x0000000D, Width: 8b; [0x00d-0x00d] CS hold time, default value: 3
csHoldTime: '0x00'
# -----------------------------------------===== csSetupTime [Optional] =====-----------------------------------------
# Description: Offset: 0x0000000E, Width: 8b; [0x00e-0x00e] CS setup time, default value: 3
csSetupTime: '0x00'
# -------------------------------------===== columnAddressWidth [Optional] =====--------------------------------------
# Description: Offset: 0x0000000F, Width: 8b; [0x00f-0x00f] Column Address with, for HyperBus protocol, it is fixed
# to 3, For Serial NAND, need to refer to datasheet
columnAddressWidth: '0x00'
# -------------------------------------===== deviceModeCfgEnable [Optional] =====-------------------------------------
# Description: Offset: 0x00000010, Width: 8b; [0x010-0x010] Device Mode Configure enable flag, 1 - Enable, 0 -
# Disable
deviceModeCfgEnable: '0x00'
# ---------------------------------------===== deviceModeType [Optional] =====----------------------------------------
# Description: Offset: 0x00000011, Width: 8b; [0x011-0x011] Specify the configuration command type:Quad Enable,
# DPI/QPI/OPI switch, Generic configuration, etc.
deviceModeType: '0x00'
# -------------------------------------===== waitTimeCfgCommands [Optional] =====-------------------------------------
# Description: Offset: 0x00000012, Width: 16b; [0x012-0x013] Wait time for all configuration commands, unit: 100us,
# Used for DPI/QPI/OPI switch or reset command
waitTimeCfgCommands: '0x0000'
# ----------------------------------------===== deviceModeSeq [Optional] =====----------------------------------------
# Description: Offset: 0x00000014, Width: 32b; [0x014-0x017] Device mode sequence info, [7:0] - LUT sequence id,
# [15:8] - LUt sequence number, [31:16] Reserved
deviceModeSeq:
# ------------------------------------------===== seqNum [Optional] =====-------------------------------------------
# Description: Offset: 0b, Width: 8b, Sequence Number, valid number: 1-16
seqNum: 0
# -------------------------------------------===== seqId [Optional] =====-------------------------------------------
# Description: Offset: 8b, Width: 8b, Sequence Index, valid number: 0-15
seqId: 0
# -----------------------------------------===== reserved [Optional] =====------------------------------------------
# Description: Offset: 16b, Width: 16b, N/A
reserved: 0
# ----------------------------------------===== deviceModeArg [Optional] =====----------------------------------------
# Description: Offset: 0x00000018, Width: 32b; [0x018-0x01b] Argument/Parameter for device configuration
deviceModeArg: '0x00000000'
# ---------------------------------------===== configCmdEnable [Optional] =====---------------------------------------
# Description: Offset: 0x0000001C, Width: 8b; [0x01c-0x01c] Configure command Enable Flag, 1 - Enable, 0 - Disable
configCmdEnable: '0x00'
# --------------------------------------===== configModeType_0 [Optional] =====---------------------------------------
# Description: Offset: 0x0000001D, Width: 8b; [0x01d-0x01f] Configure Mode Type, similar as deviceModeTpe
configModeType_0: '0x00'
# --------------------------------------===== configModeType_1 [Optional] =====---------------------------------------
# Description: Offset: 0x0000001E, Width: 8b; [0x01d-0x01f] Configure Mode Type, similar as deviceModeTpe
configModeType_1: '0x00'
# --------------------------------------===== configModeType_2 [Optional] =====---------------------------------------
# Description: Offset: 0x0000001F, Width: 8b; [0x01d-0x01f] Configure Mode Type, similar as deviceModeTpe
configModeType_2: '0x00'
# ---------------------------------------===== configCmdSeqs_0 [Optional] =====---------------------------------------
# Description: Offset: 0x00000020, Width: 32b; [0x020-0x02b] Sequence info for Device Configuration command, similar
# as deviceModeSeq
configCmdSeqs_0:
# ------------------------------------------===== seqNum [Optional] =====-------------------------------------------
# Description: Offset: 0b, Width: 8b, Sequence Number, valid number: 1-16
seqNum: 0
# -------------------------------------------===== seqId [Optional] =====-------------------------------------------
# Description: Offset: 8b, Width: 8b, Sequence Index, valid number: 0-15
seqId: 0
# -----------------------------------------===== reserved [Optional] =====------------------------------------------
# Description: Offset: 16b, Width: 16b, N/A
reserved: 0
# ---------------------------------------===== configCmdSeqs_1 [Optional] =====---------------------------------------
# Description: Offset: 0x00000024, Width: 32b; [0x020-0x02b] Sequence info for Device Configuration command, similar
# as deviceModeSeq
configCmdSeqs_1:
# ------------------------------------------===== seqNum [Optional] =====-------------------------------------------
# Description: Offset: 0b, Width: 8b, Sequence Number, valid number: 1-16
seqNum: 0
# -------------------------------------------===== seqId [Optional] =====-------------------------------------------
# Description: Offset: 8b, Width: 8b, Sequence Index, valid number: 0-15
seqId: 0
# -----------------------------------------===== reserved [Optional] =====------------------------------------------
# Description: Offset: 16b, Width: 16b, N/A
reserved: 0
# ---------------------------------------===== configCmdSeqs_2 [Optional] =====---------------------------------------
# Description: Offset: 0x00000028, Width: 32b; [0x020-0x02b] Sequence info for Device Configuration command, similar
# as deviceModeSeq
configCmdSeqs_2:
# ------------------------------------------===== seqNum [Optional] =====-------------------------------------------
# Description: Offset: 0b, Width: 8b, Sequence Number, valid number: 1-16
seqNum: 0
# -------------------------------------------===== seqId [Optional] =====-------------------------------------------
# Description: Offset: 8b, Width: 8b, Sequence Index, valid number: 0-15
seqId: 0
# -----------------------------------------===== reserved [Optional] =====------------------------------------------
# Description: Offset: 16b, Width: 16b, N/A
reserved: 0
# ------------------------------------------===== reserved1 [Optional] =====------------------------------------------
# Description: Offset: 0x0000002C, Width: 32b; [0x02c-0x02f] Reserved for future use
reserved1: '0x00000000'
# ---------------------------------------===== configCmdArgs_0 [Optional] =====---------------------------------------
# Description: Offset: 0x00000030, Width: 32b; [0x030-0x03b] Arguments/Parameters for device Configuration commands
configCmdArgs_0: '0x00000000'
# ---------------------------------------===== configCmdArgs_1 [Optional] =====---------------------------------------
# Description: Offset: 0x00000034, Width: 32b; [0x030-0x03b] Arguments/Parameters for device Configuration commands
configCmdArgs_1: '0x00000000'
# ---------------------------------------===== configCmdArgs_2 [Optional] =====---------------------------------------
# Description: Offset: 0x00000038, Width: 32b; [0x030-0x03b] Arguments/Parameters for device Configuration commands
configCmdArgs_2: '0x00000000'
# ------------------------------------------===== reserved2 [Optional] =====------------------------------------------
# Description: Offset: 0x0000003C, Width: 32b; [0x03c-0x03f] Reserved for future use
reserved2: '0x00000000'
# ------------------------------------===== controllerMiscOption [Optional] =====-------------------------------------
# Description: Offset: 0x00000040, Width: 32b; [0x040-0x043] Controller Misc Options, see Misc feature bit
# definitions for more details
controllerMiscOption: '0x00000000'
# -----------------------------------------===== deviceType [Optional] =====------------------------------------------
# Description: Offset: 0x00000044, Width: 8b; [0x044-0x044] Device Type: See Flash Type Definition for more details
deviceType: '0x00'
# ----------------------------------------===== sflashPadType [Optional] =====----------------------------------------
# Description: Offset: 0x00000045, Width: 8b; [0x045-0x045] Serial Flash Pad Type: 1 - Single, 2 - Dual, 4 - Quad, 8
# - Octal
sflashPadType: '0x00'
# ----------------------------------------===== serialClkFreq [Optional] =====----------------------------------------
# Description: Offset: 0x00000046, Width: 8b; [0x046-0x046] Serial Flash Frequency, device specific definitions, See
# System Boot Chapter for more details
serialClkFreq: '0x00'
# -------------------------------------===== lutCustomSeqEnable [Optional] =====--------------------------------------
# Description: Offset: 0x00000047, Width: 8b; [0x047-0x047] LUT customization Enable, it is required if the
# program/erase cannot be done using 1 LUT sequence, currently, only applicable to HyperFLASH
lutCustomSeqEnable: '0x00'
# -----------------------------------------===== reserved3_0 [Optional] =====-----------------------------------------
# Description: Offset: 0x00000048, Width: 32b; [0x048-0x04f] Reserved for future use
reserved3_0: '0x00000000'
# -----------------------------------------===== reserved3_1 [Optional] =====-----------------------------------------
# Description: Offset: 0x0000004C, Width: 32b; [0x048-0x04f] Reserved for future use
reserved3_1: '0x00000000'
# ----------------------------------------===== sflashA1Size [Optional] =====-----------------------------------------
# Description: Offset: 0x00000050, Width: 32b; [0x050-0x053] Size of Flash connected to A1
sflashA1Size: '0x00000000'
# ----------------------------------------===== sflashA2Size [Optional] =====-----------------------------------------
# Description: Offset: 0x00000054, Width: 32b; [0x054-0x057] Size of Flash connected to A2
sflashA2Size: '0x00000000'
# ----------------------------------------===== sflashB1Size [Optional] =====-----------------------------------------
# Description: Offset: 0x00000058, Width: 32b; [0x058-0x05b] Size of Flash connected to B1
sflashB1Size: '0x00000000'
# ----------------------------------------===== sflashB2Size [Optional] =====-----------------------------------------
# Description: Offset: 0x0000005C, Width: 32b; [0x05c-0x05f] Size of Flash connected to B2
sflashB2Size: '0x00000000'
# ------------------------------------===== csPadSettingOverride [Optional] =====-------------------------------------
# Description: Offset: 0x00000060, Width: 32b; [0x060-0x063] CS pad setting override value
csPadSettingOverride: '0x00000000'
# -----------------------------------===== sclkPadSettingOverride [Optional] =====------------------------------------
# Description: Offset: 0x00000064, Width: 32b; [0x064-0x067] SCK pad setting override value
sclkPadSettingOverride: '0x00000000'
# -----------------------------------===== dataPadSettingOverride [Optional] =====------------------------------------
# Description: Offset: 0x00000068, Width: 32b; [0x068-0x06b] data pad setting override value
dataPadSettingOverride: '0x00000000'
# ------------------------------------===== dqsPadSettingOverride [Optional] =====------------------------------------
# Description: Offset: 0x0000006C, Width: 32b; [0x06c-0x06f] DQS pad setting override value
dqsPadSettingOverride: '0x00000000'
# -----------------------------------------===== timeoutInMs [Optional] =====-----------------------------------------
# Description: Offset: 0x00000070, Width: 32b; [0x070-0x073] Timeout threshold for read status command
timeoutInMs: '0x00000000'
# ---------------------------------------===== commandInterval [Optional] =====---------------------------------------
# Description: Offset: 0x00000074, Width: 32b; [0x074-0x077] CS deselect interval between two commands
commandInterval: '0x00000000'
# ---------------------------------------===== dataValidTime_0 [Optional] =====---------------------------------------
# Description: Offset: 0x00000078, Width: 16b; [0x078-0x07b] CLK edge to data valid time for PORT A and PORT B, in
# terms of 0.1ns
dataValidTime_0: '0x0000'
# ---------------------------------------===== dataValidTime_1 [Optional] =====---------------------------------------
# Description: Offset: 0x0000007A, Width: 16b; [0x078-0x07b] CLK edge to data valid time for PORT A and PORT B, in
# terms of 0.1ns
dataValidTime_1: '0x0000'
# -----------------------------------------===== busyOffset [Optional] =====------------------------------------------
# Description: Offset: 0x0000007C, Width: 16b; [0x07c-0x07d] Busy offset, valid value: 0-31
busyOffset: '0x0000'
# ---------------------------------------===== busyBitPolarity [Optional] =====---------------------------------------
# Description: Offset: 0x0000007E, Width: 16b; [0x07e-0x07f] Busy flag polarity, 0 - busy flag is 1 when flash device
# is busy, 1 - busy flag is 0 when flash device is busy
busyBitPolarity: '0x0000'
# -----------------------------------===== lookupTable_seq0_instr0 [Optional] =====-----------------------------------
# Description: Offset: 0x00000080, Width: 16b; Lookup table holds Flash command sequences 0, instruction 0
lookupTable_seq0_instr0:
# ------------------------------------------===== OPERAND [Optional] =====------------------------------------------
# Description: Offset: 0b, Width: 8b, Instruction operand. Its values depends on used instruction
OPERAND: 0
# -----------------------------------------===== NUM_PADS [Optional] =====------------------------------------------
# Description: Offset: 8b, Width: 2b, Number of pads used by instruction. Some instructions ignores this parameter.
# - 1PAD, (0): Single mode. One pad is used.
# - 2PAD, (1): Dual mode. Two pads are used.
# - 4PAD, (2): Quad mode. Four pads are used.
# - 8PAD, (3): Octal mode. Eight pads are used.
# Possible options: <1PAD, 2PAD, 4PAD, 8PAD>
NUM_PADS: 1PAD
# --------------------------------------===== OPERATION_CODE [Optional] =====---------------------------------------
# Description: Offset: 10b, Width: 6b, Instruction operation code.
# - STOP, (0): Stop execution and de-assert CS. Then, the next command sequence (to the same flash device) starts
# from instruction pointer 0.
# - CMD_SDR, (1): Transmit command code to Flash.
# - RADDR_SDR, (2): Transmit row address to Flash.
# - CADDR_SDR, (3): Transmit column address to Flash.
# - MODE1_SDR, (4): Transmit mode bits to Flash.
# - MODE2_SDR, (5): Transmit mode bits to Flash.
# - MODE4_SDR, (6): Transmit mode bits to Flash.
# - MODE8_SDR, (7): Transmit mode bits to Flash.
# - WRITE_SDR, (8): Transmit program data to Flash device.
# - READ_SDR, (9): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_SDR, (10): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_SDR, (11): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_SDR, (12): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_SDR, (13): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# - JMP_ON_CS, (31): Stop execution, de-assert CS and save operand[7:0] as the instruction start pointer for next
# sequence.Normally this instruction is used to support Execute-In-Place enhanced mode. See XIP enhanced mode for
# more details.This instruction is only allowed for AHB read commands. There is interrupt status bit set
# (INTR[IPCMDERR] or INTR[AHBCMDERR]) when using this instruction in IP command or AHB write command.
# - CMD_DDR, (33): Transmit command code to Flash.
# - RADDR_DDR, (34): Transmit row address to Flash.
# - CADDR_DDR, (35): Transmit column address to Flash.
# - MODE1_DDR, (36): Transmit mode bits to Flash.
# - MODE2_DDR, (37): Transmit mode bits to Flash.
# - MODE4_DDR, (38): Transmit mode bits to Flash.
# - MODE8_DDR, (39): Transmit mode bits to Flash.
# - WRITE_DDR, (40): Transmit program data to Flash device.
# - READ_DDR, (41): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_DDR, (42): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_DDR, (43): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_DDR, (44): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_DDR, (45): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# Possible options: <STOP, CMD_SDR, RADDR_SDR, CADDR_SDR, MODE1_SDR, MODE2_SDR, MODE4_SDR, MODE8_SDR, WRITE_SDR,
# READ_SDR, LEARN_SDR, DATSZ_SDR, DUMMY_SDR, DUMMY_RWDS_SDR, JMP_ON_CS, CMD_DDR, RADDR_DDR, CADDR_DDR, MODE1_DDR,
# MODE2_DDR, MODE4_DDR, MODE8_DDR, WRITE_DDR, READ_DDR, LEARN_DDR, DATSZ_DDR, DUMMY_DDR, DUMMY_RWDS_DDR>
OPERATION_CODE: STOP
lookupTable_seq0_instr1:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq0_instr2:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq0_instr3:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq0_instr4:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq0_instr5:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq0_instr6:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq0_instr7:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
# -----------------------------------===== lookupTable_seq1_instr0 [Optional] =====-----------------------------------
# Description: Offset: 0x00000090, Width: 16b; Lookup table holds Flash command sequences 1, instruction 0
lookupTable_seq1_instr0:
# ------------------------------------------===== OPERAND [Optional] =====------------------------------------------
# Description: Offset: 0b, Width: 8b, Instruction operand. Its values depends on used instruction
OPERAND: 0
# -----------------------------------------===== NUM_PADS [Optional] =====------------------------------------------
# Description: Offset: 8b, Width: 2b, Number of pads used by instruction. Some instructions ignores this parameter.
# - 1PAD, (0): Single mode. One pad is used.
# - 2PAD, (1): Dual mode. Two pads are used.
# - 4PAD, (2): Quad mode. Four pads are used.
# - 8PAD, (3): Octal mode. Eight pads are used.
# Possible options: <1PAD, 2PAD, 4PAD, 8PAD>
NUM_PADS: 1PAD
# --------------------------------------===== OPERATION_CODE [Optional] =====---------------------------------------
# Description: Offset: 10b, Width: 6b, Instruction operation code.
# - STOP, (0): Stop execution and de-assert CS. Then, the next command sequence (to the same flash device) starts
# from instruction pointer 0.
# - CMD_SDR, (1): Transmit command code to Flash.
# - RADDR_SDR, (2): Transmit row address to Flash.
# - CADDR_SDR, (3): Transmit column address to Flash.
# - MODE1_SDR, (4): Transmit mode bits to Flash.
# - MODE2_SDR, (5): Transmit mode bits to Flash.
# - MODE4_SDR, (6): Transmit mode bits to Flash.
# - MODE8_SDR, (7): Transmit mode bits to Flash.
# - WRITE_SDR, (8): Transmit program data to Flash device.
# - READ_SDR, (9): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_SDR, (10): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_SDR, (11): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_SDR, (12): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_SDR, (13): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# - JMP_ON_CS, (31): Stop execution, de-assert CS and save operand[7:0] as the instruction start pointer for next
# sequence.Normally this instruction is used to support Execute-In-Place enhanced mode. See XIP enhanced mode for
# more details.This instruction is only allowed for AHB read commands. There is interrupt status bit set
# (INTR[IPCMDERR] or INTR[AHBCMDERR]) when using this instruction in IP command or AHB write command.
# - CMD_DDR, (33): Transmit command code to Flash.
# - RADDR_DDR, (34): Transmit row address to Flash.
# - CADDR_DDR, (35): Transmit column address to Flash.
# - MODE1_DDR, (36): Transmit mode bits to Flash.
# - MODE2_DDR, (37): Transmit mode bits to Flash.
# - MODE4_DDR, (38): Transmit mode bits to Flash.
# - MODE8_DDR, (39): Transmit mode bits to Flash.
# - WRITE_DDR, (40): Transmit program data to Flash device.
# - READ_DDR, (41): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_DDR, (42): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_DDR, (43): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_DDR, (44): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_DDR, (45): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# Possible options: <STOP, CMD_SDR, RADDR_SDR, CADDR_SDR, MODE1_SDR, MODE2_SDR, MODE4_SDR, MODE8_SDR, WRITE_SDR,
# READ_SDR, LEARN_SDR, DATSZ_SDR, DUMMY_SDR, DUMMY_RWDS_SDR, JMP_ON_CS, CMD_DDR, RADDR_DDR, CADDR_DDR, MODE1_DDR,
# MODE2_DDR, MODE4_DDR, MODE8_DDR, WRITE_DDR, READ_DDR, LEARN_DDR, DATSZ_DDR, DUMMY_DDR, DUMMY_RWDS_DDR>
OPERATION_CODE: STOP
lookupTable_seq1_instr1:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq1_instr2:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq1_instr3:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq1_instr4:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq1_instr5:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq1_instr6:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq1_instr7:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
# -----------------------------------===== lookupTable_seq2_instr0 [Optional] =====-----------------------------------
# Description: Offset: 0x000000A0, Width: 16b; Lookup table holds Flash command sequences 2, instruction 0
lookupTable_seq2_instr0:
# ------------------------------------------===== OPERAND [Optional] =====------------------------------------------
# Description: Offset: 0b, Width: 8b, Instruction operand. Its values depends on used instruction
OPERAND: 0
# -----------------------------------------===== NUM_PADS [Optional] =====------------------------------------------
# Description: Offset: 8b, Width: 2b, Number of pads used by instruction. Some instructions ignores this parameter.
# - 1PAD, (0): Single mode. One pad is used.
# - 2PAD, (1): Dual mode. Two pads are used.
# - 4PAD, (2): Quad mode. Four pads are used.
# - 8PAD, (3): Octal mode. Eight pads are used.
# Possible options: <1PAD, 2PAD, 4PAD, 8PAD>
NUM_PADS: 1PAD
# --------------------------------------===== OPERATION_CODE [Optional] =====---------------------------------------
# Description: Offset: 10b, Width: 6b, Instruction operation code.
# - STOP, (0): Stop execution and de-assert CS. Then, the next command sequence (to the same flash device) starts
# from instruction pointer 0.
# - CMD_SDR, (1): Transmit command code to Flash.
# - RADDR_SDR, (2): Transmit row address to Flash.
# - CADDR_SDR, (3): Transmit column address to Flash.
# - MODE1_SDR, (4): Transmit mode bits to Flash.
# - MODE2_SDR, (5): Transmit mode bits to Flash.
# - MODE4_SDR, (6): Transmit mode bits to Flash.
# - MODE8_SDR, (7): Transmit mode bits to Flash.
# - WRITE_SDR, (8): Transmit program data to Flash device.
# - READ_SDR, (9): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_SDR, (10): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_SDR, (11): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_SDR, (12): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_SDR, (13): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# - JMP_ON_CS, (31): Stop execution, de-assert CS and save operand[7:0] as the instruction start pointer for next
# sequence.Normally this instruction is used to support Execute-In-Place enhanced mode. See XIP enhanced mode for
# more details.This instruction is only allowed for AHB read commands. There is interrupt status bit set
# (INTR[IPCMDERR] or INTR[AHBCMDERR]) when using this instruction in IP command or AHB write command.
# - CMD_DDR, (33): Transmit command code to Flash.
# - RADDR_DDR, (34): Transmit row address to Flash.
# - CADDR_DDR, (35): Transmit column address to Flash.
# - MODE1_DDR, (36): Transmit mode bits to Flash.
# - MODE2_DDR, (37): Transmit mode bits to Flash.
# - MODE4_DDR, (38): Transmit mode bits to Flash.
# - MODE8_DDR, (39): Transmit mode bits to Flash.
# - WRITE_DDR, (40): Transmit program data to Flash device.
# - READ_DDR, (41): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_DDR, (42): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_DDR, (43): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_DDR, (44): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_DDR, (45): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# Possible options: <STOP, CMD_SDR, RADDR_SDR, CADDR_SDR, MODE1_SDR, MODE2_SDR, MODE4_SDR, MODE8_SDR, WRITE_SDR,
# READ_SDR, LEARN_SDR, DATSZ_SDR, DUMMY_SDR, DUMMY_RWDS_SDR, JMP_ON_CS, CMD_DDR, RADDR_DDR, CADDR_DDR, MODE1_DDR,
# MODE2_DDR, MODE4_DDR, MODE8_DDR, WRITE_DDR, READ_DDR, LEARN_DDR, DATSZ_DDR, DUMMY_DDR, DUMMY_RWDS_DDR>
OPERATION_CODE: STOP
lookupTable_seq2_instr1:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq2_instr2:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq2_instr3:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq2_instr4:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq2_instr5:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq2_instr6:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq2_instr7:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
# -----------------------------------===== lookupTable_seq3_instr0 [Optional] =====-----------------------------------
# Description: Offset: 0x000000B0, Width: 16b; Lookup table holds Flash command sequences 3, instruction 0
lookupTable_seq3_instr0:
# ------------------------------------------===== OPERAND [Optional] =====------------------------------------------
# Description: Offset: 0b, Width: 8b, Instruction operand. Its values depends on used instruction
OPERAND: 0
# -----------------------------------------===== NUM_PADS [Optional] =====------------------------------------------
# Description: Offset: 8b, Width: 2b, Number of pads used by instruction. Some instructions ignores this parameter.
# - 1PAD, (0): Single mode. One pad is used.
# - 2PAD, (1): Dual mode. Two pads are used.
# - 4PAD, (2): Quad mode. Four pads are used.
# - 8PAD, (3): Octal mode. Eight pads are used.
# Possible options: <1PAD, 2PAD, 4PAD, 8PAD>
NUM_PADS: 1PAD
# --------------------------------------===== OPERATION_CODE [Optional] =====---------------------------------------
# Description: Offset: 10b, Width: 6b, Instruction operation code.
# - STOP, (0): Stop execution and de-assert CS. Then, the next command sequence (to the same flash device) starts
# from instruction pointer 0.
# - CMD_SDR, (1): Transmit command code to Flash.
# - RADDR_SDR, (2): Transmit row address to Flash.
# - CADDR_SDR, (3): Transmit column address to Flash.
# - MODE1_SDR, (4): Transmit mode bits to Flash.
# - MODE2_SDR, (5): Transmit mode bits to Flash.
# - MODE4_SDR, (6): Transmit mode bits to Flash.
# - MODE8_SDR, (7): Transmit mode bits to Flash.
# - WRITE_SDR, (8): Transmit program data to Flash device.
# - READ_SDR, (9): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_SDR, (10): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_SDR, (11): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_SDR, (12): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_SDR, (13): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# - JMP_ON_CS, (31): Stop execution, de-assert CS and save operand[7:0] as the instruction start pointer for next
# sequence.Normally this instruction is used to support Execute-In-Place enhanced mode. See XIP enhanced mode for
# more details.This instruction is only allowed for AHB read commands. There is interrupt status bit set
# (INTR[IPCMDERR] or INTR[AHBCMDERR]) when using this instruction in IP command or AHB write command.
# - CMD_DDR, (33): Transmit command code to Flash.
# - RADDR_DDR, (34): Transmit row address to Flash.
# - CADDR_DDR, (35): Transmit column address to Flash.
# - MODE1_DDR, (36): Transmit mode bits to Flash.
# - MODE2_DDR, (37): Transmit mode bits to Flash.
# - MODE4_DDR, (38): Transmit mode bits to Flash.
# - MODE8_DDR, (39): Transmit mode bits to Flash.
# - WRITE_DDR, (40): Transmit program data to Flash device.
# - READ_DDR, (41): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_DDR, (42): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_DDR, (43): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_DDR, (44): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_DDR, (45): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# Possible options: <STOP, CMD_SDR, RADDR_SDR, CADDR_SDR, MODE1_SDR, MODE2_SDR, MODE4_SDR, MODE8_SDR, WRITE_SDR,
# READ_SDR, LEARN_SDR, DATSZ_SDR, DUMMY_SDR, DUMMY_RWDS_SDR, JMP_ON_CS, CMD_DDR, RADDR_DDR, CADDR_DDR, MODE1_DDR,
# MODE2_DDR, MODE4_DDR, MODE8_DDR, WRITE_DDR, READ_DDR, LEARN_DDR, DATSZ_DDR, DUMMY_DDR, DUMMY_RWDS_DDR>
OPERATION_CODE: STOP
lookupTable_seq3_instr1:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq3_instr2:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq3_instr3:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq3_instr4:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq3_instr5:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq3_instr6:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq3_instr7:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
# -----------------------------------===== lookupTable_seq4_instr0 [Optional] =====-----------------------------------
# Description: Offset: 0x000000C0, Width: 16b; Lookup table holds Flash command sequences 4, instruction 0
lookupTable_seq4_instr0:
# ------------------------------------------===== OPERAND [Optional] =====------------------------------------------
# Description: Offset: 0b, Width: 8b, Instruction operand. Its values depends on used instruction
OPERAND: 0
# -----------------------------------------===== NUM_PADS [Optional] =====------------------------------------------
# Description: Offset: 8b, Width: 2b, Number of pads used by instruction. Some instructions ignores this parameter.
# - 1PAD, (0): Single mode. One pad is used.
# - 2PAD, (1): Dual mode. Two pads are used.
# - 4PAD, (2): Quad mode. Four pads are used.
# - 8PAD, (3): Octal mode. Eight pads are used.
# Possible options: <1PAD, 2PAD, 4PAD, 8PAD>
NUM_PADS: 1PAD
# --------------------------------------===== OPERATION_CODE [Optional] =====---------------------------------------
# Description: Offset: 10b, Width: 6b, Instruction operation code.
# - STOP, (0): Stop execution and de-assert CS. Then, the next command sequence (to the same flash device) starts
# from instruction pointer 0.
# - CMD_SDR, (1): Transmit command code to Flash.
# - RADDR_SDR, (2): Transmit row address to Flash.
# - CADDR_SDR, (3): Transmit column address to Flash.
# - MODE1_SDR, (4): Transmit mode bits to Flash.
# - MODE2_SDR, (5): Transmit mode bits to Flash.
# - MODE4_SDR, (6): Transmit mode bits to Flash.
# - MODE8_SDR, (7): Transmit mode bits to Flash.
# - WRITE_SDR, (8): Transmit program data to Flash device.
# - READ_SDR, (9): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_SDR, (10): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_SDR, (11): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_SDR, (12): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_SDR, (13): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# - JMP_ON_CS, (31): Stop execution, de-assert CS and save operand[7:0] as the instruction start pointer for next
# sequence.Normally this instruction is used to support Execute-In-Place enhanced mode. See XIP enhanced mode for
# more details.This instruction is only allowed for AHB read commands. There is interrupt status bit set
# (INTR[IPCMDERR] or INTR[AHBCMDERR]) when using this instruction in IP command or AHB write command.
# - CMD_DDR, (33): Transmit command code to Flash.
# - RADDR_DDR, (34): Transmit row address to Flash.
# - CADDR_DDR, (35): Transmit column address to Flash.
# - MODE1_DDR, (36): Transmit mode bits to Flash.
# - MODE2_DDR, (37): Transmit mode bits to Flash.
# - MODE4_DDR, (38): Transmit mode bits to Flash.
# - MODE8_DDR, (39): Transmit mode bits to Flash.
# - WRITE_DDR, (40): Transmit program data to Flash device.
# - READ_DDR, (41): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_DDR, (42): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_DDR, (43): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_DDR, (44): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_DDR, (45): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# Possible options: <STOP, CMD_SDR, RADDR_SDR, CADDR_SDR, MODE1_SDR, MODE2_SDR, MODE4_SDR, MODE8_SDR, WRITE_SDR,
# READ_SDR, LEARN_SDR, DATSZ_SDR, DUMMY_SDR, DUMMY_RWDS_SDR, JMP_ON_CS, CMD_DDR, RADDR_DDR, CADDR_DDR, MODE1_DDR,
# MODE2_DDR, MODE4_DDR, MODE8_DDR, WRITE_DDR, READ_DDR, LEARN_DDR, DATSZ_DDR, DUMMY_DDR, DUMMY_RWDS_DDR>
OPERATION_CODE: STOP
lookupTable_seq4_instr1:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq4_instr2:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq4_instr3:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq4_instr4:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq4_instr5:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq4_instr6:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq4_instr7:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
# -----------------------------------===== lookupTable_seq5_instr0 [Optional] =====-----------------------------------
# Description: Offset: 0x000000D0, Width: 16b; Lookup table holds Flash command sequences 5, instruction 0
lookupTable_seq5_instr0:
# ------------------------------------------===== OPERAND [Optional] =====------------------------------------------
# Description: Offset: 0b, Width: 8b, Instruction operand. Its values depends on used instruction
OPERAND: 0
# -----------------------------------------===== NUM_PADS [Optional] =====------------------------------------------
# Description: Offset: 8b, Width: 2b, Number of pads used by instruction. Some instructions ignores this parameter.
# - 1PAD, (0): Single mode. One pad is used.
# - 2PAD, (1): Dual mode. Two pads are used.
# - 4PAD, (2): Quad mode. Four pads are used.
# - 8PAD, (3): Octal mode. Eight pads are used.
# Possible options: <1PAD, 2PAD, 4PAD, 8PAD>
NUM_PADS: 1PAD
# --------------------------------------===== OPERATION_CODE [Optional] =====---------------------------------------
# Description: Offset: 10b, Width: 6b, Instruction operation code.
# - STOP, (0): Stop execution and de-assert CS. Then, the next command sequence (to the same flash device) starts
# from instruction pointer 0.
# - CMD_SDR, (1): Transmit command code to Flash.
# - RADDR_SDR, (2): Transmit row address to Flash.
# - CADDR_SDR, (3): Transmit column address to Flash.
# - MODE1_SDR, (4): Transmit mode bits to Flash.
# - MODE2_SDR, (5): Transmit mode bits to Flash.
# - MODE4_SDR, (6): Transmit mode bits to Flash.
# - MODE8_SDR, (7): Transmit mode bits to Flash.
# - WRITE_SDR, (8): Transmit program data to Flash device.
# - READ_SDR, (9): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_SDR, (10): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_SDR, (11): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_SDR, (12): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_SDR, (13): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# - JMP_ON_CS, (31): Stop execution, de-assert CS and save operand[7:0] as the instruction start pointer for next
# sequence.Normally this instruction is used to support Execute-In-Place enhanced mode. See XIP enhanced mode for
# more details.This instruction is only allowed for AHB read commands. There is interrupt status bit set
# (INTR[IPCMDERR] or INTR[AHBCMDERR]) when using this instruction in IP command or AHB write command.
# - CMD_DDR, (33): Transmit command code to Flash.
# - RADDR_DDR, (34): Transmit row address to Flash.
# - CADDR_DDR, (35): Transmit column address to Flash.
# - MODE1_DDR, (36): Transmit mode bits to Flash.
# - MODE2_DDR, (37): Transmit mode bits to Flash.
# - MODE4_DDR, (38): Transmit mode bits to Flash.
# - MODE8_DDR, (39): Transmit mode bits to Flash.
# - WRITE_DDR, (40): Transmit program data to Flash device.
# - READ_DDR, (41): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_DDR, (42): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_DDR, (43): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_DDR, (44): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_DDR, (45): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# Possible options: <STOP, CMD_SDR, RADDR_SDR, CADDR_SDR, MODE1_SDR, MODE2_SDR, MODE4_SDR, MODE8_SDR, WRITE_SDR,
# READ_SDR, LEARN_SDR, DATSZ_SDR, DUMMY_SDR, DUMMY_RWDS_SDR, JMP_ON_CS, CMD_DDR, RADDR_DDR, CADDR_DDR, MODE1_DDR,
# MODE2_DDR, MODE4_DDR, MODE8_DDR, WRITE_DDR, READ_DDR, LEARN_DDR, DATSZ_DDR, DUMMY_DDR, DUMMY_RWDS_DDR>
OPERATION_CODE: STOP
lookupTable_seq5_instr1:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq5_instr2:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq5_instr3:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq5_instr4:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq5_instr5:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq5_instr6:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq5_instr7:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
# -----------------------------------===== lookupTable_seq6_instr0 [Optional] =====-----------------------------------
# Description: Offset: 0x000000E0, Width: 16b; Lookup table holds Flash command sequences 6, instruction 0
lookupTable_seq6_instr0:
# ------------------------------------------===== OPERAND [Optional] =====------------------------------------------
# Description: Offset: 0b, Width: 8b, Instruction operand. Its values depends on used instruction
OPERAND: 0
# -----------------------------------------===== NUM_PADS [Optional] =====------------------------------------------
# Description: Offset: 8b, Width: 2b, Number of pads used by instruction. Some instructions ignores this parameter.
# - 1PAD, (0): Single mode. One pad is used.
# - 2PAD, (1): Dual mode. Two pads are used.
# - 4PAD, (2): Quad mode. Four pads are used.
# - 8PAD, (3): Octal mode. Eight pads are used.
# Possible options: <1PAD, 2PAD, 4PAD, 8PAD>
NUM_PADS: 1PAD
# --------------------------------------===== OPERATION_CODE [Optional] =====---------------------------------------
# Description: Offset: 10b, Width: 6b, Instruction operation code.
# - STOP, (0): Stop execution and de-assert CS. Then, the next command sequence (to the same flash device) starts
# from instruction pointer 0.
# - CMD_SDR, (1): Transmit command code to Flash.
# - RADDR_SDR, (2): Transmit row address to Flash.
# - CADDR_SDR, (3): Transmit column address to Flash.
# - MODE1_SDR, (4): Transmit mode bits to Flash.
# - MODE2_SDR, (5): Transmit mode bits to Flash.
# - MODE4_SDR, (6): Transmit mode bits to Flash.
# - MODE8_SDR, (7): Transmit mode bits to Flash.
# - WRITE_SDR, (8): Transmit program data to Flash device.
# - READ_SDR, (9): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_SDR, (10): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_SDR, (11): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_SDR, (12): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_SDR, (13): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# - JMP_ON_CS, (31): Stop execution, de-assert CS and save operand[7:0] as the instruction start pointer for next
# sequence.Normally this instruction is used to support Execute-In-Place enhanced mode. See XIP enhanced mode for
# more details.This instruction is only allowed for AHB read commands. There is interrupt status bit set
# (INTR[IPCMDERR] or INTR[AHBCMDERR]) when using this instruction in IP command or AHB write command.
# - CMD_DDR, (33): Transmit command code to Flash.
# - RADDR_DDR, (34): Transmit row address to Flash.
# - CADDR_DDR, (35): Transmit column address to Flash.
# - MODE1_DDR, (36): Transmit mode bits to Flash.
# - MODE2_DDR, (37): Transmit mode bits to Flash.
# - MODE4_DDR, (38): Transmit mode bits to Flash.
# - MODE8_DDR, (39): Transmit mode bits to Flash.
# - WRITE_DDR, (40): Transmit program data to Flash device.
# - READ_DDR, (41): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_DDR, (42): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_DDR, (43): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_DDR, (44): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_DDR, (45): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# Possible options: <STOP, CMD_SDR, RADDR_SDR, CADDR_SDR, MODE1_SDR, MODE2_SDR, MODE4_SDR, MODE8_SDR, WRITE_SDR,
# READ_SDR, LEARN_SDR, DATSZ_SDR, DUMMY_SDR, DUMMY_RWDS_SDR, JMP_ON_CS, CMD_DDR, RADDR_DDR, CADDR_DDR, MODE1_DDR,
# MODE2_DDR, MODE4_DDR, MODE8_DDR, WRITE_DDR, READ_DDR, LEARN_DDR, DATSZ_DDR, DUMMY_DDR, DUMMY_RWDS_DDR>
OPERATION_CODE: STOP
lookupTable_seq6_instr1:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq6_instr2:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq6_instr3:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq6_instr4:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq6_instr5:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq6_instr6:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq6_instr7:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
# -----------------------------------===== lookupTable_seq7_instr0 [Optional] =====-----------------------------------
# Description: Offset: 0x000000F0, Width: 16b; Lookup table holds Flash command sequences 7, instruction 0
lookupTable_seq7_instr0:
# ------------------------------------------===== OPERAND [Optional] =====------------------------------------------
# Description: Offset: 0b, Width: 8b, Instruction operand. Its values depends on used instruction
OPERAND: 0
# -----------------------------------------===== NUM_PADS [Optional] =====------------------------------------------
# Description: Offset: 8b, Width: 2b, Number of pads used by instruction. Some instructions ignores this parameter.
# - 1PAD, (0): Single mode. One pad is used.
# - 2PAD, (1): Dual mode. Two pads are used.
# - 4PAD, (2): Quad mode. Four pads are used.
# - 8PAD, (3): Octal mode. Eight pads are used.
# Possible options: <1PAD, 2PAD, 4PAD, 8PAD>
NUM_PADS: 1PAD
# --------------------------------------===== OPERATION_CODE [Optional] =====---------------------------------------
# Description: Offset: 10b, Width: 6b, Instruction operation code.
# - STOP, (0): Stop execution and de-assert CS. Then, the next command sequence (to the same flash device) starts
# from instruction pointer 0.
# - CMD_SDR, (1): Transmit command code to Flash.
# - RADDR_SDR, (2): Transmit row address to Flash.
# - CADDR_SDR, (3): Transmit column address to Flash.
# - MODE1_SDR, (4): Transmit mode bits to Flash.
# - MODE2_SDR, (5): Transmit mode bits to Flash.
# - MODE4_SDR, (6): Transmit mode bits to Flash.
# - MODE8_SDR, (7): Transmit mode bits to Flash.
# - WRITE_SDR, (8): Transmit program data to Flash device.
# - READ_SDR, (9): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_SDR, (10): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_SDR, (11): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_SDR, (12): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_SDR, (13): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# - JMP_ON_CS, (31): Stop execution, de-assert CS and save operand[7:0] as the instruction start pointer for next
# sequence.Normally this instruction is used to support Execute-In-Place enhanced mode. See XIP enhanced mode for
# more details.This instruction is only allowed for AHB read commands. There is interrupt status bit set
# (INTR[IPCMDERR] or INTR[AHBCMDERR]) when using this instruction in IP command or AHB write command.
# - CMD_DDR, (33): Transmit command code to Flash.
# - RADDR_DDR, (34): Transmit row address to Flash.
# - CADDR_DDR, (35): Transmit column address to Flash.
# - MODE1_DDR, (36): Transmit mode bits to Flash.
# - MODE2_DDR, (37): Transmit mode bits to Flash.
# - MODE4_DDR, (38): Transmit mode bits to Flash.
# - MODE8_DDR, (39): Transmit mode bits to Flash.
# - WRITE_DDR, (40): Transmit program data to Flash device.
# - READ_DDR, (41): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_DDR, (42): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_DDR, (43): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_DDR, (44): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_DDR, (45): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# Possible options: <STOP, CMD_SDR, RADDR_SDR, CADDR_SDR, MODE1_SDR, MODE2_SDR, MODE4_SDR, MODE8_SDR, WRITE_SDR,
# READ_SDR, LEARN_SDR, DATSZ_SDR, DUMMY_SDR, DUMMY_RWDS_SDR, JMP_ON_CS, CMD_DDR, RADDR_DDR, CADDR_DDR, MODE1_DDR,
# MODE2_DDR, MODE4_DDR, MODE8_DDR, WRITE_DDR, READ_DDR, LEARN_DDR, DATSZ_DDR, DUMMY_DDR, DUMMY_RWDS_DDR>
OPERATION_CODE: STOP
lookupTable_seq7_instr1:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq7_instr2:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq7_instr3:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq7_instr4:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq7_instr5:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq7_instr6:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq7_instr7:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
# -----------------------------------===== lookupTable_seq8_instr0 [Optional] =====-----------------------------------
# Description: Offset: 0x00000100, Width: 16b; Lookup table holds Flash command sequences 8, instruction 0
lookupTable_seq8_instr0:
# ------------------------------------------===== OPERAND [Optional] =====------------------------------------------
# Description: Offset: 0b, Width: 8b, Instruction operand. Its values depends on used instruction
OPERAND: 0
# -----------------------------------------===== NUM_PADS [Optional] =====------------------------------------------
# Description: Offset: 8b, Width: 2b, Number of pads used by instruction. Some instructions ignores this parameter.
# - 1PAD, (0): Single mode. One pad is used.
# - 2PAD, (1): Dual mode. Two pads are used.
# - 4PAD, (2): Quad mode. Four pads are used.
# - 8PAD, (3): Octal mode. Eight pads are used.
# Possible options: <1PAD, 2PAD, 4PAD, 8PAD>
NUM_PADS: 1PAD
# --------------------------------------===== OPERATION_CODE [Optional] =====---------------------------------------
# Description: Offset: 10b, Width: 6b, Instruction operation code.
# - STOP, (0): Stop execution and de-assert CS. Then, the next command sequence (to the same flash device) starts
# from instruction pointer 0.
# - CMD_SDR, (1): Transmit command code to Flash.
# - RADDR_SDR, (2): Transmit row address to Flash.
# - CADDR_SDR, (3): Transmit column address to Flash.
# - MODE1_SDR, (4): Transmit mode bits to Flash.
# - MODE2_SDR, (5): Transmit mode bits to Flash.
# - MODE4_SDR, (6): Transmit mode bits to Flash.
# - MODE8_SDR, (7): Transmit mode bits to Flash.
# - WRITE_SDR, (8): Transmit program data to Flash device.
# - READ_SDR, (9): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_SDR, (10): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_SDR, (11): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_SDR, (12): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_SDR, (13): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# - JMP_ON_CS, (31): Stop execution, de-assert CS and save operand[7:0] as the instruction start pointer for next
# sequence.Normally this instruction is used to support Execute-In-Place enhanced mode. See XIP enhanced mode for
# more details.This instruction is only allowed for AHB read commands. There is interrupt status bit set
# (INTR[IPCMDERR] or INTR[AHBCMDERR]) when using this instruction in IP command or AHB write command.
# - CMD_DDR, (33): Transmit command code to Flash.
# - RADDR_DDR, (34): Transmit row address to Flash.
# - CADDR_DDR, (35): Transmit column address to Flash.
# - MODE1_DDR, (36): Transmit mode bits to Flash.
# - MODE2_DDR, (37): Transmit mode bits to Flash.
# - MODE4_DDR, (38): Transmit mode bits to Flash.
# - MODE8_DDR, (39): Transmit mode bits to Flash.
# - WRITE_DDR, (40): Transmit program data to Flash device.
# - READ_DDR, (41): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_DDR, (42): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_DDR, (43): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_DDR, (44): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_DDR, (45): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# Possible options: <STOP, CMD_SDR, RADDR_SDR, CADDR_SDR, MODE1_SDR, MODE2_SDR, MODE4_SDR, MODE8_SDR, WRITE_SDR,
# READ_SDR, LEARN_SDR, DATSZ_SDR, DUMMY_SDR, DUMMY_RWDS_SDR, JMP_ON_CS, CMD_DDR, RADDR_DDR, CADDR_DDR, MODE1_DDR,
# MODE2_DDR, MODE4_DDR, MODE8_DDR, WRITE_DDR, READ_DDR, LEARN_DDR, DATSZ_DDR, DUMMY_DDR, DUMMY_RWDS_DDR>
OPERATION_CODE: STOP
lookupTable_seq8_instr1:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq8_instr2:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq8_instr3:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq8_instr4:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq8_instr5:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq8_instr6:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq8_instr7:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
# -----------------------------------===== lookupTable_seq9_instr0 [Optional] =====-----------------------------------
# Description: Offset: 0x00000110, Width: 16b; Lookup table holds Flash command sequences 9, instruction 0
lookupTable_seq9_instr0:
# ------------------------------------------===== OPERAND [Optional] =====------------------------------------------
# Description: Offset: 0b, Width: 8b, Instruction operand. Its values depends on used instruction
OPERAND: 0
# -----------------------------------------===== NUM_PADS [Optional] =====------------------------------------------
# Description: Offset: 8b, Width: 2b, Number of pads used by instruction. Some instructions ignores this parameter.
# - 1PAD, (0): Single mode. One pad is used.
# - 2PAD, (1): Dual mode. Two pads are used.
# - 4PAD, (2): Quad mode. Four pads are used.
# - 8PAD, (3): Octal mode. Eight pads are used.
# Possible options: <1PAD, 2PAD, 4PAD, 8PAD>
NUM_PADS: 1PAD
# --------------------------------------===== OPERATION_CODE [Optional] =====---------------------------------------
# Description: Offset: 10b, Width: 6b, Instruction operation code.
# - STOP, (0): Stop execution and de-assert CS. Then, the next command sequence (to the same flash device) starts
# from instruction pointer 0.
# - CMD_SDR, (1): Transmit command code to Flash.
# - RADDR_SDR, (2): Transmit row address to Flash.
# - CADDR_SDR, (3): Transmit column address to Flash.
# - MODE1_SDR, (4): Transmit mode bits to Flash.
# - MODE2_SDR, (5): Transmit mode bits to Flash.
# - MODE4_SDR, (6): Transmit mode bits to Flash.
# - MODE8_SDR, (7): Transmit mode bits to Flash.
# - WRITE_SDR, (8): Transmit program data to Flash device.
# - READ_SDR, (9): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_SDR, (10): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_SDR, (11): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_SDR, (12): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_SDR, (13): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# - JMP_ON_CS, (31): Stop execution, de-assert CS and save operand[7:0] as the instruction start pointer for next
# sequence.Normally this instruction is used to support Execute-In-Place enhanced mode. See XIP enhanced mode for
# more details.This instruction is only allowed for AHB read commands. There is interrupt status bit set
# (INTR[IPCMDERR] or INTR[AHBCMDERR]) when using this instruction in IP command or AHB write command.
# - CMD_DDR, (33): Transmit command code to Flash.
# - RADDR_DDR, (34): Transmit row address to Flash.
# - CADDR_DDR, (35): Transmit column address to Flash.
# - MODE1_DDR, (36): Transmit mode bits to Flash.
# - MODE2_DDR, (37): Transmit mode bits to Flash.
# - MODE4_DDR, (38): Transmit mode bits to Flash.
# - MODE8_DDR, (39): Transmit mode bits to Flash.
# - WRITE_DDR, (40): Transmit program data to Flash device.
# - READ_DDR, (41): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_DDR, (42): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_DDR, (43): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_DDR, (44): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_DDR, (45): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# Possible options: <STOP, CMD_SDR, RADDR_SDR, CADDR_SDR, MODE1_SDR, MODE2_SDR, MODE4_SDR, MODE8_SDR, WRITE_SDR,
# READ_SDR, LEARN_SDR, DATSZ_SDR, DUMMY_SDR, DUMMY_RWDS_SDR, JMP_ON_CS, CMD_DDR, RADDR_DDR, CADDR_DDR, MODE1_DDR,
# MODE2_DDR, MODE4_DDR, MODE8_DDR, WRITE_DDR, READ_DDR, LEARN_DDR, DATSZ_DDR, DUMMY_DDR, DUMMY_RWDS_DDR>
OPERATION_CODE: STOP
lookupTable_seq9_instr1:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq9_instr2:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq9_instr3:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq9_instr4:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq9_instr5:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq9_instr6:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq9_instr7:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
# ----------------------------------===== lookupTable_seq10_instr0 [Optional] =====-----------------------------------
# Description: Offset: 0x00000120, Width: 16b; Lookup table holds Flash command sequences 10, instruction 0
lookupTable_seq10_instr0:
# ------------------------------------------===== OPERAND [Optional] =====------------------------------------------
# Description: Offset: 0b, Width: 8b, Instruction operand. Its values depends on used instruction
OPERAND: 0
# -----------------------------------------===== NUM_PADS [Optional] =====------------------------------------------
# Description: Offset: 8b, Width: 2b, Number of pads used by instruction. Some instructions ignores this parameter.
# - 1PAD, (0): Single mode. One pad is used.
# - 2PAD, (1): Dual mode. Two pads are used.
# - 4PAD, (2): Quad mode. Four pads are used.
# - 8PAD, (3): Octal mode. Eight pads are used.
# Possible options: <1PAD, 2PAD, 4PAD, 8PAD>
NUM_PADS: 1PAD
# --------------------------------------===== OPERATION_CODE [Optional] =====---------------------------------------
# Description: Offset: 10b, Width: 6b, Instruction operation code.
# - STOP, (0): Stop execution and de-assert CS. Then, the next command sequence (to the same flash device) starts
# from instruction pointer 0.
# - CMD_SDR, (1): Transmit command code to Flash.
# - RADDR_SDR, (2): Transmit row address to Flash.
# - CADDR_SDR, (3): Transmit column address to Flash.
# - MODE1_SDR, (4): Transmit mode bits to Flash.
# - MODE2_SDR, (5): Transmit mode bits to Flash.
# - MODE4_SDR, (6): Transmit mode bits to Flash.
# - MODE8_SDR, (7): Transmit mode bits to Flash.
# - WRITE_SDR, (8): Transmit program data to Flash device.
# - READ_SDR, (9): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_SDR, (10): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_SDR, (11): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_SDR, (12): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_SDR, (13): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# - JMP_ON_CS, (31): Stop execution, de-assert CS and save operand[7:0] as the instruction start pointer for next
# sequence.Normally this instruction is used to support Execute-In-Place enhanced mode. See XIP enhanced mode for
# more details.This instruction is only allowed for AHB read commands. There is interrupt status bit set
# (INTR[IPCMDERR] or INTR[AHBCMDERR]) when using this instruction in IP command or AHB write command.
# - CMD_DDR, (33): Transmit command code to Flash.
# - RADDR_DDR, (34): Transmit row address to Flash.
# - CADDR_DDR, (35): Transmit column address to Flash.
# - MODE1_DDR, (36): Transmit mode bits to Flash.
# - MODE2_DDR, (37): Transmit mode bits to Flash.
# - MODE4_DDR, (38): Transmit mode bits to Flash.
# - MODE8_DDR, (39): Transmit mode bits to Flash.
# - WRITE_DDR, (40): Transmit program data to Flash device.
# - READ_DDR, (41): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_DDR, (42): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_DDR, (43): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_DDR, (44): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_DDR, (45): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# Possible options: <STOP, CMD_SDR, RADDR_SDR, CADDR_SDR, MODE1_SDR, MODE2_SDR, MODE4_SDR, MODE8_SDR, WRITE_SDR,
# READ_SDR, LEARN_SDR, DATSZ_SDR, DUMMY_SDR, DUMMY_RWDS_SDR, JMP_ON_CS, CMD_DDR, RADDR_DDR, CADDR_DDR, MODE1_DDR,
# MODE2_DDR, MODE4_DDR, MODE8_DDR, WRITE_DDR, READ_DDR, LEARN_DDR, DATSZ_DDR, DUMMY_DDR, DUMMY_RWDS_DDR>
OPERATION_CODE: STOP
lookupTable_seq10_instr1:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq10_instr2:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq10_instr3:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq10_instr4:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq10_instr5:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq10_instr6:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq10_instr7:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
# ----------------------------------===== lookupTable_seq11_instr0 [Optional] =====-----------------------------------
# Description: Offset: 0x00000130, Width: 16b; Lookup table holds Flash command sequences 11, instruction 0
lookupTable_seq11_instr0:
# ------------------------------------------===== OPERAND [Optional] =====------------------------------------------
# Description: Offset: 0b, Width: 8b, Instruction operand. Its values depends on used instruction
OPERAND: 0
# -----------------------------------------===== NUM_PADS [Optional] =====------------------------------------------
# Description: Offset: 8b, Width: 2b, Number of pads used by instruction. Some instructions ignores this parameter.
# - 1PAD, (0): Single mode. One pad is used.
# - 2PAD, (1): Dual mode. Two pads are used.
# - 4PAD, (2): Quad mode. Four pads are used.
# - 8PAD, (3): Octal mode. Eight pads are used.
# Possible options: <1PAD, 2PAD, 4PAD, 8PAD>
NUM_PADS: 1PAD
# --------------------------------------===== OPERATION_CODE [Optional] =====---------------------------------------
# Description: Offset: 10b, Width: 6b, Instruction operation code.
# - STOP, (0): Stop execution and de-assert CS. Then, the next command sequence (to the same flash device) starts
# from instruction pointer 0.
# - CMD_SDR, (1): Transmit command code to Flash.
# - RADDR_SDR, (2): Transmit row address to Flash.
# - CADDR_SDR, (3): Transmit column address to Flash.
# - MODE1_SDR, (4): Transmit mode bits to Flash.
# - MODE2_SDR, (5): Transmit mode bits to Flash.
# - MODE4_SDR, (6): Transmit mode bits to Flash.
# - MODE8_SDR, (7): Transmit mode bits to Flash.
# - WRITE_SDR, (8): Transmit program data to Flash device.
# - READ_SDR, (9): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_SDR, (10): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_SDR, (11): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_SDR, (12): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_SDR, (13): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# - JMP_ON_CS, (31): Stop execution, de-assert CS and save operand[7:0] as the instruction start pointer for next
# sequence.Normally this instruction is used to support Execute-In-Place enhanced mode. See XIP enhanced mode for
# more details.This instruction is only allowed for AHB read commands. There is interrupt status bit set
# (INTR[IPCMDERR] or INTR[AHBCMDERR]) when using this instruction in IP command or AHB write command.
# - CMD_DDR, (33): Transmit command code to Flash.
# - RADDR_DDR, (34): Transmit row address to Flash.
# - CADDR_DDR, (35): Transmit column address to Flash.
# - MODE1_DDR, (36): Transmit mode bits to Flash.
# - MODE2_DDR, (37): Transmit mode bits to Flash.
# - MODE4_DDR, (38): Transmit mode bits to Flash.
# - MODE8_DDR, (39): Transmit mode bits to Flash.
# - WRITE_DDR, (40): Transmit program data to Flash device.
# - READ_DDR, (41): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_DDR, (42): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_DDR, (43): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_DDR, (44): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_DDR, (45): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# Possible options: <STOP, CMD_SDR, RADDR_SDR, CADDR_SDR, MODE1_SDR, MODE2_SDR, MODE4_SDR, MODE8_SDR, WRITE_SDR,
# READ_SDR, LEARN_SDR, DATSZ_SDR, DUMMY_SDR, DUMMY_RWDS_SDR, JMP_ON_CS, CMD_DDR, RADDR_DDR, CADDR_DDR, MODE1_DDR,
# MODE2_DDR, MODE4_DDR, MODE8_DDR, WRITE_DDR, READ_DDR, LEARN_DDR, DATSZ_DDR, DUMMY_DDR, DUMMY_RWDS_DDR>
OPERATION_CODE: STOP
lookupTable_seq11_instr1:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq11_instr2:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq11_instr3:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq11_instr4:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq11_instr5:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq11_instr6:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq11_instr7:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
# ----------------------------------===== lookupTable_seq12_instr0 [Optional] =====-----------------------------------
# Description: Offset: 0x00000140, Width: 16b; Lookup table holds Flash command sequences 12, instruction 0
lookupTable_seq12_instr0:
# ------------------------------------------===== OPERAND [Optional] =====------------------------------------------
# Description: Offset: 0b, Width: 8b, Instruction operand. Its values depends on used instruction
OPERAND: 0
# -----------------------------------------===== NUM_PADS [Optional] =====------------------------------------------
# Description: Offset: 8b, Width: 2b, Number of pads used by instruction. Some instructions ignores this parameter.
# - 1PAD, (0): Single mode. One pad is used.
# - 2PAD, (1): Dual mode. Two pads are used.
# - 4PAD, (2): Quad mode. Four pads are used.
# - 8PAD, (3): Octal mode. Eight pads are used.
# Possible options: <1PAD, 2PAD, 4PAD, 8PAD>
NUM_PADS: 1PAD
# --------------------------------------===== OPERATION_CODE [Optional] =====---------------------------------------
# Description: Offset: 10b, Width: 6b, Instruction operation code.
# - STOP, (0): Stop execution and de-assert CS. Then, the next command sequence (to the same flash device) starts
# from instruction pointer 0.
# - CMD_SDR, (1): Transmit command code to Flash.
# - RADDR_SDR, (2): Transmit row address to Flash.
# - CADDR_SDR, (3): Transmit column address to Flash.
# - MODE1_SDR, (4): Transmit mode bits to Flash.
# - MODE2_SDR, (5): Transmit mode bits to Flash.
# - MODE4_SDR, (6): Transmit mode bits to Flash.
# - MODE8_SDR, (7): Transmit mode bits to Flash.
# - WRITE_SDR, (8): Transmit program data to Flash device.
# - READ_SDR, (9): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_SDR, (10): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_SDR, (11): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_SDR, (12): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_SDR, (13): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# - JMP_ON_CS, (31): Stop execution, de-assert CS and save operand[7:0] as the instruction start pointer for next
# sequence.Normally this instruction is used to support Execute-In-Place enhanced mode. See XIP enhanced mode for
# more details.This instruction is only allowed for AHB read commands. There is interrupt status bit set
# (INTR[IPCMDERR] or INTR[AHBCMDERR]) when using this instruction in IP command or AHB write command.
# - CMD_DDR, (33): Transmit command code to Flash.
# - RADDR_DDR, (34): Transmit row address to Flash.
# - CADDR_DDR, (35): Transmit column address to Flash.
# - MODE1_DDR, (36): Transmit mode bits to Flash.
# - MODE2_DDR, (37): Transmit mode bits to Flash.
# - MODE4_DDR, (38): Transmit mode bits to Flash.
# - MODE8_DDR, (39): Transmit mode bits to Flash.
# - WRITE_DDR, (40): Transmit program data to Flash device.
# - READ_DDR, (41): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_DDR, (42): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_DDR, (43): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_DDR, (44): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_DDR, (45): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# Possible options: <STOP, CMD_SDR, RADDR_SDR, CADDR_SDR, MODE1_SDR, MODE2_SDR, MODE4_SDR, MODE8_SDR, WRITE_SDR,
# READ_SDR, LEARN_SDR, DATSZ_SDR, DUMMY_SDR, DUMMY_RWDS_SDR, JMP_ON_CS, CMD_DDR, RADDR_DDR, CADDR_DDR, MODE1_DDR,
# MODE2_DDR, MODE4_DDR, MODE8_DDR, WRITE_DDR, READ_DDR, LEARN_DDR, DATSZ_DDR, DUMMY_DDR, DUMMY_RWDS_DDR>
OPERATION_CODE: STOP
lookupTable_seq12_instr1:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq12_instr2:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq12_instr3:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq12_instr4:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq12_instr5:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq12_instr6:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq12_instr7:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
# ----------------------------------===== lookupTable_seq13_instr0 [Optional] =====-----------------------------------
# Description: Offset: 0x00000150, Width: 16b; Lookup table holds Flash command sequences 13, instruction 0
lookupTable_seq13_instr0:
# ------------------------------------------===== OPERAND [Optional] =====------------------------------------------
# Description: Offset: 0b, Width: 8b, Instruction operand. Its values depends on used instruction
OPERAND: 0
# -----------------------------------------===== NUM_PADS [Optional] =====------------------------------------------
# Description: Offset: 8b, Width: 2b, Number of pads used by instruction. Some instructions ignores this parameter.
# - 1PAD, (0): Single mode. One pad is used.
# - 2PAD, (1): Dual mode. Two pads are used.
# - 4PAD, (2): Quad mode. Four pads are used.
# - 8PAD, (3): Octal mode. Eight pads are used.
# Possible options: <1PAD, 2PAD, 4PAD, 8PAD>
NUM_PADS: 1PAD
# --------------------------------------===== OPERATION_CODE [Optional] =====---------------------------------------
# Description: Offset: 10b, Width: 6b, Instruction operation code.
# - STOP, (0): Stop execution and de-assert CS. Then, the next command sequence (to the same flash device) starts
# from instruction pointer 0.
# - CMD_SDR, (1): Transmit command code to Flash.
# - RADDR_SDR, (2): Transmit row address to Flash.
# - CADDR_SDR, (3): Transmit column address to Flash.
# - MODE1_SDR, (4): Transmit mode bits to Flash.
# - MODE2_SDR, (5): Transmit mode bits to Flash.
# - MODE4_SDR, (6): Transmit mode bits to Flash.
# - MODE8_SDR, (7): Transmit mode bits to Flash.
# - WRITE_SDR, (8): Transmit program data to Flash device.
# - READ_SDR, (9): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_SDR, (10): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_SDR, (11): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_SDR, (12): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_SDR, (13): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# - JMP_ON_CS, (31): Stop execution, de-assert CS and save operand[7:0] as the instruction start pointer for next
# sequence.Normally this instruction is used to support Execute-In-Place enhanced mode. See XIP enhanced mode for
# more details.This instruction is only allowed for AHB read commands. There is interrupt status bit set
# (INTR[IPCMDERR] or INTR[AHBCMDERR]) when using this instruction in IP command or AHB write command.
# - CMD_DDR, (33): Transmit command code to Flash.
# - RADDR_DDR, (34): Transmit row address to Flash.
# - CADDR_DDR, (35): Transmit column address to Flash.
# - MODE1_DDR, (36): Transmit mode bits to Flash.
# - MODE2_DDR, (37): Transmit mode bits to Flash.
# - MODE4_DDR, (38): Transmit mode bits to Flash.
# - MODE8_DDR, (39): Transmit mode bits to Flash.
# - WRITE_DDR, (40): Transmit program data to Flash device.
# - READ_DDR, (41): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_DDR, (42): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_DDR, (43): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_DDR, (44): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_DDR, (45): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# Possible options: <STOP, CMD_SDR, RADDR_SDR, CADDR_SDR, MODE1_SDR, MODE2_SDR, MODE4_SDR, MODE8_SDR, WRITE_SDR,
# READ_SDR, LEARN_SDR, DATSZ_SDR, DUMMY_SDR, DUMMY_RWDS_SDR, JMP_ON_CS, CMD_DDR, RADDR_DDR, CADDR_DDR, MODE1_DDR,
# MODE2_DDR, MODE4_DDR, MODE8_DDR, WRITE_DDR, READ_DDR, LEARN_DDR, DATSZ_DDR, DUMMY_DDR, DUMMY_RWDS_DDR>
OPERATION_CODE: STOP
lookupTable_seq13_instr1:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq13_instr2:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq13_instr3:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq13_instr4:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq13_instr5:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq13_instr6:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq13_instr7:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
# ----------------------------------===== lookupTable_seq14_instr0 [Optional] =====-----------------------------------
# Description: Offset: 0x00000160, Width: 16b; Lookup table holds Flash command sequences 14, instruction 0
lookupTable_seq14_instr0:
# ------------------------------------------===== OPERAND [Optional] =====------------------------------------------
# Description: Offset: 0b, Width: 8b, Instruction operand. Its values depends on used instruction
OPERAND: 0
# -----------------------------------------===== NUM_PADS [Optional] =====------------------------------------------
# Description: Offset: 8b, Width: 2b, Number of pads used by instruction. Some instructions ignores this parameter.
# - 1PAD, (0): Single mode. One pad is used.
# - 2PAD, (1): Dual mode. Two pads are used.
# - 4PAD, (2): Quad mode. Four pads are used.
# - 8PAD, (3): Octal mode. Eight pads are used.
# Possible options: <1PAD, 2PAD, 4PAD, 8PAD>
NUM_PADS: 1PAD
# --------------------------------------===== OPERATION_CODE [Optional] =====---------------------------------------
# Description: Offset: 10b, Width: 6b, Instruction operation code.
# - STOP, (0): Stop execution and de-assert CS. Then, the next command sequence (to the same flash device) starts
# from instruction pointer 0.
# - CMD_SDR, (1): Transmit command code to Flash.
# - RADDR_SDR, (2): Transmit row address to Flash.
# - CADDR_SDR, (3): Transmit column address to Flash.
# - MODE1_SDR, (4): Transmit mode bits to Flash.
# - MODE2_SDR, (5): Transmit mode bits to Flash.
# - MODE4_SDR, (6): Transmit mode bits to Flash.
# - MODE8_SDR, (7): Transmit mode bits to Flash.
# - WRITE_SDR, (8): Transmit program data to Flash device.
# - READ_SDR, (9): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_SDR, (10): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_SDR, (11): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_SDR, (12): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_SDR, (13): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# - JMP_ON_CS, (31): Stop execution, de-assert CS and save operand[7:0] as the instruction start pointer for next
# sequence.Normally this instruction is used to support Execute-In-Place enhanced mode. See XIP enhanced mode for
# more details.This instruction is only allowed for AHB read commands. There is interrupt status bit set
# (INTR[IPCMDERR] or INTR[AHBCMDERR]) when using this instruction in IP command or AHB write command.
# - CMD_DDR, (33): Transmit command code to Flash.
# - RADDR_DDR, (34): Transmit row address to Flash.
# - CADDR_DDR, (35): Transmit column address to Flash.
# - MODE1_DDR, (36): Transmit mode bits to Flash.
# - MODE2_DDR, (37): Transmit mode bits to Flash.
# - MODE4_DDR, (38): Transmit mode bits to Flash.
# - MODE8_DDR, (39): Transmit mode bits to Flash.
# - WRITE_DDR, (40): Transmit program data to Flash device.
# - READ_DDR, (41): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_DDR, (42): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_DDR, (43): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_DDR, (44): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_DDR, (45): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# Possible options: <STOP, CMD_SDR, RADDR_SDR, CADDR_SDR, MODE1_SDR, MODE2_SDR, MODE4_SDR, MODE8_SDR, WRITE_SDR,
# READ_SDR, LEARN_SDR, DATSZ_SDR, DUMMY_SDR, DUMMY_RWDS_SDR, JMP_ON_CS, CMD_DDR, RADDR_DDR, CADDR_DDR, MODE1_DDR,
# MODE2_DDR, MODE4_DDR, MODE8_DDR, WRITE_DDR, READ_DDR, LEARN_DDR, DATSZ_DDR, DUMMY_DDR, DUMMY_RWDS_DDR>
OPERATION_CODE: STOP
lookupTable_seq14_instr1:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq14_instr2:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq14_instr3:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq14_instr4:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq14_instr5:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq14_instr6:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq14_instr7:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
# ----------------------------------===== lookupTable_seq15_instr0 [Optional] =====-----------------------------------
# Description: Offset: 0x00000170, Width: 16b; Lookup table holds Flash command sequences 15, instruction 0
lookupTable_seq15_instr0:
# ------------------------------------------===== OPERAND [Optional] =====------------------------------------------
# Description: Offset: 0b, Width: 8b, Instruction operand. Its values depends on used instruction
OPERAND: 0
# -----------------------------------------===== NUM_PADS [Optional] =====------------------------------------------
# Description: Offset: 8b, Width: 2b, Number of pads used by instruction. Some instructions ignores this parameter.
# - 1PAD, (0): Single mode. One pad is used.
# - 2PAD, (1): Dual mode. Two pads are used.
# - 4PAD, (2): Quad mode. Four pads are used.
# - 8PAD, (3): Octal mode. Eight pads are used.
# Possible options: <1PAD, 2PAD, 4PAD, 8PAD>
NUM_PADS: 1PAD
# --------------------------------------===== OPERATION_CODE [Optional] =====---------------------------------------
# Description: Offset: 10b, Width: 6b, Instruction operation code.
# - STOP, (0): Stop execution and de-assert CS. Then, the next command sequence (to the same flash device) starts
# from instruction pointer 0.
# - CMD_SDR, (1): Transmit command code to Flash.
# - RADDR_SDR, (2): Transmit row address to Flash.
# - CADDR_SDR, (3): Transmit column address to Flash.
# - MODE1_SDR, (4): Transmit mode bits to Flash.
# - MODE2_SDR, (5): Transmit mode bits to Flash.
# - MODE4_SDR, (6): Transmit mode bits to Flash.
# - MODE8_SDR, (7): Transmit mode bits to Flash.
# - WRITE_SDR, (8): Transmit program data to Flash device.
# - READ_SDR, (9): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_SDR, (10): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_SDR, (11): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_SDR, (12): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_SDR, (13): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# - JMP_ON_CS, (31): Stop execution, de-assert CS and save operand[7:0] as the instruction start pointer for next
# sequence.Normally this instruction is used to support Execute-In-Place enhanced mode. See XIP enhanced mode for
# more details.This instruction is only allowed for AHB read commands. There is interrupt status bit set
# (INTR[IPCMDERR] or INTR[AHBCMDERR]) when using this instruction in IP command or AHB write command.
# - CMD_DDR, (33): Transmit command code to Flash.
# - RADDR_DDR, (34): Transmit row address to Flash.
# - CADDR_DDR, (35): Transmit column address to Flash.
# - MODE1_DDR, (36): Transmit mode bits to Flash.
# - MODE2_DDR, (37): Transmit mode bits to Flash.
# - MODE4_DDR, (38): Transmit mode bits to Flash.
# - MODE8_DDR, (39): Transmit mode bits to Flash.
# - WRITE_DDR, (40): Transmit program data to Flash device.
# - READ_DDR, (41): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_DDR, (42): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_DDR, (43): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_DDR, (44): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_DDR, (45): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# Possible options: <STOP, CMD_SDR, RADDR_SDR, CADDR_SDR, MODE1_SDR, MODE2_SDR, MODE4_SDR, MODE8_SDR, WRITE_SDR,
# READ_SDR, LEARN_SDR, DATSZ_SDR, DUMMY_SDR, DUMMY_RWDS_SDR, JMP_ON_CS, CMD_DDR, RADDR_DDR, CADDR_DDR, MODE1_DDR,
# MODE2_DDR, MODE4_DDR, MODE8_DDR, WRITE_DDR, READ_DDR, LEARN_DDR, DATSZ_DDR, DUMMY_DDR, DUMMY_RWDS_DDR>
OPERATION_CODE: STOP
lookupTable_seq15_instr1:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq15_instr2:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq15_instr3:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq15_instr4:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq15_instr5:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq15_instr6:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq15_instr7:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
# ---------------------------------------===== lutCustomSeq_0 [Optional] =====----------------------------------------
# Description: Offset: 0x00000180, Width: 32b; [0x180-0x1af] Customizable LUT Sequences
lutCustomSeq_0:
# ------------------------------------------===== seqNum [Optional] =====-------------------------------------------
# Description: Offset: 0b, Width: 8b, Sequence Number, valid number: 1-16
seqNum: 0
# -------------------------------------------===== seqId [Optional] =====-------------------------------------------
# Description: Offset: 8b, Width: 8b, Sequence Index, valid number: 0-15
seqId: 0
# -----------------------------------------===== reserved [Optional] =====------------------------------------------
# Description: Offset: 16b, Width: 16b, N/A
reserved: 0
# ---------------------------------------===== lutCustomSeq_1 [Optional] =====----------------------------------------
# Description: Offset: 0x00000184, Width: 32b; [0x180-0x1af] Customizable LUT Sequences
lutCustomSeq_1:
# ------------------------------------------===== seqNum [Optional] =====-------------------------------------------
# Description: Offset: 0b, Width: 8b, Sequence Number, valid number: 1-16
seqNum: 0
# -------------------------------------------===== seqId [Optional] =====-------------------------------------------
# Description: Offset: 8b, Width: 8b, Sequence Index, valid number: 0-15
seqId: 0
# -----------------------------------------===== reserved [Optional] =====------------------------------------------
# Description: Offset: 16b, Width: 16b, N/A
reserved: 0
# ---------------------------------------===== lutCustomSeq_2 [Optional] =====----------------------------------------
# Description: Offset: 0x00000188, Width: 32b; [0x180-0x1af] Customizable LUT Sequences
lutCustomSeq_2:
# ------------------------------------------===== seqNum [Optional] =====-------------------------------------------
# Description: Offset: 0b, Width: 8b, Sequence Number, valid number: 1-16
seqNum: 0
# -------------------------------------------===== seqId [Optional] =====-------------------------------------------
# Description: Offset: 8b, Width: 8b, Sequence Index, valid number: 0-15
seqId: 0
# -----------------------------------------===== reserved [Optional] =====------------------------------------------
# Description: Offset: 16b, Width: 16b, N/A
reserved: 0
# ---------------------------------------===== lutCustomSeq_3 [Optional] =====----------------------------------------
# Description: Offset: 0x0000018C, Width: 32b; [0x180-0x1af] Customizable LUT Sequences
lutCustomSeq_3:
# ------------------------------------------===== seqNum [Optional] =====-------------------------------------------
# Description: Offset: 0b, Width: 8b, Sequence Number, valid number: 1-16
seqNum: 0
# -------------------------------------------===== seqId [Optional] =====-------------------------------------------
# Description: Offset: 8b, Width: 8b, Sequence Index, valid number: 0-15
seqId: 0
# -----------------------------------------===== reserved [Optional] =====------------------------------------------
# Description: Offset: 16b, Width: 16b, N/A
reserved: 0
# ---------------------------------------===== lutCustomSeq_4 [Optional] =====----------------------------------------
# Description: Offset: 0x00000190, Width: 32b; [0x180-0x1af] Customizable LUT Sequences
lutCustomSeq_4:
# ------------------------------------------===== seqNum [Optional] =====-------------------------------------------
# Description: Offset: 0b, Width: 8b, Sequence Number, valid number: 1-16
seqNum: 0
# -------------------------------------------===== seqId [Optional] =====-------------------------------------------
# Description: Offset: 8b, Width: 8b, Sequence Index, valid number: 0-15
seqId: 0
# -----------------------------------------===== reserved [Optional] =====------------------------------------------
# Description: Offset: 16b, Width: 16b, N/A
reserved: 0
# ---------------------------------------===== lutCustomSeq_5 [Optional] =====----------------------------------------
# Description: Offset: 0x00000194, Width: 32b; [0x180-0x1af] Customizable LUT Sequences
lutCustomSeq_5:
# ------------------------------------------===== seqNum [Optional] =====-------------------------------------------
# Description: Offset: 0b, Width: 8b, Sequence Number, valid number: 1-16
seqNum: 0
# -------------------------------------------===== seqId [Optional] =====-------------------------------------------
# Description: Offset: 8b, Width: 8b, Sequence Index, valid number: 0-15
seqId: 0
# -----------------------------------------===== reserved [Optional] =====------------------------------------------
# Description: Offset: 16b, Width: 16b, N/A
reserved: 0
# ---------------------------------------===== lutCustomSeq_6 [Optional] =====----------------------------------------
# Description: Offset: 0x00000198, Width: 32b; [0x180-0x1af] Customizable LUT Sequences
lutCustomSeq_6:
# ------------------------------------------===== seqNum [Optional] =====-------------------------------------------
# Description: Offset: 0b, Width: 8b, Sequence Number, valid number: 1-16
seqNum: 0
# -------------------------------------------===== seqId [Optional] =====-------------------------------------------
# Description: Offset: 8b, Width: 8b, Sequence Index, valid number: 0-15
seqId: 0
# -----------------------------------------===== reserved [Optional] =====------------------------------------------
# Description: Offset: 16b, Width: 16b, N/A
reserved: 0
# ---------------------------------------===== lutCustomSeq_7 [Optional] =====----------------------------------------
# Description: Offset: 0x0000019C, Width: 32b; [0x180-0x1af] Customizable LUT Sequences
lutCustomSeq_7:
# ------------------------------------------===== seqNum [Optional] =====-------------------------------------------
# Description: Offset: 0b, Width: 8b, Sequence Number, valid number: 1-16
seqNum: 0
# -------------------------------------------===== seqId [Optional] =====-------------------------------------------
# Description: Offset: 8b, Width: 8b, Sequence Index, valid number: 0-15
seqId: 0
# -----------------------------------------===== reserved [Optional] =====------------------------------------------
# Description: Offset: 16b, Width: 16b, N/A
reserved: 0
# ---------------------------------------===== lutCustomSeq_8 [Optional] =====----------------------------------------
# Description: Offset: 0x000001A0, Width: 32b; [0x180-0x1af] Customizable LUT Sequences
lutCustomSeq_8:
# ------------------------------------------===== seqNum [Optional] =====-------------------------------------------
# Description: Offset: 0b, Width: 8b, Sequence Number, valid number: 1-16
seqNum: 0
# -------------------------------------------===== seqId [Optional] =====-------------------------------------------
# Description: Offset: 8b, Width: 8b, Sequence Index, valid number: 0-15
seqId: 0
# -----------------------------------------===== reserved [Optional] =====------------------------------------------
# Description: Offset: 16b, Width: 16b, N/A
reserved: 0
# ---------------------------------------===== lutCustomSeq_9 [Optional] =====----------------------------------------
# Description: Offset: 0x000001A4, Width: 32b; [0x180-0x1af] Customizable LUT Sequences
lutCustomSeq_9:
# ------------------------------------------===== seqNum [Optional] =====-------------------------------------------
# Description: Offset: 0b, Width: 8b, Sequence Number, valid number: 1-16
seqNum: 0
# -------------------------------------------===== seqId [Optional] =====-------------------------------------------
# Description: Offset: 8b, Width: 8b, Sequence Index, valid number: 0-15
seqId: 0
# -----------------------------------------===== reserved [Optional] =====------------------------------------------
# Description: Offset: 16b, Width: 16b, N/A
reserved: 0
# ---------------------------------------===== lutCustomSeq_10 [Optional] =====---------------------------------------
# Description: Offset: 0x000001A8, Width: 32b; [0x180-0x1af] Customizable LUT Sequences
lutCustomSeq_10:
# ------------------------------------------===== seqNum [Optional] =====-------------------------------------------
# Description: Offset: 0b, Width: 8b, Sequence Number, valid number: 1-16
seqNum: 0
# -------------------------------------------===== seqId [Optional] =====-------------------------------------------
# Description: Offset: 8b, Width: 8b, Sequence Index, valid number: 0-15
seqId: 0
# -----------------------------------------===== reserved [Optional] =====------------------------------------------
# Description: Offset: 16b, Width: 16b, N/A
reserved: 0
# ---------------------------------------===== lutCustomSeq_11 [Optional] =====---------------------------------------
# Description: Offset: 0x000001AC, Width: 32b; [0x180-0x1af] Customizable LUT Sequences
lutCustomSeq_11:
# ------------------------------------------===== seqNum [Optional] =====-------------------------------------------
# Description: Offset: 0b, Width: 8b, Sequence Number, valid number: 1-16
seqNum: 0
# -------------------------------------------===== seqId [Optional] =====-------------------------------------------
# Description: Offset: 8b, Width: 8b, Sequence Index, valid number: 0-15
seqId: 0
# -----------------------------------------===== reserved [Optional] =====------------------------------------------
# Description: Offset: 16b, Width: 16b, N/A
reserved: 0
# -----------------------------------------===== reserved4_0 [Optional] =====-----------------------------------------
# Description: Offset: 0x000001B0, Width: 32b; [0x1b0-0x1bf] Reserved for future use
reserved4_0: '0x00000000'
# -----------------------------------------===== reserved4_1 [Optional] =====-----------------------------------------
# Description: Offset: 0x000001B4, Width: 32b; [0x1b0-0x1bf] Reserved for future use
reserved4_1: '0x00000000'
# -----------------------------------------===== reserved4_2 [Optional] =====-----------------------------------------
# Description: Offset: 0x000001B8, Width: 32b; [0x1b0-0x1bf] Reserved for future use
reserved4_2: '0x00000000'
# -----------------------------------------===== reserved4_3 [Optional] =====-----------------------------------------
# Description: Offset: 0x000001BC, Width: 32b; [0x1b0-0x1bf] Reserved for future use
reserved4_3: '0x00000000'
# ------------------------------------------===== pageSize [Optional] =====-------------------------------------------
# Description: Offset: 0x000001C0, Width: 32b; Page size of Serial NOR
pageSize: '0x00000000'
# -----------------------------------------===== sectorSize [Optional] =====------------------------------------------
# Description: Offset: 0x000001C4, Width: 32b; Sector size of Serial NOR
sectorSize: '0x00000000'
# -------------------------------------===== ipcmdSerialClkFreq [Optional] =====--------------------------------------
# Description: Offset: 0x000001C8, Width: 8b; Clock frequency for IP command
ipcmdSerialClkFreq: '0x00'
# -------------------------------------===== isUniformBlockSize [Optional] =====--------------------------------------
# Description: Offset: 0x000001C9, Width: 8b; Sector/Block size is the same
isUniformBlockSize: '0x00'
# -----------------------------------------===== reserved0_0 [Optional] =====-----------------------------------------
# Description: Offset: 0x000001CA, Width: 8b; Reserved for future use
reserved0_0: '0x00'
# -----------------------------------------===== reserved0_1 [Optional] =====-----------------------------------------
# Description: Offset: 0x000001CB, Width: 8b; Reserved for future use
reserved0_1: '0x00'
# ----------------------------------------===== serialNorType [Optional] =====----------------------------------------
# Description: Offset: 0x000001CC, Width: 8b; Serial NOR Flash type: 0/1/2/3
serialNorType: '0x00'
# --------------------------------------===== needExitNoCmdMode [Optional] =====--------------------------------------
# Description: Offset: 0x000001CD, Width: 8b; Need to exit NoCmd mode before other IP command
needExitNoCmdMode: '0x00'
# ------------------------------------===== halfClkForNonReadCmd [Optional] =====-------------------------------------
# Description: Offset: 0x000001CE, Width: 8b; Half the Serial Clock for non-read command: true/false
halfClkForNonReadCmd: '0x00'
# ------------------------------------===== needRestoreNoCmdMode [Optional] =====-------------------------------------
# Description: Offset: 0x000001CF, Width: 8b; Need to Restore NoCmd mode after IP command execution
needRestoreNoCmdMode: '0x00'
# ------------------------------------------===== blockSize [Optional] =====------------------------------------------
# Description: Offset: 0x000001D0, Width: 32b; Block size
blockSize: '0x00000000'
# -----------------------------------------===== reserve2_0 [Optional] =====------------------------------------------
# Description: Offset: 0x000001D4, Width: 32b; Reserved for future use
reserve2_0: '0x00000000'
# -----------------------------------------===== reserve2_1 [Optional] =====------------------------------------------
# Description: Offset: 0x000001D8, Width: 32b; Reserved for future use
reserve2_1: '0x00000000'
# -----------------------------------------===== reserve2_2 [Optional] =====------------------------------------------
# Description: Offset: 0x000001DC, Width: 32b; Reserved for future use
reserve2_2: '0x00000000'
# -----------------------------------------===== reserve2_3 [Optional] =====------------------------------------------
# Description: Offset: 0x000001E0, Width: 32b; Reserved for future use
reserve2_3: '0x00000000'
# -----------------------------------------===== reserve2_4 [Optional] =====------------------------------------------
# Description: Offset: 0x000001E4, Width: 32b; Reserved for future use
reserve2_4: '0x00000000'
# -----------------------------------------===== reserve2_5 [Optional] =====------------------------------------------
# Description: Offset: 0x000001E8, Width: 32b; Reserved for future use
reserve2_5: '0x00000000'
# -----------------------------------------===== reserve2_6 [Optional] =====------------------------------------------
# Description: Offset: 0x000001EC, Width: 32b; Reserved for future use
reserve2_6: '0x00000000'
# -----------------------------------------===== reserve2_7 [Optional] =====------------------------------------------
# Description: Offset: 0x000001F0, Width: 32b; Reserved for future use
reserve2_7: '0x00000000'
# -----------------------------------------===== reserve2_8 [Optional] =====------------------------------------------
# Description: Offset: 0x000001F4, Width: 32b; Reserved for future use
reserve2_8: '0x00000000'
# -----------------------------------------===== reserve2_9 [Optional] =====------------------------------------------
# Description: Offset: 0x000001F8, Width: 32b; Reserved for future use
reserve2_9: '0x00000000'
# -----------------------------------------===== reserve2_10 [Optional] =====-----------------------------------------
# Description: Offset: 0x000001FC, Width: 32b; Reserved for future use
reserve2_10: '0x00000000'
FCB for mimxrt1166, Revision: a0 and flexspi_nor#
FCB for mimxrt1166, Revision: a0 and flexspi_nor JSON schema
FCB for mimxrt1166, Revision: a0 and flexspi_nor YAML configuration template
# ================================= FCB for mimxrt1166, Revision: a0 and flexspi_nor =================================
# ======================================================================================================================
# == FCB for mimxrt1166, Revision: a0 and flexspi_nor ==
# ======================================================================================================================
# -------------------------------------===== The chip family name [Required] =====--------------------------------------
# Description: NXP chip family identifier.
family: CHOOSE_FROM_TABLE
# -----------------------------------------===== MCU revision [Optional] =====------------------------------------------
# Description: Revision of silicon. The 'latest' name, means most current revision.
# Possible options: <a0, latest>
revision: a0
# ------------------------------------------===== Memory type [Required] =====------------------------------------------
# Description: Specify type of memory used by FCB description.
# Possible options: <flexspi_nor>
type: flexspi_nor
# ------------------------------------------===== mimxrt1166 [Required] =====-------------------------------------------
fcb_settings:
# ---------------------------------------------===== tag [Optional] =====---------------------------------------------
# Description: Offset: 0x00000000, Width: 32b; [0x000-0x003] Tag, fixed value 0x42464346UL
tag: '0x42464346'
# -------------------------------------------===== version [Optional] =====-------------------------------------------
# Description: Offset: 0x00000004, Width: 32b; [0x004-0x007] Version,[31:24] -'V', [23:16] - Major, [15:8] - Minor,
# [7:0] - bugfix
version: '0x56010400'
# ------------------------------------------===== reserved0 [Optional] =====------------------------------------------
# Description: Offset: 0x00000008, Width: 32b; [0x008-0x00b] Reserved for future use
reserved0: '0x00000000'
# --------------------------------------===== readSampleClkSrc [Optional] =====---------------------------------------
# Description: Offset: 0x0000000C, Width: 8b; [0x00c-0x00c] Read Sample Clock Source, valid value: 0/1/3
readSampleClkSrc: '0x00'
# -----------------------------------------===== csHoldTime [Optional] =====------------------------------------------
# Description: Offset: 0x0000000D, Width: 8b; [0x00d-0x00d] CS hold time, default value: 3
csHoldTime: '0x00'
# -----------------------------------------===== csSetupTime [Optional] =====-----------------------------------------
# Description: Offset: 0x0000000E, Width: 8b; [0x00e-0x00e] CS setup time, default value: 3
csSetupTime: '0x00'
# -------------------------------------===== columnAddressWidth [Optional] =====--------------------------------------
# Description: Offset: 0x0000000F, Width: 8b; [0x00f-0x00f] Column Address with, for HyperBus protocol, it is fixed
# to 3, For Serial NAND, need to refer to datasheet
columnAddressWidth: '0x00'
# -------------------------------------===== deviceModeCfgEnable [Optional] =====-------------------------------------
# Description: Offset: 0x00000010, Width: 8b; [0x010-0x010] Device Mode Configure enable flag, 1 - Enable, 0 -
# Disable
deviceModeCfgEnable: '0x00'
# ---------------------------------------===== deviceModeType [Optional] =====----------------------------------------
# Description: Offset: 0x00000011, Width: 8b; [0x011-0x011] Specify the configuration command type:Quad Enable,
# DPI/QPI/OPI switch, Generic configuration, etc.
deviceModeType: '0x00'
# -------------------------------------===== waitTimeCfgCommands [Optional] =====-------------------------------------
# Description: Offset: 0x00000012, Width: 16b; [0x012-0x013] Wait time for all configuration commands, unit: 100us,
# Used for DPI/QPI/OPI switch or reset command
waitTimeCfgCommands: '0x0000'
# ----------------------------------------===== deviceModeSeq [Optional] =====----------------------------------------
# Description: Offset: 0x00000014, Width: 32b; [0x014-0x017] Device mode sequence info, [7:0] - LUT sequence id,
# [15:8] - LUt sequence number, [31:16] Reserved
deviceModeSeq:
# ------------------------------------------===== seqNum [Optional] =====-------------------------------------------
# Description: Offset: 0b, Width: 8b, Sequence Number, valid number: 1-16
seqNum: 0
# -------------------------------------------===== seqId [Optional] =====-------------------------------------------
# Description: Offset: 8b, Width: 8b, Sequence Index, valid number: 0-15
seqId: 0
# -----------------------------------------===== reserved [Optional] =====------------------------------------------
# Description: Offset: 16b, Width: 16b, N/A
reserved: 0
# ----------------------------------------===== deviceModeArg [Optional] =====----------------------------------------
# Description: Offset: 0x00000018, Width: 32b; [0x018-0x01b] Argument/Parameter for device configuration
deviceModeArg: '0x00000000'
# ---------------------------------------===== configCmdEnable [Optional] =====---------------------------------------
# Description: Offset: 0x0000001C, Width: 8b; [0x01c-0x01c] Configure command Enable Flag, 1 - Enable, 0 - Disable
configCmdEnable: '0x00'
# --------------------------------------===== configModeType_0 [Optional] =====---------------------------------------
# Description: Offset: 0x0000001D, Width: 8b; [0x01d-0x01f] Configure Mode Type, similar as deviceModeTpe
configModeType_0: '0x00'
# --------------------------------------===== configModeType_1 [Optional] =====---------------------------------------
# Description: Offset: 0x0000001E, Width: 8b; [0x01d-0x01f] Configure Mode Type, similar as deviceModeTpe
configModeType_1: '0x00'
# --------------------------------------===== configModeType_2 [Optional] =====---------------------------------------
# Description: Offset: 0x0000001F, Width: 8b; [0x01d-0x01f] Configure Mode Type, similar as deviceModeTpe
configModeType_2: '0x00'
# ---------------------------------------===== configCmdSeqs_0 [Optional] =====---------------------------------------
# Description: Offset: 0x00000020, Width: 32b; [0x020-0x02b] Sequence info for Device Configuration command, similar
# as deviceModeSeq
configCmdSeqs_0:
# ------------------------------------------===== seqNum [Optional] =====-------------------------------------------
# Description: Offset: 0b, Width: 8b, Sequence Number, valid number: 1-16
seqNum: 0
# -------------------------------------------===== seqId [Optional] =====-------------------------------------------
# Description: Offset: 8b, Width: 8b, Sequence Index, valid number: 0-15
seqId: 0
# -----------------------------------------===== reserved [Optional] =====------------------------------------------
# Description: Offset: 16b, Width: 16b, N/A
reserved: 0
# ---------------------------------------===== configCmdSeqs_1 [Optional] =====---------------------------------------
# Description: Offset: 0x00000024, Width: 32b; [0x020-0x02b] Sequence info for Device Configuration command, similar
# as deviceModeSeq
configCmdSeqs_1:
# ------------------------------------------===== seqNum [Optional] =====-------------------------------------------
# Description: Offset: 0b, Width: 8b, Sequence Number, valid number: 1-16
seqNum: 0
# -------------------------------------------===== seqId [Optional] =====-------------------------------------------
# Description: Offset: 8b, Width: 8b, Sequence Index, valid number: 0-15
seqId: 0
# -----------------------------------------===== reserved [Optional] =====------------------------------------------
# Description: Offset: 16b, Width: 16b, N/A
reserved: 0
# ---------------------------------------===== configCmdSeqs_2 [Optional] =====---------------------------------------
# Description: Offset: 0x00000028, Width: 32b; [0x020-0x02b] Sequence info for Device Configuration command, similar
# as deviceModeSeq
configCmdSeqs_2:
# ------------------------------------------===== seqNum [Optional] =====-------------------------------------------
# Description: Offset: 0b, Width: 8b, Sequence Number, valid number: 1-16
seqNum: 0
# -------------------------------------------===== seqId [Optional] =====-------------------------------------------
# Description: Offset: 8b, Width: 8b, Sequence Index, valid number: 0-15
seqId: 0
# -----------------------------------------===== reserved [Optional] =====------------------------------------------
# Description: Offset: 16b, Width: 16b, N/A
reserved: 0
# ------------------------------------------===== reserved1 [Optional] =====------------------------------------------
# Description: Offset: 0x0000002C, Width: 32b; [0x02c-0x02f] Reserved for future use
reserved1: '0x00000000'
# ---------------------------------------===== configCmdArgs_0 [Optional] =====---------------------------------------
# Description: Offset: 0x00000030, Width: 32b; [0x030-0x03b] Arguments/Parameters for device Configuration commands
configCmdArgs_0: '0x00000000'
# ---------------------------------------===== configCmdArgs_1 [Optional] =====---------------------------------------
# Description: Offset: 0x00000034, Width: 32b; [0x030-0x03b] Arguments/Parameters for device Configuration commands
configCmdArgs_1: '0x00000000'
# ---------------------------------------===== configCmdArgs_2 [Optional] =====---------------------------------------
# Description: Offset: 0x00000038, Width: 32b; [0x030-0x03b] Arguments/Parameters for device Configuration commands
configCmdArgs_2: '0x00000000'
# ------------------------------------------===== reserved2 [Optional] =====------------------------------------------
# Description: Offset: 0x0000003C, Width: 32b; [0x03c-0x03f] Reserved for future use
reserved2: '0x00000000'
# ------------------------------------===== controllerMiscOption [Optional] =====-------------------------------------
# Description: Offset: 0x00000040, Width: 32b; [0x040-0x043] Controller Misc Options, see Misc feature bit
# definitions for more details
controllerMiscOption: '0x00000000'
# -----------------------------------------===== deviceType [Optional] =====------------------------------------------
# Description: Offset: 0x00000044, Width: 8b; [0x044-0x044] Device Type: See Flash Type Definition for more details
deviceType: '0x00'
# ----------------------------------------===== sflashPadType [Optional] =====----------------------------------------
# Description: Offset: 0x00000045, Width: 8b; [0x045-0x045] Serial Flash Pad Type: 1 - Single, 2 - Dual, 4 - Quad, 8
# - Octal
sflashPadType: '0x00'
# ----------------------------------------===== serialClkFreq [Optional] =====----------------------------------------
# Description: Offset: 0x00000046, Width: 8b; [0x046-0x046] Serial Flash Frequency, device specific definitions, See
# System Boot Chapter for more details
serialClkFreq: '0x00'
# -------------------------------------===== lutCustomSeqEnable [Optional] =====--------------------------------------
# Description: Offset: 0x00000047, Width: 8b; [0x047-0x047] LUT customization Enable, it is required if the
# program/erase cannot be done using 1 LUT sequence, currently, only applicable to HyperFLASH
lutCustomSeqEnable: '0x00'
# -----------------------------------------===== reserved3_0 [Optional] =====-----------------------------------------
# Description: Offset: 0x00000048, Width: 32b; [0x048-0x04f] Reserved for future use
reserved3_0: '0x00000000'
# -----------------------------------------===== reserved3_1 [Optional] =====-----------------------------------------
# Description: Offset: 0x0000004C, Width: 32b; [0x048-0x04f] Reserved for future use
reserved3_1: '0x00000000'
# ----------------------------------------===== sflashA1Size [Optional] =====-----------------------------------------
# Description: Offset: 0x00000050, Width: 32b; [0x050-0x053] Size of Flash connected to A1
sflashA1Size: '0x00000000'
# ----------------------------------------===== sflashA2Size [Optional] =====-----------------------------------------
# Description: Offset: 0x00000054, Width: 32b; [0x054-0x057] Size of Flash connected to A2
sflashA2Size: '0x00000000'
# ----------------------------------------===== sflashB1Size [Optional] =====-----------------------------------------
# Description: Offset: 0x00000058, Width: 32b; [0x058-0x05b] Size of Flash connected to B1
sflashB1Size: '0x00000000'
# ----------------------------------------===== sflashB2Size [Optional] =====-----------------------------------------
# Description: Offset: 0x0000005C, Width: 32b; [0x05c-0x05f] Size of Flash connected to B2
sflashB2Size: '0x00000000'
# ------------------------------------===== csPadSettingOverride [Optional] =====-------------------------------------
# Description: Offset: 0x00000060, Width: 32b; [0x060-0x063] CS pad setting override value
csPadSettingOverride: '0x00000000'
# -----------------------------------===== sclkPadSettingOverride [Optional] =====------------------------------------
# Description: Offset: 0x00000064, Width: 32b; [0x064-0x067] SCK pad setting override value
sclkPadSettingOverride: '0x00000000'
# -----------------------------------===== dataPadSettingOverride [Optional] =====------------------------------------
# Description: Offset: 0x00000068, Width: 32b; [0x068-0x06b] data pad setting override value
dataPadSettingOverride: '0x00000000'
# ------------------------------------===== dqsPadSettingOverride [Optional] =====------------------------------------
# Description: Offset: 0x0000006C, Width: 32b; [0x06c-0x06f] DQS pad setting override value
dqsPadSettingOverride: '0x00000000'
# -----------------------------------------===== timeoutInMs [Optional] =====-----------------------------------------
# Description: Offset: 0x00000070, Width: 32b; [0x070-0x073] Timeout threshold for read status command
timeoutInMs: '0x00000000'
# ---------------------------------------===== commandInterval [Optional] =====---------------------------------------
# Description: Offset: 0x00000074, Width: 32b; [0x074-0x077] CS deselect interval between two commands
commandInterval: '0x00000000'
# ---------------------------------------===== dataValidTime_0 [Optional] =====---------------------------------------
# Description: Offset: 0x00000078, Width: 16b; [0x078-0x07b] CLK edge to data valid time for PORT A and PORT B, in
# terms of 0.1ns
dataValidTime_0: '0x0000'
# ---------------------------------------===== dataValidTime_1 [Optional] =====---------------------------------------
# Description: Offset: 0x0000007A, Width: 16b; [0x078-0x07b] CLK edge to data valid time for PORT A and PORT B, in
# terms of 0.1ns
dataValidTime_1: '0x0000'
# -----------------------------------------===== busyOffset [Optional] =====------------------------------------------
# Description: Offset: 0x0000007C, Width: 16b; [0x07c-0x07d] Busy offset, valid value: 0-31
busyOffset: '0x0000'
# ---------------------------------------===== busyBitPolarity [Optional] =====---------------------------------------
# Description: Offset: 0x0000007E, Width: 16b; [0x07e-0x07f] Busy flag polarity, 0 - busy flag is 1 when flash device
# is busy, 1 - busy flag is 0 when flash device is busy
busyBitPolarity: '0x0000'
# -----------------------------------===== lookupTable_seq0_instr0 [Optional] =====-----------------------------------
# Description: Offset: 0x00000080, Width: 16b; Lookup table holds Flash command sequences 0, instruction 0
lookupTable_seq0_instr0:
# ------------------------------------------===== OPERAND [Optional] =====------------------------------------------
# Description: Offset: 0b, Width: 8b, Instruction operand. Its values depends on used instruction
OPERAND: 0
# -----------------------------------------===== NUM_PADS [Optional] =====------------------------------------------
# Description: Offset: 8b, Width: 2b, Number of pads used by instruction. Some instructions ignores this parameter.
# - 1PAD, (0): Single mode. One pad is used.
# - 2PAD, (1): Dual mode. Two pads are used.
# - 4PAD, (2): Quad mode. Four pads are used.
# - 8PAD, (3): Octal mode. Eight pads are used.
# Possible options: <1PAD, 2PAD, 4PAD, 8PAD>
NUM_PADS: 1PAD
# --------------------------------------===== OPERATION_CODE [Optional] =====---------------------------------------
# Description: Offset: 10b, Width: 6b, Instruction operation code.
# - STOP, (0): Stop execution and de-assert CS. Then, the next command sequence (to the same flash device) starts
# from instruction pointer 0.
# - CMD_SDR, (1): Transmit command code to Flash.
# - RADDR_SDR, (2): Transmit row address to Flash.
# - CADDR_SDR, (3): Transmit column address to Flash.
# - MODE1_SDR, (4): Transmit mode bits to Flash.
# - MODE2_SDR, (5): Transmit mode bits to Flash.
# - MODE4_SDR, (6): Transmit mode bits to Flash.
# - MODE8_SDR, (7): Transmit mode bits to Flash.
# - WRITE_SDR, (8): Transmit program data to Flash device.
# - READ_SDR, (9): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_SDR, (10): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_SDR, (11): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_SDR, (12): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_SDR, (13): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# - JMP_ON_CS, (31): Stop execution, de-assert CS and save operand[7:0] as the instruction start pointer for next
# sequence.Normally this instruction is used to support Execute-In-Place enhanced mode. See XIP enhanced mode for
# more details.This instruction is only allowed for AHB read commands. There is interrupt status bit set
# (INTR[IPCMDERR] or INTR[AHBCMDERR]) when using this instruction in IP command or AHB write command.
# - CMD_DDR, (33): Transmit command code to Flash.
# - RADDR_DDR, (34): Transmit row address to Flash.
# - CADDR_DDR, (35): Transmit column address to Flash.
# - MODE1_DDR, (36): Transmit mode bits to Flash.
# - MODE2_DDR, (37): Transmit mode bits to Flash.
# - MODE4_DDR, (38): Transmit mode bits to Flash.
# - MODE8_DDR, (39): Transmit mode bits to Flash.
# - WRITE_DDR, (40): Transmit program data to Flash device.
# - READ_DDR, (41): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_DDR, (42): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_DDR, (43): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_DDR, (44): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_DDR, (45): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# Possible options: <STOP, CMD_SDR, RADDR_SDR, CADDR_SDR, MODE1_SDR, MODE2_SDR, MODE4_SDR, MODE8_SDR, WRITE_SDR,
# READ_SDR, LEARN_SDR, DATSZ_SDR, DUMMY_SDR, DUMMY_RWDS_SDR, JMP_ON_CS, CMD_DDR, RADDR_DDR, CADDR_DDR, MODE1_DDR,
# MODE2_DDR, MODE4_DDR, MODE8_DDR, WRITE_DDR, READ_DDR, LEARN_DDR, DATSZ_DDR, DUMMY_DDR, DUMMY_RWDS_DDR>
OPERATION_CODE: STOP
lookupTable_seq0_instr1:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq0_instr2:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq0_instr3:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq0_instr4:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq0_instr5:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq0_instr6:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq0_instr7:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
# -----------------------------------===== lookupTable_seq1_instr0 [Optional] =====-----------------------------------
# Description: Offset: 0x00000090, Width: 16b; Lookup table holds Flash command sequences 1, instruction 0
lookupTable_seq1_instr0:
# ------------------------------------------===== OPERAND [Optional] =====------------------------------------------
# Description: Offset: 0b, Width: 8b, Instruction operand. Its values depends on used instruction
OPERAND: 0
# -----------------------------------------===== NUM_PADS [Optional] =====------------------------------------------
# Description: Offset: 8b, Width: 2b, Number of pads used by instruction. Some instructions ignores this parameter.
# - 1PAD, (0): Single mode. One pad is used.
# - 2PAD, (1): Dual mode. Two pads are used.
# - 4PAD, (2): Quad mode. Four pads are used.
# - 8PAD, (3): Octal mode. Eight pads are used.
# Possible options: <1PAD, 2PAD, 4PAD, 8PAD>
NUM_PADS: 1PAD
# --------------------------------------===== OPERATION_CODE [Optional] =====---------------------------------------
# Description: Offset: 10b, Width: 6b, Instruction operation code.
# - STOP, (0): Stop execution and de-assert CS. Then, the next command sequence (to the same flash device) starts
# from instruction pointer 0.
# - CMD_SDR, (1): Transmit command code to Flash.
# - RADDR_SDR, (2): Transmit row address to Flash.
# - CADDR_SDR, (3): Transmit column address to Flash.
# - MODE1_SDR, (4): Transmit mode bits to Flash.
# - MODE2_SDR, (5): Transmit mode bits to Flash.
# - MODE4_SDR, (6): Transmit mode bits to Flash.
# - MODE8_SDR, (7): Transmit mode bits to Flash.
# - WRITE_SDR, (8): Transmit program data to Flash device.
# - READ_SDR, (9): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_SDR, (10): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_SDR, (11): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_SDR, (12): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_SDR, (13): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# - JMP_ON_CS, (31): Stop execution, de-assert CS and save operand[7:0] as the instruction start pointer for next
# sequence.Normally this instruction is used to support Execute-In-Place enhanced mode. See XIP enhanced mode for
# more details.This instruction is only allowed for AHB read commands. There is interrupt status bit set
# (INTR[IPCMDERR] or INTR[AHBCMDERR]) when using this instruction in IP command or AHB write command.
# - CMD_DDR, (33): Transmit command code to Flash.
# - RADDR_DDR, (34): Transmit row address to Flash.
# - CADDR_DDR, (35): Transmit column address to Flash.
# - MODE1_DDR, (36): Transmit mode bits to Flash.
# - MODE2_DDR, (37): Transmit mode bits to Flash.
# - MODE4_DDR, (38): Transmit mode bits to Flash.
# - MODE8_DDR, (39): Transmit mode bits to Flash.
# - WRITE_DDR, (40): Transmit program data to Flash device.
# - READ_DDR, (41): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_DDR, (42): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_DDR, (43): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_DDR, (44): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_DDR, (45): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# Possible options: <STOP, CMD_SDR, RADDR_SDR, CADDR_SDR, MODE1_SDR, MODE2_SDR, MODE4_SDR, MODE8_SDR, WRITE_SDR,
# READ_SDR, LEARN_SDR, DATSZ_SDR, DUMMY_SDR, DUMMY_RWDS_SDR, JMP_ON_CS, CMD_DDR, RADDR_DDR, CADDR_DDR, MODE1_DDR,
# MODE2_DDR, MODE4_DDR, MODE8_DDR, WRITE_DDR, READ_DDR, LEARN_DDR, DATSZ_DDR, DUMMY_DDR, DUMMY_RWDS_DDR>
OPERATION_CODE: STOP
lookupTable_seq1_instr1:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq1_instr2:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq1_instr3:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq1_instr4:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq1_instr5:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq1_instr6:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq1_instr7:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
# -----------------------------------===== lookupTable_seq2_instr0 [Optional] =====-----------------------------------
# Description: Offset: 0x000000A0, Width: 16b; Lookup table holds Flash command sequences 2, instruction 0
lookupTable_seq2_instr0:
# ------------------------------------------===== OPERAND [Optional] =====------------------------------------------
# Description: Offset: 0b, Width: 8b, Instruction operand. Its values depends on used instruction
OPERAND: 0
# -----------------------------------------===== NUM_PADS [Optional] =====------------------------------------------
# Description: Offset: 8b, Width: 2b, Number of pads used by instruction. Some instructions ignores this parameter.
# - 1PAD, (0): Single mode. One pad is used.
# - 2PAD, (1): Dual mode. Two pads are used.
# - 4PAD, (2): Quad mode. Four pads are used.
# - 8PAD, (3): Octal mode. Eight pads are used.
# Possible options: <1PAD, 2PAD, 4PAD, 8PAD>
NUM_PADS: 1PAD
# --------------------------------------===== OPERATION_CODE [Optional] =====---------------------------------------
# Description: Offset: 10b, Width: 6b, Instruction operation code.
# - STOP, (0): Stop execution and de-assert CS. Then, the next command sequence (to the same flash device) starts
# from instruction pointer 0.
# - CMD_SDR, (1): Transmit command code to Flash.
# - RADDR_SDR, (2): Transmit row address to Flash.
# - CADDR_SDR, (3): Transmit column address to Flash.
# - MODE1_SDR, (4): Transmit mode bits to Flash.
# - MODE2_SDR, (5): Transmit mode bits to Flash.
# - MODE4_SDR, (6): Transmit mode bits to Flash.
# - MODE8_SDR, (7): Transmit mode bits to Flash.
# - WRITE_SDR, (8): Transmit program data to Flash device.
# - READ_SDR, (9): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_SDR, (10): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_SDR, (11): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_SDR, (12): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_SDR, (13): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# - JMP_ON_CS, (31): Stop execution, de-assert CS and save operand[7:0] as the instruction start pointer for next
# sequence.Normally this instruction is used to support Execute-In-Place enhanced mode. See XIP enhanced mode for
# more details.This instruction is only allowed for AHB read commands. There is interrupt status bit set
# (INTR[IPCMDERR] or INTR[AHBCMDERR]) when using this instruction in IP command or AHB write command.
# - CMD_DDR, (33): Transmit command code to Flash.
# - RADDR_DDR, (34): Transmit row address to Flash.
# - CADDR_DDR, (35): Transmit column address to Flash.
# - MODE1_DDR, (36): Transmit mode bits to Flash.
# - MODE2_DDR, (37): Transmit mode bits to Flash.
# - MODE4_DDR, (38): Transmit mode bits to Flash.
# - MODE8_DDR, (39): Transmit mode bits to Flash.
# - WRITE_DDR, (40): Transmit program data to Flash device.
# - READ_DDR, (41): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_DDR, (42): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_DDR, (43): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_DDR, (44): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_DDR, (45): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# Possible options: <STOP, CMD_SDR, RADDR_SDR, CADDR_SDR, MODE1_SDR, MODE2_SDR, MODE4_SDR, MODE8_SDR, WRITE_SDR,
# READ_SDR, LEARN_SDR, DATSZ_SDR, DUMMY_SDR, DUMMY_RWDS_SDR, JMP_ON_CS, CMD_DDR, RADDR_DDR, CADDR_DDR, MODE1_DDR,
# MODE2_DDR, MODE4_DDR, MODE8_DDR, WRITE_DDR, READ_DDR, LEARN_DDR, DATSZ_DDR, DUMMY_DDR, DUMMY_RWDS_DDR>
OPERATION_CODE: STOP
lookupTable_seq2_instr1:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq2_instr2:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq2_instr3:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq2_instr4:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq2_instr5:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq2_instr6:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq2_instr7:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
# -----------------------------------===== lookupTable_seq3_instr0 [Optional] =====-----------------------------------
# Description: Offset: 0x000000B0, Width: 16b; Lookup table holds Flash command sequences 3, instruction 0
lookupTable_seq3_instr0:
# ------------------------------------------===== OPERAND [Optional] =====------------------------------------------
# Description: Offset: 0b, Width: 8b, Instruction operand. Its values depends on used instruction
OPERAND: 0
# -----------------------------------------===== NUM_PADS [Optional] =====------------------------------------------
# Description: Offset: 8b, Width: 2b, Number of pads used by instruction. Some instructions ignores this parameter.
# - 1PAD, (0): Single mode. One pad is used.
# - 2PAD, (1): Dual mode. Two pads are used.
# - 4PAD, (2): Quad mode. Four pads are used.
# - 8PAD, (3): Octal mode. Eight pads are used.
# Possible options: <1PAD, 2PAD, 4PAD, 8PAD>
NUM_PADS: 1PAD
# --------------------------------------===== OPERATION_CODE [Optional] =====---------------------------------------
# Description: Offset: 10b, Width: 6b, Instruction operation code.
# - STOP, (0): Stop execution and de-assert CS. Then, the next command sequence (to the same flash device) starts
# from instruction pointer 0.
# - CMD_SDR, (1): Transmit command code to Flash.
# - RADDR_SDR, (2): Transmit row address to Flash.
# - CADDR_SDR, (3): Transmit column address to Flash.
# - MODE1_SDR, (4): Transmit mode bits to Flash.
# - MODE2_SDR, (5): Transmit mode bits to Flash.
# - MODE4_SDR, (6): Transmit mode bits to Flash.
# - MODE8_SDR, (7): Transmit mode bits to Flash.
# - WRITE_SDR, (8): Transmit program data to Flash device.
# - READ_SDR, (9): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_SDR, (10): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_SDR, (11): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_SDR, (12): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_SDR, (13): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# - JMP_ON_CS, (31): Stop execution, de-assert CS and save operand[7:0] as the instruction start pointer for next
# sequence.Normally this instruction is used to support Execute-In-Place enhanced mode. See XIP enhanced mode for
# more details.This instruction is only allowed for AHB read commands. There is interrupt status bit set
# (INTR[IPCMDERR] or INTR[AHBCMDERR]) when using this instruction in IP command or AHB write command.
# - CMD_DDR, (33): Transmit command code to Flash.
# - RADDR_DDR, (34): Transmit row address to Flash.
# - CADDR_DDR, (35): Transmit column address to Flash.
# - MODE1_DDR, (36): Transmit mode bits to Flash.
# - MODE2_DDR, (37): Transmit mode bits to Flash.
# - MODE4_DDR, (38): Transmit mode bits to Flash.
# - MODE8_DDR, (39): Transmit mode bits to Flash.
# - WRITE_DDR, (40): Transmit program data to Flash device.
# - READ_DDR, (41): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_DDR, (42): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_DDR, (43): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_DDR, (44): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_DDR, (45): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# Possible options: <STOP, CMD_SDR, RADDR_SDR, CADDR_SDR, MODE1_SDR, MODE2_SDR, MODE4_SDR, MODE8_SDR, WRITE_SDR,
# READ_SDR, LEARN_SDR, DATSZ_SDR, DUMMY_SDR, DUMMY_RWDS_SDR, JMP_ON_CS, CMD_DDR, RADDR_DDR, CADDR_DDR, MODE1_DDR,
# MODE2_DDR, MODE4_DDR, MODE8_DDR, WRITE_DDR, READ_DDR, LEARN_DDR, DATSZ_DDR, DUMMY_DDR, DUMMY_RWDS_DDR>
OPERATION_CODE: STOP
lookupTable_seq3_instr1:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq3_instr2:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq3_instr3:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq3_instr4:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq3_instr5:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq3_instr6:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq3_instr7:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
# -----------------------------------===== lookupTable_seq4_instr0 [Optional] =====-----------------------------------
# Description: Offset: 0x000000C0, Width: 16b; Lookup table holds Flash command sequences 4, instruction 0
lookupTable_seq4_instr0:
# ------------------------------------------===== OPERAND [Optional] =====------------------------------------------
# Description: Offset: 0b, Width: 8b, Instruction operand. Its values depends on used instruction
OPERAND: 0
# -----------------------------------------===== NUM_PADS [Optional] =====------------------------------------------
# Description: Offset: 8b, Width: 2b, Number of pads used by instruction. Some instructions ignores this parameter.
# - 1PAD, (0): Single mode. One pad is used.
# - 2PAD, (1): Dual mode. Two pads are used.
# - 4PAD, (2): Quad mode. Four pads are used.
# - 8PAD, (3): Octal mode. Eight pads are used.
# Possible options: <1PAD, 2PAD, 4PAD, 8PAD>
NUM_PADS: 1PAD
# --------------------------------------===== OPERATION_CODE [Optional] =====---------------------------------------
# Description: Offset: 10b, Width: 6b, Instruction operation code.
# - STOP, (0): Stop execution and de-assert CS. Then, the next command sequence (to the same flash device) starts
# from instruction pointer 0.
# - CMD_SDR, (1): Transmit command code to Flash.
# - RADDR_SDR, (2): Transmit row address to Flash.
# - CADDR_SDR, (3): Transmit column address to Flash.
# - MODE1_SDR, (4): Transmit mode bits to Flash.
# - MODE2_SDR, (5): Transmit mode bits to Flash.
# - MODE4_SDR, (6): Transmit mode bits to Flash.
# - MODE8_SDR, (7): Transmit mode bits to Flash.
# - WRITE_SDR, (8): Transmit program data to Flash device.
# - READ_SDR, (9): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_SDR, (10): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_SDR, (11): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_SDR, (12): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_SDR, (13): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# - JMP_ON_CS, (31): Stop execution, de-assert CS and save operand[7:0] as the instruction start pointer for next
# sequence.Normally this instruction is used to support Execute-In-Place enhanced mode. See XIP enhanced mode for
# more details.This instruction is only allowed for AHB read commands. There is interrupt status bit set
# (INTR[IPCMDERR] or INTR[AHBCMDERR]) when using this instruction in IP command or AHB write command.
# - CMD_DDR, (33): Transmit command code to Flash.
# - RADDR_DDR, (34): Transmit row address to Flash.
# - CADDR_DDR, (35): Transmit column address to Flash.
# - MODE1_DDR, (36): Transmit mode bits to Flash.
# - MODE2_DDR, (37): Transmit mode bits to Flash.
# - MODE4_DDR, (38): Transmit mode bits to Flash.
# - MODE8_DDR, (39): Transmit mode bits to Flash.
# - WRITE_DDR, (40): Transmit program data to Flash device.
# - READ_DDR, (41): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_DDR, (42): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_DDR, (43): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_DDR, (44): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_DDR, (45): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# Possible options: <STOP, CMD_SDR, RADDR_SDR, CADDR_SDR, MODE1_SDR, MODE2_SDR, MODE4_SDR, MODE8_SDR, WRITE_SDR,
# READ_SDR, LEARN_SDR, DATSZ_SDR, DUMMY_SDR, DUMMY_RWDS_SDR, JMP_ON_CS, CMD_DDR, RADDR_DDR, CADDR_DDR, MODE1_DDR,
# MODE2_DDR, MODE4_DDR, MODE8_DDR, WRITE_DDR, READ_DDR, LEARN_DDR, DATSZ_DDR, DUMMY_DDR, DUMMY_RWDS_DDR>
OPERATION_CODE: STOP
lookupTable_seq4_instr1:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq4_instr2:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq4_instr3:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq4_instr4:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq4_instr5:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq4_instr6:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq4_instr7:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
# -----------------------------------===== lookupTable_seq5_instr0 [Optional] =====-----------------------------------
# Description: Offset: 0x000000D0, Width: 16b; Lookup table holds Flash command sequences 5, instruction 0
lookupTable_seq5_instr0:
# ------------------------------------------===== OPERAND [Optional] =====------------------------------------------
# Description: Offset: 0b, Width: 8b, Instruction operand. Its values depends on used instruction
OPERAND: 0
# -----------------------------------------===== NUM_PADS [Optional] =====------------------------------------------
# Description: Offset: 8b, Width: 2b, Number of pads used by instruction. Some instructions ignores this parameter.
# - 1PAD, (0): Single mode. One pad is used.
# - 2PAD, (1): Dual mode. Two pads are used.
# - 4PAD, (2): Quad mode. Four pads are used.
# - 8PAD, (3): Octal mode. Eight pads are used.
# Possible options: <1PAD, 2PAD, 4PAD, 8PAD>
NUM_PADS: 1PAD
# --------------------------------------===== OPERATION_CODE [Optional] =====---------------------------------------
# Description: Offset: 10b, Width: 6b, Instruction operation code.
# - STOP, (0): Stop execution and de-assert CS. Then, the next command sequence (to the same flash device) starts
# from instruction pointer 0.
# - CMD_SDR, (1): Transmit command code to Flash.
# - RADDR_SDR, (2): Transmit row address to Flash.
# - CADDR_SDR, (3): Transmit column address to Flash.
# - MODE1_SDR, (4): Transmit mode bits to Flash.
# - MODE2_SDR, (5): Transmit mode bits to Flash.
# - MODE4_SDR, (6): Transmit mode bits to Flash.
# - MODE8_SDR, (7): Transmit mode bits to Flash.
# - WRITE_SDR, (8): Transmit program data to Flash device.
# - READ_SDR, (9): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_SDR, (10): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_SDR, (11): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_SDR, (12): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_SDR, (13): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# - JMP_ON_CS, (31): Stop execution, de-assert CS and save operand[7:0] as the instruction start pointer for next
# sequence.Normally this instruction is used to support Execute-In-Place enhanced mode. See XIP enhanced mode for
# more details.This instruction is only allowed for AHB read commands. There is interrupt status bit set
# (INTR[IPCMDERR] or INTR[AHBCMDERR]) when using this instruction in IP command or AHB write command.
# - CMD_DDR, (33): Transmit command code to Flash.
# - RADDR_DDR, (34): Transmit row address to Flash.
# - CADDR_DDR, (35): Transmit column address to Flash.
# - MODE1_DDR, (36): Transmit mode bits to Flash.
# - MODE2_DDR, (37): Transmit mode bits to Flash.
# - MODE4_DDR, (38): Transmit mode bits to Flash.
# - MODE8_DDR, (39): Transmit mode bits to Flash.
# - WRITE_DDR, (40): Transmit program data to Flash device.
# - READ_DDR, (41): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_DDR, (42): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_DDR, (43): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_DDR, (44): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_DDR, (45): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# Possible options: <STOP, CMD_SDR, RADDR_SDR, CADDR_SDR, MODE1_SDR, MODE2_SDR, MODE4_SDR, MODE8_SDR, WRITE_SDR,
# READ_SDR, LEARN_SDR, DATSZ_SDR, DUMMY_SDR, DUMMY_RWDS_SDR, JMP_ON_CS, CMD_DDR, RADDR_DDR, CADDR_DDR, MODE1_DDR,
# MODE2_DDR, MODE4_DDR, MODE8_DDR, WRITE_DDR, READ_DDR, LEARN_DDR, DATSZ_DDR, DUMMY_DDR, DUMMY_RWDS_DDR>
OPERATION_CODE: STOP
lookupTable_seq5_instr1:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq5_instr2:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq5_instr3:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq5_instr4:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq5_instr5:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq5_instr6:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq5_instr7:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
# -----------------------------------===== lookupTable_seq6_instr0 [Optional] =====-----------------------------------
# Description: Offset: 0x000000E0, Width: 16b; Lookup table holds Flash command sequences 6, instruction 0
lookupTable_seq6_instr0:
# ------------------------------------------===== OPERAND [Optional] =====------------------------------------------
# Description: Offset: 0b, Width: 8b, Instruction operand. Its values depends on used instruction
OPERAND: 0
# -----------------------------------------===== NUM_PADS [Optional] =====------------------------------------------
# Description: Offset: 8b, Width: 2b, Number of pads used by instruction. Some instructions ignores this parameter.
# - 1PAD, (0): Single mode. One pad is used.
# - 2PAD, (1): Dual mode. Two pads are used.
# - 4PAD, (2): Quad mode. Four pads are used.
# - 8PAD, (3): Octal mode. Eight pads are used.
# Possible options: <1PAD, 2PAD, 4PAD, 8PAD>
NUM_PADS: 1PAD
# --------------------------------------===== OPERATION_CODE [Optional] =====---------------------------------------
# Description: Offset: 10b, Width: 6b, Instruction operation code.
# - STOP, (0): Stop execution and de-assert CS. Then, the next command sequence (to the same flash device) starts
# from instruction pointer 0.
# - CMD_SDR, (1): Transmit command code to Flash.
# - RADDR_SDR, (2): Transmit row address to Flash.
# - CADDR_SDR, (3): Transmit column address to Flash.
# - MODE1_SDR, (4): Transmit mode bits to Flash.
# - MODE2_SDR, (5): Transmit mode bits to Flash.
# - MODE4_SDR, (6): Transmit mode bits to Flash.
# - MODE8_SDR, (7): Transmit mode bits to Flash.
# - WRITE_SDR, (8): Transmit program data to Flash device.
# - READ_SDR, (9): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_SDR, (10): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_SDR, (11): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_SDR, (12): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_SDR, (13): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# - JMP_ON_CS, (31): Stop execution, de-assert CS and save operand[7:0] as the instruction start pointer for next
# sequence.Normally this instruction is used to support Execute-In-Place enhanced mode. See XIP enhanced mode for
# more details.This instruction is only allowed for AHB read commands. There is interrupt status bit set
# (INTR[IPCMDERR] or INTR[AHBCMDERR]) when using this instruction in IP command or AHB write command.
# - CMD_DDR, (33): Transmit command code to Flash.
# - RADDR_DDR, (34): Transmit row address to Flash.
# - CADDR_DDR, (35): Transmit column address to Flash.
# - MODE1_DDR, (36): Transmit mode bits to Flash.
# - MODE2_DDR, (37): Transmit mode bits to Flash.
# - MODE4_DDR, (38): Transmit mode bits to Flash.
# - MODE8_DDR, (39): Transmit mode bits to Flash.
# - WRITE_DDR, (40): Transmit program data to Flash device.
# - READ_DDR, (41): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_DDR, (42): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_DDR, (43): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_DDR, (44): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_DDR, (45): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# Possible options: <STOP, CMD_SDR, RADDR_SDR, CADDR_SDR, MODE1_SDR, MODE2_SDR, MODE4_SDR, MODE8_SDR, WRITE_SDR,
# READ_SDR, LEARN_SDR, DATSZ_SDR, DUMMY_SDR, DUMMY_RWDS_SDR, JMP_ON_CS, CMD_DDR, RADDR_DDR, CADDR_DDR, MODE1_DDR,
# MODE2_DDR, MODE4_DDR, MODE8_DDR, WRITE_DDR, READ_DDR, LEARN_DDR, DATSZ_DDR, DUMMY_DDR, DUMMY_RWDS_DDR>
OPERATION_CODE: STOP
lookupTable_seq6_instr1:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq6_instr2:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq6_instr3:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq6_instr4:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq6_instr5:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq6_instr6:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq6_instr7:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
# -----------------------------------===== lookupTable_seq7_instr0 [Optional] =====-----------------------------------
# Description: Offset: 0x000000F0, Width: 16b; Lookup table holds Flash command sequences 7, instruction 0
lookupTable_seq7_instr0:
# ------------------------------------------===== OPERAND [Optional] =====------------------------------------------
# Description: Offset: 0b, Width: 8b, Instruction operand. Its values depends on used instruction
OPERAND: 0
# -----------------------------------------===== NUM_PADS [Optional] =====------------------------------------------
# Description: Offset: 8b, Width: 2b, Number of pads used by instruction. Some instructions ignores this parameter.
# - 1PAD, (0): Single mode. One pad is used.
# - 2PAD, (1): Dual mode. Two pads are used.
# - 4PAD, (2): Quad mode. Four pads are used.
# - 8PAD, (3): Octal mode. Eight pads are used.
# Possible options: <1PAD, 2PAD, 4PAD, 8PAD>
NUM_PADS: 1PAD
# --------------------------------------===== OPERATION_CODE [Optional] =====---------------------------------------
# Description: Offset: 10b, Width: 6b, Instruction operation code.
# - STOP, (0): Stop execution and de-assert CS. Then, the next command sequence (to the same flash device) starts
# from instruction pointer 0.
# - CMD_SDR, (1): Transmit command code to Flash.
# - RADDR_SDR, (2): Transmit row address to Flash.
# - CADDR_SDR, (3): Transmit column address to Flash.
# - MODE1_SDR, (4): Transmit mode bits to Flash.
# - MODE2_SDR, (5): Transmit mode bits to Flash.
# - MODE4_SDR, (6): Transmit mode bits to Flash.
# - MODE8_SDR, (7): Transmit mode bits to Flash.
# - WRITE_SDR, (8): Transmit program data to Flash device.
# - READ_SDR, (9): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_SDR, (10): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_SDR, (11): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_SDR, (12): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_SDR, (13): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# - JMP_ON_CS, (31): Stop execution, de-assert CS and save operand[7:0] as the instruction start pointer for next
# sequence.Normally this instruction is used to support Execute-In-Place enhanced mode. See XIP enhanced mode for
# more details.This instruction is only allowed for AHB read commands. There is interrupt status bit set
# (INTR[IPCMDERR] or INTR[AHBCMDERR]) when using this instruction in IP command or AHB write command.
# - CMD_DDR, (33): Transmit command code to Flash.
# - RADDR_DDR, (34): Transmit row address to Flash.
# - CADDR_DDR, (35): Transmit column address to Flash.
# - MODE1_DDR, (36): Transmit mode bits to Flash.
# - MODE2_DDR, (37): Transmit mode bits to Flash.
# - MODE4_DDR, (38): Transmit mode bits to Flash.
# - MODE8_DDR, (39): Transmit mode bits to Flash.
# - WRITE_DDR, (40): Transmit program data to Flash device.
# - READ_DDR, (41): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_DDR, (42): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_DDR, (43): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_DDR, (44): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_DDR, (45): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# Possible options: <STOP, CMD_SDR, RADDR_SDR, CADDR_SDR, MODE1_SDR, MODE2_SDR, MODE4_SDR, MODE8_SDR, WRITE_SDR,
# READ_SDR, LEARN_SDR, DATSZ_SDR, DUMMY_SDR, DUMMY_RWDS_SDR, JMP_ON_CS, CMD_DDR, RADDR_DDR, CADDR_DDR, MODE1_DDR,
# MODE2_DDR, MODE4_DDR, MODE8_DDR, WRITE_DDR, READ_DDR, LEARN_DDR, DATSZ_DDR, DUMMY_DDR, DUMMY_RWDS_DDR>
OPERATION_CODE: STOP
lookupTable_seq7_instr1:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq7_instr2:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq7_instr3:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq7_instr4:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq7_instr5:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq7_instr6:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq7_instr7:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
# -----------------------------------===== lookupTable_seq8_instr0 [Optional] =====-----------------------------------
# Description: Offset: 0x00000100, Width: 16b; Lookup table holds Flash command sequences 8, instruction 0
lookupTable_seq8_instr0:
# ------------------------------------------===== OPERAND [Optional] =====------------------------------------------
# Description: Offset: 0b, Width: 8b, Instruction operand. Its values depends on used instruction
OPERAND: 0
# -----------------------------------------===== NUM_PADS [Optional] =====------------------------------------------
# Description: Offset: 8b, Width: 2b, Number of pads used by instruction. Some instructions ignores this parameter.
# - 1PAD, (0): Single mode. One pad is used.
# - 2PAD, (1): Dual mode. Two pads are used.
# - 4PAD, (2): Quad mode. Four pads are used.
# - 8PAD, (3): Octal mode. Eight pads are used.
# Possible options: <1PAD, 2PAD, 4PAD, 8PAD>
NUM_PADS: 1PAD
# --------------------------------------===== OPERATION_CODE [Optional] =====---------------------------------------
# Description: Offset: 10b, Width: 6b, Instruction operation code.
# - STOP, (0): Stop execution and de-assert CS. Then, the next command sequence (to the same flash device) starts
# from instruction pointer 0.
# - CMD_SDR, (1): Transmit command code to Flash.
# - RADDR_SDR, (2): Transmit row address to Flash.
# - CADDR_SDR, (3): Transmit column address to Flash.
# - MODE1_SDR, (4): Transmit mode bits to Flash.
# - MODE2_SDR, (5): Transmit mode bits to Flash.
# - MODE4_SDR, (6): Transmit mode bits to Flash.
# - MODE8_SDR, (7): Transmit mode bits to Flash.
# - WRITE_SDR, (8): Transmit program data to Flash device.
# - READ_SDR, (9): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_SDR, (10): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_SDR, (11): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_SDR, (12): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_SDR, (13): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# - JMP_ON_CS, (31): Stop execution, de-assert CS and save operand[7:0] as the instruction start pointer for next
# sequence.Normally this instruction is used to support Execute-In-Place enhanced mode. See XIP enhanced mode for
# more details.This instruction is only allowed for AHB read commands. There is interrupt status bit set
# (INTR[IPCMDERR] or INTR[AHBCMDERR]) when using this instruction in IP command or AHB write command.
# - CMD_DDR, (33): Transmit command code to Flash.
# - RADDR_DDR, (34): Transmit row address to Flash.
# - CADDR_DDR, (35): Transmit column address to Flash.
# - MODE1_DDR, (36): Transmit mode bits to Flash.
# - MODE2_DDR, (37): Transmit mode bits to Flash.
# - MODE4_DDR, (38): Transmit mode bits to Flash.
# - MODE8_DDR, (39): Transmit mode bits to Flash.
# - WRITE_DDR, (40): Transmit program data to Flash device.
# - READ_DDR, (41): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_DDR, (42): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_DDR, (43): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_DDR, (44): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_DDR, (45): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# Possible options: <STOP, CMD_SDR, RADDR_SDR, CADDR_SDR, MODE1_SDR, MODE2_SDR, MODE4_SDR, MODE8_SDR, WRITE_SDR,
# READ_SDR, LEARN_SDR, DATSZ_SDR, DUMMY_SDR, DUMMY_RWDS_SDR, JMP_ON_CS, CMD_DDR, RADDR_DDR, CADDR_DDR, MODE1_DDR,
# MODE2_DDR, MODE4_DDR, MODE8_DDR, WRITE_DDR, READ_DDR, LEARN_DDR, DATSZ_DDR, DUMMY_DDR, DUMMY_RWDS_DDR>
OPERATION_CODE: STOP
lookupTable_seq8_instr1:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq8_instr2:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq8_instr3:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq8_instr4:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq8_instr5:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq8_instr6:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq8_instr7:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
# -----------------------------------===== lookupTable_seq9_instr0 [Optional] =====-----------------------------------
# Description: Offset: 0x00000110, Width: 16b; Lookup table holds Flash command sequences 9, instruction 0
lookupTable_seq9_instr0:
# ------------------------------------------===== OPERAND [Optional] =====------------------------------------------
# Description: Offset: 0b, Width: 8b, Instruction operand. Its values depends on used instruction
OPERAND: 0
# -----------------------------------------===== NUM_PADS [Optional] =====------------------------------------------
# Description: Offset: 8b, Width: 2b, Number of pads used by instruction. Some instructions ignores this parameter.
# - 1PAD, (0): Single mode. One pad is used.
# - 2PAD, (1): Dual mode. Two pads are used.
# - 4PAD, (2): Quad mode. Four pads are used.
# - 8PAD, (3): Octal mode. Eight pads are used.
# Possible options: <1PAD, 2PAD, 4PAD, 8PAD>
NUM_PADS: 1PAD
# --------------------------------------===== OPERATION_CODE [Optional] =====---------------------------------------
# Description: Offset: 10b, Width: 6b, Instruction operation code.
# - STOP, (0): Stop execution and de-assert CS. Then, the next command sequence (to the same flash device) starts
# from instruction pointer 0.
# - CMD_SDR, (1): Transmit command code to Flash.
# - RADDR_SDR, (2): Transmit row address to Flash.
# - CADDR_SDR, (3): Transmit column address to Flash.
# - MODE1_SDR, (4): Transmit mode bits to Flash.
# - MODE2_SDR, (5): Transmit mode bits to Flash.
# - MODE4_SDR, (6): Transmit mode bits to Flash.
# - MODE8_SDR, (7): Transmit mode bits to Flash.
# - WRITE_SDR, (8): Transmit program data to Flash device.
# - READ_SDR, (9): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_SDR, (10): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_SDR, (11): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_SDR, (12): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_SDR, (13): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# - JMP_ON_CS, (31): Stop execution, de-assert CS and save operand[7:0] as the instruction start pointer for next
# sequence.Normally this instruction is used to support Execute-In-Place enhanced mode. See XIP enhanced mode for
# more details.This instruction is only allowed for AHB read commands. There is interrupt status bit set
# (INTR[IPCMDERR] or INTR[AHBCMDERR]) when using this instruction in IP command or AHB write command.
# - CMD_DDR, (33): Transmit command code to Flash.
# - RADDR_DDR, (34): Transmit row address to Flash.
# - CADDR_DDR, (35): Transmit column address to Flash.
# - MODE1_DDR, (36): Transmit mode bits to Flash.
# - MODE2_DDR, (37): Transmit mode bits to Flash.
# - MODE4_DDR, (38): Transmit mode bits to Flash.
# - MODE8_DDR, (39): Transmit mode bits to Flash.
# - WRITE_DDR, (40): Transmit program data to Flash device.
# - READ_DDR, (41): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_DDR, (42): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_DDR, (43): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_DDR, (44): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_DDR, (45): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# Possible options: <STOP, CMD_SDR, RADDR_SDR, CADDR_SDR, MODE1_SDR, MODE2_SDR, MODE4_SDR, MODE8_SDR, WRITE_SDR,
# READ_SDR, LEARN_SDR, DATSZ_SDR, DUMMY_SDR, DUMMY_RWDS_SDR, JMP_ON_CS, CMD_DDR, RADDR_DDR, CADDR_DDR, MODE1_DDR,
# MODE2_DDR, MODE4_DDR, MODE8_DDR, WRITE_DDR, READ_DDR, LEARN_DDR, DATSZ_DDR, DUMMY_DDR, DUMMY_RWDS_DDR>
OPERATION_CODE: STOP
lookupTable_seq9_instr1:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq9_instr2:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq9_instr3:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq9_instr4:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq9_instr5:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq9_instr6:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq9_instr7:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
# ----------------------------------===== lookupTable_seq10_instr0 [Optional] =====-----------------------------------
# Description: Offset: 0x00000120, Width: 16b; Lookup table holds Flash command sequences 10, instruction 0
lookupTable_seq10_instr0:
# ------------------------------------------===== OPERAND [Optional] =====------------------------------------------
# Description: Offset: 0b, Width: 8b, Instruction operand. Its values depends on used instruction
OPERAND: 0
# -----------------------------------------===== NUM_PADS [Optional] =====------------------------------------------
# Description: Offset: 8b, Width: 2b, Number of pads used by instruction. Some instructions ignores this parameter.
# - 1PAD, (0): Single mode. One pad is used.
# - 2PAD, (1): Dual mode. Two pads are used.
# - 4PAD, (2): Quad mode. Four pads are used.
# - 8PAD, (3): Octal mode. Eight pads are used.
# Possible options: <1PAD, 2PAD, 4PAD, 8PAD>
NUM_PADS: 1PAD
# --------------------------------------===== OPERATION_CODE [Optional] =====---------------------------------------
# Description: Offset: 10b, Width: 6b, Instruction operation code.
# - STOP, (0): Stop execution and de-assert CS. Then, the next command sequence (to the same flash device) starts
# from instruction pointer 0.
# - CMD_SDR, (1): Transmit command code to Flash.
# - RADDR_SDR, (2): Transmit row address to Flash.
# - CADDR_SDR, (3): Transmit column address to Flash.
# - MODE1_SDR, (4): Transmit mode bits to Flash.
# - MODE2_SDR, (5): Transmit mode bits to Flash.
# - MODE4_SDR, (6): Transmit mode bits to Flash.
# - MODE8_SDR, (7): Transmit mode bits to Flash.
# - WRITE_SDR, (8): Transmit program data to Flash device.
# - READ_SDR, (9): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_SDR, (10): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_SDR, (11): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_SDR, (12): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_SDR, (13): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# - JMP_ON_CS, (31): Stop execution, de-assert CS and save operand[7:0] as the instruction start pointer for next
# sequence.Normally this instruction is used to support Execute-In-Place enhanced mode. See XIP enhanced mode for
# more details.This instruction is only allowed for AHB read commands. There is interrupt status bit set
# (INTR[IPCMDERR] or INTR[AHBCMDERR]) when using this instruction in IP command or AHB write command.
# - CMD_DDR, (33): Transmit command code to Flash.
# - RADDR_DDR, (34): Transmit row address to Flash.
# - CADDR_DDR, (35): Transmit column address to Flash.
# - MODE1_DDR, (36): Transmit mode bits to Flash.
# - MODE2_DDR, (37): Transmit mode bits to Flash.
# - MODE4_DDR, (38): Transmit mode bits to Flash.
# - MODE8_DDR, (39): Transmit mode bits to Flash.
# - WRITE_DDR, (40): Transmit program data to Flash device.
# - READ_DDR, (41): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_DDR, (42): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_DDR, (43): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_DDR, (44): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_DDR, (45): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# Possible options: <STOP, CMD_SDR, RADDR_SDR, CADDR_SDR, MODE1_SDR, MODE2_SDR, MODE4_SDR, MODE8_SDR, WRITE_SDR,
# READ_SDR, LEARN_SDR, DATSZ_SDR, DUMMY_SDR, DUMMY_RWDS_SDR, JMP_ON_CS, CMD_DDR, RADDR_DDR, CADDR_DDR, MODE1_DDR,
# MODE2_DDR, MODE4_DDR, MODE8_DDR, WRITE_DDR, READ_DDR, LEARN_DDR, DATSZ_DDR, DUMMY_DDR, DUMMY_RWDS_DDR>
OPERATION_CODE: STOP
lookupTable_seq10_instr1:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq10_instr2:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq10_instr3:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq10_instr4:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq10_instr5:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq10_instr6:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq10_instr7:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
# ----------------------------------===== lookupTable_seq11_instr0 [Optional] =====-----------------------------------
# Description: Offset: 0x00000130, Width: 16b; Lookup table holds Flash command sequences 11, instruction 0
lookupTable_seq11_instr0:
# ------------------------------------------===== OPERAND [Optional] =====------------------------------------------
# Description: Offset: 0b, Width: 8b, Instruction operand. Its values depends on used instruction
OPERAND: 0
# -----------------------------------------===== NUM_PADS [Optional] =====------------------------------------------
# Description: Offset: 8b, Width: 2b, Number of pads used by instruction. Some instructions ignores this parameter.
# - 1PAD, (0): Single mode. One pad is used.
# - 2PAD, (1): Dual mode. Two pads are used.
# - 4PAD, (2): Quad mode. Four pads are used.
# - 8PAD, (3): Octal mode. Eight pads are used.
# Possible options: <1PAD, 2PAD, 4PAD, 8PAD>
NUM_PADS: 1PAD
# --------------------------------------===== OPERATION_CODE [Optional] =====---------------------------------------
# Description: Offset: 10b, Width: 6b, Instruction operation code.
# - STOP, (0): Stop execution and de-assert CS. Then, the next command sequence (to the same flash device) starts
# from instruction pointer 0.
# - CMD_SDR, (1): Transmit command code to Flash.
# - RADDR_SDR, (2): Transmit row address to Flash.
# - CADDR_SDR, (3): Transmit column address to Flash.
# - MODE1_SDR, (4): Transmit mode bits to Flash.
# - MODE2_SDR, (5): Transmit mode bits to Flash.
# - MODE4_SDR, (6): Transmit mode bits to Flash.
# - MODE8_SDR, (7): Transmit mode bits to Flash.
# - WRITE_SDR, (8): Transmit program data to Flash device.
# - READ_SDR, (9): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_SDR, (10): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_SDR, (11): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_SDR, (12): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_SDR, (13): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# - JMP_ON_CS, (31): Stop execution, de-assert CS and save operand[7:0] as the instruction start pointer for next
# sequence.Normally this instruction is used to support Execute-In-Place enhanced mode. See XIP enhanced mode for
# more details.This instruction is only allowed for AHB read commands. There is interrupt status bit set
# (INTR[IPCMDERR] or INTR[AHBCMDERR]) when using this instruction in IP command or AHB write command.
# - CMD_DDR, (33): Transmit command code to Flash.
# - RADDR_DDR, (34): Transmit row address to Flash.
# - CADDR_DDR, (35): Transmit column address to Flash.
# - MODE1_DDR, (36): Transmit mode bits to Flash.
# - MODE2_DDR, (37): Transmit mode bits to Flash.
# - MODE4_DDR, (38): Transmit mode bits to Flash.
# - MODE8_DDR, (39): Transmit mode bits to Flash.
# - WRITE_DDR, (40): Transmit program data to Flash device.
# - READ_DDR, (41): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_DDR, (42): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_DDR, (43): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_DDR, (44): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_DDR, (45): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# Possible options: <STOP, CMD_SDR, RADDR_SDR, CADDR_SDR, MODE1_SDR, MODE2_SDR, MODE4_SDR, MODE8_SDR, WRITE_SDR,
# READ_SDR, LEARN_SDR, DATSZ_SDR, DUMMY_SDR, DUMMY_RWDS_SDR, JMP_ON_CS, CMD_DDR, RADDR_DDR, CADDR_DDR, MODE1_DDR,
# MODE2_DDR, MODE4_DDR, MODE8_DDR, WRITE_DDR, READ_DDR, LEARN_DDR, DATSZ_DDR, DUMMY_DDR, DUMMY_RWDS_DDR>
OPERATION_CODE: STOP
lookupTable_seq11_instr1:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq11_instr2:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq11_instr3:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq11_instr4:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq11_instr5:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq11_instr6:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq11_instr7:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
# ----------------------------------===== lookupTable_seq12_instr0 [Optional] =====-----------------------------------
# Description: Offset: 0x00000140, Width: 16b; Lookup table holds Flash command sequences 12, instruction 0
lookupTable_seq12_instr0:
# ------------------------------------------===== OPERAND [Optional] =====------------------------------------------
# Description: Offset: 0b, Width: 8b, Instruction operand. Its values depends on used instruction
OPERAND: 0
# -----------------------------------------===== NUM_PADS [Optional] =====------------------------------------------
# Description: Offset: 8b, Width: 2b, Number of pads used by instruction. Some instructions ignores this parameter.
# - 1PAD, (0): Single mode. One pad is used.
# - 2PAD, (1): Dual mode. Two pads are used.
# - 4PAD, (2): Quad mode. Four pads are used.
# - 8PAD, (3): Octal mode. Eight pads are used.
# Possible options: <1PAD, 2PAD, 4PAD, 8PAD>
NUM_PADS: 1PAD
# --------------------------------------===== OPERATION_CODE [Optional] =====---------------------------------------
# Description: Offset: 10b, Width: 6b, Instruction operation code.
# - STOP, (0): Stop execution and de-assert CS. Then, the next command sequence (to the same flash device) starts
# from instruction pointer 0.
# - CMD_SDR, (1): Transmit command code to Flash.
# - RADDR_SDR, (2): Transmit row address to Flash.
# - CADDR_SDR, (3): Transmit column address to Flash.
# - MODE1_SDR, (4): Transmit mode bits to Flash.
# - MODE2_SDR, (5): Transmit mode bits to Flash.
# - MODE4_SDR, (6): Transmit mode bits to Flash.
# - MODE8_SDR, (7): Transmit mode bits to Flash.
# - WRITE_SDR, (8): Transmit program data to Flash device.
# - READ_SDR, (9): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_SDR, (10): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_SDR, (11): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_SDR, (12): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_SDR, (13): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# - JMP_ON_CS, (31): Stop execution, de-assert CS and save operand[7:0] as the instruction start pointer for next
# sequence.Normally this instruction is used to support Execute-In-Place enhanced mode. See XIP enhanced mode for
# more details.This instruction is only allowed for AHB read commands. There is interrupt status bit set
# (INTR[IPCMDERR] or INTR[AHBCMDERR]) when using this instruction in IP command or AHB write command.
# - CMD_DDR, (33): Transmit command code to Flash.
# - RADDR_DDR, (34): Transmit row address to Flash.
# - CADDR_DDR, (35): Transmit column address to Flash.
# - MODE1_DDR, (36): Transmit mode bits to Flash.
# - MODE2_DDR, (37): Transmit mode bits to Flash.
# - MODE4_DDR, (38): Transmit mode bits to Flash.
# - MODE8_DDR, (39): Transmit mode bits to Flash.
# - WRITE_DDR, (40): Transmit program data to Flash device.
# - READ_DDR, (41): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_DDR, (42): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_DDR, (43): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_DDR, (44): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_DDR, (45): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# Possible options: <STOP, CMD_SDR, RADDR_SDR, CADDR_SDR, MODE1_SDR, MODE2_SDR, MODE4_SDR, MODE8_SDR, WRITE_SDR,
# READ_SDR, LEARN_SDR, DATSZ_SDR, DUMMY_SDR, DUMMY_RWDS_SDR, JMP_ON_CS, CMD_DDR, RADDR_DDR, CADDR_DDR, MODE1_DDR,
# MODE2_DDR, MODE4_DDR, MODE8_DDR, WRITE_DDR, READ_DDR, LEARN_DDR, DATSZ_DDR, DUMMY_DDR, DUMMY_RWDS_DDR>
OPERATION_CODE: STOP
lookupTable_seq12_instr1:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq12_instr2:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq12_instr3:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq12_instr4:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq12_instr5:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq12_instr6:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq12_instr7:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
# ----------------------------------===== lookupTable_seq13_instr0 [Optional] =====-----------------------------------
# Description: Offset: 0x00000150, Width: 16b; Lookup table holds Flash command sequences 13, instruction 0
lookupTable_seq13_instr0:
# ------------------------------------------===== OPERAND [Optional] =====------------------------------------------
# Description: Offset: 0b, Width: 8b, Instruction operand. Its values depends on used instruction
OPERAND: 0
# -----------------------------------------===== NUM_PADS [Optional] =====------------------------------------------
# Description: Offset: 8b, Width: 2b, Number of pads used by instruction. Some instructions ignores this parameter.
# - 1PAD, (0): Single mode. One pad is used.
# - 2PAD, (1): Dual mode. Two pads are used.
# - 4PAD, (2): Quad mode. Four pads are used.
# - 8PAD, (3): Octal mode. Eight pads are used.
# Possible options: <1PAD, 2PAD, 4PAD, 8PAD>
NUM_PADS: 1PAD
# --------------------------------------===== OPERATION_CODE [Optional] =====---------------------------------------
# Description: Offset: 10b, Width: 6b, Instruction operation code.
# - STOP, (0): Stop execution and de-assert CS. Then, the next command sequence (to the same flash device) starts
# from instruction pointer 0.
# - CMD_SDR, (1): Transmit command code to Flash.
# - RADDR_SDR, (2): Transmit row address to Flash.
# - CADDR_SDR, (3): Transmit column address to Flash.
# - MODE1_SDR, (4): Transmit mode bits to Flash.
# - MODE2_SDR, (5): Transmit mode bits to Flash.
# - MODE4_SDR, (6): Transmit mode bits to Flash.
# - MODE8_SDR, (7): Transmit mode bits to Flash.
# - WRITE_SDR, (8): Transmit program data to Flash device.
# - READ_SDR, (9): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_SDR, (10): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_SDR, (11): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_SDR, (12): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_SDR, (13): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# - JMP_ON_CS, (31): Stop execution, de-assert CS and save operand[7:0] as the instruction start pointer for next
# sequence.Normally this instruction is used to support Execute-In-Place enhanced mode. See XIP enhanced mode for
# more details.This instruction is only allowed for AHB read commands. There is interrupt status bit set
# (INTR[IPCMDERR] or INTR[AHBCMDERR]) when using this instruction in IP command or AHB write command.
# - CMD_DDR, (33): Transmit command code to Flash.
# - RADDR_DDR, (34): Transmit row address to Flash.
# - CADDR_DDR, (35): Transmit column address to Flash.
# - MODE1_DDR, (36): Transmit mode bits to Flash.
# - MODE2_DDR, (37): Transmit mode bits to Flash.
# - MODE4_DDR, (38): Transmit mode bits to Flash.
# - MODE8_DDR, (39): Transmit mode bits to Flash.
# - WRITE_DDR, (40): Transmit program data to Flash device.
# - READ_DDR, (41): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_DDR, (42): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_DDR, (43): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_DDR, (44): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_DDR, (45): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# Possible options: <STOP, CMD_SDR, RADDR_SDR, CADDR_SDR, MODE1_SDR, MODE2_SDR, MODE4_SDR, MODE8_SDR, WRITE_SDR,
# READ_SDR, LEARN_SDR, DATSZ_SDR, DUMMY_SDR, DUMMY_RWDS_SDR, JMP_ON_CS, CMD_DDR, RADDR_DDR, CADDR_DDR, MODE1_DDR,
# MODE2_DDR, MODE4_DDR, MODE8_DDR, WRITE_DDR, READ_DDR, LEARN_DDR, DATSZ_DDR, DUMMY_DDR, DUMMY_RWDS_DDR>
OPERATION_CODE: STOP
lookupTable_seq13_instr1:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq13_instr2:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq13_instr3:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq13_instr4:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq13_instr5:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq13_instr6:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq13_instr7:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
# ----------------------------------===== lookupTable_seq14_instr0 [Optional] =====-----------------------------------
# Description: Offset: 0x00000160, Width: 16b; Lookup table holds Flash command sequences 14, instruction 0
lookupTable_seq14_instr0:
# ------------------------------------------===== OPERAND [Optional] =====------------------------------------------
# Description: Offset: 0b, Width: 8b, Instruction operand. Its values depends on used instruction
OPERAND: 0
# -----------------------------------------===== NUM_PADS [Optional] =====------------------------------------------
# Description: Offset: 8b, Width: 2b, Number of pads used by instruction. Some instructions ignores this parameter.
# - 1PAD, (0): Single mode. One pad is used.
# - 2PAD, (1): Dual mode. Two pads are used.
# - 4PAD, (2): Quad mode. Four pads are used.
# - 8PAD, (3): Octal mode. Eight pads are used.
# Possible options: <1PAD, 2PAD, 4PAD, 8PAD>
NUM_PADS: 1PAD
# --------------------------------------===== OPERATION_CODE [Optional] =====---------------------------------------
# Description: Offset: 10b, Width: 6b, Instruction operation code.
# - STOP, (0): Stop execution and de-assert CS. Then, the next command sequence (to the same flash device) starts
# from instruction pointer 0.
# - CMD_SDR, (1): Transmit command code to Flash.
# - RADDR_SDR, (2): Transmit row address to Flash.
# - CADDR_SDR, (3): Transmit column address to Flash.
# - MODE1_SDR, (4): Transmit mode bits to Flash.
# - MODE2_SDR, (5): Transmit mode bits to Flash.
# - MODE4_SDR, (6): Transmit mode bits to Flash.
# - MODE8_SDR, (7): Transmit mode bits to Flash.
# - WRITE_SDR, (8): Transmit program data to Flash device.
# - READ_SDR, (9): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_SDR, (10): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_SDR, (11): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_SDR, (12): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_SDR, (13): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# - JMP_ON_CS, (31): Stop execution, de-assert CS and save operand[7:0] as the instruction start pointer for next
# sequence.Normally this instruction is used to support Execute-In-Place enhanced mode. See XIP enhanced mode for
# more details.This instruction is only allowed for AHB read commands. There is interrupt status bit set
# (INTR[IPCMDERR] or INTR[AHBCMDERR]) when using this instruction in IP command or AHB write command.
# - CMD_DDR, (33): Transmit command code to Flash.
# - RADDR_DDR, (34): Transmit row address to Flash.
# - CADDR_DDR, (35): Transmit column address to Flash.
# - MODE1_DDR, (36): Transmit mode bits to Flash.
# - MODE2_DDR, (37): Transmit mode bits to Flash.
# - MODE4_DDR, (38): Transmit mode bits to Flash.
# - MODE8_DDR, (39): Transmit mode bits to Flash.
# - WRITE_DDR, (40): Transmit program data to Flash device.
# - READ_DDR, (41): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_DDR, (42): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_DDR, (43): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_DDR, (44): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_DDR, (45): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# Possible options: <STOP, CMD_SDR, RADDR_SDR, CADDR_SDR, MODE1_SDR, MODE2_SDR, MODE4_SDR, MODE8_SDR, WRITE_SDR,
# READ_SDR, LEARN_SDR, DATSZ_SDR, DUMMY_SDR, DUMMY_RWDS_SDR, JMP_ON_CS, CMD_DDR, RADDR_DDR, CADDR_DDR, MODE1_DDR,
# MODE2_DDR, MODE4_DDR, MODE8_DDR, WRITE_DDR, READ_DDR, LEARN_DDR, DATSZ_DDR, DUMMY_DDR, DUMMY_RWDS_DDR>
OPERATION_CODE: STOP
lookupTable_seq14_instr1:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq14_instr2:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq14_instr3:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq14_instr4:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq14_instr5:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq14_instr6:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq14_instr7:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
# ----------------------------------===== lookupTable_seq15_instr0 [Optional] =====-----------------------------------
# Description: Offset: 0x00000170, Width: 16b; Lookup table holds Flash command sequences 15, instruction 0
lookupTable_seq15_instr0:
# ------------------------------------------===== OPERAND [Optional] =====------------------------------------------
# Description: Offset: 0b, Width: 8b, Instruction operand. Its values depends on used instruction
OPERAND: 0
# -----------------------------------------===== NUM_PADS [Optional] =====------------------------------------------
# Description: Offset: 8b, Width: 2b, Number of pads used by instruction. Some instructions ignores this parameter.
# - 1PAD, (0): Single mode. One pad is used.
# - 2PAD, (1): Dual mode. Two pads are used.
# - 4PAD, (2): Quad mode. Four pads are used.
# - 8PAD, (3): Octal mode. Eight pads are used.
# Possible options: <1PAD, 2PAD, 4PAD, 8PAD>
NUM_PADS: 1PAD
# --------------------------------------===== OPERATION_CODE [Optional] =====---------------------------------------
# Description: Offset: 10b, Width: 6b, Instruction operation code.
# - STOP, (0): Stop execution and de-assert CS. Then, the next command sequence (to the same flash device) starts
# from instruction pointer 0.
# - CMD_SDR, (1): Transmit command code to Flash.
# - RADDR_SDR, (2): Transmit row address to Flash.
# - CADDR_SDR, (3): Transmit column address to Flash.
# - MODE1_SDR, (4): Transmit mode bits to Flash.
# - MODE2_SDR, (5): Transmit mode bits to Flash.
# - MODE4_SDR, (6): Transmit mode bits to Flash.
# - MODE8_SDR, (7): Transmit mode bits to Flash.
# - WRITE_SDR, (8): Transmit program data to Flash device.
# - READ_SDR, (9): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_SDR, (10): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_SDR, (11): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_SDR, (12): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_SDR, (13): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# - JMP_ON_CS, (31): Stop execution, de-assert CS and save operand[7:0] as the instruction start pointer for next
# sequence.Normally this instruction is used to support Execute-In-Place enhanced mode. See XIP enhanced mode for
# more details.This instruction is only allowed for AHB read commands. There is interrupt status bit set
# (INTR[IPCMDERR] or INTR[AHBCMDERR]) when using this instruction in IP command or AHB write command.
# - CMD_DDR, (33): Transmit command code to Flash.
# - RADDR_DDR, (34): Transmit row address to Flash.
# - CADDR_DDR, (35): Transmit column address to Flash.
# - MODE1_DDR, (36): Transmit mode bits to Flash.
# - MODE2_DDR, (37): Transmit mode bits to Flash.
# - MODE4_DDR, (38): Transmit mode bits to Flash.
# - MODE8_DDR, (39): Transmit mode bits to Flash.
# - WRITE_DDR, (40): Transmit program data to Flash device.
# - READ_DDR, (41): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_DDR, (42): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_DDR, (43): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_DDR, (44): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_DDR, (45): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# Possible options: <STOP, CMD_SDR, RADDR_SDR, CADDR_SDR, MODE1_SDR, MODE2_SDR, MODE4_SDR, MODE8_SDR, WRITE_SDR,
# READ_SDR, LEARN_SDR, DATSZ_SDR, DUMMY_SDR, DUMMY_RWDS_SDR, JMP_ON_CS, CMD_DDR, RADDR_DDR, CADDR_DDR, MODE1_DDR,
# MODE2_DDR, MODE4_DDR, MODE8_DDR, WRITE_DDR, READ_DDR, LEARN_DDR, DATSZ_DDR, DUMMY_DDR, DUMMY_RWDS_DDR>
OPERATION_CODE: STOP
lookupTable_seq15_instr1:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq15_instr2:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq15_instr3:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq15_instr4:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq15_instr5:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq15_instr6:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq15_instr7:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
# ---------------------------------------===== lutCustomSeq_0 [Optional] =====----------------------------------------
# Description: Offset: 0x00000180, Width: 32b; [0x180-0x1af] Customizable LUT Sequences
lutCustomSeq_0:
# ------------------------------------------===== seqNum [Optional] =====-------------------------------------------
# Description: Offset: 0b, Width: 8b, Sequence Number, valid number: 1-16
seqNum: 0
# -------------------------------------------===== seqId [Optional] =====-------------------------------------------
# Description: Offset: 8b, Width: 8b, Sequence Index, valid number: 0-15
seqId: 0
# -----------------------------------------===== reserved [Optional] =====------------------------------------------
# Description: Offset: 16b, Width: 16b, N/A
reserved: 0
# ---------------------------------------===== lutCustomSeq_1 [Optional] =====----------------------------------------
# Description: Offset: 0x00000184, Width: 32b; [0x180-0x1af] Customizable LUT Sequences
lutCustomSeq_1:
# ------------------------------------------===== seqNum [Optional] =====-------------------------------------------
# Description: Offset: 0b, Width: 8b, Sequence Number, valid number: 1-16
seqNum: 0
# -------------------------------------------===== seqId [Optional] =====-------------------------------------------
# Description: Offset: 8b, Width: 8b, Sequence Index, valid number: 0-15
seqId: 0
# -----------------------------------------===== reserved [Optional] =====------------------------------------------
# Description: Offset: 16b, Width: 16b, N/A
reserved: 0
# ---------------------------------------===== lutCustomSeq_2 [Optional] =====----------------------------------------
# Description: Offset: 0x00000188, Width: 32b; [0x180-0x1af] Customizable LUT Sequences
lutCustomSeq_2:
# ------------------------------------------===== seqNum [Optional] =====-------------------------------------------
# Description: Offset: 0b, Width: 8b, Sequence Number, valid number: 1-16
seqNum: 0
# -------------------------------------------===== seqId [Optional] =====-------------------------------------------
# Description: Offset: 8b, Width: 8b, Sequence Index, valid number: 0-15
seqId: 0
# -----------------------------------------===== reserved [Optional] =====------------------------------------------
# Description: Offset: 16b, Width: 16b, N/A
reserved: 0
# ---------------------------------------===== lutCustomSeq_3 [Optional] =====----------------------------------------
# Description: Offset: 0x0000018C, Width: 32b; [0x180-0x1af] Customizable LUT Sequences
lutCustomSeq_3:
# ------------------------------------------===== seqNum [Optional] =====-------------------------------------------
# Description: Offset: 0b, Width: 8b, Sequence Number, valid number: 1-16
seqNum: 0
# -------------------------------------------===== seqId [Optional] =====-------------------------------------------
# Description: Offset: 8b, Width: 8b, Sequence Index, valid number: 0-15
seqId: 0
# -----------------------------------------===== reserved [Optional] =====------------------------------------------
# Description: Offset: 16b, Width: 16b, N/A
reserved: 0
# ---------------------------------------===== lutCustomSeq_4 [Optional] =====----------------------------------------
# Description: Offset: 0x00000190, Width: 32b; [0x180-0x1af] Customizable LUT Sequences
lutCustomSeq_4:
# ------------------------------------------===== seqNum [Optional] =====-------------------------------------------
# Description: Offset: 0b, Width: 8b, Sequence Number, valid number: 1-16
seqNum: 0
# -------------------------------------------===== seqId [Optional] =====-------------------------------------------
# Description: Offset: 8b, Width: 8b, Sequence Index, valid number: 0-15
seqId: 0
# -----------------------------------------===== reserved [Optional] =====------------------------------------------
# Description: Offset: 16b, Width: 16b, N/A
reserved: 0
# ---------------------------------------===== lutCustomSeq_5 [Optional] =====----------------------------------------
# Description: Offset: 0x00000194, Width: 32b; [0x180-0x1af] Customizable LUT Sequences
lutCustomSeq_5:
# ------------------------------------------===== seqNum [Optional] =====-------------------------------------------
# Description: Offset: 0b, Width: 8b, Sequence Number, valid number: 1-16
seqNum: 0
# -------------------------------------------===== seqId [Optional] =====-------------------------------------------
# Description: Offset: 8b, Width: 8b, Sequence Index, valid number: 0-15
seqId: 0
# -----------------------------------------===== reserved [Optional] =====------------------------------------------
# Description: Offset: 16b, Width: 16b, N/A
reserved: 0
# ---------------------------------------===== lutCustomSeq_6 [Optional] =====----------------------------------------
# Description: Offset: 0x00000198, Width: 32b; [0x180-0x1af] Customizable LUT Sequences
lutCustomSeq_6:
# ------------------------------------------===== seqNum [Optional] =====-------------------------------------------
# Description: Offset: 0b, Width: 8b, Sequence Number, valid number: 1-16
seqNum: 0
# -------------------------------------------===== seqId [Optional] =====-------------------------------------------
# Description: Offset: 8b, Width: 8b, Sequence Index, valid number: 0-15
seqId: 0
# -----------------------------------------===== reserved [Optional] =====------------------------------------------
# Description: Offset: 16b, Width: 16b, N/A
reserved: 0
# ---------------------------------------===== lutCustomSeq_7 [Optional] =====----------------------------------------
# Description: Offset: 0x0000019C, Width: 32b; [0x180-0x1af] Customizable LUT Sequences
lutCustomSeq_7:
# ------------------------------------------===== seqNum [Optional] =====-------------------------------------------
# Description: Offset: 0b, Width: 8b, Sequence Number, valid number: 1-16
seqNum: 0
# -------------------------------------------===== seqId [Optional] =====-------------------------------------------
# Description: Offset: 8b, Width: 8b, Sequence Index, valid number: 0-15
seqId: 0
# -----------------------------------------===== reserved [Optional] =====------------------------------------------
# Description: Offset: 16b, Width: 16b, N/A
reserved: 0
# ---------------------------------------===== lutCustomSeq_8 [Optional] =====----------------------------------------
# Description: Offset: 0x000001A0, Width: 32b; [0x180-0x1af] Customizable LUT Sequences
lutCustomSeq_8:
# ------------------------------------------===== seqNum [Optional] =====-------------------------------------------
# Description: Offset: 0b, Width: 8b, Sequence Number, valid number: 1-16
seqNum: 0
# -------------------------------------------===== seqId [Optional] =====-------------------------------------------
# Description: Offset: 8b, Width: 8b, Sequence Index, valid number: 0-15
seqId: 0
# -----------------------------------------===== reserved [Optional] =====------------------------------------------
# Description: Offset: 16b, Width: 16b, N/A
reserved: 0
# ---------------------------------------===== lutCustomSeq_9 [Optional] =====----------------------------------------
# Description: Offset: 0x000001A4, Width: 32b; [0x180-0x1af] Customizable LUT Sequences
lutCustomSeq_9:
# ------------------------------------------===== seqNum [Optional] =====-------------------------------------------
# Description: Offset: 0b, Width: 8b, Sequence Number, valid number: 1-16
seqNum: 0
# -------------------------------------------===== seqId [Optional] =====-------------------------------------------
# Description: Offset: 8b, Width: 8b, Sequence Index, valid number: 0-15
seqId: 0
# -----------------------------------------===== reserved [Optional] =====------------------------------------------
# Description: Offset: 16b, Width: 16b, N/A
reserved: 0
# ---------------------------------------===== lutCustomSeq_10 [Optional] =====---------------------------------------
# Description: Offset: 0x000001A8, Width: 32b; [0x180-0x1af] Customizable LUT Sequences
lutCustomSeq_10:
# ------------------------------------------===== seqNum [Optional] =====-------------------------------------------
# Description: Offset: 0b, Width: 8b, Sequence Number, valid number: 1-16
seqNum: 0
# -------------------------------------------===== seqId [Optional] =====-------------------------------------------
# Description: Offset: 8b, Width: 8b, Sequence Index, valid number: 0-15
seqId: 0
# -----------------------------------------===== reserved [Optional] =====------------------------------------------
# Description: Offset: 16b, Width: 16b, N/A
reserved: 0
# ---------------------------------------===== lutCustomSeq_11 [Optional] =====---------------------------------------
# Description: Offset: 0x000001AC, Width: 32b; [0x180-0x1af] Customizable LUT Sequences
lutCustomSeq_11:
# ------------------------------------------===== seqNum [Optional] =====-------------------------------------------
# Description: Offset: 0b, Width: 8b, Sequence Number, valid number: 1-16
seqNum: 0
# -------------------------------------------===== seqId [Optional] =====-------------------------------------------
# Description: Offset: 8b, Width: 8b, Sequence Index, valid number: 0-15
seqId: 0
# -----------------------------------------===== reserved [Optional] =====------------------------------------------
# Description: Offset: 16b, Width: 16b, N/A
reserved: 0
# -----------------------------------------===== reserved4_0 [Optional] =====-----------------------------------------
# Description: Offset: 0x000001B0, Width: 32b; [0x1b0-0x1bf] Reserved for future use
reserved4_0: '0x00000000'
# -----------------------------------------===== reserved4_1 [Optional] =====-----------------------------------------
# Description: Offset: 0x000001B4, Width: 32b; [0x1b0-0x1bf] Reserved for future use
reserved4_1: '0x00000000'
# -----------------------------------------===== reserved4_2 [Optional] =====-----------------------------------------
# Description: Offset: 0x000001B8, Width: 32b; [0x1b0-0x1bf] Reserved for future use
reserved4_2: '0x00000000'
# -----------------------------------------===== reserved4_3 [Optional] =====-----------------------------------------
# Description: Offset: 0x000001BC, Width: 32b; [0x1b0-0x1bf] Reserved for future use
reserved4_3: '0x00000000'
# ------------------------------------------===== pageSize [Optional] =====-------------------------------------------
# Description: Offset: 0x000001C0, Width: 32b; Page size of Serial NOR
pageSize: '0x00000000'
# -----------------------------------------===== sectorSize [Optional] =====------------------------------------------
# Description: Offset: 0x000001C4, Width: 32b; Sector size of Serial NOR
sectorSize: '0x00000000'
# -------------------------------------===== ipcmdSerialClkFreq [Optional] =====--------------------------------------
# Description: Offset: 0x000001C8, Width: 8b; Clock frequency for IP command
ipcmdSerialClkFreq: '0x00'
# -------------------------------------===== isUniformBlockSize [Optional] =====--------------------------------------
# Description: Offset: 0x000001C9, Width: 8b; Sector/Block size is the same
isUniformBlockSize: '0x00'
# -----------------------------------------===== reserved0_0 [Optional] =====-----------------------------------------
# Description: Offset: 0x000001CA, Width: 8b; Reserved for future use
reserved0_0: '0x00'
# -----------------------------------------===== reserved0_1 [Optional] =====-----------------------------------------
# Description: Offset: 0x000001CB, Width: 8b; Reserved for future use
reserved0_1: '0x00'
# ----------------------------------------===== serialNorType [Optional] =====----------------------------------------
# Description: Offset: 0x000001CC, Width: 8b; Serial NOR Flash type: 0/1/2/3
serialNorType: '0x00'
# --------------------------------------===== needExitNoCmdMode [Optional] =====--------------------------------------
# Description: Offset: 0x000001CD, Width: 8b; Need to exit NoCmd mode before other IP command
needExitNoCmdMode: '0x00'
# ------------------------------------===== halfClkForNonReadCmd [Optional] =====-------------------------------------
# Description: Offset: 0x000001CE, Width: 8b; Half the Serial Clock for non-read command: true/false
halfClkForNonReadCmd: '0x00'
# ------------------------------------===== needRestoreNoCmdMode [Optional] =====-------------------------------------
# Description: Offset: 0x000001CF, Width: 8b; Need to Restore NoCmd mode after IP command execution
needRestoreNoCmdMode: '0x00'
# ------------------------------------------===== blockSize [Optional] =====------------------------------------------
# Description: Offset: 0x000001D0, Width: 32b; Block size
blockSize: '0x00000000'
# -----------------------------------------===== reserve2_0 [Optional] =====------------------------------------------
# Description: Offset: 0x000001D4, Width: 32b; Reserved for future use
reserve2_0: '0x00000000'
# -----------------------------------------===== reserve2_1 [Optional] =====------------------------------------------
# Description: Offset: 0x000001D8, Width: 32b; Reserved for future use
reserve2_1: '0x00000000'
# -----------------------------------------===== reserve2_2 [Optional] =====------------------------------------------
# Description: Offset: 0x000001DC, Width: 32b; Reserved for future use
reserve2_2: '0x00000000'
# -----------------------------------------===== reserve2_3 [Optional] =====------------------------------------------
# Description: Offset: 0x000001E0, Width: 32b; Reserved for future use
reserve2_3: '0x00000000'
# -----------------------------------------===== reserve2_4 [Optional] =====------------------------------------------
# Description: Offset: 0x000001E4, Width: 32b; Reserved for future use
reserve2_4: '0x00000000'
# -----------------------------------------===== reserve2_5 [Optional] =====------------------------------------------
# Description: Offset: 0x000001E8, Width: 32b; Reserved for future use
reserve2_5: '0x00000000'
# -----------------------------------------===== reserve2_6 [Optional] =====------------------------------------------
# Description: Offset: 0x000001EC, Width: 32b; Reserved for future use
reserve2_6: '0x00000000'
# -----------------------------------------===== reserve2_7 [Optional] =====------------------------------------------
# Description: Offset: 0x000001F0, Width: 32b; Reserved for future use
reserve2_7: '0x00000000'
# -----------------------------------------===== reserve2_8 [Optional] =====------------------------------------------
# Description: Offset: 0x000001F4, Width: 32b; Reserved for future use
reserve2_8: '0x00000000'
# -----------------------------------------===== reserve2_9 [Optional] =====------------------------------------------
# Description: Offset: 0x000001F8, Width: 32b; Reserved for future use
reserve2_9: '0x00000000'
# -----------------------------------------===== reserve2_10 [Optional] =====-----------------------------------------
# Description: Offset: 0x000001FC, Width: 32b; Reserved for future use
reserve2_10: '0x00000000'
FCB for mimxrt1171, Revision: a0 and flexspi_nor#
FCB for mimxrt1171, Revision: a0 and flexspi_nor JSON schema
FCB for mimxrt1171, Revision: a0 and flexspi_nor YAML configuration template
# ================================= FCB for mimxrt1171, Revision: a0 and flexspi_nor =================================
# ======================================================================================================================
# == FCB for mimxrt1171, Revision: a0 and flexspi_nor ==
# ======================================================================================================================
# -------------------------------------===== The chip family name [Required] =====--------------------------------------
# Description: NXP chip family identifier.
family: CHOOSE_FROM_TABLE
# -----------------------------------------===== MCU revision [Optional] =====------------------------------------------
# Description: Revision of silicon. The 'latest' name, means most current revision.
# Possible options: <a0, latest>
revision: a0
# ------------------------------------------===== Memory type [Required] =====------------------------------------------
# Description: Specify type of memory used by FCB description.
# Possible options: <flexspi_nor>
type: flexspi_nor
# ------------------------------------------===== mimxrt1171 [Required] =====-------------------------------------------
fcb_settings:
# ---------------------------------------------===== tag [Optional] =====---------------------------------------------
# Description: Offset: 0x00000000, Width: 32b; [0x000-0x003] Tag, fixed value 0x42464346UL
tag: '0x42464346'
# -------------------------------------------===== version [Optional] =====-------------------------------------------
# Description: Offset: 0x00000004, Width: 32b; [0x004-0x007] Version,[31:24] -'V', [23:16] - Major, [15:8] - Minor,
# [7:0] - bugfix
version: '0x56010400'
# ------------------------------------------===== reserved0 [Optional] =====------------------------------------------
# Description: Offset: 0x00000008, Width: 32b; [0x008-0x00b] Reserved for future use
reserved0: '0x00000000'
# --------------------------------------===== readSampleClkSrc [Optional] =====---------------------------------------
# Description: Offset: 0x0000000C, Width: 8b; [0x00c-0x00c] Read Sample Clock Source, valid value: 0/1/3
readSampleClkSrc: '0x00'
# -----------------------------------------===== csHoldTime [Optional] =====------------------------------------------
# Description: Offset: 0x0000000D, Width: 8b; [0x00d-0x00d] CS hold time, default value: 3
csHoldTime: '0x00'
# -----------------------------------------===== csSetupTime [Optional] =====-----------------------------------------
# Description: Offset: 0x0000000E, Width: 8b; [0x00e-0x00e] CS setup time, default value: 3
csSetupTime: '0x00'
# -------------------------------------===== columnAddressWidth [Optional] =====--------------------------------------
# Description: Offset: 0x0000000F, Width: 8b; [0x00f-0x00f] Column Address with, for HyperBus protocol, it is fixed
# to 3, For Serial NAND, need to refer to datasheet
columnAddressWidth: '0x00'
# -------------------------------------===== deviceModeCfgEnable [Optional] =====-------------------------------------
# Description: Offset: 0x00000010, Width: 8b; [0x010-0x010] Device Mode Configure enable flag, 1 - Enable, 0 -
# Disable
deviceModeCfgEnable: '0x00'
# ---------------------------------------===== deviceModeType [Optional] =====----------------------------------------
# Description: Offset: 0x00000011, Width: 8b; [0x011-0x011] Specify the configuration command type:Quad Enable,
# DPI/QPI/OPI switch, Generic configuration, etc.
deviceModeType: '0x00'
# -------------------------------------===== waitTimeCfgCommands [Optional] =====-------------------------------------
# Description: Offset: 0x00000012, Width: 16b; [0x012-0x013] Wait time for all configuration commands, unit: 100us,
# Used for DPI/QPI/OPI switch or reset command
waitTimeCfgCommands: '0x0000'
# ----------------------------------------===== deviceModeSeq [Optional] =====----------------------------------------
# Description: Offset: 0x00000014, Width: 32b; [0x014-0x017] Device mode sequence info, [7:0] - LUT sequence id,
# [15:8] - LUt sequence number, [31:16] Reserved
deviceModeSeq:
# ------------------------------------------===== seqNum [Optional] =====-------------------------------------------
# Description: Offset: 0b, Width: 8b, Sequence Number, valid number: 1-16
seqNum: 0
# -------------------------------------------===== seqId [Optional] =====-------------------------------------------
# Description: Offset: 8b, Width: 8b, Sequence Index, valid number: 0-15
seqId: 0
# -----------------------------------------===== reserved [Optional] =====------------------------------------------
# Description: Offset: 16b, Width: 16b, N/A
reserved: 0
# ----------------------------------------===== deviceModeArg [Optional] =====----------------------------------------
# Description: Offset: 0x00000018, Width: 32b; [0x018-0x01b] Argument/Parameter for device configuration
deviceModeArg: '0x00000000'
# ---------------------------------------===== configCmdEnable [Optional] =====---------------------------------------
# Description: Offset: 0x0000001C, Width: 8b; [0x01c-0x01c] Configure command Enable Flag, 1 - Enable, 0 - Disable
configCmdEnable: '0x00'
# --------------------------------------===== configModeType_0 [Optional] =====---------------------------------------
# Description: Offset: 0x0000001D, Width: 8b; [0x01d-0x01f] Configure Mode Type, similar as deviceModeTpe
configModeType_0: '0x00'
# --------------------------------------===== configModeType_1 [Optional] =====---------------------------------------
# Description: Offset: 0x0000001E, Width: 8b; [0x01d-0x01f] Configure Mode Type, similar as deviceModeTpe
configModeType_1: '0x00'
# --------------------------------------===== configModeType_2 [Optional] =====---------------------------------------
# Description: Offset: 0x0000001F, Width: 8b; [0x01d-0x01f] Configure Mode Type, similar as deviceModeTpe
configModeType_2: '0x00'
# ---------------------------------------===== configCmdSeqs_0 [Optional] =====---------------------------------------
# Description: Offset: 0x00000020, Width: 32b; [0x020-0x02b] Sequence info for Device Configuration command, similar
# as deviceModeSeq
configCmdSeqs_0:
# ------------------------------------------===== seqNum [Optional] =====-------------------------------------------
# Description: Offset: 0b, Width: 8b, Sequence Number, valid number: 1-16
seqNum: 0
# -------------------------------------------===== seqId [Optional] =====-------------------------------------------
# Description: Offset: 8b, Width: 8b, Sequence Index, valid number: 0-15
seqId: 0
# -----------------------------------------===== reserved [Optional] =====------------------------------------------
# Description: Offset: 16b, Width: 16b, N/A
reserved: 0
# ---------------------------------------===== configCmdSeqs_1 [Optional] =====---------------------------------------
# Description: Offset: 0x00000024, Width: 32b; [0x020-0x02b] Sequence info for Device Configuration command, similar
# as deviceModeSeq
configCmdSeqs_1:
# ------------------------------------------===== seqNum [Optional] =====-------------------------------------------
# Description: Offset: 0b, Width: 8b, Sequence Number, valid number: 1-16
seqNum: 0
# -------------------------------------------===== seqId [Optional] =====-------------------------------------------
# Description: Offset: 8b, Width: 8b, Sequence Index, valid number: 0-15
seqId: 0
# -----------------------------------------===== reserved [Optional] =====------------------------------------------
# Description: Offset: 16b, Width: 16b, N/A
reserved: 0
# ---------------------------------------===== configCmdSeqs_2 [Optional] =====---------------------------------------
# Description: Offset: 0x00000028, Width: 32b; [0x020-0x02b] Sequence info for Device Configuration command, similar
# as deviceModeSeq
configCmdSeqs_2:
# ------------------------------------------===== seqNum [Optional] =====-------------------------------------------
# Description: Offset: 0b, Width: 8b, Sequence Number, valid number: 1-16
seqNum: 0
# -------------------------------------------===== seqId [Optional] =====-------------------------------------------
# Description: Offset: 8b, Width: 8b, Sequence Index, valid number: 0-15
seqId: 0
# -----------------------------------------===== reserved [Optional] =====------------------------------------------
# Description: Offset: 16b, Width: 16b, N/A
reserved: 0
# ------------------------------------------===== reserved1 [Optional] =====------------------------------------------
# Description: Offset: 0x0000002C, Width: 32b; [0x02c-0x02f] Reserved for future use
reserved1: '0x00000000'
# ---------------------------------------===== configCmdArgs_0 [Optional] =====---------------------------------------
# Description: Offset: 0x00000030, Width: 32b; [0x030-0x03b] Arguments/Parameters for device Configuration commands
configCmdArgs_0: '0x00000000'
# ---------------------------------------===== configCmdArgs_1 [Optional] =====---------------------------------------
# Description: Offset: 0x00000034, Width: 32b; [0x030-0x03b] Arguments/Parameters for device Configuration commands
configCmdArgs_1: '0x00000000'
# ---------------------------------------===== configCmdArgs_2 [Optional] =====---------------------------------------
# Description: Offset: 0x00000038, Width: 32b; [0x030-0x03b] Arguments/Parameters for device Configuration commands
configCmdArgs_2: '0x00000000'
# ------------------------------------------===== reserved2 [Optional] =====------------------------------------------
# Description: Offset: 0x0000003C, Width: 32b; [0x03c-0x03f] Reserved for future use
reserved2: '0x00000000'
# ------------------------------------===== controllerMiscOption [Optional] =====-------------------------------------
# Description: Offset: 0x00000040, Width: 32b; [0x040-0x043] Controller Misc Options, see Misc feature bit
# definitions for more details
controllerMiscOption: '0x00000000'
# -----------------------------------------===== deviceType [Optional] =====------------------------------------------
# Description: Offset: 0x00000044, Width: 8b; [0x044-0x044] Device Type: See Flash Type Definition for more details
deviceType: '0x00'
# ----------------------------------------===== sflashPadType [Optional] =====----------------------------------------
# Description: Offset: 0x00000045, Width: 8b; [0x045-0x045] Serial Flash Pad Type: 1 - Single, 2 - Dual, 4 - Quad, 8
# - Octal
sflashPadType: '0x00'
# ----------------------------------------===== serialClkFreq [Optional] =====----------------------------------------
# Description: Offset: 0x00000046, Width: 8b; [0x046-0x046] Serial Flash Frequency, device specific definitions, See
# System Boot Chapter for more details
serialClkFreq: '0x00'
# -------------------------------------===== lutCustomSeqEnable [Optional] =====--------------------------------------
# Description: Offset: 0x00000047, Width: 8b; [0x047-0x047] LUT customization Enable, it is required if the
# program/erase cannot be done using 1 LUT sequence, currently, only applicable to HyperFLASH
lutCustomSeqEnable: '0x00'
# -----------------------------------------===== reserved3_0 [Optional] =====-----------------------------------------
# Description: Offset: 0x00000048, Width: 32b; [0x048-0x04f] Reserved for future use
reserved3_0: '0x00000000'
# -----------------------------------------===== reserved3_1 [Optional] =====-----------------------------------------
# Description: Offset: 0x0000004C, Width: 32b; [0x048-0x04f] Reserved for future use
reserved3_1: '0x00000000'
# ----------------------------------------===== sflashA1Size [Optional] =====-----------------------------------------
# Description: Offset: 0x00000050, Width: 32b; [0x050-0x053] Size of Flash connected to A1
sflashA1Size: '0x00000000'
# ----------------------------------------===== sflashA2Size [Optional] =====-----------------------------------------
# Description: Offset: 0x00000054, Width: 32b; [0x054-0x057] Size of Flash connected to A2
sflashA2Size: '0x00000000'
# ----------------------------------------===== sflashB1Size [Optional] =====-----------------------------------------
# Description: Offset: 0x00000058, Width: 32b; [0x058-0x05b] Size of Flash connected to B1
sflashB1Size: '0x00000000'
# ----------------------------------------===== sflashB2Size [Optional] =====-----------------------------------------
# Description: Offset: 0x0000005C, Width: 32b; [0x05c-0x05f] Size of Flash connected to B2
sflashB2Size: '0x00000000'
# ------------------------------------===== csPadSettingOverride [Optional] =====-------------------------------------
# Description: Offset: 0x00000060, Width: 32b; [0x060-0x063] CS pad setting override value
csPadSettingOverride: '0x00000000'
# -----------------------------------===== sclkPadSettingOverride [Optional] =====------------------------------------
# Description: Offset: 0x00000064, Width: 32b; [0x064-0x067] SCK pad setting override value
sclkPadSettingOverride: '0x00000000'
# -----------------------------------===== dataPadSettingOverride [Optional] =====------------------------------------
# Description: Offset: 0x00000068, Width: 32b; [0x068-0x06b] data pad setting override value
dataPadSettingOverride: '0x00000000'
# ------------------------------------===== dqsPadSettingOverride [Optional] =====------------------------------------
# Description: Offset: 0x0000006C, Width: 32b; [0x06c-0x06f] DQS pad setting override value
dqsPadSettingOverride: '0x00000000'
# -----------------------------------------===== timeoutInMs [Optional] =====-----------------------------------------
# Description: Offset: 0x00000070, Width: 32b; [0x070-0x073] Timeout threshold for read status command
timeoutInMs: '0x00000000'
# ---------------------------------------===== commandInterval [Optional] =====---------------------------------------
# Description: Offset: 0x00000074, Width: 32b; [0x074-0x077] CS deselect interval between two commands
commandInterval: '0x00000000'
# ---------------------------------------===== dataValidTime_0 [Optional] =====---------------------------------------
# Description: Offset: 0x00000078, Width: 16b; [0x078-0x07b] CLK edge to data valid time for PORT A and PORT B, in
# terms of 0.1ns
dataValidTime_0: '0x0000'
# ---------------------------------------===== dataValidTime_1 [Optional] =====---------------------------------------
# Description: Offset: 0x0000007A, Width: 16b; [0x078-0x07b] CLK edge to data valid time for PORT A and PORT B, in
# terms of 0.1ns
dataValidTime_1: '0x0000'
# -----------------------------------------===== busyOffset [Optional] =====------------------------------------------
# Description: Offset: 0x0000007C, Width: 16b; [0x07c-0x07d] Busy offset, valid value: 0-31
busyOffset: '0x0000'
# ---------------------------------------===== busyBitPolarity [Optional] =====---------------------------------------
# Description: Offset: 0x0000007E, Width: 16b; [0x07e-0x07f] Busy flag polarity, 0 - busy flag is 1 when flash device
# is busy, 1 - busy flag is 0 when flash device is busy
busyBitPolarity: '0x0000'
# -----------------------------------===== lookupTable_seq0_instr0 [Optional] =====-----------------------------------
# Description: Offset: 0x00000080, Width: 16b; Lookup table holds Flash command sequences 0, instruction 0
lookupTable_seq0_instr0:
# ------------------------------------------===== OPERAND [Optional] =====------------------------------------------
# Description: Offset: 0b, Width: 8b, Instruction operand. Its values depends on used instruction
OPERAND: 0
# -----------------------------------------===== NUM_PADS [Optional] =====------------------------------------------
# Description: Offset: 8b, Width: 2b, Number of pads used by instruction. Some instructions ignores this parameter.
# - 1PAD, (0): Single mode. One pad is used.
# - 2PAD, (1): Dual mode. Two pads are used.
# - 4PAD, (2): Quad mode. Four pads are used.
# - 8PAD, (3): Octal mode. Eight pads are used.
# Possible options: <1PAD, 2PAD, 4PAD, 8PAD>
NUM_PADS: 1PAD
# --------------------------------------===== OPERATION_CODE [Optional] =====---------------------------------------
# Description: Offset: 10b, Width: 6b, Instruction operation code.
# - STOP, (0): Stop execution and de-assert CS. Then, the next command sequence (to the same flash device) starts
# from instruction pointer 0.
# - CMD_SDR, (1): Transmit command code to Flash.
# - RADDR_SDR, (2): Transmit row address to Flash.
# - CADDR_SDR, (3): Transmit column address to Flash.
# - MODE1_SDR, (4): Transmit mode bits to Flash.
# - MODE2_SDR, (5): Transmit mode bits to Flash.
# - MODE4_SDR, (6): Transmit mode bits to Flash.
# - MODE8_SDR, (7): Transmit mode bits to Flash.
# - WRITE_SDR, (8): Transmit program data to Flash device.
# - READ_SDR, (9): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_SDR, (10): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_SDR, (11): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_SDR, (12): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_SDR, (13): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# - JMP_ON_CS, (31): Stop execution, de-assert CS and save operand[7:0] as the instruction start pointer for next
# sequence.Normally this instruction is used to support Execute-In-Place enhanced mode. See XIP enhanced mode for
# more details.This instruction is only allowed for AHB read commands. There is interrupt status bit set
# (INTR[IPCMDERR] or INTR[AHBCMDERR]) when using this instruction in IP command or AHB write command.
# - CMD_DDR, (33): Transmit command code to Flash.
# - RADDR_DDR, (34): Transmit row address to Flash.
# - CADDR_DDR, (35): Transmit column address to Flash.
# - MODE1_DDR, (36): Transmit mode bits to Flash.
# - MODE2_DDR, (37): Transmit mode bits to Flash.
# - MODE4_DDR, (38): Transmit mode bits to Flash.
# - MODE8_DDR, (39): Transmit mode bits to Flash.
# - WRITE_DDR, (40): Transmit program data to Flash device.
# - READ_DDR, (41): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_DDR, (42): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_DDR, (43): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_DDR, (44): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_DDR, (45): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# Possible options: <STOP, CMD_SDR, RADDR_SDR, CADDR_SDR, MODE1_SDR, MODE2_SDR, MODE4_SDR, MODE8_SDR, WRITE_SDR,
# READ_SDR, LEARN_SDR, DATSZ_SDR, DUMMY_SDR, DUMMY_RWDS_SDR, JMP_ON_CS, CMD_DDR, RADDR_DDR, CADDR_DDR, MODE1_DDR,
# MODE2_DDR, MODE4_DDR, MODE8_DDR, WRITE_DDR, READ_DDR, LEARN_DDR, DATSZ_DDR, DUMMY_DDR, DUMMY_RWDS_DDR>
OPERATION_CODE: STOP
lookupTable_seq0_instr1:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq0_instr2:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq0_instr3:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq0_instr4:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq0_instr5:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq0_instr6:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq0_instr7:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
# -----------------------------------===== lookupTable_seq1_instr0 [Optional] =====-----------------------------------
# Description: Offset: 0x00000090, Width: 16b; Lookup table holds Flash command sequences 1, instruction 0
lookupTable_seq1_instr0:
# ------------------------------------------===== OPERAND [Optional] =====------------------------------------------
# Description: Offset: 0b, Width: 8b, Instruction operand. Its values depends on used instruction
OPERAND: 0
# -----------------------------------------===== NUM_PADS [Optional] =====------------------------------------------
# Description: Offset: 8b, Width: 2b, Number of pads used by instruction. Some instructions ignores this parameter.
# - 1PAD, (0): Single mode. One pad is used.
# - 2PAD, (1): Dual mode. Two pads are used.
# - 4PAD, (2): Quad mode. Four pads are used.
# - 8PAD, (3): Octal mode. Eight pads are used.
# Possible options: <1PAD, 2PAD, 4PAD, 8PAD>
NUM_PADS: 1PAD
# --------------------------------------===== OPERATION_CODE [Optional] =====---------------------------------------
# Description: Offset: 10b, Width: 6b, Instruction operation code.
# - STOP, (0): Stop execution and de-assert CS. Then, the next command sequence (to the same flash device) starts
# from instruction pointer 0.
# - CMD_SDR, (1): Transmit command code to Flash.
# - RADDR_SDR, (2): Transmit row address to Flash.
# - CADDR_SDR, (3): Transmit column address to Flash.
# - MODE1_SDR, (4): Transmit mode bits to Flash.
# - MODE2_SDR, (5): Transmit mode bits to Flash.
# - MODE4_SDR, (6): Transmit mode bits to Flash.
# - MODE8_SDR, (7): Transmit mode bits to Flash.
# - WRITE_SDR, (8): Transmit program data to Flash device.
# - READ_SDR, (9): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_SDR, (10): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_SDR, (11): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_SDR, (12): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_SDR, (13): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# - JMP_ON_CS, (31): Stop execution, de-assert CS and save operand[7:0] as the instruction start pointer for next
# sequence.Normally this instruction is used to support Execute-In-Place enhanced mode. See XIP enhanced mode for
# more details.This instruction is only allowed for AHB read commands. There is interrupt status bit set
# (INTR[IPCMDERR] or INTR[AHBCMDERR]) when using this instruction in IP command or AHB write command.
# - CMD_DDR, (33): Transmit command code to Flash.
# - RADDR_DDR, (34): Transmit row address to Flash.
# - CADDR_DDR, (35): Transmit column address to Flash.
# - MODE1_DDR, (36): Transmit mode bits to Flash.
# - MODE2_DDR, (37): Transmit mode bits to Flash.
# - MODE4_DDR, (38): Transmit mode bits to Flash.
# - MODE8_DDR, (39): Transmit mode bits to Flash.
# - WRITE_DDR, (40): Transmit program data to Flash device.
# - READ_DDR, (41): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_DDR, (42): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_DDR, (43): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_DDR, (44): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_DDR, (45): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# Possible options: <STOP, CMD_SDR, RADDR_SDR, CADDR_SDR, MODE1_SDR, MODE2_SDR, MODE4_SDR, MODE8_SDR, WRITE_SDR,
# READ_SDR, LEARN_SDR, DATSZ_SDR, DUMMY_SDR, DUMMY_RWDS_SDR, JMP_ON_CS, CMD_DDR, RADDR_DDR, CADDR_DDR, MODE1_DDR,
# MODE2_DDR, MODE4_DDR, MODE8_DDR, WRITE_DDR, READ_DDR, LEARN_DDR, DATSZ_DDR, DUMMY_DDR, DUMMY_RWDS_DDR>
OPERATION_CODE: STOP
lookupTable_seq1_instr1:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq1_instr2:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq1_instr3:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq1_instr4:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq1_instr5:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq1_instr6:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq1_instr7:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
# -----------------------------------===== lookupTable_seq2_instr0 [Optional] =====-----------------------------------
# Description: Offset: 0x000000A0, Width: 16b; Lookup table holds Flash command sequences 2, instruction 0
lookupTable_seq2_instr0:
# ------------------------------------------===== OPERAND [Optional] =====------------------------------------------
# Description: Offset: 0b, Width: 8b, Instruction operand. Its values depends on used instruction
OPERAND: 0
# -----------------------------------------===== NUM_PADS [Optional] =====------------------------------------------
# Description: Offset: 8b, Width: 2b, Number of pads used by instruction. Some instructions ignores this parameter.
# - 1PAD, (0): Single mode. One pad is used.
# - 2PAD, (1): Dual mode. Two pads are used.
# - 4PAD, (2): Quad mode. Four pads are used.
# - 8PAD, (3): Octal mode. Eight pads are used.
# Possible options: <1PAD, 2PAD, 4PAD, 8PAD>
NUM_PADS: 1PAD
# --------------------------------------===== OPERATION_CODE [Optional] =====---------------------------------------
# Description: Offset: 10b, Width: 6b, Instruction operation code.
# - STOP, (0): Stop execution and de-assert CS. Then, the next command sequence (to the same flash device) starts
# from instruction pointer 0.
# - CMD_SDR, (1): Transmit command code to Flash.
# - RADDR_SDR, (2): Transmit row address to Flash.
# - CADDR_SDR, (3): Transmit column address to Flash.
# - MODE1_SDR, (4): Transmit mode bits to Flash.
# - MODE2_SDR, (5): Transmit mode bits to Flash.
# - MODE4_SDR, (6): Transmit mode bits to Flash.
# - MODE8_SDR, (7): Transmit mode bits to Flash.
# - WRITE_SDR, (8): Transmit program data to Flash device.
# - READ_SDR, (9): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_SDR, (10): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_SDR, (11): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_SDR, (12): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_SDR, (13): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# - JMP_ON_CS, (31): Stop execution, de-assert CS and save operand[7:0] as the instruction start pointer for next
# sequence.Normally this instruction is used to support Execute-In-Place enhanced mode. See XIP enhanced mode for
# more details.This instruction is only allowed for AHB read commands. There is interrupt status bit set
# (INTR[IPCMDERR] or INTR[AHBCMDERR]) when using this instruction in IP command or AHB write command.
# - CMD_DDR, (33): Transmit command code to Flash.
# - RADDR_DDR, (34): Transmit row address to Flash.
# - CADDR_DDR, (35): Transmit column address to Flash.
# - MODE1_DDR, (36): Transmit mode bits to Flash.
# - MODE2_DDR, (37): Transmit mode bits to Flash.
# - MODE4_DDR, (38): Transmit mode bits to Flash.
# - MODE8_DDR, (39): Transmit mode bits to Flash.
# - WRITE_DDR, (40): Transmit program data to Flash device.
# - READ_DDR, (41): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_DDR, (42): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_DDR, (43): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_DDR, (44): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_DDR, (45): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# Possible options: <STOP, CMD_SDR, RADDR_SDR, CADDR_SDR, MODE1_SDR, MODE2_SDR, MODE4_SDR, MODE8_SDR, WRITE_SDR,
# READ_SDR, LEARN_SDR, DATSZ_SDR, DUMMY_SDR, DUMMY_RWDS_SDR, JMP_ON_CS, CMD_DDR, RADDR_DDR, CADDR_DDR, MODE1_DDR,
# MODE2_DDR, MODE4_DDR, MODE8_DDR, WRITE_DDR, READ_DDR, LEARN_DDR, DATSZ_DDR, DUMMY_DDR, DUMMY_RWDS_DDR>
OPERATION_CODE: STOP
lookupTable_seq2_instr1:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq2_instr2:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq2_instr3:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq2_instr4:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq2_instr5:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq2_instr6:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq2_instr7:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
# -----------------------------------===== lookupTable_seq3_instr0 [Optional] =====-----------------------------------
# Description: Offset: 0x000000B0, Width: 16b; Lookup table holds Flash command sequences 3, instruction 0
lookupTable_seq3_instr0:
# ------------------------------------------===== OPERAND [Optional] =====------------------------------------------
# Description: Offset: 0b, Width: 8b, Instruction operand. Its values depends on used instruction
OPERAND: 0
# -----------------------------------------===== NUM_PADS [Optional] =====------------------------------------------
# Description: Offset: 8b, Width: 2b, Number of pads used by instruction. Some instructions ignores this parameter.
# - 1PAD, (0): Single mode. One pad is used.
# - 2PAD, (1): Dual mode. Two pads are used.
# - 4PAD, (2): Quad mode. Four pads are used.
# - 8PAD, (3): Octal mode. Eight pads are used.
# Possible options: <1PAD, 2PAD, 4PAD, 8PAD>
NUM_PADS: 1PAD
# --------------------------------------===== OPERATION_CODE [Optional] =====---------------------------------------
# Description: Offset: 10b, Width: 6b, Instruction operation code.
# - STOP, (0): Stop execution and de-assert CS. Then, the next command sequence (to the same flash device) starts
# from instruction pointer 0.
# - CMD_SDR, (1): Transmit command code to Flash.
# - RADDR_SDR, (2): Transmit row address to Flash.
# - CADDR_SDR, (3): Transmit column address to Flash.
# - MODE1_SDR, (4): Transmit mode bits to Flash.
# - MODE2_SDR, (5): Transmit mode bits to Flash.
# - MODE4_SDR, (6): Transmit mode bits to Flash.
# - MODE8_SDR, (7): Transmit mode bits to Flash.
# - WRITE_SDR, (8): Transmit program data to Flash device.
# - READ_SDR, (9): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_SDR, (10): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_SDR, (11): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_SDR, (12): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_SDR, (13): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# - JMP_ON_CS, (31): Stop execution, de-assert CS and save operand[7:0] as the instruction start pointer for next
# sequence.Normally this instruction is used to support Execute-In-Place enhanced mode. See XIP enhanced mode for
# more details.This instruction is only allowed for AHB read commands. There is interrupt status bit set
# (INTR[IPCMDERR] or INTR[AHBCMDERR]) when using this instruction in IP command or AHB write command.
# - CMD_DDR, (33): Transmit command code to Flash.
# - RADDR_DDR, (34): Transmit row address to Flash.
# - CADDR_DDR, (35): Transmit column address to Flash.
# - MODE1_DDR, (36): Transmit mode bits to Flash.
# - MODE2_DDR, (37): Transmit mode bits to Flash.
# - MODE4_DDR, (38): Transmit mode bits to Flash.
# - MODE8_DDR, (39): Transmit mode bits to Flash.
# - WRITE_DDR, (40): Transmit program data to Flash device.
# - READ_DDR, (41): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_DDR, (42): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_DDR, (43): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_DDR, (44): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_DDR, (45): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# Possible options: <STOP, CMD_SDR, RADDR_SDR, CADDR_SDR, MODE1_SDR, MODE2_SDR, MODE4_SDR, MODE8_SDR, WRITE_SDR,
# READ_SDR, LEARN_SDR, DATSZ_SDR, DUMMY_SDR, DUMMY_RWDS_SDR, JMP_ON_CS, CMD_DDR, RADDR_DDR, CADDR_DDR, MODE1_DDR,
# MODE2_DDR, MODE4_DDR, MODE8_DDR, WRITE_DDR, READ_DDR, LEARN_DDR, DATSZ_DDR, DUMMY_DDR, DUMMY_RWDS_DDR>
OPERATION_CODE: STOP
lookupTable_seq3_instr1:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq3_instr2:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq3_instr3:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq3_instr4:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq3_instr5:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq3_instr6:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq3_instr7:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
# -----------------------------------===== lookupTable_seq4_instr0 [Optional] =====-----------------------------------
# Description: Offset: 0x000000C0, Width: 16b; Lookup table holds Flash command sequences 4, instruction 0
lookupTable_seq4_instr0:
# ------------------------------------------===== OPERAND [Optional] =====------------------------------------------
# Description: Offset: 0b, Width: 8b, Instruction operand. Its values depends on used instruction
OPERAND: 0
# -----------------------------------------===== NUM_PADS [Optional] =====------------------------------------------
# Description: Offset: 8b, Width: 2b, Number of pads used by instruction. Some instructions ignores this parameter.
# - 1PAD, (0): Single mode. One pad is used.
# - 2PAD, (1): Dual mode. Two pads are used.
# - 4PAD, (2): Quad mode. Four pads are used.
# - 8PAD, (3): Octal mode. Eight pads are used.
# Possible options: <1PAD, 2PAD, 4PAD, 8PAD>
NUM_PADS: 1PAD
# --------------------------------------===== OPERATION_CODE [Optional] =====---------------------------------------
# Description: Offset: 10b, Width: 6b, Instruction operation code.
# - STOP, (0): Stop execution and de-assert CS. Then, the next command sequence (to the same flash device) starts
# from instruction pointer 0.
# - CMD_SDR, (1): Transmit command code to Flash.
# - RADDR_SDR, (2): Transmit row address to Flash.
# - CADDR_SDR, (3): Transmit column address to Flash.
# - MODE1_SDR, (4): Transmit mode bits to Flash.
# - MODE2_SDR, (5): Transmit mode bits to Flash.
# - MODE4_SDR, (6): Transmit mode bits to Flash.
# - MODE8_SDR, (7): Transmit mode bits to Flash.
# - WRITE_SDR, (8): Transmit program data to Flash device.
# - READ_SDR, (9): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_SDR, (10): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_SDR, (11): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_SDR, (12): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_SDR, (13): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# - JMP_ON_CS, (31): Stop execution, de-assert CS and save operand[7:0] as the instruction start pointer for next
# sequence.Normally this instruction is used to support Execute-In-Place enhanced mode. See XIP enhanced mode for
# more details.This instruction is only allowed for AHB read commands. There is interrupt status bit set
# (INTR[IPCMDERR] or INTR[AHBCMDERR]) when using this instruction in IP command or AHB write command.
# - CMD_DDR, (33): Transmit command code to Flash.
# - RADDR_DDR, (34): Transmit row address to Flash.
# - CADDR_DDR, (35): Transmit column address to Flash.
# - MODE1_DDR, (36): Transmit mode bits to Flash.
# - MODE2_DDR, (37): Transmit mode bits to Flash.
# - MODE4_DDR, (38): Transmit mode bits to Flash.
# - MODE8_DDR, (39): Transmit mode bits to Flash.
# - WRITE_DDR, (40): Transmit program data to Flash device.
# - READ_DDR, (41): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_DDR, (42): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_DDR, (43): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_DDR, (44): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_DDR, (45): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# Possible options: <STOP, CMD_SDR, RADDR_SDR, CADDR_SDR, MODE1_SDR, MODE2_SDR, MODE4_SDR, MODE8_SDR, WRITE_SDR,
# READ_SDR, LEARN_SDR, DATSZ_SDR, DUMMY_SDR, DUMMY_RWDS_SDR, JMP_ON_CS, CMD_DDR, RADDR_DDR, CADDR_DDR, MODE1_DDR,
# MODE2_DDR, MODE4_DDR, MODE8_DDR, WRITE_DDR, READ_DDR, LEARN_DDR, DATSZ_DDR, DUMMY_DDR, DUMMY_RWDS_DDR>
OPERATION_CODE: STOP
lookupTable_seq4_instr1:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq4_instr2:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq4_instr3:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq4_instr4:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq4_instr5:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq4_instr6:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq4_instr7:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
# -----------------------------------===== lookupTable_seq5_instr0 [Optional] =====-----------------------------------
# Description: Offset: 0x000000D0, Width: 16b; Lookup table holds Flash command sequences 5, instruction 0
lookupTable_seq5_instr0:
# ------------------------------------------===== OPERAND [Optional] =====------------------------------------------
# Description: Offset: 0b, Width: 8b, Instruction operand. Its values depends on used instruction
OPERAND: 0
# -----------------------------------------===== NUM_PADS [Optional] =====------------------------------------------
# Description: Offset: 8b, Width: 2b, Number of pads used by instruction. Some instructions ignores this parameter.
# - 1PAD, (0): Single mode. One pad is used.
# - 2PAD, (1): Dual mode. Two pads are used.
# - 4PAD, (2): Quad mode. Four pads are used.
# - 8PAD, (3): Octal mode. Eight pads are used.
# Possible options: <1PAD, 2PAD, 4PAD, 8PAD>
NUM_PADS: 1PAD
# --------------------------------------===== OPERATION_CODE [Optional] =====---------------------------------------
# Description: Offset: 10b, Width: 6b, Instruction operation code.
# - STOP, (0): Stop execution and de-assert CS. Then, the next command sequence (to the same flash device) starts
# from instruction pointer 0.
# - CMD_SDR, (1): Transmit command code to Flash.
# - RADDR_SDR, (2): Transmit row address to Flash.
# - CADDR_SDR, (3): Transmit column address to Flash.
# - MODE1_SDR, (4): Transmit mode bits to Flash.
# - MODE2_SDR, (5): Transmit mode bits to Flash.
# - MODE4_SDR, (6): Transmit mode bits to Flash.
# - MODE8_SDR, (7): Transmit mode bits to Flash.
# - WRITE_SDR, (8): Transmit program data to Flash device.
# - READ_SDR, (9): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_SDR, (10): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_SDR, (11): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_SDR, (12): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_SDR, (13): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# - JMP_ON_CS, (31): Stop execution, de-assert CS and save operand[7:0] as the instruction start pointer for next
# sequence.Normally this instruction is used to support Execute-In-Place enhanced mode. See XIP enhanced mode for
# more details.This instruction is only allowed for AHB read commands. There is interrupt status bit set
# (INTR[IPCMDERR] or INTR[AHBCMDERR]) when using this instruction in IP command or AHB write command.
# - CMD_DDR, (33): Transmit command code to Flash.
# - RADDR_DDR, (34): Transmit row address to Flash.
# - CADDR_DDR, (35): Transmit column address to Flash.
# - MODE1_DDR, (36): Transmit mode bits to Flash.
# - MODE2_DDR, (37): Transmit mode bits to Flash.
# - MODE4_DDR, (38): Transmit mode bits to Flash.
# - MODE8_DDR, (39): Transmit mode bits to Flash.
# - WRITE_DDR, (40): Transmit program data to Flash device.
# - READ_DDR, (41): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_DDR, (42): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_DDR, (43): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_DDR, (44): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_DDR, (45): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# Possible options: <STOP, CMD_SDR, RADDR_SDR, CADDR_SDR, MODE1_SDR, MODE2_SDR, MODE4_SDR, MODE8_SDR, WRITE_SDR,
# READ_SDR, LEARN_SDR, DATSZ_SDR, DUMMY_SDR, DUMMY_RWDS_SDR, JMP_ON_CS, CMD_DDR, RADDR_DDR, CADDR_DDR, MODE1_DDR,
# MODE2_DDR, MODE4_DDR, MODE8_DDR, WRITE_DDR, READ_DDR, LEARN_DDR, DATSZ_DDR, DUMMY_DDR, DUMMY_RWDS_DDR>
OPERATION_CODE: STOP
lookupTable_seq5_instr1:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq5_instr2:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq5_instr3:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq5_instr4:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq5_instr5:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq5_instr6:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq5_instr7:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
# -----------------------------------===== lookupTable_seq6_instr0 [Optional] =====-----------------------------------
# Description: Offset: 0x000000E0, Width: 16b; Lookup table holds Flash command sequences 6, instruction 0
lookupTable_seq6_instr0:
# ------------------------------------------===== OPERAND [Optional] =====------------------------------------------
# Description: Offset: 0b, Width: 8b, Instruction operand. Its values depends on used instruction
OPERAND: 0
# -----------------------------------------===== NUM_PADS [Optional] =====------------------------------------------
# Description: Offset: 8b, Width: 2b, Number of pads used by instruction. Some instructions ignores this parameter.
# - 1PAD, (0): Single mode. One pad is used.
# - 2PAD, (1): Dual mode. Two pads are used.
# - 4PAD, (2): Quad mode. Four pads are used.
# - 8PAD, (3): Octal mode. Eight pads are used.
# Possible options: <1PAD, 2PAD, 4PAD, 8PAD>
NUM_PADS: 1PAD
# --------------------------------------===== OPERATION_CODE [Optional] =====---------------------------------------
# Description: Offset: 10b, Width: 6b, Instruction operation code.
# - STOP, (0): Stop execution and de-assert CS. Then, the next command sequence (to the same flash device) starts
# from instruction pointer 0.
# - CMD_SDR, (1): Transmit command code to Flash.
# - RADDR_SDR, (2): Transmit row address to Flash.
# - CADDR_SDR, (3): Transmit column address to Flash.
# - MODE1_SDR, (4): Transmit mode bits to Flash.
# - MODE2_SDR, (5): Transmit mode bits to Flash.
# - MODE4_SDR, (6): Transmit mode bits to Flash.
# - MODE8_SDR, (7): Transmit mode bits to Flash.
# - WRITE_SDR, (8): Transmit program data to Flash device.
# - READ_SDR, (9): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_SDR, (10): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_SDR, (11): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_SDR, (12): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_SDR, (13): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# - JMP_ON_CS, (31): Stop execution, de-assert CS and save operand[7:0] as the instruction start pointer for next
# sequence.Normally this instruction is used to support Execute-In-Place enhanced mode. See XIP enhanced mode for
# more details.This instruction is only allowed for AHB read commands. There is interrupt status bit set
# (INTR[IPCMDERR] or INTR[AHBCMDERR]) when using this instruction in IP command or AHB write command.
# - CMD_DDR, (33): Transmit command code to Flash.
# - RADDR_DDR, (34): Transmit row address to Flash.
# - CADDR_DDR, (35): Transmit column address to Flash.
# - MODE1_DDR, (36): Transmit mode bits to Flash.
# - MODE2_DDR, (37): Transmit mode bits to Flash.
# - MODE4_DDR, (38): Transmit mode bits to Flash.
# - MODE8_DDR, (39): Transmit mode bits to Flash.
# - WRITE_DDR, (40): Transmit program data to Flash device.
# - READ_DDR, (41): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_DDR, (42): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_DDR, (43): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_DDR, (44): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_DDR, (45): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# Possible options: <STOP, CMD_SDR, RADDR_SDR, CADDR_SDR, MODE1_SDR, MODE2_SDR, MODE4_SDR, MODE8_SDR, WRITE_SDR,
# READ_SDR, LEARN_SDR, DATSZ_SDR, DUMMY_SDR, DUMMY_RWDS_SDR, JMP_ON_CS, CMD_DDR, RADDR_DDR, CADDR_DDR, MODE1_DDR,
# MODE2_DDR, MODE4_DDR, MODE8_DDR, WRITE_DDR, READ_DDR, LEARN_DDR, DATSZ_DDR, DUMMY_DDR, DUMMY_RWDS_DDR>
OPERATION_CODE: STOP
lookupTable_seq6_instr1:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq6_instr2:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq6_instr3:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq6_instr4:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq6_instr5:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq6_instr6:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq6_instr7:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
# -----------------------------------===== lookupTable_seq7_instr0 [Optional] =====-----------------------------------
# Description: Offset: 0x000000F0, Width: 16b; Lookup table holds Flash command sequences 7, instruction 0
lookupTable_seq7_instr0:
# ------------------------------------------===== OPERAND [Optional] =====------------------------------------------
# Description: Offset: 0b, Width: 8b, Instruction operand. Its values depends on used instruction
OPERAND: 0
# -----------------------------------------===== NUM_PADS [Optional] =====------------------------------------------
# Description: Offset: 8b, Width: 2b, Number of pads used by instruction. Some instructions ignores this parameter.
# - 1PAD, (0): Single mode. One pad is used.
# - 2PAD, (1): Dual mode. Two pads are used.
# - 4PAD, (2): Quad mode. Four pads are used.
# - 8PAD, (3): Octal mode. Eight pads are used.
# Possible options: <1PAD, 2PAD, 4PAD, 8PAD>
NUM_PADS: 1PAD
# --------------------------------------===== OPERATION_CODE [Optional] =====---------------------------------------
# Description: Offset: 10b, Width: 6b, Instruction operation code.
# - STOP, (0): Stop execution and de-assert CS. Then, the next command sequence (to the same flash device) starts
# from instruction pointer 0.
# - CMD_SDR, (1): Transmit command code to Flash.
# - RADDR_SDR, (2): Transmit row address to Flash.
# - CADDR_SDR, (3): Transmit column address to Flash.
# - MODE1_SDR, (4): Transmit mode bits to Flash.
# - MODE2_SDR, (5): Transmit mode bits to Flash.
# - MODE4_SDR, (6): Transmit mode bits to Flash.
# - MODE8_SDR, (7): Transmit mode bits to Flash.
# - WRITE_SDR, (8): Transmit program data to Flash device.
# - READ_SDR, (9): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_SDR, (10): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_SDR, (11): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_SDR, (12): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_SDR, (13): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# - JMP_ON_CS, (31): Stop execution, de-assert CS and save operand[7:0] as the instruction start pointer for next
# sequence.Normally this instruction is used to support Execute-In-Place enhanced mode. See XIP enhanced mode for
# more details.This instruction is only allowed for AHB read commands. There is interrupt status bit set
# (INTR[IPCMDERR] or INTR[AHBCMDERR]) when using this instruction in IP command or AHB write command.
# - CMD_DDR, (33): Transmit command code to Flash.
# - RADDR_DDR, (34): Transmit row address to Flash.
# - CADDR_DDR, (35): Transmit column address to Flash.
# - MODE1_DDR, (36): Transmit mode bits to Flash.
# - MODE2_DDR, (37): Transmit mode bits to Flash.
# - MODE4_DDR, (38): Transmit mode bits to Flash.
# - MODE8_DDR, (39): Transmit mode bits to Flash.
# - WRITE_DDR, (40): Transmit program data to Flash device.
# - READ_DDR, (41): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_DDR, (42): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_DDR, (43): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_DDR, (44): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_DDR, (45): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# Possible options: <STOP, CMD_SDR, RADDR_SDR, CADDR_SDR, MODE1_SDR, MODE2_SDR, MODE4_SDR, MODE8_SDR, WRITE_SDR,
# READ_SDR, LEARN_SDR, DATSZ_SDR, DUMMY_SDR, DUMMY_RWDS_SDR, JMP_ON_CS, CMD_DDR, RADDR_DDR, CADDR_DDR, MODE1_DDR,
# MODE2_DDR, MODE4_DDR, MODE8_DDR, WRITE_DDR, READ_DDR, LEARN_DDR, DATSZ_DDR, DUMMY_DDR, DUMMY_RWDS_DDR>
OPERATION_CODE: STOP
lookupTable_seq7_instr1:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq7_instr2:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq7_instr3:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq7_instr4:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq7_instr5:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq7_instr6:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq7_instr7:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
# -----------------------------------===== lookupTable_seq8_instr0 [Optional] =====-----------------------------------
# Description: Offset: 0x00000100, Width: 16b; Lookup table holds Flash command sequences 8, instruction 0
lookupTable_seq8_instr0:
# ------------------------------------------===== OPERAND [Optional] =====------------------------------------------
# Description: Offset: 0b, Width: 8b, Instruction operand. Its values depends on used instruction
OPERAND: 0
# -----------------------------------------===== NUM_PADS [Optional] =====------------------------------------------
# Description: Offset: 8b, Width: 2b, Number of pads used by instruction. Some instructions ignores this parameter.
# - 1PAD, (0): Single mode. One pad is used.
# - 2PAD, (1): Dual mode. Two pads are used.
# - 4PAD, (2): Quad mode. Four pads are used.
# - 8PAD, (3): Octal mode. Eight pads are used.
# Possible options: <1PAD, 2PAD, 4PAD, 8PAD>
NUM_PADS: 1PAD
# --------------------------------------===== OPERATION_CODE [Optional] =====---------------------------------------
# Description: Offset: 10b, Width: 6b, Instruction operation code.
# - STOP, (0): Stop execution and de-assert CS. Then, the next command sequence (to the same flash device) starts
# from instruction pointer 0.
# - CMD_SDR, (1): Transmit command code to Flash.
# - RADDR_SDR, (2): Transmit row address to Flash.
# - CADDR_SDR, (3): Transmit column address to Flash.
# - MODE1_SDR, (4): Transmit mode bits to Flash.
# - MODE2_SDR, (5): Transmit mode bits to Flash.
# - MODE4_SDR, (6): Transmit mode bits to Flash.
# - MODE8_SDR, (7): Transmit mode bits to Flash.
# - WRITE_SDR, (8): Transmit program data to Flash device.
# - READ_SDR, (9): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_SDR, (10): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_SDR, (11): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_SDR, (12): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_SDR, (13): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# - JMP_ON_CS, (31): Stop execution, de-assert CS and save operand[7:0] as the instruction start pointer for next
# sequence.Normally this instruction is used to support Execute-In-Place enhanced mode. See XIP enhanced mode for
# more details.This instruction is only allowed for AHB read commands. There is interrupt status bit set
# (INTR[IPCMDERR] or INTR[AHBCMDERR]) when using this instruction in IP command or AHB write command.
# - CMD_DDR, (33): Transmit command code to Flash.
# - RADDR_DDR, (34): Transmit row address to Flash.
# - CADDR_DDR, (35): Transmit column address to Flash.
# - MODE1_DDR, (36): Transmit mode bits to Flash.
# - MODE2_DDR, (37): Transmit mode bits to Flash.
# - MODE4_DDR, (38): Transmit mode bits to Flash.
# - MODE8_DDR, (39): Transmit mode bits to Flash.
# - WRITE_DDR, (40): Transmit program data to Flash device.
# - READ_DDR, (41): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_DDR, (42): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_DDR, (43): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_DDR, (44): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_DDR, (45): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# Possible options: <STOP, CMD_SDR, RADDR_SDR, CADDR_SDR, MODE1_SDR, MODE2_SDR, MODE4_SDR, MODE8_SDR, WRITE_SDR,
# READ_SDR, LEARN_SDR, DATSZ_SDR, DUMMY_SDR, DUMMY_RWDS_SDR, JMP_ON_CS, CMD_DDR, RADDR_DDR, CADDR_DDR, MODE1_DDR,
# MODE2_DDR, MODE4_DDR, MODE8_DDR, WRITE_DDR, READ_DDR, LEARN_DDR, DATSZ_DDR, DUMMY_DDR, DUMMY_RWDS_DDR>
OPERATION_CODE: STOP
lookupTable_seq8_instr1:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq8_instr2:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq8_instr3:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq8_instr4:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq8_instr5:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq8_instr6:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq8_instr7:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
# -----------------------------------===== lookupTable_seq9_instr0 [Optional] =====-----------------------------------
# Description: Offset: 0x00000110, Width: 16b; Lookup table holds Flash command sequences 9, instruction 0
lookupTable_seq9_instr0:
# ------------------------------------------===== OPERAND [Optional] =====------------------------------------------
# Description: Offset: 0b, Width: 8b, Instruction operand. Its values depends on used instruction
OPERAND: 0
# -----------------------------------------===== NUM_PADS [Optional] =====------------------------------------------
# Description: Offset: 8b, Width: 2b, Number of pads used by instruction. Some instructions ignores this parameter.
# - 1PAD, (0): Single mode. One pad is used.
# - 2PAD, (1): Dual mode. Two pads are used.
# - 4PAD, (2): Quad mode. Four pads are used.
# - 8PAD, (3): Octal mode. Eight pads are used.
# Possible options: <1PAD, 2PAD, 4PAD, 8PAD>
NUM_PADS: 1PAD
# --------------------------------------===== OPERATION_CODE [Optional] =====---------------------------------------
# Description: Offset: 10b, Width: 6b, Instruction operation code.
# - STOP, (0): Stop execution and de-assert CS. Then, the next command sequence (to the same flash device) starts
# from instruction pointer 0.
# - CMD_SDR, (1): Transmit command code to Flash.
# - RADDR_SDR, (2): Transmit row address to Flash.
# - CADDR_SDR, (3): Transmit column address to Flash.
# - MODE1_SDR, (4): Transmit mode bits to Flash.
# - MODE2_SDR, (5): Transmit mode bits to Flash.
# - MODE4_SDR, (6): Transmit mode bits to Flash.
# - MODE8_SDR, (7): Transmit mode bits to Flash.
# - WRITE_SDR, (8): Transmit program data to Flash device.
# - READ_SDR, (9): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_SDR, (10): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_SDR, (11): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_SDR, (12): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_SDR, (13): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# - JMP_ON_CS, (31): Stop execution, de-assert CS and save operand[7:0] as the instruction start pointer for next
# sequence.Normally this instruction is used to support Execute-In-Place enhanced mode. See XIP enhanced mode for
# more details.This instruction is only allowed for AHB read commands. There is interrupt status bit set
# (INTR[IPCMDERR] or INTR[AHBCMDERR]) when using this instruction in IP command or AHB write command.
# - CMD_DDR, (33): Transmit command code to Flash.
# - RADDR_DDR, (34): Transmit row address to Flash.
# - CADDR_DDR, (35): Transmit column address to Flash.
# - MODE1_DDR, (36): Transmit mode bits to Flash.
# - MODE2_DDR, (37): Transmit mode bits to Flash.
# - MODE4_DDR, (38): Transmit mode bits to Flash.
# - MODE8_DDR, (39): Transmit mode bits to Flash.
# - WRITE_DDR, (40): Transmit program data to Flash device.
# - READ_DDR, (41): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_DDR, (42): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_DDR, (43): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_DDR, (44): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_DDR, (45): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# Possible options: <STOP, CMD_SDR, RADDR_SDR, CADDR_SDR, MODE1_SDR, MODE2_SDR, MODE4_SDR, MODE8_SDR, WRITE_SDR,
# READ_SDR, LEARN_SDR, DATSZ_SDR, DUMMY_SDR, DUMMY_RWDS_SDR, JMP_ON_CS, CMD_DDR, RADDR_DDR, CADDR_DDR, MODE1_DDR,
# MODE2_DDR, MODE4_DDR, MODE8_DDR, WRITE_DDR, READ_DDR, LEARN_DDR, DATSZ_DDR, DUMMY_DDR, DUMMY_RWDS_DDR>
OPERATION_CODE: STOP
lookupTable_seq9_instr1:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq9_instr2:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq9_instr3:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq9_instr4:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq9_instr5:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq9_instr6:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq9_instr7:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
# ----------------------------------===== lookupTable_seq10_instr0 [Optional] =====-----------------------------------
# Description: Offset: 0x00000120, Width: 16b; Lookup table holds Flash command sequences 10, instruction 0
lookupTable_seq10_instr0:
# ------------------------------------------===== OPERAND [Optional] =====------------------------------------------
# Description: Offset: 0b, Width: 8b, Instruction operand. Its values depends on used instruction
OPERAND: 0
# -----------------------------------------===== NUM_PADS [Optional] =====------------------------------------------
# Description: Offset: 8b, Width: 2b, Number of pads used by instruction. Some instructions ignores this parameter.
# - 1PAD, (0): Single mode. One pad is used.
# - 2PAD, (1): Dual mode. Two pads are used.
# - 4PAD, (2): Quad mode. Four pads are used.
# - 8PAD, (3): Octal mode. Eight pads are used.
# Possible options: <1PAD, 2PAD, 4PAD, 8PAD>
NUM_PADS: 1PAD
# --------------------------------------===== OPERATION_CODE [Optional] =====---------------------------------------
# Description: Offset: 10b, Width: 6b, Instruction operation code.
# - STOP, (0): Stop execution and de-assert CS. Then, the next command sequence (to the same flash device) starts
# from instruction pointer 0.
# - CMD_SDR, (1): Transmit command code to Flash.
# - RADDR_SDR, (2): Transmit row address to Flash.
# - CADDR_SDR, (3): Transmit column address to Flash.
# - MODE1_SDR, (4): Transmit mode bits to Flash.
# - MODE2_SDR, (5): Transmit mode bits to Flash.
# - MODE4_SDR, (6): Transmit mode bits to Flash.
# - MODE8_SDR, (7): Transmit mode bits to Flash.
# - WRITE_SDR, (8): Transmit program data to Flash device.
# - READ_SDR, (9): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_SDR, (10): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_SDR, (11): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_SDR, (12): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_SDR, (13): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# - JMP_ON_CS, (31): Stop execution, de-assert CS and save operand[7:0] as the instruction start pointer for next
# sequence.Normally this instruction is used to support Execute-In-Place enhanced mode. See XIP enhanced mode for
# more details.This instruction is only allowed for AHB read commands. There is interrupt status bit set
# (INTR[IPCMDERR] or INTR[AHBCMDERR]) when using this instruction in IP command or AHB write command.
# - CMD_DDR, (33): Transmit command code to Flash.
# - RADDR_DDR, (34): Transmit row address to Flash.
# - CADDR_DDR, (35): Transmit column address to Flash.
# - MODE1_DDR, (36): Transmit mode bits to Flash.
# - MODE2_DDR, (37): Transmit mode bits to Flash.
# - MODE4_DDR, (38): Transmit mode bits to Flash.
# - MODE8_DDR, (39): Transmit mode bits to Flash.
# - WRITE_DDR, (40): Transmit program data to Flash device.
# - READ_DDR, (41): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_DDR, (42): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_DDR, (43): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_DDR, (44): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_DDR, (45): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# Possible options: <STOP, CMD_SDR, RADDR_SDR, CADDR_SDR, MODE1_SDR, MODE2_SDR, MODE4_SDR, MODE8_SDR, WRITE_SDR,
# READ_SDR, LEARN_SDR, DATSZ_SDR, DUMMY_SDR, DUMMY_RWDS_SDR, JMP_ON_CS, CMD_DDR, RADDR_DDR, CADDR_DDR, MODE1_DDR,
# MODE2_DDR, MODE4_DDR, MODE8_DDR, WRITE_DDR, READ_DDR, LEARN_DDR, DATSZ_DDR, DUMMY_DDR, DUMMY_RWDS_DDR>
OPERATION_CODE: STOP
lookupTable_seq10_instr1:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq10_instr2:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq10_instr3:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq10_instr4:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq10_instr5:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq10_instr6:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq10_instr7:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
# ----------------------------------===== lookupTable_seq11_instr0 [Optional] =====-----------------------------------
# Description: Offset: 0x00000130, Width: 16b; Lookup table holds Flash command sequences 11, instruction 0
lookupTable_seq11_instr0:
# ------------------------------------------===== OPERAND [Optional] =====------------------------------------------
# Description: Offset: 0b, Width: 8b, Instruction operand. Its values depends on used instruction
OPERAND: 0
# -----------------------------------------===== NUM_PADS [Optional] =====------------------------------------------
# Description: Offset: 8b, Width: 2b, Number of pads used by instruction. Some instructions ignores this parameter.
# - 1PAD, (0): Single mode. One pad is used.
# - 2PAD, (1): Dual mode. Two pads are used.
# - 4PAD, (2): Quad mode. Four pads are used.
# - 8PAD, (3): Octal mode. Eight pads are used.
# Possible options: <1PAD, 2PAD, 4PAD, 8PAD>
NUM_PADS: 1PAD
# --------------------------------------===== OPERATION_CODE [Optional] =====---------------------------------------
# Description: Offset: 10b, Width: 6b, Instruction operation code.
# - STOP, (0): Stop execution and de-assert CS. Then, the next command sequence (to the same flash device) starts
# from instruction pointer 0.
# - CMD_SDR, (1): Transmit command code to Flash.
# - RADDR_SDR, (2): Transmit row address to Flash.
# - CADDR_SDR, (3): Transmit column address to Flash.
# - MODE1_SDR, (4): Transmit mode bits to Flash.
# - MODE2_SDR, (5): Transmit mode bits to Flash.
# - MODE4_SDR, (6): Transmit mode bits to Flash.
# - MODE8_SDR, (7): Transmit mode bits to Flash.
# - WRITE_SDR, (8): Transmit program data to Flash device.
# - READ_SDR, (9): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_SDR, (10): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_SDR, (11): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_SDR, (12): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_SDR, (13): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# - JMP_ON_CS, (31): Stop execution, de-assert CS and save operand[7:0] as the instruction start pointer for next
# sequence.Normally this instruction is used to support Execute-In-Place enhanced mode. See XIP enhanced mode for
# more details.This instruction is only allowed for AHB read commands. There is interrupt status bit set
# (INTR[IPCMDERR] or INTR[AHBCMDERR]) when using this instruction in IP command or AHB write command.
# - CMD_DDR, (33): Transmit command code to Flash.
# - RADDR_DDR, (34): Transmit row address to Flash.
# - CADDR_DDR, (35): Transmit column address to Flash.
# - MODE1_DDR, (36): Transmit mode bits to Flash.
# - MODE2_DDR, (37): Transmit mode bits to Flash.
# - MODE4_DDR, (38): Transmit mode bits to Flash.
# - MODE8_DDR, (39): Transmit mode bits to Flash.
# - WRITE_DDR, (40): Transmit program data to Flash device.
# - READ_DDR, (41): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_DDR, (42): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_DDR, (43): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_DDR, (44): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_DDR, (45): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# Possible options: <STOP, CMD_SDR, RADDR_SDR, CADDR_SDR, MODE1_SDR, MODE2_SDR, MODE4_SDR, MODE8_SDR, WRITE_SDR,
# READ_SDR, LEARN_SDR, DATSZ_SDR, DUMMY_SDR, DUMMY_RWDS_SDR, JMP_ON_CS, CMD_DDR, RADDR_DDR, CADDR_DDR, MODE1_DDR,
# MODE2_DDR, MODE4_DDR, MODE8_DDR, WRITE_DDR, READ_DDR, LEARN_DDR, DATSZ_DDR, DUMMY_DDR, DUMMY_RWDS_DDR>
OPERATION_CODE: STOP
lookupTable_seq11_instr1:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq11_instr2:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq11_instr3:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq11_instr4:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq11_instr5:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq11_instr6:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq11_instr7:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
# ----------------------------------===== lookupTable_seq12_instr0 [Optional] =====-----------------------------------
# Description: Offset: 0x00000140, Width: 16b; Lookup table holds Flash command sequences 12, instruction 0
lookupTable_seq12_instr0:
# ------------------------------------------===== OPERAND [Optional] =====------------------------------------------
# Description: Offset: 0b, Width: 8b, Instruction operand. Its values depends on used instruction
OPERAND: 0
# -----------------------------------------===== NUM_PADS [Optional] =====------------------------------------------
# Description: Offset: 8b, Width: 2b, Number of pads used by instruction. Some instructions ignores this parameter.
# - 1PAD, (0): Single mode. One pad is used.
# - 2PAD, (1): Dual mode. Two pads are used.
# - 4PAD, (2): Quad mode. Four pads are used.
# - 8PAD, (3): Octal mode. Eight pads are used.
# Possible options: <1PAD, 2PAD, 4PAD, 8PAD>
NUM_PADS: 1PAD
# --------------------------------------===== OPERATION_CODE [Optional] =====---------------------------------------
# Description: Offset: 10b, Width: 6b, Instruction operation code.
# - STOP, (0): Stop execution and de-assert CS. Then, the next command sequence (to the same flash device) starts
# from instruction pointer 0.
# - CMD_SDR, (1): Transmit command code to Flash.
# - RADDR_SDR, (2): Transmit row address to Flash.
# - CADDR_SDR, (3): Transmit column address to Flash.
# - MODE1_SDR, (4): Transmit mode bits to Flash.
# - MODE2_SDR, (5): Transmit mode bits to Flash.
# - MODE4_SDR, (6): Transmit mode bits to Flash.
# - MODE8_SDR, (7): Transmit mode bits to Flash.
# - WRITE_SDR, (8): Transmit program data to Flash device.
# - READ_SDR, (9): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_SDR, (10): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_SDR, (11): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_SDR, (12): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_SDR, (13): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# - JMP_ON_CS, (31): Stop execution, de-assert CS and save operand[7:0] as the instruction start pointer for next
# sequence.Normally this instruction is used to support Execute-In-Place enhanced mode. See XIP enhanced mode for
# more details.This instruction is only allowed for AHB read commands. There is interrupt status bit set
# (INTR[IPCMDERR] or INTR[AHBCMDERR]) when using this instruction in IP command or AHB write command.
# - CMD_DDR, (33): Transmit command code to Flash.
# - RADDR_DDR, (34): Transmit row address to Flash.
# - CADDR_DDR, (35): Transmit column address to Flash.
# - MODE1_DDR, (36): Transmit mode bits to Flash.
# - MODE2_DDR, (37): Transmit mode bits to Flash.
# - MODE4_DDR, (38): Transmit mode bits to Flash.
# - MODE8_DDR, (39): Transmit mode bits to Flash.
# - WRITE_DDR, (40): Transmit program data to Flash device.
# - READ_DDR, (41): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_DDR, (42): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_DDR, (43): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_DDR, (44): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_DDR, (45): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# Possible options: <STOP, CMD_SDR, RADDR_SDR, CADDR_SDR, MODE1_SDR, MODE2_SDR, MODE4_SDR, MODE8_SDR, WRITE_SDR,
# READ_SDR, LEARN_SDR, DATSZ_SDR, DUMMY_SDR, DUMMY_RWDS_SDR, JMP_ON_CS, CMD_DDR, RADDR_DDR, CADDR_DDR, MODE1_DDR,
# MODE2_DDR, MODE4_DDR, MODE8_DDR, WRITE_DDR, READ_DDR, LEARN_DDR, DATSZ_DDR, DUMMY_DDR, DUMMY_RWDS_DDR>
OPERATION_CODE: STOP
lookupTable_seq12_instr1:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq12_instr2:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq12_instr3:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq12_instr4:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq12_instr5:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq12_instr6:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq12_instr7:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
# ----------------------------------===== lookupTable_seq13_instr0 [Optional] =====-----------------------------------
# Description: Offset: 0x00000150, Width: 16b; Lookup table holds Flash command sequences 13, instruction 0
lookupTable_seq13_instr0:
# ------------------------------------------===== OPERAND [Optional] =====------------------------------------------
# Description: Offset: 0b, Width: 8b, Instruction operand. Its values depends on used instruction
OPERAND: 0
# -----------------------------------------===== NUM_PADS [Optional] =====------------------------------------------
# Description: Offset: 8b, Width: 2b, Number of pads used by instruction. Some instructions ignores this parameter.
# - 1PAD, (0): Single mode. One pad is used.
# - 2PAD, (1): Dual mode. Two pads are used.
# - 4PAD, (2): Quad mode. Four pads are used.
# - 8PAD, (3): Octal mode. Eight pads are used.
# Possible options: <1PAD, 2PAD, 4PAD, 8PAD>
NUM_PADS: 1PAD
# --------------------------------------===== OPERATION_CODE [Optional] =====---------------------------------------
# Description: Offset: 10b, Width: 6b, Instruction operation code.
# - STOP, (0): Stop execution and de-assert CS. Then, the next command sequence (to the same flash device) starts
# from instruction pointer 0.
# - CMD_SDR, (1): Transmit command code to Flash.
# - RADDR_SDR, (2): Transmit row address to Flash.
# - CADDR_SDR, (3): Transmit column address to Flash.
# - MODE1_SDR, (4): Transmit mode bits to Flash.
# - MODE2_SDR, (5): Transmit mode bits to Flash.
# - MODE4_SDR, (6): Transmit mode bits to Flash.
# - MODE8_SDR, (7): Transmit mode bits to Flash.
# - WRITE_SDR, (8): Transmit program data to Flash device.
# - READ_SDR, (9): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_SDR, (10): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_SDR, (11): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_SDR, (12): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_SDR, (13): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# - JMP_ON_CS, (31): Stop execution, de-assert CS and save operand[7:0] as the instruction start pointer for next
# sequence.Normally this instruction is used to support Execute-In-Place enhanced mode. See XIP enhanced mode for
# more details.This instruction is only allowed for AHB read commands. There is interrupt status bit set
# (INTR[IPCMDERR] or INTR[AHBCMDERR]) when using this instruction in IP command or AHB write command.
# - CMD_DDR, (33): Transmit command code to Flash.
# - RADDR_DDR, (34): Transmit row address to Flash.
# - CADDR_DDR, (35): Transmit column address to Flash.
# - MODE1_DDR, (36): Transmit mode bits to Flash.
# - MODE2_DDR, (37): Transmit mode bits to Flash.
# - MODE4_DDR, (38): Transmit mode bits to Flash.
# - MODE8_DDR, (39): Transmit mode bits to Flash.
# - WRITE_DDR, (40): Transmit program data to Flash device.
# - READ_DDR, (41): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_DDR, (42): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_DDR, (43): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_DDR, (44): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_DDR, (45): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# Possible options: <STOP, CMD_SDR, RADDR_SDR, CADDR_SDR, MODE1_SDR, MODE2_SDR, MODE4_SDR, MODE8_SDR, WRITE_SDR,
# READ_SDR, LEARN_SDR, DATSZ_SDR, DUMMY_SDR, DUMMY_RWDS_SDR, JMP_ON_CS, CMD_DDR, RADDR_DDR, CADDR_DDR, MODE1_DDR,
# MODE2_DDR, MODE4_DDR, MODE8_DDR, WRITE_DDR, READ_DDR, LEARN_DDR, DATSZ_DDR, DUMMY_DDR, DUMMY_RWDS_DDR>
OPERATION_CODE: STOP
lookupTable_seq13_instr1:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq13_instr2:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq13_instr3:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq13_instr4:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq13_instr5:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq13_instr6:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq13_instr7:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
# ----------------------------------===== lookupTable_seq14_instr0 [Optional] =====-----------------------------------
# Description: Offset: 0x00000160, Width: 16b; Lookup table holds Flash command sequences 14, instruction 0
lookupTable_seq14_instr0:
# ------------------------------------------===== OPERAND [Optional] =====------------------------------------------
# Description: Offset: 0b, Width: 8b, Instruction operand. Its values depends on used instruction
OPERAND: 0
# -----------------------------------------===== NUM_PADS [Optional] =====------------------------------------------
# Description: Offset: 8b, Width: 2b, Number of pads used by instruction. Some instructions ignores this parameter.
# - 1PAD, (0): Single mode. One pad is used.
# - 2PAD, (1): Dual mode. Two pads are used.
# - 4PAD, (2): Quad mode. Four pads are used.
# - 8PAD, (3): Octal mode. Eight pads are used.
# Possible options: <1PAD, 2PAD, 4PAD, 8PAD>
NUM_PADS: 1PAD
# --------------------------------------===== OPERATION_CODE [Optional] =====---------------------------------------
# Description: Offset: 10b, Width: 6b, Instruction operation code.
# - STOP, (0): Stop execution and de-assert CS. Then, the next command sequence (to the same flash device) starts
# from instruction pointer 0.
# - CMD_SDR, (1): Transmit command code to Flash.
# - RADDR_SDR, (2): Transmit row address to Flash.
# - CADDR_SDR, (3): Transmit column address to Flash.
# - MODE1_SDR, (4): Transmit mode bits to Flash.
# - MODE2_SDR, (5): Transmit mode bits to Flash.
# - MODE4_SDR, (6): Transmit mode bits to Flash.
# - MODE8_SDR, (7): Transmit mode bits to Flash.
# - WRITE_SDR, (8): Transmit program data to Flash device.
# - READ_SDR, (9): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_SDR, (10): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_SDR, (11): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_SDR, (12): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_SDR, (13): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# - JMP_ON_CS, (31): Stop execution, de-assert CS and save operand[7:0] as the instruction start pointer for next
# sequence.Normally this instruction is used to support Execute-In-Place enhanced mode. See XIP enhanced mode for
# more details.This instruction is only allowed for AHB read commands. There is interrupt status bit set
# (INTR[IPCMDERR] or INTR[AHBCMDERR]) when using this instruction in IP command or AHB write command.
# - CMD_DDR, (33): Transmit command code to Flash.
# - RADDR_DDR, (34): Transmit row address to Flash.
# - CADDR_DDR, (35): Transmit column address to Flash.
# - MODE1_DDR, (36): Transmit mode bits to Flash.
# - MODE2_DDR, (37): Transmit mode bits to Flash.
# - MODE4_DDR, (38): Transmit mode bits to Flash.
# - MODE8_DDR, (39): Transmit mode bits to Flash.
# - WRITE_DDR, (40): Transmit program data to Flash device.
# - READ_DDR, (41): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_DDR, (42): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_DDR, (43): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_DDR, (44): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_DDR, (45): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# Possible options: <STOP, CMD_SDR, RADDR_SDR, CADDR_SDR, MODE1_SDR, MODE2_SDR, MODE4_SDR, MODE8_SDR, WRITE_SDR,
# READ_SDR, LEARN_SDR, DATSZ_SDR, DUMMY_SDR, DUMMY_RWDS_SDR, JMP_ON_CS, CMD_DDR, RADDR_DDR, CADDR_DDR, MODE1_DDR,
# MODE2_DDR, MODE4_DDR, MODE8_DDR, WRITE_DDR, READ_DDR, LEARN_DDR, DATSZ_DDR, DUMMY_DDR, DUMMY_RWDS_DDR>
OPERATION_CODE: STOP
lookupTable_seq14_instr1:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq14_instr2:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq14_instr3:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq14_instr4:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq14_instr5:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq14_instr6:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq14_instr7:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
# ----------------------------------===== lookupTable_seq15_instr0 [Optional] =====-----------------------------------
# Description: Offset: 0x00000170, Width: 16b; Lookup table holds Flash command sequences 15, instruction 0
lookupTable_seq15_instr0:
# ------------------------------------------===== OPERAND [Optional] =====------------------------------------------
# Description: Offset: 0b, Width: 8b, Instruction operand. Its values depends on used instruction
OPERAND: 0
# -----------------------------------------===== NUM_PADS [Optional] =====------------------------------------------
# Description: Offset: 8b, Width: 2b, Number of pads used by instruction. Some instructions ignores this parameter.
# - 1PAD, (0): Single mode. One pad is used.
# - 2PAD, (1): Dual mode. Two pads are used.
# - 4PAD, (2): Quad mode. Four pads are used.
# - 8PAD, (3): Octal mode. Eight pads are used.
# Possible options: <1PAD, 2PAD, 4PAD, 8PAD>
NUM_PADS: 1PAD
# --------------------------------------===== OPERATION_CODE [Optional] =====---------------------------------------
# Description: Offset: 10b, Width: 6b, Instruction operation code.
# - STOP, (0): Stop execution and de-assert CS. Then, the next command sequence (to the same flash device) starts
# from instruction pointer 0.
# - CMD_SDR, (1): Transmit command code to Flash.
# - RADDR_SDR, (2): Transmit row address to Flash.
# - CADDR_SDR, (3): Transmit column address to Flash.
# - MODE1_SDR, (4): Transmit mode bits to Flash.
# - MODE2_SDR, (5): Transmit mode bits to Flash.
# - MODE4_SDR, (6): Transmit mode bits to Flash.
# - MODE8_SDR, (7): Transmit mode bits to Flash.
# - WRITE_SDR, (8): Transmit program data to Flash device.
# - READ_SDR, (9): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_SDR, (10): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_SDR, (11): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_SDR, (12): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_SDR, (13): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# - JMP_ON_CS, (31): Stop execution, de-assert CS and save operand[7:0] as the instruction start pointer for next
# sequence.Normally this instruction is used to support Execute-In-Place enhanced mode. See XIP enhanced mode for
# more details.This instruction is only allowed for AHB read commands. There is interrupt status bit set
# (INTR[IPCMDERR] or INTR[AHBCMDERR]) when using this instruction in IP command or AHB write command.
# - CMD_DDR, (33): Transmit command code to Flash.
# - RADDR_DDR, (34): Transmit row address to Flash.
# - CADDR_DDR, (35): Transmit column address to Flash.
# - MODE1_DDR, (36): Transmit mode bits to Flash.
# - MODE2_DDR, (37): Transmit mode bits to Flash.
# - MODE4_DDR, (38): Transmit mode bits to Flash.
# - MODE8_DDR, (39): Transmit mode bits to Flash.
# - WRITE_DDR, (40): Transmit program data to Flash device.
# - READ_DDR, (41): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_DDR, (42): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_DDR, (43): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_DDR, (44): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_DDR, (45): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# Possible options: <STOP, CMD_SDR, RADDR_SDR, CADDR_SDR, MODE1_SDR, MODE2_SDR, MODE4_SDR, MODE8_SDR, WRITE_SDR,
# READ_SDR, LEARN_SDR, DATSZ_SDR, DUMMY_SDR, DUMMY_RWDS_SDR, JMP_ON_CS, CMD_DDR, RADDR_DDR, CADDR_DDR, MODE1_DDR,
# MODE2_DDR, MODE4_DDR, MODE8_DDR, WRITE_DDR, READ_DDR, LEARN_DDR, DATSZ_DDR, DUMMY_DDR, DUMMY_RWDS_DDR>
OPERATION_CODE: STOP
lookupTable_seq15_instr1:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq15_instr2:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq15_instr3:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq15_instr4:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq15_instr5:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq15_instr6:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq15_instr7:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
# ---------------------------------------===== lutCustomSeq_0 [Optional] =====----------------------------------------
# Description: Offset: 0x00000180, Width: 32b; [0x180-0x1af] Customizable LUT Sequences
lutCustomSeq_0:
# ------------------------------------------===== seqNum [Optional] =====-------------------------------------------
# Description: Offset: 0b, Width: 8b, Sequence Number, valid number: 1-16
seqNum: 0
# -------------------------------------------===== seqId [Optional] =====-------------------------------------------
# Description: Offset: 8b, Width: 8b, Sequence Index, valid number: 0-15
seqId: 0
# -----------------------------------------===== reserved [Optional] =====------------------------------------------
# Description: Offset: 16b, Width: 16b, N/A
reserved: 0
# ---------------------------------------===== lutCustomSeq_1 [Optional] =====----------------------------------------
# Description: Offset: 0x00000184, Width: 32b; [0x180-0x1af] Customizable LUT Sequences
lutCustomSeq_1:
# ------------------------------------------===== seqNum [Optional] =====-------------------------------------------
# Description: Offset: 0b, Width: 8b, Sequence Number, valid number: 1-16
seqNum: 0
# -------------------------------------------===== seqId [Optional] =====-------------------------------------------
# Description: Offset: 8b, Width: 8b, Sequence Index, valid number: 0-15
seqId: 0
# -----------------------------------------===== reserved [Optional] =====------------------------------------------
# Description: Offset: 16b, Width: 16b, N/A
reserved: 0
# ---------------------------------------===== lutCustomSeq_2 [Optional] =====----------------------------------------
# Description: Offset: 0x00000188, Width: 32b; [0x180-0x1af] Customizable LUT Sequences
lutCustomSeq_2:
# ------------------------------------------===== seqNum [Optional] =====-------------------------------------------
# Description: Offset: 0b, Width: 8b, Sequence Number, valid number: 1-16
seqNum: 0
# -------------------------------------------===== seqId [Optional] =====-------------------------------------------
# Description: Offset: 8b, Width: 8b, Sequence Index, valid number: 0-15
seqId: 0
# -----------------------------------------===== reserved [Optional] =====------------------------------------------
# Description: Offset: 16b, Width: 16b, N/A
reserved: 0
# ---------------------------------------===== lutCustomSeq_3 [Optional] =====----------------------------------------
# Description: Offset: 0x0000018C, Width: 32b; [0x180-0x1af] Customizable LUT Sequences
lutCustomSeq_3:
# ------------------------------------------===== seqNum [Optional] =====-------------------------------------------
# Description: Offset: 0b, Width: 8b, Sequence Number, valid number: 1-16
seqNum: 0
# -------------------------------------------===== seqId [Optional] =====-------------------------------------------
# Description: Offset: 8b, Width: 8b, Sequence Index, valid number: 0-15
seqId: 0
# -----------------------------------------===== reserved [Optional] =====------------------------------------------
# Description: Offset: 16b, Width: 16b, N/A
reserved: 0
# ---------------------------------------===== lutCustomSeq_4 [Optional] =====----------------------------------------
# Description: Offset: 0x00000190, Width: 32b; [0x180-0x1af] Customizable LUT Sequences
lutCustomSeq_4:
# ------------------------------------------===== seqNum [Optional] =====-------------------------------------------
# Description: Offset: 0b, Width: 8b, Sequence Number, valid number: 1-16
seqNum: 0
# -------------------------------------------===== seqId [Optional] =====-------------------------------------------
# Description: Offset: 8b, Width: 8b, Sequence Index, valid number: 0-15
seqId: 0
# -----------------------------------------===== reserved [Optional] =====------------------------------------------
# Description: Offset: 16b, Width: 16b, N/A
reserved: 0
# ---------------------------------------===== lutCustomSeq_5 [Optional] =====----------------------------------------
# Description: Offset: 0x00000194, Width: 32b; [0x180-0x1af] Customizable LUT Sequences
lutCustomSeq_5:
# ------------------------------------------===== seqNum [Optional] =====-------------------------------------------
# Description: Offset: 0b, Width: 8b, Sequence Number, valid number: 1-16
seqNum: 0
# -------------------------------------------===== seqId [Optional] =====-------------------------------------------
# Description: Offset: 8b, Width: 8b, Sequence Index, valid number: 0-15
seqId: 0
# -----------------------------------------===== reserved [Optional] =====------------------------------------------
# Description: Offset: 16b, Width: 16b, N/A
reserved: 0
# ---------------------------------------===== lutCustomSeq_6 [Optional] =====----------------------------------------
# Description: Offset: 0x00000198, Width: 32b; [0x180-0x1af] Customizable LUT Sequences
lutCustomSeq_6:
# ------------------------------------------===== seqNum [Optional] =====-------------------------------------------
# Description: Offset: 0b, Width: 8b, Sequence Number, valid number: 1-16
seqNum: 0
# -------------------------------------------===== seqId [Optional] =====-------------------------------------------
# Description: Offset: 8b, Width: 8b, Sequence Index, valid number: 0-15
seqId: 0
# -----------------------------------------===== reserved [Optional] =====------------------------------------------
# Description: Offset: 16b, Width: 16b, N/A
reserved: 0
# ---------------------------------------===== lutCustomSeq_7 [Optional] =====----------------------------------------
# Description: Offset: 0x0000019C, Width: 32b; [0x180-0x1af] Customizable LUT Sequences
lutCustomSeq_7:
# ------------------------------------------===== seqNum [Optional] =====-------------------------------------------
# Description: Offset: 0b, Width: 8b, Sequence Number, valid number: 1-16
seqNum: 0
# -------------------------------------------===== seqId [Optional] =====-------------------------------------------
# Description: Offset: 8b, Width: 8b, Sequence Index, valid number: 0-15
seqId: 0
# -----------------------------------------===== reserved [Optional] =====------------------------------------------
# Description: Offset: 16b, Width: 16b, N/A
reserved: 0
# ---------------------------------------===== lutCustomSeq_8 [Optional] =====----------------------------------------
# Description: Offset: 0x000001A0, Width: 32b; [0x180-0x1af] Customizable LUT Sequences
lutCustomSeq_8:
# ------------------------------------------===== seqNum [Optional] =====-------------------------------------------
# Description: Offset: 0b, Width: 8b, Sequence Number, valid number: 1-16
seqNum: 0
# -------------------------------------------===== seqId [Optional] =====-------------------------------------------
# Description: Offset: 8b, Width: 8b, Sequence Index, valid number: 0-15
seqId: 0
# -----------------------------------------===== reserved [Optional] =====------------------------------------------
# Description: Offset: 16b, Width: 16b, N/A
reserved: 0
# ---------------------------------------===== lutCustomSeq_9 [Optional] =====----------------------------------------
# Description: Offset: 0x000001A4, Width: 32b; [0x180-0x1af] Customizable LUT Sequences
lutCustomSeq_9:
# ------------------------------------------===== seqNum [Optional] =====-------------------------------------------
# Description: Offset: 0b, Width: 8b, Sequence Number, valid number: 1-16
seqNum: 0
# -------------------------------------------===== seqId [Optional] =====-------------------------------------------
# Description: Offset: 8b, Width: 8b, Sequence Index, valid number: 0-15
seqId: 0
# -----------------------------------------===== reserved [Optional] =====------------------------------------------
# Description: Offset: 16b, Width: 16b, N/A
reserved: 0
# ---------------------------------------===== lutCustomSeq_10 [Optional] =====---------------------------------------
# Description: Offset: 0x000001A8, Width: 32b; [0x180-0x1af] Customizable LUT Sequences
lutCustomSeq_10:
# ------------------------------------------===== seqNum [Optional] =====-------------------------------------------
# Description: Offset: 0b, Width: 8b, Sequence Number, valid number: 1-16
seqNum: 0
# -------------------------------------------===== seqId [Optional] =====-------------------------------------------
# Description: Offset: 8b, Width: 8b, Sequence Index, valid number: 0-15
seqId: 0
# -----------------------------------------===== reserved [Optional] =====------------------------------------------
# Description: Offset: 16b, Width: 16b, N/A
reserved: 0
# ---------------------------------------===== lutCustomSeq_11 [Optional] =====---------------------------------------
# Description: Offset: 0x000001AC, Width: 32b; [0x180-0x1af] Customizable LUT Sequences
lutCustomSeq_11:
# ------------------------------------------===== seqNum [Optional] =====-------------------------------------------
# Description: Offset: 0b, Width: 8b, Sequence Number, valid number: 1-16
seqNum: 0
# -------------------------------------------===== seqId [Optional] =====-------------------------------------------
# Description: Offset: 8b, Width: 8b, Sequence Index, valid number: 0-15
seqId: 0
# -----------------------------------------===== reserved [Optional] =====------------------------------------------
# Description: Offset: 16b, Width: 16b, N/A
reserved: 0
# -----------------------------------------===== reserved4_0 [Optional] =====-----------------------------------------
# Description: Offset: 0x000001B0, Width: 32b; [0x1b0-0x1bf] Reserved for future use
reserved4_0: '0x00000000'
# -----------------------------------------===== reserved4_1 [Optional] =====-----------------------------------------
# Description: Offset: 0x000001B4, Width: 32b; [0x1b0-0x1bf] Reserved for future use
reserved4_1: '0x00000000'
# -----------------------------------------===== reserved4_2 [Optional] =====-----------------------------------------
# Description: Offset: 0x000001B8, Width: 32b; [0x1b0-0x1bf] Reserved for future use
reserved4_2: '0x00000000'
# -----------------------------------------===== reserved4_3 [Optional] =====-----------------------------------------
# Description: Offset: 0x000001BC, Width: 32b; [0x1b0-0x1bf] Reserved for future use
reserved4_3: '0x00000000'
# ------------------------------------------===== pageSize [Optional] =====-------------------------------------------
# Description: Offset: 0x000001C0, Width: 32b; Page size of Serial NOR
pageSize: '0x00000000'
# -----------------------------------------===== sectorSize [Optional] =====------------------------------------------
# Description: Offset: 0x000001C4, Width: 32b; Sector size of Serial NOR
sectorSize: '0x00000000'
# -------------------------------------===== ipcmdSerialClkFreq [Optional] =====--------------------------------------
# Description: Offset: 0x000001C8, Width: 8b; Clock frequency for IP command
ipcmdSerialClkFreq: '0x00'
# -------------------------------------===== isUniformBlockSize [Optional] =====--------------------------------------
# Description: Offset: 0x000001C9, Width: 8b; Sector/Block size is the same
isUniformBlockSize: '0x00'
# -----------------------------------------===== reserved0_0 [Optional] =====-----------------------------------------
# Description: Offset: 0x000001CA, Width: 8b; Reserved for future use
reserved0_0: '0x00'
# -----------------------------------------===== reserved0_1 [Optional] =====-----------------------------------------
# Description: Offset: 0x000001CB, Width: 8b; Reserved for future use
reserved0_1: '0x00'
# ----------------------------------------===== serialNorType [Optional] =====----------------------------------------
# Description: Offset: 0x000001CC, Width: 8b; Serial NOR Flash type: 0/1/2/3
serialNorType: '0x00'
# --------------------------------------===== needExitNoCmdMode [Optional] =====--------------------------------------
# Description: Offset: 0x000001CD, Width: 8b; Need to exit NoCmd mode before other IP command
needExitNoCmdMode: '0x00'
# ------------------------------------===== halfClkForNonReadCmd [Optional] =====-------------------------------------
# Description: Offset: 0x000001CE, Width: 8b; Half the Serial Clock for non-read command: true/false
halfClkForNonReadCmd: '0x00'
# ------------------------------------===== needRestoreNoCmdMode [Optional] =====-------------------------------------
# Description: Offset: 0x000001CF, Width: 8b; Need to Restore NoCmd mode after IP command execution
needRestoreNoCmdMode: '0x00'
# ------------------------------------------===== blockSize [Optional] =====------------------------------------------
# Description: Offset: 0x000001D0, Width: 32b; Block size
blockSize: '0x00000000'
# -----------------------------------------===== reserve2_0 [Optional] =====------------------------------------------
# Description: Offset: 0x000001D4, Width: 32b; Reserved for future use
reserve2_0: '0x00000000'
# -----------------------------------------===== reserve2_1 [Optional] =====------------------------------------------
# Description: Offset: 0x000001D8, Width: 32b; Reserved for future use
reserve2_1: '0x00000000'
# -----------------------------------------===== reserve2_2 [Optional] =====------------------------------------------
# Description: Offset: 0x000001DC, Width: 32b; Reserved for future use
reserve2_2: '0x00000000'
# -----------------------------------------===== reserve2_3 [Optional] =====------------------------------------------
# Description: Offset: 0x000001E0, Width: 32b; Reserved for future use
reserve2_3: '0x00000000'
# -----------------------------------------===== reserve2_4 [Optional] =====------------------------------------------
# Description: Offset: 0x000001E4, Width: 32b; Reserved for future use
reserve2_4: '0x00000000'
# -----------------------------------------===== reserve2_5 [Optional] =====------------------------------------------
# Description: Offset: 0x000001E8, Width: 32b; Reserved for future use
reserve2_5: '0x00000000'
# -----------------------------------------===== reserve2_6 [Optional] =====------------------------------------------
# Description: Offset: 0x000001EC, Width: 32b; Reserved for future use
reserve2_6: '0x00000000'
# -----------------------------------------===== reserve2_7 [Optional] =====------------------------------------------
# Description: Offset: 0x000001F0, Width: 32b; Reserved for future use
reserve2_7: '0x00000000'
# -----------------------------------------===== reserve2_8 [Optional] =====------------------------------------------
# Description: Offset: 0x000001F4, Width: 32b; Reserved for future use
reserve2_8: '0x00000000'
# -----------------------------------------===== reserve2_9 [Optional] =====------------------------------------------
# Description: Offset: 0x000001F8, Width: 32b; Reserved for future use
reserve2_9: '0x00000000'
# -----------------------------------------===== reserve2_10 [Optional] =====-----------------------------------------
# Description: Offset: 0x000001FC, Width: 32b; Reserved for future use
reserve2_10: '0x00000000'
FCB for mimxrt1172, Revision: a0 and flexspi_nor#
FCB for mimxrt1172, Revision: a0 and flexspi_nor JSON schema
FCB for mimxrt1172, Revision: a0 and flexspi_nor YAML configuration template
# ================================= FCB for mimxrt1172, Revision: a0 and flexspi_nor =================================
# ======================================================================================================================
# == FCB for mimxrt1172, Revision: a0 and flexspi_nor ==
# ======================================================================================================================
# -------------------------------------===== The chip family name [Required] =====--------------------------------------
# Description: NXP chip family identifier.
family: CHOOSE_FROM_TABLE
# -----------------------------------------===== MCU revision [Optional] =====------------------------------------------
# Description: Revision of silicon. The 'latest' name, means most current revision.
# Possible options: <a0, latest>
revision: a0
# ------------------------------------------===== Memory type [Required] =====------------------------------------------
# Description: Specify type of memory used by FCB description.
# Possible options: <flexspi_nor>
type: flexspi_nor
# ------------------------------------------===== mimxrt1172 [Required] =====-------------------------------------------
fcb_settings:
# ---------------------------------------------===== tag [Optional] =====---------------------------------------------
# Description: Offset: 0x00000000, Width: 32b; [0x000-0x003] Tag, fixed value 0x42464346UL
tag: '0x42464346'
# -------------------------------------------===== version [Optional] =====-------------------------------------------
# Description: Offset: 0x00000004, Width: 32b; [0x004-0x007] Version,[31:24] -'V', [23:16] - Major, [15:8] - Minor,
# [7:0] - bugfix
version: '0x56010400'
# ------------------------------------------===== reserved0 [Optional] =====------------------------------------------
# Description: Offset: 0x00000008, Width: 32b; [0x008-0x00b] Reserved for future use
reserved0: '0x00000000'
# --------------------------------------===== readSampleClkSrc [Optional] =====---------------------------------------
# Description: Offset: 0x0000000C, Width: 8b; [0x00c-0x00c] Read Sample Clock Source, valid value: 0/1/3
readSampleClkSrc: '0x00'
# -----------------------------------------===== csHoldTime [Optional] =====------------------------------------------
# Description: Offset: 0x0000000D, Width: 8b; [0x00d-0x00d] CS hold time, default value: 3
csHoldTime: '0x00'
# -----------------------------------------===== csSetupTime [Optional] =====-----------------------------------------
# Description: Offset: 0x0000000E, Width: 8b; [0x00e-0x00e] CS setup time, default value: 3
csSetupTime: '0x00'
# -------------------------------------===== columnAddressWidth [Optional] =====--------------------------------------
# Description: Offset: 0x0000000F, Width: 8b; [0x00f-0x00f] Column Address with, for HyperBus protocol, it is fixed
# to 3, For Serial NAND, need to refer to datasheet
columnAddressWidth: '0x00'
# -------------------------------------===== deviceModeCfgEnable [Optional] =====-------------------------------------
# Description: Offset: 0x00000010, Width: 8b; [0x010-0x010] Device Mode Configure enable flag, 1 - Enable, 0 -
# Disable
deviceModeCfgEnable: '0x00'
# ---------------------------------------===== deviceModeType [Optional] =====----------------------------------------
# Description: Offset: 0x00000011, Width: 8b; [0x011-0x011] Specify the configuration command type:Quad Enable,
# DPI/QPI/OPI switch, Generic configuration, etc.
deviceModeType: '0x00'
# -------------------------------------===== waitTimeCfgCommands [Optional] =====-------------------------------------
# Description: Offset: 0x00000012, Width: 16b; [0x012-0x013] Wait time for all configuration commands, unit: 100us,
# Used for DPI/QPI/OPI switch or reset command
waitTimeCfgCommands: '0x0000'
# ----------------------------------------===== deviceModeSeq [Optional] =====----------------------------------------
# Description: Offset: 0x00000014, Width: 32b; [0x014-0x017] Device mode sequence info, [7:0] - LUT sequence id,
# [15:8] - LUt sequence number, [31:16] Reserved
deviceModeSeq:
# ------------------------------------------===== seqNum [Optional] =====-------------------------------------------
# Description: Offset: 0b, Width: 8b, Sequence Number, valid number: 1-16
seqNum: 0
# -------------------------------------------===== seqId [Optional] =====-------------------------------------------
# Description: Offset: 8b, Width: 8b, Sequence Index, valid number: 0-15
seqId: 0
# -----------------------------------------===== reserved [Optional] =====------------------------------------------
# Description: Offset: 16b, Width: 16b, N/A
reserved: 0
# ----------------------------------------===== deviceModeArg [Optional] =====----------------------------------------
# Description: Offset: 0x00000018, Width: 32b; [0x018-0x01b] Argument/Parameter for device configuration
deviceModeArg: '0x00000000'
# ---------------------------------------===== configCmdEnable [Optional] =====---------------------------------------
# Description: Offset: 0x0000001C, Width: 8b; [0x01c-0x01c] Configure command Enable Flag, 1 - Enable, 0 - Disable
configCmdEnable: '0x00'
# --------------------------------------===== configModeType_0 [Optional] =====---------------------------------------
# Description: Offset: 0x0000001D, Width: 8b; [0x01d-0x01f] Configure Mode Type, similar as deviceModeTpe
configModeType_0: '0x00'
# --------------------------------------===== configModeType_1 [Optional] =====---------------------------------------
# Description: Offset: 0x0000001E, Width: 8b; [0x01d-0x01f] Configure Mode Type, similar as deviceModeTpe
configModeType_1: '0x00'
# --------------------------------------===== configModeType_2 [Optional] =====---------------------------------------
# Description: Offset: 0x0000001F, Width: 8b; [0x01d-0x01f] Configure Mode Type, similar as deviceModeTpe
configModeType_2: '0x00'
# ---------------------------------------===== configCmdSeqs_0 [Optional] =====---------------------------------------
# Description: Offset: 0x00000020, Width: 32b; [0x020-0x02b] Sequence info for Device Configuration command, similar
# as deviceModeSeq
configCmdSeqs_0:
# ------------------------------------------===== seqNum [Optional] =====-------------------------------------------
# Description: Offset: 0b, Width: 8b, Sequence Number, valid number: 1-16
seqNum: 0
# -------------------------------------------===== seqId [Optional] =====-------------------------------------------
# Description: Offset: 8b, Width: 8b, Sequence Index, valid number: 0-15
seqId: 0
# -----------------------------------------===== reserved [Optional] =====------------------------------------------
# Description: Offset: 16b, Width: 16b, N/A
reserved: 0
# ---------------------------------------===== configCmdSeqs_1 [Optional] =====---------------------------------------
# Description: Offset: 0x00000024, Width: 32b; [0x020-0x02b] Sequence info for Device Configuration command, similar
# as deviceModeSeq
configCmdSeqs_1:
# ------------------------------------------===== seqNum [Optional] =====-------------------------------------------
# Description: Offset: 0b, Width: 8b, Sequence Number, valid number: 1-16
seqNum: 0
# -------------------------------------------===== seqId [Optional] =====-------------------------------------------
# Description: Offset: 8b, Width: 8b, Sequence Index, valid number: 0-15
seqId: 0
# -----------------------------------------===== reserved [Optional] =====------------------------------------------
# Description: Offset: 16b, Width: 16b, N/A
reserved: 0
# ---------------------------------------===== configCmdSeqs_2 [Optional] =====---------------------------------------
# Description: Offset: 0x00000028, Width: 32b; [0x020-0x02b] Sequence info for Device Configuration command, similar
# as deviceModeSeq
configCmdSeqs_2:
# ------------------------------------------===== seqNum [Optional] =====-------------------------------------------
# Description: Offset: 0b, Width: 8b, Sequence Number, valid number: 1-16
seqNum: 0
# -------------------------------------------===== seqId [Optional] =====-------------------------------------------
# Description: Offset: 8b, Width: 8b, Sequence Index, valid number: 0-15
seqId: 0
# -----------------------------------------===== reserved [Optional] =====------------------------------------------
# Description: Offset: 16b, Width: 16b, N/A
reserved: 0
# ------------------------------------------===== reserved1 [Optional] =====------------------------------------------
# Description: Offset: 0x0000002C, Width: 32b; [0x02c-0x02f] Reserved for future use
reserved1: '0x00000000'
# ---------------------------------------===== configCmdArgs_0 [Optional] =====---------------------------------------
# Description: Offset: 0x00000030, Width: 32b; [0x030-0x03b] Arguments/Parameters for device Configuration commands
configCmdArgs_0: '0x00000000'
# ---------------------------------------===== configCmdArgs_1 [Optional] =====---------------------------------------
# Description: Offset: 0x00000034, Width: 32b; [0x030-0x03b] Arguments/Parameters for device Configuration commands
configCmdArgs_1: '0x00000000'
# ---------------------------------------===== configCmdArgs_2 [Optional] =====---------------------------------------
# Description: Offset: 0x00000038, Width: 32b; [0x030-0x03b] Arguments/Parameters for device Configuration commands
configCmdArgs_2: '0x00000000'
# ------------------------------------------===== reserved2 [Optional] =====------------------------------------------
# Description: Offset: 0x0000003C, Width: 32b; [0x03c-0x03f] Reserved for future use
reserved2: '0x00000000'
# ------------------------------------===== controllerMiscOption [Optional] =====-------------------------------------
# Description: Offset: 0x00000040, Width: 32b; [0x040-0x043] Controller Misc Options, see Misc feature bit
# definitions for more details
controllerMiscOption: '0x00000000'
# -----------------------------------------===== deviceType [Optional] =====------------------------------------------
# Description: Offset: 0x00000044, Width: 8b; [0x044-0x044] Device Type: See Flash Type Definition for more details
deviceType: '0x00'
# ----------------------------------------===== sflashPadType [Optional] =====----------------------------------------
# Description: Offset: 0x00000045, Width: 8b; [0x045-0x045] Serial Flash Pad Type: 1 - Single, 2 - Dual, 4 - Quad, 8
# - Octal
sflashPadType: '0x00'
# ----------------------------------------===== serialClkFreq [Optional] =====----------------------------------------
# Description: Offset: 0x00000046, Width: 8b; [0x046-0x046] Serial Flash Frequency, device specific definitions, See
# System Boot Chapter for more details
serialClkFreq: '0x00'
# -------------------------------------===== lutCustomSeqEnable [Optional] =====--------------------------------------
# Description: Offset: 0x00000047, Width: 8b; [0x047-0x047] LUT customization Enable, it is required if the
# program/erase cannot be done using 1 LUT sequence, currently, only applicable to HyperFLASH
lutCustomSeqEnable: '0x00'
# -----------------------------------------===== reserved3_0 [Optional] =====-----------------------------------------
# Description: Offset: 0x00000048, Width: 32b; [0x048-0x04f] Reserved for future use
reserved3_0: '0x00000000'
# -----------------------------------------===== reserved3_1 [Optional] =====-----------------------------------------
# Description: Offset: 0x0000004C, Width: 32b; [0x048-0x04f] Reserved for future use
reserved3_1: '0x00000000'
# ----------------------------------------===== sflashA1Size [Optional] =====-----------------------------------------
# Description: Offset: 0x00000050, Width: 32b; [0x050-0x053] Size of Flash connected to A1
sflashA1Size: '0x00000000'
# ----------------------------------------===== sflashA2Size [Optional] =====-----------------------------------------
# Description: Offset: 0x00000054, Width: 32b; [0x054-0x057] Size of Flash connected to A2
sflashA2Size: '0x00000000'
# ----------------------------------------===== sflashB1Size [Optional] =====-----------------------------------------
# Description: Offset: 0x00000058, Width: 32b; [0x058-0x05b] Size of Flash connected to B1
sflashB1Size: '0x00000000'
# ----------------------------------------===== sflashB2Size [Optional] =====-----------------------------------------
# Description: Offset: 0x0000005C, Width: 32b; [0x05c-0x05f] Size of Flash connected to B2
sflashB2Size: '0x00000000'
# ------------------------------------===== csPadSettingOverride [Optional] =====-------------------------------------
# Description: Offset: 0x00000060, Width: 32b; [0x060-0x063] CS pad setting override value
csPadSettingOverride: '0x00000000'
# -----------------------------------===== sclkPadSettingOverride [Optional] =====------------------------------------
# Description: Offset: 0x00000064, Width: 32b; [0x064-0x067] SCK pad setting override value
sclkPadSettingOverride: '0x00000000'
# -----------------------------------===== dataPadSettingOverride [Optional] =====------------------------------------
# Description: Offset: 0x00000068, Width: 32b; [0x068-0x06b] data pad setting override value
dataPadSettingOverride: '0x00000000'
# ------------------------------------===== dqsPadSettingOverride [Optional] =====------------------------------------
# Description: Offset: 0x0000006C, Width: 32b; [0x06c-0x06f] DQS pad setting override value
dqsPadSettingOverride: '0x00000000'
# -----------------------------------------===== timeoutInMs [Optional] =====-----------------------------------------
# Description: Offset: 0x00000070, Width: 32b; [0x070-0x073] Timeout threshold for read status command
timeoutInMs: '0x00000000'
# ---------------------------------------===== commandInterval [Optional] =====---------------------------------------
# Description: Offset: 0x00000074, Width: 32b; [0x074-0x077] CS deselect interval between two commands
commandInterval: '0x00000000'
# ---------------------------------------===== dataValidTime_0 [Optional] =====---------------------------------------
# Description: Offset: 0x00000078, Width: 16b; [0x078-0x07b] CLK edge to data valid time for PORT A and PORT B, in
# terms of 0.1ns
dataValidTime_0: '0x0000'
# ---------------------------------------===== dataValidTime_1 [Optional] =====---------------------------------------
# Description: Offset: 0x0000007A, Width: 16b; [0x078-0x07b] CLK edge to data valid time for PORT A and PORT B, in
# terms of 0.1ns
dataValidTime_1: '0x0000'
# -----------------------------------------===== busyOffset [Optional] =====------------------------------------------
# Description: Offset: 0x0000007C, Width: 16b; [0x07c-0x07d] Busy offset, valid value: 0-31
busyOffset: '0x0000'
# ---------------------------------------===== busyBitPolarity [Optional] =====---------------------------------------
# Description: Offset: 0x0000007E, Width: 16b; [0x07e-0x07f] Busy flag polarity, 0 - busy flag is 1 when flash device
# is busy, 1 - busy flag is 0 when flash device is busy
busyBitPolarity: '0x0000'
# -----------------------------------===== lookupTable_seq0_instr0 [Optional] =====-----------------------------------
# Description: Offset: 0x00000080, Width: 16b; Lookup table holds Flash command sequences 0, instruction 0
lookupTable_seq0_instr0:
# ------------------------------------------===== OPERAND [Optional] =====------------------------------------------
# Description: Offset: 0b, Width: 8b, Instruction operand. Its values depends on used instruction
OPERAND: 0
# -----------------------------------------===== NUM_PADS [Optional] =====------------------------------------------
# Description: Offset: 8b, Width: 2b, Number of pads used by instruction. Some instructions ignores this parameter.
# - 1PAD, (0): Single mode. One pad is used.
# - 2PAD, (1): Dual mode. Two pads are used.
# - 4PAD, (2): Quad mode. Four pads are used.
# - 8PAD, (3): Octal mode. Eight pads are used.
# Possible options: <1PAD, 2PAD, 4PAD, 8PAD>
NUM_PADS: 1PAD
# --------------------------------------===== OPERATION_CODE [Optional] =====---------------------------------------
# Description: Offset: 10b, Width: 6b, Instruction operation code.
# - STOP, (0): Stop execution and de-assert CS. Then, the next command sequence (to the same flash device) starts
# from instruction pointer 0.
# - CMD_SDR, (1): Transmit command code to Flash.
# - RADDR_SDR, (2): Transmit row address to Flash.
# - CADDR_SDR, (3): Transmit column address to Flash.
# - MODE1_SDR, (4): Transmit mode bits to Flash.
# - MODE2_SDR, (5): Transmit mode bits to Flash.
# - MODE4_SDR, (6): Transmit mode bits to Flash.
# - MODE8_SDR, (7): Transmit mode bits to Flash.
# - WRITE_SDR, (8): Transmit program data to Flash device.
# - READ_SDR, (9): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_SDR, (10): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_SDR, (11): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_SDR, (12): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_SDR, (13): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# - JMP_ON_CS, (31): Stop execution, de-assert CS and save operand[7:0] as the instruction start pointer for next
# sequence.Normally this instruction is used to support Execute-In-Place enhanced mode. See XIP enhanced mode for
# more details.This instruction is only allowed for AHB read commands. There is interrupt status bit set
# (INTR[IPCMDERR] or INTR[AHBCMDERR]) when using this instruction in IP command or AHB write command.
# - CMD_DDR, (33): Transmit command code to Flash.
# - RADDR_DDR, (34): Transmit row address to Flash.
# - CADDR_DDR, (35): Transmit column address to Flash.
# - MODE1_DDR, (36): Transmit mode bits to Flash.
# - MODE2_DDR, (37): Transmit mode bits to Flash.
# - MODE4_DDR, (38): Transmit mode bits to Flash.
# - MODE8_DDR, (39): Transmit mode bits to Flash.
# - WRITE_DDR, (40): Transmit program data to Flash device.
# - READ_DDR, (41): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_DDR, (42): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_DDR, (43): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_DDR, (44): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_DDR, (45): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# Possible options: <STOP, CMD_SDR, RADDR_SDR, CADDR_SDR, MODE1_SDR, MODE2_SDR, MODE4_SDR, MODE8_SDR, WRITE_SDR,
# READ_SDR, LEARN_SDR, DATSZ_SDR, DUMMY_SDR, DUMMY_RWDS_SDR, JMP_ON_CS, CMD_DDR, RADDR_DDR, CADDR_DDR, MODE1_DDR,
# MODE2_DDR, MODE4_DDR, MODE8_DDR, WRITE_DDR, READ_DDR, LEARN_DDR, DATSZ_DDR, DUMMY_DDR, DUMMY_RWDS_DDR>
OPERATION_CODE: STOP
lookupTable_seq0_instr1:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq0_instr2:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq0_instr3:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq0_instr4:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq0_instr5:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq0_instr6:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq0_instr7:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
# -----------------------------------===== lookupTable_seq1_instr0 [Optional] =====-----------------------------------
# Description: Offset: 0x00000090, Width: 16b; Lookup table holds Flash command sequences 1, instruction 0
lookupTable_seq1_instr0:
# ------------------------------------------===== OPERAND [Optional] =====------------------------------------------
# Description: Offset: 0b, Width: 8b, Instruction operand. Its values depends on used instruction
OPERAND: 0
# -----------------------------------------===== NUM_PADS [Optional] =====------------------------------------------
# Description: Offset: 8b, Width: 2b, Number of pads used by instruction. Some instructions ignores this parameter.
# - 1PAD, (0): Single mode. One pad is used.
# - 2PAD, (1): Dual mode. Two pads are used.
# - 4PAD, (2): Quad mode. Four pads are used.
# - 8PAD, (3): Octal mode. Eight pads are used.
# Possible options: <1PAD, 2PAD, 4PAD, 8PAD>
NUM_PADS: 1PAD
# --------------------------------------===== OPERATION_CODE [Optional] =====---------------------------------------
# Description: Offset: 10b, Width: 6b, Instruction operation code.
# - STOP, (0): Stop execution and de-assert CS. Then, the next command sequence (to the same flash device) starts
# from instruction pointer 0.
# - CMD_SDR, (1): Transmit command code to Flash.
# - RADDR_SDR, (2): Transmit row address to Flash.
# - CADDR_SDR, (3): Transmit column address to Flash.
# - MODE1_SDR, (4): Transmit mode bits to Flash.
# - MODE2_SDR, (5): Transmit mode bits to Flash.
# - MODE4_SDR, (6): Transmit mode bits to Flash.
# - MODE8_SDR, (7): Transmit mode bits to Flash.
# - WRITE_SDR, (8): Transmit program data to Flash device.
# - READ_SDR, (9): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_SDR, (10): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_SDR, (11): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_SDR, (12): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_SDR, (13): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# - JMP_ON_CS, (31): Stop execution, de-assert CS and save operand[7:0] as the instruction start pointer for next
# sequence.Normally this instruction is used to support Execute-In-Place enhanced mode. See XIP enhanced mode for
# more details.This instruction is only allowed for AHB read commands. There is interrupt status bit set
# (INTR[IPCMDERR] or INTR[AHBCMDERR]) when using this instruction in IP command or AHB write command.
# - CMD_DDR, (33): Transmit command code to Flash.
# - RADDR_DDR, (34): Transmit row address to Flash.
# - CADDR_DDR, (35): Transmit column address to Flash.
# - MODE1_DDR, (36): Transmit mode bits to Flash.
# - MODE2_DDR, (37): Transmit mode bits to Flash.
# - MODE4_DDR, (38): Transmit mode bits to Flash.
# - MODE8_DDR, (39): Transmit mode bits to Flash.
# - WRITE_DDR, (40): Transmit program data to Flash device.
# - READ_DDR, (41): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_DDR, (42): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_DDR, (43): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_DDR, (44): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_DDR, (45): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# Possible options: <STOP, CMD_SDR, RADDR_SDR, CADDR_SDR, MODE1_SDR, MODE2_SDR, MODE4_SDR, MODE8_SDR, WRITE_SDR,
# READ_SDR, LEARN_SDR, DATSZ_SDR, DUMMY_SDR, DUMMY_RWDS_SDR, JMP_ON_CS, CMD_DDR, RADDR_DDR, CADDR_DDR, MODE1_DDR,
# MODE2_DDR, MODE4_DDR, MODE8_DDR, WRITE_DDR, READ_DDR, LEARN_DDR, DATSZ_DDR, DUMMY_DDR, DUMMY_RWDS_DDR>
OPERATION_CODE: STOP
lookupTable_seq1_instr1:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq1_instr2:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq1_instr3:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq1_instr4:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq1_instr5:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq1_instr6:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq1_instr7:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
# -----------------------------------===== lookupTable_seq2_instr0 [Optional] =====-----------------------------------
# Description: Offset: 0x000000A0, Width: 16b; Lookup table holds Flash command sequences 2, instruction 0
lookupTable_seq2_instr0:
# ------------------------------------------===== OPERAND [Optional] =====------------------------------------------
# Description: Offset: 0b, Width: 8b, Instruction operand. Its values depends on used instruction
OPERAND: 0
# -----------------------------------------===== NUM_PADS [Optional] =====------------------------------------------
# Description: Offset: 8b, Width: 2b, Number of pads used by instruction. Some instructions ignores this parameter.
# - 1PAD, (0): Single mode. One pad is used.
# - 2PAD, (1): Dual mode. Two pads are used.
# - 4PAD, (2): Quad mode. Four pads are used.
# - 8PAD, (3): Octal mode. Eight pads are used.
# Possible options: <1PAD, 2PAD, 4PAD, 8PAD>
NUM_PADS: 1PAD
# --------------------------------------===== OPERATION_CODE [Optional] =====---------------------------------------
# Description: Offset: 10b, Width: 6b, Instruction operation code.
# - STOP, (0): Stop execution and de-assert CS. Then, the next command sequence (to the same flash device) starts
# from instruction pointer 0.
# - CMD_SDR, (1): Transmit command code to Flash.
# - RADDR_SDR, (2): Transmit row address to Flash.
# - CADDR_SDR, (3): Transmit column address to Flash.
# - MODE1_SDR, (4): Transmit mode bits to Flash.
# - MODE2_SDR, (5): Transmit mode bits to Flash.
# - MODE4_SDR, (6): Transmit mode bits to Flash.
# - MODE8_SDR, (7): Transmit mode bits to Flash.
# - WRITE_SDR, (8): Transmit program data to Flash device.
# - READ_SDR, (9): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_SDR, (10): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_SDR, (11): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_SDR, (12): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_SDR, (13): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# - JMP_ON_CS, (31): Stop execution, de-assert CS and save operand[7:0] as the instruction start pointer for next
# sequence.Normally this instruction is used to support Execute-In-Place enhanced mode. See XIP enhanced mode for
# more details.This instruction is only allowed for AHB read commands. There is interrupt status bit set
# (INTR[IPCMDERR] or INTR[AHBCMDERR]) when using this instruction in IP command or AHB write command.
# - CMD_DDR, (33): Transmit command code to Flash.
# - RADDR_DDR, (34): Transmit row address to Flash.
# - CADDR_DDR, (35): Transmit column address to Flash.
# - MODE1_DDR, (36): Transmit mode bits to Flash.
# - MODE2_DDR, (37): Transmit mode bits to Flash.
# - MODE4_DDR, (38): Transmit mode bits to Flash.
# - MODE8_DDR, (39): Transmit mode bits to Flash.
# - WRITE_DDR, (40): Transmit program data to Flash device.
# - READ_DDR, (41): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_DDR, (42): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_DDR, (43): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_DDR, (44): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_DDR, (45): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# Possible options: <STOP, CMD_SDR, RADDR_SDR, CADDR_SDR, MODE1_SDR, MODE2_SDR, MODE4_SDR, MODE8_SDR, WRITE_SDR,
# READ_SDR, LEARN_SDR, DATSZ_SDR, DUMMY_SDR, DUMMY_RWDS_SDR, JMP_ON_CS, CMD_DDR, RADDR_DDR, CADDR_DDR, MODE1_DDR,
# MODE2_DDR, MODE4_DDR, MODE8_DDR, WRITE_DDR, READ_DDR, LEARN_DDR, DATSZ_DDR, DUMMY_DDR, DUMMY_RWDS_DDR>
OPERATION_CODE: STOP
lookupTable_seq2_instr1:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq2_instr2:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq2_instr3:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq2_instr4:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq2_instr5:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq2_instr6:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq2_instr7:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
# -----------------------------------===== lookupTable_seq3_instr0 [Optional] =====-----------------------------------
# Description: Offset: 0x000000B0, Width: 16b; Lookup table holds Flash command sequences 3, instruction 0
lookupTable_seq3_instr0:
# ------------------------------------------===== OPERAND [Optional] =====------------------------------------------
# Description: Offset: 0b, Width: 8b, Instruction operand. Its values depends on used instruction
OPERAND: 0
# -----------------------------------------===== NUM_PADS [Optional] =====------------------------------------------
# Description: Offset: 8b, Width: 2b, Number of pads used by instruction. Some instructions ignores this parameter.
# - 1PAD, (0): Single mode. One pad is used.
# - 2PAD, (1): Dual mode. Two pads are used.
# - 4PAD, (2): Quad mode. Four pads are used.
# - 8PAD, (3): Octal mode. Eight pads are used.
# Possible options: <1PAD, 2PAD, 4PAD, 8PAD>
NUM_PADS: 1PAD
# --------------------------------------===== OPERATION_CODE [Optional] =====---------------------------------------
# Description: Offset: 10b, Width: 6b, Instruction operation code.
# - STOP, (0): Stop execution and de-assert CS. Then, the next command sequence (to the same flash device) starts
# from instruction pointer 0.
# - CMD_SDR, (1): Transmit command code to Flash.
# - RADDR_SDR, (2): Transmit row address to Flash.
# - CADDR_SDR, (3): Transmit column address to Flash.
# - MODE1_SDR, (4): Transmit mode bits to Flash.
# - MODE2_SDR, (5): Transmit mode bits to Flash.
# - MODE4_SDR, (6): Transmit mode bits to Flash.
# - MODE8_SDR, (7): Transmit mode bits to Flash.
# - WRITE_SDR, (8): Transmit program data to Flash device.
# - READ_SDR, (9): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_SDR, (10): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_SDR, (11): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_SDR, (12): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_SDR, (13): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# - JMP_ON_CS, (31): Stop execution, de-assert CS and save operand[7:0] as the instruction start pointer for next
# sequence.Normally this instruction is used to support Execute-In-Place enhanced mode. See XIP enhanced mode for
# more details.This instruction is only allowed for AHB read commands. There is interrupt status bit set
# (INTR[IPCMDERR] or INTR[AHBCMDERR]) when using this instruction in IP command or AHB write command.
# - CMD_DDR, (33): Transmit command code to Flash.
# - RADDR_DDR, (34): Transmit row address to Flash.
# - CADDR_DDR, (35): Transmit column address to Flash.
# - MODE1_DDR, (36): Transmit mode bits to Flash.
# - MODE2_DDR, (37): Transmit mode bits to Flash.
# - MODE4_DDR, (38): Transmit mode bits to Flash.
# - MODE8_DDR, (39): Transmit mode bits to Flash.
# - WRITE_DDR, (40): Transmit program data to Flash device.
# - READ_DDR, (41): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_DDR, (42): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_DDR, (43): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_DDR, (44): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_DDR, (45): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# Possible options: <STOP, CMD_SDR, RADDR_SDR, CADDR_SDR, MODE1_SDR, MODE2_SDR, MODE4_SDR, MODE8_SDR, WRITE_SDR,
# READ_SDR, LEARN_SDR, DATSZ_SDR, DUMMY_SDR, DUMMY_RWDS_SDR, JMP_ON_CS, CMD_DDR, RADDR_DDR, CADDR_DDR, MODE1_DDR,
# MODE2_DDR, MODE4_DDR, MODE8_DDR, WRITE_DDR, READ_DDR, LEARN_DDR, DATSZ_DDR, DUMMY_DDR, DUMMY_RWDS_DDR>
OPERATION_CODE: STOP
lookupTable_seq3_instr1:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq3_instr2:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq3_instr3:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq3_instr4:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq3_instr5:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq3_instr6:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq3_instr7:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
# -----------------------------------===== lookupTable_seq4_instr0 [Optional] =====-----------------------------------
# Description: Offset: 0x000000C0, Width: 16b; Lookup table holds Flash command sequences 4, instruction 0
lookupTable_seq4_instr0:
# ------------------------------------------===== OPERAND [Optional] =====------------------------------------------
# Description: Offset: 0b, Width: 8b, Instruction operand. Its values depends on used instruction
OPERAND: 0
# -----------------------------------------===== NUM_PADS [Optional] =====------------------------------------------
# Description: Offset: 8b, Width: 2b, Number of pads used by instruction. Some instructions ignores this parameter.
# - 1PAD, (0): Single mode. One pad is used.
# - 2PAD, (1): Dual mode. Two pads are used.
# - 4PAD, (2): Quad mode. Four pads are used.
# - 8PAD, (3): Octal mode. Eight pads are used.
# Possible options: <1PAD, 2PAD, 4PAD, 8PAD>
NUM_PADS: 1PAD
# --------------------------------------===== OPERATION_CODE [Optional] =====---------------------------------------
# Description: Offset: 10b, Width: 6b, Instruction operation code.
# - STOP, (0): Stop execution and de-assert CS. Then, the next command sequence (to the same flash device) starts
# from instruction pointer 0.
# - CMD_SDR, (1): Transmit command code to Flash.
# - RADDR_SDR, (2): Transmit row address to Flash.
# - CADDR_SDR, (3): Transmit column address to Flash.
# - MODE1_SDR, (4): Transmit mode bits to Flash.
# - MODE2_SDR, (5): Transmit mode bits to Flash.
# - MODE4_SDR, (6): Transmit mode bits to Flash.
# - MODE8_SDR, (7): Transmit mode bits to Flash.
# - WRITE_SDR, (8): Transmit program data to Flash device.
# - READ_SDR, (9): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_SDR, (10): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_SDR, (11): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_SDR, (12): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_SDR, (13): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# - JMP_ON_CS, (31): Stop execution, de-assert CS and save operand[7:0] as the instruction start pointer for next
# sequence.Normally this instruction is used to support Execute-In-Place enhanced mode. See XIP enhanced mode for
# more details.This instruction is only allowed for AHB read commands. There is interrupt status bit set
# (INTR[IPCMDERR] or INTR[AHBCMDERR]) when using this instruction in IP command or AHB write command.
# - CMD_DDR, (33): Transmit command code to Flash.
# - RADDR_DDR, (34): Transmit row address to Flash.
# - CADDR_DDR, (35): Transmit column address to Flash.
# - MODE1_DDR, (36): Transmit mode bits to Flash.
# - MODE2_DDR, (37): Transmit mode bits to Flash.
# - MODE4_DDR, (38): Transmit mode bits to Flash.
# - MODE8_DDR, (39): Transmit mode bits to Flash.
# - WRITE_DDR, (40): Transmit program data to Flash device.
# - READ_DDR, (41): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_DDR, (42): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_DDR, (43): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_DDR, (44): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_DDR, (45): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# Possible options: <STOP, CMD_SDR, RADDR_SDR, CADDR_SDR, MODE1_SDR, MODE2_SDR, MODE4_SDR, MODE8_SDR, WRITE_SDR,
# READ_SDR, LEARN_SDR, DATSZ_SDR, DUMMY_SDR, DUMMY_RWDS_SDR, JMP_ON_CS, CMD_DDR, RADDR_DDR, CADDR_DDR, MODE1_DDR,
# MODE2_DDR, MODE4_DDR, MODE8_DDR, WRITE_DDR, READ_DDR, LEARN_DDR, DATSZ_DDR, DUMMY_DDR, DUMMY_RWDS_DDR>
OPERATION_CODE: STOP
lookupTable_seq4_instr1:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq4_instr2:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq4_instr3:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq4_instr4:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq4_instr5:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq4_instr6:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq4_instr7:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
# -----------------------------------===== lookupTable_seq5_instr0 [Optional] =====-----------------------------------
# Description: Offset: 0x000000D0, Width: 16b; Lookup table holds Flash command sequences 5, instruction 0
lookupTable_seq5_instr0:
# ------------------------------------------===== OPERAND [Optional] =====------------------------------------------
# Description: Offset: 0b, Width: 8b, Instruction operand. Its values depends on used instruction
OPERAND: 0
# -----------------------------------------===== NUM_PADS [Optional] =====------------------------------------------
# Description: Offset: 8b, Width: 2b, Number of pads used by instruction. Some instructions ignores this parameter.
# - 1PAD, (0): Single mode. One pad is used.
# - 2PAD, (1): Dual mode. Two pads are used.
# - 4PAD, (2): Quad mode. Four pads are used.
# - 8PAD, (3): Octal mode. Eight pads are used.
# Possible options: <1PAD, 2PAD, 4PAD, 8PAD>
NUM_PADS: 1PAD
# --------------------------------------===== OPERATION_CODE [Optional] =====---------------------------------------
# Description: Offset: 10b, Width: 6b, Instruction operation code.
# - STOP, (0): Stop execution and de-assert CS. Then, the next command sequence (to the same flash device) starts
# from instruction pointer 0.
# - CMD_SDR, (1): Transmit command code to Flash.
# - RADDR_SDR, (2): Transmit row address to Flash.
# - CADDR_SDR, (3): Transmit column address to Flash.
# - MODE1_SDR, (4): Transmit mode bits to Flash.
# - MODE2_SDR, (5): Transmit mode bits to Flash.
# - MODE4_SDR, (6): Transmit mode bits to Flash.
# - MODE8_SDR, (7): Transmit mode bits to Flash.
# - WRITE_SDR, (8): Transmit program data to Flash device.
# - READ_SDR, (9): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_SDR, (10): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_SDR, (11): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_SDR, (12): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_SDR, (13): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# - JMP_ON_CS, (31): Stop execution, de-assert CS and save operand[7:0] as the instruction start pointer for next
# sequence.Normally this instruction is used to support Execute-In-Place enhanced mode. See XIP enhanced mode for
# more details.This instruction is only allowed for AHB read commands. There is interrupt status bit set
# (INTR[IPCMDERR] or INTR[AHBCMDERR]) when using this instruction in IP command or AHB write command.
# - CMD_DDR, (33): Transmit command code to Flash.
# - RADDR_DDR, (34): Transmit row address to Flash.
# - CADDR_DDR, (35): Transmit column address to Flash.
# - MODE1_DDR, (36): Transmit mode bits to Flash.
# - MODE2_DDR, (37): Transmit mode bits to Flash.
# - MODE4_DDR, (38): Transmit mode bits to Flash.
# - MODE8_DDR, (39): Transmit mode bits to Flash.
# - WRITE_DDR, (40): Transmit program data to Flash device.
# - READ_DDR, (41): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_DDR, (42): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_DDR, (43): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_DDR, (44): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_DDR, (45): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# Possible options: <STOP, CMD_SDR, RADDR_SDR, CADDR_SDR, MODE1_SDR, MODE2_SDR, MODE4_SDR, MODE8_SDR, WRITE_SDR,
# READ_SDR, LEARN_SDR, DATSZ_SDR, DUMMY_SDR, DUMMY_RWDS_SDR, JMP_ON_CS, CMD_DDR, RADDR_DDR, CADDR_DDR, MODE1_DDR,
# MODE2_DDR, MODE4_DDR, MODE8_DDR, WRITE_DDR, READ_DDR, LEARN_DDR, DATSZ_DDR, DUMMY_DDR, DUMMY_RWDS_DDR>
OPERATION_CODE: STOP
lookupTable_seq5_instr1:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq5_instr2:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq5_instr3:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq5_instr4:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq5_instr5:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq5_instr6:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq5_instr7:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
# -----------------------------------===== lookupTable_seq6_instr0 [Optional] =====-----------------------------------
# Description: Offset: 0x000000E0, Width: 16b; Lookup table holds Flash command sequences 6, instruction 0
lookupTable_seq6_instr0:
# ------------------------------------------===== OPERAND [Optional] =====------------------------------------------
# Description: Offset: 0b, Width: 8b, Instruction operand. Its values depends on used instruction
OPERAND: 0
# -----------------------------------------===== NUM_PADS [Optional] =====------------------------------------------
# Description: Offset: 8b, Width: 2b, Number of pads used by instruction. Some instructions ignores this parameter.
# - 1PAD, (0): Single mode. One pad is used.
# - 2PAD, (1): Dual mode. Two pads are used.
# - 4PAD, (2): Quad mode. Four pads are used.
# - 8PAD, (3): Octal mode. Eight pads are used.
# Possible options: <1PAD, 2PAD, 4PAD, 8PAD>
NUM_PADS: 1PAD
# --------------------------------------===== OPERATION_CODE [Optional] =====---------------------------------------
# Description: Offset: 10b, Width: 6b, Instruction operation code.
# - STOP, (0): Stop execution and de-assert CS. Then, the next command sequence (to the same flash device) starts
# from instruction pointer 0.
# - CMD_SDR, (1): Transmit command code to Flash.
# - RADDR_SDR, (2): Transmit row address to Flash.
# - CADDR_SDR, (3): Transmit column address to Flash.
# - MODE1_SDR, (4): Transmit mode bits to Flash.
# - MODE2_SDR, (5): Transmit mode bits to Flash.
# - MODE4_SDR, (6): Transmit mode bits to Flash.
# - MODE8_SDR, (7): Transmit mode bits to Flash.
# - WRITE_SDR, (8): Transmit program data to Flash device.
# - READ_SDR, (9): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_SDR, (10): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_SDR, (11): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_SDR, (12): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_SDR, (13): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# - JMP_ON_CS, (31): Stop execution, de-assert CS and save operand[7:0] as the instruction start pointer for next
# sequence.Normally this instruction is used to support Execute-In-Place enhanced mode. See XIP enhanced mode for
# more details.This instruction is only allowed for AHB read commands. There is interrupt status bit set
# (INTR[IPCMDERR] or INTR[AHBCMDERR]) when using this instruction in IP command or AHB write command.
# - CMD_DDR, (33): Transmit command code to Flash.
# - RADDR_DDR, (34): Transmit row address to Flash.
# - CADDR_DDR, (35): Transmit column address to Flash.
# - MODE1_DDR, (36): Transmit mode bits to Flash.
# - MODE2_DDR, (37): Transmit mode bits to Flash.
# - MODE4_DDR, (38): Transmit mode bits to Flash.
# - MODE8_DDR, (39): Transmit mode bits to Flash.
# - WRITE_DDR, (40): Transmit program data to Flash device.
# - READ_DDR, (41): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_DDR, (42): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_DDR, (43): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_DDR, (44): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_DDR, (45): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# Possible options: <STOP, CMD_SDR, RADDR_SDR, CADDR_SDR, MODE1_SDR, MODE2_SDR, MODE4_SDR, MODE8_SDR, WRITE_SDR,
# READ_SDR, LEARN_SDR, DATSZ_SDR, DUMMY_SDR, DUMMY_RWDS_SDR, JMP_ON_CS, CMD_DDR, RADDR_DDR, CADDR_DDR, MODE1_DDR,
# MODE2_DDR, MODE4_DDR, MODE8_DDR, WRITE_DDR, READ_DDR, LEARN_DDR, DATSZ_DDR, DUMMY_DDR, DUMMY_RWDS_DDR>
OPERATION_CODE: STOP
lookupTable_seq6_instr1:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq6_instr2:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq6_instr3:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq6_instr4:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq6_instr5:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq6_instr6:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq6_instr7:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
# -----------------------------------===== lookupTable_seq7_instr0 [Optional] =====-----------------------------------
# Description: Offset: 0x000000F0, Width: 16b; Lookup table holds Flash command sequences 7, instruction 0
lookupTable_seq7_instr0:
# ------------------------------------------===== OPERAND [Optional] =====------------------------------------------
# Description: Offset: 0b, Width: 8b, Instruction operand. Its values depends on used instruction
OPERAND: 0
# -----------------------------------------===== NUM_PADS [Optional] =====------------------------------------------
# Description: Offset: 8b, Width: 2b, Number of pads used by instruction. Some instructions ignores this parameter.
# - 1PAD, (0): Single mode. One pad is used.
# - 2PAD, (1): Dual mode. Two pads are used.
# - 4PAD, (2): Quad mode. Four pads are used.
# - 8PAD, (3): Octal mode. Eight pads are used.
# Possible options: <1PAD, 2PAD, 4PAD, 8PAD>
NUM_PADS: 1PAD
# --------------------------------------===== OPERATION_CODE [Optional] =====---------------------------------------
# Description: Offset: 10b, Width: 6b, Instruction operation code.
# - STOP, (0): Stop execution and de-assert CS. Then, the next command sequence (to the same flash device) starts
# from instruction pointer 0.
# - CMD_SDR, (1): Transmit command code to Flash.
# - RADDR_SDR, (2): Transmit row address to Flash.
# - CADDR_SDR, (3): Transmit column address to Flash.
# - MODE1_SDR, (4): Transmit mode bits to Flash.
# - MODE2_SDR, (5): Transmit mode bits to Flash.
# - MODE4_SDR, (6): Transmit mode bits to Flash.
# - MODE8_SDR, (7): Transmit mode bits to Flash.
# - WRITE_SDR, (8): Transmit program data to Flash device.
# - READ_SDR, (9): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_SDR, (10): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_SDR, (11): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_SDR, (12): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_SDR, (13): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# - JMP_ON_CS, (31): Stop execution, de-assert CS and save operand[7:0] as the instruction start pointer for next
# sequence.Normally this instruction is used to support Execute-In-Place enhanced mode. See XIP enhanced mode for
# more details.This instruction is only allowed for AHB read commands. There is interrupt status bit set
# (INTR[IPCMDERR] or INTR[AHBCMDERR]) when using this instruction in IP command or AHB write command.
# - CMD_DDR, (33): Transmit command code to Flash.
# - RADDR_DDR, (34): Transmit row address to Flash.
# - CADDR_DDR, (35): Transmit column address to Flash.
# - MODE1_DDR, (36): Transmit mode bits to Flash.
# - MODE2_DDR, (37): Transmit mode bits to Flash.
# - MODE4_DDR, (38): Transmit mode bits to Flash.
# - MODE8_DDR, (39): Transmit mode bits to Flash.
# - WRITE_DDR, (40): Transmit program data to Flash device.
# - READ_DDR, (41): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_DDR, (42): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_DDR, (43): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_DDR, (44): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_DDR, (45): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# Possible options: <STOP, CMD_SDR, RADDR_SDR, CADDR_SDR, MODE1_SDR, MODE2_SDR, MODE4_SDR, MODE8_SDR, WRITE_SDR,
# READ_SDR, LEARN_SDR, DATSZ_SDR, DUMMY_SDR, DUMMY_RWDS_SDR, JMP_ON_CS, CMD_DDR, RADDR_DDR, CADDR_DDR, MODE1_DDR,
# MODE2_DDR, MODE4_DDR, MODE8_DDR, WRITE_DDR, READ_DDR, LEARN_DDR, DATSZ_DDR, DUMMY_DDR, DUMMY_RWDS_DDR>
OPERATION_CODE: STOP
lookupTable_seq7_instr1:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq7_instr2:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq7_instr3:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq7_instr4:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq7_instr5:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq7_instr6:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq7_instr7:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
# -----------------------------------===== lookupTable_seq8_instr0 [Optional] =====-----------------------------------
# Description: Offset: 0x00000100, Width: 16b; Lookup table holds Flash command sequences 8, instruction 0
lookupTable_seq8_instr0:
# ------------------------------------------===== OPERAND [Optional] =====------------------------------------------
# Description: Offset: 0b, Width: 8b, Instruction operand. Its values depends on used instruction
OPERAND: 0
# -----------------------------------------===== NUM_PADS [Optional] =====------------------------------------------
# Description: Offset: 8b, Width: 2b, Number of pads used by instruction. Some instructions ignores this parameter.
# - 1PAD, (0): Single mode. One pad is used.
# - 2PAD, (1): Dual mode. Two pads are used.
# - 4PAD, (2): Quad mode. Four pads are used.
# - 8PAD, (3): Octal mode. Eight pads are used.
# Possible options: <1PAD, 2PAD, 4PAD, 8PAD>
NUM_PADS: 1PAD
# --------------------------------------===== OPERATION_CODE [Optional] =====---------------------------------------
# Description: Offset: 10b, Width: 6b, Instruction operation code.
# - STOP, (0): Stop execution and de-assert CS. Then, the next command sequence (to the same flash device) starts
# from instruction pointer 0.
# - CMD_SDR, (1): Transmit command code to Flash.
# - RADDR_SDR, (2): Transmit row address to Flash.
# - CADDR_SDR, (3): Transmit column address to Flash.
# - MODE1_SDR, (4): Transmit mode bits to Flash.
# - MODE2_SDR, (5): Transmit mode bits to Flash.
# - MODE4_SDR, (6): Transmit mode bits to Flash.
# - MODE8_SDR, (7): Transmit mode bits to Flash.
# - WRITE_SDR, (8): Transmit program data to Flash device.
# - READ_SDR, (9): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_SDR, (10): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_SDR, (11): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_SDR, (12): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_SDR, (13): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# - JMP_ON_CS, (31): Stop execution, de-assert CS and save operand[7:0] as the instruction start pointer for next
# sequence.Normally this instruction is used to support Execute-In-Place enhanced mode. See XIP enhanced mode for
# more details.This instruction is only allowed for AHB read commands. There is interrupt status bit set
# (INTR[IPCMDERR] or INTR[AHBCMDERR]) when using this instruction in IP command or AHB write command.
# - CMD_DDR, (33): Transmit command code to Flash.
# - RADDR_DDR, (34): Transmit row address to Flash.
# - CADDR_DDR, (35): Transmit column address to Flash.
# - MODE1_DDR, (36): Transmit mode bits to Flash.
# - MODE2_DDR, (37): Transmit mode bits to Flash.
# - MODE4_DDR, (38): Transmit mode bits to Flash.
# - MODE8_DDR, (39): Transmit mode bits to Flash.
# - WRITE_DDR, (40): Transmit program data to Flash device.
# - READ_DDR, (41): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_DDR, (42): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_DDR, (43): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_DDR, (44): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_DDR, (45): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# Possible options: <STOP, CMD_SDR, RADDR_SDR, CADDR_SDR, MODE1_SDR, MODE2_SDR, MODE4_SDR, MODE8_SDR, WRITE_SDR,
# READ_SDR, LEARN_SDR, DATSZ_SDR, DUMMY_SDR, DUMMY_RWDS_SDR, JMP_ON_CS, CMD_DDR, RADDR_DDR, CADDR_DDR, MODE1_DDR,
# MODE2_DDR, MODE4_DDR, MODE8_DDR, WRITE_DDR, READ_DDR, LEARN_DDR, DATSZ_DDR, DUMMY_DDR, DUMMY_RWDS_DDR>
OPERATION_CODE: STOP
lookupTable_seq8_instr1:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq8_instr2:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq8_instr3:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq8_instr4:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq8_instr5:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq8_instr6:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq8_instr7:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
# -----------------------------------===== lookupTable_seq9_instr0 [Optional] =====-----------------------------------
# Description: Offset: 0x00000110, Width: 16b; Lookup table holds Flash command sequences 9, instruction 0
lookupTable_seq9_instr0:
# ------------------------------------------===== OPERAND [Optional] =====------------------------------------------
# Description: Offset: 0b, Width: 8b, Instruction operand. Its values depends on used instruction
OPERAND: 0
# -----------------------------------------===== NUM_PADS [Optional] =====------------------------------------------
# Description: Offset: 8b, Width: 2b, Number of pads used by instruction. Some instructions ignores this parameter.
# - 1PAD, (0): Single mode. One pad is used.
# - 2PAD, (1): Dual mode. Two pads are used.
# - 4PAD, (2): Quad mode. Four pads are used.
# - 8PAD, (3): Octal mode. Eight pads are used.
# Possible options: <1PAD, 2PAD, 4PAD, 8PAD>
NUM_PADS: 1PAD
# --------------------------------------===== OPERATION_CODE [Optional] =====---------------------------------------
# Description: Offset: 10b, Width: 6b, Instruction operation code.
# - STOP, (0): Stop execution and de-assert CS. Then, the next command sequence (to the same flash device) starts
# from instruction pointer 0.
# - CMD_SDR, (1): Transmit command code to Flash.
# - RADDR_SDR, (2): Transmit row address to Flash.
# - CADDR_SDR, (3): Transmit column address to Flash.
# - MODE1_SDR, (4): Transmit mode bits to Flash.
# - MODE2_SDR, (5): Transmit mode bits to Flash.
# - MODE4_SDR, (6): Transmit mode bits to Flash.
# - MODE8_SDR, (7): Transmit mode bits to Flash.
# - WRITE_SDR, (8): Transmit program data to Flash device.
# - READ_SDR, (9): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_SDR, (10): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_SDR, (11): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_SDR, (12): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_SDR, (13): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# - JMP_ON_CS, (31): Stop execution, de-assert CS and save operand[7:0] as the instruction start pointer for next
# sequence.Normally this instruction is used to support Execute-In-Place enhanced mode. See XIP enhanced mode for
# more details.This instruction is only allowed for AHB read commands. There is interrupt status bit set
# (INTR[IPCMDERR] or INTR[AHBCMDERR]) when using this instruction in IP command or AHB write command.
# - CMD_DDR, (33): Transmit command code to Flash.
# - RADDR_DDR, (34): Transmit row address to Flash.
# - CADDR_DDR, (35): Transmit column address to Flash.
# - MODE1_DDR, (36): Transmit mode bits to Flash.
# - MODE2_DDR, (37): Transmit mode bits to Flash.
# - MODE4_DDR, (38): Transmit mode bits to Flash.
# - MODE8_DDR, (39): Transmit mode bits to Flash.
# - WRITE_DDR, (40): Transmit program data to Flash device.
# - READ_DDR, (41): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_DDR, (42): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_DDR, (43): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_DDR, (44): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_DDR, (45): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# Possible options: <STOP, CMD_SDR, RADDR_SDR, CADDR_SDR, MODE1_SDR, MODE2_SDR, MODE4_SDR, MODE8_SDR, WRITE_SDR,
# READ_SDR, LEARN_SDR, DATSZ_SDR, DUMMY_SDR, DUMMY_RWDS_SDR, JMP_ON_CS, CMD_DDR, RADDR_DDR, CADDR_DDR, MODE1_DDR,
# MODE2_DDR, MODE4_DDR, MODE8_DDR, WRITE_DDR, READ_DDR, LEARN_DDR, DATSZ_DDR, DUMMY_DDR, DUMMY_RWDS_DDR>
OPERATION_CODE: STOP
lookupTable_seq9_instr1:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq9_instr2:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq9_instr3:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq9_instr4:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq9_instr5:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq9_instr6:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq9_instr7:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
# ----------------------------------===== lookupTable_seq10_instr0 [Optional] =====-----------------------------------
# Description: Offset: 0x00000120, Width: 16b; Lookup table holds Flash command sequences 10, instruction 0
lookupTable_seq10_instr0:
# ------------------------------------------===== OPERAND [Optional] =====------------------------------------------
# Description: Offset: 0b, Width: 8b, Instruction operand. Its values depends on used instruction
OPERAND: 0
# -----------------------------------------===== NUM_PADS [Optional] =====------------------------------------------
# Description: Offset: 8b, Width: 2b, Number of pads used by instruction. Some instructions ignores this parameter.
# - 1PAD, (0): Single mode. One pad is used.
# - 2PAD, (1): Dual mode. Two pads are used.
# - 4PAD, (2): Quad mode. Four pads are used.
# - 8PAD, (3): Octal mode. Eight pads are used.
# Possible options: <1PAD, 2PAD, 4PAD, 8PAD>
NUM_PADS: 1PAD
# --------------------------------------===== OPERATION_CODE [Optional] =====---------------------------------------
# Description: Offset: 10b, Width: 6b, Instruction operation code.
# - STOP, (0): Stop execution and de-assert CS. Then, the next command sequence (to the same flash device) starts
# from instruction pointer 0.
# - CMD_SDR, (1): Transmit command code to Flash.
# - RADDR_SDR, (2): Transmit row address to Flash.
# - CADDR_SDR, (3): Transmit column address to Flash.
# - MODE1_SDR, (4): Transmit mode bits to Flash.
# - MODE2_SDR, (5): Transmit mode bits to Flash.
# - MODE4_SDR, (6): Transmit mode bits to Flash.
# - MODE8_SDR, (7): Transmit mode bits to Flash.
# - WRITE_SDR, (8): Transmit program data to Flash device.
# - READ_SDR, (9): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_SDR, (10): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_SDR, (11): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_SDR, (12): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_SDR, (13): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# - JMP_ON_CS, (31): Stop execution, de-assert CS and save operand[7:0] as the instruction start pointer for next
# sequence.Normally this instruction is used to support Execute-In-Place enhanced mode. See XIP enhanced mode for
# more details.This instruction is only allowed for AHB read commands. There is interrupt status bit set
# (INTR[IPCMDERR] or INTR[AHBCMDERR]) when using this instruction in IP command or AHB write command.
# - CMD_DDR, (33): Transmit command code to Flash.
# - RADDR_DDR, (34): Transmit row address to Flash.
# - CADDR_DDR, (35): Transmit column address to Flash.
# - MODE1_DDR, (36): Transmit mode bits to Flash.
# - MODE2_DDR, (37): Transmit mode bits to Flash.
# - MODE4_DDR, (38): Transmit mode bits to Flash.
# - MODE8_DDR, (39): Transmit mode bits to Flash.
# - WRITE_DDR, (40): Transmit program data to Flash device.
# - READ_DDR, (41): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_DDR, (42): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_DDR, (43): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_DDR, (44): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_DDR, (45): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# Possible options: <STOP, CMD_SDR, RADDR_SDR, CADDR_SDR, MODE1_SDR, MODE2_SDR, MODE4_SDR, MODE8_SDR, WRITE_SDR,
# READ_SDR, LEARN_SDR, DATSZ_SDR, DUMMY_SDR, DUMMY_RWDS_SDR, JMP_ON_CS, CMD_DDR, RADDR_DDR, CADDR_DDR, MODE1_DDR,
# MODE2_DDR, MODE4_DDR, MODE8_DDR, WRITE_DDR, READ_DDR, LEARN_DDR, DATSZ_DDR, DUMMY_DDR, DUMMY_RWDS_DDR>
OPERATION_CODE: STOP
lookupTable_seq10_instr1:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq10_instr2:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq10_instr3:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq10_instr4:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq10_instr5:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq10_instr6:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq10_instr7:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
# ----------------------------------===== lookupTable_seq11_instr0 [Optional] =====-----------------------------------
# Description: Offset: 0x00000130, Width: 16b; Lookup table holds Flash command sequences 11, instruction 0
lookupTable_seq11_instr0:
# ------------------------------------------===== OPERAND [Optional] =====------------------------------------------
# Description: Offset: 0b, Width: 8b, Instruction operand. Its values depends on used instruction
OPERAND: 0
# -----------------------------------------===== NUM_PADS [Optional] =====------------------------------------------
# Description: Offset: 8b, Width: 2b, Number of pads used by instruction. Some instructions ignores this parameter.
# - 1PAD, (0): Single mode. One pad is used.
# - 2PAD, (1): Dual mode. Two pads are used.
# - 4PAD, (2): Quad mode. Four pads are used.
# - 8PAD, (3): Octal mode. Eight pads are used.
# Possible options: <1PAD, 2PAD, 4PAD, 8PAD>
NUM_PADS: 1PAD
# --------------------------------------===== OPERATION_CODE [Optional] =====---------------------------------------
# Description: Offset: 10b, Width: 6b, Instruction operation code.
# - STOP, (0): Stop execution and de-assert CS. Then, the next command sequence (to the same flash device) starts
# from instruction pointer 0.
# - CMD_SDR, (1): Transmit command code to Flash.
# - RADDR_SDR, (2): Transmit row address to Flash.
# - CADDR_SDR, (3): Transmit column address to Flash.
# - MODE1_SDR, (4): Transmit mode bits to Flash.
# - MODE2_SDR, (5): Transmit mode bits to Flash.
# - MODE4_SDR, (6): Transmit mode bits to Flash.
# - MODE8_SDR, (7): Transmit mode bits to Flash.
# - WRITE_SDR, (8): Transmit program data to Flash device.
# - READ_SDR, (9): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_SDR, (10): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_SDR, (11): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_SDR, (12): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_SDR, (13): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# - JMP_ON_CS, (31): Stop execution, de-assert CS and save operand[7:0] as the instruction start pointer for next
# sequence.Normally this instruction is used to support Execute-In-Place enhanced mode. See XIP enhanced mode for
# more details.This instruction is only allowed for AHB read commands. There is interrupt status bit set
# (INTR[IPCMDERR] or INTR[AHBCMDERR]) when using this instruction in IP command or AHB write command.
# - CMD_DDR, (33): Transmit command code to Flash.
# - RADDR_DDR, (34): Transmit row address to Flash.
# - CADDR_DDR, (35): Transmit column address to Flash.
# - MODE1_DDR, (36): Transmit mode bits to Flash.
# - MODE2_DDR, (37): Transmit mode bits to Flash.
# - MODE4_DDR, (38): Transmit mode bits to Flash.
# - MODE8_DDR, (39): Transmit mode bits to Flash.
# - WRITE_DDR, (40): Transmit program data to Flash device.
# - READ_DDR, (41): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_DDR, (42): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_DDR, (43): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_DDR, (44): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_DDR, (45): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# Possible options: <STOP, CMD_SDR, RADDR_SDR, CADDR_SDR, MODE1_SDR, MODE2_SDR, MODE4_SDR, MODE8_SDR, WRITE_SDR,
# READ_SDR, LEARN_SDR, DATSZ_SDR, DUMMY_SDR, DUMMY_RWDS_SDR, JMP_ON_CS, CMD_DDR, RADDR_DDR, CADDR_DDR, MODE1_DDR,
# MODE2_DDR, MODE4_DDR, MODE8_DDR, WRITE_DDR, READ_DDR, LEARN_DDR, DATSZ_DDR, DUMMY_DDR, DUMMY_RWDS_DDR>
OPERATION_CODE: STOP
lookupTable_seq11_instr1:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq11_instr2:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq11_instr3:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq11_instr4:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq11_instr5:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq11_instr6:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq11_instr7:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
# ----------------------------------===== lookupTable_seq12_instr0 [Optional] =====-----------------------------------
# Description: Offset: 0x00000140, Width: 16b; Lookup table holds Flash command sequences 12, instruction 0
lookupTable_seq12_instr0:
# ------------------------------------------===== OPERAND [Optional] =====------------------------------------------
# Description: Offset: 0b, Width: 8b, Instruction operand. Its values depends on used instruction
OPERAND: 0
# -----------------------------------------===== NUM_PADS [Optional] =====------------------------------------------
# Description: Offset: 8b, Width: 2b, Number of pads used by instruction. Some instructions ignores this parameter.
# - 1PAD, (0): Single mode. One pad is used.
# - 2PAD, (1): Dual mode. Two pads are used.
# - 4PAD, (2): Quad mode. Four pads are used.
# - 8PAD, (3): Octal mode. Eight pads are used.
# Possible options: <1PAD, 2PAD, 4PAD, 8PAD>
NUM_PADS: 1PAD
# --------------------------------------===== OPERATION_CODE [Optional] =====---------------------------------------
# Description: Offset: 10b, Width: 6b, Instruction operation code.
# - STOP, (0): Stop execution and de-assert CS. Then, the next command sequence (to the same flash device) starts
# from instruction pointer 0.
# - CMD_SDR, (1): Transmit command code to Flash.
# - RADDR_SDR, (2): Transmit row address to Flash.
# - CADDR_SDR, (3): Transmit column address to Flash.
# - MODE1_SDR, (4): Transmit mode bits to Flash.
# - MODE2_SDR, (5): Transmit mode bits to Flash.
# - MODE4_SDR, (6): Transmit mode bits to Flash.
# - MODE8_SDR, (7): Transmit mode bits to Flash.
# - WRITE_SDR, (8): Transmit program data to Flash device.
# - READ_SDR, (9): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_SDR, (10): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_SDR, (11): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_SDR, (12): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_SDR, (13): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# - JMP_ON_CS, (31): Stop execution, de-assert CS and save operand[7:0] as the instruction start pointer for next
# sequence.Normally this instruction is used to support Execute-In-Place enhanced mode. See XIP enhanced mode for
# more details.This instruction is only allowed for AHB read commands. There is interrupt status bit set
# (INTR[IPCMDERR] or INTR[AHBCMDERR]) when using this instruction in IP command or AHB write command.
# - CMD_DDR, (33): Transmit command code to Flash.
# - RADDR_DDR, (34): Transmit row address to Flash.
# - CADDR_DDR, (35): Transmit column address to Flash.
# - MODE1_DDR, (36): Transmit mode bits to Flash.
# - MODE2_DDR, (37): Transmit mode bits to Flash.
# - MODE4_DDR, (38): Transmit mode bits to Flash.
# - MODE8_DDR, (39): Transmit mode bits to Flash.
# - WRITE_DDR, (40): Transmit program data to Flash device.
# - READ_DDR, (41): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_DDR, (42): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_DDR, (43): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_DDR, (44): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_DDR, (45): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# Possible options: <STOP, CMD_SDR, RADDR_SDR, CADDR_SDR, MODE1_SDR, MODE2_SDR, MODE4_SDR, MODE8_SDR, WRITE_SDR,
# READ_SDR, LEARN_SDR, DATSZ_SDR, DUMMY_SDR, DUMMY_RWDS_SDR, JMP_ON_CS, CMD_DDR, RADDR_DDR, CADDR_DDR, MODE1_DDR,
# MODE2_DDR, MODE4_DDR, MODE8_DDR, WRITE_DDR, READ_DDR, LEARN_DDR, DATSZ_DDR, DUMMY_DDR, DUMMY_RWDS_DDR>
OPERATION_CODE: STOP
lookupTable_seq12_instr1:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq12_instr2:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq12_instr3:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq12_instr4:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq12_instr5:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq12_instr6:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq12_instr7:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
# ----------------------------------===== lookupTable_seq13_instr0 [Optional] =====-----------------------------------
# Description: Offset: 0x00000150, Width: 16b; Lookup table holds Flash command sequences 13, instruction 0
lookupTable_seq13_instr0:
# ------------------------------------------===== OPERAND [Optional] =====------------------------------------------
# Description: Offset: 0b, Width: 8b, Instruction operand. Its values depends on used instruction
OPERAND: 0
# -----------------------------------------===== NUM_PADS [Optional] =====------------------------------------------
# Description: Offset: 8b, Width: 2b, Number of pads used by instruction. Some instructions ignores this parameter.
# - 1PAD, (0): Single mode. One pad is used.
# - 2PAD, (1): Dual mode. Two pads are used.
# - 4PAD, (2): Quad mode. Four pads are used.
# - 8PAD, (3): Octal mode. Eight pads are used.
# Possible options: <1PAD, 2PAD, 4PAD, 8PAD>
NUM_PADS: 1PAD
# --------------------------------------===== OPERATION_CODE [Optional] =====---------------------------------------
# Description: Offset: 10b, Width: 6b, Instruction operation code.
# - STOP, (0): Stop execution and de-assert CS. Then, the next command sequence (to the same flash device) starts
# from instruction pointer 0.
# - CMD_SDR, (1): Transmit command code to Flash.
# - RADDR_SDR, (2): Transmit row address to Flash.
# - CADDR_SDR, (3): Transmit column address to Flash.
# - MODE1_SDR, (4): Transmit mode bits to Flash.
# - MODE2_SDR, (5): Transmit mode bits to Flash.
# - MODE4_SDR, (6): Transmit mode bits to Flash.
# - MODE8_SDR, (7): Transmit mode bits to Flash.
# - WRITE_SDR, (8): Transmit program data to Flash device.
# - READ_SDR, (9): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_SDR, (10): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_SDR, (11): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_SDR, (12): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_SDR, (13): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# - JMP_ON_CS, (31): Stop execution, de-assert CS and save operand[7:0] as the instruction start pointer for next
# sequence.Normally this instruction is used to support Execute-In-Place enhanced mode. See XIP enhanced mode for
# more details.This instruction is only allowed for AHB read commands. There is interrupt status bit set
# (INTR[IPCMDERR] or INTR[AHBCMDERR]) when using this instruction in IP command or AHB write command.
# - CMD_DDR, (33): Transmit command code to Flash.
# - RADDR_DDR, (34): Transmit row address to Flash.
# - CADDR_DDR, (35): Transmit column address to Flash.
# - MODE1_DDR, (36): Transmit mode bits to Flash.
# - MODE2_DDR, (37): Transmit mode bits to Flash.
# - MODE4_DDR, (38): Transmit mode bits to Flash.
# - MODE8_DDR, (39): Transmit mode bits to Flash.
# - WRITE_DDR, (40): Transmit program data to Flash device.
# - READ_DDR, (41): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_DDR, (42): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_DDR, (43): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_DDR, (44): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_DDR, (45): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# Possible options: <STOP, CMD_SDR, RADDR_SDR, CADDR_SDR, MODE1_SDR, MODE2_SDR, MODE4_SDR, MODE8_SDR, WRITE_SDR,
# READ_SDR, LEARN_SDR, DATSZ_SDR, DUMMY_SDR, DUMMY_RWDS_SDR, JMP_ON_CS, CMD_DDR, RADDR_DDR, CADDR_DDR, MODE1_DDR,
# MODE2_DDR, MODE4_DDR, MODE8_DDR, WRITE_DDR, READ_DDR, LEARN_DDR, DATSZ_DDR, DUMMY_DDR, DUMMY_RWDS_DDR>
OPERATION_CODE: STOP
lookupTable_seq13_instr1:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq13_instr2:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq13_instr3:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq13_instr4:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq13_instr5:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq13_instr6:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq13_instr7:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
# ----------------------------------===== lookupTable_seq14_instr0 [Optional] =====-----------------------------------
# Description: Offset: 0x00000160, Width: 16b; Lookup table holds Flash command sequences 14, instruction 0
lookupTable_seq14_instr0:
# ------------------------------------------===== OPERAND [Optional] =====------------------------------------------
# Description: Offset: 0b, Width: 8b, Instruction operand. Its values depends on used instruction
OPERAND: 0
# -----------------------------------------===== NUM_PADS [Optional] =====------------------------------------------
# Description: Offset: 8b, Width: 2b, Number of pads used by instruction. Some instructions ignores this parameter.
# - 1PAD, (0): Single mode. One pad is used.
# - 2PAD, (1): Dual mode. Two pads are used.
# - 4PAD, (2): Quad mode. Four pads are used.
# - 8PAD, (3): Octal mode. Eight pads are used.
# Possible options: <1PAD, 2PAD, 4PAD, 8PAD>
NUM_PADS: 1PAD
# --------------------------------------===== OPERATION_CODE [Optional] =====---------------------------------------
# Description: Offset: 10b, Width: 6b, Instruction operation code.
# - STOP, (0): Stop execution and de-assert CS. Then, the next command sequence (to the same flash device) starts
# from instruction pointer 0.
# - CMD_SDR, (1): Transmit command code to Flash.
# - RADDR_SDR, (2): Transmit row address to Flash.
# - CADDR_SDR, (3): Transmit column address to Flash.
# - MODE1_SDR, (4): Transmit mode bits to Flash.
# - MODE2_SDR, (5): Transmit mode bits to Flash.
# - MODE4_SDR, (6): Transmit mode bits to Flash.
# - MODE8_SDR, (7): Transmit mode bits to Flash.
# - WRITE_SDR, (8): Transmit program data to Flash device.
# - READ_SDR, (9): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_SDR, (10): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_SDR, (11): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_SDR, (12): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_SDR, (13): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# - JMP_ON_CS, (31): Stop execution, de-assert CS and save operand[7:0] as the instruction start pointer for next
# sequence.Normally this instruction is used to support Execute-In-Place enhanced mode. See XIP enhanced mode for
# more details.This instruction is only allowed for AHB read commands. There is interrupt status bit set
# (INTR[IPCMDERR] or INTR[AHBCMDERR]) when using this instruction in IP command or AHB write command.
# - CMD_DDR, (33): Transmit command code to Flash.
# - RADDR_DDR, (34): Transmit row address to Flash.
# - CADDR_DDR, (35): Transmit column address to Flash.
# - MODE1_DDR, (36): Transmit mode bits to Flash.
# - MODE2_DDR, (37): Transmit mode bits to Flash.
# - MODE4_DDR, (38): Transmit mode bits to Flash.
# - MODE8_DDR, (39): Transmit mode bits to Flash.
# - WRITE_DDR, (40): Transmit program data to Flash device.
# - READ_DDR, (41): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_DDR, (42): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_DDR, (43): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_DDR, (44): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_DDR, (45): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# Possible options: <STOP, CMD_SDR, RADDR_SDR, CADDR_SDR, MODE1_SDR, MODE2_SDR, MODE4_SDR, MODE8_SDR, WRITE_SDR,
# READ_SDR, LEARN_SDR, DATSZ_SDR, DUMMY_SDR, DUMMY_RWDS_SDR, JMP_ON_CS, CMD_DDR, RADDR_DDR, CADDR_DDR, MODE1_DDR,
# MODE2_DDR, MODE4_DDR, MODE8_DDR, WRITE_DDR, READ_DDR, LEARN_DDR, DATSZ_DDR, DUMMY_DDR, DUMMY_RWDS_DDR>
OPERATION_CODE: STOP
lookupTable_seq14_instr1:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq14_instr2:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq14_instr3:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq14_instr4:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq14_instr5:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq14_instr6:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq14_instr7:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
# ----------------------------------===== lookupTable_seq15_instr0 [Optional] =====-----------------------------------
# Description: Offset: 0x00000170, Width: 16b; Lookup table holds Flash command sequences 15, instruction 0
lookupTable_seq15_instr0:
# ------------------------------------------===== OPERAND [Optional] =====------------------------------------------
# Description: Offset: 0b, Width: 8b, Instruction operand. Its values depends on used instruction
OPERAND: 0
# -----------------------------------------===== NUM_PADS [Optional] =====------------------------------------------
# Description: Offset: 8b, Width: 2b, Number of pads used by instruction. Some instructions ignores this parameter.
# - 1PAD, (0): Single mode. One pad is used.
# - 2PAD, (1): Dual mode. Two pads are used.
# - 4PAD, (2): Quad mode. Four pads are used.
# - 8PAD, (3): Octal mode. Eight pads are used.
# Possible options: <1PAD, 2PAD, 4PAD, 8PAD>
NUM_PADS: 1PAD
# --------------------------------------===== OPERATION_CODE [Optional] =====---------------------------------------
# Description: Offset: 10b, Width: 6b, Instruction operation code.
# - STOP, (0): Stop execution and de-assert CS. Then, the next command sequence (to the same flash device) starts
# from instruction pointer 0.
# - CMD_SDR, (1): Transmit command code to Flash.
# - RADDR_SDR, (2): Transmit row address to Flash.
# - CADDR_SDR, (3): Transmit column address to Flash.
# - MODE1_SDR, (4): Transmit mode bits to Flash.
# - MODE2_SDR, (5): Transmit mode bits to Flash.
# - MODE4_SDR, (6): Transmit mode bits to Flash.
# - MODE8_SDR, (7): Transmit mode bits to Flash.
# - WRITE_SDR, (8): Transmit program data to Flash device.
# - READ_SDR, (9): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_SDR, (10): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_SDR, (11): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_SDR, (12): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_SDR, (13): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# - JMP_ON_CS, (31): Stop execution, de-assert CS and save operand[7:0] as the instruction start pointer for next
# sequence.Normally this instruction is used to support Execute-In-Place enhanced mode. See XIP enhanced mode for
# more details.This instruction is only allowed for AHB read commands. There is interrupt status bit set
# (INTR[IPCMDERR] or INTR[AHBCMDERR]) when using this instruction in IP command or AHB write command.
# - CMD_DDR, (33): Transmit command code to Flash.
# - RADDR_DDR, (34): Transmit row address to Flash.
# - CADDR_DDR, (35): Transmit column address to Flash.
# - MODE1_DDR, (36): Transmit mode bits to Flash.
# - MODE2_DDR, (37): Transmit mode bits to Flash.
# - MODE4_DDR, (38): Transmit mode bits to Flash.
# - MODE8_DDR, (39): Transmit mode bits to Flash.
# - WRITE_DDR, (40): Transmit program data to Flash device.
# - READ_DDR, (41): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_DDR, (42): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_DDR, (43): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_DDR, (44): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_DDR, (45): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# Possible options: <STOP, CMD_SDR, RADDR_SDR, CADDR_SDR, MODE1_SDR, MODE2_SDR, MODE4_SDR, MODE8_SDR, WRITE_SDR,
# READ_SDR, LEARN_SDR, DATSZ_SDR, DUMMY_SDR, DUMMY_RWDS_SDR, JMP_ON_CS, CMD_DDR, RADDR_DDR, CADDR_DDR, MODE1_DDR,
# MODE2_DDR, MODE4_DDR, MODE8_DDR, WRITE_DDR, READ_DDR, LEARN_DDR, DATSZ_DDR, DUMMY_DDR, DUMMY_RWDS_DDR>
OPERATION_CODE: STOP
lookupTable_seq15_instr1:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq15_instr2:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq15_instr3:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq15_instr4:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq15_instr5:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq15_instr6:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq15_instr7:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
# ---------------------------------------===== lutCustomSeq_0 [Optional] =====----------------------------------------
# Description: Offset: 0x00000180, Width: 32b; [0x180-0x1af] Customizable LUT Sequences
lutCustomSeq_0:
# ------------------------------------------===== seqNum [Optional] =====-------------------------------------------
# Description: Offset: 0b, Width: 8b, Sequence Number, valid number: 1-16
seqNum: 0
# -------------------------------------------===== seqId [Optional] =====-------------------------------------------
# Description: Offset: 8b, Width: 8b, Sequence Index, valid number: 0-15
seqId: 0
# -----------------------------------------===== reserved [Optional] =====------------------------------------------
# Description: Offset: 16b, Width: 16b, N/A
reserved: 0
# ---------------------------------------===== lutCustomSeq_1 [Optional] =====----------------------------------------
# Description: Offset: 0x00000184, Width: 32b; [0x180-0x1af] Customizable LUT Sequences
lutCustomSeq_1:
# ------------------------------------------===== seqNum [Optional] =====-------------------------------------------
# Description: Offset: 0b, Width: 8b, Sequence Number, valid number: 1-16
seqNum: 0
# -------------------------------------------===== seqId [Optional] =====-------------------------------------------
# Description: Offset: 8b, Width: 8b, Sequence Index, valid number: 0-15
seqId: 0
# -----------------------------------------===== reserved [Optional] =====------------------------------------------
# Description: Offset: 16b, Width: 16b, N/A
reserved: 0
# ---------------------------------------===== lutCustomSeq_2 [Optional] =====----------------------------------------
# Description: Offset: 0x00000188, Width: 32b; [0x180-0x1af] Customizable LUT Sequences
lutCustomSeq_2:
# ------------------------------------------===== seqNum [Optional] =====-------------------------------------------
# Description: Offset: 0b, Width: 8b, Sequence Number, valid number: 1-16
seqNum: 0
# -------------------------------------------===== seqId [Optional] =====-------------------------------------------
# Description: Offset: 8b, Width: 8b, Sequence Index, valid number: 0-15
seqId: 0
# -----------------------------------------===== reserved [Optional] =====------------------------------------------
# Description: Offset: 16b, Width: 16b, N/A
reserved: 0
# ---------------------------------------===== lutCustomSeq_3 [Optional] =====----------------------------------------
# Description: Offset: 0x0000018C, Width: 32b; [0x180-0x1af] Customizable LUT Sequences
lutCustomSeq_3:
# ------------------------------------------===== seqNum [Optional] =====-------------------------------------------
# Description: Offset: 0b, Width: 8b, Sequence Number, valid number: 1-16
seqNum: 0
# -------------------------------------------===== seqId [Optional] =====-------------------------------------------
# Description: Offset: 8b, Width: 8b, Sequence Index, valid number: 0-15
seqId: 0
# -----------------------------------------===== reserved [Optional] =====------------------------------------------
# Description: Offset: 16b, Width: 16b, N/A
reserved: 0
# ---------------------------------------===== lutCustomSeq_4 [Optional] =====----------------------------------------
# Description: Offset: 0x00000190, Width: 32b; [0x180-0x1af] Customizable LUT Sequences
lutCustomSeq_4:
# ------------------------------------------===== seqNum [Optional] =====-------------------------------------------
# Description: Offset: 0b, Width: 8b, Sequence Number, valid number: 1-16
seqNum: 0
# -------------------------------------------===== seqId [Optional] =====-------------------------------------------
# Description: Offset: 8b, Width: 8b, Sequence Index, valid number: 0-15
seqId: 0
# -----------------------------------------===== reserved [Optional] =====------------------------------------------
# Description: Offset: 16b, Width: 16b, N/A
reserved: 0
# ---------------------------------------===== lutCustomSeq_5 [Optional] =====----------------------------------------
# Description: Offset: 0x00000194, Width: 32b; [0x180-0x1af] Customizable LUT Sequences
lutCustomSeq_5:
# ------------------------------------------===== seqNum [Optional] =====-------------------------------------------
# Description: Offset: 0b, Width: 8b, Sequence Number, valid number: 1-16
seqNum: 0
# -------------------------------------------===== seqId [Optional] =====-------------------------------------------
# Description: Offset: 8b, Width: 8b, Sequence Index, valid number: 0-15
seqId: 0
# -----------------------------------------===== reserved [Optional] =====------------------------------------------
# Description: Offset: 16b, Width: 16b, N/A
reserved: 0
# ---------------------------------------===== lutCustomSeq_6 [Optional] =====----------------------------------------
# Description: Offset: 0x00000198, Width: 32b; [0x180-0x1af] Customizable LUT Sequences
lutCustomSeq_6:
# ------------------------------------------===== seqNum [Optional] =====-------------------------------------------
# Description: Offset: 0b, Width: 8b, Sequence Number, valid number: 1-16
seqNum: 0
# -------------------------------------------===== seqId [Optional] =====-------------------------------------------
# Description: Offset: 8b, Width: 8b, Sequence Index, valid number: 0-15
seqId: 0
# -----------------------------------------===== reserved [Optional] =====------------------------------------------
# Description: Offset: 16b, Width: 16b, N/A
reserved: 0
# ---------------------------------------===== lutCustomSeq_7 [Optional] =====----------------------------------------
# Description: Offset: 0x0000019C, Width: 32b; [0x180-0x1af] Customizable LUT Sequences
lutCustomSeq_7:
# ------------------------------------------===== seqNum [Optional] =====-------------------------------------------
# Description: Offset: 0b, Width: 8b, Sequence Number, valid number: 1-16
seqNum: 0
# -------------------------------------------===== seqId [Optional] =====-------------------------------------------
# Description: Offset: 8b, Width: 8b, Sequence Index, valid number: 0-15
seqId: 0
# -----------------------------------------===== reserved [Optional] =====------------------------------------------
# Description: Offset: 16b, Width: 16b, N/A
reserved: 0
# ---------------------------------------===== lutCustomSeq_8 [Optional] =====----------------------------------------
# Description: Offset: 0x000001A0, Width: 32b; [0x180-0x1af] Customizable LUT Sequences
lutCustomSeq_8:
# ------------------------------------------===== seqNum [Optional] =====-------------------------------------------
# Description: Offset: 0b, Width: 8b, Sequence Number, valid number: 1-16
seqNum: 0
# -------------------------------------------===== seqId [Optional] =====-------------------------------------------
# Description: Offset: 8b, Width: 8b, Sequence Index, valid number: 0-15
seqId: 0
# -----------------------------------------===== reserved [Optional] =====------------------------------------------
# Description: Offset: 16b, Width: 16b, N/A
reserved: 0
# ---------------------------------------===== lutCustomSeq_9 [Optional] =====----------------------------------------
# Description: Offset: 0x000001A4, Width: 32b; [0x180-0x1af] Customizable LUT Sequences
lutCustomSeq_9:
# ------------------------------------------===== seqNum [Optional] =====-------------------------------------------
# Description: Offset: 0b, Width: 8b, Sequence Number, valid number: 1-16
seqNum: 0
# -------------------------------------------===== seqId [Optional] =====-------------------------------------------
# Description: Offset: 8b, Width: 8b, Sequence Index, valid number: 0-15
seqId: 0
# -----------------------------------------===== reserved [Optional] =====------------------------------------------
# Description: Offset: 16b, Width: 16b, N/A
reserved: 0
# ---------------------------------------===== lutCustomSeq_10 [Optional] =====---------------------------------------
# Description: Offset: 0x000001A8, Width: 32b; [0x180-0x1af] Customizable LUT Sequences
lutCustomSeq_10:
# ------------------------------------------===== seqNum [Optional] =====-------------------------------------------
# Description: Offset: 0b, Width: 8b, Sequence Number, valid number: 1-16
seqNum: 0
# -------------------------------------------===== seqId [Optional] =====-------------------------------------------
# Description: Offset: 8b, Width: 8b, Sequence Index, valid number: 0-15
seqId: 0
# -----------------------------------------===== reserved [Optional] =====------------------------------------------
# Description: Offset: 16b, Width: 16b, N/A
reserved: 0
# ---------------------------------------===== lutCustomSeq_11 [Optional] =====---------------------------------------
# Description: Offset: 0x000001AC, Width: 32b; [0x180-0x1af] Customizable LUT Sequences
lutCustomSeq_11:
# ------------------------------------------===== seqNum [Optional] =====-------------------------------------------
# Description: Offset: 0b, Width: 8b, Sequence Number, valid number: 1-16
seqNum: 0
# -------------------------------------------===== seqId [Optional] =====-------------------------------------------
# Description: Offset: 8b, Width: 8b, Sequence Index, valid number: 0-15
seqId: 0
# -----------------------------------------===== reserved [Optional] =====------------------------------------------
# Description: Offset: 16b, Width: 16b, N/A
reserved: 0
# -----------------------------------------===== reserved4_0 [Optional] =====-----------------------------------------
# Description: Offset: 0x000001B0, Width: 32b; [0x1b0-0x1bf] Reserved for future use
reserved4_0: '0x00000000'
# -----------------------------------------===== reserved4_1 [Optional] =====-----------------------------------------
# Description: Offset: 0x000001B4, Width: 32b; [0x1b0-0x1bf] Reserved for future use
reserved4_1: '0x00000000'
# -----------------------------------------===== reserved4_2 [Optional] =====-----------------------------------------
# Description: Offset: 0x000001B8, Width: 32b; [0x1b0-0x1bf] Reserved for future use
reserved4_2: '0x00000000'
# -----------------------------------------===== reserved4_3 [Optional] =====-----------------------------------------
# Description: Offset: 0x000001BC, Width: 32b; [0x1b0-0x1bf] Reserved for future use
reserved4_3: '0x00000000'
# ------------------------------------------===== pageSize [Optional] =====-------------------------------------------
# Description: Offset: 0x000001C0, Width: 32b; Page size of Serial NOR
pageSize: '0x00000000'
# -----------------------------------------===== sectorSize [Optional] =====------------------------------------------
# Description: Offset: 0x000001C4, Width: 32b; Sector size of Serial NOR
sectorSize: '0x00000000'
# -------------------------------------===== ipcmdSerialClkFreq [Optional] =====--------------------------------------
# Description: Offset: 0x000001C8, Width: 8b; Clock frequency for IP command
ipcmdSerialClkFreq: '0x00'
# -------------------------------------===== isUniformBlockSize [Optional] =====--------------------------------------
# Description: Offset: 0x000001C9, Width: 8b; Sector/Block size is the same
isUniformBlockSize: '0x00'
# -----------------------------------------===== reserved0_0 [Optional] =====-----------------------------------------
# Description: Offset: 0x000001CA, Width: 8b; Reserved for future use
reserved0_0: '0x00'
# -----------------------------------------===== reserved0_1 [Optional] =====-----------------------------------------
# Description: Offset: 0x000001CB, Width: 8b; Reserved for future use
reserved0_1: '0x00'
# ----------------------------------------===== serialNorType [Optional] =====----------------------------------------
# Description: Offset: 0x000001CC, Width: 8b; Serial NOR Flash type: 0/1/2/3
serialNorType: '0x00'
# --------------------------------------===== needExitNoCmdMode [Optional] =====--------------------------------------
# Description: Offset: 0x000001CD, Width: 8b; Need to exit NoCmd mode before other IP command
needExitNoCmdMode: '0x00'
# ------------------------------------===== halfClkForNonReadCmd [Optional] =====-------------------------------------
# Description: Offset: 0x000001CE, Width: 8b; Half the Serial Clock for non-read command: true/false
halfClkForNonReadCmd: '0x00'
# ------------------------------------===== needRestoreNoCmdMode [Optional] =====-------------------------------------
# Description: Offset: 0x000001CF, Width: 8b; Need to Restore NoCmd mode after IP command execution
needRestoreNoCmdMode: '0x00'
# ------------------------------------------===== blockSize [Optional] =====------------------------------------------
# Description: Offset: 0x000001D0, Width: 32b; Block size
blockSize: '0x00000000'
# -----------------------------------------===== reserve2_0 [Optional] =====------------------------------------------
# Description: Offset: 0x000001D4, Width: 32b; Reserved for future use
reserve2_0: '0x00000000'
# -----------------------------------------===== reserve2_1 [Optional] =====------------------------------------------
# Description: Offset: 0x000001D8, Width: 32b; Reserved for future use
reserve2_1: '0x00000000'
# -----------------------------------------===== reserve2_2 [Optional] =====------------------------------------------
# Description: Offset: 0x000001DC, Width: 32b; Reserved for future use
reserve2_2: '0x00000000'
# -----------------------------------------===== reserve2_3 [Optional] =====------------------------------------------
# Description: Offset: 0x000001E0, Width: 32b; Reserved for future use
reserve2_3: '0x00000000'
# -----------------------------------------===== reserve2_4 [Optional] =====------------------------------------------
# Description: Offset: 0x000001E4, Width: 32b; Reserved for future use
reserve2_4: '0x00000000'
# -----------------------------------------===== reserve2_5 [Optional] =====------------------------------------------
# Description: Offset: 0x000001E8, Width: 32b; Reserved for future use
reserve2_5: '0x00000000'
# -----------------------------------------===== reserve2_6 [Optional] =====------------------------------------------
# Description: Offset: 0x000001EC, Width: 32b; Reserved for future use
reserve2_6: '0x00000000'
# -----------------------------------------===== reserve2_7 [Optional] =====------------------------------------------
# Description: Offset: 0x000001F0, Width: 32b; Reserved for future use
reserve2_7: '0x00000000'
# -----------------------------------------===== reserve2_8 [Optional] =====------------------------------------------
# Description: Offset: 0x000001F4, Width: 32b; Reserved for future use
reserve2_8: '0x00000000'
# -----------------------------------------===== reserve2_9 [Optional] =====------------------------------------------
# Description: Offset: 0x000001F8, Width: 32b; Reserved for future use
reserve2_9: '0x00000000'
# -----------------------------------------===== reserve2_10 [Optional] =====-----------------------------------------
# Description: Offset: 0x000001FC, Width: 32b; Reserved for future use
reserve2_10: '0x00000000'
FCB for mimxrt1173, Revision: a0 and flexspi_nor#
FCB for mimxrt1173, Revision: a0 and flexspi_nor JSON schema
FCB for mimxrt1173, Revision: a0 and flexspi_nor YAML configuration template
# ================================= FCB for mimxrt1173, Revision: a0 and flexspi_nor =================================
# ======================================================================================================================
# == FCB for mimxrt1173, Revision: a0 and flexspi_nor ==
# ======================================================================================================================
# -------------------------------------===== The chip family name [Required] =====--------------------------------------
# Description: NXP chip family identifier.
family: CHOOSE_FROM_TABLE
# -----------------------------------------===== MCU revision [Optional] =====------------------------------------------
# Description: Revision of silicon. The 'latest' name, means most current revision.
# Possible options: <a0, latest>
revision: a0
# ------------------------------------------===== Memory type [Required] =====------------------------------------------
# Description: Specify type of memory used by FCB description.
# Possible options: <flexspi_nor>
type: flexspi_nor
# ------------------------------------------===== mimxrt1173 [Required] =====-------------------------------------------
fcb_settings:
# ---------------------------------------------===== tag [Optional] =====---------------------------------------------
# Description: Offset: 0x00000000, Width: 32b; [0x000-0x003] Tag, fixed value 0x42464346UL
tag: '0x42464346'
# -------------------------------------------===== version [Optional] =====-------------------------------------------
# Description: Offset: 0x00000004, Width: 32b; [0x004-0x007] Version,[31:24] -'V', [23:16] - Major, [15:8] - Minor,
# [7:0] - bugfix
version: '0x56010400'
# ------------------------------------------===== reserved0 [Optional] =====------------------------------------------
# Description: Offset: 0x00000008, Width: 32b; [0x008-0x00b] Reserved for future use
reserved0: '0x00000000'
# --------------------------------------===== readSampleClkSrc [Optional] =====---------------------------------------
# Description: Offset: 0x0000000C, Width: 8b; [0x00c-0x00c] Read Sample Clock Source, valid value: 0/1/3
readSampleClkSrc: '0x00'
# -----------------------------------------===== csHoldTime [Optional] =====------------------------------------------
# Description: Offset: 0x0000000D, Width: 8b; [0x00d-0x00d] CS hold time, default value: 3
csHoldTime: '0x00'
# -----------------------------------------===== csSetupTime [Optional] =====-----------------------------------------
# Description: Offset: 0x0000000E, Width: 8b; [0x00e-0x00e] CS setup time, default value: 3
csSetupTime: '0x00'
# -------------------------------------===== columnAddressWidth [Optional] =====--------------------------------------
# Description: Offset: 0x0000000F, Width: 8b; [0x00f-0x00f] Column Address with, for HyperBus protocol, it is fixed
# to 3, For Serial NAND, need to refer to datasheet
columnAddressWidth: '0x00'
# -------------------------------------===== deviceModeCfgEnable [Optional] =====-------------------------------------
# Description: Offset: 0x00000010, Width: 8b; [0x010-0x010] Device Mode Configure enable flag, 1 - Enable, 0 -
# Disable
deviceModeCfgEnable: '0x00'
# ---------------------------------------===== deviceModeType [Optional] =====----------------------------------------
# Description: Offset: 0x00000011, Width: 8b; [0x011-0x011] Specify the configuration command type:Quad Enable,
# DPI/QPI/OPI switch, Generic configuration, etc.
deviceModeType: '0x00'
# -------------------------------------===== waitTimeCfgCommands [Optional] =====-------------------------------------
# Description: Offset: 0x00000012, Width: 16b; [0x012-0x013] Wait time for all configuration commands, unit: 100us,
# Used for DPI/QPI/OPI switch or reset command
waitTimeCfgCommands: '0x0000'
# ----------------------------------------===== deviceModeSeq [Optional] =====----------------------------------------
# Description: Offset: 0x00000014, Width: 32b; [0x014-0x017] Device mode sequence info, [7:0] - LUT sequence id,
# [15:8] - LUt sequence number, [31:16] Reserved
deviceModeSeq:
# ------------------------------------------===== seqNum [Optional] =====-------------------------------------------
# Description: Offset: 0b, Width: 8b, Sequence Number, valid number: 1-16
seqNum: 0
# -------------------------------------------===== seqId [Optional] =====-------------------------------------------
# Description: Offset: 8b, Width: 8b, Sequence Index, valid number: 0-15
seqId: 0
# -----------------------------------------===== reserved [Optional] =====------------------------------------------
# Description: Offset: 16b, Width: 16b, N/A
reserved: 0
# ----------------------------------------===== deviceModeArg [Optional] =====----------------------------------------
# Description: Offset: 0x00000018, Width: 32b; [0x018-0x01b] Argument/Parameter for device configuration
deviceModeArg: '0x00000000'
# ---------------------------------------===== configCmdEnable [Optional] =====---------------------------------------
# Description: Offset: 0x0000001C, Width: 8b; [0x01c-0x01c] Configure command Enable Flag, 1 - Enable, 0 - Disable
configCmdEnable: '0x00'
# --------------------------------------===== configModeType_0 [Optional] =====---------------------------------------
# Description: Offset: 0x0000001D, Width: 8b; [0x01d-0x01f] Configure Mode Type, similar as deviceModeTpe
configModeType_0: '0x00'
# --------------------------------------===== configModeType_1 [Optional] =====---------------------------------------
# Description: Offset: 0x0000001E, Width: 8b; [0x01d-0x01f] Configure Mode Type, similar as deviceModeTpe
configModeType_1: '0x00'
# --------------------------------------===== configModeType_2 [Optional] =====---------------------------------------
# Description: Offset: 0x0000001F, Width: 8b; [0x01d-0x01f] Configure Mode Type, similar as deviceModeTpe
configModeType_2: '0x00'
# ---------------------------------------===== configCmdSeqs_0 [Optional] =====---------------------------------------
# Description: Offset: 0x00000020, Width: 32b; [0x020-0x02b] Sequence info for Device Configuration command, similar
# as deviceModeSeq
configCmdSeqs_0:
# ------------------------------------------===== seqNum [Optional] =====-------------------------------------------
# Description: Offset: 0b, Width: 8b, Sequence Number, valid number: 1-16
seqNum: 0
# -------------------------------------------===== seqId [Optional] =====-------------------------------------------
# Description: Offset: 8b, Width: 8b, Sequence Index, valid number: 0-15
seqId: 0
# -----------------------------------------===== reserved [Optional] =====------------------------------------------
# Description: Offset: 16b, Width: 16b, N/A
reserved: 0
# ---------------------------------------===== configCmdSeqs_1 [Optional] =====---------------------------------------
# Description: Offset: 0x00000024, Width: 32b; [0x020-0x02b] Sequence info for Device Configuration command, similar
# as deviceModeSeq
configCmdSeqs_1:
# ------------------------------------------===== seqNum [Optional] =====-------------------------------------------
# Description: Offset: 0b, Width: 8b, Sequence Number, valid number: 1-16
seqNum: 0
# -------------------------------------------===== seqId [Optional] =====-------------------------------------------
# Description: Offset: 8b, Width: 8b, Sequence Index, valid number: 0-15
seqId: 0
# -----------------------------------------===== reserved [Optional] =====------------------------------------------
# Description: Offset: 16b, Width: 16b, N/A
reserved: 0
# ---------------------------------------===== configCmdSeqs_2 [Optional] =====---------------------------------------
# Description: Offset: 0x00000028, Width: 32b; [0x020-0x02b] Sequence info for Device Configuration command, similar
# as deviceModeSeq
configCmdSeqs_2:
# ------------------------------------------===== seqNum [Optional] =====-------------------------------------------
# Description: Offset: 0b, Width: 8b, Sequence Number, valid number: 1-16
seqNum: 0
# -------------------------------------------===== seqId [Optional] =====-------------------------------------------
# Description: Offset: 8b, Width: 8b, Sequence Index, valid number: 0-15
seqId: 0
# -----------------------------------------===== reserved [Optional] =====------------------------------------------
# Description: Offset: 16b, Width: 16b, N/A
reserved: 0
# ------------------------------------------===== reserved1 [Optional] =====------------------------------------------
# Description: Offset: 0x0000002C, Width: 32b; [0x02c-0x02f] Reserved for future use
reserved1: '0x00000000'
# ---------------------------------------===== configCmdArgs_0 [Optional] =====---------------------------------------
# Description: Offset: 0x00000030, Width: 32b; [0x030-0x03b] Arguments/Parameters for device Configuration commands
configCmdArgs_0: '0x00000000'
# ---------------------------------------===== configCmdArgs_1 [Optional] =====---------------------------------------
# Description: Offset: 0x00000034, Width: 32b; [0x030-0x03b] Arguments/Parameters for device Configuration commands
configCmdArgs_1: '0x00000000'
# ---------------------------------------===== configCmdArgs_2 [Optional] =====---------------------------------------
# Description: Offset: 0x00000038, Width: 32b; [0x030-0x03b] Arguments/Parameters for device Configuration commands
configCmdArgs_2: '0x00000000'
# ------------------------------------------===== reserved2 [Optional] =====------------------------------------------
# Description: Offset: 0x0000003C, Width: 32b; [0x03c-0x03f] Reserved for future use
reserved2: '0x00000000'
# ------------------------------------===== controllerMiscOption [Optional] =====-------------------------------------
# Description: Offset: 0x00000040, Width: 32b; [0x040-0x043] Controller Misc Options, see Misc feature bit
# definitions for more details
controllerMiscOption: '0x00000000'
# -----------------------------------------===== deviceType [Optional] =====------------------------------------------
# Description: Offset: 0x00000044, Width: 8b; [0x044-0x044] Device Type: See Flash Type Definition for more details
deviceType: '0x00'
# ----------------------------------------===== sflashPadType [Optional] =====----------------------------------------
# Description: Offset: 0x00000045, Width: 8b; [0x045-0x045] Serial Flash Pad Type: 1 - Single, 2 - Dual, 4 - Quad, 8
# - Octal
sflashPadType: '0x00'
# ----------------------------------------===== serialClkFreq [Optional] =====----------------------------------------
# Description: Offset: 0x00000046, Width: 8b; [0x046-0x046] Serial Flash Frequency, device specific definitions, See
# System Boot Chapter for more details
serialClkFreq: '0x00'
# -------------------------------------===== lutCustomSeqEnable [Optional] =====--------------------------------------
# Description: Offset: 0x00000047, Width: 8b; [0x047-0x047] LUT customization Enable, it is required if the
# program/erase cannot be done using 1 LUT sequence, currently, only applicable to HyperFLASH
lutCustomSeqEnable: '0x00'
# -----------------------------------------===== reserved3_0 [Optional] =====-----------------------------------------
# Description: Offset: 0x00000048, Width: 32b; [0x048-0x04f] Reserved for future use
reserved3_0: '0x00000000'
# -----------------------------------------===== reserved3_1 [Optional] =====-----------------------------------------
# Description: Offset: 0x0000004C, Width: 32b; [0x048-0x04f] Reserved for future use
reserved3_1: '0x00000000'
# ----------------------------------------===== sflashA1Size [Optional] =====-----------------------------------------
# Description: Offset: 0x00000050, Width: 32b; [0x050-0x053] Size of Flash connected to A1
sflashA1Size: '0x00000000'
# ----------------------------------------===== sflashA2Size [Optional] =====-----------------------------------------
# Description: Offset: 0x00000054, Width: 32b; [0x054-0x057] Size of Flash connected to A2
sflashA2Size: '0x00000000'
# ----------------------------------------===== sflashB1Size [Optional] =====-----------------------------------------
# Description: Offset: 0x00000058, Width: 32b; [0x058-0x05b] Size of Flash connected to B1
sflashB1Size: '0x00000000'
# ----------------------------------------===== sflashB2Size [Optional] =====-----------------------------------------
# Description: Offset: 0x0000005C, Width: 32b; [0x05c-0x05f] Size of Flash connected to B2
sflashB2Size: '0x00000000'
# ------------------------------------===== csPadSettingOverride [Optional] =====-------------------------------------
# Description: Offset: 0x00000060, Width: 32b; [0x060-0x063] CS pad setting override value
csPadSettingOverride: '0x00000000'
# -----------------------------------===== sclkPadSettingOverride [Optional] =====------------------------------------
# Description: Offset: 0x00000064, Width: 32b; [0x064-0x067] SCK pad setting override value
sclkPadSettingOverride: '0x00000000'
# -----------------------------------===== dataPadSettingOverride [Optional] =====------------------------------------
# Description: Offset: 0x00000068, Width: 32b; [0x068-0x06b] data pad setting override value
dataPadSettingOverride: '0x00000000'
# ------------------------------------===== dqsPadSettingOverride [Optional] =====------------------------------------
# Description: Offset: 0x0000006C, Width: 32b; [0x06c-0x06f] DQS pad setting override value
dqsPadSettingOverride: '0x00000000'
# -----------------------------------------===== timeoutInMs [Optional] =====-----------------------------------------
# Description: Offset: 0x00000070, Width: 32b; [0x070-0x073] Timeout threshold for read status command
timeoutInMs: '0x00000000'
# ---------------------------------------===== commandInterval [Optional] =====---------------------------------------
# Description: Offset: 0x00000074, Width: 32b; [0x074-0x077] CS deselect interval between two commands
commandInterval: '0x00000000'
# ---------------------------------------===== dataValidTime_0 [Optional] =====---------------------------------------
# Description: Offset: 0x00000078, Width: 16b; [0x078-0x07b] CLK edge to data valid time for PORT A and PORT B, in
# terms of 0.1ns
dataValidTime_0: '0x0000'
# ---------------------------------------===== dataValidTime_1 [Optional] =====---------------------------------------
# Description: Offset: 0x0000007A, Width: 16b; [0x078-0x07b] CLK edge to data valid time for PORT A and PORT B, in
# terms of 0.1ns
dataValidTime_1: '0x0000'
# -----------------------------------------===== busyOffset [Optional] =====------------------------------------------
# Description: Offset: 0x0000007C, Width: 16b; [0x07c-0x07d] Busy offset, valid value: 0-31
busyOffset: '0x0000'
# ---------------------------------------===== busyBitPolarity [Optional] =====---------------------------------------
# Description: Offset: 0x0000007E, Width: 16b; [0x07e-0x07f] Busy flag polarity, 0 - busy flag is 1 when flash device
# is busy, 1 - busy flag is 0 when flash device is busy
busyBitPolarity: '0x0000'
# -----------------------------------===== lookupTable_seq0_instr0 [Optional] =====-----------------------------------
# Description: Offset: 0x00000080, Width: 16b; Lookup table holds Flash command sequences 0, instruction 0
lookupTable_seq0_instr0:
# ------------------------------------------===== OPERAND [Optional] =====------------------------------------------
# Description: Offset: 0b, Width: 8b, Instruction operand. Its values depends on used instruction
OPERAND: 0
# -----------------------------------------===== NUM_PADS [Optional] =====------------------------------------------
# Description: Offset: 8b, Width: 2b, Number of pads used by instruction. Some instructions ignores this parameter.
# - 1PAD, (0): Single mode. One pad is used.
# - 2PAD, (1): Dual mode. Two pads are used.
# - 4PAD, (2): Quad mode. Four pads are used.
# - 8PAD, (3): Octal mode. Eight pads are used.
# Possible options: <1PAD, 2PAD, 4PAD, 8PAD>
NUM_PADS: 1PAD
# --------------------------------------===== OPERATION_CODE [Optional] =====---------------------------------------
# Description: Offset: 10b, Width: 6b, Instruction operation code.
# - STOP, (0): Stop execution and de-assert CS. Then, the next command sequence (to the same flash device) starts
# from instruction pointer 0.
# - CMD_SDR, (1): Transmit command code to Flash.
# - RADDR_SDR, (2): Transmit row address to Flash.
# - CADDR_SDR, (3): Transmit column address to Flash.
# - MODE1_SDR, (4): Transmit mode bits to Flash.
# - MODE2_SDR, (5): Transmit mode bits to Flash.
# - MODE4_SDR, (6): Transmit mode bits to Flash.
# - MODE8_SDR, (7): Transmit mode bits to Flash.
# - WRITE_SDR, (8): Transmit program data to Flash device.
# - READ_SDR, (9): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_SDR, (10): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_SDR, (11): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_SDR, (12): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_SDR, (13): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# - JMP_ON_CS, (31): Stop execution, de-assert CS and save operand[7:0] as the instruction start pointer for next
# sequence.Normally this instruction is used to support Execute-In-Place enhanced mode. See XIP enhanced mode for
# more details.This instruction is only allowed for AHB read commands. There is interrupt status bit set
# (INTR[IPCMDERR] or INTR[AHBCMDERR]) when using this instruction in IP command or AHB write command.
# - CMD_DDR, (33): Transmit command code to Flash.
# - RADDR_DDR, (34): Transmit row address to Flash.
# - CADDR_DDR, (35): Transmit column address to Flash.
# - MODE1_DDR, (36): Transmit mode bits to Flash.
# - MODE2_DDR, (37): Transmit mode bits to Flash.
# - MODE4_DDR, (38): Transmit mode bits to Flash.
# - MODE8_DDR, (39): Transmit mode bits to Flash.
# - WRITE_DDR, (40): Transmit program data to Flash device.
# - READ_DDR, (41): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_DDR, (42): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_DDR, (43): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_DDR, (44): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_DDR, (45): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# Possible options: <STOP, CMD_SDR, RADDR_SDR, CADDR_SDR, MODE1_SDR, MODE2_SDR, MODE4_SDR, MODE8_SDR, WRITE_SDR,
# READ_SDR, LEARN_SDR, DATSZ_SDR, DUMMY_SDR, DUMMY_RWDS_SDR, JMP_ON_CS, CMD_DDR, RADDR_DDR, CADDR_DDR, MODE1_DDR,
# MODE2_DDR, MODE4_DDR, MODE8_DDR, WRITE_DDR, READ_DDR, LEARN_DDR, DATSZ_DDR, DUMMY_DDR, DUMMY_RWDS_DDR>
OPERATION_CODE: STOP
lookupTable_seq0_instr1:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq0_instr2:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq0_instr3:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq0_instr4:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq0_instr5:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq0_instr6:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq0_instr7:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
# -----------------------------------===== lookupTable_seq1_instr0 [Optional] =====-----------------------------------
# Description: Offset: 0x00000090, Width: 16b; Lookup table holds Flash command sequences 1, instruction 0
lookupTable_seq1_instr0:
# ------------------------------------------===== OPERAND [Optional] =====------------------------------------------
# Description: Offset: 0b, Width: 8b, Instruction operand. Its values depends on used instruction
OPERAND: 0
# -----------------------------------------===== NUM_PADS [Optional] =====------------------------------------------
# Description: Offset: 8b, Width: 2b, Number of pads used by instruction. Some instructions ignores this parameter.
# - 1PAD, (0): Single mode. One pad is used.
# - 2PAD, (1): Dual mode. Two pads are used.
# - 4PAD, (2): Quad mode. Four pads are used.
# - 8PAD, (3): Octal mode. Eight pads are used.
# Possible options: <1PAD, 2PAD, 4PAD, 8PAD>
NUM_PADS: 1PAD
# --------------------------------------===== OPERATION_CODE [Optional] =====---------------------------------------
# Description: Offset: 10b, Width: 6b, Instruction operation code.
# - STOP, (0): Stop execution and de-assert CS. Then, the next command sequence (to the same flash device) starts
# from instruction pointer 0.
# - CMD_SDR, (1): Transmit command code to Flash.
# - RADDR_SDR, (2): Transmit row address to Flash.
# - CADDR_SDR, (3): Transmit column address to Flash.
# - MODE1_SDR, (4): Transmit mode bits to Flash.
# - MODE2_SDR, (5): Transmit mode bits to Flash.
# - MODE4_SDR, (6): Transmit mode bits to Flash.
# - MODE8_SDR, (7): Transmit mode bits to Flash.
# - WRITE_SDR, (8): Transmit program data to Flash device.
# - READ_SDR, (9): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_SDR, (10): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_SDR, (11): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_SDR, (12): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_SDR, (13): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# - JMP_ON_CS, (31): Stop execution, de-assert CS and save operand[7:0] as the instruction start pointer for next
# sequence.Normally this instruction is used to support Execute-In-Place enhanced mode. See XIP enhanced mode for
# more details.This instruction is only allowed for AHB read commands. There is interrupt status bit set
# (INTR[IPCMDERR] or INTR[AHBCMDERR]) when using this instruction in IP command or AHB write command.
# - CMD_DDR, (33): Transmit command code to Flash.
# - RADDR_DDR, (34): Transmit row address to Flash.
# - CADDR_DDR, (35): Transmit column address to Flash.
# - MODE1_DDR, (36): Transmit mode bits to Flash.
# - MODE2_DDR, (37): Transmit mode bits to Flash.
# - MODE4_DDR, (38): Transmit mode bits to Flash.
# - MODE8_DDR, (39): Transmit mode bits to Flash.
# - WRITE_DDR, (40): Transmit program data to Flash device.
# - READ_DDR, (41): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_DDR, (42): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_DDR, (43): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_DDR, (44): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_DDR, (45): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# Possible options: <STOP, CMD_SDR, RADDR_SDR, CADDR_SDR, MODE1_SDR, MODE2_SDR, MODE4_SDR, MODE8_SDR, WRITE_SDR,
# READ_SDR, LEARN_SDR, DATSZ_SDR, DUMMY_SDR, DUMMY_RWDS_SDR, JMP_ON_CS, CMD_DDR, RADDR_DDR, CADDR_DDR, MODE1_DDR,
# MODE2_DDR, MODE4_DDR, MODE8_DDR, WRITE_DDR, READ_DDR, LEARN_DDR, DATSZ_DDR, DUMMY_DDR, DUMMY_RWDS_DDR>
OPERATION_CODE: STOP
lookupTable_seq1_instr1:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq1_instr2:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq1_instr3:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq1_instr4:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq1_instr5:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq1_instr6:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq1_instr7:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
# -----------------------------------===== lookupTable_seq2_instr0 [Optional] =====-----------------------------------
# Description: Offset: 0x000000A0, Width: 16b; Lookup table holds Flash command sequences 2, instruction 0
lookupTable_seq2_instr0:
# ------------------------------------------===== OPERAND [Optional] =====------------------------------------------
# Description: Offset: 0b, Width: 8b, Instruction operand. Its values depends on used instruction
OPERAND: 0
# -----------------------------------------===== NUM_PADS [Optional] =====------------------------------------------
# Description: Offset: 8b, Width: 2b, Number of pads used by instruction. Some instructions ignores this parameter.
# - 1PAD, (0): Single mode. One pad is used.
# - 2PAD, (1): Dual mode. Two pads are used.
# - 4PAD, (2): Quad mode. Four pads are used.
# - 8PAD, (3): Octal mode. Eight pads are used.
# Possible options: <1PAD, 2PAD, 4PAD, 8PAD>
NUM_PADS: 1PAD
# --------------------------------------===== OPERATION_CODE [Optional] =====---------------------------------------
# Description: Offset: 10b, Width: 6b, Instruction operation code.
# - STOP, (0): Stop execution and de-assert CS. Then, the next command sequence (to the same flash device) starts
# from instruction pointer 0.
# - CMD_SDR, (1): Transmit command code to Flash.
# - RADDR_SDR, (2): Transmit row address to Flash.
# - CADDR_SDR, (3): Transmit column address to Flash.
# - MODE1_SDR, (4): Transmit mode bits to Flash.
# - MODE2_SDR, (5): Transmit mode bits to Flash.
# - MODE4_SDR, (6): Transmit mode bits to Flash.
# - MODE8_SDR, (7): Transmit mode bits to Flash.
# - WRITE_SDR, (8): Transmit program data to Flash device.
# - READ_SDR, (9): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_SDR, (10): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_SDR, (11): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_SDR, (12): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_SDR, (13): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# - JMP_ON_CS, (31): Stop execution, de-assert CS and save operand[7:0] as the instruction start pointer for next
# sequence.Normally this instruction is used to support Execute-In-Place enhanced mode. See XIP enhanced mode for
# more details.This instruction is only allowed for AHB read commands. There is interrupt status bit set
# (INTR[IPCMDERR] or INTR[AHBCMDERR]) when using this instruction in IP command or AHB write command.
# - CMD_DDR, (33): Transmit command code to Flash.
# - RADDR_DDR, (34): Transmit row address to Flash.
# - CADDR_DDR, (35): Transmit column address to Flash.
# - MODE1_DDR, (36): Transmit mode bits to Flash.
# - MODE2_DDR, (37): Transmit mode bits to Flash.
# - MODE4_DDR, (38): Transmit mode bits to Flash.
# - MODE8_DDR, (39): Transmit mode bits to Flash.
# - WRITE_DDR, (40): Transmit program data to Flash device.
# - READ_DDR, (41): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_DDR, (42): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_DDR, (43): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_DDR, (44): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_DDR, (45): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# Possible options: <STOP, CMD_SDR, RADDR_SDR, CADDR_SDR, MODE1_SDR, MODE2_SDR, MODE4_SDR, MODE8_SDR, WRITE_SDR,
# READ_SDR, LEARN_SDR, DATSZ_SDR, DUMMY_SDR, DUMMY_RWDS_SDR, JMP_ON_CS, CMD_DDR, RADDR_DDR, CADDR_DDR, MODE1_DDR,
# MODE2_DDR, MODE4_DDR, MODE8_DDR, WRITE_DDR, READ_DDR, LEARN_DDR, DATSZ_DDR, DUMMY_DDR, DUMMY_RWDS_DDR>
OPERATION_CODE: STOP
lookupTable_seq2_instr1:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq2_instr2:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq2_instr3:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq2_instr4:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq2_instr5:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq2_instr6:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq2_instr7:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
# -----------------------------------===== lookupTable_seq3_instr0 [Optional] =====-----------------------------------
# Description: Offset: 0x000000B0, Width: 16b; Lookup table holds Flash command sequences 3, instruction 0
lookupTable_seq3_instr0:
# ------------------------------------------===== OPERAND [Optional] =====------------------------------------------
# Description: Offset: 0b, Width: 8b, Instruction operand. Its values depends on used instruction
OPERAND: 0
# -----------------------------------------===== NUM_PADS [Optional] =====------------------------------------------
# Description: Offset: 8b, Width: 2b, Number of pads used by instruction. Some instructions ignores this parameter.
# - 1PAD, (0): Single mode. One pad is used.
# - 2PAD, (1): Dual mode. Two pads are used.
# - 4PAD, (2): Quad mode. Four pads are used.
# - 8PAD, (3): Octal mode. Eight pads are used.
# Possible options: <1PAD, 2PAD, 4PAD, 8PAD>
NUM_PADS: 1PAD
# --------------------------------------===== OPERATION_CODE [Optional] =====---------------------------------------
# Description: Offset: 10b, Width: 6b, Instruction operation code.
# - STOP, (0): Stop execution and de-assert CS. Then, the next command sequence (to the same flash device) starts
# from instruction pointer 0.
# - CMD_SDR, (1): Transmit command code to Flash.
# - RADDR_SDR, (2): Transmit row address to Flash.
# - CADDR_SDR, (3): Transmit column address to Flash.
# - MODE1_SDR, (4): Transmit mode bits to Flash.
# - MODE2_SDR, (5): Transmit mode bits to Flash.
# - MODE4_SDR, (6): Transmit mode bits to Flash.
# - MODE8_SDR, (7): Transmit mode bits to Flash.
# - WRITE_SDR, (8): Transmit program data to Flash device.
# - READ_SDR, (9): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_SDR, (10): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_SDR, (11): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_SDR, (12): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_SDR, (13): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# - JMP_ON_CS, (31): Stop execution, de-assert CS and save operand[7:0] as the instruction start pointer for next
# sequence.Normally this instruction is used to support Execute-In-Place enhanced mode. See XIP enhanced mode for
# more details.This instruction is only allowed for AHB read commands. There is interrupt status bit set
# (INTR[IPCMDERR] or INTR[AHBCMDERR]) when using this instruction in IP command or AHB write command.
# - CMD_DDR, (33): Transmit command code to Flash.
# - RADDR_DDR, (34): Transmit row address to Flash.
# - CADDR_DDR, (35): Transmit column address to Flash.
# - MODE1_DDR, (36): Transmit mode bits to Flash.
# - MODE2_DDR, (37): Transmit mode bits to Flash.
# - MODE4_DDR, (38): Transmit mode bits to Flash.
# - MODE8_DDR, (39): Transmit mode bits to Flash.
# - WRITE_DDR, (40): Transmit program data to Flash device.
# - READ_DDR, (41): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_DDR, (42): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_DDR, (43): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_DDR, (44): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_DDR, (45): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# Possible options: <STOP, CMD_SDR, RADDR_SDR, CADDR_SDR, MODE1_SDR, MODE2_SDR, MODE4_SDR, MODE8_SDR, WRITE_SDR,
# READ_SDR, LEARN_SDR, DATSZ_SDR, DUMMY_SDR, DUMMY_RWDS_SDR, JMP_ON_CS, CMD_DDR, RADDR_DDR, CADDR_DDR, MODE1_DDR,
# MODE2_DDR, MODE4_DDR, MODE8_DDR, WRITE_DDR, READ_DDR, LEARN_DDR, DATSZ_DDR, DUMMY_DDR, DUMMY_RWDS_DDR>
OPERATION_CODE: STOP
lookupTable_seq3_instr1:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq3_instr2:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq3_instr3:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq3_instr4:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq3_instr5:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq3_instr6:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq3_instr7:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
# -----------------------------------===== lookupTable_seq4_instr0 [Optional] =====-----------------------------------
# Description: Offset: 0x000000C0, Width: 16b; Lookup table holds Flash command sequences 4, instruction 0
lookupTable_seq4_instr0:
# ------------------------------------------===== OPERAND [Optional] =====------------------------------------------
# Description: Offset: 0b, Width: 8b, Instruction operand. Its values depends on used instruction
OPERAND: 0
# -----------------------------------------===== NUM_PADS [Optional] =====------------------------------------------
# Description: Offset: 8b, Width: 2b, Number of pads used by instruction. Some instructions ignores this parameter.
# - 1PAD, (0): Single mode. One pad is used.
# - 2PAD, (1): Dual mode. Two pads are used.
# - 4PAD, (2): Quad mode. Four pads are used.
# - 8PAD, (3): Octal mode. Eight pads are used.
# Possible options: <1PAD, 2PAD, 4PAD, 8PAD>
NUM_PADS: 1PAD
# --------------------------------------===== OPERATION_CODE [Optional] =====---------------------------------------
# Description: Offset: 10b, Width: 6b, Instruction operation code.
# - STOP, (0): Stop execution and de-assert CS. Then, the next command sequence (to the same flash device) starts
# from instruction pointer 0.
# - CMD_SDR, (1): Transmit command code to Flash.
# - RADDR_SDR, (2): Transmit row address to Flash.
# - CADDR_SDR, (3): Transmit column address to Flash.
# - MODE1_SDR, (4): Transmit mode bits to Flash.
# - MODE2_SDR, (5): Transmit mode bits to Flash.
# - MODE4_SDR, (6): Transmit mode bits to Flash.
# - MODE8_SDR, (7): Transmit mode bits to Flash.
# - WRITE_SDR, (8): Transmit program data to Flash device.
# - READ_SDR, (9): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_SDR, (10): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_SDR, (11): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_SDR, (12): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_SDR, (13): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# - JMP_ON_CS, (31): Stop execution, de-assert CS and save operand[7:0] as the instruction start pointer for next
# sequence.Normally this instruction is used to support Execute-In-Place enhanced mode. See XIP enhanced mode for
# more details.This instruction is only allowed for AHB read commands. There is interrupt status bit set
# (INTR[IPCMDERR] or INTR[AHBCMDERR]) when using this instruction in IP command or AHB write command.
# - CMD_DDR, (33): Transmit command code to Flash.
# - RADDR_DDR, (34): Transmit row address to Flash.
# - CADDR_DDR, (35): Transmit column address to Flash.
# - MODE1_DDR, (36): Transmit mode bits to Flash.
# - MODE2_DDR, (37): Transmit mode bits to Flash.
# - MODE4_DDR, (38): Transmit mode bits to Flash.
# - MODE8_DDR, (39): Transmit mode bits to Flash.
# - WRITE_DDR, (40): Transmit program data to Flash device.
# - READ_DDR, (41): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_DDR, (42): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_DDR, (43): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_DDR, (44): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_DDR, (45): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# Possible options: <STOP, CMD_SDR, RADDR_SDR, CADDR_SDR, MODE1_SDR, MODE2_SDR, MODE4_SDR, MODE8_SDR, WRITE_SDR,
# READ_SDR, LEARN_SDR, DATSZ_SDR, DUMMY_SDR, DUMMY_RWDS_SDR, JMP_ON_CS, CMD_DDR, RADDR_DDR, CADDR_DDR, MODE1_DDR,
# MODE2_DDR, MODE4_DDR, MODE8_DDR, WRITE_DDR, READ_DDR, LEARN_DDR, DATSZ_DDR, DUMMY_DDR, DUMMY_RWDS_DDR>
OPERATION_CODE: STOP
lookupTable_seq4_instr1:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq4_instr2:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq4_instr3:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq4_instr4:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq4_instr5:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq4_instr6:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq4_instr7:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
# -----------------------------------===== lookupTable_seq5_instr0 [Optional] =====-----------------------------------
# Description: Offset: 0x000000D0, Width: 16b; Lookup table holds Flash command sequences 5, instruction 0
lookupTable_seq5_instr0:
# ------------------------------------------===== OPERAND [Optional] =====------------------------------------------
# Description: Offset: 0b, Width: 8b, Instruction operand. Its values depends on used instruction
OPERAND: 0
# -----------------------------------------===== NUM_PADS [Optional] =====------------------------------------------
# Description: Offset: 8b, Width: 2b, Number of pads used by instruction. Some instructions ignores this parameter.
# - 1PAD, (0): Single mode. One pad is used.
# - 2PAD, (1): Dual mode. Two pads are used.
# - 4PAD, (2): Quad mode. Four pads are used.
# - 8PAD, (3): Octal mode. Eight pads are used.
# Possible options: <1PAD, 2PAD, 4PAD, 8PAD>
NUM_PADS: 1PAD
# --------------------------------------===== OPERATION_CODE [Optional] =====---------------------------------------
# Description: Offset: 10b, Width: 6b, Instruction operation code.
# - STOP, (0): Stop execution and de-assert CS. Then, the next command sequence (to the same flash device) starts
# from instruction pointer 0.
# - CMD_SDR, (1): Transmit command code to Flash.
# - RADDR_SDR, (2): Transmit row address to Flash.
# - CADDR_SDR, (3): Transmit column address to Flash.
# - MODE1_SDR, (4): Transmit mode bits to Flash.
# - MODE2_SDR, (5): Transmit mode bits to Flash.
# - MODE4_SDR, (6): Transmit mode bits to Flash.
# - MODE8_SDR, (7): Transmit mode bits to Flash.
# - WRITE_SDR, (8): Transmit program data to Flash device.
# - READ_SDR, (9): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_SDR, (10): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_SDR, (11): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_SDR, (12): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_SDR, (13): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# - JMP_ON_CS, (31): Stop execution, de-assert CS and save operand[7:0] as the instruction start pointer for next
# sequence.Normally this instruction is used to support Execute-In-Place enhanced mode. See XIP enhanced mode for
# more details.This instruction is only allowed for AHB read commands. There is interrupt status bit set
# (INTR[IPCMDERR] or INTR[AHBCMDERR]) when using this instruction in IP command or AHB write command.
# - CMD_DDR, (33): Transmit command code to Flash.
# - RADDR_DDR, (34): Transmit row address to Flash.
# - CADDR_DDR, (35): Transmit column address to Flash.
# - MODE1_DDR, (36): Transmit mode bits to Flash.
# - MODE2_DDR, (37): Transmit mode bits to Flash.
# - MODE4_DDR, (38): Transmit mode bits to Flash.
# - MODE8_DDR, (39): Transmit mode bits to Flash.
# - WRITE_DDR, (40): Transmit program data to Flash device.
# - READ_DDR, (41): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_DDR, (42): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_DDR, (43): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_DDR, (44): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_DDR, (45): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# Possible options: <STOP, CMD_SDR, RADDR_SDR, CADDR_SDR, MODE1_SDR, MODE2_SDR, MODE4_SDR, MODE8_SDR, WRITE_SDR,
# READ_SDR, LEARN_SDR, DATSZ_SDR, DUMMY_SDR, DUMMY_RWDS_SDR, JMP_ON_CS, CMD_DDR, RADDR_DDR, CADDR_DDR, MODE1_DDR,
# MODE2_DDR, MODE4_DDR, MODE8_DDR, WRITE_DDR, READ_DDR, LEARN_DDR, DATSZ_DDR, DUMMY_DDR, DUMMY_RWDS_DDR>
OPERATION_CODE: STOP
lookupTable_seq5_instr1:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq5_instr2:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq5_instr3:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq5_instr4:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq5_instr5:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq5_instr6:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq5_instr7:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
# -----------------------------------===== lookupTable_seq6_instr0 [Optional] =====-----------------------------------
# Description: Offset: 0x000000E0, Width: 16b; Lookup table holds Flash command sequences 6, instruction 0
lookupTable_seq6_instr0:
# ------------------------------------------===== OPERAND [Optional] =====------------------------------------------
# Description: Offset: 0b, Width: 8b, Instruction operand. Its values depends on used instruction
OPERAND: 0
# -----------------------------------------===== NUM_PADS [Optional] =====------------------------------------------
# Description: Offset: 8b, Width: 2b, Number of pads used by instruction. Some instructions ignores this parameter.
# - 1PAD, (0): Single mode. One pad is used.
# - 2PAD, (1): Dual mode. Two pads are used.
# - 4PAD, (2): Quad mode. Four pads are used.
# - 8PAD, (3): Octal mode. Eight pads are used.
# Possible options: <1PAD, 2PAD, 4PAD, 8PAD>
NUM_PADS: 1PAD
# --------------------------------------===== OPERATION_CODE [Optional] =====---------------------------------------
# Description: Offset: 10b, Width: 6b, Instruction operation code.
# - STOP, (0): Stop execution and de-assert CS. Then, the next command sequence (to the same flash device) starts
# from instruction pointer 0.
# - CMD_SDR, (1): Transmit command code to Flash.
# - RADDR_SDR, (2): Transmit row address to Flash.
# - CADDR_SDR, (3): Transmit column address to Flash.
# - MODE1_SDR, (4): Transmit mode bits to Flash.
# - MODE2_SDR, (5): Transmit mode bits to Flash.
# - MODE4_SDR, (6): Transmit mode bits to Flash.
# - MODE8_SDR, (7): Transmit mode bits to Flash.
# - WRITE_SDR, (8): Transmit program data to Flash device.
# - READ_SDR, (9): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_SDR, (10): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_SDR, (11): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_SDR, (12): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_SDR, (13): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# - JMP_ON_CS, (31): Stop execution, de-assert CS and save operand[7:0] as the instruction start pointer for next
# sequence.Normally this instruction is used to support Execute-In-Place enhanced mode. See XIP enhanced mode for
# more details.This instruction is only allowed for AHB read commands. There is interrupt status bit set
# (INTR[IPCMDERR] or INTR[AHBCMDERR]) when using this instruction in IP command or AHB write command.
# - CMD_DDR, (33): Transmit command code to Flash.
# - RADDR_DDR, (34): Transmit row address to Flash.
# - CADDR_DDR, (35): Transmit column address to Flash.
# - MODE1_DDR, (36): Transmit mode bits to Flash.
# - MODE2_DDR, (37): Transmit mode bits to Flash.
# - MODE4_DDR, (38): Transmit mode bits to Flash.
# - MODE8_DDR, (39): Transmit mode bits to Flash.
# - WRITE_DDR, (40): Transmit program data to Flash device.
# - READ_DDR, (41): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_DDR, (42): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_DDR, (43): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_DDR, (44): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_DDR, (45): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# Possible options: <STOP, CMD_SDR, RADDR_SDR, CADDR_SDR, MODE1_SDR, MODE2_SDR, MODE4_SDR, MODE8_SDR, WRITE_SDR,
# READ_SDR, LEARN_SDR, DATSZ_SDR, DUMMY_SDR, DUMMY_RWDS_SDR, JMP_ON_CS, CMD_DDR, RADDR_DDR, CADDR_DDR, MODE1_DDR,
# MODE2_DDR, MODE4_DDR, MODE8_DDR, WRITE_DDR, READ_DDR, LEARN_DDR, DATSZ_DDR, DUMMY_DDR, DUMMY_RWDS_DDR>
OPERATION_CODE: STOP
lookupTable_seq6_instr1:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq6_instr2:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq6_instr3:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq6_instr4:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq6_instr5:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq6_instr6:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq6_instr7:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
# -----------------------------------===== lookupTable_seq7_instr0 [Optional] =====-----------------------------------
# Description: Offset: 0x000000F0, Width: 16b; Lookup table holds Flash command sequences 7, instruction 0
lookupTable_seq7_instr0:
# ------------------------------------------===== OPERAND [Optional] =====------------------------------------------
# Description: Offset: 0b, Width: 8b, Instruction operand. Its values depends on used instruction
OPERAND: 0
# -----------------------------------------===== NUM_PADS [Optional] =====------------------------------------------
# Description: Offset: 8b, Width: 2b, Number of pads used by instruction. Some instructions ignores this parameter.
# - 1PAD, (0): Single mode. One pad is used.
# - 2PAD, (1): Dual mode. Two pads are used.
# - 4PAD, (2): Quad mode. Four pads are used.
# - 8PAD, (3): Octal mode. Eight pads are used.
# Possible options: <1PAD, 2PAD, 4PAD, 8PAD>
NUM_PADS: 1PAD
# --------------------------------------===== OPERATION_CODE [Optional] =====---------------------------------------
# Description: Offset: 10b, Width: 6b, Instruction operation code.
# - STOP, (0): Stop execution and de-assert CS. Then, the next command sequence (to the same flash device) starts
# from instruction pointer 0.
# - CMD_SDR, (1): Transmit command code to Flash.
# - RADDR_SDR, (2): Transmit row address to Flash.
# - CADDR_SDR, (3): Transmit column address to Flash.
# - MODE1_SDR, (4): Transmit mode bits to Flash.
# - MODE2_SDR, (5): Transmit mode bits to Flash.
# - MODE4_SDR, (6): Transmit mode bits to Flash.
# - MODE8_SDR, (7): Transmit mode bits to Flash.
# - WRITE_SDR, (8): Transmit program data to Flash device.
# - READ_SDR, (9): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_SDR, (10): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_SDR, (11): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_SDR, (12): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_SDR, (13): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# - JMP_ON_CS, (31): Stop execution, de-assert CS and save operand[7:0] as the instruction start pointer for next
# sequence.Normally this instruction is used to support Execute-In-Place enhanced mode. See XIP enhanced mode for
# more details.This instruction is only allowed for AHB read commands. There is interrupt status bit set
# (INTR[IPCMDERR] or INTR[AHBCMDERR]) when using this instruction in IP command or AHB write command.
# - CMD_DDR, (33): Transmit command code to Flash.
# - RADDR_DDR, (34): Transmit row address to Flash.
# - CADDR_DDR, (35): Transmit column address to Flash.
# - MODE1_DDR, (36): Transmit mode bits to Flash.
# - MODE2_DDR, (37): Transmit mode bits to Flash.
# - MODE4_DDR, (38): Transmit mode bits to Flash.
# - MODE8_DDR, (39): Transmit mode bits to Flash.
# - WRITE_DDR, (40): Transmit program data to Flash device.
# - READ_DDR, (41): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_DDR, (42): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_DDR, (43): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_DDR, (44): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_DDR, (45): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# Possible options: <STOP, CMD_SDR, RADDR_SDR, CADDR_SDR, MODE1_SDR, MODE2_SDR, MODE4_SDR, MODE8_SDR, WRITE_SDR,
# READ_SDR, LEARN_SDR, DATSZ_SDR, DUMMY_SDR, DUMMY_RWDS_SDR, JMP_ON_CS, CMD_DDR, RADDR_DDR, CADDR_DDR, MODE1_DDR,
# MODE2_DDR, MODE4_DDR, MODE8_DDR, WRITE_DDR, READ_DDR, LEARN_DDR, DATSZ_DDR, DUMMY_DDR, DUMMY_RWDS_DDR>
OPERATION_CODE: STOP
lookupTable_seq7_instr1:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq7_instr2:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq7_instr3:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq7_instr4:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq7_instr5:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq7_instr6:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq7_instr7:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
# -----------------------------------===== lookupTable_seq8_instr0 [Optional] =====-----------------------------------
# Description: Offset: 0x00000100, Width: 16b; Lookup table holds Flash command sequences 8, instruction 0
lookupTable_seq8_instr0:
# ------------------------------------------===== OPERAND [Optional] =====------------------------------------------
# Description: Offset: 0b, Width: 8b, Instruction operand. Its values depends on used instruction
OPERAND: 0
# -----------------------------------------===== NUM_PADS [Optional] =====------------------------------------------
# Description: Offset: 8b, Width: 2b, Number of pads used by instruction. Some instructions ignores this parameter.
# - 1PAD, (0): Single mode. One pad is used.
# - 2PAD, (1): Dual mode. Two pads are used.
# - 4PAD, (2): Quad mode. Four pads are used.
# - 8PAD, (3): Octal mode. Eight pads are used.
# Possible options: <1PAD, 2PAD, 4PAD, 8PAD>
NUM_PADS: 1PAD
# --------------------------------------===== OPERATION_CODE [Optional] =====---------------------------------------
# Description: Offset: 10b, Width: 6b, Instruction operation code.
# - STOP, (0): Stop execution and de-assert CS. Then, the next command sequence (to the same flash device) starts
# from instruction pointer 0.
# - CMD_SDR, (1): Transmit command code to Flash.
# - RADDR_SDR, (2): Transmit row address to Flash.
# - CADDR_SDR, (3): Transmit column address to Flash.
# - MODE1_SDR, (4): Transmit mode bits to Flash.
# - MODE2_SDR, (5): Transmit mode bits to Flash.
# - MODE4_SDR, (6): Transmit mode bits to Flash.
# - MODE8_SDR, (7): Transmit mode bits to Flash.
# - WRITE_SDR, (8): Transmit program data to Flash device.
# - READ_SDR, (9): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_SDR, (10): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_SDR, (11): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_SDR, (12): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_SDR, (13): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# - JMP_ON_CS, (31): Stop execution, de-assert CS and save operand[7:0] as the instruction start pointer for next
# sequence.Normally this instruction is used to support Execute-In-Place enhanced mode. See XIP enhanced mode for
# more details.This instruction is only allowed for AHB read commands. There is interrupt status bit set
# (INTR[IPCMDERR] or INTR[AHBCMDERR]) when using this instruction in IP command or AHB write command.
# - CMD_DDR, (33): Transmit command code to Flash.
# - RADDR_DDR, (34): Transmit row address to Flash.
# - CADDR_DDR, (35): Transmit column address to Flash.
# - MODE1_DDR, (36): Transmit mode bits to Flash.
# - MODE2_DDR, (37): Transmit mode bits to Flash.
# - MODE4_DDR, (38): Transmit mode bits to Flash.
# - MODE8_DDR, (39): Transmit mode bits to Flash.
# - WRITE_DDR, (40): Transmit program data to Flash device.
# - READ_DDR, (41): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_DDR, (42): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_DDR, (43): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_DDR, (44): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_DDR, (45): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# Possible options: <STOP, CMD_SDR, RADDR_SDR, CADDR_SDR, MODE1_SDR, MODE2_SDR, MODE4_SDR, MODE8_SDR, WRITE_SDR,
# READ_SDR, LEARN_SDR, DATSZ_SDR, DUMMY_SDR, DUMMY_RWDS_SDR, JMP_ON_CS, CMD_DDR, RADDR_DDR, CADDR_DDR, MODE1_DDR,
# MODE2_DDR, MODE4_DDR, MODE8_DDR, WRITE_DDR, READ_DDR, LEARN_DDR, DATSZ_DDR, DUMMY_DDR, DUMMY_RWDS_DDR>
OPERATION_CODE: STOP
lookupTable_seq8_instr1:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq8_instr2:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq8_instr3:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq8_instr4:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq8_instr5:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq8_instr6:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq8_instr7:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
# -----------------------------------===== lookupTable_seq9_instr0 [Optional] =====-----------------------------------
# Description: Offset: 0x00000110, Width: 16b; Lookup table holds Flash command sequences 9, instruction 0
lookupTable_seq9_instr0:
# ------------------------------------------===== OPERAND [Optional] =====------------------------------------------
# Description: Offset: 0b, Width: 8b, Instruction operand. Its values depends on used instruction
OPERAND: 0
# -----------------------------------------===== NUM_PADS [Optional] =====------------------------------------------
# Description: Offset: 8b, Width: 2b, Number of pads used by instruction. Some instructions ignores this parameter.
# - 1PAD, (0): Single mode. One pad is used.
# - 2PAD, (1): Dual mode. Two pads are used.
# - 4PAD, (2): Quad mode. Four pads are used.
# - 8PAD, (3): Octal mode. Eight pads are used.
# Possible options: <1PAD, 2PAD, 4PAD, 8PAD>
NUM_PADS: 1PAD
# --------------------------------------===== OPERATION_CODE [Optional] =====---------------------------------------
# Description: Offset: 10b, Width: 6b, Instruction operation code.
# - STOP, (0): Stop execution and de-assert CS. Then, the next command sequence (to the same flash device) starts
# from instruction pointer 0.
# - CMD_SDR, (1): Transmit command code to Flash.
# - RADDR_SDR, (2): Transmit row address to Flash.
# - CADDR_SDR, (3): Transmit column address to Flash.
# - MODE1_SDR, (4): Transmit mode bits to Flash.
# - MODE2_SDR, (5): Transmit mode bits to Flash.
# - MODE4_SDR, (6): Transmit mode bits to Flash.
# - MODE8_SDR, (7): Transmit mode bits to Flash.
# - WRITE_SDR, (8): Transmit program data to Flash device.
# - READ_SDR, (9): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_SDR, (10): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_SDR, (11): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_SDR, (12): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_SDR, (13): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# - JMP_ON_CS, (31): Stop execution, de-assert CS and save operand[7:0] as the instruction start pointer for next
# sequence.Normally this instruction is used to support Execute-In-Place enhanced mode. See XIP enhanced mode for
# more details.This instruction is only allowed for AHB read commands. There is interrupt status bit set
# (INTR[IPCMDERR] or INTR[AHBCMDERR]) when using this instruction in IP command or AHB write command.
# - CMD_DDR, (33): Transmit command code to Flash.
# - RADDR_DDR, (34): Transmit row address to Flash.
# - CADDR_DDR, (35): Transmit column address to Flash.
# - MODE1_DDR, (36): Transmit mode bits to Flash.
# - MODE2_DDR, (37): Transmit mode bits to Flash.
# - MODE4_DDR, (38): Transmit mode bits to Flash.
# - MODE8_DDR, (39): Transmit mode bits to Flash.
# - WRITE_DDR, (40): Transmit program data to Flash device.
# - READ_DDR, (41): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_DDR, (42): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_DDR, (43): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_DDR, (44): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_DDR, (45): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# Possible options: <STOP, CMD_SDR, RADDR_SDR, CADDR_SDR, MODE1_SDR, MODE2_SDR, MODE4_SDR, MODE8_SDR, WRITE_SDR,
# READ_SDR, LEARN_SDR, DATSZ_SDR, DUMMY_SDR, DUMMY_RWDS_SDR, JMP_ON_CS, CMD_DDR, RADDR_DDR, CADDR_DDR, MODE1_DDR,
# MODE2_DDR, MODE4_DDR, MODE8_DDR, WRITE_DDR, READ_DDR, LEARN_DDR, DATSZ_DDR, DUMMY_DDR, DUMMY_RWDS_DDR>
OPERATION_CODE: STOP
lookupTable_seq9_instr1:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq9_instr2:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq9_instr3:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq9_instr4:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq9_instr5:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq9_instr6:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq9_instr7:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
# ----------------------------------===== lookupTable_seq10_instr0 [Optional] =====-----------------------------------
# Description: Offset: 0x00000120, Width: 16b; Lookup table holds Flash command sequences 10, instruction 0
lookupTable_seq10_instr0:
# ------------------------------------------===== OPERAND [Optional] =====------------------------------------------
# Description: Offset: 0b, Width: 8b, Instruction operand. Its values depends on used instruction
OPERAND: 0
# -----------------------------------------===== NUM_PADS [Optional] =====------------------------------------------
# Description: Offset: 8b, Width: 2b, Number of pads used by instruction. Some instructions ignores this parameter.
# - 1PAD, (0): Single mode. One pad is used.
# - 2PAD, (1): Dual mode. Two pads are used.
# - 4PAD, (2): Quad mode. Four pads are used.
# - 8PAD, (3): Octal mode. Eight pads are used.
# Possible options: <1PAD, 2PAD, 4PAD, 8PAD>
NUM_PADS: 1PAD
# --------------------------------------===== OPERATION_CODE [Optional] =====---------------------------------------
# Description: Offset: 10b, Width: 6b, Instruction operation code.
# - STOP, (0): Stop execution and de-assert CS. Then, the next command sequence (to the same flash device) starts
# from instruction pointer 0.
# - CMD_SDR, (1): Transmit command code to Flash.
# - RADDR_SDR, (2): Transmit row address to Flash.
# - CADDR_SDR, (3): Transmit column address to Flash.
# - MODE1_SDR, (4): Transmit mode bits to Flash.
# - MODE2_SDR, (5): Transmit mode bits to Flash.
# - MODE4_SDR, (6): Transmit mode bits to Flash.
# - MODE8_SDR, (7): Transmit mode bits to Flash.
# - WRITE_SDR, (8): Transmit program data to Flash device.
# - READ_SDR, (9): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_SDR, (10): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_SDR, (11): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_SDR, (12): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_SDR, (13): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# - JMP_ON_CS, (31): Stop execution, de-assert CS and save operand[7:0] as the instruction start pointer for next
# sequence.Normally this instruction is used to support Execute-In-Place enhanced mode. See XIP enhanced mode for
# more details.This instruction is only allowed for AHB read commands. There is interrupt status bit set
# (INTR[IPCMDERR] or INTR[AHBCMDERR]) when using this instruction in IP command or AHB write command.
# - CMD_DDR, (33): Transmit command code to Flash.
# - RADDR_DDR, (34): Transmit row address to Flash.
# - CADDR_DDR, (35): Transmit column address to Flash.
# - MODE1_DDR, (36): Transmit mode bits to Flash.
# - MODE2_DDR, (37): Transmit mode bits to Flash.
# - MODE4_DDR, (38): Transmit mode bits to Flash.
# - MODE8_DDR, (39): Transmit mode bits to Flash.
# - WRITE_DDR, (40): Transmit program data to Flash device.
# - READ_DDR, (41): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_DDR, (42): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_DDR, (43): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_DDR, (44): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_DDR, (45): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# Possible options: <STOP, CMD_SDR, RADDR_SDR, CADDR_SDR, MODE1_SDR, MODE2_SDR, MODE4_SDR, MODE8_SDR, WRITE_SDR,
# READ_SDR, LEARN_SDR, DATSZ_SDR, DUMMY_SDR, DUMMY_RWDS_SDR, JMP_ON_CS, CMD_DDR, RADDR_DDR, CADDR_DDR, MODE1_DDR,
# MODE2_DDR, MODE4_DDR, MODE8_DDR, WRITE_DDR, READ_DDR, LEARN_DDR, DATSZ_DDR, DUMMY_DDR, DUMMY_RWDS_DDR>
OPERATION_CODE: STOP
lookupTable_seq10_instr1:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq10_instr2:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq10_instr3:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq10_instr4:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq10_instr5:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq10_instr6:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq10_instr7:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
# ----------------------------------===== lookupTable_seq11_instr0 [Optional] =====-----------------------------------
# Description: Offset: 0x00000130, Width: 16b; Lookup table holds Flash command sequences 11, instruction 0
lookupTable_seq11_instr0:
# ------------------------------------------===== OPERAND [Optional] =====------------------------------------------
# Description: Offset: 0b, Width: 8b, Instruction operand. Its values depends on used instruction
OPERAND: 0
# -----------------------------------------===== NUM_PADS [Optional] =====------------------------------------------
# Description: Offset: 8b, Width: 2b, Number of pads used by instruction. Some instructions ignores this parameter.
# - 1PAD, (0): Single mode. One pad is used.
# - 2PAD, (1): Dual mode. Two pads are used.
# - 4PAD, (2): Quad mode. Four pads are used.
# - 8PAD, (3): Octal mode. Eight pads are used.
# Possible options: <1PAD, 2PAD, 4PAD, 8PAD>
NUM_PADS: 1PAD
# --------------------------------------===== OPERATION_CODE [Optional] =====---------------------------------------
# Description: Offset: 10b, Width: 6b, Instruction operation code.
# - STOP, (0): Stop execution and de-assert CS. Then, the next command sequence (to the same flash device) starts
# from instruction pointer 0.
# - CMD_SDR, (1): Transmit command code to Flash.
# - RADDR_SDR, (2): Transmit row address to Flash.
# - CADDR_SDR, (3): Transmit column address to Flash.
# - MODE1_SDR, (4): Transmit mode bits to Flash.
# - MODE2_SDR, (5): Transmit mode bits to Flash.
# - MODE4_SDR, (6): Transmit mode bits to Flash.
# - MODE8_SDR, (7): Transmit mode bits to Flash.
# - WRITE_SDR, (8): Transmit program data to Flash device.
# - READ_SDR, (9): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_SDR, (10): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_SDR, (11): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_SDR, (12): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_SDR, (13): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# - JMP_ON_CS, (31): Stop execution, de-assert CS and save operand[7:0] as the instruction start pointer for next
# sequence.Normally this instruction is used to support Execute-In-Place enhanced mode. See XIP enhanced mode for
# more details.This instruction is only allowed for AHB read commands. There is interrupt status bit set
# (INTR[IPCMDERR] or INTR[AHBCMDERR]) when using this instruction in IP command or AHB write command.
# - CMD_DDR, (33): Transmit command code to Flash.
# - RADDR_DDR, (34): Transmit row address to Flash.
# - CADDR_DDR, (35): Transmit column address to Flash.
# - MODE1_DDR, (36): Transmit mode bits to Flash.
# - MODE2_DDR, (37): Transmit mode bits to Flash.
# - MODE4_DDR, (38): Transmit mode bits to Flash.
# - MODE8_DDR, (39): Transmit mode bits to Flash.
# - WRITE_DDR, (40): Transmit program data to Flash device.
# - READ_DDR, (41): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_DDR, (42): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_DDR, (43): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_DDR, (44): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_DDR, (45): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# Possible options: <STOP, CMD_SDR, RADDR_SDR, CADDR_SDR, MODE1_SDR, MODE2_SDR, MODE4_SDR, MODE8_SDR, WRITE_SDR,
# READ_SDR, LEARN_SDR, DATSZ_SDR, DUMMY_SDR, DUMMY_RWDS_SDR, JMP_ON_CS, CMD_DDR, RADDR_DDR, CADDR_DDR, MODE1_DDR,
# MODE2_DDR, MODE4_DDR, MODE8_DDR, WRITE_DDR, READ_DDR, LEARN_DDR, DATSZ_DDR, DUMMY_DDR, DUMMY_RWDS_DDR>
OPERATION_CODE: STOP
lookupTable_seq11_instr1:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq11_instr2:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq11_instr3:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq11_instr4:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq11_instr5:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq11_instr6:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq11_instr7:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
# ----------------------------------===== lookupTable_seq12_instr0 [Optional] =====-----------------------------------
# Description: Offset: 0x00000140, Width: 16b; Lookup table holds Flash command sequences 12, instruction 0
lookupTable_seq12_instr0:
# ------------------------------------------===== OPERAND [Optional] =====------------------------------------------
# Description: Offset: 0b, Width: 8b, Instruction operand. Its values depends on used instruction
OPERAND: 0
# -----------------------------------------===== NUM_PADS [Optional] =====------------------------------------------
# Description: Offset: 8b, Width: 2b, Number of pads used by instruction. Some instructions ignores this parameter.
# - 1PAD, (0): Single mode. One pad is used.
# - 2PAD, (1): Dual mode. Two pads are used.
# - 4PAD, (2): Quad mode. Four pads are used.
# - 8PAD, (3): Octal mode. Eight pads are used.
# Possible options: <1PAD, 2PAD, 4PAD, 8PAD>
NUM_PADS: 1PAD
# --------------------------------------===== OPERATION_CODE [Optional] =====---------------------------------------
# Description: Offset: 10b, Width: 6b, Instruction operation code.
# - STOP, (0): Stop execution and de-assert CS. Then, the next command sequence (to the same flash device) starts
# from instruction pointer 0.
# - CMD_SDR, (1): Transmit command code to Flash.
# - RADDR_SDR, (2): Transmit row address to Flash.
# - CADDR_SDR, (3): Transmit column address to Flash.
# - MODE1_SDR, (4): Transmit mode bits to Flash.
# - MODE2_SDR, (5): Transmit mode bits to Flash.
# - MODE4_SDR, (6): Transmit mode bits to Flash.
# - MODE8_SDR, (7): Transmit mode bits to Flash.
# - WRITE_SDR, (8): Transmit program data to Flash device.
# - READ_SDR, (9): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_SDR, (10): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_SDR, (11): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_SDR, (12): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_SDR, (13): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# - JMP_ON_CS, (31): Stop execution, de-assert CS and save operand[7:0] as the instruction start pointer for next
# sequence.Normally this instruction is used to support Execute-In-Place enhanced mode. See XIP enhanced mode for
# more details.This instruction is only allowed for AHB read commands. There is interrupt status bit set
# (INTR[IPCMDERR] or INTR[AHBCMDERR]) when using this instruction in IP command or AHB write command.
# - CMD_DDR, (33): Transmit command code to Flash.
# - RADDR_DDR, (34): Transmit row address to Flash.
# - CADDR_DDR, (35): Transmit column address to Flash.
# - MODE1_DDR, (36): Transmit mode bits to Flash.
# - MODE2_DDR, (37): Transmit mode bits to Flash.
# - MODE4_DDR, (38): Transmit mode bits to Flash.
# - MODE8_DDR, (39): Transmit mode bits to Flash.
# - WRITE_DDR, (40): Transmit program data to Flash device.
# - READ_DDR, (41): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_DDR, (42): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_DDR, (43): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_DDR, (44): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_DDR, (45): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# Possible options: <STOP, CMD_SDR, RADDR_SDR, CADDR_SDR, MODE1_SDR, MODE2_SDR, MODE4_SDR, MODE8_SDR, WRITE_SDR,
# READ_SDR, LEARN_SDR, DATSZ_SDR, DUMMY_SDR, DUMMY_RWDS_SDR, JMP_ON_CS, CMD_DDR, RADDR_DDR, CADDR_DDR, MODE1_DDR,
# MODE2_DDR, MODE4_DDR, MODE8_DDR, WRITE_DDR, READ_DDR, LEARN_DDR, DATSZ_DDR, DUMMY_DDR, DUMMY_RWDS_DDR>
OPERATION_CODE: STOP
lookupTable_seq12_instr1:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq12_instr2:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq12_instr3:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq12_instr4:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq12_instr5:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq12_instr6:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq12_instr7:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
# ----------------------------------===== lookupTable_seq13_instr0 [Optional] =====-----------------------------------
# Description: Offset: 0x00000150, Width: 16b; Lookup table holds Flash command sequences 13, instruction 0
lookupTable_seq13_instr0:
# ------------------------------------------===== OPERAND [Optional] =====------------------------------------------
# Description: Offset: 0b, Width: 8b, Instruction operand. Its values depends on used instruction
OPERAND: 0
# -----------------------------------------===== NUM_PADS [Optional] =====------------------------------------------
# Description: Offset: 8b, Width: 2b, Number of pads used by instruction. Some instructions ignores this parameter.
# - 1PAD, (0): Single mode. One pad is used.
# - 2PAD, (1): Dual mode. Two pads are used.
# - 4PAD, (2): Quad mode. Four pads are used.
# - 8PAD, (3): Octal mode. Eight pads are used.
# Possible options: <1PAD, 2PAD, 4PAD, 8PAD>
NUM_PADS: 1PAD
# --------------------------------------===== OPERATION_CODE [Optional] =====---------------------------------------
# Description: Offset: 10b, Width: 6b, Instruction operation code.
# - STOP, (0): Stop execution and de-assert CS. Then, the next command sequence (to the same flash device) starts
# from instruction pointer 0.
# - CMD_SDR, (1): Transmit command code to Flash.
# - RADDR_SDR, (2): Transmit row address to Flash.
# - CADDR_SDR, (3): Transmit column address to Flash.
# - MODE1_SDR, (4): Transmit mode bits to Flash.
# - MODE2_SDR, (5): Transmit mode bits to Flash.
# - MODE4_SDR, (6): Transmit mode bits to Flash.
# - MODE8_SDR, (7): Transmit mode bits to Flash.
# - WRITE_SDR, (8): Transmit program data to Flash device.
# - READ_SDR, (9): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_SDR, (10): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_SDR, (11): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_SDR, (12): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_SDR, (13): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# - JMP_ON_CS, (31): Stop execution, de-assert CS and save operand[7:0] as the instruction start pointer for next
# sequence.Normally this instruction is used to support Execute-In-Place enhanced mode. See XIP enhanced mode for
# more details.This instruction is only allowed for AHB read commands. There is interrupt status bit set
# (INTR[IPCMDERR] or INTR[AHBCMDERR]) when using this instruction in IP command or AHB write command.
# - CMD_DDR, (33): Transmit command code to Flash.
# - RADDR_DDR, (34): Transmit row address to Flash.
# - CADDR_DDR, (35): Transmit column address to Flash.
# - MODE1_DDR, (36): Transmit mode bits to Flash.
# - MODE2_DDR, (37): Transmit mode bits to Flash.
# - MODE4_DDR, (38): Transmit mode bits to Flash.
# - MODE8_DDR, (39): Transmit mode bits to Flash.
# - WRITE_DDR, (40): Transmit program data to Flash device.
# - READ_DDR, (41): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_DDR, (42): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_DDR, (43): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_DDR, (44): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_DDR, (45): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# Possible options: <STOP, CMD_SDR, RADDR_SDR, CADDR_SDR, MODE1_SDR, MODE2_SDR, MODE4_SDR, MODE8_SDR, WRITE_SDR,
# READ_SDR, LEARN_SDR, DATSZ_SDR, DUMMY_SDR, DUMMY_RWDS_SDR, JMP_ON_CS, CMD_DDR, RADDR_DDR, CADDR_DDR, MODE1_DDR,
# MODE2_DDR, MODE4_DDR, MODE8_DDR, WRITE_DDR, READ_DDR, LEARN_DDR, DATSZ_DDR, DUMMY_DDR, DUMMY_RWDS_DDR>
OPERATION_CODE: STOP
lookupTable_seq13_instr1:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq13_instr2:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq13_instr3:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq13_instr4:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq13_instr5:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq13_instr6:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq13_instr7:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
# ----------------------------------===== lookupTable_seq14_instr0 [Optional] =====-----------------------------------
# Description: Offset: 0x00000160, Width: 16b; Lookup table holds Flash command sequences 14, instruction 0
lookupTable_seq14_instr0:
# ------------------------------------------===== OPERAND [Optional] =====------------------------------------------
# Description: Offset: 0b, Width: 8b, Instruction operand. Its values depends on used instruction
OPERAND: 0
# -----------------------------------------===== NUM_PADS [Optional] =====------------------------------------------
# Description: Offset: 8b, Width: 2b, Number of pads used by instruction. Some instructions ignores this parameter.
# - 1PAD, (0): Single mode. One pad is used.
# - 2PAD, (1): Dual mode. Two pads are used.
# - 4PAD, (2): Quad mode. Four pads are used.
# - 8PAD, (3): Octal mode. Eight pads are used.
# Possible options: <1PAD, 2PAD, 4PAD, 8PAD>
NUM_PADS: 1PAD
# --------------------------------------===== OPERATION_CODE [Optional] =====---------------------------------------
# Description: Offset: 10b, Width: 6b, Instruction operation code.
# - STOP, (0): Stop execution and de-assert CS. Then, the next command sequence (to the same flash device) starts
# from instruction pointer 0.
# - CMD_SDR, (1): Transmit command code to Flash.
# - RADDR_SDR, (2): Transmit row address to Flash.
# - CADDR_SDR, (3): Transmit column address to Flash.
# - MODE1_SDR, (4): Transmit mode bits to Flash.
# - MODE2_SDR, (5): Transmit mode bits to Flash.
# - MODE4_SDR, (6): Transmit mode bits to Flash.
# - MODE8_SDR, (7): Transmit mode bits to Flash.
# - WRITE_SDR, (8): Transmit program data to Flash device.
# - READ_SDR, (9): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_SDR, (10): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_SDR, (11): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_SDR, (12): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_SDR, (13): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# - JMP_ON_CS, (31): Stop execution, de-assert CS and save operand[7:0] as the instruction start pointer for next
# sequence.Normally this instruction is used to support Execute-In-Place enhanced mode. See XIP enhanced mode for
# more details.This instruction is only allowed for AHB read commands. There is interrupt status bit set
# (INTR[IPCMDERR] or INTR[AHBCMDERR]) when using this instruction in IP command or AHB write command.
# - CMD_DDR, (33): Transmit command code to Flash.
# - RADDR_DDR, (34): Transmit row address to Flash.
# - CADDR_DDR, (35): Transmit column address to Flash.
# - MODE1_DDR, (36): Transmit mode bits to Flash.
# - MODE2_DDR, (37): Transmit mode bits to Flash.
# - MODE4_DDR, (38): Transmit mode bits to Flash.
# - MODE8_DDR, (39): Transmit mode bits to Flash.
# - WRITE_DDR, (40): Transmit program data to Flash device.
# - READ_DDR, (41): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_DDR, (42): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_DDR, (43): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_DDR, (44): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_DDR, (45): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# Possible options: <STOP, CMD_SDR, RADDR_SDR, CADDR_SDR, MODE1_SDR, MODE2_SDR, MODE4_SDR, MODE8_SDR, WRITE_SDR,
# READ_SDR, LEARN_SDR, DATSZ_SDR, DUMMY_SDR, DUMMY_RWDS_SDR, JMP_ON_CS, CMD_DDR, RADDR_DDR, CADDR_DDR, MODE1_DDR,
# MODE2_DDR, MODE4_DDR, MODE8_DDR, WRITE_DDR, READ_DDR, LEARN_DDR, DATSZ_DDR, DUMMY_DDR, DUMMY_RWDS_DDR>
OPERATION_CODE: STOP
lookupTable_seq14_instr1:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq14_instr2:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq14_instr3:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq14_instr4:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq14_instr5:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq14_instr6:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq14_instr7:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
# ----------------------------------===== lookupTable_seq15_instr0 [Optional] =====-----------------------------------
# Description: Offset: 0x00000170, Width: 16b; Lookup table holds Flash command sequences 15, instruction 0
lookupTable_seq15_instr0:
# ------------------------------------------===== OPERAND [Optional] =====------------------------------------------
# Description: Offset: 0b, Width: 8b, Instruction operand. Its values depends on used instruction
OPERAND: 0
# -----------------------------------------===== NUM_PADS [Optional] =====------------------------------------------
# Description: Offset: 8b, Width: 2b, Number of pads used by instruction. Some instructions ignores this parameter.
# - 1PAD, (0): Single mode. One pad is used.
# - 2PAD, (1): Dual mode. Two pads are used.
# - 4PAD, (2): Quad mode. Four pads are used.
# - 8PAD, (3): Octal mode. Eight pads are used.
# Possible options: <1PAD, 2PAD, 4PAD, 8PAD>
NUM_PADS: 1PAD
# --------------------------------------===== OPERATION_CODE [Optional] =====---------------------------------------
# Description: Offset: 10b, Width: 6b, Instruction operation code.
# - STOP, (0): Stop execution and de-assert CS. Then, the next command sequence (to the same flash device) starts
# from instruction pointer 0.
# - CMD_SDR, (1): Transmit command code to Flash.
# - RADDR_SDR, (2): Transmit row address to Flash.
# - CADDR_SDR, (3): Transmit column address to Flash.
# - MODE1_SDR, (4): Transmit mode bits to Flash.
# - MODE2_SDR, (5): Transmit mode bits to Flash.
# - MODE4_SDR, (6): Transmit mode bits to Flash.
# - MODE8_SDR, (7): Transmit mode bits to Flash.
# - WRITE_SDR, (8): Transmit program data to Flash device.
# - READ_SDR, (9): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_SDR, (10): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_SDR, (11): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_SDR, (12): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_SDR, (13): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# - JMP_ON_CS, (31): Stop execution, de-assert CS and save operand[7:0] as the instruction start pointer for next
# sequence.Normally this instruction is used to support Execute-In-Place enhanced mode. See XIP enhanced mode for
# more details.This instruction is only allowed for AHB read commands. There is interrupt status bit set
# (INTR[IPCMDERR] or INTR[AHBCMDERR]) when using this instruction in IP command or AHB write command.
# - CMD_DDR, (33): Transmit command code to Flash.
# - RADDR_DDR, (34): Transmit row address to Flash.
# - CADDR_DDR, (35): Transmit column address to Flash.
# - MODE1_DDR, (36): Transmit mode bits to Flash.
# - MODE2_DDR, (37): Transmit mode bits to Flash.
# - MODE4_DDR, (38): Transmit mode bits to Flash.
# - MODE8_DDR, (39): Transmit mode bits to Flash.
# - WRITE_DDR, (40): Transmit program data to Flash device.
# - READ_DDR, (41): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_DDR, (42): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_DDR, (43): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_DDR, (44): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_DDR, (45): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# Possible options: <STOP, CMD_SDR, RADDR_SDR, CADDR_SDR, MODE1_SDR, MODE2_SDR, MODE4_SDR, MODE8_SDR, WRITE_SDR,
# READ_SDR, LEARN_SDR, DATSZ_SDR, DUMMY_SDR, DUMMY_RWDS_SDR, JMP_ON_CS, CMD_DDR, RADDR_DDR, CADDR_DDR, MODE1_DDR,
# MODE2_DDR, MODE4_DDR, MODE8_DDR, WRITE_DDR, READ_DDR, LEARN_DDR, DATSZ_DDR, DUMMY_DDR, DUMMY_RWDS_DDR>
OPERATION_CODE: STOP
lookupTable_seq15_instr1:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq15_instr2:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq15_instr3:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq15_instr4:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq15_instr5:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq15_instr6:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq15_instr7:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
# ---------------------------------------===== lutCustomSeq_0 [Optional] =====----------------------------------------
# Description: Offset: 0x00000180, Width: 32b; [0x180-0x1af] Customizable LUT Sequences
lutCustomSeq_0:
# ------------------------------------------===== seqNum [Optional] =====-------------------------------------------
# Description: Offset: 0b, Width: 8b, Sequence Number, valid number: 1-16
seqNum: 0
# -------------------------------------------===== seqId [Optional] =====-------------------------------------------
# Description: Offset: 8b, Width: 8b, Sequence Index, valid number: 0-15
seqId: 0
# -----------------------------------------===== reserved [Optional] =====------------------------------------------
# Description: Offset: 16b, Width: 16b, N/A
reserved: 0
# ---------------------------------------===== lutCustomSeq_1 [Optional] =====----------------------------------------
# Description: Offset: 0x00000184, Width: 32b; [0x180-0x1af] Customizable LUT Sequences
lutCustomSeq_1:
# ------------------------------------------===== seqNum [Optional] =====-------------------------------------------
# Description: Offset: 0b, Width: 8b, Sequence Number, valid number: 1-16
seqNum: 0
# -------------------------------------------===== seqId [Optional] =====-------------------------------------------
# Description: Offset: 8b, Width: 8b, Sequence Index, valid number: 0-15
seqId: 0
# -----------------------------------------===== reserved [Optional] =====------------------------------------------
# Description: Offset: 16b, Width: 16b, N/A
reserved: 0
# ---------------------------------------===== lutCustomSeq_2 [Optional] =====----------------------------------------
# Description: Offset: 0x00000188, Width: 32b; [0x180-0x1af] Customizable LUT Sequences
lutCustomSeq_2:
# ------------------------------------------===== seqNum [Optional] =====-------------------------------------------
# Description: Offset: 0b, Width: 8b, Sequence Number, valid number: 1-16
seqNum: 0
# -------------------------------------------===== seqId [Optional] =====-------------------------------------------
# Description: Offset: 8b, Width: 8b, Sequence Index, valid number: 0-15
seqId: 0
# -----------------------------------------===== reserved [Optional] =====------------------------------------------
# Description: Offset: 16b, Width: 16b, N/A
reserved: 0
# ---------------------------------------===== lutCustomSeq_3 [Optional] =====----------------------------------------
# Description: Offset: 0x0000018C, Width: 32b; [0x180-0x1af] Customizable LUT Sequences
lutCustomSeq_3:
# ------------------------------------------===== seqNum [Optional] =====-------------------------------------------
# Description: Offset: 0b, Width: 8b, Sequence Number, valid number: 1-16
seqNum: 0
# -------------------------------------------===== seqId [Optional] =====-------------------------------------------
# Description: Offset: 8b, Width: 8b, Sequence Index, valid number: 0-15
seqId: 0
# -----------------------------------------===== reserved [Optional] =====------------------------------------------
# Description: Offset: 16b, Width: 16b, N/A
reserved: 0
# ---------------------------------------===== lutCustomSeq_4 [Optional] =====----------------------------------------
# Description: Offset: 0x00000190, Width: 32b; [0x180-0x1af] Customizable LUT Sequences
lutCustomSeq_4:
# ------------------------------------------===== seqNum [Optional] =====-------------------------------------------
# Description: Offset: 0b, Width: 8b, Sequence Number, valid number: 1-16
seqNum: 0
# -------------------------------------------===== seqId [Optional] =====-------------------------------------------
# Description: Offset: 8b, Width: 8b, Sequence Index, valid number: 0-15
seqId: 0
# -----------------------------------------===== reserved [Optional] =====------------------------------------------
# Description: Offset: 16b, Width: 16b, N/A
reserved: 0
# ---------------------------------------===== lutCustomSeq_5 [Optional] =====----------------------------------------
# Description: Offset: 0x00000194, Width: 32b; [0x180-0x1af] Customizable LUT Sequences
lutCustomSeq_5:
# ------------------------------------------===== seqNum [Optional] =====-------------------------------------------
# Description: Offset: 0b, Width: 8b, Sequence Number, valid number: 1-16
seqNum: 0
# -------------------------------------------===== seqId [Optional] =====-------------------------------------------
# Description: Offset: 8b, Width: 8b, Sequence Index, valid number: 0-15
seqId: 0
# -----------------------------------------===== reserved [Optional] =====------------------------------------------
# Description: Offset: 16b, Width: 16b, N/A
reserved: 0
# ---------------------------------------===== lutCustomSeq_6 [Optional] =====----------------------------------------
# Description: Offset: 0x00000198, Width: 32b; [0x180-0x1af] Customizable LUT Sequences
lutCustomSeq_6:
# ------------------------------------------===== seqNum [Optional] =====-------------------------------------------
# Description: Offset: 0b, Width: 8b, Sequence Number, valid number: 1-16
seqNum: 0
# -------------------------------------------===== seqId [Optional] =====-------------------------------------------
# Description: Offset: 8b, Width: 8b, Sequence Index, valid number: 0-15
seqId: 0
# -----------------------------------------===== reserved [Optional] =====------------------------------------------
# Description: Offset: 16b, Width: 16b, N/A
reserved: 0
# ---------------------------------------===== lutCustomSeq_7 [Optional] =====----------------------------------------
# Description: Offset: 0x0000019C, Width: 32b; [0x180-0x1af] Customizable LUT Sequences
lutCustomSeq_7:
# ------------------------------------------===== seqNum [Optional] =====-------------------------------------------
# Description: Offset: 0b, Width: 8b, Sequence Number, valid number: 1-16
seqNum: 0
# -------------------------------------------===== seqId [Optional] =====-------------------------------------------
# Description: Offset: 8b, Width: 8b, Sequence Index, valid number: 0-15
seqId: 0
# -----------------------------------------===== reserved [Optional] =====------------------------------------------
# Description: Offset: 16b, Width: 16b, N/A
reserved: 0
# ---------------------------------------===== lutCustomSeq_8 [Optional] =====----------------------------------------
# Description: Offset: 0x000001A0, Width: 32b; [0x180-0x1af] Customizable LUT Sequences
lutCustomSeq_8:
# ------------------------------------------===== seqNum [Optional] =====-------------------------------------------
# Description: Offset: 0b, Width: 8b, Sequence Number, valid number: 1-16
seqNum: 0
# -------------------------------------------===== seqId [Optional] =====-------------------------------------------
# Description: Offset: 8b, Width: 8b, Sequence Index, valid number: 0-15
seqId: 0
# -----------------------------------------===== reserved [Optional] =====------------------------------------------
# Description: Offset: 16b, Width: 16b, N/A
reserved: 0
# ---------------------------------------===== lutCustomSeq_9 [Optional] =====----------------------------------------
# Description: Offset: 0x000001A4, Width: 32b; [0x180-0x1af] Customizable LUT Sequences
lutCustomSeq_9:
# ------------------------------------------===== seqNum [Optional] =====-------------------------------------------
# Description: Offset: 0b, Width: 8b, Sequence Number, valid number: 1-16
seqNum: 0
# -------------------------------------------===== seqId [Optional] =====-------------------------------------------
# Description: Offset: 8b, Width: 8b, Sequence Index, valid number: 0-15
seqId: 0
# -----------------------------------------===== reserved [Optional] =====------------------------------------------
# Description: Offset: 16b, Width: 16b, N/A
reserved: 0
# ---------------------------------------===== lutCustomSeq_10 [Optional] =====---------------------------------------
# Description: Offset: 0x000001A8, Width: 32b; [0x180-0x1af] Customizable LUT Sequences
lutCustomSeq_10:
# ------------------------------------------===== seqNum [Optional] =====-------------------------------------------
# Description: Offset: 0b, Width: 8b, Sequence Number, valid number: 1-16
seqNum: 0
# -------------------------------------------===== seqId [Optional] =====-------------------------------------------
# Description: Offset: 8b, Width: 8b, Sequence Index, valid number: 0-15
seqId: 0
# -----------------------------------------===== reserved [Optional] =====------------------------------------------
# Description: Offset: 16b, Width: 16b, N/A
reserved: 0
# ---------------------------------------===== lutCustomSeq_11 [Optional] =====---------------------------------------
# Description: Offset: 0x000001AC, Width: 32b; [0x180-0x1af] Customizable LUT Sequences
lutCustomSeq_11:
# ------------------------------------------===== seqNum [Optional] =====-------------------------------------------
# Description: Offset: 0b, Width: 8b, Sequence Number, valid number: 1-16
seqNum: 0
# -------------------------------------------===== seqId [Optional] =====-------------------------------------------
# Description: Offset: 8b, Width: 8b, Sequence Index, valid number: 0-15
seqId: 0
# -----------------------------------------===== reserved [Optional] =====------------------------------------------
# Description: Offset: 16b, Width: 16b, N/A
reserved: 0
# -----------------------------------------===== reserved4_0 [Optional] =====-----------------------------------------
# Description: Offset: 0x000001B0, Width: 32b; [0x1b0-0x1bf] Reserved for future use
reserved4_0: '0x00000000'
# -----------------------------------------===== reserved4_1 [Optional] =====-----------------------------------------
# Description: Offset: 0x000001B4, Width: 32b; [0x1b0-0x1bf] Reserved for future use
reserved4_1: '0x00000000'
# -----------------------------------------===== reserved4_2 [Optional] =====-----------------------------------------
# Description: Offset: 0x000001B8, Width: 32b; [0x1b0-0x1bf] Reserved for future use
reserved4_2: '0x00000000'
# -----------------------------------------===== reserved4_3 [Optional] =====-----------------------------------------
# Description: Offset: 0x000001BC, Width: 32b; [0x1b0-0x1bf] Reserved for future use
reserved4_3: '0x00000000'
# ------------------------------------------===== pageSize [Optional] =====-------------------------------------------
# Description: Offset: 0x000001C0, Width: 32b; Page size of Serial NOR
pageSize: '0x00000000'
# -----------------------------------------===== sectorSize [Optional] =====------------------------------------------
# Description: Offset: 0x000001C4, Width: 32b; Sector size of Serial NOR
sectorSize: '0x00000000'
# -------------------------------------===== ipcmdSerialClkFreq [Optional] =====--------------------------------------
# Description: Offset: 0x000001C8, Width: 8b; Clock frequency for IP command
ipcmdSerialClkFreq: '0x00'
# -------------------------------------===== isUniformBlockSize [Optional] =====--------------------------------------
# Description: Offset: 0x000001C9, Width: 8b; Sector/Block size is the same
isUniformBlockSize: '0x00'
# -----------------------------------------===== reserved0_0 [Optional] =====-----------------------------------------
# Description: Offset: 0x000001CA, Width: 8b; Reserved for future use
reserved0_0: '0x00'
# -----------------------------------------===== reserved0_1 [Optional] =====-----------------------------------------
# Description: Offset: 0x000001CB, Width: 8b; Reserved for future use
reserved0_1: '0x00'
# ----------------------------------------===== serialNorType [Optional] =====----------------------------------------
# Description: Offset: 0x000001CC, Width: 8b; Serial NOR Flash type: 0/1/2/3
serialNorType: '0x00'
# --------------------------------------===== needExitNoCmdMode [Optional] =====--------------------------------------
# Description: Offset: 0x000001CD, Width: 8b; Need to exit NoCmd mode before other IP command
needExitNoCmdMode: '0x00'
# ------------------------------------===== halfClkForNonReadCmd [Optional] =====-------------------------------------
# Description: Offset: 0x000001CE, Width: 8b; Half the Serial Clock for non-read command: true/false
halfClkForNonReadCmd: '0x00'
# ------------------------------------===== needRestoreNoCmdMode [Optional] =====-------------------------------------
# Description: Offset: 0x000001CF, Width: 8b; Need to Restore NoCmd mode after IP command execution
needRestoreNoCmdMode: '0x00'
# ------------------------------------------===== blockSize [Optional] =====------------------------------------------
# Description: Offset: 0x000001D0, Width: 32b; Block size
blockSize: '0x00000000'
# -----------------------------------------===== reserve2_0 [Optional] =====------------------------------------------
# Description: Offset: 0x000001D4, Width: 32b; Reserved for future use
reserve2_0: '0x00000000'
# -----------------------------------------===== reserve2_1 [Optional] =====------------------------------------------
# Description: Offset: 0x000001D8, Width: 32b; Reserved for future use
reserve2_1: '0x00000000'
# -----------------------------------------===== reserve2_2 [Optional] =====------------------------------------------
# Description: Offset: 0x000001DC, Width: 32b; Reserved for future use
reserve2_2: '0x00000000'
# -----------------------------------------===== reserve2_3 [Optional] =====------------------------------------------
# Description: Offset: 0x000001E0, Width: 32b; Reserved for future use
reserve2_3: '0x00000000'
# -----------------------------------------===== reserve2_4 [Optional] =====------------------------------------------
# Description: Offset: 0x000001E4, Width: 32b; Reserved for future use
reserve2_4: '0x00000000'
# -----------------------------------------===== reserve2_5 [Optional] =====------------------------------------------
# Description: Offset: 0x000001E8, Width: 32b; Reserved for future use
reserve2_5: '0x00000000'
# -----------------------------------------===== reserve2_6 [Optional] =====------------------------------------------
# Description: Offset: 0x000001EC, Width: 32b; Reserved for future use
reserve2_6: '0x00000000'
# -----------------------------------------===== reserve2_7 [Optional] =====------------------------------------------
# Description: Offset: 0x000001F0, Width: 32b; Reserved for future use
reserve2_7: '0x00000000'
# -----------------------------------------===== reserve2_8 [Optional] =====------------------------------------------
# Description: Offset: 0x000001F4, Width: 32b; Reserved for future use
reserve2_8: '0x00000000'
# -----------------------------------------===== reserve2_9 [Optional] =====------------------------------------------
# Description: Offset: 0x000001F8, Width: 32b; Reserved for future use
reserve2_9: '0x00000000'
# -----------------------------------------===== reserve2_10 [Optional] =====-----------------------------------------
# Description: Offset: 0x000001FC, Width: 32b; Reserved for future use
reserve2_10: '0x00000000'
FCB for mimxrt1175, Revision: a0 and flexspi_nor#
FCB for mimxrt1175, Revision: a0 and flexspi_nor JSON schema
FCB for mimxrt1175, Revision: a0 and flexspi_nor YAML configuration template
# ================================= FCB for mimxrt1175, Revision: a0 and flexspi_nor =================================
# ======================================================================================================================
# == FCB for mimxrt1175, Revision: a0 and flexspi_nor ==
# ======================================================================================================================
# -------------------------------------===== The chip family name [Required] =====--------------------------------------
# Description: NXP chip family identifier.
family: CHOOSE_FROM_TABLE
# -----------------------------------------===== MCU revision [Optional] =====------------------------------------------
# Description: Revision of silicon. The 'latest' name, means most current revision.
# Possible options: <a0, latest>
revision: a0
# ------------------------------------------===== Memory type [Required] =====------------------------------------------
# Description: Specify type of memory used by FCB description.
# Possible options: <flexspi_nor>
type: flexspi_nor
# ------------------------------------------===== mimxrt1175 [Required] =====-------------------------------------------
fcb_settings:
# ---------------------------------------------===== tag [Optional] =====---------------------------------------------
# Description: Offset: 0x00000000, Width: 32b; [0x000-0x003] Tag, fixed value 0x42464346UL
tag: '0x42464346'
# -------------------------------------------===== version [Optional] =====-------------------------------------------
# Description: Offset: 0x00000004, Width: 32b; [0x004-0x007] Version,[31:24] -'V', [23:16] - Major, [15:8] - Minor,
# [7:0] - bugfix
version: '0x56010400'
# ------------------------------------------===== reserved0 [Optional] =====------------------------------------------
# Description: Offset: 0x00000008, Width: 32b; [0x008-0x00b] Reserved for future use
reserved0: '0x00000000'
# --------------------------------------===== readSampleClkSrc [Optional] =====---------------------------------------
# Description: Offset: 0x0000000C, Width: 8b; [0x00c-0x00c] Read Sample Clock Source, valid value: 0/1/3
readSampleClkSrc: '0x00'
# -----------------------------------------===== csHoldTime [Optional] =====------------------------------------------
# Description: Offset: 0x0000000D, Width: 8b; [0x00d-0x00d] CS hold time, default value: 3
csHoldTime: '0x00'
# -----------------------------------------===== csSetupTime [Optional] =====-----------------------------------------
# Description: Offset: 0x0000000E, Width: 8b; [0x00e-0x00e] CS setup time, default value: 3
csSetupTime: '0x00'
# -------------------------------------===== columnAddressWidth [Optional] =====--------------------------------------
# Description: Offset: 0x0000000F, Width: 8b; [0x00f-0x00f] Column Address with, for HyperBus protocol, it is fixed
# to 3, For Serial NAND, need to refer to datasheet
columnAddressWidth: '0x00'
# -------------------------------------===== deviceModeCfgEnable [Optional] =====-------------------------------------
# Description: Offset: 0x00000010, Width: 8b; [0x010-0x010] Device Mode Configure enable flag, 1 - Enable, 0 -
# Disable
deviceModeCfgEnable: '0x00'
# ---------------------------------------===== deviceModeType [Optional] =====----------------------------------------
# Description: Offset: 0x00000011, Width: 8b; [0x011-0x011] Specify the configuration command type:Quad Enable,
# DPI/QPI/OPI switch, Generic configuration, etc.
deviceModeType: '0x00'
# -------------------------------------===== waitTimeCfgCommands [Optional] =====-------------------------------------
# Description: Offset: 0x00000012, Width: 16b; [0x012-0x013] Wait time for all configuration commands, unit: 100us,
# Used for DPI/QPI/OPI switch or reset command
waitTimeCfgCommands: '0x0000'
# ----------------------------------------===== deviceModeSeq [Optional] =====----------------------------------------
# Description: Offset: 0x00000014, Width: 32b; [0x014-0x017] Device mode sequence info, [7:0] - LUT sequence id,
# [15:8] - LUt sequence number, [31:16] Reserved
deviceModeSeq:
# ------------------------------------------===== seqNum [Optional] =====-------------------------------------------
# Description: Offset: 0b, Width: 8b, Sequence Number, valid number: 1-16
seqNum: 0
# -------------------------------------------===== seqId [Optional] =====-------------------------------------------
# Description: Offset: 8b, Width: 8b, Sequence Index, valid number: 0-15
seqId: 0
# -----------------------------------------===== reserved [Optional] =====------------------------------------------
# Description: Offset: 16b, Width: 16b, N/A
reserved: 0
# ----------------------------------------===== deviceModeArg [Optional] =====----------------------------------------
# Description: Offset: 0x00000018, Width: 32b; [0x018-0x01b] Argument/Parameter for device configuration
deviceModeArg: '0x00000000'
# ---------------------------------------===== configCmdEnable [Optional] =====---------------------------------------
# Description: Offset: 0x0000001C, Width: 8b; [0x01c-0x01c] Configure command Enable Flag, 1 - Enable, 0 - Disable
configCmdEnable: '0x00'
# --------------------------------------===== configModeType_0 [Optional] =====---------------------------------------
# Description: Offset: 0x0000001D, Width: 8b; [0x01d-0x01f] Configure Mode Type, similar as deviceModeTpe
configModeType_0: '0x00'
# --------------------------------------===== configModeType_1 [Optional] =====---------------------------------------
# Description: Offset: 0x0000001E, Width: 8b; [0x01d-0x01f] Configure Mode Type, similar as deviceModeTpe
configModeType_1: '0x00'
# --------------------------------------===== configModeType_2 [Optional] =====---------------------------------------
# Description: Offset: 0x0000001F, Width: 8b; [0x01d-0x01f] Configure Mode Type, similar as deviceModeTpe
configModeType_2: '0x00'
# ---------------------------------------===== configCmdSeqs_0 [Optional] =====---------------------------------------
# Description: Offset: 0x00000020, Width: 32b; [0x020-0x02b] Sequence info for Device Configuration command, similar
# as deviceModeSeq
configCmdSeqs_0:
# ------------------------------------------===== seqNum [Optional] =====-------------------------------------------
# Description: Offset: 0b, Width: 8b, Sequence Number, valid number: 1-16
seqNum: 0
# -------------------------------------------===== seqId [Optional] =====-------------------------------------------
# Description: Offset: 8b, Width: 8b, Sequence Index, valid number: 0-15
seqId: 0
# -----------------------------------------===== reserved [Optional] =====------------------------------------------
# Description: Offset: 16b, Width: 16b, N/A
reserved: 0
# ---------------------------------------===== configCmdSeqs_1 [Optional] =====---------------------------------------
# Description: Offset: 0x00000024, Width: 32b; [0x020-0x02b] Sequence info for Device Configuration command, similar
# as deviceModeSeq
configCmdSeqs_1:
# ------------------------------------------===== seqNum [Optional] =====-------------------------------------------
# Description: Offset: 0b, Width: 8b, Sequence Number, valid number: 1-16
seqNum: 0
# -------------------------------------------===== seqId [Optional] =====-------------------------------------------
# Description: Offset: 8b, Width: 8b, Sequence Index, valid number: 0-15
seqId: 0
# -----------------------------------------===== reserved [Optional] =====------------------------------------------
# Description: Offset: 16b, Width: 16b, N/A
reserved: 0
# ---------------------------------------===== configCmdSeqs_2 [Optional] =====---------------------------------------
# Description: Offset: 0x00000028, Width: 32b; [0x020-0x02b] Sequence info for Device Configuration command, similar
# as deviceModeSeq
configCmdSeqs_2:
# ------------------------------------------===== seqNum [Optional] =====-------------------------------------------
# Description: Offset: 0b, Width: 8b, Sequence Number, valid number: 1-16
seqNum: 0
# -------------------------------------------===== seqId [Optional] =====-------------------------------------------
# Description: Offset: 8b, Width: 8b, Sequence Index, valid number: 0-15
seqId: 0
# -----------------------------------------===== reserved [Optional] =====------------------------------------------
# Description: Offset: 16b, Width: 16b, N/A
reserved: 0
# ------------------------------------------===== reserved1 [Optional] =====------------------------------------------
# Description: Offset: 0x0000002C, Width: 32b; [0x02c-0x02f] Reserved for future use
reserved1: '0x00000000'
# ---------------------------------------===== configCmdArgs_0 [Optional] =====---------------------------------------
# Description: Offset: 0x00000030, Width: 32b; [0x030-0x03b] Arguments/Parameters for device Configuration commands
configCmdArgs_0: '0x00000000'
# ---------------------------------------===== configCmdArgs_1 [Optional] =====---------------------------------------
# Description: Offset: 0x00000034, Width: 32b; [0x030-0x03b] Arguments/Parameters for device Configuration commands
configCmdArgs_1: '0x00000000'
# ---------------------------------------===== configCmdArgs_2 [Optional] =====---------------------------------------
# Description: Offset: 0x00000038, Width: 32b; [0x030-0x03b] Arguments/Parameters for device Configuration commands
configCmdArgs_2: '0x00000000'
# ------------------------------------------===== reserved2 [Optional] =====------------------------------------------
# Description: Offset: 0x0000003C, Width: 32b; [0x03c-0x03f] Reserved for future use
reserved2: '0x00000000'
# ------------------------------------===== controllerMiscOption [Optional] =====-------------------------------------
# Description: Offset: 0x00000040, Width: 32b; [0x040-0x043] Controller Misc Options, see Misc feature bit
# definitions for more details
controllerMiscOption: '0x00000000'
# -----------------------------------------===== deviceType [Optional] =====------------------------------------------
# Description: Offset: 0x00000044, Width: 8b; [0x044-0x044] Device Type: See Flash Type Definition for more details
deviceType: '0x00'
# ----------------------------------------===== sflashPadType [Optional] =====----------------------------------------
# Description: Offset: 0x00000045, Width: 8b; [0x045-0x045] Serial Flash Pad Type: 1 - Single, 2 - Dual, 4 - Quad, 8
# - Octal
sflashPadType: '0x00'
# ----------------------------------------===== serialClkFreq [Optional] =====----------------------------------------
# Description: Offset: 0x00000046, Width: 8b; [0x046-0x046] Serial Flash Frequency, device specific definitions, See
# System Boot Chapter for more details
serialClkFreq: '0x00'
# -------------------------------------===== lutCustomSeqEnable [Optional] =====--------------------------------------
# Description: Offset: 0x00000047, Width: 8b; [0x047-0x047] LUT customization Enable, it is required if the
# program/erase cannot be done using 1 LUT sequence, currently, only applicable to HyperFLASH
lutCustomSeqEnable: '0x00'
# -----------------------------------------===== reserved3_0 [Optional] =====-----------------------------------------
# Description: Offset: 0x00000048, Width: 32b; [0x048-0x04f] Reserved for future use
reserved3_0: '0x00000000'
# -----------------------------------------===== reserved3_1 [Optional] =====-----------------------------------------
# Description: Offset: 0x0000004C, Width: 32b; [0x048-0x04f] Reserved for future use
reserved3_1: '0x00000000'
# ----------------------------------------===== sflashA1Size [Optional] =====-----------------------------------------
# Description: Offset: 0x00000050, Width: 32b; [0x050-0x053] Size of Flash connected to A1
sflashA1Size: '0x00000000'
# ----------------------------------------===== sflashA2Size [Optional] =====-----------------------------------------
# Description: Offset: 0x00000054, Width: 32b; [0x054-0x057] Size of Flash connected to A2
sflashA2Size: '0x00000000'
# ----------------------------------------===== sflashB1Size [Optional] =====-----------------------------------------
# Description: Offset: 0x00000058, Width: 32b; [0x058-0x05b] Size of Flash connected to B1
sflashB1Size: '0x00000000'
# ----------------------------------------===== sflashB2Size [Optional] =====-----------------------------------------
# Description: Offset: 0x0000005C, Width: 32b; [0x05c-0x05f] Size of Flash connected to B2
sflashB2Size: '0x00000000'
# ------------------------------------===== csPadSettingOverride [Optional] =====-------------------------------------
# Description: Offset: 0x00000060, Width: 32b; [0x060-0x063] CS pad setting override value
csPadSettingOverride: '0x00000000'
# -----------------------------------===== sclkPadSettingOverride [Optional] =====------------------------------------
# Description: Offset: 0x00000064, Width: 32b; [0x064-0x067] SCK pad setting override value
sclkPadSettingOverride: '0x00000000'
# -----------------------------------===== dataPadSettingOverride [Optional] =====------------------------------------
# Description: Offset: 0x00000068, Width: 32b; [0x068-0x06b] data pad setting override value
dataPadSettingOverride: '0x00000000'
# ------------------------------------===== dqsPadSettingOverride [Optional] =====------------------------------------
# Description: Offset: 0x0000006C, Width: 32b; [0x06c-0x06f] DQS pad setting override value
dqsPadSettingOverride: '0x00000000'
# -----------------------------------------===== timeoutInMs [Optional] =====-----------------------------------------
# Description: Offset: 0x00000070, Width: 32b; [0x070-0x073] Timeout threshold for read status command
timeoutInMs: '0x00000000'
# ---------------------------------------===== commandInterval [Optional] =====---------------------------------------
# Description: Offset: 0x00000074, Width: 32b; [0x074-0x077] CS deselect interval between two commands
commandInterval: '0x00000000'
# ---------------------------------------===== dataValidTime_0 [Optional] =====---------------------------------------
# Description: Offset: 0x00000078, Width: 16b; [0x078-0x07b] CLK edge to data valid time for PORT A and PORT B, in
# terms of 0.1ns
dataValidTime_0: '0x0000'
# ---------------------------------------===== dataValidTime_1 [Optional] =====---------------------------------------
# Description: Offset: 0x0000007A, Width: 16b; [0x078-0x07b] CLK edge to data valid time for PORT A and PORT B, in
# terms of 0.1ns
dataValidTime_1: '0x0000'
# -----------------------------------------===== busyOffset [Optional] =====------------------------------------------
# Description: Offset: 0x0000007C, Width: 16b; [0x07c-0x07d] Busy offset, valid value: 0-31
busyOffset: '0x0000'
# ---------------------------------------===== busyBitPolarity [Optional] =====---------------------------------------
# Description: Offset: 0x0000007E, Width: 16b; [0x07e-0x07f] Busy flag polarity, 0 - busy flag is 1 when flash device
# is busy, 1 - busy flag is 0 when flash device is busy
busyBitPolarity: '0x0000'
# -----------------------------------===== lookupTable_seq0_instr0 [Optional] =====-----------------------------------
# Description: Offset: 0x00000080, Width: 16b; Lookup table holds Flash command sequences 0, instruction 0
lookupTable_seq0_instr0:
# ------------------------------------------===== OPERAND [Optional] =====------------------------------------------
# Description: Offset: 0b, Width: 8b, Instruction operand. Its values depends on used instruction
OPERAND: 0
# -----------------------------------------===== NUM_PADS [Optional] =====------------------------------------------
# Description: Offset: 8b, Width: 2b, Number of pads used by instruction. Some instructions ignores this parameter.
# - 1PAD, (0): Single mode. One pad is used.
# - 2PAD, (1): Dual mode. Two pads are used.
# - 4PAD, (2): Quad mode. Four pads are used.
# - 8PAD, (3): Octal mode. Eight pads are used.
# Possible options: <1PAD, 2PAD, 4PAD, 8PAD>
NUM_PADS: 1PAD
# --------------------------------------===== OPERATION_CODE [Optional] =====---------------------------------------
# Description: Offset: 10b, Width: 6b, Instruction operation code.
# - STOP, (0): Stop execution and de-assert CS. Then, the next command sequence (to the same flash device) starts
# from instruction pointer 0.
# - CMD_SDR, (1): Transmit command code to Flash.
# - RADDR_SDR, (2): Transmit row address to Flash.
# - CADDR_SDR, (3): Transmit column address to Flash.
# - MODE1_SDR, (4): Transmit mode bits to Flash.
# - MODE2_SDR, (5): Transmit mode bits to Flash.
# - MODE4_SDR, (6): Transmit mode bits to Flash.
# - MODE8_SDR, (7): Transmit mode bits to Flash.
# - WRITE_SDR, (8): Transmit program data to Flash device.
# - READ_SDR, (9): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_SDR, (10): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_SDR, (11): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_SDR, (12): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_SDR, (13): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# - JMP_ON_CS, (31): Stop execution, de-assert CS and save operand[7:0] as the instruction start pointer for next
# sequence.Normally this instruction is used to support Execute-In-Place enhanced mode. See XIP enhanced mode for
# more details.This instruction is only allowed for AHB read commands. There is interrupt status bit set
# (INTR[IPCMDERR] or INTR[AHBCMDERR]) when using this instruction in IP command or AHB write command.
# - CMD_DDR, (33): Transmit command code to Flash.
# - RADDR_DDR, (34): Transmit row address to Flash.
# - CADDR_DDR, (35): Transmit column address to Flash.
# - MODE1_DDR, (36): Transmit mode bits to Flash.
# - MODE2_DDR, (37): Transmit mode bits to Flash.
# - MODE4_DDR, (38): Transmit mode bits to Flash.
# - MODE8_DDR, (39): Transmit mode bits to Flash.
# - WRITE_DDR, (40): Transmit program data to Flash device.
# - READ_DDR, (41): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_DDR, (42): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_DDR, (43): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_DDR, (44): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_DDR, (45): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# Possible options: <STOP, CMD_SDR, RADDR_SDR, CADDR_SDR, MODE1_SDR, MODE2_SDR, MODE4_SDR, MODE8_SDR, WRITE_SDR,
# READ_SDR, LEARN_SDR, DATSZ_SDR, DUMMY_SDR, DUMMY_RWDS_SDR, JMP_ON_CS, CMD_DDR, RADDR_DDR, CADDR_DDR, MODE1_DDR,
# MODE2_DDR, MODE4_DDR, MODE8_DDR, WRITE_DDR, READ_DDR, LEARN_DDR, DATSZ_DDR, DUMMY_DDR, DUMMY_RWDS_DDR>
OPERATION_CODE: STOP
lookupTable_seq0_instr1:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq0_instr2:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq0_instr3:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq0_instr4:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq0_instr5:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq0_instr6:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq0_instr7:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
# -----------------------------------===== lookupTable_seq1_instr0 [Optional] =====-----------------------------------
# Description: Offset: 0x00000090, Width: 16b; Lookup table holds Flash command sequences 1, instruction 0
lookupTable_seq1_instr0:
# ------------------------------------------===== OPERAND [Optional] =====------------------------------------------
# Description: Offset: 0b, Width: 8b, Instruction operand. Its values depends on used instruction
OPERAND: 0
# -----------------------------------------===== NUM_PADS [Optional] =====------------------------------------------
# Description: Offset: 8b, Width: 2b, Number of pads used by instruction. Some instructions ignores this parameter.
# - 1PAD, (0): Single mode. One pad is used.
# - 2PAD, (1): Dual mode. Two pads are used.
# - 4PAD, (2): Quad mode. Four pads are used.
# - 8PAD, (3): Octal mode. Eight pads are used.
# Possible options: <1PAD, 2PAD, 4PAD, 8PAD>
NUM_PADS: 1PAD
# --------------------------------------===== OPERATION_CODE [Optional] =====---------------------------------------
# Description: Offset: 10b, Width: 6b, Instruction operation code.
# - STOP, (0): Stop execution and de-assert CS. Then, the next command sequence (to the same flash device) starts
# from instruction pointer 0.
# - CMD_SDR, (1): Transmit command code to Flash.
# - RADDR_SDR, (2): Transmit row address to Flash.
# - CADDR_SDR, (3): Transmit column address to Flash.
# - MODE1_SDR, (4): Transmit mode bits to Flash.
# - MODE2_SDR, (5): Transmit mode bits to Flash.
# - MODE4_SDR, (6): Transmit mode bits to Flash.
# - MODE8_SDR, (7): Transmit mode bits to Flash.
# - WRITE_SDR, (8): Transmit program data to Flash device.
# - READ_SDR, (9): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_SDR, (10): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_SDR, (11): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_SDR, (12): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_SDR, (13): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# - JMP_ON_CS, (31): Stop execution, de-assert CS and save operand[7:0] as the instruction start pointer for next
# sequence.Normally this instruction is used to support Execute-In-Place enhanced mode. See XIP enhanced mode for
# more details.This instruction is only allowed for AHB read commands. There is interrupt status bit set
# (INTR[IPCMDERR] or INTR[AHBCMDERR]) when using this instruction in IP command or AHB write command.
# - CMD_DDR, (33): Transmit command code to Flash.
# - RADDR_DDR, (34): Transmit row address to Flash.
# - CADDR_DDR, (35): Transmit column address to Flash.
# - MODE1_DDR, (36): Transmit mode bits to Flash.
# - MODE2_DDR, (37): Transmit mode bits to Flash.
# - MODE4_DDR, (38): Transmit mode bits to Flash.
# - MODE8_DDR, (39): Transmit mode bits to Flash.
# - WRITE_DDR, (40): Transmit program data to Flash device.
# - READ_DDR, (41): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_DDR, (42): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_DDR, (43): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_DDR, (44): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_DDR, (45): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# Possible options: <STOP, CMD_SDR, RADDR_SDR, CADDR_SDR, MODE1_SDR, MODE2_SDR, MODE4_SDR, MODE8_SDR, WRITE_SDR,
# READ_SDR, LEARN_SDR, DATSZ_SDR, DUMMY_SDR, DUMMY_RWDS_SDR, JMP_ON_CS, CMD_DDR, RADDR_DDR, CADDR_DDR, MODE1_DDR,
# MODE2_DDR, MODE4_DDR, MODE8_DDR, WRITE_DDR, READ_DDR, LEARN_DDR, DATSZ_DDR, DUMMY_DDR, DUMMY_RWDS_DDR>
OPERATION_CODE: STOP
lookupTable_seq1_instr1:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq1_instr2:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq1_instr3:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq1_instr4:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq1_instr5:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq1_instr6:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq1_instr7:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
# -----------------------------------===== lookupTable_seq2_instr0 [Optional] =====-----------------------------------
# Description: Offset: 0x000000A0, Width: 16b; Lookup table holds Flash command sequences 2, instruction 0
lookupTable_seq2_instr0:
# ------------------------------------------===== OPERAND [Optional] =====------------------------------------------
# Description: Offset: 0b, Width: 8b, Instruction operand. Its values depends on used instruction
OPERAND: 0
# -----------------------------------------===== NUM_PADS [Optional] =====------------------------------------------
# Description: Offset: 8b, Width: 2b, Number of pads used by instruction. Some instructions ignores this parameter.
# - 1PAD, (0): Single mode. One pad is used.
# - 2PAD, (1): Dual mode. Two pads are used.
# - 4PAD, (2): Quad mode. Four pads are used.
# - 8PAD, (3): Octal mode. Eight pads are used.
# Possible options: <1PAD, 2PAD, 4PAD, 8PAD>
NUM_PADS: 1PAD
# --------------------------------------===== OPERATION_CODE [Optional] =====---------------------------------------
# Description: Offset: 10b, Width: 6b, Instruction operation code.
# - STOP, (0): Stop execution and de-assert CS. Then, the next command sequence (to the same flash device) starts
# from instruction pointer 0.
# - CMD_SDR, (1): Transmit command code to Flash.
# - RADDR_SDR, (2): Transmit row address to Flash.
# - CADDR_SDR, (3): Transmit column address to Flash.
# - MODE1_SDR, (4): Transmit mode bits to Flash.
# - MODE2_SDR, (5): Transmit mode bits to Flash.
# - MODE4_SDR, (6): Transmit mode bits to Flash.
# - MODE8_SDR, (7): Transmit mode bits to Flash.
# - WRITE_SDR, (8): Transmit program data to Flash device.
# - READ_SDR, (9): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_SDR, (10): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_SDR, (11): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_SDR, (12): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_SDR, (13): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# - JMP_ON_CS, (31): Stop execution, de-assert CS and save operand[7:0] as the instruction start pointer for next
# sequence.Normally this instruction is used to support Execute-In-Place enhanced mode. See XIP enhanced mode for
# more details.This instruction is only allowed for AHB read commands. There is interrupt status bit set
# (INTR[IPCMDERR] or INTR[AHBCMDERR]) when using this instruction in IP command or AHB write command.
# - CMD_DDR, (33): Transmit command code to Flash.
# - RADDR_DDR, (34): Transmit row address to Flash.
# - CADDR_DDR, (35): Transmit column address to Flash.
# - MODE1_DDR, (36): Transmit mode bits to Flash.
# - MODE2_DDR, (37): Transmit mode bits to Flash.
# - MODE4_DDR, (38): Transmit mode bits to Flash.
# - MODE8_DDR, (39): Transmit mode bits to Flash.
# - WRITE_DDR, (40): Transmit program data to Flash device.
# - READ_DDR, (41): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_DDR, (42): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_DDR, (43): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_DDR, (44): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_DDR, (45): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# Possible options: <STOP, CMD_SDR, RADDR_SDR, CADDR_SDR, MODE1_SDR, MODE2_SDR, MODE4_SDR, MODE8_SDR, WRITE_SDR,
# READ_SDR, LEARN_SDR, DATSZ_SDR, DUMMY_SDR, DUMMY_RWDS_SDR, JMP_ON_CS, CMD_DDR, RADDR_DDR, CADDR_DDR, MODE1_DDR,
# MODE2_DDR, MODE4_DDR, MODE8_DDR, WRITE_DDR, READ_DDR, LEARN_DDR, DATSZ_DDR, DUMMY_DDR, DUMMY_RWDS_DDR>
OPERATION_CODE: STOP
lookupTable_seq2_instr1:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq2_instr2:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq2_instr3:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq2_instr4:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq2_instr5:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq2_instr6:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq2_instr7:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
# -----------------------------------===== lookupTable_seq3_instr0 [Optional] =====-----------------------------------
# Description: Offset: 0x000000B0, Width: 16b; Lookup table holds Flash command sequences 3, instruction 0
lookupTable_seq3_instr0:
# ------------------------------------------===== OPERAND [Optional] =====------------------------------------------
# Description: Offset: 0b, Width: 8b, Instruction operand. Its values depends on used instruction
OPERAND: 0
# -----------------------------------------===== NUM_PADS [Optional] =====------------------------------------------
# Description: Offset: 8b, Width: 2b, Number of pads used by instruction. Some instructions ignores this parameter.
# - 1PAD, (0): Single mode. One pad is used.
# - 2PAD, (1): Dual mode. Two pads are used.
# - 4PAD, (2): Quad mode. Four pads are used.
# - 8PAD, (3): Octal mode. Eight pads are used.
# Possible options: <1PAD, 2PAD, 4PAD, 8PAD>
NUM_PADS: 1PAD
# --------------------------------------===== OPERATION_CODE [Optional] =====---------------------------------------
# Description: Offset: 10b, Width: 6b, Instruction operation code.
# - STOP, (0): Stop execution and de-assert CS. Then, the next command sequence (to the same flash device) starts
# from instruction pointer 0.
# - CMD_SDR, (1): Transmit command code to Flash.
# - RADDR_SDR, (2): Transmit row address to Flash.
# - CADDR_SDR, (3): Transmit column address to Flash.
# - MODE1_SDR, (4): Transmit mode bits to Flash.
# - MODE2_SDR, (5): Transmit mode bits to Flash.
# - MODE4_SDR, (6): Transmit mode bits to Flash.
# - MODE8_SDR, (7): Transmit mode bits to Flash.
# - WRITE_SDR, (8): Transmit program data to Flash device.
# - READ_SDR, (9): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_SDR, (10): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_SDR, (11): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_SDR, (12): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_SDR, (13): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# - JMP_ON_CS, (31): Stop execution, de-assert CS and save operand[7:0] as the instruction start pointer for next
# sequence.Normally this instruction is used to support Execute-In-Place enhanced mode. See XIP enhanced mode for
# more details.This instruction is only allowed for AHB read commands. There is interrupt status bit set
# (INTR[IPCMDERR] or INTR[AHBCMDERR]) when using this instruction in IP command or AHB write command.
# - CMD_DDR, (33): Transmit command code to Flash.
# - RADDR_DDR, (34): Transmit row address to Flash.
# - CADDR_DDR, (35): Transmit column address to Flash.
# - MODE1_DDR, (36): Transmit mode bits to Flash.
# - MODE2_DDR, (37): Transmit mode bits to Flash.
# - MODE4_DDR, (38): Transmit mode bits to Flash.
# - MODE8_DDR, (39): Transmit mode bits to Flash.
# - WRITE_DDR, (40): Transmit program data to Flash device.
# - READ_DDR, (41): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_DDR, (42): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_DDR, (43): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_DDR, (44): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_DDR, (45): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# Possible options: <STOP, CMD_SDR, RADDR_SDR, CADDR_SDR, MODE1_SDR, MODE2_SDR, MODE4_SDR, MODE8_SDR, WRITE_SDR,
# READ_SDR, LEARN_SDR, DATSZ_SDR, DUMMY_SDR, DUMMY_RWDS_SDR, JMP_ON_CS, CMD_DDR, RADDR_DDR, CADDR_DDR, MODE1_DDR,
# MODE2_DDR, MODE4_DDR, MODE8_DDR, WRITE_DDR, READ_DDR, LEARN_DDR, DATSZ_DDR, DUMMY_DDR, DUMMY_RWDS_DDR>
OPERATION_CODE: STOP
lookupTable_seq3_instr1:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq3_instr2:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq3_instr3:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq3_instr4:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq3_instr5:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq3_instr6:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq3_instr7:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
# -----------------------------------===== lookupTable_seq4_instr0 [Optional] =====-----------------------------------
# Description: Offset: 0x000000C0, Width: 16b; Lookup table holds Flash command sequences 4, instruction 0
lookupTable_seq4_instr0:
# ------------------------------------------===== OPERAND [Optional] =====------------------------------------------
# Description: Offset: 0b, Width: 8b, Instruction operand. Its values depends on used instruction
OPERAND: 0
# -----------------------------------------===== NUM_PADS [Optional] =====------------------------------------------
# Description: Offset: 8b, Width: 2b, Number of pads used by instruction. Some instructions ignores this parameter.
# - 1PAD, (0): Single mode. One pad is used.
# - 2PAD, (1): Dual mode. Two pads are used.
# - 4PAD, (2): Quad mode. Four pads are used.
# - 8PAD, (3): Octal mode. Eight pads are used.
# Possible options: <1PAD, 2PAD, 4PAD, 8PAD>
NUM_PADS: 1PAD
# --------------------------------------===== OPERATION_CODE [Optional] =====---------------------------------------
# Description: Offset: 10b, Width: 6b, Instruction operation code.
# - STOP, (0): Stop execution and de-assert CS. Then, the next command sequence (to the same flash device) starts
# from instruction pointer 0.
# - CMD_SDR, (1): Transmit command code to Flash.
# - RADDR_SDR, (2): Transmit row address to Flash.
# - CADDR_SDR, (3): Transmit column address to Flash.
# - MODE1_SDR, (4): Transmit mode bits to Flash.
# - MODE2_SDR, (5): Transmit mode bits to Flash.
# - MODE4_SDR, (6): Transmit mode bits to Flash.
# - MODE8_SDR, (7): Transmit mode bits to Flash.
# - WRITE_SDR, (8): Transmit program data to Flash device.
# - READ_SDR, (9): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_SDR, (10): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_SDR, (11): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_SDR, (12): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_SDR, (13): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# - JMP_ON_CS, (31): Stop execution, de-assert CS and save operand[7:0] as the instruction start pointer for next
# sequence.Normally this instruction is used to support Execute-In-Place enhanced mode. See XIP enhanced mode for
# more details.This instruction is only allowed for AHB read commands. There is interrupt status bit set
# (INTR[IPCMDERR] or INTR[AHBCMDERR]) when using this instruction in IP command or AHB write command.
# - CMD_DDR, (33): Transmit command code to Flash.
# - RADDR_DDR, (34): Transmit row address to Flash.
# - CADDR_DDR, (35): Transmit column address to Flash.
# - MODE1_DDR, (36): Transmit mode bits to Flash.
# - MODE2_DDR, (37): Transmit mode bits to Flash.
# - MODE4_DDR, (38): Transmit mode bits to Flash.
# - MODE8_DDR, (39): Transmit mode bits to Flash.
# - WRITE_DDR, (40): Transmit program data to Flash device.
# - READ_DDR, (41): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_DDR, (42): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_DDR, (43): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_DDR, (44): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_DDR, (45): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# Possible options: <STOP, CMD_SDR, RADDR_SDR, CADDR_SDR, MODE1_SDR, MODE2_SDR, MODE4_SDR, MODE8_SDR, WRITE_SDR,
# READ_SDR, LEARN_SDR, DATSZ_SDR, DUMMY_SDR, DUMMY_RWDS_SDR, JMP_ON_CS, CMD_DDR, RADDR_DDR, CADDR_DDR, MODE1_DDR,
# MODE2_DDR, MODE4_DDR, MODE8_DDR, WRITE_DDR, READ_DDR, LEARN_DDR, DATSZ_DDR, DUMMY_DDR, DUMMY_RWDS_DDR>
OPERATION_CODE: STOP
lookupTable_seq4_instr1:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq4_instr2:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq4_instr3:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq4_instr4:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq4_instr5:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq4_instr6:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq4_instr7:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
# -----------------------------------===== lookupTable_seq5_instr0 [Optional] =====-----------------------------------
# Description: Offset: 0x000000D0, Width: 16b; Lookup table holds Flash command sequences 5, instruction 0
lookupTable_seq5_instr0:
# ------------------------------------------===== OPERAND [Optional] =====------------------------------------------
# Description: Offset: 0b, Width: 8b, Instruction operand. Its values depends on used instruction
OPERAND: 0
# -----------------------------------------===== NUM_PADS [Optional] =====------------------------------------------
# Description: Offset: 8b, Width: 2b, Number of pads used by instruction. Some instructions ignores this parameter.
# - 1PAD, (0): Single mode. One pad is used.
# - 2PAD, (1): Dual mode. Two pads are used.
# - 4PAD, (2): Quad mode. Four pads are used.
# - 8PAD, (3): Octal mode. Eight pads are used.
# Possible options: <1PAD, 2PAD, 4PAD, 8PAD>
NUM_PADS: 1PAD
# --------------------------------------===== OPERATION_CODE [Optional] =====---------------------------------------
# Description: Offset: 10b, Width: 6b, Instruction operation code.
# - STOP, (0): Stop execution and de-assert CS. Then, the next command sequence (to the same flash device) starts
# from instruction pointer 0.
# - CMD_SDR, (1): Transmit command code to Flash.
# - RADDR_SDR, (2): Transmit row address to Flash.
# - CADDR_SDR, (3): Transmit column address to Flash.
# - MODE1_SDR, (4): Transmit mode bits to Flash.
# - MODE2_SDR, (5): Transmit mode bits to Flash.
# - MODE4_SDR, (6): Transmit mode bits to Flash.
# - MODE8_SDR, (7): Transmit mode bits to Flash.
# - WRITE_SDR, (8): Transmit program data to Flash device.
# - READ_SDR, (9): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_SDR, (10): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_SDR, (11): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_SDR, (12): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_SDR, (13): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# - JMP_ON_CS, (31): Stop execution, de-assert CS and save operand[7:0] as the instruction start pointer for next
# sequence.Normally this instruction is used to support Execute-In-Place enhanced mode. See XIP enhanced mode for
# more details.This instruction is only allowed for AHB read commands. There is interrupt status bit set
# (INTR[IPCMDERR] or INTR[AHBCMDERR]) when using this instruction in IP command or AHB write command.
# - CMD_DDR, (33): Transmit command code to Flash.
# - RADDR_DDR, (34): Transmit row address to Flash.
# - CADDR_DDR, (35): Transmit column address to Flash.
# - MODE1_DDR, (36): Transmit mode bits to Flash.
# - MODE2_DDR, (37): Transmit mode bits to Flash.
# - MODE4_DDR, (38): Transmit mode bits to Flash.
# - MODE8_DDR, (39): Transmit mode bits to Flash.
# - WRITE_DDR, (40): Transmit program data to Flash device.
# - READ_DDR, (41): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_DDR, (42): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_DDR, (43): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_DDR, (44): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_DDR, (45): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# Possible options: <STOP, CMD_SDR, RADDR_SDR, CADDR_SDR, MODE1_SDR, MODE2_SDR, MODE4_SDR, MODE8_SDR, WRITE_SDR,
# READ_SDR, LEARN_SDR, DATSZ_SDR, DUMMY_SDR, DUMMY_RWDS_SDR, JMP_ON_CS, CMD_DDR, RADDR_DDR, CADDR_DDR, MODE1_DDR,
# MODE2_DDR, MODE4_DDR, MODE8_DDR, WRITE_DDR, READ_DDR, LEARN_DDR, DATSZ_DDR, DUMMY_DDR, DUMMY_RWDS_DDR>
OPERATION_CODE: STOP
lookupTable_seq5_instr1:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq5_instr2:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq5_instr3:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq5_instr4:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq5_instr5:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq5_instr6:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq5_instr7:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
# -----------------------------------===== lookupTable_seq6_instr0 [Optional] =====-----------------------------------
# Description: Offset: 0x000000E0, Width: 16b; Lookup table holds Flash command sequences 6, instruction 0
lookupTable_seq6_instr0:
# ------------------------------------------===== OPERAND [Optional] =====------------------------------------------
# Description: Offset: 0b, Width: 8b, Instruction operand. Its values depends on used instruction
OPERAND: 0
# -----------------------------------------===== NUM_PADS [Optional] =====------------------------------------------
# Description: Offset: 8b, Width: 2b, Number of pads used by instruction. Some instructions ignores this parameter.
# - 1PAD, (0): Single mode. One pad is used.
# - 2PAD, (1): Dual mode. Two pads are used.
# - 4PAD, (2): Quad mode. Four pads are used.
# - 8PAD, (3): Octal mode. Eight pads are used.
# Possible options: <1PAD, 2PAD, 4PAD, 8PAD>
NUM_PADS: 1PAD
# --------------------------------------===== OPERATION_CODE [Optional] =====---------------------------------------
# Description: Offset: 10b, Width: 6b, Instruction operation code.
# - STOP, (0): Stop execution and de-assert CS. Then, the next command sequence (to the same flash device) starts
# from instruction pointer 0.
# - CMD_SDR, (1): Transmit command code to Flash.
# - RADDR_SDR, (2): Transmit row address to Flash.
# - CADDR_SDR, (3): Transmit column address to Flash.
# - MODE1_SDR, (4): Transmit mode bits to Flash.
# - MODE2_SDR, (5): Transmit mode bits to Flash.
# - MODE4_SDR, (6): Transmit mode bits to Flash.
# - MODE8_SDR, (7): Transmit mode bits to Flash.
# - WRITE_SDR, (8): Transmit program data to Flash device.
# - READ_SDR, (9): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_SDR, (10): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_SDR, (11): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_SDR, (12): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_SDR, (13): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# - JMP_ON_CS, (31): Stop execution, de-assert CS and save operand[7:0] as the instruction start pointer for next
# sequence.Normally this instruction is used to support Execute-In-Place enhanced mode. See XIP enhanced mode for
# more details.This instruction is only allowed for AHB read commands. There is interrupt status bit set
# (INTR[IPCMDERR] or INTR[AHBCMDERR]) when using this instruction in IP command or AHB write command.
# - CMD_DDR, (33): Transmit command code to Flash.
# - RADDR_DDR, (34): Transmit row address to Flash.
# - CADDR_DDR, (35): Transmit column address to Flash.
# - MODE1_DDR, (36): Transmit mode bits to Flash.
# - MODE2_DDR, (37): Transmit mode bits to Flash.
# - MODE4_DDR, (38): Transmit mode bits to Flash.
# - MODE8_DDR, (39): Transmit mode bits to Flash.
# - WRITE_DDR, (40): Transmit program data to Flash device.
# - READ_DDR, (41): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_DDR, (42): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_DDR, (43): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_DDR, (44): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_DDR, (45): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# Possible options: <STOP, CMD_SDR, RADDR_SDR, CADDR_SDR, MODE1_SDR, MODE2_SDR, MODE4_SDR, MODE8_SDR, WRITE_SDR,
# READ_SDR, LEARN_SDR, DATSZ_SDR, DUMMY_SDR, DUMMY_RWDS_SDR, JMP_ON_CS, CMD_DDR, RADDR_DDR, CADDR_DDR, MODE1_DDR,
# MODE2_DDR, MODE4_DDR, MODE8_DDR, WRITE_DDR, READ_DDR, LEARN_DDR, DATSZ_DDR, DUMMY_DDR, DUMMY_RWDS_DDR>
OPERATION_CODE: STOP
lookupTable_seq6_instr1:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq6_instr2:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq6_instr3:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq6_instr4:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq6_instr5:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq6_instr6:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq6_instr7:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
# -----------------------------------===== lookupTable_seq7_instr0 [Optional] =====-----------------------------------
# Description: Offset: 0x000000F0, Width: 16b; Lookup table holds Flash command sequences 7, instruction 0
lookupTable_seq7_instr0:
# ------------------------------------------===== OPERAND [Optional] =====------------------------------------------
# Description: Offset: 0b, Width: 8b, Instruction operand. Its values depends on used instruction
OPERAND: 0
# -----------------------------------------===== NUM_PADS [Optional] =====------------------------------------------
# Description: Offset: 8b, Width: 2b, Number of pads used by instruction. Some instructions ignores this parameter.
# - 1PAD, (0): Single mode. One pad is used.
# - 2PAD, (1): Dual mode. Two pads are used.
# - 4PAD, (2): Quad mode. Four pads are used.
# - 8PAD, (3): Octal mode. Eight pads are used.
# Possible options: <1PAD, 2PAD, 4PAD, 8PAD>
NUM_PADS: 1PAD
# --------------------------------------===== OPERATION_CODE [Optional] =====---------------------------------------
# Description: Offset: 10b, Width: 6b, Instruction operation code.
# - STOP, (0): Stop execution and de-assert CS. Then, the next command sequence (to the same flash device) starts
# from instruction pointer 0.
# - CMD_SDR, (1): Transmit command code to Flash.
# - RADDR_SDR, (2): Transmit row address to Flash.
# - CADDR_SDR, (3): Transmit column address to Flash.
# - MODE1_SDR, (4): Transmit mode bits to Flash.
# - MODE2_SDR, (5): Transmit mode bits to Flash.
# - MODE4_SDR, (6): Transmit mode bits to Flash.
# - MODE8_SDR, (7): Transmit mode bits to Flash.
# - WRITE_SDR, (8): Transmit program data to Flash device.
# - READ_SDR, (9): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_SDR, (10): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_SDR, (11): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_SDR, (12): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_SDR, (13): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# - JMP_ON_CS, (31): Stop execution, de-assert CS and save operand[7:0] as the instruction start pointer for next
# sequence.Normally this instruction is used to support Execute-In-Place enhanced mode. See XIP enhanced mode for
# more details.This instruction is only allowed for AHB read commands. There is interrupt status bit set
# (INTR[IPCMDERR] or INTR[AHBCMDERR]) when using this instruction in IP command or AHB write command.
# - CMD_DDR, (33): Transmit command code to Flash.
# - RADDR_DDR, (34): Transmit row address to Flash.
# - CADDR_DDR, (35): Transmit column address to Flash.
# - MODE1_DDR, (36): Transmit mode bits to Flash.
# - MODE2_DDR, (37): Transmit mode bits to Flash.
# - MODE4_DDR, (38): Transmit mode bits to Flash.
# - MODE8_DDR, (39): Transmit mode bits to Flash.
# - WRITE_DDR, (40): Transmit program data to Flash device.
# - READ_DDR, (41): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_DDR, (42): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_DDR, (43): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_DDR, (44): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_DDR, (45): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# Possible options: <STOP, CMD_SDR, RADDR_SDR, CADDR_SDR, MODE1_SDR, MODE2_SDR, MODE4_SDR, MODE8_SDR, WRITE_SDR,
# READ_SDR, LEARN_SDR, DATSZ_SDR, DUMMY_SDR, DUMMY_RWDS_SDR, JMP_ON_CS, CMD_DDR, RADDR_DDR, CADDR_DDR, MODE1_DDR,
# MODE2_DDR, MODE4_DDR, MODE8_DDR, WRITE_DDR, READ_DDR, LEARN_DDR, DATSZ_DDR, DUMMY_DDR, DUMMY_RWDS_DDR>
OPERATION_CODE: STOP
lookupTable_seq7_instr1:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq7_instr2:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq7_instr3:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq7_instr4:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq7_instr5:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq7_instr6:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq7_instr7:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
# -----------------------------------===== lookupTable_seq8_instr0 [Optional] =====-----------------------------------
# Description: Offset: 0x00000100, Width: 16b; Lookup table holds Flash command sequences 8, instruction 0
lookupTable_seq8_instr0:
# ------------------------------------------===== OPERAND [Optional] =====------------------------------------------
# Description: Offset: 0b, Width: 8b, Instruction operand. Its values depends on used instruction
OPERAND: 0
# -----------------------------------------===== NUM_PADS [Optional] =====------------------------------------------
# Description: Offset: 8b, Width: 2b, Number of pads used by instruction. Some instructions ignores this parameter.
# - 1PAD, (0): Single mode. One pad is used.
# - 2PAD, (1): Dual mode. Two pads are used.
# - 4PAD, (2): Quad mode. Four pads are used.
# - 8PAD, (3): Octal mode. Eight pads are used.
# Possible options: <1PAD, 2PAD, 4PAD, 8PAD>
NUM_PADS: 1PAD
# --------------------------------------===== OPERATION_CODE [Optional] =====---------------------------------------
# Description: Offset: 10b, Width: 6b, Instruction operation code.
# - STOP, (0): Stop execution and de-assert CS. Then, the next command sequence (to the same flash device) starts
# from instruction pointer 0.
# - CMD_SDR, (1): Transmit command code to Flash.
# - RADDR_SDR, (2): Transmit row address to Flash.
# - CADDR_SDR, (3): Transmit column address to Flash.
# - MODE1_SDR, (4): Transmit mode bits to Flash.
# - MODE2_SDR, (5): Transmit mode bits to Flash.
# - MODE4_SDR, (6): Transmit mode bits to Flash.
# - MODE8_SDR, (7): Transmit mode bits to Flash.
# - WRITE_SDR, (8): Transmit program data to Flash device.
# - READ_SDR, (9): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_SDR, (10): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_SDR, (11): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_SDR, (12): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_SDR, (13): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# - JMP_ON_CS, (31): Stop execution, de-assert CS and save operand[7:0] as the instruction start pointer for next
# sequence.Normally this instruction is used to support Execute-In-Place enhanced mode. See XIP enhanced mode for
# more details.This instruction is only allowed for AHB read commands. There is interrupt status bit set
# (INTR[IPCMDERR] or INTR[AHBCMDERR]) when using this instruction in IP command or AHB write command.
# - CMD_DDR, (33): Transmit command code to Flash.
# - RADDR_DDR, (34): Transmit row address to Flash.
# - CADDR_DDR, (35): Transmit column address to Flash.
# - MODE1_DDR, (36): Transmit mode bits to Flash.
# - MODE2_DDR, (37): Transmit mode bits to Flash.
# - MODE4_DDR, (38): Transmit mode bits to Flash.
# - MODE8_DDR, (39): Transmit mode bits to Flash.
# - WRITE_DDR, (40): Transmit program data to Flash device.
# - READ_DDR, (41): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_DDR, (42): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_DDR, (43): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_DDR, (44): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_DDR, (45): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# Possible options: <STOP, CMD_SDR, RADDR_SDR, CADDR_SDR, MODE1_SDR, MODE2_SDR, MODE4_SDR, MODE8_SDR, WRITE_SDR,
# READ_SDR, LEARN_SDR, DATSZ_SDR, DUMMY_SDR, DUMMY_RWDS_SDR, JMP_ON_CS, CMD_DDR, RADDR_DDR, CADDR_DDR, MODE1_DDR,
# MODE2_DDR, MODE4_DDR, MODE8_DDR, WRITE_DDR, READ_DDR, LEARN_DDR, DATSZ_DDR, DUMMY_DDR, DUMMY_RWDS_DDR>
OPERATION_CODE: STOP
lookupTable_seq8_instr1:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq8_instr2:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq8_instr3:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq8_instr4:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq8_instr5:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq8_instr6:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq8_instr7:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
# -----------------------------------===== lookupTable_seq9_instr0 [Optional] =====-----------------------------------
# Description: Offset: 0x00000110, Width: 16b; Lookup table holds Flash command sequences 9, instruction 0
lookupTable_seq9_instr0:
# ------------------------------------------===== OPERAND [Optional] =====------------------------------------------
# Description: Offset: 0b, Width: 8b, Instruction operand. Its values depends on used instruction
OPERAND: 0
# -----------------------------------------===== NUM_PADS [Optional] =====------------------------------------------
# Description: Offset: 8b, Width: 2b, Number of pads used by instruction. Some instructions ignores this parameter.
# - 1PAD, (0): Single mode. One pad is used.
# - 2PAD, (1): Dual mode. Two pads are used.
# - 4PAD, (2): Quad mode. Four pads are used.
# - 8PAD, (3): Octal mode. Eight pads are used.
# Possible options: <1PAD, 2PAD, 4PAD, 8PAD>
NUM_PADS: 1PAD
# --------------------------------------===== OPERATION_CODE [Optional] =====---------------------------------------
# Description: Offset: 10b, Width: 6b, Instruction operation code.
# - STOP, (0): Stop execution and de-assert CS. Then, the next command sequence (to the same flash device) starts
# from instruction pointer 0.
# - CMD_SDR, (1): Transmit command code to Flash.
# - RADDR_SDR, (2): Transmit row address to Flash.
# - CADDR_SDR, (3): Transmit column address to Flash.
# - MODE1_SDR, (4): Transmit mode bits to Flash.
# - MODE2_SDR, (5): Transmit mode bits to Flash.
# - MODE4_SDR, (6): Transmit mode bits to Flash.
# - MODE8_SDR, (7): Transmit mode bits to Flash.
# - WRITE_SDR, (8): Transmit program data to Flash device.
# - READ_SDR, (9): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_SDR, (10): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_SDR, (11): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_SDR, (12): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_SDR, (13): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# - JMP_ON_CS, (31): Stop execution, de-assert CS and save operand[7:0] as the instruction start pointer for next
# sequence.Normally this instruction is used to support Execute-In-Place enhanced mode. See XIP enhanced mode for
# more details.This instruction is only allowed for AHB read commands. There is interrupt status bit set
# (INTR[IPCMDERR] or INTR[AHBCMDERR]) when using this instruction in IP command or AHB write command.
# - CMD_DDR, (33): Transmit command code to Flash.
# - RADDR_DDR, (34): Transmit row address to Flash.
# - CADDR_DDR, (35): Transmit column address to Flash.
# - MODE1_DDR, (36): Transmit mode bits to Flash.
# - MODE2_DDR, (37): Transmit mode bits to Flash.
# - MODE4_DDR, (38): Transmit mode bits to Flash.
# - MODE8_DDR, (39): Transmit mode bits to Flash.
# - WRITE_DDR, (40): Transmit program data to Flash device.
# - READ_DDR, (41): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_DDR, (42): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_DDR, (43): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_DDR, (44): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_DDR, (45): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# Possible options: <STOP, CMD_SDR, RADDR_SDR, CADDR_SDR, MODE1_SDR, MODE2_SDR, MODE4_SDR, MODE8_SDR, WRITE_SDR,
# READ_SDR, LEARN_SDR, DATSZ_SDR, DUMMY_SDR, DUMMY_RWDS_SDR, JMP_ON_CS, CMD_DDR, RADDR_DDR, CADDR_DDR, MODE1_DDR,
# MODE2_DDR, MODE4_DDR, MODE8_DDR, WRITE_DDR, READ_DDR, LEARN_DDR, DATSZ_DDR, DUMMY_DDR, DUMMY_RWDS_DDR>
OPERATION_CODE: STOP
lookupTable_seq9_instr1:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq9_instr2:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq9_instr3:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq9_instr4:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq9_instr5:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq9_instr6:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq9_instr7:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
# ----------------------------------===== lookupTable_seq10_instr0 [Optional] =====-----------------------------------
# Description: Offset: 0x00000120, Width: 16b; Lookup table holds Flash command sequences 10, instruction 0
lookupTable_seq10_instr0:
# ------------------------------------------===== OPERAND [Optional] =====------------------------------------------
# Description: Offset: 0b, Width: 8b, Instruction operand. Its values depends on used instruction
OPERAND: 0
# -----------------------------------------===== NUM_PADS [Optional] =====------------------------------------------
# Description: Offset: 8b, Width: 2b, Number of pads used by instruction. Some instructions ignores this parameter.
# - 1PAD, (0): Single mode. One pad is used.
# - 2PAD, (1): Dual mode. Two pads are used.
# - 4PAD, (2): Quad mode. Four pads are used.
# - 8PAD, (3): Octal mode. Eight pads are used.
# Possible options: <1PAD, 2PAD, 4PAD, 8PAD>
NUM_PADS: 1PAD
# --------------------------------------===== OPERATION_CODE [Optional] =====---------------------------------------
# Description: Offset: 10b, Width: 6b, Instruction operation code.
# - STOP, (0): Stop execution and de-assert CS. Then, the next command sequence (to the same flash device) starts
# from instruction pointer 0.
# - CMD_SDR, (1): Transmit command code to Flash.
# - RADDR_SDR, (2): Transmit row address to Flash.
# - CADDR_SDR, (3): Transmit column address to Flash.
# - MODE1_SDR, (4): Transmit mode bits to Flash.
# - MODE2_SDR, (5): Transmit mode bits to Flash.
# - MODE4_SDR, (6): Transmit mode bits to Flash.
# - MODE8_SDR, (7): Transmit mode bits to Flash.
# - WRITE_SDR, (8): Transmit program data to Flash device.
# - READ_SDR, (9): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_SDR, (10): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_SDR, (11): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_SDR, (12): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_SDR, (13): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# - JMP_ON_CS, (31): Stop execution, de-assert CS and save operand[7:0] as the instruction start pointer for next
# sequence.Normally this instruction is used to support Execute-In-Place enhanced mode. See XIP enhanced mode for
# more details.This instruction is only allowed for AHB read commands. There is interrupt status bit set
# (INTR[IPCMDERR] or INTR[AHBCMDERR]) when using this instruction in IP command or AHB write command.
# - CMD_DDR, (33): Transmit command code to Flash.
# - RADDR_DDR, (34): Transmit row address to Flash.
# - CADDR_DDR, (35): Transmit column address to Flash.
# - MODE1_DDR, (36): Transmit mode bits to Flash.
# - MODE2_DDR, (37): Transmit mode bits to Flash.
# - MODE4_DDR, (38): Transmit mode bits to Flash.
# - MODE8_DDR, (39): Transmit mode bits to Flash.
# - WRITE_DDR, (40): Transmit program data to Flash device.
# - READ_DDR, (41): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_DDR, (42): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_DDR, (43): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_DDR, (44): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_DDR, (45): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# Possible options: <STOP, CMD_SDR, RADDR_SDR, CADDR_SDR, MODE1_SDR, MODE2_SDR, MODE4_SDR, MODE8_SDR, WRITE_SDR,
# READ_SDR, LEARN_SDR, DATSZ_SDR, DUMMY_SDR, DUMMY_RWDS_SDR, JMP_ON_CS, CMD_DDR, RADDR_DDR, CADDR_DDR, MODE1_DDR,
# MODE2_DDR, MODE4_DDR, MODE8_DDR, WRITE_DDR, READ_DDR, LEARN_DDR, DATSZ_DDR, DUMMY_DDR, DUMMY_RWDS_DDR>
OPERATION_CODE: STOP
lookupTable_seq10_instr1:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq10_instr2:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq10_instr3:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq10_instr4:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq10_instr5:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq10_instr6:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq10_instr7:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
# ----------------------------------===== lookupTable_seq11_instr0 [Optional] =====-----------------------------------
# Description: Offset: 0x00000130, Width: 16b; Lookup table holds Flash command sequences 11, instruction 0
lookupTable_seq11_instr0:
# ------------------------------------------===== OPERAND [Optional] =====------------------------------------------
# Description: Offset: 0b, Width: 8b, Instruction operand. Its values depends on used instruction
OPERAND: 0
# -----------------------------------------===== NUM_PADS [Optional] =====------------------------------------------
# Description: Offset: 8b, Width: 2b, Number of pads used by instruction. Some instructions ignores this parameter.
# - 1PAD, (0): Single mode. One pad is used.
# - 2PAD, (1): Dual mode. Two pads are used.
# - 4PAD, (2): Quad mode. Four pads are used.
# - 8PAD, (3): Octal mode. Eight pads are used.
# Possible options: <1PAD, 2PAD, 4PAD, 8PAD>
NUM_PADS: 1PAD
# --------------------------------------===== OPERATION_CODE [Optional] =====---------------------------------------
# Description: Offset: 10b, Width: 6b, Instruction operation code.
# - STOP, (0): Stop execution and de-assert CS. Then, the next command sequence (to the same flash device) starts
# from instruction pointer 0.
# - CMD_SDR, (1): Transmit command code to Flash.
# - RADDR_SDR, (2): Transmit row address to Flash.
# - CADDR_SDR, (3): Transmit column address to Flash.
# - MODE1_SDR, (4): Transmit mode bits to Flash.
# - MODE2_SDR, (5): Transmit mode bits to Flash.
# - MODE4_SDR, (6): Transmit mode bits to Flash.
# - MODE8_SDR, (7): Transmit mode bits to Flash.
# - WRITE_SDR, (8): Transmit program data to Flash device.
# - READ_SDR, (9): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_SDR, (10): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_SDR, (11): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_SDR, (12): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_SDR, (13): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# - JMP_ON_CS, (31): Stop execution, de-assert CS and save operand[7:0] as the instruction start pointer for next
# sequence.Normally this instruction is used to support Execute-In-Place enhanced mode. See XIP enhanced mode for
# more details.This instruction is only allowed for AHB read commands. There is interrupt status bit set
# (INTR[IPCMDERR] or INTR[AHBCMDERR]) when using this instruction in IP command or AHB write command.
# - CMD_DDR, (33): Transmit command code to Flash.
# - RADDR_DDR, (34): Transmit row address to Flash.
# - CADDR_DDR, (35): Transmit column address to Flash.
# - MODE1_DDR, (36): Transmit mode bits to Flash.
# - MODE2_DDR, (37): Transmit mode bits to Flash.
# - MODE4_DDR, (38): Transmit mode bits to Flash.
# - MODE8_DDR, (39): Transmit mode bits to Flash.
# - WRITE_DDR, (40): Transmit program data to Flash device.
# - READ_DDR, (41): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_DDR, (42): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_DDR, (43): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_DDR, (44): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_DDR, (45): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# Possible options: <STOP, CMD_SDR, RADDR_SDR, CADDR_SDR, MODE1_SDR, MODE2_SDR, MODE4_SDR, MODE8_SDR, WRITE_SDR,
# READ_SDR, LEARN_SDR, DATSZ_SDR, DUMMY_SDR, DUMMY_RWDS_SDR, JMP_ON_CS, CMD_DDR, RADDR_DDR, CADDR_DDR, MODE1_DDR,
# MODE2_DDR, MODE4_DDR, MODE8_DDR, WRITE_DDR, READ_DDR, LEARN_DDR, DATSZ_DDR, DUMMY_DDR, DUMMY_RWDS_DDR>
OPERATION_CODE: STOP
lookupTable_seq11_instr1:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq11_instr2:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq11_instr3:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq11_instr4:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq11_instr5:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq11_instr6:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq11_instr7:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
# ----------------------------------===== lookupTable_seq12_instr0 [Optional] =====-----------------------------------
# Description: Offset: 0x00000140, Width: 16b; Lookup table holds Flash command sequences 12, instruction 0
lookupTable_seq12_instr0:
# ------------------------------------------===== OPERAND [Optional] =====------------------------------------------
# Description: Offset: 0b, Width: 8b, Instruction operand. Its values depends on used instruction
OPERAND: 0
# -----------------------------------------===== NUM_PADS [Optional] =====------------------------------------------
# Description: Offset: 8b, Width: 2b, Number of pads used by instruction. Some instructions ignores this parameter.
# - 1PAD, (0): Single mode. One pad is used.
# - 2PAD, (1): Dual mode. Two pads are used.
# - 4PAD, (2): Quad mode. Four pads are used.
# - 8PAD, (3): Octal mode. Eight pads are used.
# Possible options: <1PAD, 2PAD, 4PAD, 8PAD>
NUM_PADS: 1PAD
# --------------------------------------===== OPERATION_CODE [Optional] =====---------------------------------------
# Description: Offset: 10b, Width: 6b, Instruction operation code.
# - STOP, (0): Stop execution and de-assert CS. Then, the next command sequence (to the same flash device) starts
# from instruction pointer 0.
# - CMD_SDR, (1): Transmit command code to Flash.
# - RADDR_SDR, (2): Transmit row address to Flash.
# - CADDR_SDR, (3): Transmit column address to Flash.
# - MODE1_SDR, (4): Transmit mode bits to Flash.
# - MODE2_SDR, (5): Transmit mode bits to Flash.
# - MODE4_SDR, (6): Transmit mode bits to Flash.
# - MODE8_SDR, (7): Transmit mode bits to Flash.
# - WRITE_SDR, (8): Transmit program data to Flash device.
# - READ_SDR, (9): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_SDR, (10): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_SDR, (11): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_SDR, (12): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_SDR, (13): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# - JMP_ON_CS, (31): Stop execution, de-assert CS and save operand[7:0] as the instruction start pointer for next
# sequence.Normally this instruction is used to support Execute-In-Place enhanced mode. See XIP enhanced mode for
# more details.This instruction is only allowed for AHB read commands. There is interrupt status bit set
# (INTR[IPCMDERR] or INTR[AHBCMDERR]) when using this instruction in IP command or AHB write command.
# - CMD_DDR, (33): Transmit command code to Flash.
# - RADDR_DDR, (34): Transmit row address to Flash.
# - CADDR_DDR, (35): Transmit column address to Flash.
# - MODE1_DDR, (36): Transmit mode bits to Flash.
# - MODE2_DDR, (37): Transmit mode bits to Flash.
# - MODE4_DDR, (38): Transmit mode bits to Flash.
# - MODE8_DDR, (39): Transmit mode bits to Flash.
# - WRITE_DDR, (40): Transmit program data to Flash device.
# - READ_DDR, (41): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_DDR, (42): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_DDR, (43): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_DDR, (44): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_DDR, (45): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# Possible options: <STOP, CMD_SDR, RADDR_SDR, CADDR_SDR, MODE1_SDR, MODE2_SDR, MODE4_SDR, MODE8_SDR, WRITE_SDR,
# READ_SDR, LEARN_SDR, DATSZ_SDR, DUMMY_SDR, DUMMY_RWDS_SDR, JMP_ON_CS, CMD_DDR, RADDR_DDR, CADDR_DDR, MODE1_DDR,
# MODE2_DDR, MODE4_DDR, MODE8_DDR, WRITE_DDR, READ_DDR, LEARN_DDR, DATSZ_DDR, DUMMY_DDR, DUMMY_RWDS_DDR>
OPERATION_CODE: STOP
lookupTable_seq12_instr1:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq12_instr2:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq12_instr3:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq12_instr4:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq12_instr5:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq12_instr6:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq12_instr7:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
# ----------------------------------===== lookupTable_seq13_instr0 [Optional] =====-----------------------------------
# Description: Offset: 0x00000150, Width: 16b; Lookup table holds Flash command sequences 13, instruction 0
lookupTable_seq13_instr0:
# ------------------------------------------===== OPERAND [Optional] =====------------------------------------------
# Description: Offset: 0b, Width: 8b, Instruction operand. Its values depends on used instruction
OPERAND: 0
# -----------------------------------------===== NUM_PADS [Optional] =====------------------------------------------
# Description: Offset: 8b, Width: 2b, Number of pads used by instruction. Some instructions ignores this parameter.
# - 1PAD, (0): Single mode. One pad is used.
# - 2PAD, (1): Dual mode. Two pads are used.
# - 4PAD, (2): Quad mode. Four pads are used.
# - 8PAD, (3): Octal mode. Eight pads are used.
# Possible options: <1PAD, 2PAD, 4PAD, 8PAD>
NUM_PADS: 1PAD
# --------------------------------------===== OPERATION_CODE [Optional] =====---------------------------------------
# Description: Offset: 10b, Width: 6b, Instruction operation code.
# - STOP, (0): Stop execution and de-assert CS. Then, the next command sequence (to the same flash device) starts
# from instruction pointer 0.
# - CMD_SDR, (1): Transmit command code to Flash.
# - RADDR_SDR, (2): Transmit row address to Flash.
# - CADDR_SDR, (3): Transmit column address to Flash.
# - MODE1_SDR, (4): Transmit mode bits to Flash.
# - MODE2_SDR, (5): Transmit mode bits to Flash.
# - MODE4_SDR, (6): Transmit mode bits to Flash.
# - MODE8_SDR, (7): Transmit mode bits to Flash.
# - WRITE_SDR, (8): Transmit program data to Flash device.
# - READ_SDR, (9): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_SDR, (10): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_SDR, (11): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_SDR, (12): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_SDR, (13): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# - JMP_ON_CS, (31): Stop execution, de-assert CS and save operand[7:0] as the instruction start pointer for next
# sequence.Normally this instruction is used to support Execute-In-Place enhanced mode. See XIP enhanced mode for
# more details.This instruction is only allowed for AHB read commands. There is interrupt status bit set
# (INTR[IPCMDERR] or INTR[AHBCMDERR]) when using this instruction in IP command or AHB write command.
# - CMD_DDR, (33): Transmit command code to Flash.
# - RADDR_DDR, (34): Transmit row address to Flash.
# - CADDR_DDR, (35): Transmit column address to Flash.
# - MODE1_DDR, (36): Transmit mode bits to Flash.
# - MODE2_DDR, (37): Transmit mode bits to Flash.
# - MODE4_DDR, (38): Transmit mode bits to Flash.
# - MODE8_DDR, (39): Transmit mode bits to Flash.
# - WRITE_DDR, (40): Transmit program data to Flash device.
# - READ_DDR, (41): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_DDR, (42): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_DDR, (43): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_DDR, (44): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_DDR, (45): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# Possible options: <STOP, CMD_SDR, RADDR_SDR, CADDR_SDR, MODE1_SDR, MODE2_SDR, MODE4_SDR, MODE8_SDR, WRITE_SDR,
# READ_SDR, LEARN_SDR, DATSZ_SDR, DUMMY_SDR, DUMMY_RWDS_SDR, JMP_ON_CS, CMD_DDR, RADDR_DDR, CADDR_DDR, MODE1_DDR,
# MODE2_DDR, MODE4_DDR, MODE8_DDR, WRITE_DDR, READ_DDR, LEARN_DDR, DATSZ_DDR, DUMMY_DDR, DUMMY_RWDS_DDR>
OPERATION_CODE: STOP
lookupTable_seq13_instr1:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq13_instr2:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq13_instr3:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq13_instr4:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq13_instr5:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq13_instr6:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq13_instr7:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
# ----------------------------------===== lookupTable_seq14_instr0 [Optional] =====-----------------------------------
# Description: Offset: 0x00000160, Width: 16b; Lookup table holds Flash command sequences 14, instruction 0
lookupTable_seq14_instr0:
# ------------------------------------------===== OPERAND [Optional] =====------------------------------------------
# Description: Offset: 0b, Width: 8b, Instruction operand. Its values depends on used instruction
OPERAND: 0
# -----------------------------------------===== NUM_PADS [Optional] =====------------------------------------------
# Description: Offset: 8b, Width: 2b, Number of pads used by instruction. Some instructions ignores this parameter.
# - 1PAD, (0): Single mode. One pad is used.
# - 2PAD, (1): Dual mode. Two pads are used.
# - 4PAD, (2): Quad mode. Four pads are used.
# - 8PAD, (3): Octal mode. Eight pads are used.
# Possible options: <1PAD, 2PAD, 4PAD, 8PAD>
NUM_PADS: 1PAD
# --------------------------------------===== OPERATION_CODE [Optional] =====---------------------------------------
# Description: Offset: 10b, Width: 6b, Instruction operation code.
# - STOP, (0): Stop execution and de-assert CS. Then, the next command sequence (to the same flash device) starts
# from instruction pointer 0.
# - CMD_SDR, (1): Transmit command code to Flash.
# - RADDR_SDR, (2): Transmit row address to Flash.
# - CADDR_SDR, (3): Transmit column address to Flash.
# - MODE1_SDR, (4): Transmit mode bits to Flash.
# - MODE2_SDR, (5): Transmit mode bits to Flash.
# - MODE4_SDR, (6): Transmit mode bits to Flash.
# - MODE8_SDR, (7): Transmit mode bits to Flash.
# - WRITE_SDR, (8): Transmit program data to Flash device.
# - READ_SDR, (9): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_SDR, (10): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_SDR, (11): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_SDR, (12): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_SDR, (13): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# - JMP_ON_CS, (31): Stop execution, de-assert CS and save operand[7:0] as the instruction start pointer for next
# sequence.Normally this instruction is used to support Execute-In-Place enhanced mode. See XIP enhanced mode for
# more details.This instruction is only allowed for AHB read commands. There is interrupt status bit set
# (INTR[IPCMDERR] or INTR[AHBCMDERR]) when using this instruction in IP command or AHB write command.
# - CMD_DDR, (33): Transmit command code to Flash.
# - RADDR_DDR, (34): Transmit row address to Flash.
# - CADDR_DDR, (35): Transmit column address to Flash.
# - MODE1_DDR, (36): Transmit mode bits to Flash.
# - MODE2_DDR, (37): Transmit mode bits to Flash.
# - MODE4_DDR, (38): Transmit mode bits to Flash.
# - MODE8_DDR, (39): Transmit mode bits to Flash.
# - WRITE_DDR, (40): Transmit program data to Flash device.
# - READ_DDR, (41): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_DDR, (42): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_DDR, (43): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_DDR, (44): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_DDR, (45): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# Possible options: <STOP, CMD_SDR, RADDR_SDR, CADDR_SDR, MODE1_SDR, MODE2_SDR, MODE4_SDR, MODE8_SDR, WRITE_SDR,
# READ_SDR, LEARN_SDR, DATSZ_SDR, DUMMY_SDR, DUMMY_RWDS_SDR, JMP_ON_CS, CMD_DDR, RADDR_DDR, CADDR_DDR, MODE1_DDR,
# MODE2_DDR, MODE4_DDR, MODE8_DDR, WRITE_DDR, READ_DDR, LEARN_DDR, DATSZ_DDR, DUMMY_DDR, DUMMY_RWDS_DDR>
OPERATION_CODE: STOP
lookupTable_seq14_instr1:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq14_instr2:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq14_instr3:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq14_instr4:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq14_instr5:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq14_instr6:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq14_instr7:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
# ----------------------------------===== lookupTable_seq15_instr0 [Optional] =====-----------------------------------
# Description: Offset: 0x00000170, Width: 16b; Lookup table holds Flash command sequences 15, instruction 0
lookupTable_seq15_instr0:
# ------------------------------------------===== OPERAND [Optional] =====------------------------------------------
# Description: Offset: 0b, Width: 8b, Instruction operand. Its values depends on used instruction
OPERAND: 0
# -----------------------------------------===== NUM_PADS [Optional] =====------------------------------------------
# Description: Offset: 8b, Width: 2b, Number of pads used by instruction. Some instructions ignores this parameter.
# - 1PAD, (0): Single mode. One pad is used.
# - 2PAD, (1): Dual mode. Two pads are used.
# - 4PAD, (2): Quad mode. Four pads are used.
# - 8PAD, (3): Octal mode. Eight pads are used.
# Possible options: <1PAD, 2PAD, 4PAD, 8PAD>
NUM_PADS: 1PAD
# --------------------------------------===== OPERATION_CODE [Optional] =====---------------------------------------
# Description: Offset: 10b, Width: 6b, Instruction operation code.
# - STOP, (0): Stop execution and de-assert CS. Then, the next command sequence (to the same flash device) starts
# from instruction pointer 0.
# - CMD_SDR, (1): Transmit command code to Flash.
# - RADDR_SDR, (2): Transmit row address to Flash.
# - CADDR_SDR, (3): Transmit column address to Flash.
# - MODE1_SDR, (4): Transmit mode bits to Flash.
# - MODE2_SDR, (5): Transmit mode bits to Flash.
# - MODE4_SDR, (6): Transmit mode bits to Flash.
# - MODE8_SDR, (7): Transmit mode bits to Flash.
# - WRITE_SDR, (8): Transmit program data to Flash device.
# - READ_SDR, (9): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_SDR, (10): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_SDR, (11): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_SDR, (12): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_SDR, (13): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# - JMP_ON_CS, (31): Stop execution, de-assert CS and save operand[7:0] as the instruction start pointer for next
# sequence.Normally this instruction is used to support Execute-In-Place enhanced mode. See XIP enhanced mode for
# more details.This instruction is only allowed for AHB read commands. There is interrupt status bit set
# (INTR[IPCMDERR] or INTR[AHBCMDERR]) when using this instruction in IP command or AHB write command.
# - CMD_DDR, (33): Transmit command code to Flash.
# - RADDR_DDR, (34): Transmit row address to Flash.
# - CADDR_DDR, (35): Transmit column address to Flash.
# - MODE1_DDR, (36): Transmit mode bits to Flash.
# - MODE2_DDR, (37): Transmit mode bits to Flash.
# - MODE4_DDR, (38): Transmit mode bits to Flash.
# - MODE8_DDR, (39): Transmit mode bits to Flash.
# - WRITE_DDR, (40): Transmit program data to Flash device.
# - READ_DDR, (41): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_DDR, (42): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_DDR, (43): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_DDR, (44): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_DDR, (45): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# Possible options: <STOP, CMD_SDR, RADDR_SDR, CADDR_SDR, MODE1_SDR, MODE2_SDR, MODE4_SDR, MODE8_SDR, WRITE_SDR,
# READ_SDR, LEARN_SDR, DATSZ_SDR, DUMMY_SDR, DUMMY_RWDS_SDR, JMP_ON_CS, CMD_DDR, RADDR_DDR, CADDR_DDR, MODE1_DDR,
# MODE2_DDR, MODE4_DDR, MODE8_DDR, WRITE_DDR, READ_DDR, LEARN_DDR, DATSZ_DDR, DUMMY_DDR, DUMMY_RWDS_DDR>
OPERATION_CODE: STOP
lookupTable_seq15_instr1:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq15_instr2:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq15_instr3:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq15_instr4:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq15_instr5:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq15_instr6:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq15_instr7:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
# ---------------------------------------===== lutCustomSeq_0 [Optional] =====----------------------------------------
# Description: Offset: 0x00000180, Width: 32b; [0x180-0x1af] Customizable LUT Sequences
lutCustomSeq_0:
# ------------------------------------------===== seqNum [Optional] =====-------------------------------------------
# Description: Offset: 0b, Width: 8b, Sequence Number, valid number: 1-16
seqNum: 0
# -------------------------------------------===== seqId [Optional] =====-------------------------------------------
# Description: Offset: 8b, Width: 8b, Sequence Index, valid number: 0-15
seqId: 0
# -----------------------------------------===== reserved [Optional] =====------------------------------------------
# Description: Offset: 16b, Width: 16b, N/A
reserved: 0
# ---------------------------------------===== lutCustomSeq_1 [Optional] =====----------------------------------------
# Description: Offset: 0x00000184, Width: 32b; [0x180-0x1af] Customizable LUT Sequences
lutCustomSeq_1:
# ------------------------------------------===== seqNum [Optional] =====-------------------------------------------
# Description: Offset: 0b, Width: 8b, Sequence Number, valid number: 1-16
seqNum: 0
# -------------------------------------------===== seqId [Optional] =====-------------------------------------------
# Description: Offset: 8b, Width: 8b, Sequence Index, valid number: 0-15
seqId: 0
# -----------------------------------------===== reserved [Optional] =====------------------------------------------
# Description: Offset: 16b, Width: 16b, N/A
reserved: 0
# ---------------------------------------===== lutCustomSeq_2 [Optional] =====----------------------------------------
# Description: Offset: 0x00000188, Width: 32b; [0x180-0x1af] Customizable LUT Sequences
lutCustomSeq_2:
# ------------------------------------------===== seqNum [Optional] =====-------------------------------------------
# Description: Offset: 0b, Width: 8b, Sequence Number, valid number: 1-16
seqNum: 0
# -------------------------------------------===== seqId [Optional] =====-------------------------------------------
# Description: Offset: 8b, Width: 8b, Sequence Index, valid number: 0-15
seqId: 0
# -----------------------------------------===== reserved [Optional] =====------------------------------------------
# Description: Offset: 16b, Width: 16b, N/A
reserved: 0
# ---------------------------------------===== lutCustomSeq_3 [Optional] =====----------------------------------------
# Description: Offset: 0x0000018C, Width: 32b; [0x180-0x1af] Customizable LUT Sequences
lutCustomSeq_3:
# ------------------------------------------===== seqNum [Optional] =====-------------------------------------------
# Description: Offset: 0b, Width: 8b, Sequence Number, valid number: 1-16
seqNum: 0
# -------------------------------------------===== seqId [Optional] =====-------------------------------------------
# Description: Offset: 8b, Width: 8b, Sequence Index, valid number: 0-15
seqId: 0
# -----------------------------------------===== reserved [Optional] =====------------------------------------------
# Description: Offset: 16b, Width: 16b, N/A
reserved: 0
# ---------------------------------------===== lutCustomSeq_4 [Optional] =====----------------------------------------
# Description: Offset: 0x00000190, Width: 32b; [0x180-0x1af] Customizable LUT Sequences
lutCustomSeq_4:
# ------------------------------------------===== seqNum [Optional] =====-------------------------------------------
# Description: Offset: 0b, Width: 8b, Sequence Number, valid number: 1-16
seqNum: 0
# -------------------------------------------===== seqId [Optional] =====-------------------------------------------
# Description: Offset: 8b, Width: 8b, Sequence Index, valid number: 0-15
seqId: 0
# -----------------------------------------===== reserved [Optional] =====------------------------------------------
# Description: Offset: 16b, Width: 16b, N/A
reserved: 0
# ---------------------------------------===== lutCustomSeq_5 [Optional] =====----------------------------------------
# Description: Offset: 0x00000194, Width: 32b; [0x180-0x1af] Customizable LUT Sequences
lutCustomSeq_5:
# ------------------------------------------===== seqNum [Optional] =====-------------------------------------------
# Description: Offset: 0b, Width: 8b, Sequence Number, valid number: 1-16
seqNum: 0
# -------------------------------------------===== seqId [Optional] =====-------------------------------------------
# Description: Offset: 8b, Width: 8b, Sequence Index, valid number: 0-15
seqId: 0
# -----------------------------------------===== reserved [Optional] =====------------------------------------------
# Description: Offset: 16b, Width: 16b, N/A
reserved: 0
# ---------------------------------------===== lutCustomSeq_6 [Optional] =====----------------------------------------
# Description: Offset: 0x00000198, Width: 32b; [0x180-0x1af] Customizable LUT Sequences
lutCustomSeq_6:
# ------------------------------------------===== seqNum [Optional] =====-------------------------------------------
# Description: Offset: 0b, Width: 8b, Sequence Number, valid number: 1-16
seqNum: 0
# -------------------------------------------===== seqId [Optional] =====-------------------------------------------
# Description: Offset: 8b, Width: 8b, Sequence Index, valid number: 0-15
seqId: 0
# -----------------------------------------===== reserved [Optional] =====------------------------------------------
# Description: Offset: 16b, Width: 16b, N/A
reserved: 0
# ---------------------------------------===== lutCustomSeq_7 [Optional] =====----------------------------------------
# Description: Offset: 0x0000019C, Width: 32b; [0x180-0x1af] Customizable LUT Sequences
lutCustomSeq_7:
# ------------------------------------------===== seqNum [Optional] =====-------------------------------------------
# Description: Offset: 0b, Width: 8b, Sequence Number, valid number: 1-16
seqNum: 0
# -------------------------------------------===== seqId [Optional] =====-------------------------------------------
# Description: Offset: 8b, Width: 8b, Sequence Index, valid number: 0-15
seqId: 0
# -----------------------------------------===== reserved [Optional] =====------------------------------------------
# Description: Offset: 16b, Width: 16b, N/A
reserved: 0
# ---------------------------------------===== lutCustomSeq_8 [Optional] =====----------------------------------------
# Description: Offset: 0x000001A0, Width: 32b; [0x180-0x1af] Customizable LUT Sequences
lutCustomSeq_8:
# ------------------------------------------===== seqNum [Optional] =====-------------------------------------------
# Description: Offset: 0b, Width: 8b, Sequence Number, valid number: 1-16
seqNum: 0
# -------------------------------------------===== seqId [Optional] =====-------------------------------------------
# Description: Offset: 8b, Width: 8b, Sequence Index, valid number: 0-15
seqId: 0
# -----------------------------------------===== reserved [Optional] =====------------------------------------------
# Description: Offset: 16b, Width: 16b, N/A
reserved: 0
# ---------------------------------------===== lutCustomSeq_9 [Optional] =====----------------------------------------
# Description: Offset: 0x000001A4, Width: 32b; [0x180-0x1af] Customizable LUT Sequences
lutCustomSeq_9:
# ------------------------------------------===== seqNum [Optional] =====-------------------------------------------
# Description: Offset: 0b, Width: 8b, Sequence Number, valid number: 1-16
seqNum: 0
# -------------------------------------------===== seqId [Optional] =====-------------------------------------------
# Description: Offset: 8b, Width: 8b, Sequence Index, valid number: 0-15
seqId: 0
# -----------------------------------------===== reserved [Optional] =====------------------------------------------
# Description: Offset: 16b, Width: 16b, N/A
reserved: 0
# ---------------------------------------===== lutCustomSeq_10 [Optional] =====---------------------------------------
# Description: Offset: 0x000001A8, Width: 32b; [0x180-0x1af] Customizable LUT Sequences
lutCustomSeq_10:
# ------------------------------------------===== seqNum [Optional] =====-------------------------------------------
# Description: Offset: 0b, Width: 8b, Sequence Number, valid number: 1-16
seqNum: 0
# -------------------------------------------===== seqId [Optional] =====-------------------------------------------
# Description: Offset: 8b, Width: 8b, Sequence Index, valid number: 0-15
seqId: 0
# -----------------------------------------===== reserved [Optional] =====------------------------------------------
# Description: Offset: 16b, Width: 16b, N/A
reserved: 0
# ---------------------------------------===== lutCustomSeq_11 [Optional] =====---------------------------------------
# Description: Offset: 0x000001AC, Width: 32b; [0x180-0x1af] Customizable LUT Sequences
lutCustomSeq_11:
# ------------------------------------------===== seqNum [Optional] =====-------------------------------------------
# Description: Offset: 0b, Width: 8b, Sequence Number, valid number: 1-16
seqNum: 0
# -------------------------------------------===== seqId [Optional] =====-------------------------------------------
# Description: Offset: 8b, Width: 8b, Sequence Index, valid number: 0-15
seqId: 0
# -----------------------------------------===== reserved [Optional] =====------------------------------------------
# Description: Offset: 16b, Width: 16b, N/A
reserved: 0
# -----------------------------------------===== reserved4_0 [Optional] =====-----------------------------------------
# Description: Offset: 0x000001B0, Width: 32b; [0x1b0-0x1bf] Reserved for future use
reserved4_0: '0x00000000'
# -----------------------------------------===== reserved4_1 [Optional] =====-----------------------------------------
# Description: Offset: 0x000001B4, Width: 32b; [0x1b0-0x1bf] Reserved for future use
reserved4_1: '0x00000000'
# -----------------------------------------===== reserved4_2 [Optional] =====-----------------------------------------
# Description: Offset: 0x000001B8, Width: 32b; [0x1b0-0x1bf] Reserved for future use
reserved4_2: '0x00000000'
# -----------------------------------------===== reserved4_3 [Optional] =====-----------------------------------------
# Description: Offset: 0x000001BC, Width: 32b; [0x1b0-0x1bf] Reserved for future use
reserved4_3: '0x00000000'
# ------------------------------------------===== pageSize [Optional] =====-------------------------------------------
# Description: Offset: 0x000001C0, Width: 32b; Page size of Serial NOR
pageSize: '0x00000000'
# -----------------------------------------===== sectorSize [Optional] =====------------------------------------------
# Description: Offset: 0x000001C4, Width: 32b; Sector size of Serial NOR
sectorSize: '0x00000000'
# -------------------------------------===== ipcmdSerialClkFreq [Optional] =====--------------------------------------
# Description: Offset: 0x000001C8, Width: 8b; Clock frequency for IP command
ipcmdSerialClkFreq: '0x00'
# -------------------------------------===== isUniformBlockSize [Optional] =====--------------------------------------
# Description: Offset: 0x000001C9, Width: 8b; Sector/Block size is the same
isUniformBlockSize: '0x00'
# -----------------------------------------===== reserved0_0 [Optional] =====-----------------------------------------
# Description: Offset: 0x000001CA, Width: 8b; Reserved for future use
reserved0_0: '0x00'
# -----------------------------------------===== reserved0_1 [Optional] =====-----------------------------------------
# Description: Offset: 0x000001CB, Width: 8b; Reserved for future use
reserved0_1: '0x00'
# ----------------------------------------===== serialNorType [Optional] =====----------------------------------------
# Description: Offset: 0x000001CC, Width: 8b; Serial NOR Flash type: 0/1/2/3
serialNorType: '0x00'
# --------------------------------------===== needExitNoCmdMode [Optional] =====--------------------------------------
# Description: Offset: 0x000001CD, Width: 8b; Need to exit NoCmd mode before other IP command
needExitNoCmdMode: '0x00'
# ------------------------------------===== halfClkForNonReadCmd [Optional] =====-------------------------------------
# Description: Offset: 0x000001CE, Width: 8b; Half the Serial Clock for non-read command: true/false
halfClkForNonReadCmd: '0x00'
# ------------------------------------===== needRestoreNoCmdMode [Optional] =====-------------------------------------
# Description: Offset: 0x000001CF, Width: 8b; Need to Restore NoCmd mode after IP command execution
needRestoreNoCmdMode: '0x00'
# ------------------------------------------===== blockSize [Optional] =====------------------------------------------
# Description: Offset: 0x000001D0, Width: 32b; Block size
blockSize: '0x00000000'
# -----------------------------------------===== reserve2_0 [Optional] =====------------------------------------------
# Description: Offset: 0x000001D4, Width: 32b; Reserved for future use
reserve2_0: '0x00000000'
# -----------------------------------------===== reserve2_1 [Optional] =====------------------------------------------
# Description: Offset: 0x000001D8, Width: 32b; Reserved for future use
reserve2_1: '0x00000000'
# -----------------------------------------===== reserve2_2 [Optional] =====------------------------------------------
# Description: Offset: 0x000001DC, Width: 32b; Reserved for future use
reserve2_2: '0x00000000'
# -----------------------------------------===== reserve2_3 [Optional] =====------------------------------------------
# Description: Offset: 0x000001E0, Width: 32b; Reserved for future use
reserve2_3: '0x00000000'
# -----------------------------------------===== reserve2_4 [Optional] =====------------------------------------------
# Description: Offset: 0x000001E4, Width: 32b; Reserved for future use
reserve2_4: '0x00000000'
# -----------------------------------------===== reserve2_5 [Optional] =====------------------------------------------
# Description: Offset: 0x000001E8, Width: 32b; Reserved for future use
reserve2_5: '0x00000000'
# -----------------------------------------===== reserve2_6 [Optional] =====------------------------------------------
# Description: Offset: 0x000001EC, Width: 32b; Reserved for future use
reserve2_6: '0x00000000'
# -----------------------------------------===== reserve2_7 [Optional] =====------------------------------------------
# Description: Offset: 0x000001F0, Width: 32b; Reserved for future use
reserve2_7: '0x00000000'
# -----------------------------------------===== reserve2_8 [Optional] =====------------------------------------------
# Description: Offset: 0x000001F4, Width: 32b; Reserved for future use
reserve2_8: '0x00000000'
# -----------------------------------------===== reserve2_9 [Optional] =====------------------------------------------
# Description: Offset: 0x000001F8, Width: 32b; Reserved for future use
reserve2_9: '0x00000000'
# -----------------------------------------===== reserve2_10 [Optional] =====-----------------------------------------
# Description: Offset: 0x000001FC, Width: 32b; Reserved for future use
reserve2_10: '0x00000000'
FCB for mimxrt1176, Revision: a0 and flexspi_nor#
FCB for mimxrt1176, Revision: a0 and flexspi_nor JSON schema
FCB for mimxrt1176, Revision: a0 and flexspi_nor YAML configuration template
# ================================= FCB for mimxrt1176, Revision: a0 and flexspi_nor =================================
# ======================================================================================================================
# == FCB for mimxrt1176, Revision: a0 and flexspi_nor ==
# ======================================================================================================================
# -------------------------------------===== The chip family name [Required] =====--------------------------------------
# Description: NXP chip family identifier.
family: CHOOSE_FROM_TABLE
# -----------------------------------------===== MCU revision [Optional] =====------------------------------------------
# Description: Revision of silicon. The 'latest' name, means most current revision.
# Possible options: <a0, latest>
revision: a0
# ------------------------------------------===== Memory type [Required] =====------------------------------------------
# Description: Specify type of memory used by FCB description.
# Possible options: <flexspi_nor>
type: flexspi_nor
# ------------------------------------------===== mimxrt1176 [Required] =====-------------------------------------------
fcb_settings:
# ---------------------------------------------===== tag [Optional] =====---------------------------------------------
# Description: Offset: 0x00000000, Width: 32b; [0x000-0x003] Tag, fixed value 0x42464346UL
tag: '0x42464346'
# -------------------------------------------===== version [Optional] =====-------------------------------------------
# Description: Offset: 0x00000004, Width: 32b; [0x004-0x007] Version,[31:24] -'V', [23:16] - Major, [15:8] - Minor,
# [7:0] - bugfix
version: '0x56010400'
# ------------------------------------------===== reserved0 [Optional] =====------------------------------------------
# Description: Offset: 0x00000008, Width: 32b; [0x008-0x00b] Reserved for future use
reserved0: '0x00000000'
# --------------------------------------===== readSampleClkSrc [Optional] =====---------------------------------------
# Description: Offset: 0x0000000C, Width: 8b; [0x00c-0x00c] Read Sample Clock Source, valid value: 0/1/3
readSampleClkSrc: '0x00'
# -----------------------------------------===== csHoldTime [Optional] =====------------------------------------------
# Description: Offset: 0x0000000D, Width: 8b; [0x00d-0x00d] CS hold time, default value: 3
csHoldTime: '0x00'
# -----------------------------------------===== csSetupTime [Optional] =====-----------------------------------------
# Description: Offset: 0x0000000E, Width: 8b; [0x00e-0x00e] CS setup time, default value: 3
csSetupTime: '0x00'
# -------------------------------------===== columnAddressWidth [Optional] =====--------------------------------------
# Description: Offset: 0x0000000F, Width: 8b; [0x00f-0x00f] Column Address with, for HyperBus protocol, it is fixed
# to 3, For Serial NAND, need to refer to datasheet
columnAddressWidth: '0x00'
# -------------------------------------===== deviceModeCfgEnable [Optional] =====-------------------------------------
# Description: Offset: 0x00000010, Width: 8b; [0x010-0x010] Device Mode Configure enable flag, 1 - Enable, 0 -
# Disable
deviceModeCfgEnable: '0x00'
# ---------------------------------------===== deviceModeType [Optional] =====----------------------------------------
# Description: Offset: 0x00000011, Width: 8b; [0x011-0x011] Specify the configuration command type:Quad Enable,
# DPI/QPI/OPI switch, Generic configuration, etc.
deviceModeType: '0x00'
# -------------------------------------===== waitTimeCfgCommands [Optional] =====-------------------------------------
# Description: Offset: 0x00000012, Width: 16b; [0x012-0x013] Wait time for all configuration commands, unit: 100us,
# Used for DPI/QPI/OPI switch or reset command
waitTimeCfgCommands: '0x0000'
# ----------------------------------------===== deviceModeSeq [Optional] =====----------------------------------------
# Description: Offset: 0x00000014, Width: 32b; [0x014-0x017] Device mode sequence info, [7:0] - LUT sequence id,
# [15:8] - LUt sequence number, [31:16] Reserved
deviceModeSeq:
# ------------------------------------------===== seqNum [Optional] =====-------------------------------------------
# Description: Offset: 0b, Width: 8b, Sequence Number, valid number: 1-16
seqNum: 0
# -------------------------------------------===== seqId [Optional] =====-------------------------------------------
# Description: Offset: 8b, Width: 8b, Sequence Index, valid number: 0-15
seqId: 0
# -----------------------------------------===== reserved [Optional] =====------------------------------------------
# Description: Offset: 16b, Width: 16b, N/A
reserved: 0
# ----------------------------------------===== deviceModeArg [Optional] =====----------------------------------------
# Description: Offset: 0x00000018, Width: 32b; [0x018-0x01b] Argument/Parameter for device configuration
deviceModeArg: '0x00000000'
# ---------------------------------------===== configCmdEnable [Optional] =====---------------------------------------
# Description: Offset: 0x0000001C, Width: 8b; [0x01c-0x01c] Configure command Enable Flag, 1 - Enable, 0 - Disable
configCmdEnable: '0x00'
# --------------------------------------===== configModeType_0 [Optional] =====---------------------------------------
# Description: Offset: 0x0000001D, Width: 8b; [0x01d-0x01f] Configure Mode Type, similar as deviceModeTpe
configModeType_0: '0x00'
# --------------------------------------===== configModeType_1 [Optional] =====---------------------------------------
# Description: Offset: 0x0000001E, Width: 8b; [0x01d-0x01f] Configure Mode Type, similar as deviceModeTpe
configModeType_1: '0x00'
# --------------------------------------===== configModeType_2 [Optional] =====---------------------------------------
# Description: Offset: 0x0000001F, Width: 8b; [0x01d-0x01f] Configure Mode Type, similar as deviceModeTpe
configModeType_2: '0x00'
# ---------------------------------------===== configCmdSeqs_0 [Optional] =====---------------------------------------
# Description: Offset: 0x00000020, Width: 32b; [0x020-0x02b] Sequence info for Device Configuration command, similar
# as deviceModeSeq
configCmdSeqs_0:
# ------------------------------------------===== seqNum [Optional] =====-------------------------------------------
# Description: Offset: 0b, Width: 8b, Sequence Number, valid number: 1-16
seqNum: 0
# -------------------------------------------===== seqId [Optional] =====-------------------------------------------
# Description: Offset: 8b, Width: 8b, Sequence Index, valid number: 0-15
seqId: 0
# -----------------------------------------===== reserved [Optional] =====------------------------------------------
# Description: Offset: 16b, Width: 16b, N/A
reserved: 0
# ---------------------------------------===== configCmdSeqs_1 [Optional] =====---------------------------------------
# Description: Offset: 0x00000024, Width: 32b; [0x020-0x02b] Sequence info for Device Configuration command, similar
# as deviceModeSeq
configCmdSeqs_1:
# ------------------------------------------===== seqNum [Optional] =====-------------------------------------------
# Description: Offset: 0b, Width: 8b, Sequence Number, valid number: 1-16
seqNum: 0
# -------------------------------------------===== seqId [Optional] =====-------------------------------------------
# Description: Offset: 8b, Width: 8b, Sequence Index, valid number: 0-15
seqId: 0
# -----------------------------------------===== reserved [Optional] =====------------------------------------------
# Description: Offset: 16b, Width: 16b, N/A
reserved: 0
# ---------------------------------------===== configCmdSeqs_2 [Optional] =====---------------------------------------
# Description: Offset: 0x00000028, Width: 32b; [0x020-0x02b] Sequence info for Device Configuration command, similar
# as deviceModeSeq
configCmdSeqs_2:
# ------------------------------------------===== seqNum [Optional] =====-------------------------------------------
# Description: Offset: 0b, Width: 8b, Sequence Number, valid number: 1-16
seqNum: 0
# -------------------------------------------===== seqId [Optional] =====-------------------------------------------
# Description: Offset: 8b, Width: 8b, Sequence Index, valid number: 0-15
seqId: 0
# -----------------------------------------===== reserved [Optional] =====------------------------------------------
# Description: Offset: 16b, Width: 16b, N/A
reserved: 0
# ------------------------------------------===== reserved1 [Optional] =====------------------------------------------
# Description: Offset: 0x0000002C, Width: 32b; [0x02c-0x02f] Reserved for future use
reserved1: '0x00000000'
# ---------------------------------------===== configCmdArgs_0 [Optional] =====---------------------------------------
# Description: Offset: 0x00000030, Width: 32b; [0x030-0x03b] Arguments/Parameters for device Configuration commands
configCmdArgs_0: '0x00000000'
# ---------------------------------------===== configCmdArgs_1 [Optional] =====---------------------------------------
# Description: Offset: 0x00000034, Width: 32b; [0x030-0x03b] Arguments/Parameters for device Configuration commands
configCmdArgs_1: '0x00000000'
# ---------------------------------------===== configCmdArgs_2 [Optional] =====---------------------------------------
# Description: Offset: 0x00000038, Width: 32b; [0x030-0x03b] Arguments/Parameters for device Configuration commands
configCmdArgs_2: '0x00000000'
# ------------------------------------------===== reserved2 [Optional] =====------------------------------------------
# Description: Offset: 0x0000003C, Width: 32b; [0x03c-0x03f] Reserved for future use
reserved2: '0x00000000'
# ------------------------------------===== controllerMiscOption [Optional] =====-------------------------------------
# Description: Offset: 0x00000040, Width: 32b; [0x040-0x043] Controller Misc Options, see Misc feature bit
# definitions for more details
controllerMiscOption: '0x00000000'
# -----------------------------------------===== deviceType [Optional] =====------------------------------------------
# Description: Offset: 0x00000044, Width: 8b; [0x044-0x044] Device Type: See Flash Type Definition for more details
deviceType: '0x00'
# ----------------------------------------===== sflashPadType [Optional] =====----------------------------------------
# Description: Offset: 0x00000045, Width: 8b; [0x045-0x045] Serial Flash Pad Type: 1 - Single, 2 - Dual, 4 - Quad, 8
# - Octal
sflashPadType: '0x00'
# ----------------------------------------===== serialClkFreq [Optional] =====----------------------------------------
# Description: Offset: 0x00000046, Width: 8b; [0x046-0x046] Serial Flash Frequency, device specific definitions, See
# System Boot Chapter for more details
serialClkFreq: '0x00'
# -------------------------------------===== lutCustomSeqEnable [Optional] =====--------------------------------------
# Description: Offset: 0x00000047, Width: 8b; [0x047-0x047] LUT customization Enable, it is required if the
# program/erase cannot be done using 1 LUT sequence, currently, only applicable to HyperFLASH
lutCustomSeqEnable: '0x00'
# -----------------------------------------===== reserved3_0 [Optional] =====-----------------------------------------
# Description: Offset: 0x00000048, Width: 32b; [0x048-0x04f] Reserved for future use
reserved3_0: '0x00000000'
# -----------------------------------------===== reserved3_1 [Optional] =====-----------------------------------------
# Description: Offset: 0x0000004C, Width: 32b; [0x048-0x04f] Reserved for future use
reserved3_1: '0x00000000'
# ----------------------------------------===== sflashA1Size [Optional] =====-----------------------------------------
# Description: Offset: 0x00000050, Width: 32b; [0x050-0x053] Size of Flash connected to A1
sflashA1Size: '0x00000000'
# ----------------------------------------===== sflashA2Size [Optional] =====-----------------------------------------
# Description: Offset: 0x00000054, Width: 32b; [0x054-0x057] Size of Flash connected to A2
sflashA2Size: '0x00000000'
# ----------------------------------------===== sflashB1Size [Optional] =====-----------------------------------------
# Description: Offset: 0x00000058, Width: 32b; [0x058-0x05b] Size of Flash connected to B1
sflashB1Size: '0x00000000'
# ----------------------------------------===== sflashB2Size [Optional] =====-----------------------------------------
# Description: Offset: 0x0000005C, Width: 32b; [0x05c-0x05f] Size of Flash connected to B2
sflashB2Size: '0x00000000'
# ------------------------------------===== csPadSettingOverride [Optional] =====-------------------------------------
# Description: Offset: 0x00000060, Width: 32b; [0x060-0x063] CS pad setting override value
csPadSettingOverride: '0x00000000'
# -----------------------------------===== sclkPadSettingOverride [Optional] =====------------------------------------
# Description: Offset: 0x00000064, Width: 32b; [0x064-0x067] SCK pad setting override value
sclkPadSettingOverride: '0x00000000'
# -----------------------------------===== dataPadSettingOverride [Optional] =====------------------------------------
# Description: Offset: 0x00000068, Width: 32b; [0x068-0x06b] data pad setting override value
dataPadSettingOverride: '0x00000000'
# ------------------------------------===== dqsPadSettingOverride [Optional] =====------------------------------------
# Description: Offset: 0x0000006C, Width: 32b; [0x06c-0x06f] DQS pad setting override value
dqsPadSettingOverride: '0x00000000'
# -----------------------------------------===== timeoutInMs [Optional] =====-----------------------------------------
# Description: Offset: 0x00000070, Width: 32b; [0x070-0x073] Timeout threshold for read status command
timeoutInMs: '0x00000000'
# ---------------------------------------===== commandInterval [Optional] =====---------------------------------------
# Description: Offset: 0x00000074, Width: 32b; [0x074-0x077] CS deselect interval between two commands
commandInterval: '0x00000000'
# ---------------------------------------===== dataValidTime_0 [Optional] =====---------------------------------------
# Description: Offset: 0x00000078, Width: 16b; [0x078-0x07b] CLK edge to data valid time for PORT A and PORT B, in
# terms of 0.1ns
dataValidTime_0: '0x0000'
# ---------------------------------------===== dataValidTime_1 [Optional] =====---------------------------------------
# Description: Offset: 0x0000007A, Width: 16b; [0x078-0x07b] CLK edge to data valid time for PORT A and PORT B, in
# terms of 0.1ns
dataValidTime_1: '0x0000'
# -----------------------------------------===== busyOffset [Optional] =====------------------------------------------
# Description: Offset: 0x0000007C, Width: 16b; [0x07c-0x07d] Busy offset, valid value: 0-31
busyOffset: '0x0000'
# ---------------------------------------===== busyBitPolarity [Optional] =====---------------------------------------
# Description: Offset: 0x0000007E, Width: 16b; [0x07e-0x07f] Busy flag polarity, 0 - busy flag is 1 when flash device
# is busy, 1 - busy flag is 0 when flash device is busy
busyBitPolarity: '0x0000'
# -----------------------------------===== lookupTable_seq0_instr0 [Optional] =====-----------------------------------
# Description: Offset: 0x00000080, Width: 16b; Lookup table holds Flash command sequences 0, instruction 0
lookupTable_seq0_instr0:
# ------------------------------------------===== OPERAND [Optional] =====------------------------------------------
# Description: Offset: 0b, Width: 8b, Instruction operand. Its values depends on used instruction
OPERAND: 0
# -----------------------------------------===== NUM_PADS [Optional] =====------------------------------------------
# Description: Offset: 8b, Width: 2b, Number of pads used by instruction. Some instructions ignores this parameter.
# - 1PAD, (0): Single mode. One pad is used.
# - 2PAD, (1): Dual mode. Two pads are used.
# - 4PAD, (2): Quad mode. Four pads are used.
# - 8PAD, (3): Octal mode. Eight pads are used.
# Possible options: <1PAD, 2PAD, 4PAD, 8PAD>
NUM_PADS: 1PAD
# --------------------------------------===== OPERATION_CODE [Optional] =====---------------------------------------
# Description: Offset: 10b, Width: 6b, Instruction operation code.
# - STOP, (0): Stop execution and de-assert CS. Then, the next command sequence (to the same flash device) starts
# from instruction pointer 0.
# - CMD_SDR, (1): Transmit command code to Flash.
# - RADDR_SDR, (2): Transmit row address to Flash.
# - CADDR_SDR, (3): Transmit column address to Flash.
# - MODE1_SDR, (4): Transmit mode bits to Flash.
# - MODE2_SDR, (5): Transmit mode bits to Flash.
# - MODE4_SDR, (6): Transmit mode bits to Flash.
# - MODE8_SDR, (7): Transmit mode bits to Flash.
# - WRITE_SDR, (8): Transmit program data to Flash device.
# - READ_SDR, (9): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_SDR, (10): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_SDR, (11): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_SDR, (12): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_SDR, (13): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# - JMP_ON_CS, (31): Stop execution, de-assert CS and save operand[7:0] as the instruction start pointer for next
# sequence.Normally this instruction is used to support Execute-In-Place enhanced mode. See XIP enhanced mode for
# more details.This instruction is only allowed for AHB read commands. There is interrupt status bit set
# (INTR[IPCMDERR] or INTR[AHBCMDERR]) when using this instruction in IP command or AHB write command.
# - CMD_DDR, (33): Transmit command code to Flash.
# - RADDR_DDR, (34): Transmit row address to Flash.
# - CADDR_DDR, (35): Transmit column address to Flash.
# - MODE1_DDR, (36): Transmit mode bits to Flash.
# - MODE2_DDR, (37): Transmit mode bits to Flash.
# - MODE4_DDR, (38): Transmit mode bits to Flash.
# - MODE8_DDR, (39): Transmit mode bits to Flash.
# - WRITE_DDR, (40): Transmit program data to Flash device.
# - READ_DDR, (41): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_DDR, (42): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_DDR, (43): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_DDR, (44): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_DDR, (45): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# Possible options: <STOP, CMD_SDR, RADDR_SDR, CADDR_SDR, MODE1_SDR, MODE2_SDR, MODE4_SDR, MODE8_SDR, WRITE_SDR,
# READ_SDR, LEARN_SDR, DATSZ_SDR, DUMMY_SDR, DUMMY_RWDS_SDR, JMP_ON_CS, CMD_DDR, RADDR_DDR, CADDR_DDR, MODE1_DDR,
# MODE2_DDR, MODE4_DDR, MODE8_DDR, WRITE_DDR, READ_DDR, LEARN_DDR, DATSZ_DDR, DUMMY_DDR, DUMMY_RWDS_DDR>
OPERATION_CODE: STOP
lookupTable_seq0_instr1:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq0_instr2:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq0_instr3:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq0_instr4:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq0_instr5:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq0_instr6:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq0_instr7:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
# -----------------------------------===== lookupTable_seq1_instr0 [Optional] =====-----------------------------------
# Description: Offset: 0x00000090, Width: 16b; Lookup table holds Flash command sequences 1, instruction 0
lookupTable_seq1_instr0:
# ------------------------------------------===== OPERAND [Optional] =====------------------------------------------
# Description: Offset: 0b, Width: 8b, Instruction operand. Its values depends on used instruction
OPERAND: 0
# -----------------------------------------===== NUM_PADS [Optional] =====------------------------------------------
# Description: Offset: 8b, Width: 2b, Number of pads used by instruction. Some instructions ignores this parameter.
# - 1PAD, (0): Single mode. One pad is used.
# - 2PAD, (1): Dual mode. Two pads are used.
# - 4PAD, (2): Quad mode. Four pads are used.
# - 8PAD, (3): Octal mode. Eight pads are used.
# Possible options: <1PAD, 2PAD, 4PAD, 8PAD>
NUM_PADS: 1PAD
# --------------------------------------===== OPERATION_CODE [Optional] =====---------------------------------------
# Description: Offset: 10b, Width: 6b, Instruction operation code.
# - STOP, (0): Stop execution and de-assert CS. Then, the next command sequence (to the same flash device) starts
# from instruction pointer 0.
# - CMD_SDR, (1): Transmit command code to Flash.
# - RADDR_SDR, (2): Transmit row address to Flash.
# - CADDR_SDR, (3): Transmit column address to Flash.
# - MODE1_SDR, (4): Transmit mode bits to Flash.
# - MODE2_SDR, (5): Transmit mode bits to Flash.
# - MODE4_SDR, (6): Transmit mode bits to Flash.
# - MODE8_SDR, (7): Transmit mode bits to Flash.
# - WRITE_SDR, (8): Transmit program data to Flash device.
# - READ_SDR, (9): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_SDR, (10): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_SDR, (11): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_SDR, (12): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_SDR, (13): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# - JMP_ON_CS, (31): Stop execution, de-assert CS and save operand[7:0] as the instruction start pointer for next
# sequence.Normally this instruction is used to support Execute-In-Place enhanced mode. See XIP enhanced mode for
# more details.This instruction is only allowed for AHB read commands. There is interrupt status bit set
# (INTR[IPCMDERR] or INTR[AHBCMDERR]) when using this instruction in IP command or AHB write command.
# - CMD_DDR, (33): Transmit command code to Flash.
# - RADDR_DDR, (34): Transmit row address to Flash.
# - CADDR_DDR, (35): Transmit column address to Flash.
# - MODE1_DDR, (36): Transmit mode bits to Flash.
# - MODE2_DDR, (37): Transmit mode bits to Flash.
# - MODE4_DDR, (38): Transmit mode bits to Flash.
# - MODE8_DDR, (39): Transmit mode bits to Flash.
# - WRITE_DDR, (40): Transmit program data to Flash device.
# - READ_DDR, (41): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_DDR, (42): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_DDR, (43): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_DDR, (44): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_DDR, (45): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# Possible options: <STOP, CMD_SDR, RADDR_SDR, CADDR_SDR, MODE1_SDR, MODE2_SDR, MODE4_SDR, MODE8_SDR, WRITE_SDR,
# READ_SDR, LEARN_SDR, DATSZ_SDR, DUMMY_SDR, DUMMY_RWDS_SDR, JMP_ON_CS, CMD_DDR, RADDR_DDR, CADDR_DDR, MODE1_DDR,
# MODE2_DDR, MODE4_DDR, MODE8_DDR, WRITE_DDR, READ_DDR, LEARN_DDR, DATSZ_DDR, DUMMY_DDR, DUMMY_RWDS_DDR>
OPERATION_CODE: STOP
lookupTable_seq1_instr1:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq1_instr2:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq1_instr3:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq1_instr4:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq1_instr5:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq1_instr6:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq1_instr7:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
# -----------------------------------===== lookupTable_seq2_instr0 [Optional] =====-----------------------------------
# Description: Offset: 0x000000A0, Width: 16b; Lookup table holds Flash command sequences 2, instruction 0
lookupTable_seq2_instr0:
# ------------------------------------------===== OPERAND [Optional] =====------------------------------------------
# Description: Offset: 0b, Width: 8b, Instruction operand. Its values depends on used instruction
OPERAND: 0
# -----------------------------------------===== NUM_PADS [Optional] =====------------------------------------------
# Description: Offset: 8b, Width: 2b, Number of pads used by instruction. Some instructions ignores this parameter.
# - 1PAD, (0): Single mode. One pad is used.
# - 2PAD, (1): Dual mode. Two pads are used.
# - 4PAD, (2): Quad mode. Four pads are used.
# - 8PAD, (3): Octal mode. Eight pads are used.
# Possible options: <1PAD, 2PAD, 4PAD, 8PAD>
NUM_PADS: 1PAD
# --------------------------------------===== OPERATION_CODE [Optional] =====---------------------------------------
# Description: Offset: 10b, Width: 6b, Instruction operation code.
# - STOP, (0): Stop execution and de-assert CS. Then, the next command sequence (to the same flash device) starts
# from instruction pointer 0.
# - CMD_SDR, (1): Transmit command code to Flash.
# - RADDR_SDR, (2): Transmit row address to Flash.
# - CADDR_SDR, (3): Transmit column address to Flash.
# - MODE1_SDR, (4): Transmit mode bits to Flash.
# - MODE2_SDR, (5): Transmit mode bits to Flash.
# - MODE4_SDR, (6): Transmit mode bits to Flash.
# - MODE8_SDR, (7): Transmit mode bits to Flash.
# - WRITE_SDR, (8): Transmit program data to Flash device.
# - READ_SDR, (9): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_SDR, (10): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_SDR, (11): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_SDR, (12): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_SDR, (13): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# - JMP_ON_CS, (31): Stop execution, de-assert CS and save operand[7:0] as the instruction start pointer for next
# sequence.Normally this instruction is used to support Execute-In-Place enhanced mode. See XIP enhanced mode for
# more details.This instruction is only allowed for AHB read commands. There is interrupt status bit set
# (INTR[IPCMDERR] or INTR[AHBCMDERR]) when using this instruction in IP command or AHB write command.
# - CMD_DDR, (33): Transmit command code to Flash.
# - RADDR_DDR, (34): Transmit row address to Flash.
# - CADDR_DDR, (35): Transmit column address to Flash.
# - MODE1_DDR, (36): Transmit mode bits to Flash.
# - MODE2_DDR, (37): Transmit mode bits to Flash.
# - MODE4_DDR, (38): Transmit mode bits to Flash.
# - MODE8_DDR, (39): Transmit mode bits to Flash.
# - WRITE_DDR, (40): Transmit program data to Flash device.
# - READ_DDR, (41): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_DDR, (42): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_DDR, (43): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_DDR, (44): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_DDR, (45): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# Possible options: <STOP, CMD_SDR, RADDR_SDR, CADDR_SDR, MODE1_SDR, MODE2_SDR, MODE4_SDR, MODE8_SDR, WRITE_SDR,
# READ_SDR, LEARN_SDR, DATSZ_SDR, DUMMY_SDR, DUMMY_RWDS_SDR, JMP_ON_CS, CMD_DDR, RADDR_DDR, CADDR_DDR, MODE1_DDR,
# MODE2_DDR, MODE4_DDR, MODE8_DDR, WRITE_DDR, READ_DDR, LEARN_DDR, DATSZ_DDR, DUMMY_DDR, DUMMY_RWDS_DDR>
OPERATION_CODE: STOP
lookupTable_seq2_instr1:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq2_instr2:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq2_instr3:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq2_instr4:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq2_instr5:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq2_instr6:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq2_instr7:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
# -----------------------------------===== lookupTable_seq3_instr0 [Optional] =====-----------------------------------
# Description: Offset: 0x000000B0, Width: 16b; Lookup table holds Flash command sequences 3, instruction 0
lookupTable_seq3_instr0:
# ------------------------------------------===== OPERAND [Optional] =====------------------------------------------
# Description: Offset: 0b, Width: 8b, Instruction operand. Its values depends on used instruction
OPERAND: 0
# -----------------------------------------===== NUM_PADS [Optional] =====------------------------------------------
# Description: Offset: 8b, Width: 2b, Number of pads used by instruction. Some instructions ignores this parameter.
# - 1PAD, (0): Single mode. One pad is used.
# - 2PAD, (1): Dual mode. Two pads are used.
# - 4PAD, (2): Quad mode. Four pads are used.
# - 8PAD, (3): Octal mode. Eight pads are used.
# Possible options: <1PAD, 2PAD, 4PAD, 8PAD>
NUM_PADS: 1PAD
# --------------------------------------===== OPERATION_CODE [Optional] =====---------------------------------------
# Description: Offset: 10b, Width: 6b, Instruction operation code.
# - STOP, (0): Stop execution and de-assert CS. Then, the next command sequence (to the same flash device) starts
# from instruction pointer 0.
# - CMD_SDR, (1): Transmit command code to Flash.
# - RADDR_SDR, (2): Transmit row address to Flash.
# - CADDR_SDR, (3): Transmit column address to Flash.
# - MODE1_SDR, (4): Transmit mode bits to Flash.
# - MODE2_SDR, (5): Transmit mode bits to Flash.
# - MODE4_SDR, (6): Transmit mode bits to Flash.
# - MODE8_SDR, (7): Transmit mode bits to Flash.
# - WRITE_SDR, (8): Transmit program data to Flash device.
# - READ_SDR, (9): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_SDR, (10): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_SDR, (11): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_SDR, (12): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_SDR, (13): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# - JMP_ON_CS, (31): Stop execution, de-assert CS and save operand[7:0] as the instruction start pointer for next
# sequence.Normally this instruction is used to support Execute-In-Place enhanced mode. See XIP enhanced mode for
# more details.This instruction is only allowed for AHB read commands. There is interrupt status bit set
# (INTR[IPCMDERR] or INTR[AHBCMDERR]) when using this instruction in IP command or AHB write command.
# - CMD_DDR, (33): Transmit command code to Flash.
# - RADDR_DDR, (34): Transmit row address to Flash.
# - CADDR_DDR, (35): Transmit column address to Flash.
# - MODE1_DDR, (36): Transmit mode bits to Flash.
# - MODE2_DDR, (37): Transmit mode bits to Flash.
# - MODE4_DDR, (38): Transmit mode bits to Flash.
# - MODE8_DDR, (39): Transmit mode bits to Flash.
# - WRITE_DDR, (40): Transmit program data to Flash device.
# - READ_DDR, (41): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_DDR, (42): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_DDR, (43): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_DDR, (44): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_DDR, (45): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# Possible options: <STOP, CMD_SDR, RADDR_SDR, CADDR_SDR, MODE1_SDR, MODE2_SDR, MODE4_SDR, MODE8_SDR, WRITE_SDR,
# READ_SDR, LEARN_SDR, DATSZ_SDR, DUMMY_SDR, DUMMY_RWDS_SDR, JMP_ON_CS, CMD_DDR, RADDR_DDR, CADDR_DDR, MODE1_DDR,
# MODE2_DDR, MODE4_DDR, MODE8_DDR, WRITE_DDR, READ_DDR, LEARN_DDR, DATSZ_DDR, DUMMY_DDR, DUMMY_RWDS_DDR>
OPERATION_CODE: STOP
lookupTable_seq3_instr1:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq3_instr2:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq3_instr3:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq3_instr4:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq3_instr5:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq3_instr6:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq3_instr7:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
# -----------------------------------===== lookupTable_seq4_instr0 [Optional] =====-----------------------------------
# Description: Offset: 0x000000C0, Width: 16b; Lookup table holds Flash command sequences 4, instruction 0
lookupTable_seq4_instr0:
# ------------------------------------------===== OPERAND [Optional] =====------------------------------------------
# Description: Offset: 0b, Width: 8b, Instruction operand. Its values depends on used instruction
OPERAND: 0
# -----------------------------------------===== NUM_PADS [Optional] =====------------------------------------------
# Description: Offset: 8b, Width: 2b, Number of pads used by instruction. Some instructions ignores this parameter.
# - 1PAD, (0): Single mode. One pad is used.
# - 2PAD, (1): Dual mode. Two pads are used.
# - 4PAD, (2): Quad mode. Four pads are used.
# - 8PAD, (3): Octal mode. Eight pads are used.
# Possible options: <1PAD, 2PAD, 4PAD, 8PAD>
NUM_PADS: 1PAD
# --------------------------------------===== OPERATION_CODE [Optional] =====---------------------------------------
# Description: Offset: 10b, Width: 6b, Instruction operation code.
# - STOP, (0): Stop execution and de-assert CS. Then, the next command sequence (to the same flash device) starts
# from instruction pointer 0.
# - CMD_SDR, (1): Transmit command code to Flash.
# - RADDR_SDR, (2): Transmit row address to Flash.
# - CADDR_SDR, (3): Transmit column address to Flash.
# - MODE1_SDR, (4): Transmit mode bits to Flash.
# - MODE2_SDR, (5): Transmit mode bits to Flash.
# - MODE4_SDR, (6): Transmit mode bits to Flash.
# - MODE8_SDR, (7): Transmit mode bits to Flash.
# - WRITE_SDR, (8): Transmit program data to Flash device.
# - READ_SDR, (9): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_SDR, (10): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_SDR, (11): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_SDR, (12): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_SDR, (13): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# - JMP_ON_CS, (31): Stop execution, de-assert CS and save operand[7:0] as the instruction start pointer for next
# sequence.Normally this instruction is used to support Execute-In-Place enhanced mode. See XIP enhanced mode for
# more details.This instruction is only allowed for AHB read commands. There is interrupt status bit set
# (INTR[IPCMDERR] or INTR[AHBCMDERR]) when using this instruction in IP command or AHB write command.
# - CMD_DDR, (33): Transmit command code to Flash.
# - RADDR_DDR, (34): Transmit row address to Flash.
# - CADDR_DDR, (35): Transmit column address to Flash.
# - MODE1_DDR, (36): Transmit mode bits to Flash.
# - MODE2_DDR, (37): Transmit mode bits to Flash.
# - MODE4_DDR, (38): Transmit mode bits to Flash.
# - MODE8_DDR, (39): Transmit mode bits to Flash.
# - WRITE_DDR, (40): Transmit program data to Flash device.
# - READ_DDR, (41): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_DDR, (42): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_DDR, (43): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_DDR, (44): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_DDR, (45): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# Possible options: <STOP, CMD_SDR, RADDR_SDR, CADDR_SDR, MODE1_SDR, MODE2_SDR, MODE4_SDR, MODE8_SDR, WRITE_SDR,
# READ_SDR, LEARN_SDR, DATSZ_SDR, DUMMY_SDR, DUMMY_RWDS_SDR, JMP_ON_CS, CMD_DDR, RADDR_DDR, CADDR_DDR, MODE1_DDR,
# MODE2_DDR, MODE4_DDR, MODE8_DDR, WRITE_DDR, READ_DDR, LEARN_DDR, DATSZ_DDR, DUMMY_DDR, DUMMY_RWDS_DDR>
OPERATION_CODE: STOP
lookupTable_seq4_instr1:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq4_instr2:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq4_instr3:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq4_instr4:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq4_instr5:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq4_instr6:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq4_instr7:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
# -----------------------------------===== lookupTable_seq5_instr0 [Optional] =====-----------------------------------
# Description: Offset: 0x000000D0, Width: 16b; Lookup table holds Flash command sequences 5, instruction 0
lookupTable_seq5_instr0:
# ------------------------------------------===== OPERAND [Optional] =====------------------------------------------
# Description: Offset: 0b, Width: 8b, Instruction operand. Its values depends on used instruction
OPERAND: 0
# -----------------------------------------===== NUM_PADS [Optional] =====------------------------------------------
# Description: Offset: 8b, Width: 2b, Number of pads used by instruction. Some instructions ignores this parameter.
# - 1PAD, (0): Single mode. One pad is used.
# - 2PAD, (1): Dual mode. Two pads are used.
# - 4PAD, (2): Quad mode. Four pads are used.
# - 8PAD, (3): Octal mode. Eight pads are used.
# Possible options: <1PAD, 2PAD, 4PAD, 8PAD>
NUM_PADS: 1PAD
# --------------------------------------===== OPERATION_CODE [Optional] =====---------------------------------------
# Description: Offset: 10b, Width: 6b, Instruction operation code.
# - STOP, (0): Stop execution and de-assert CS. Then, the next command sequence (to the same flash device) starts
# from instruction pointer 0.
# - CMD_SDR, (1): Transmit command code to Flash.
# - RADDR_SDR, (2): Transmit row address to Flash.
# - CADDR_SDR, (3): Transmit column address to Flash.
# - MODE1_SDR, (4): Transmit mode bits to Flash.
# - MODE2_SDR, (5): Transmit mode bits to Flash.
# - MODE4_SDR, (6): Transmit mode bits to Flash.
# - MODE8_SDR, (7): Transmit mode bits to Flash.
# - WRITE_SDR, (8): Transmit program data to Flash device.
# - READ_SDR, (9): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_SDR, (10): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_SDR, (11): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_SDR, (12): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_SDR, (13): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# - JMP_ON_CS, (31): Stop execution, de-assert CS and save operand[7:0] as the instruction start pointer for next
# sequence.Normally this instruction is used to support Execute-In-Place enhanced mode. See XIP enhanced mode for
# more details.This instruction is only allowed for AHB read commands. There is interrupt status bit set
# (INTR[IPCMDERR] or INTR[AHBCMDERR]) when using this instruction in IP command or AHB write command.
# - CMD_DDR, (33): Transmit command code to Flash.
# - RADDR_DDR, (34): Transmit row address to Flash.
# - CADDR_DDR, (35): Transmit column address to Flash.
# - MODE1_DDR, (36): Transmit mode bits to Flash.
# - MODE2_DDR, (37): Transmit mode bits to Flash.
# - MODE4_DDR, (38): Transmit mode bits to Flash.
# - MODE8_DDR, (39): Transmit mode bits to Flash.
# - WRITE_DDR, (40): Transmit program data to Flash device.
# - READ_DDR, (41): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_DDR, (42): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_DDR, (43): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_DDR, (44): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_DDR, (45): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# Possible options: <STOP, CMD_SDR, RADDR_SDR, CADDR_SDR, MODE1_SDR, MODE2_SDR, MODE4_SDR, MODE8_SDR, WRITE_SDR,
# READ_SDR, LEARN_SDR, DATSZ_SDR, DUMMY_SDR, DUMMY_RWDS_SDR, JMP_ON_CS, CMD_DDR, RADDR_DDR, CADDR_DDR, MODE1_DDR,
# MODE2_DDR, MODE4_DDR, MODE8_DDR, WRITE_DDR, READ_DDR, LEARN_DDR, DATSZ_DDR, DUMMY_DDR, DUMMY_RWDS_DDR>
OPERATION_CODE: STOP
lookupTable_seq5_instr1:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq5_instr2:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq5_instr3:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq5_instr4:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq5_instr5:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq5_instr6:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq5_instr7:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
# -----------------------------------===== lookupTable_seq6_instr0 [Optional] =====-----------------------------------
# Description: Offset: 0x000000E0, Width: 16b; Lookup table holds Flash command sequences 6, instruction 0
lookupTable_seq6_instr0:
# ------------------------------------------===== OPERAND [Optional] =====------------------------------------------
# Description: Offset: 0b, Width: 8b, Instruction operand. Its values depends on used instruction
OPERAND: 0
# -----------------------------------------===== NUM_PADS [Optional] =====------------------------------------------
# Description: Offset: 8b, Width: 2b, Number of pads used by instruction. Some instructions ignores this parameter.
# - 1PAD, (0): Single mode. One pad is used.
# - 2PAD, (1): Dual mode. Two pads are used.
# - 4PAD, (2): Quad mode. Four pads are used.
# - 8PAD, (3): Octal mode. Eight pads are used.
# Possible options: <1PAD, 2PAD, 4PAD, 8PAD>
NUM_PADS: 1PAD
# --------------------------------------===== OPERATION_CODE [Optional] =====---------------------------------------
# Description: Offset: 10b, Width: 6b, Instruction operation code.
# - STOP, (0): Stop execution and de-assert CS. Then, the next command sequence (to the same flash device) starts
# from instruction pointer 0.
# - CMD_SDR, (1): Transmit command code to Flash.
# - RADDR_SDR, (2): Transmit row address to Flash.
# - CADDR_SDR, (3): Transmit column address to Flash.
# - MODE1_SDR, (4): Transmit mode bits to Flash.
# - MODE2_SDR, (5): Transmit mode bits to Flash.
# - MODE4_SDR, (6): Transmit mode bits to Flash.
# - MODE8_SDR, (7): Transmit mode bits to Flash.
# - WRITE_SDR, (8): Transmit program data to Flash device.
# - READ_SDR, (9): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_SDR, (10): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_SDR, (11): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_SDR, (12): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_SDR, (13): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# - JMP_ON_CS, (31): Stop execution, de-assert CS and save operand[7:0] as the instruction start pointer for next
# sequence.Normally this instruction is used to support Execute-In-Place enhanced mode. See XIP enhanced mode for
# more details.This instruction is only allowed for AHB read commands. There is interrupt status bit set
# (INTR[IPCMDERR] or INTR[AHBCMDERR]) when using this instruction in IP command or AHB write command.
# - CMD_DDR, (33): Transmit command code to Flash.
# - RADDR_DDR, (34): Transmit row address to Flash.
# - CADDR_DDR, (35): Transmit column address to Flash.
# - MODE1_DDR, (36): Transmit mode bits to Flash.
# - MODE2_DDR, (37): Transmit mode bits to Flash.
# - MODE4_DDR, (38): Transmit mode bits to Flash.
# - MODE8_DDR, (39): Transmit mode bits to Flash.
# - WRITE_DDR, (40): Transmit program data to Flash device.
# - READ_DDR, (41): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_DDR, (42): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_DDR, (43): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_DDR, (44): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_DDR, (45): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# Possible options: <STOP, CMD_SDR, RADDR_SDR, CADDR_SDR, MODE1_SDR, MODE2_SDR, MODE4_SDR, MODE8_SDR, WRITE_SDR,
# READ_SDR, LEARN_SDR, DATSZ_SDR, DUMMY_SDR, DUMMY_RWDS_SDR, JMP_ON_CS, CMD_DDR, RADDR_DDR, CADDR_DDR, MODE1_DDR,
# MODE2_DDR, MODE4_DDR, MODE8_DDR, WRITE_DDR, READ_DDR, LEARN_DDR, DATSZ_DDR, DUMMY_DDR, DUMMY_RWDS_DDR>
OPERATION_CODE: STOP
lookupTable_seq6_instr1:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq6_instr2:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq6_instr3:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq6_instr4:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq6_instr5:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq6_instr6:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq6_instr7:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
# -----------------------------------===== lookupTable_seq7_instr0 [Optional] =====-----------------------------------
# Description: Offset: 0x000000F0, Width: 16b; Lookup table holds Flash command sequences 7, instruction 0
lookupTable_seq7_instr0:
# ------------------------------------------===== OPERAND [Optional] =====------------------------------------------
# Description: Offset: 0b, Width: 8b, Instruction operand. Its values depends on used instruction
OPERAND: 0
# -----------------------------------------===== NUM_PADS [Optional] =====------------------------------------------
# Description: Offset: 8b, Width: 2b, Number of pads used by instruction. Some instructions ignores this parameter.
# - 1PAD, (0): Single mode. One pad is used.
# - 2PAD, (1): Dual mode. Two pads are used.
# - 4PAD, (2): Quad mode. Four pads are used.
# - 8PAD, (3): Octal mode. Eight pads are used.
# Possible options: <1PAD, 2PAD, 4PAD, 8PAD>
NUM_PADS: 1PAD
# --------------------------------------===== OPERATION_CODE [Optional] =====---------------------------------------
# Description: Offset: 10b, Width: 6b, Instruction operation code.
# - STOP, (0): Stop execution and de-assert CS. Then, the next command sequence (to the same flash device) starts
# from instruction pointer 0.
# - CMD_SDR, (1): Transmit command code to Flash.
# - RADDR_SDR, (2): Transmit row address to Flash.
# - CADDR_SDR, (3): Transmit column address to Flash.
# - MODE1_SDR, (4): Transmit mode bits to Flash.
# - MODE2_SDR, (5): Transmit mode bits to Flash.
# - MODE4_SDR, (6): Transmit mode bits to Flash.
# - MODE8_SDR, (7): Transmit mode bits to Flash.
# - WRITE_SDR, (8): Transmit program data to Flash device.
# - READ_SDR, (9): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_SDR, (10): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_SDR, (11): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_SDR, (12): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_SDR, (13): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# - JMP_ON_CS, (31): Stop execution, de-assert CS and save operand[7:0] as the instruction start pointer for next
# sequence.Normally this instruction is used to support Execute-In-Place enhanced mode. See XIP enhanced mode for
# more details.This instruction is only allowed for AHB read commands. There is interrupt status bit set
# (INTR[IPCMDERR] or INTR[AHBCMDERR]) when using this instruction in IP command or AHB write command.
# - CMD_DDR, (33): Transmit command code to Flash.
# - RADDR_DDR, (34): Transmit row address to Flash.
# - CADDR_DDR, (35): Transmit column address to Flash.
# - MODE1_DDR, (36): Transmit mode bits to Flash.
# - MODE2_DDR, (37): Transmit mode bits to Flash.
# - MODE4_DDR, (38): Transmit mode bits to Flash.
# - MODE8_DDR, (39): Transmit mode bits to Flash.
# - WRITE_DDR, (40): Transmit program data to Flash device.
# - READ_DDR, (41): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_DDR, (42): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_DDR, (43): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_DDR, (44): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_DDR, (45): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# Possible options: <STOP, CMD_SDR, RADDR_SDR, CADDR_SDR, MODE1_SDR, MODE2_SDR, MODE4_SDR, MODE8_SDR, WRITE_SDR,
# READ_SDR, LEARN_SDR, DATSZ_SDR, DUMMY_SDR, DUMMY_RWDS_SDR, JMP_ON_CS, CMD_DDR, RADDR_DDR, CADDR_DDR, MODE1_DDR,
# MODE2_DDR, MODE4_DDR, MODE8_DDR, WRITE_DDR, READ_DDR, LEARN_DDR, DATSZ_DDR, DUMMY_DDR, DUMMY_RWDS_DDR>
OPERATION_CODE: STOP
lookupTable_seq7_instr1:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq7_instr2:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq7_instr3:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq7_instr4:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq7_instr5:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq7_instr6:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq7_instr7:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
# -----------------------------------===== lookupTable_seq8_instr0 [Optional] =====-----------------------------------
# Description: Offset: 0x00000100, Width: 16b; Lookup table holds Flash command sequences 8, instruction 0
lookupTable_seq8_instr0:
# ------------------------------------------===== OPERAND [Optional] =====------------------------------------------
# Description: Offset: 0b, Width: 8b, Instruction operand. Its values depends on used instruction
OPERAND: 0
# -----------------------------------------===== NUM_PADS [Optional] =====------------------------------------------
# Description: Offset: 8b, Width: 2b, Number of pads used by instruction. Some instructions ignores this parameter.
# - 1PAD, (0): Single mode. One pad is used.
# - 2PAD, (1): Dual mode. Two pads are used.
# - 4PAD, (2): Quad mode. Four pads are used.
# - 8PAD, (3): Octal mode. Eight pads are used.
# Possible options: <1PAD, 2PAD, 4PAD, 8PAD>
NUM_PADS: 1PAD
# --------------------------------------===== OPERATION_CODE [Optional] =====---------------------------------------
# Description: Offset: 10b, Width: 6b, Instruction operation code.
# - STOP, (0): Stop execution and de-assert CS. Then, the next command sequence (to the same flash device) starts
# from instruction pointer 0.
# - CMD_SDR, (1): Transmit command code to Flash.
# - RADDR_SDR, (2): Transmit row address to Flash.
# - CADDR_SDR, (3): Transmit column address to Flash.
# - MODE1_SDR, (4): Transmit mode bits to Flash.
# - MODE2_SDR, (5): Transmit mode bits to Flash.
# - MODE4_SDR, (6): Transmit mode bits to Flash.
# - MODE8_SDR, (7): Transmit mode bits to Flash.
# - WRITE_SDR, (8): Transmit program data to Flash device.
# - READ_SDR, (9): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_SDR, (10): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_SDR, (11): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_SDR, (12): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_SDR, (13): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# - JMP_ON_CS, (31): Stop execution, de-assert CS and save operand[7:0] as the instruction start pointer for next
# sequence.Normally this instruction is used to support Execute-In-Place enhanced mode. See XIP enhanced mode for
# more details.This instruction is only allowed for AHB read commands. There is interrupt status bit set
# (INTR[IPCMDERR] or INTR[AHBCMDERR]) when using this instruction in IP command or AHB write command.
# - CMD_DDR, (33): Transmit command code to Flash.
# - RADDR_DDR, (34): Transmit row address to Flash.
# - CADDR_DDR, (35): Transmit column address to Flash.
# - MODE1_DDR, (36): Transmit mode bits to Flash.
# - MODE2_DDR, (37): Transmit mode bits to Flash.
# - MODE4_DDR, (38): Transmit mode bits to Flash.
# - MODE8_DDR, (39): Transmit mode bits to Flash.
# - WRITE_DDR, (40): Transmit program data to Flash device.
# - READ_DDR, (41): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_DDR, (42): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_DDR, (43): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_DDR, (44): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_DDR, (45): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# Possible options: <STOP, CMD_SDR, RADDR_SDR, CADDR_SDR, MODE1_SDR, MODE2_SDR, MODE4_SDR, MODE8_SDR, WRITE_SDR,
# READ_SDR, LEARN_SDR, DATSZ_SDR, DUMMY_SDR, DUMMY_RWDS_SDR, JMP_ON_CS, CMD_DDR, RADDR_DDR, CADDR_DDR, MODE1_DDR,
# MODE2_DDR, MODE4_DDR, MODE8_DDR, WRITE_DDR, READ_DDR, LEARN_DDR, DATSZ_DDR, DUMMY_DDR, DUMMY_RWDS_DDR>
OPERATION_CODE: STOP
lookupTable_seq8_instr1:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq8_instr2:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq8_instr3:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq8_instr4:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq8_instr5:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq8_instr6:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq8_instr7:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
# -----------------------------------===== lookupTable_seq9_instr0 [Optional] =====-----------------------------------
# Description: Offset: 0x00000110, Width: 16b; Lookup table holds Flash command sequences 9, instruction 0
lookupTable_seq9_instr0:
# ------------------------------------------===== OPERAND [Optional] =====------------------------------------------
# Description: Offset: 0b, Width: 8b, Instruction operand. Its values depends on used instruction
OPERAND: 0
# -----------------------------------------===== NUM_PADS [Optional] =====------------------------------------------
# Description: Offset: 8b, Width: 2b, Number of pads used by instruction. Some instructions ignores this parameter.
# - 1PAD, (0): Single mode. One pad is used.
# - 2PAD, (1): Dual mode. Two pads are used.
# - 4PAD, (2): Quad mode. Four pads are used.
# - 8PAD, (3): Octal mode. Eight pads are used.
# Possible options: <1PAD, 2PAD, 4PAD, 8PAD>
NUM_PADS: 1PAD
# --------------------------------------===== OPERATION_CODE [Optional] =====---------------------------------------
# Description: Offset: 10b, Width: 6b, Instruction operation code.
# - STOP, (0): Stop execution and de-assert CS. Then, the next command sequence (to the same flash device) starts
# from instruction pointer 0.
# - CMD_SDR, (1): Transmit command code to Flash.
# - RADDR_SDR, (2): Transmit row address to Flash.
# - CADDR_SDR, (3): Transmit column address to Flash.
# - MODE1_SDR, (4): Transmit mode bits to Flash.
# - MODE2_SDR, (5): Transmit mode bits to Flash.
# - MODE4_SDR, (6): Transmit mode bits to Flash.
# - MODE8_SDR, (7): Transmit mode bits to Flash.
# - WRITE_SDR, (8): Transmit program data to Flash device.
# - READ_SDR, (9): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_SDR, (10): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_SDR, (11): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_SDR, (12): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_SDR, (13): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# - JMP_ON_CS, (31): Stop execution, de-assert CS and save operand[7:0] as the instruction start pointer for next
# sequence.Normally this instruction is used to support Execute-In-Place enhanced mode. See XIP enhanced mode for
# more details.This instruction is only allowed for AHB read commands. There is interrupt status bit set
# (INTR[IPCMDERR] or INTR[AHBCMDERR]) when using this instruction in IP command or AHB write command.
# - CMD_DDR, (33): Transmit command code to Flash.
# - RADDR_DDR, (34): Transmit row address to Flash.
# - CADDR_DDR, (35): Transmit column address to Flash.
# - MODE1_DDR, (36): Transmit mode bits to Flash.
# - MODE2_DDR, (37): Transmit mode bits to Flash.
# - MODE4_DDR, (38): Transmit mode bits to Flash.
# - MODE8_DDR, (39): Transmit mode bits to Flash.
# - WRITE_DDR, (40): Transmit program data to Flash device.
# - READ_DDR, (41): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_DDR, (42): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_DDR, (43): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_DDR, (44): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_DDR, (45): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# Possible options: <STOP, CMD_SDR, RADDR_SDR, CADDR_SDR, MODE1_SDR, MODE2_SDR, MODE4_SDR, MODE8_SDR, WRITE_SDR,
# READ_SDR, LEARN_SDR, DATSZ_SDR, DUMMY_SDR, DUMMY_RWDS_SDR, JMP_ON_CS, CMD_DDR, RADDR_DDR, CADDR_DDR, MODE1_DDR,
# MODE2_DDR, MODE4_DDR, MODE8_DDR, WRITE_DDR, READ_DDR, LEARN_DDR, DATSZ_DDR, DUMMY_DDR, DUMMY_RWDS_DDR>
OPERATION_CODE: STOP
lookupTable_seq9_instr1:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq9_instr2:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq9_instr3:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq9_instr4:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq9_instr5:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq9_instr6:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq9_instr7:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
# ----------------------------------===== lookupTable_seq10_instr0 [Optional] =====-----------------------------------
# Description: Offset: 0x00000120, Width: 16b; Lookup table holds Flash command sequences 10, instruction 0
lookupTable_seq10_instr0:
# ------------------------------------------===== OPERAND [Optional] =====------------------------------------------
# Description: Offset: 0b, Width: 8b, Instruction operand. Its values depends on used instruction
OPERAND: 0
# -----------------------------------------===== NUM_PADS [Optional] =====------------------------------------------
# Description: Offset: 8b, Width: 2b, Number of pads used by instruction. Some instructions ignores this parameter.
# - 1PAD, (0): Single mode. One pad is used.
# - 2PAD, (1): Dual mode. Two pads are used.
# - 4PAD, (2): Quad mode. Four pads are used.
# - 8PAD, (3): Octal mode. Eight pads are used.
# Possible options: <1PAD, 2PAD, 4PAD, 8PAD>
NUM_PADS: 1PAD
# --------------------------------------===== OPERATION_CODE [Optional] =====---------------------------------------
# Description: Offset: 10b, Width: 6b, Instruction operation code.
# - STOP, (0): Stop execution and de-assert CS. Then, the next command sequence (to the same flash device) starts
# from instruction pointer 0.
# - CMD_SDR, (1): Transmit command code to Flash.
# - RADDR_SDR, (2): Transmit row address to Flash.
# - CADDR_SDR, (3): Transmit column address to Flash.
# - MODE1_SDR, (4): Transmit mode bits to Flash.
# - MODE2_SDR, (5): Transmit mode bits to Flash.
# - MODE4_SDR, (6): Transmit mode bits to Flash.
# - MODE8_SDR, (7): Transmit mode bits to Flash.
# - WRITE_SDR, (8): Transmit program data to Flash device.
# - READ_SDR, (9): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_SDR, (10): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_SDR, (11): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_SDR, (12): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_SDR, (13): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# - JMP_ON_CS, (31): Stop execution, de-assert CS and save operand[7:0] as the instruction start pointer for next
# sequence.Normally this instruction is used to support Execute-In-Place enhanced mode. See XIP enhanced mode for
# more details.This instruction is only allowed for AHB read commands. There is interrupt status bit set
# (INTR[IPCMDERR] or INTR[AHBCMDERR]) when using this instruction in IP command or AHB write command.
# - CMD_DDR, (33): Transmit command code to Flash.
# - RADDR_DDR, (34): Transmit row address to Flash.
# - CADDR_DDR, (35): Transmit column address to Flash.
# - MODE1_DDR, (36): Transmit mode bits to Flash.
# - MODE2_DDR, (37): Transmit mode bits to Flash.
# - MODE4_DDR, (38): Transmit mode bits to Flash.
# - MODE8_DDR, (39): Transmit mode bits to Flash.
# - WRITE_DDR, (40): Transmit program data to Flash device.
# - READ_DDR, (41): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_DDR, (42): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_DDR, (43): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_DDR, (44): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_DDR, (45): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# Possible options: <STOP, CMD_SDR, RADDR_SDR, CADDR_SDR, MODE1_SDR, MODE2_SDR, MODE4_SDR, MODE8_SDR, WRITE_SDR,
# READ_SDR, LEARN_SDR, DATSZ_SDR, DUMMY_SDR, DUMMY_RWDS_SDR, JMP_ON_CS, CMD_DDR, RADDR_DDR, CADDR_DDR, MODE1_DDR,
# MODE2_DDR, MODE4_DDR, MODE8_DDR, WRITE_DDR, READ_DDR, LEARN_DDR, DATSZ_DDR, DUMMY_DDR, DUMMY_RWDS_DDR>
OPERATION_CODE: STOP
lookupTable_seq10_instr1:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq10_instr2:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq10_instr3:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq10_instr4:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq10_instr5:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq10_instr6:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq10_instr7:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
# ----------------------------------===== lookupTable_seq11_instr0 [Optional] =====-----------------------------------
# Description: Offset: 0x00000130, Width: 16b; Lookup table holds Flash command sequences 11, instruction 0
lookupTable_seq11_instr0:
# ------------------------------------------===== OPERAND [Optional] =====------------------------------------------
# Description: Offset: 0b, Width: 8b, Instruction operand. Its values depends on used instruction
OPERAND: 0
# -----------------------------------------===== NUM_PADS [Optional] =====------------------------------------------
# Description: Offset: 8b, Width: 2b, Number of pads used by instruction. Some instructions ignores this parameter.
# - 1PAD, (0): Single mode. One pad is used.
# - 2PAD, (1): Dual mode. Two pads are used.
# - 4PAD, (2): Quad mode. Four pads are used.
# - 8PAD, (3): Octal mode. Eight pads are used.
# Possible options: <1PAD, 2PAD, 4PAD, 8PAD>
NUM_PADS: 1PAD
# --------------------------------------===== OPERATION_CODE [Optional] =====---------------------------------------
# Description: Offset: 10b, Width: 6b, Instruction operation code.
# - STOP, (0): Stop execution and de-assert CS. Then, the next command sequence (to the same flash device) starts
# from instruction pointer 0.
# - CMD_SDR, (1): Transmit command code to Flash.
# - RADDR_SDR, (2): Transmit row address to Flash.
# - CADDR_SDR, (3): Transmit column address to Flash.
# - MODE1_SDR, (4): Transmit mode bits to Flash.
# - MODE2_SDR, (5): Transmit mode bits to Flash.
# - MODE4_SDR, (6): Transmit mode bits to Flash.
# - MODE8_SDR, (7): Transmit mode bits to Flash.
# - WRITE_SDR, (8): Transmit program data to Flash device.
# - READ_SDR, (9): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_SDR, (10): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_SDR, (11): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_SDR, (12): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_SDR, (13): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# - JMP_ON_CS, (31): Stop execution, de-assert CS and save operand[7:0] as the instruction start pointer for next
# sequence.Normally this instruction is used to support Execute-In-Place enhanced mode. See XIP enhanced mode for
# more details.This instruction is only allowed for AHB read commands. There is interrupt status bit set
# (INTR[IPCMDERR] or INTR[AHBCMDERR]) when using this instruction in IP command or AHB write command.
# - CMD_DDR, (33): Transmit command code to Flash.
# - RADDR_DDR, (34): Transmit row address to Flash.
# - CADDR_DDR, (35): Transmit column address to Flash.
# - MODE1_DDR, (36): Transmit mode bits to Flash.
# - MODE2_DDR, (37): Transmit mode bits to Flash.
# - MODE4_DDR, (38): Transmit mode bits to Flash.
# - MODE8_DDR, (39): Transmit mode bits to Flash.
# - WRITE_DDR, (40): Transmit program data to Flash device.
# - READ_DDR, (41): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_DDR, (42): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_DDR, (43): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_DDR, (44): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_DDR, (45): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# Possible options: <STOP, CMD_SDR, RADDR_SDR, CADDR_SDR, MODE1_SDR, MODE2_SDR, MODE4_SDR, MODE8_SDR, WRITE_SDR,
# READ_SDR, LEARN_SDR, DATSZ_SDR, DUMMY_SDR, DUMMY_RWDS_SDR, JMP_ON_CS, CMD_DDR, RADDR_DDR, CADDR_DDR, MODE1_DDR,
# MODE2_DDR, MODE4_DDR, MODE8_DDR, WRITE_DDR, READ_DDR, LEARN_DDR, DATSZ_DDR, DUMMY_DDR, DUMMY_RWDS_DDR>
OPERATION_CODE: STOP
lookupTable_seq11_instr1:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq11_instr2:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq11_instr3:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq11_instr4:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq11_instr5:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq11_instr6:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq11_instr7:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
# ----------------------------------===== lookupTable_seq12_instr0 [Optional] =====-----------------------------------
# Description: Offset: 0x00000140, Width: 16b; Lookup table holds Flash command sequences 12, instruction 0
lookupTable_seq12_instr0:
# ------------------------------------------===== OPERAND [Optional] =====------------------------------------------
# Description: Offset: 0b, Width: 8b, Instruction operand. Its values depends on used instruction
OPERAND: 0
# -----------------------------------------===== NUM_PADS [Optional] =====------------------------------------------
# Description: Offset: 8b, Width: 2b, Number of pads used by instruction. Some instructions ignores this parameter.
# - 1PAD, (0): Single mode. One pad is used.
# - 2PAD, (1): Dual mode. Two pads are used.
# - 4PAD, (2): Quad mode. Four pads are used.
# - 8PAD, (3): Octal mode. Eight pads are used.
# Possible options: <1PAD, 2PAD, 4PAD, 8PAD>
NUM_PADS: 1PAD
# --------------------------------------===== OPERATION_CODE [Optional] =====---------------------------------------
# Description: Offset: 10b, Width: 6b, Instruction operation code.
# - STOP, (0): Stop execution and de-assert CS. Then, the next command sequence (to the same flash device) starts
# from instruction pointer 0.
# - CMD_SDR, (1): Transmit command code to Flash.
# - RADDR_SDR, (2): Transmit row address to Flash.
# - CADDR_SDR, (3): Transmit column address to Flash.
# - MODE1_SDR, (4): Transmit mode bits to Flash.
# - MODE2_SDR, (5): Transmit mode bits to Flash.
# - MODE4_SDR, (6): Transmit mode bits to Flash.
# - MODE8_SDR, (7): Transmit mode bits to Flash.
# - WRITE_SDR, (8): Transmit program data to Flash device.
# - READ_SDR, (9): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_SDR, (10): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_SDR, (11): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_SDR, (12): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_SDR, (13): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# - JMP_ON_CS, (31): Stop execution, de-assert CS and save operand[7:0] as the instruction start pointer for next
# sequence.Normally this instruction is used to support Execute-In-Place enhanced mode. See XIP enhanced mode for
# more details.This instruction is only allowed for AHB read commands. There is interrupt status bit set
# (INTR[IPCMDERR] or INTR[AHBCMDERR]) when using this instruction in IP command or AHB write command.
# - CMD_DDR, (33): Transmit command code to Flash.
# - RADDR_DDR, (34): Transmit row address to Flash.
# - CADDR_DDR, (35): Transmit column address to Flash.
# - MODE1_DDR, (36): Transmit mode bits to Flash.
# - MODE2_DDR, (37): Transmit mode bits to Flash.
# - MODE4_DDR, (38): Transmit mode bits to Flash.
# - MODE8_DDR, (39): Transmit mode bits to Flash.
# - WRITE_DDR, (40): Transmit program data to Flash device.
# - READ_DDR, (41): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_DDR, (42): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_DDR, (43): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_DDR, (44): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_DDR, (45): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# Possible options: <STOP, CMD_SDR, RADDR_SDR, CADDR_SDR, MODE1_SDR, MODE2_SDR, MODE4_SDR, MODE8_SDR, WRITE_SDR,
# READ_SDR, LEARN_SDR, DATSZ_SDR, DUMMY_SDR, DUMMY_RWDS_SDR, JMP_ON_CS, CMD_DDR, RADDR_DDR, CADDR_DDR, MODE1_DDR,
# MODE2_DDR, MODE4_DDR, MODE8_DDR, WRITE_DDR, READ_DDR, LEARN_DDR, DATSZ_DDR, DUMMY_DDR, DUMMY_RWDS_DDR>
OPERATION_CODE: STOP
lookupTable_seq12_instr1:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq12_instr2:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq12_instr3:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq12_instr4:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq12_instr5:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq12_instr6:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq12_instr7:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
# ----------------------------------===== lookupTable_seq13_instr0 [Optional] =====-----------------------------------
# Description: Offset: 0x00000150, Width: 16b; Lookup table holds Flash command sequences 13, instruction 0
lookupTable_seq13_instr0:
# ------------------------------------------===== OPERAND [Optional] =====------------------------------------------
# Description: Offset: 0b, Width: 8b, Instruction operand. Its values depends on used instruction
OPERAND: 0
# -----------------------------------------===== NUM_PADS [Optional] =====------------------------------------------
# Description: Offset: 8b, Width: 2b, Number of pads used by instruction. Some instructions ignores this parameter.
# - 1PAD, (0): Single mode. One pad is used.
# - 2PAD, (1): Dual mode. Two pads are used.
# - 4PAD, (2): Quad mode. Four pads are used.
# - 8PAD, (3): Octal mode. Eight pads are used.
# Possible options: <1PAD, 2PAD, 4PAD, 8PAD>
NUM_PADS: 1PAD
# --------------------------------------===== OPERATION_CODE [Optional] =====---------------------------------------
# Description: Offset: 10b, Width: 6b, Instruction operation code.
# - STOP, (0): Stop execution and de-assert CS. Then, the next command sequence (to the same flash device) starts
# from instruction pointer 0.
# - CMD_SDR, (1): Transmit command code to Flash.
# - RADDR_SDR, (2): Transmit row address to Flash.
# - CADDR_SDR, (3): Transmit column address to Flash.
# - MODE1_SDR, (4): Transmit mode bits to Flash.
# - MODE2_SDR, (5): Transmit mode bits to Flash.
# - MODE4_SDR, (6): Transmit mode bits to Flash.
# - MODE8_SDR, (7): Transmit mode bits to Flash.
# - WRITE_SDR, (8): Transmit program data to Flash device.
# - READ_SDR, (9): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_SDR, (10): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_SDR, (11): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_SDR, (12): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_SDR, (13): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# - JMP_ON_CS, (31): Stop execution, de-assert CS and save operand[7:0] as the instruction start pointer for next
# sequence.Normally this instruction is used to support Execute-In-Place enhanced mode. See XIP enhanced mode for
# more details.This instruction is only allowed for AHB read commands. There is interrupt status bit set
# (INTR[IPCMDERR] or INTR[AHBCMDERR]) when using this instruction in IP command or AHB write command.
# - CMD_DDR, (33): Transmit command code to Flash.
# - RADDR_DDR, (34): Transmit row address to Flash.
# - CADDR_DDR, (35): Transmit column address to Flash.
# - MODE1_DDR, (36): Transmit mode bits to Flash.
# - MODE2_DDR, (37): Transmit mode bits to Flash.
# - MODE4_DDR, (38): Transmit mode bits to Flash.
# - MODE8_DDR, (39): Transmit mode bits to Flash.
# - WRITE_DDR, (40): Transmit program data to Flash device.
# - READ_DDR, (41): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_DDR, (42): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_DDR, (43): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_DDR, (44): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_DDR, (45): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# Possible options: <STOP, CMD_SDR, RADDR_SDR, CADDR_SDR, MODE1_SDR, MODE2_SDR, MODE4_SDR, MODE8_SDR, WRITE_SDR,
# READ_SDR, LEARN_SDR, DATSZ_SDR, DUMMY_SDR, DUMMY_RWDS_SDR, JMP_ON_CS, CMD_DDR, RADDR_DDR, CADDR_DDR, MODE1_DDR,
# MODE2_DDR, MODE4_DDR, MODE8_DDR, WRITE_DDR, READ_DDR, LEARN_DDR, DATSZ_DDR, DUMMY_DDR, DUMMY_RWDS_DDR>
OPERATION_CODE: STOP
lookupTable_seq13_instr1:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq13_instr2:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq13_instr3:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq13_instr4:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq13_instr5:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq13_instr6:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq13_instr7:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
# ----------------------------------===== lookupTable_seq14_instr0 [Optional] =====-----------------------------------
# Description: Offset: 0x00000160, Width: 16b; Lookup table holds Flash command sequences 14, instruction 0
lookupTable_seq14_instr0:
# ------------------------------------------===== OPERAND [Optional] =====------------------------------------------
# Description: Offset: 0b, Width: 8b, Instruction operand. Its values depends on used instruction
OPERAND: 0
# -----------------------------------------===== NUM_PADS [Optional] =====------------------------------------------
# Description: Offset: 8b, Width: 2b, Number of pads used by instruction. Some instructions ignores this parameter.
# - 1PAD, (0): Single mode. One pad is used.
# - 2PAD, (1): Dual mode. Two pads are used.
# - 4PAD, (2): Quad mode. Four pads are used.
# - 8PAD, (3): Octal mode. Eight pads are used.
# Possible options: <1PAD, 2PAD, 4PAD, 8PAD>
NUM_PADS: 1PAD
# --------------------------------------===== OPERATION_CODE [Optional] =====---------------------------------------
# Description: Offset: 10b, Width: 6b, Instruction operation code.
# - STOP, (0): Stop execution and de-assert CS. Then, the next command sequence (to the same flash device) starts
# from instruction pointer 0.
# - CMD_SDR, (1): Transmit command code to Flash.
# - RADDR_SDR, (2): Transmit row address to Flash.
# - CADDR_SDR, (3): Transmit column address to Flash.
# - MODE1_SDR, (4): Transmit mode bits to Flash.
# - MODE2_SDR, (5): Transmit mode bits to Flash.
# - MODE4_SDR, (6): Transmit mode bits to Flash.
# - MODE8_SDR, (7): Transmit mode bits to Flash.
# - WRITE_SDR, (8): Transmit program data to Flash device.
# - READ_SDR, (9): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_SDR, (10): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_SDR, (11): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_SDR, (12): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_SDR, (13): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# - JMP_ON_CS, (31): Stop execution, de-assert CS and save operand[7:0] as the instruction start pointer for next
# sequence.Normally this instruction is used to support Execute-In-Place enhanced mode. See XIP enhanced mode for
# more details.This instruction is only allowed for AHB read commands. There is interrupt status bit set
# (INTR[IPCMDERR] or INTR[AHBCMDERR]) when using this instruction in IP command or AHB write command.
# - CMD_DDR, (33): Transmit command code to Flash.
# - RADDR_DDR, (34): Transmit row address to Flash.
# - CADDR_DDR, (35): Transmit column address to Flash.
# - MODE1_DDR, (36): Transmit mode bits to Flash.
# - MODE2_DDR, (37): Transmit mode bits to Flash.
# - MODE4_DDR, (38): Transmit mode bits to Flash.
# - MODE8_DDR, (39): Transmit mode bits to Flash.
# - WRITE_DDR, (40): Transmit program data to Flash device.
# - READ_DDR, (41): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_DDR, (42): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_DDR, (43): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_DDR, (44): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_DDR, (45): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# Possible options: <STOP, CMD_SDR, RADDR_SDR, CADDR_SDR, MODE1_SDR, MODE2_SDR, MODE4_SDR, MODE8_SDR, WRITE_SDR,
# READ_SDR, LEARN_SDR, DATSZ_SDR, DUMMY_SDR, DUMMY_RWDS_SDR, JMP_ON_CS, CMD_DDR, RADDR_DDR, CADDR_DDR, MODE1_DDR,
# MODE2_DDR, MODE4_DDR, MODE8_DDR, WRITE_DDR, READ_DDR, LEARN_DDR, DATSZ_DDR, DUMMY_DDR, DUMMY_RWDS_DDR>
OPERATION_CODE: STOP
lookupTable_seq14_instr1:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq14_instr2:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq14_instr3:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq14_instr4:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq14_instr5:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq14_instr6:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq14_instr7:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
# ----------------------------------===== lookupTable_seq15_instr0 [Optional] =====-----------------------------------
# Description: Offset: 0x00000170, Width: 16b; Lookup table holds Flash command sequences 15, instruction 0
lookupTable_seq15_instr0:
# ------------------------------------------===== OPERAND [Optional] =====------------------------------------------
# Description: Offset: 0b, Width: 8b, Instruction operand. Its values depends on used instruction
OPERAND: 0
# -----------------------------------------===== NUM_PADS [Optional] =====------------------------------------------
# Description: Offset: 8b, Width: 2b, Number of pads used by instruction. Some instructions ignores this parameter.
# - 1PAD, (0): Single mode. One pad is used.
# - 2PAD, (1): Dual mode. Two pads are used.
# - 4PAD, (2): Quad mode. Four pads are used.
# - 8PAD, (3): Octal mode. Eight pads are used.
# Possible options: <1PAD, 2PAD, 4PAD, 8PAD>
NUM_PADS: 1PAD
# --------------------------------------===== OPERATION_CODE [Optional] =====---------------------------------------
# Description: Offset: 10b, Width: 6b, Instruction operation code.
# - STOP, (0): Stop execution and de-assert CS. Then, the next command sequence (to the same flash device) starts
# from instruction pointer 0.
# - CMD_SDR, (1): Transmit command code to Flash.
# - RADDR_SDR, (2): Transmit row address to Flash.
# - CADDR_SDR, (3): Transmit column address to Flash.
# - MODE1_SDR, (4): Transmit mode bits to Flash.
# - MODE2_SDR, (5): Transmit mode bits to Flash.
# - MODE4_SDR, (6): Transmit mode bits to Flash.
# - MODE8_SDR, (7): Transmit mode bits to Flash.
# - WRITE_SDR, (8): Transmit program data to Flash device.
# - READ_SDR, (9): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_SDR, (10): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_SDR, (11): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_SDR, (12): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_SDR, (13): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# - JMP_ON_CS, (31): Stop execution, de-assert CS and save operand[7:0] as the instruction start pointer for next
# sequence.Normally this instruction is used to support Execute-In-Place enhanced mode. See XIP enhanced mode for
# more details.This instruction is only allowed for AHB read commands. There is interrupt status bit set
# (INTR[IPCMDERR] or INTR[AHBCMDERR]) when using this instruction in IP command or AHB write command.
# - CMD_DDR, (33): Transmit command code to Flash.
# - RADDR_DDR, (34): Transmit row address to Flash.
# - CADDR_DDR, (35): Transmit column address to Flash.
# - MODE1_DDR, (36): Transmit mode bits to Flash.
# - MODE2_DDR, (37): Transmit mode bits to Flash.
# - MODE4_DDR, (38): Transmit mode bits to Flash.
# - MODE8_DDR, (39): Transmit mode bits to Flash.
# - WRITE_DDR, (40): Transmit program data to Flash device.
# - READ_DDR, (41): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_DDR, (42): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_DDR, (43): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_DDR, (44): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_DDR, (45): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# Possible options: <STOP, CMD_SDR, RADDR_SDR, CADDR_SDR, MODE1_SDR, MODE2_SDR, MODE4_SDR, MODE8_SDR, WRITE_SDR,
# READ_SDR, LEARN_SDR, DATSZ_SDR, DUMMY_SDR, DUMMY_RWDS_SDR, JMP_ON_CS, CMD_DDR, RADDR_DDR, CADDR_DDR, MODE1_DDR,
# MODE2_DDR, MODE4_DDR, MODE8_DDR, WRITE_DDR, READ_DDR, LEARN_DDR, DATSZ_DDR, DUMMY_DDR, DUMMY_RWDS_DDR>
OPERATION_CODE: STOP
lookupTable_seq15_instr1:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq15_instr2:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq15_instr3:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq15_instr4:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq15_instr5:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq15_instr6:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq15_instr7:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
# ---------------------------------------===== lutCustomSeq_0 [Optional] =====----------------------------------------
# Description: Offset: 0x00000180, Width: 32b; [0x180-0x1af] Customizable LUT Sequences
lutCustomSeq_0:
# ------------------------------------------===== seqNum [Optional] =====-------------------------------------------
# Description: Offset: 0b, Width: 8b, Sequence Number, valid number: 1-16
seqNum: 0
# -------------------------------------------===== seqId [Optional] =====-------------------------------------------
# Description: Offset: 8b, Width: 8b, Sequence Index, valid number: 0-15
seqId: 0
# -----------------------------------------===== reserved [Optional] =====------------------------------------------
# Description: Offset: 16b, Width: 16b, N/A
reserved: 0
# ---------------------------------------===== lutCustomSeq_1 [Optional] =====----------------------------------------
# Description: Offset: 0x00000184, Width: 32b; [0x180-0x1af] Customizable LUT Sequences
lutCustomSeq_1:
# ------------------------------------------===== seqNum [Optional] =====-------------------------------------------
# Description: Offset: 0b, Width: 8b, Sequence Number, valid number: 1-16
seqNum: 0
# -------------------------------------------===== seqId [Optional] =====-------------------------------------------
# Description: Offset: 8b, Width: 8b, Sequence Index, valid number: 0-15
seqId: 0
# -----------------------------------------===== reserved [Optional] =====------------------------------------------
# Description: Offset: 16b, Width: 16b, N/A
reserved: 0
# ---------------------------------------===== lutCustomSeq_2 [Optional] =====----------------------------------------
# Description: Offset: 0x00000188, Width: 32b; [0x180-0x1af] Customizable LUT Sequences
lutCustomSeq_2:
# ------------------------------------------===== seqNum [Optional] =====-------------------------------------------
# Description: Offset: 0b, Width: 8b, Sequence Number, valid number: 1-16
seqNum: 0
# -------------------------------------------===== seqId [Optional] =====-------------------------------------------
# Description: Offset: 8b, Width: 8b, Sequence Index, valid number: 0-15
seqId: 0
# -----------------------------------------===== reserved [Optional] =====------------------------------------------
# Description: Offset: 16b, Width: 16b, N/A
reserved: 0
# ---------------------------------------===== lutCustomSeq_3 [Optional] =====----------------------------------------
# Description: Offset: 0x0000018C, Width: 32b; [0x180-0x1af] Customizable LUT Sequences
lutCustomSeq_3:
# ------------------------------------------===== seqNum [Optional] =====-------------------------------------------
# Description: Offset: 0b, Width: 8b, Sequence Number, valid number: 1-16
seqNum: 0
# -------------------------------------------===== seqId [Optional] =====-------------------------------------------
# Description: Offset: 8b, Width: 8b, Sequence Index, valid number: 0-15
seqId: 0
# -----------------------------------------===== reserved [Optional] =====------------------------------------------
# Description: Offset: 16b, Width: 16b, N/A
reserved: 0
# ---------------------------------------===== lutCustomSeq_4 [Optional] =====----------------------------------------
# Description: Offset: 0x00000190, Width: 32b; [0x180-0x1af] Customizable LUT Sequences
lutCustomSeq_4:
# ------------------------------------------===== seqNum [Optional] =====-------------------------------------------
# Description: Offset: 0b, Width: 8b, Sequence Number, valid number: 1-16
seqNum: 0
# -------------------------------------------===== seqId [Optional] =====-------------------------------------------
# Description: Offset: 8b, Width: 8b, Sequence Index, valid number: 0-15
seqId: 0
# -----------------------------------------===== reserved [Optional] =====------------------------------------------
# Description: Offset: 16b, Width: 16b, N/A
reserved: 0
# ---------------------------------------===== lutCustomSeq_5 [Optional] =====----------------------------------------
# Description: Offset: 0x00000194, Width: 32b; [0x180-0x1af] Customizable LUT Sequences
lutCustomSeq_5:
# ------------------------------------------===== seqNum [Optional] =====-------------------------------------------
# Description: Offset: 0b, Width: 8b, Sequence Number, valid number: 1-16
seqNum: 0
# -------------------------------------------===== seqId [Optional] =====-------------------------------------------
# Description: Offset: 8b, Width: 8b, Sequence Index, valid number: 0-15
seqId: 0
# -----------------------------------------===== reserved [Optional] =====------------------------------------------
# Description: Offset: 16b, Width: 16b, N/A
reserved: 0
# ---------------------------------------===== lutCustomSeq_6 [Optional] =====----------------------------------------
# Description: Offset: 0x00000198, Width: 32b; [0x180-0x1af] Customizable LUT Sequences
lutCustomSeq_6:
# ------------------------------------------===== seqNum [Optional] =====-------------------------------------------
# Description: Offset: 0b, Width: 8b, Sequence Number, valid number: 1-16
seqNum: 0
# -------------------------------------------===== seqId [Optional] =====-------------------------------------------
# Description: Offset: 8b, Width: 8b, Sequence Index, valid number: 0-15
seqId: 0
# -----------------------------------------===== reserved [Optional] =====------------------------------------------
# Description: Offset: 16b, Width: 16b, N/A
reserved: 0
# ---------------------------------------===== lutCustomSeq_7 [Optional] =====----------------------------------------
# Description: Offset: 0x0000019C, Width: 32b; [0x180-0x1af] Customizable LUT Sequences
lutCustomSeq_7:
# ------------------------------------------===== seqNum [Optional] =====-------------------------------------------
# Description: Offset: 0b, Width: 8b, Sequence Number, valid number: 1-16
seqNum: 0
# -------------------------------------------===== seqId [Optional] =====-------------------------------------------
# Description: Offset: 8b, Width: 8b, Sequence Index, valid number: 0-15
seqId: 0
# -----------------------------------------===== reserved [Optional] =====------------------------------------------
# Description: Offset: 16b, Width: 16b, N/A
reserved: 0
# ---------------------------------------===== lutCustomSeq_8 [Optional] =====----------------------------------------
# Description: Offset: 0x000001A0, Width: 32b; [0x180-0x1af] Customizable LUT Sequences
lutCustomSeq_8:
# ------------------------------------------===== seqNum [Optional] =====-------------------------------------------
# Description: Offset: 0b, Width: 8b, Sequence Number, valid number: 1-16
seqNum: 0
# -------------------------------------------===== seqId [Optional] =====-------------------------------------------
# Description: Offset: 8b, Width: 8b, Sequence Index, valid number: 0-15
seqId: 0
# -----------------------------------------===== reserved [Optional] =====------------------------------------------
# Description: Offset: 16b, Width: 16b, N/A
reserved: 0
# ---------------------------------------===== lutCustomSeq_9 [Optional] =====----------------------------------------
# Description: Offset: 0x000001A4, Width: 32b; [0x180-0x1af] Customizable LUT Sequences
lutCustomSeq_9:
# ------------------------------------------===== seqNum [Optional] =====-------------------------------------------
# Description: Offset: 0b, Width: 8b, Sequence Number, valid number: 1-16
seqNum: 0
# -------------------------------------------===== seqId [Optional] =====-------------------------------------------
# Description: Offset: 8b, Width: 8b, Sequence Index, valid number: 0-15
seqId: 0
# -----------------------------------------===== reserved [Optional] =====------------------------------------------
# Description: Offset: 16b, Width: 16b, N/A
reserved: 0
# ---------------------------------------===== lutCustomSeq_10 [Optional] =====---------------------------------------
# Description: Offset: 0x000001A8, Width: 32b; [0x180-0x1af] Customizable LUT Sequences
lutCustomSeq_10:
# ------------------------------------------===== seqNum [Optional] =====-------------------------------------------
# Description: Offset: 0b, Width: 8b, Sequence Number, valid number: 1-16
seqNum: 0
# -------------------------------------------===== seqId [Optional] =====-------------------------------------------
# Description: Offset: 8b, Width: 8b, Sequence Index, valid number: 0-15
seqId: 0
# -----------------------------------------===== reserved [Optional] =====------------------------------------------
# Description: Offset: 16b, Width: 16b, N/A
reserved: 0
# ---------------------------------------===== lutCustomSeq_11 [Optional] =====---------------------------------------
# Description: Offset: 0x000001AC, Width: 32b; [0x180-0x1af] Customizable LUT Sequences
lutCustomSeq_11:
# ------------------------------------------===== seqNum [Optional] =====-------------------------------------------
# Description: Offset: 0b, Width: 8b, Sequence Number, valid number: 1-16
seqNum: 0
# -------------------------------------------===== seqId [Optional] =====-------------------------------------------
# Description: Offset: 8b, Width: 8b, Sequence Index, valid number: 0-15
seqId: 0
# -----------------------------------------===== reserved [Optional] =====------------------------------------------
# Description: Offset: 16b, Width: 16b, N/A
reserved: 0
# -----------------------------------------===== reserved4_0 [Optional] =====-----------------------------------------
# Description: Offset: 0x000001B0, Width: 32b; [0x1b0-0x1bf] Reserved for future use
reserved4_0: '0x00000000'
# -----------------------------------------===== reserved4_1 [Optional] =====-----------------------------------------
# Description: Offset: 0x000001B4, Width: 32b; [0x1b0-0x1bf] Reserved for future use
reserved4_1: '0x00000000'
# -----------------------------------------===== reserved4_2 [Optional] =====-----------------------------------------
# Description: Offset: 0x000001B8, Width: 32b; [0x1b0-0x1bf] Reserved for future use
reserved4_2: '0x00000000'
# -----------------------------------------===== reserved4_3 [Optional] =====-----------------------------------------
# Description: Offset: 0x000001BC, Width: 32b; [0x1b0-0x1bf] Reserved for future use
reserved4_3: '0x00000000'
# ------------------------------------------===== pageSize [Optional] =====-------------------------------------------
# Description: Offset: 0x000001C0, Width: 32b; Page size of Serial NOR
pageSize: '0x00000000'
# -----------------------------------------===== sectorSize [Optional] =====------------------------------------------
# Description: Offset: 0x000001C4, Width: 32b; Sector size of Serial NOR
sectorSize: '0x00000000'
# -------------------------------------===== ipcmdSerialClkFreq [Optional] =====--------------------------------------
# Description: Offset: 0x000001C8, Width: 8b; Clock frequency for IP command
ipcmdSerialClkFreq: '0x00'
# -------------------------------------===== isUniformBlockSize [Optional] =====--------------------------------------
# Description: Offset: 0x000001C9, Width: 8b; Sector/Block size is the same
isUniformBlockSize: '0x00'
# -----------------------------------------===== reserved0_0 [Optional] =====-----------------------------------------
# Description: Offset: 0x000001CA, Width: 8b; Reserved for future use
reserved0_0: '0x00'
# -----------------------------------------===== reserved0_1 [Optional] =====-----------------------------------------
# Description: Offset: 0x000001CB, Width: 8b; Reserved for future use
reserved0_1: '0x00'
# ----------------------------------------===== serialNorType [Optional] =====----------------------------------------
# Description: Offset: 0x000001CC, Width: 8b; Serial NOR Flash type: 0/1/2/3
serialNorType: '0x00'
# --------------------------------------===== needExitNoCmdMode [Optional] =====--------------------------------------
# Description: Offset: 0x000001CD, Width: 8b; Need to exit NoCmd mode before other IP command
needExitNoCmdMode: '0x00'
# ------------------------------------===== halfClkForNonReadCmd [Optional] =====-------------------------------------
# Description: Offset: 0x000001CE, Width: 8b; Half the Serial Clock for non-read command: true/false
halfClkForNonReadCmd: '0x00'
# ------------------------------------===== needRestoreNoCmdMode [Optional] =====-------------------------------------
# Description: Offset: 0x000001CF, Width: 8b; Need to Restore NoCmd mode after IP command execution
needRestoreNoCmdMode: '0x00'
# ------------------------------------------===== blockSize [Optional] =====------------------------------------------
# Description: Offset: 0x000001D0, Width: 32b; Block size
blockSize: '0x00000000'
# -----------------------------------------===== reserve2_0 [Optional] =====------------------------------------------
# Description: Offset: 0x000001D4, Width: 32b; Reserved for future use
reserve2_0: '0x00000000'
# -----------------------------------------===== reserve2_1 [Optional] =====------------------------------------------
# Description: Offset: 0x000001D8, Width: 32b; Reserved for future use
reserve2_1: '0x00000000'
# -----------------------------------------===== reserve2_2 [Optional] =====------------------------------------------
# Description: Offset: 0x000001DC, Width: 32b; Reserved for future use
reserve2_2: '0x00000000'
# -----------------------------------------===== reserve2_3 [Optional] =====------------------------------------------
# Description: Offset: 0x000001E0, Width: 32b; Reserved for future use
reserve2_3: '0x00000000'
# -----------------------------------------===== reserve2_4 [Optional] =====------------------------------------------
# Description: Offset: 0x000001E4, Width: 32b; Reserved for future use
reserve2_4: '0x00000000'
# -----------------------------------------===== reserve2_5 [Optional] =====------------------------------------------
# Description: Offset: 0x000001E8, Width: 32b; Reserved for future use
reserve2_5: '0x00000000'
# -----------------------------------------===== reserve2_6 [Optional] =====------------------------------------------
# Description: Offset: 0x000001EC, Width: 32b; Reserved for future use
reserve2_6: '0x00000000'
# -----------------------------------------===== reserve2_7 [Optional] =====------------------------------------------
# Description: Offset: 0x000001F0, Width: 32b; Reserved for future use
reserve2_7: '0x00000000'
# -----------------------------------------===== reserve2_8 [Optional] =====------------------------------------------
# Description: Offset: 0x000001F4, Width: 32b; Reserved for future use
reserve2_8: '0x00000000'
# -----------------------------------------===== reserve2_9 [Optional] =====------------------------------------------
# Description: Offset: 0x000001F8, Width: 32b; Reserved for future use
reserve2_9: '0x00000000'
# -----------------------------------------===== reserve2_10 [Optional] =====-----------------------------------------
# Description: Offset: 0x000001FC, Width: 32b; Reserved for future use
reserve2_10: '0x00000000'
FCB for mimxrt1181, Revision: b0 and flexspi_nor#
FCB for mimxrt1181, Revision: b0 and flexspi_nor JSON schema
FCB for mimxrt1181, Revision: b0 and flexspi_nor YAML configuration template
# ================================= FCB for mimxrt1181, Revision: b0 and flexspi_nor =================================
# ======================================================================================================================
# == FCB for mimxrt1181, Revision: b0 and flexspi_nor ==
# ======================================================================================================================
# -------------------------------------===== The chip family name [Required] =====--------------------------------------
# Description: NXP chip family identifier.
family: CHOOSE_FROM_TABLE
# -----------------------------------------===== MCU revision [Optional] =====------------------------------------------
# Description: Revision of silicon. The 'latest' name, means most current revision.
# Possible options: <a0, b0, latest>
revision: b0
# ------------------------------------------===== Memory type [Required] =====------------------------------------------
# Description: Specify type of memory used by FCB description.
# Possible options: <flexspi_nor>
type: flexspi_nor
# ------------------------------------------===== mimxrt1181 [Required] =====-------------------------------------------
fcb_settings:
# ---------------------------------------------===== tag [Optional] =====---------------------------------------------
# Description: Offset: 0x00000000, Width: 32b; [0x000-0x003] Tag, fixed value 0x42464346UL
tag: '0x42464346'
# -------------------------------------------===== version [Optional] =====-------------------------------------------
# Description: Offset: 0x00000004, Width: 32b; [0x004-0x007] Version,[31:24] -'V', [23:16] - Major, [15:8] - Minor,
# [7:0] - bugfix
version:
# ------------------------------------------===== bugfix [Optional] =====-------------------------------------------
# Description: Offset: 0b, Width: 8b, [07:00] Bugfix - 0
bugfix: 0
# -------------------------------------------===== minor [Optional] =====-------------------------------------------
# Description: Offset: 8b, Width: 8b, [15:08] Minor
minor: 0
# -------------------------------------------===== major [Optional] =====-------------------------------------------
# Description: Offset: 16b, Width: 8b, [23:16] Major - 1
major: 1
# -----------------------------------------===== reserved [Optional] =====------------------------------------------
# Description: Offset: 24b, Width: 8b, [32:24] Ascii 'V'
reserved: 86
# ------------------------------------------===== reserved0 [Optional] =====------------------------------------------
# Description: Offset: 0x00000008, Width: 32b; [0x008-0x00b] Reserved for future use
reserved0: '0x00000000'
# --------------------------------------===== readSampleClkSrc [Optional] =====---------------------------------------
# Description: Offset: 0x0000000C, Width: 8b; [0x00c-0x00c] Read Sample Clock Source, valid value: 0/1/3
readSampleClkSrc: '0x00'
# -----------------------------------------===== csHoldTime [Optional] =====------------------------------------------
# Description: Offset: 0x0000000D, Width: 8b; [0x00d-0x00d] CS hold time, default value: 3
csHoldTime: '0x00'
# -----------------------------------------===== csSetupTime [Optional] =====-----------------------------------------
# Description: Offset: 0x0000000E, Width: 8b; [0x00e-0x00e] CS setup time, default value: 3
csSetupTime: '0x00'
# -------------------------------------===== columnAddressWidth [Optional] =====--------------------------------------
# Description: Offset: 0x0000000F, Width: 8b; [0x00f-0x00f] Column Address with, for HyperBus protocol, it is fixed
# to 3, For Serial NAND, need to refer to datasheet
columnAddressWidth: '0x00'
# -------------------------------------===== deviceModeCfgEnable [Optional] =====-------------------------------------
# Description: Offset: 0x00000010, Width: 8b; [0x010-0x010] Device Mode Configure enable flag, 1 - Enable, 0 -
# Disable
deviceModeCfgEnable: '0x00'
# ---------------------------------------===== deviceModeType [Optional] =====----------------------------------------
# Description: Offset: 0x00000011, Width: 8b; [0x011-0x011] Specify the configuration command type: 0 - Generic, 1 -
# Quad Enable, 2 - SPI-to-xSPI, 3 - xSPI-to-SPI
deviceModeType: '0x00'
# -------------------------------------===== waitTimeCfgCommands [Optional] =====-------------------------------------
# Description: Offset: 0x00000012, Width: 16b; [0x012-0x013] Wait time for all configuration commands, unit: 100us,
# Used for DPI/QPI/OPI switch or reset command
waitTimeCfgCommands: '0x0000'
# ----------------------------------------===== deviceModeSeq [Optional] =====----------------------------------------
# Description: Offset: 0x00000014, Width: 32b; [0x014-0x017] Device mode sequence info, [7:0] - LUT sequence id,
# [15:8] - LUt sequence number, [31:16] Reserved
deviceModeSeq:
# ------------------------------------------===== seqNum [Optional] =====-------------------------------------------
# Description: Offset: 0b, Width: 8b, Sequence Number, valid number: 1-16
seqNum: 0
# -------------------------------------------===== seqId [Optional] =====-------------------------------------------
# Description: Offset: 8b, Width: 8b, Sequence Index, valid number: 0-15
seqId: 0
# -----------------------------------------===== reserved [Optional] =====------------------------------------------
# Description: Offset: 16b, Width: 16b, N/A
reserved: 0
# ----------------------------------------===== deviceModeArg [Optional] =====----------------------------------------
# Description: Offset: 0x00000018, Width: 32b; [0x018-0x01b] Argument/Parameter for device configuration. effective
# only when deviceModeCfgEnable = 1
deviceModeArg: '0x00000000'
# ---------------------------------------===== configCmdEnable [Optional] =====---------------------------------------
# Description: Offset: 0x0000001C, Width: 8b; [0x01c-0x01c] Configure command Enable Flag, 1 - Enable, 0 - Disable
configCmdEnable: '0x00'
# ------------------------------------------===== reserved1 [Optional] =====------------------------------------------
# Description: Offset: 0x0000001D, Width: 24b; [0x01d-0x019] Reserved for future use
reserved1: '0x000000'
# ---------------------------------------===== configCmdSeqs_0 [Optional] =====---------------------------------------
# Description: Offset: 0x00000020, Width: 32b; [0x020-0x02b] Sequence info for Device Configuration command, similar
# as deviceModeSeq
configCmdSeqs_0:
# ------------------------------------------===== seqNum [Optional] =====-------------------------------------------
# Description: Offset: 0b, Width: 8b, Sequence Number, valid number: 1-16
seqNum: 0
# -------------------------------------------===== seqId [Optional] =====-------------------------------------------
# Description: Offset: 8b, Width: 8b, Sequence Index, valid number: 0-15
seqId: 0
# -----------------------------------------===== reserved [Optional] =====------------------------------------------
# Description: Offset: 16b, Width: 16b, N/A
reserved: 0
# ---------------------------------------===== configCmdSeqs_1 [Optional] =====---------------------------------------
# Description: Offset: 0x00000024, Width: 32b; [0x020-0x02b] Sequence info for Device Configuration command, similar
# as deviceModeSeq
configCmdSeqs_1:
# ------------------------------------------===== seqNum [Optional] =====-------------------------------------------
# Description: Offset: 0b, Width: 8b, Sequence Number, valid number: 1-16
seqNum: 0
# -------------------------------------------===== seqId [Optional] =====-------------------------------------------
# Description: Offset: 8b, Width: 8b, Sequence Index, valid number: 0-15
seqId: 0
# -----------------------------------------===== reserved [Optional] =====------------------------------------------
# Description: Offset: 16b, Width: 16b, N/A
reserved: 0
# ---------------------------------------===== configCmdSeqs_2 [Optional] =====---------------------------------------
# Description: Offset: 0x00000028, Width: 32b; [0x020-0x02b] Sequence info for Device Configuration command, similar
# as deviceModeSeq
configCmdSeqs_2:
# ------------------------------------------===== seqNum [Optional] =====-------------------------------------------
# Description: Offset: 0b, Width: 8b, Sequence Number, valid number: 1-16
seqNum: 0
# -------------------------------------------===== seqId [Optional] =====-------------------------------------------
# Description: Offset: 8b, Width: 8b, Sequence Index, valid number: 0-15
seqId: 0
# -----------------------------------------===== reserved [Optional] =====------------------------------------------
# Description: Offset: 16b, Width: 16b, N/A
reserved: 0
# ------------------------------------------===== reserved2 [Optional] =====------------------------------------------
# Description: Offset: 0x0000002C, Width: 32b; [0x02c-0x02f] Reserved for future use
reserved2: '0x00000000'
# ---------------------------------------===== configCmdArgs_0 [Optional] =====---------------------------------------
# Description: Offset: 0x00000030, Width: 32b; [0x030-0x03b] Arguments/Parameters for device Configuration commands
configCmdArgs_0: '0x00000000'
# ---------------------------------------===== configCmdArgs_1 [Optional] =====---------------------------------------
# Description: Offset: 0x00000034, Width: 32b; [0x030-0x03b] Arguments/Parameters for device Configuration commands
configCmdArgs_1: '0x00000000'
# ---------------------------------------===== configCmdArgs_2 [Optional] =====---------------------------------------
# Description: Offset: 0x00000038, Width: 32b; [0x030-0x03b] Arguments/Parameters for device Configuration commands
configCmdArgs_2: '0x00000000'
# ------------------------------------------===== reserved3 [Optional] =====------------------------------------------
# Description: Offset: 0x0000003C, Width: 32b; [0x03c-0x03f] Reserved for future use
reserved3: '0x00000000'
# ------------------------------------===== controllerMiscOption [Optional] =====-------------------------------------
# Description: Offset: 0x00000040, Width: 32b; [0x040-0x043] Controller Misc Options, see Misc feature bit
# definitions for more details
controllerMiscOption: '0x00000000'
# -----------------------------------------===== deviceType [Optional] =====------------------------------------------
# Description: Offset: 0x00000044, Width: 8b; [0x044-0x044] Device Type: See Flash Type Definition for more details
deviceType: '0x00'
# ----------------------------------------===== sflashPadType [Optional] =====----------------------------------------
# Description: Offset: 0x00000045, Width: 8b; [0x045-0x045] Serial Flash Pad Type: 1 - Single, 2 - Dual, 4 - Quad, 8
# - Octal
sflashPadType: '0x00'
# ----------------------------------------===== serialClkFreq [Optional] =====----------------------------------------
# Description: Offset: 0x00000046, Width: 8b; [0x046-0x046] Serial Flash Frequency, device specific definitions, See
# System Boot Chapter for more details
serialClkFreq: '0x00'
# -------------------------------------===== lutCustomSeqEnable [Optional] =====--------------------------------------
# Description: Offset: 0x00000047, Width: 8b; [0x047-0x047] LUT customization Enable, it is required if the
# program/erase cannot be done using 1 LUT sequence, currently, only applicable to HyperFLASH
lutCustomSeqEnable: '0x00'
# ------------------------------------------===== reserved4 [Optional] =====------------------------------------------
# Description: Offset: 0x00000048, Width: 64b; [0x048-0x04f] Reserved for future use
reserved4: '0x0000000000000000'
# ----------------------------------------===== sflashA1Size [Optional] =====-----------------------------------------
# Description: Offset: 0x00000050, Width: 32b; [0x050-0x053] Size of Flash connected to A1
sflashA1Size: '0x00000000'
# ----------------------------------------===== sflashA2Size [Optional] =====-----------------------------------------
# Description: Offset: 0x00000054, Width: 32b; [0x054-0x057] Size of Flash connected to A2
sflashA2Size: '0x00000000'
# ----------------------------------------===== sflashB1Size [Optional] =====-----------------------------------------
# Description: Offset: 0x00000058, Width: 32b; [0x058-0x05b] Size of Flash connected to B1
sflashB1Size: '0x00000000'
# ----------------------------------------===== sflashB2Size [Optional] =====-----------------------------------------
# Description: Offset: 0x0000005C, Width: 32b; [0x05c-0x05f] Size of Flash connected to B2
sflashB2Size: '0x00000000'
# -----------------------------------===== csPadSettingOverrideEn [Optional] =====------------------------------------
# Description: Offset: 0x00000060, Width: 8b; [0x060-0x060] Set to 0 if it is not supported
csPadSettingOverrideEn: '0x00'
# ------------------------------------===== csPadSettingOverride [Optional] =====-------------------------------------
# Description: Offset: 0x00000061, Width: 8b; [0x061-0x061] Overriding pad setting of CS
csPadSettingOverride: '0x00'
# ------------------------------------------===== reserved5 [Optional] =====------------------------------------------
# Description: Offset: 0x00000062, Width: 16b; [0x062-0x063] Reserved for future use
reserved5: '0x0000'
# ----------------------------------===== sclkPadSettingOverrideEn [Optional] =====-----------------------------------
# Description: Offset: 0x00000064, Width: 8b; [0x064-0x064] Set to 0 if it is not supported
sclkPadSettingOverrideEn: '0x00'
# -----------------------------------===== sclkPadSettingOverride [Optional] =====------------------------------------
# Description: Offset: 0x00000065, Width: 8b; [0x065-0x065] Overriding pad setting of SCLK
sclkPadSettingOverride: '0x00'
# ------------------------------------------===== reserved6 [Optional] =====------------------------------------------
# Description: Offset: 0x00000066, Width: 16b; [0x066-0x067] Reserved for future use
reserved6: '0x0000'
# ----------------------------------===== dataPadSettingOverrideEn [Optional] =====-----------------------------------
# Description: Offset: 0x00000068, Width: 8b; [0x068-0x068] Set to 0 if it is not supported
dataPadSettingOverrideEn: '0x00'
# -----------------------------------===== dataPadSettingOverride [Optional] =====------------------------------------
# Description: Offset: 0x00000069, Width: 8b; [0x069-0x069] Overriding pad setting of data signals
dataPadSettingOverride: '0x00'
# ------------------------------------------===== reserved7 [Optional] =====------------------------------------------
# Description: Offset: 0x0000006A, Width: 16b; [0x06a-0x06b] Reserved for future use
reserved7: '0x0000'
# -----------------------------------===== dqsPadSettingOverrideEn [Optional] =====-----------------------------------
# Description: Offset: 0x0000006C, Width: 8b; [0x06c-0x06c] Set to 0 if it is not supported
dqsPadSettingOverrideEn: '0x00'
# ------------------------------------===== dqsPadSettingOverride [Optional] =====------------------------------------
# Description: Offset: 0x0000006D, Width: 8b; [0x06d-0x06d] Overriding pad setting of DQS
dqsPadSettingOverride: '0x00'
# ------------------------------------------===== reserved8 [Optional] =====------------------------------------------
# Description: Offset: 0x0000006E, Width: 16b; [0x06e-0x06f] Reserved for future use
reserved8: '0x0000'
# -----------------------------------------===== timeoutInMs [Optional] =====-----------------------------------------
# Description: Offset: 0x00000070, Width: 32b; [0x070-0x073] Timeout threshold for read status command
timeoutInMs: '0x00000000'
# ---------------------------------------===== commandInterval [Optional] =====---------------------------------------
# Description: Offset: 0x00000074, Width: 32b; [0x074-0x077] CS deselect interval between two commands
commandInterval: '0x00000000'
# ----------------------------------------===== dataValidTime [Optional] =====----------------------------------------
# Description: Offset: 0x00000078, Width: 32b; [0x078-0x07b] CLK edge to data valid time for PORT A and PORT B, in
# terms of 0.1ns
dataValidTime:
# ---------------------------------------===== dllAValidTime [Optional] =====---------------------------------------
# Description: Offset: 0b, Width: 16b, Data valid time for DLLA in terms of 0.1 ns
dllAValidTime: 0
# ---------------------------------------===== dllBValidTime [Optional] =====---------------------------------------
# Description: Offset: 16b, Width: 16b, Data valid time for DLLB in terms of 0.1 ns
dllBValidTime: 0
# -----------------------------------------===== busyOffset [Optional] =====------------------------------------------
# Description: Offset: 0x0000007C, Width: 16b; [0x07c-0x07d] Busy offset, valid value: 0-31
busyOffset: '0x0000'
# ---------------------------------------===== busyBitPolarity [Optional] =====---------------------------------------
# Description: Offset: 0x0000007E, Width: 16b; [0x07e-0x07f] Busy flag polarity, 0 - busy flag is 1 when flash device
# is busy, 1 - busy flag is 0 when flash device is busy
busyBitPolarity: '0x0000'
# -----------------------------------===== lookupTable_seq0_instr0 [Optional] =====-----------------------------------
# Description: Offset: 0x00000080, Width: 16b; Lookup table holds Flash command sequences 0, instruction 0
lookupTable_seq0_instr0:
# ------------------------------------------===== OPERAND [Optional] =====------------------------------------------
# Description: Offset: 0b, Width: 8b, Instruction operand. Its values depends on used instruction
OPERAND: 0
# -----------------------------------------===== NUM_PADS [Optional] =====------------------------------------------
# Description: Offset: 8b, Width: 2b, Number of pads used by instruction. Some instructions ignores this parameter.
# - 1PAD, (0): Single mode. One pad is used.
# - 2PAD, (1): Dual mode. Two pads are used.
# - 4PAD, (2): Quad mode. Four pads are used.
# - 8PAD, (3): Octal mode. Eight pads are used.
# Possible options: <1PAD, 2PAD, 4PAD, 8PAD>
NUM_PADS: 1PAD
# --------------------------------------===== OPERATION_CODE [Optional] =====---------------------------------------
# Description: Offset: 10b, Width: 6b, Instruction operation code.
# - STOP, (0): Stop execution and de-assert CS. Then, the next command sequence (to the same flash device) starts
# from instruction pointer 0.
# - CMD_SDR, (1): Transmit command code to Flash.
# - RADDR_SDR, (2): Transmit row address to Flash.
# - CADDR_SDR, (3): Transmit column address to Flash.
# - MODE1_SDR, (4): Transmit mode bits to Flash.
# - MODE2_SDR, (5): Transmit mode bits to Flash.
# - MODE4_SDR, (6): Transmit mode bits to Flash.
# - MODE8_SDR, (7): Transmit mode bits to Flash.
# - WRITE_SDR, (8): Transmit program data to Flash device.
# - READ_SDR, (9): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_SDR, (10): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_SDR, (11): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_SDR, (12): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_SDR, (13): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# - JMP_ON_CS, (31): Stop execution, de-assert CS and save operand[7:0] as the instruction start pointer for next
# sequence.Normally this instruction is used to support Execute-In-Place enhanced mode. See XIP enhanced mode for
# more details.This instruction is only allowed for AHB read commands. There is interrupt status bit set
# (INTR[IPCMDERR] or INTR[AHBCMDERR]) when using this instruction in IP command or AHB write command.
# - CMD_DDR, (33): Transmit command code to Flash.
# - RADDR_DDR, (34): Transmit row address to Flash.
# - CADDR_DDR, (35): Transmit column address to Flash.
# - MODE1_DDR, (36): Transmit mode bits to Flash.
# - MODE2_DDR, (37): Transmit mode bits to Flash.
# - MODE4_DDR, (38): Transmit mode bits to Flash.
# - MODE8_DDR, (39): Transmit mode bits to Flash.
# - WRITE_DDR, (40): Transmit program data to Flash device.
# - READ_DDR, (41): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_DDR, (42): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_DDR, (43): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_DDR, (44): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_DDR, (45): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# Possible options: <STOP, CMD_SDR, RADDR_SDR, CADDR_SDR, MODE1_SDR, MODE2_SDR, MODE4_SDR, MODE8_SDR, WRITE_SDR,
# READ_SDR, LEARN_SDR, DATSZ_SDR, DUMMY_SDR, DUMMY_RWDS_SDR, JMP_ON_CS, CMD_DDR, RADDR_DDR, CADDR_DDR, MODE1_DDR,
# MODE2_DDR, MODE4_DDR, MODE8_DDR, WRITE_DDR, READ_DDR, LEARN_DDR, DATSZ_DDR, DUMMY_DDR, DUMMY_RWDS_DDR>
OPERATION_CODE: STOP
lookupTable_seq0_instr1:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq0_instr2:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq0_instr3:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq0_instr4:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq0_instr5:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq0_instr6:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq0_instr7:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
# -----------------------------------===== lookupTable_seq1_instr0 [Optional] =====-----------------------------------
# Description: Offset: 0x00000090, Width: 16b; Lookup table holds Flash command sequences 1, instruction 0
lookupTable_seq1_instr0:
# ------------------------------------------===== OPERAND [Optional] =====------------------------------------------
# Description: Offset: 0b, Width: 8b, Instruction operand. Its values depends on used instruction
OPERAND: 0
# -----------------------------------------===== NUM_PADS [Optional] =====------------------------------------------
# Description: Offset: 8b, Width: 2b, Number of pads used by instruction. Some instructions ignores this parameter.
# - 1PAD, (0): Single mode. One pad is used.
# - 2PAD, (1): Dual mode. Two pads are used.
# - 4PAD, (2): Quad mode. Four pads are used.
# - 8PAD, (3): Octal mode. Eight pads are used.
# Possible options: <1PAD, 2PAD, 4PAD, 8PAD>
NUM_PADS: 1PAD
# --------------------------------------===== OPERATION_CODE [Optional] =====---------------------------------------
# Description: Offset: 10b, Width: 6b, Instruction operation code.
# - STOP, (0): Stop execution and de-assert CS. Then, the next command sequence (to the same flash device) starts
# from instruction pointer 0.
# - CMD_SDR, (1): Transmit command code to Flash.
# - RADDR_SDR, (2): Transmit row address to Flash.
# - CADDR_SDR, (3): Transmit column address to Flash.
# - MODE1_SDR, (4): Transmit mode bits to Flash.
# - MODE2_SDR, (5): Transmit mode bits to Flash.
# - MODE4_SDR, (6): Transmit mode bits to Flash.
# - MODE8_SDR, (7): Transmit mode bits to Flash.
# - WRITE_SDR, (8): Transmit program data to Flash device.
# - READ_SDR, (9): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_SDR, (10): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_SDR, (11): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_SDR, (12): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_SDR, (13): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# - JMP_ON_CS, (31): Stop execution, de-assert CS and save operand[7:0] as the instruction start pointer for next
# sequence.Normally this instruction is used to support Execute-In-Place enhanced mode. See XIP enhanced mode for
# more details.This instruction is only allowed for AHB read commands. There is interrupt status bit set
# (INTR[IPCMDERR] or INTR[AHBCMDERR]) when using this instruction in IP command or AHB write command.
# - CMD_DDR, (33): Transmit command code to Flash.
# - RADDR_DDR, (34): Transmit row address to Flash.
# - CADDR_DDR, (35): Transmit column address to Flash.
# - MODE1_DDR, (36): Transmit mode bits to Flash.
# - MODE2_DDR, (37): Transmit mode bits to Flash.
# - MODE4_DDR, (38): Transmit mode bits to Flash.
# - MODE8_DDR, (39): Transmit mode bits to Flash.
# - WRITE_DDR, (40): Transmit program data to Flash device.
# - READ_DDR, (41): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_DDR, (42): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_DDR, (43): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_DDR, (44): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_DDR, (45): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# Possible options: <STOP, CMD_SDR, RADDR_SDR, CADDR_SDR, MODE1_SDR, MODE2_SDR, MODE4_SDR, MODE8_SDR, WRITE_SDR,
# READ_SDR, LEARN_SDR, DATSZ_SDR, DUMMY_SDR, DUMMY_RWDS_SDR, JMP_ON_CS, CMD_DDR, RADDR_DDR, CADDR_DDR, MODE1_DDR,
# MODE2_DDR, MODE4_DDR, MODE8_DDR, WRITE_DDR, READ_DDR, LEARN_DDR, DATSZ_DDR, DUMMY_DDR, DUMMY_RWDS_DDR>
OPERATION_CODE: STOP
lookupTable_seq1_instr1:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq1_instr2:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq1_instr3:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq1_instr4:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq1_instr5:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq1_instr6:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq1_instr7:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
# -----------------------------------===== lookupTable_seq2_instr0 [Optional] =====-----------------------------------
# Description: Offset: 0x000000A0, Width: 16b; Lookup table holds Flash command sequences 2, instruction 0
lookupTable_seq2_instr0:
# ------------------------------------------===== OPERAND [Optional] =====------------------------------------------
# Description: Offset: 0b, Width: 8b, Instruction operand. Its values depends on used instruction
OPERAND: 0
# -----------------------------------------===== NUM_PADS [Optional] =====------------------------------------------
# Description: Offset: 8b, Width: 2b, Number of pads used by instruction. Some instructions ignores this parameter.
# - 1PAD, (0): Single mode. One pad is used.
# - 2PAD, (1): Dual mode. Two pads are used.
# - 4PAD, (2): Quad mode. Four pads are used.
# - 8PAD, (3): Octal mode. Eight pads are used.
# Possible options: <1PAD, 2PAD, 4PAD, 8PAD>
NUM_PADS: 1PAD
# --------------------------------------===== OPERATION_CODE [Optional] =====---------------------------------------
# Description: Offset: 10b, Width: 6b, Instruction operation code.
# - STOP, (0): Stop execution and de-assert CS. Then, the next command sequence (to the same flash device) starts
# from instruction pointer 0.
# - CMD_SDR, (1): Transmit command code to Flash.
# - RADDR_SDR, (2): Transmit row address to Flash.
# - CADDR_SDR, (3): Transmit column address to Flash.
# - MODE1_SDR, (4): Transmit mode bits to Flash.
# - MODE2_SDR, (5): Transmit mode bits to Flash.
# - MODE4_SDR, (6): Transmit mode bits to Flash.
# - MODE8_SDR, (7): Transmit mode bits to Flash.
# - WRITE_SDR, (8): Transmit program data to Flash device.
# - READ_SDR, (9): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_SDR, (10): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_SDR, (11): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_SDR, (12): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_SDR, (13): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# - JMP_ON_CS, (31): Stop execution, de-assert CS and save operand[7:0] as the instruction start pointer for next
# sequence.Normally this instruction is used to support Execute-In-Place enhanced mode. See XIP enhanced mode for
# more details.This instruction is only allowed for AHB read commands. There is interrupt status bit set
# (INTR[IPCMDERR] or INTR[AHBCMDERR]) when using this instruction in IP command or AHB write command.
# - CMD_DDR, (33): Transmit command code to Flash.
# - RADDR_DDR, (34): Transmit row address to Flash.
# - CADDR_DDR, (35): Transmit column address to Flash.
# - MODE1_DDR, (36): Transmit mode bits to Flash.
# - MODE2_DDR, (37): Transmit mode bits to Flash.
# - MODE4_DDR, (38): Transmit mode bits to Flash.
# - MODE8_DDR, (39): Transmit mode bits to Flash.
# - WRITE_DDR, (40): Transmit program data to Flash device.
# - READ_DDR, (41): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_DDR, (42): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_DDR, (43): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_DDR, (44): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_DDR, (45): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# Possible options: <STOP, CMD_SDR, RADDR_SDR, CADDR_SDR, MODE1_SDR, MODE2_SDR, MODE4_SDR, MODE8_SDR, WRITE_SDR,
# READ_SDR, LEARN_SDR, DATSZ_SDR, DUMMY_SDR, DUMMY_RWDS_SDR, JMP_ON_CS, CMD_DDR, RADDR_DDR, CADDR_DDR, MODE1_DDR,
# MODE2_DDR, MODE4_DDR, MODE8_DDR, WRITE_DDR, READ_DDR, LEARN_DDR, DATSZ_DDR, DUMMY_DDR, DUMMY_RWDS_DDR>
OPERATION_CODE: STOP
lookupTable_seq2_instr1:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq2_instr2:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq2_instr3:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq2_instr4:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq2_instr5:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq2_instr6:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq2_instr7:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
# -----------------------------------===== lookupTable_seq3_instr0 [Optional] =====-----------------------------------
# Description: Offset: 0x000000B0, Width: 16b; Lookup table holds Flash command sequences 3, instruction 0
lookupTable_seq3_instr0:
# ------------------------------------------===== OPERAND [Optional] =====------------------------------------------
# Description: Offset: 0b, Width: 8b, Instruction operand. Its values depends on used instruction
OPERAND: 0
# -----------------------------------------===== NUM_PADS [Optional] =====------------------------------------------
# Description: Offset: 8b, Width: 2b, Number of pads used by instruction. Some instructions ignores this parameter.
# - 1PAD, (0): Single mode. One pad is used.
# - 2PAD, (1): Dual mode. Two pads are used.
# - 4PAD, (2): Quad mode. Four pads are used.
# - 8PAD, (3): Octal mode. Eight pads are used.
# Possible options: <1PAD, 2PAD, 4PAD, 8PAD>
NUM_PADS: 1PAD
# --------------------------------------===== OPERATION_CODE [Optional] =====---------------------------------------
# Description: Offset: 10b, Width: 6b, Instruction operation code.
# - STOP, (0): Stop execution and de-assert CS. Then, the next command sequence (to the same flash device) starts
# from instruction pointer 0.
# - CMD_SDR, (1): Transmit command code to Flash.
# - RADDR_SDR, (2): Transmit row address to Flash.
# - CADDR_SDR, (3): Transmit column address to Flash.
# - MODE1_SDR, (4): Transmit mode bits to Flash.
# - MODE2_SDR, (5): Transmit mode bits to Flash.
# - MODE4_SDR, (6): Transmit mode bits to Flash.
# - MODE8_SDR, (7): Transmit mode bits to Flash.
# - WRITE_SDR, (8): Transmit program data to Flash device.
# - READ_SDR, (9): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_SDR, (10): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_SDR, (11): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_SDR, (12): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_SDR, (13): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# - JMP_ON_CS, (31): Stop execution, de-assert CS and save operand[7:0] as the instruction start pointer for next
# sequence.Normally this instruction is used to support Execute-In-Place enhanced mode. See XIP enhanced mode for
# more details.This instruction is only allowed for AHB read commands. There is interrupt status bit set
# (INTR[IPCMDERR] or INTR[AHBCMDERR]) when using this instruction in IP command or AHB write command.
# - CMD_DDR, (33): Transmit command code to Flash.
# - RADDR_DDR, (34): Transmit row address to Flash.
# - CADDR_DDR, (35): Transmit column address to Flash.
# - MODE1_DDR, (36): Transmit mode bits to Flash.
# - MODE2_DDR, (37): Transmit mode bits to Flash.
# - MODE4_DDR, (38): Transmit mode bits to Flash.
# - MODE8_DDR, (39): Transmit mode bits to Flash.
# - WRITE_DDR, (40): Transmit program data to Flash device.
# - READ_DDR, (41): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_DDR, (42): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_DDR, (43): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_DDR, (44): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_DDR, (45): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# Possible options: <STOP, CMD_SDR, RADDR_SDR, CADDR_SDR, MODE1_SDR, MODE2_SDR, MODE4_SDR, MODE8_SDR, WRITE_SDR,
# READ_SDR, LEARN_SDR, DATSZ_SDR, DUMMY_SDR, DUMMY_RWDS_SDR, JMP_ON_CS, CMD_DDR, RADDR_DDR, CADDR_DDR, MODE1_DDR,
# MODE2_DDR, MODE4_DDR, MODE8_DDR, WRITE_DDR, READ_DDR, LEARN_DDR, DATSZ_DDR, DUMMY_DDR, DUMMY_RWDS_DDR>
OPERATION_CODE: STOP
lookupTable_seq3_instr1:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq3_instr2:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq3_instr3:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq3_instr4:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq3_instr5:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq3_instr6:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq3_instr7:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
# -----------------------------------===== lookupTable_seq4_instr0 [Optional] =====-----------------------------------
# Description: Offset: 0x000000C0, Width: 16b; Lookup table holds Flash command sequences 4, instruction 0
lookupTable_seq4_instr0:
# ------------------------------------------===== OPERAND [Optional] =====------------------------------------------
# Description: Offset: 0b, Width: 8b, Instruction operand. Its values depends on used instruction
OPERAND: 0
# -----------------------------------------===== NUM_PADS [Optional] =====------------------------------------------
# Description: Offset: 8b, Width: 2b, Number of pads used by instruction. Some instructions ignores this parameter.
# - 1PAD, (0): Single mode. One pad is used.
# - 2PAD, (1): Dual mode. Two pads are used.
# - 4PAD, (2): Quad mode. Four pads are used.
# - 8PAD, (3): Octal mode. Eight pads are used.
# Possible options: <1PAD, 2PAD, 4PAD, 8PAD>
NUM_PADS: 1PAD
# --------------------------------------===== OPERATION_CODE [Optional] =====---------------------------------------
# Description: Offset: 10b, Width: 6b, Instruction operation code.
# - STOP, (0): Stop execution and de-assert CS. Then, the next command sequence (to the same flash device) starts
# from instruction pointer 0.
# - CMD_SDR, (1): Transmit command code to Flash.
# - RADDR_SDR, (2): Transmit row address to Flash.
# - CADDR_SDR, (3): Transmit column address to Flash.
# - MODE1_SDR, (4): Transmit mode bits to Flash.
# - MODE2_SDR, (5): Transmit mode bits to Flash.
# - MODE4_SDR, (6): Transmit mode bits to Flash.
# - MODE8_SDR, (7): Transmit mode bits to Flash.
# - WRITE_SDR, (8): Transmit program data to Flash device.
# - READ_SDR, (9): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_SDR, (10): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_SDR, (11): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_SDR, (12): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_SDR, (13): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# - JMP_ON_CS, (31): Stop execution, de-assert CS and save operand[7:0] as the instruction start pointer for next
# sequence.Normally this instruction is used to support Execute-In-Place enhanced mode. See XIP enhanced mode for
# more details.This instruction is only allowed for AHB read commands. There is interrupt status bit set
# (INTR[IPCMDERR] or INTR[AHBCMDERR]) when using this instruction in IP command or AHB write command.
# - CMD_DDR, (33): Transmit command code to Flash.
# - RADDR_DDR, (34): Transmit row address to Flash.
# - CADDR_DDR, (35): Transmit column address to Flash.
# - MODE1_DDR, (36): Transmit mode bits to Flash.
# - MODE2_DDR, (37): Transmit mode bits to Flash.
# - MODE4_DDR, (38): Transmit mode bits to Flash.
# - MODE8_DDR, (39): Transmit mode bits to Flash.
# - WRITE_DDR, (40): Transmit program data to Flash device.
# - READ_DDR, (41): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_DDR, (42): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_DDR, (43): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_DDR, (44): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_DDR, (45): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# Possible options: <STOP, CMD_SDR, RADDR_SDR, CADDR_SDR, MODE1_SDR, MODE2_SDR, MODE4_SDR, MODE8_SDR, WRITE_SDR,
# READ_SDR, LEARN_SDR, DATSZ_SDR, DUMMY_SDR, DUMMY_RWDS_SDR, JMP_ON_CS, CMD_DDR, RADDR_DDR, CADDR_DDR, MODE1_DDR,
# MODE2_DDR, MODE4_DDR, MODE8_DDR, WRITE_DDR, READ_DDR, LEARN_DDR, DATSZ_DDR, DUMMY_DDR, DUMMY_RWDS_DDR>
OPERATION_CODE: STOP
lookupTable_seq4_instr1:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq4_instr2:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq4_instr3:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq4_instr4:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq4_instr5:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq4_instr6:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq4_instr7:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
# -----------------------------------===== lookupTable_seq5_instr0 [Optional] =====-----------------------------------
# Description: Offset: 0x000000D0, Width: 16b; Lookup table holds Flash command sequences 5, instruction 0
lookupTable_seq5_instr0:
# ------------------------------------------===== OPERAND [Optional] =====------------------------------------------
# Description: Offset: 0b, Width: 8b, Instruction operand. Its values depends on used instruction
OPERAND: 0
# -----------------------------------------===== NUM_PADS [Optional] =====------------------------------------------
# Description: Offset: 8b, Width: 2b, Number of pads used by instruction. Some instructions ignores this parameter.
# - 1PAD, (0): Single mode. One pad is used.
# - 2PAD, (1): Dual mode. Two pads are used.
# - 4PAD, (2): Quad mode. Four pads are used.
# - 8PAD, (3): Octal mode. Eight pads are used.
# Possible options: <1PAD, 2PAD, 4PAD, 8PAD>
NUM_PADS: 1PAD
# --------------------------------------===== OPERATION_CODE [Optional] =====---------------------------------------
# Description: Offset: 10b, Width: 6b, Instruction operation code.
# - STOP, (0): Stop execution and de-assert CS. Then, the next command sequence (to the same flash device) starts
# from instruction pointer 0.
# - CMD_SDR, (1): Transmit command code to Flash.
# - RADDR_SDR, (2): Transmit row address to Flash.
# - CADDR_SDR, (3): Transmit column address to Flash.
# - MODE1_SDR, (4): Transmit mode bits to Flash.
# - MODE2_SDR, (5): Transmit mode bits to Flash.
# - MODE4_SDR, (6): Transmit mode bits to Flash.
# - MODE8_SDR, (7): Transmit mode bits to Flash.
# - WRITE_SDR, (8): Transmit program data to Flash device.
# - READ_SDR, (9): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_SDR, (10): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_SDR, (11): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_SDR, (12): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_SDR, (13): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# - JMP_ON_CS, (31): Stop execution, de-assert CS and save operand[7:0] as the instruction start pointer for next
# sequence.Normally this instruction is used to support Execute-In-Place enhanced mode. See XIP enhanced mode for
# more details.This instruction is only allowed for AHB read commands. There is interrupt status bit set
# (INTR[IPCMDERR] or INTR[AHBCMDERR]) when using this instruction in IP command or AHB write command.
# - CMD_DDR, (33): Transmit command code to Flash.
# - RADDR_DDR, (34): Transmit row address to Flash.
# - CADDR_DDR, (35): Transmit column address to Flash.
# - MODE1_DDR, (36): Transmit mode bits to Flash.
# - MODE2_DDR, (37): Transmit mode bits to Flash.
# - MODE4_DDR, (38): Transmit mode bits to Flash.
# - MODE8_DDR, (39): Transmit mode bits to Flash.
# - WRITE_DDR, (40): Transmit program data to Flash device.
# - READ_DDR, (41): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_DDR, (42): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_DDR, (43): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_DDR, (44): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_DDR, (45): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# Possible options: <STOP, CMD_SDR, RADDR_SDR, CADDR_SDR, MODE1_SDR, MODE2_SDR, MODE4_SDR, MODE8_SDR, WRITE_SDR,
# READ_SDR, LEARN_SDR, DATSZ_SDR, DUMMY_SDR, DUMMY_RWDS_SDR, JMP_ON_CS, CMD_DDR, RADDR_DDR, CADDR_DDR, MODE1_DDR,
# MODE2_DDR, MODE4_DDR, MODE8_DDR, WRITE_DDR, READ_DDR, LEARN_DDR, DATSZ_DDR, DUMMY_DDR, DUMMY_RWDS_DDR>
OPERATION_CODE: STOP
lookupTable_seq5_instr1:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq5_instr2:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq5_instr3:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq5_instr4:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq5_instr5:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq5_instr6:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq5_instr7:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
# -----------------------------------===== lookupTable_seq6_instr0 [Optional] =====-----------------------------------
# Description: Offset: 0x000000E0, Width: 16b; Lookup table holds Flash command sequences 6, instruction 0
lookupTable_seq6_instr0:
# ------------------------------------------===== OPERAND [Optional] =====------------------------------------------
# Description: Offset: 0b, Width: 8b, Instruction operand. Its values depends on used instruction
OPERAND: 0
# -----------------------------------------===== NUM_PADS [Optional] =====------------------------------------------
# Description: Offset: 8b, Width: 2b, Number of pads used by instruction. Some instructions ignores this parameter.
# - 1PAD, (0): Single mode. One pad is used.
# - 2PAD, (1): Dual mode. Two pads are used.
# - 4PAD, (2): Quad mode. Four pads are used.
# - 8PAD, (3): Octal mode. Eight pads are used.
# Possible options: <1PAD, 2PAD, 4PAD, 8PAD>
NUM_PADS: 1PAD
# --------------------------------------===== OPERATION_CODE [Optional] =====---------------------------------------
# Description: Offset: 10b, Width: 6b, Instruction operation code.
# - STOP, (0): Stop execution and de-assert CS. Then, the next command sequence (to the same flash device) starts
# from instruction pointer 0.
# - CMD_SDR, (1): Transmit command code to Flash.
# - RADDR_SDR, (2): Transmit row address to Flash.
# - CADDR_SDR, (3): Transmit column address to Flash.
# - MODE1_SDR, (4): Transmit mode bits to Flash.
# - MODE2_SDR, (5): Transmit mode bits to Flash.
# - MODE4_SDR, (6): Transmit mode bits to Flash.
# - MODE8_SDR, (7): Transmit mode bits to Flash.
# - WRITE_SDR, (8): Transmit program data to Flash device.
# - READ_SDR, (9): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_SDR, (10): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_SDR, (11): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_SDR, (12): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_SDR, (13): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# - JMP_ON_CS, (31): Stop execution, de-assert CS and save operand[7:0] as the instruction start pointer for next
# sequence.Normally this instruction is used to support Execute-In-Place enhanced mode. See XIP enhanced mode for
# more details.This instruction is only allowed for AHB read commands. There is interrupt status bit set
# (INTR[IPCMDERR] or INTR[AHBCMDERR]) when using this instruction in IP command or AHB write command.
# - CMD_DDR, (33): Transmit command code to Flash.
# - RADDR_DDR, (34): Transmit row address to Flash.
# - CADDR_DDR, (35): Transmit column address to Flash.
# - MODE1_DDR, (36): Transmit mode bits to Flash.
# - MODE2_DDR, (37): Transmit mode bits to Flash.
# - MODE4_DDR, (38): Transmit mode bits to Flash.
# - MODE8_DDR, (39): Transmit mode bits to Flash.
# - WRITE_DDR, (40): Transmit program data to Flash device.
# - READ_DDR, (41): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_DDR, (42): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_DDR, (43): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_DDR, (44): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_DDR, (45): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# Possible options: <STOP, CMD_SDR, RADDR_SDR, CADDR_SDR, MODE1_SDR, MODE2_SDR, MODE4_SDR, MODE8_SDR, WRITE_SDR,
# READ_SDR, LEARN_SDR, DATSZ_SDR, DUMMY_SDR, DUMMY_RWDS_SDR, JMP_ON_CS, CMD_DDR, RADDR_DDR, CADDR_DDR, MODE1_DDR,
# MODE2_DDR, MODE4_DDR, MODE8_DDR, WRITE_DDR, READ_DDR, LEARN_DDR, DATSZ_DDR, DUMMY_DDR, DUMMY_RWDS_DDR>
OPERATION_CODE: STOP
lookupTable_seq6_instr1:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq6_instr2:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq6_instr3:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq6_instr4:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq6_instr5:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq6_instr6:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq6_instr7:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
# -----------------------------------===== lookupTable_seq7_instr0 [Optional] =====-----------------------------------
# Description: Offset: 0x000000F0, Width: 16b; Lookup table holds Flash command sequences 7, instruction 0
lookupTable_seq7_instr0:
# ------------------------------------------===== OPERAND [Optional] =====------------------------------------------
# Description: Offset: 0b, Width: 8b, Instruction operand. Its values depends on used instruction
OPERAND: 0
# -----------------------------------------===== NUM_PADS [Optional] =====------------------------------------------
# Description: Offset: 8b, Width: 2b, Number of pads used by instruction. Some instructions ignores this parameter.
# - 1PAD, (0): Single mode. One pad is used.
# - 2PAD, (1): Dual mode. Two pads are used.
# - 4PAD, (2): Quad mode. Four pads are used.
# - 8PAD, (3): Octal mode. Eight pads are used.
# Possible options: <1PAD, 2PAD, 4PAD, 8PAD>
NUM_PADS: 1PAD
# --------------------------------------===== OPERATION_CODE [Optional] =====---------------------------------------
# Description: Offset: 10b, Width: 6b, Instruction operation code.
# - STOP, (0): Stop execution and de-assert CS. Then, the next command sequence (to the same flash device) starts
# from instruction pointer 0.
# - CMD_SDR, (1): Transmit command code to Flash.
# - RADDR_SDR, (2): Transmit row address to Flash.
# - CADDR_SDR, (3): Transmit column address to Flash.
# - MODE1_SDR, (4): Transmit mode bits to Flash.
# - MODE2_SDR, (5): Transmit mode bits to Flash.
# - MODE4_SDR, (6): Transmit mode bits to Flash.
# - MODE8_SDR, (7): Transmit mode bits to Flash.
# - WRITE_SDR, (8): Transmit program data to Flash device.
# - READ_SDR, (9): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_SDR, (10): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_SDR, (11): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_SDR, (12): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_SDR, (13): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# - JMP_ON_CS, (31): Stop execution, de-assert CS and save operand[7:0] as the instruction start pointer for next
# sequence.Normally this instruction is used to support Execute-In-Place enhanced mode. See XIP enhanced mode for
# more details.This instruction is only allowed for AHB read commands. There is interrupt status bit set
# (INTR[IPCMDERR] or INTR[AHBCMDERR]) when using this instruction in IP command or AHB write command.
# - CMD_DDR, (33): Transmit command code to Flash.
# - RADDR_DDR, (34): Transmit row address to Flash.
# - CADDR_DDR, (35): Transmit column address to Flash.
# - MODE1_DDR, (36): Transmit mode bits to Flash.
# - MODE2_DDR, (37): Transmit mode bits to Flash.
# - MODE4_DDR, (38): Transmit mode bits to Flash.
# - MODE8_DDR, (39): Transmit mode bits to Flash.
# - WRITE_DDR, (40): Transmit program data to Flash device.
# - READ_DDR, (41): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_DDR, (42): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_DDR, (43): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_DDR, (44): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_DDR, (45): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# Possible options: <STOP, CMD_SDR, RADDR_SDR, CADDR_SDR, MODE1_SDR, MODE2_SDR, MODE4_SDR, MODE8_SDR, WRITE_SDR,
# READ_SDR, LEARN_SDR, DATSZ_SDR, DUMMY_SDR, DUMMY_RWDS_SDR, JMP_ON_CS, CMD_DDR, RADDR_DDR, CADDR_DDR, MODE1_DDR,
# MODE2_DDR, MODE4_DDR, MODE8_DDR, WRITE_DDR, READ_DDR, LEARN_DDR, DATSZ_DDR, DUMMY_DDR, DUMMY_RWDS_DDR>
OPERATION_CODE: STOP
lookupTable_seq7_instr1:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq7_instr2:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq7_instr3:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq7_instr4:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq7_instr5:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq7_instr6:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq7_instr7:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
# -----------------------------------===== lookupTable_seq8_instr0 [Optional] =====-----------------------------------
# Description: Offset: 0x00000100, Width: 16b; Lookup table holds Flash command sequences 8, instruction 0
lookupTable_seq8_instr0:
# ------------------------------------------===== OPERAND [Optional] =====------------------------------------------
# Description: Offset: 0b, Width: 8b, Instruction operand. Its values depends on used instruction
OPERAND: 0
# -----------------------------------------===== NUM_PADS [Optional] =====------------------------------------------
# Description: Offset: 8b, Width: 2b, Number of pads used by instruction. Some instructions ignores this parameter.
# - 1PAD, (0): Single mode. One pad is used.
# - 2PAD, (1): Dual mode. Two pads are used.
# - 4PAD, (2): Quad mode. Four pads are used.
# - 8PAD, (3): Octal mode. Eight pads are used.
# Possible options: <1PAD, 2PAD, 4PAD, 8PAD>
NUM_PADS: 1PAD
# --------------------------------------===== OPERATION_CODE [Optional] =====---------------------------------------
# Description: Offset: 10b, Width: 6b, Instruction operation code.
# - STOP, (0): Stop execution and de-assert CS. Then, the next command sequence (to the same flash device) starts
# from instruction pointer 0.
# - CMD_SDR, (1): Transmit command code to Flash.
# - RADDR_SDR, (2): Transmit row address to Flash.
# - CADDR_SDR, (3): Transmit column address to Flash.
# - MODE1_SDR, (4): Transmit mode bits to Flash.
# - MODE2_SDR, (5): Transmit mode bits to Flash.
# - MODE4_SDR, (6): Transmit mode bits to Flash.
# - MODE8_SDR, (7): Transmit mode bits to Flash.
# - WRITE_SDR, (8): Transmit program data to Flash device.
# - READ_SDR, (9): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_SDR, (10): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_SDR, (11): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_SDR, (12): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_SDR, (13): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# - JMP_ON_CS, (31): Stop execution, de-assert CS and save operand[7:0] as the instruction start pointer for next
# sequence.Normally this instruction is used to support Execute-In-Place enhanced mode. See XIP enhanced mode for
# more details.This instruction is only allowed for AHB read commands. There is interrupt status bit set
# (INTR[IPCMDERR] or INTR[AHBCMDERR]) when using this instruction in IP command or AHB write command.
# - CMD_DDR, (33): Transmit command code to Flash.
# - RADDR_DDR, (34): Transmit row address to Flash.
# - CADDR_DDR, (35): Transmit column address to Flash.
# - MODE1_DDR, (36): Transmit mode bits to Flash.
# - MODE2_DDR, (37): Transmit mode bits to Flash.
# - MODE4_DDR, (38): Transmit mode bits to Flash.
# - MODE8_DDR, (39): Transmit mode bits to Flash.
# - WRITE_DDR, (40): Transmit program data to Flash device.
# - READ_DDR, (41): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_DDR, (42): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_DDR, (43): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_DDR, (44): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_DDR, (45): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# Possible options: <STOP, CMD_SDR, RADDR_SDR, CADDR_SDR, MODE1_SDR, MODE2_SDR, MODE4_SDR, MODE8_SDR, WRITE_SDR,
# READ_SDR, LEARN_SDR, DATSZ_SDR, DUMMY_SDR, DUMMY_RWDS_SDR, JMP_ON_CS, CMD_DDR, RADDR_DDR, CADDR_DDR, MODE1_DDR,
# MODE2_DDR, MODE4_DDR, MODE8_DDR, WRITE_DDR, READ_DDR, LEARN_DDR, DATSZ_DDR, DUMMY_DDR, DUMMY_RWDS_DDR>
OPERATION_CODE: STOP
lookupTable_seq8_instr1:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq8_instr2:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq8_instr3:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq8_instr4:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq8_instr5:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq8_instr6:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq8_instr7:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
# -----------------------------------===== lookupTable_seq9_instr0 [Optional] =====-----------------------------------
# Description: Offset: 0x00000110, Width: 16b; Lookup table holds Flash command sequences 9, instruction 0
lookupTable_seq9_instr0:
# ------------------------------------------===== OPERAND [Optional] =====------------------------------------------
# Description: Offset: 0b, Width: 8b, Instruction operand. Its values depends on used instruction
OPERAND: 0
# -----------------------------------------===== NUM_PADS [Optional] =====------------------------------------------
# Description: Offset: 8b, Width: 2b, Number of pads used by instruction. Some instructions ignores this parameter.
# - 1PAD, (0): Single mode. One pad is used.
# - 2PAD, (1): Dual mode. Two pads are used.
# - 4PAD, (2): Quad mode. Four pads are used.
# - 8PAD, (3): Octal mode. Eight pads are used.
# Possible options: <1PAD, 2PAD, 4PAD, 8PAD>
NUM_PADS: 1PAD
# --------------------------------------===== OPERATION_CODE [Optional] =====---------------------------------------
# Description: Offset: 10b, Width: 6b, Instruction operation code.
# - STOP, (0): Stop execution and de-assert CS. Then, the next command sequence (to the same flash device) starts
# from instruction pointer 0.
# - CMD_SDR, (1): Transmit command code to Flash.
# - RADDR_SDR, (2): Transmit row address to Flash.
# - CADDR_SDR, (3): Transmit column address to Flash.
# - MODE1_SDR, (4): Transmit mode bits to Flash.
# - MODE2_SDR, (5): Transmit mode bits to Flash.
# - MODE4_SDR, (6): Transmit mode bits to Flash.
# - MODE8_SDR, (7): Transmit mode bits to Flash.
# - WRITE_SDR, (8): Transmit program data to Flash device.
# - READ_SDR, (9): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_SDR, (10): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_SDR, (11): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_SDR, (12): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_SDR, (13): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# - JMP_ON_CS, (31): Stop execution, de-assert CS and save operand[7:0] as the instruction start pointer for next
# sequence.Normally this instruction is used to support Execute-In-Place enhanced mode. See XIP enhanced mode for
# more details.This instruction is only allowed for AHB read commands. There is interrupt status bit set
# (INTR[IPCMDERR] or INTR[AHBCMDERR]) when using this instruction in IP command or AHB write command.
# - CMD_DDR, (33): Transmit command code to Flash.
# - RADDR_DDR, (34): Transmit row address to Flash.
# - CADDR_DDR, (35): Transmit column address to Flash.
# - MODE1_DDR, (36): Transmit mode bits to Flash.
# - MODE2_DDR, (37): Transmit mode bits to Flash.
# - MODE4_DDR, (38): Transmit mode bits to Flash.
# - MODE8_DDR, (39): Transmit mode bits to Flash.
# - WRITE_DDR, (40): Transmit program data to Flash device.
# - READ_DDR, (41): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_DDR, (42): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_DDR, (43): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_DDR, (44): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_DDR, (45): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# Possible options: <STOP, CMD_SDR, RADDR_SDR, CADDR_SDR, MODE1_SDR, MODE2_SDR, MODE4_SDR, MODE8_SDR, WRITE_SDR,
# READ_SDR, LEARN_SDR, DATSZ_SDR, DUMMY_SDR, DUMMY_RWDS_SDR, JMP_ON_CS, CMD_DDR, RADDR_DDR, CADDR_DDR, MODE1_DDR,
# MODE2_DDR, MODE4_DDR, MODE8_DDR, WRITE_DDR, READ_DDR, LEARN_DDR, DATSZ_DDR, DUMMY_DDR, DUMMY_RWDS_DDR>
OPERATION_CODE: STOP
lookupTable_seq9_instr1:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq9_instr2:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq9_instr3:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq9_instr4:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq9_instr5:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq9_instr6:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq9_instr7:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
# ----------------------------------===== lookupTable_seq10_instr0 [Optional] =====-----------------------------------
# Description: Offset: 0x00000120, Width: 16b; Lookup table holds Flash command sequences 10, instruction 0
lookupTable_seq10_instr0:
# ------------------------------------------===== OPERAND [Optional] =====------------------------------------------
# Description: Offset: 0b, Width: 8b, Instruction operand. Its values depends on used instruction
OPERAND: 0
# -----------------------------------------===== NUM_PADS [Optional] =====------------------------------------------
# Description: Offset: 8b, Width: 2b, Number of pads used by instruction. Some instructions ignores this parameter.
# - 1PAD, (0): Single mode. One pad is used.
# - 2PAD, (1): Dual mode. Two pads are used.
# - 4PAD, (2): Quad mode. Four pads are used.
# - 8PAD, (3): Octal mode. Eight pads are used.
# Possible options: <1PAD, 2PAD, 4PAD, 8PAD>
NUM_PADS: 1PAD
# --------------------------------------===== OPERATION_CODE [Optional] =====---------------------------------------
# Description: Offset: 10b, Width: 6b, Instruction operation code.
# - STOP, (0): Stop execution and de-assert CS. Then, the next command sequence (to the same flash device) starts
# from instruction pointer 0.
# - CMD_SDR, (1): Transmit command code to Flash.
# - RADDR_SDR, (2): Transmit row address to Flash.
# - CADDR_SDR, (3): Transmit column address to Flash.
# - MODE1_SDR, (4): Transmit mode bits to Flash.
# - MODE2_SDR, (5): Transmit mode bits to Flash.
# - MODE4_SDR, (6): Transmit mode bits to Flash.
# - MODE8_SDR, (7): Transmit mode bits to Flash.
# - WRITE_SDR, (8): Transmit program data to Flash device.
# - READ_SDR, (9): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_SDR, (10): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_SDR, (11): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_SDR, (12): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_SDR, (13): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# - JMP_ON_CS, (31): Stop execution, de-assert CS and save operand[7:0] as the instruction start pointer for next
# sequence.Normally this instruction is used to support Execute-In-Place enhanced mode. See XIP enhanced mode for
# more details.This instruction is only allowed for AHB read commands. There is interrupt status bit set
# (INTR[IPCMDERR] or INTR[AHBCMDERR]) when using this instruction in IP command or AHB write command.
# - CMD_DDR, (33): Transmit command code to Flash.
# - RADDR_DDR, (34): Transmit row address to Flash.
# - CADDR_DDR, (35): Transmit column address to Flash.
# - MODE1_DDR, (36): Transmit mode bits to Flash.
# - MODE2_DDR, (37): Transmit mode bits to Flash.
# - MODE4_DDR, (38): Transmit mode bits to Flash.
# - MODE8_DDR, (39): Transmit mode bits to Flash.
# - WRITE_DDR, (40): Transmit program data to Flash device.
# - READ_DDR, (41): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_DDR, (42): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_DDR, (43): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_DDR, (44): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_DDR, (45): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# Possible options: <STOP, CMD_SDR, RADDR_SDR, CADDR_SDR, MODE1_SDR, MODE2_SDR, MODE4_SDR, MODE8_SDR, WRITE_SDR,
# READ_SDR, LEARN_SDR, DATSZ_SDR, DUMMY_SDR, DUMMY_RWDS_SDR, JMP_ON_CS, CMD_DDR, RADDR_DDR, CADDR_DDR, MODE1_DDR,
# MODE2_DDR, MODE4_DDR, MODE8_DDR, WRITE_DDR, READ_DDR, LEARN_DDR, DATSZ_DDR, DUMMY_DDR, DUMMY_RWDS_DDR>
OPERATION_CODE: STOP
lookupTable_seq10_instr1:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq10_instr2:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq10_instr3:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq10_instr4:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq10_instr5:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq10_instr6:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq10_instr7:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
# ----------------------------------===== lookupTable_seq11_instr0 [Optional] =====-----------------------------------
# Description: Offset: 0x00000130, Width: 16b; Lookup table holds Flash command sequences 11, instruction 0
lookupTable_seq11_instr0:
# ------------------------------------------===== OPERAND [Optional] =====------------------------------------------
# Description: Offset: 0b, Width: 8b, Instruction operand. Its values depends on used instruction
OPERAND: 0
# -----------------------------------------===== NUM_PADS [Optional] =====------------------------------------------
# Description: Offset: 8b, Width: 2b, Number of pads used by instruction. Some instructions ignores this parameter.
# - 1PAD, (0): Single mode. One pad is used.
# - 2PAD, (1): Dual mode. Two pads are used.
# - 4PAD, (2): Quad mode. Four pads are used.
# - 8PAD, (3): Octal mode. Eight pads are used.
# Possible options: <1PAD, 2PAD, 4PAD, 8PAD>
NUM_PADS: 1PAD
# --------------------------------------===== OPERATION_CODE [Optional] =====---------------------------------------
# Description: Offset: 10b, Width: 6b, Instruction operation code.
# - STOP, (0): Stop execution and de-assert CS. Then, the next command sequence (to the same flash device) starts
# from instruction pointer 0.
# - CMD_SDR, (1): Transmit command code to Flash.
# - RADDR_SDR, (2): Transmit row address to Flash.
# - CADDR_SDR, (3): Transmit column address to Flash.
# - MODE1_SDR, (4): Transmit mode bits to Flash.
# - MODE2_SDR, (5): Transmit mode bits to Flash.
# - MODE4_SDR, (6): Transmit mode bits to Flash.
# - MODE8_SDR, (7): Transmit mode bits to Flash.
# - WRITE_SDR, (8): Transmit program data to Flash device.
# - READ_SDR, (9): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_SDR, (10): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_SDR, (11): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_SDR, (12): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_SDR, (13): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# - JMP_ON_CS, (31): Stop execution, de-assert CS and save operand[7:0] as the instruction start pointer for next
# sequence.Normally this instruction is used to support Execute-In-Place enhanced mode. See XIP enhanced mode for
# more details.This instruction is only allowed for AHB read commands. There is interrupt status bit set
# (INTR[IPCMDERR] or INTR[AHBCMDERR]) when using this instruction in IP command or AHB write command.
# - CMD_DDR, (33): Transmit command code to Flash.
# - RADDR_DDR, (34): Transmit row address to Flash.
# - CADDR_DDR, (35): Transmit column address to Flash.
# - MODE1_DDR, (36): Transmit mode bits to Flash.
# - MODE2_DDR, (37): Transmit mode bits to Flash.
# - MODE4_DDR, (38): Transmit mode bits to Flash.
# - MODE8_DDR, (39): Transmit mode bits to Flash.
# - WRITE_DDR, (40): Transmit program data to Flash device.
# - READ_DDR, (41): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_DDR, (42): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_DDR, (43): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_DDR, (44): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_DDR, (45): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# Possible options: <STOP, CMD_SDR, RADDR_SDR, CADDR_SDR, MODE1_SDR, MODE2_SDR, MODE4_SDR, MODE8_SDR, WRITE_SDR,
# READ_SDR, LEARN_SDR, DATSZ_SDR, DUMMY_SDR, DUMMY_RWDS_SDR, JMP_ON_CS, CMD_DDR, RADDR_DDR, CADDR_DDR, MODE1_DDR,
# MODE2_DDR, MODE4_DDR, MODE8_DDR, WRITE_DDR, READ_DDR, LEARN_DDR, DATSZ_DDR, DUMMY_DDR, DUMMY_RWDS_DDR>
OPERATION_CODE: STOP
lookupTable_seq11_instr1:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq11_instr2:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq11_instr3:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq11_instr4:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq11_instr5:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq11_instr6:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq11_instr7:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
# ----------------------------------===== lookupTable_seq12_instr0 [Optional] =====-----------------------------------
# Description: Offset: 0x00000140, Width: 16b; Lookup table holds Flash command sequences 12, instruction 0
lookupTable_seq12_instr0:
# ------------------------------------------===== OPERAND [Optional] =====------------------------------------------
# Description: Offset: 0b, Width: 8b, Instruction operand. Its values depends on used instruction
OPERAND: 0
# -----------------------------------------===== NUM_PADS [Optional] =====------------------------------------------
# Description: Offset: 8b, Width: 2b, Number of pads used by instruction. Some instructions ignores this parameter.
# - 1PAD, (0): Single mode. One pad is used.
# - 2PAD, (1): Dual mode. Two pads are used.
# - 4PAD, (2): Quad mode. Four pads are used.
# - 8PAD, (3): Octal mode. Eight pads are used.
# Possible options: <1PAD, 2PAD, 4PAD, 8PAD>
NUM_PADS: 1PAD
# --------------------------------------===== OPERATION_CODE [Optional] =====---------------------------------------
# Description: Offset: 10b, Width: 6b, Instruction operation code.
# - STOP, (0): Stop execution and de-assert CS. Then, the next command sequence (to the same flash device) starts
# from instruction pointer 0.
# - CMD_SDR, (1): Transmit command code to Flash.
# - RADDR_SDR, (2): Transmit row address to Flash.
# - CADDR_SDR, (3): Transmit column address to Flash.
# - MODE1_SDR, (4): Transmit mode bits to Flash.
# - MODE2_SDR, (5): Transmit mode bits to Flash.
# - MODE4_SDR, (6): Transmit mode bits to Flash.
# - MODE8_SDR, (7): Transmit mode bits to Flash.
# - WRITE_SDR, (8): Transmit program data to Flash device.
# - READ_SDR, (9): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_SDR, (10): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_SDR, (11): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_SDR, (12): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_SDR, (13): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# - JMP_ON_CS, (31): Stop execution, de-assert CS and save operand[7:0] as the instruction start pointer for next
# sequence.Normally this instruction is used to support Execute-In-Place enhanced mode. See XIP enhanced mode for
# more details.This instruction is only allowed for AHB read commands. There is interrupt status bit set
# (INTR[IPCMDERR] or INTR[AHBCMDERR]) when using this instruction in IP command or AHB write command.
# - CMD_DDR, (33): Transmit command code to Flash.
# - RADDR_DDR, (34): Transmit row address to Flash.
# - CADDR_DDR, (35): Transmit column address to Flash.
# - MODE1_DDR, (36): Transmit mode bits to Flash.
# - MODE2_DDR, (37): Transmit mode bits to Flash.
# - MODE4_DDR, (38): Transmit mode bits to Flash.
# - MODE8_DDR, (39): Transmit mode bits to Flash.
# - WRITE_DDR, (40): Transmit program data to Flash device.
# - READ_DDR, (41): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_DDR, (42): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_DDR, (43): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_DDR, (44): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_DDR, (45): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# Possible options: <STOP, CMD_SDR, RADDR_SDR, CADDR_SDR, MODE1_SDR, MODE2_SDR, MODE4_SDR, MODE8_SDR, WRITE_SDR,
# READ_SDR, LEARN_SDR, DATSZ_SDR, DUMMY_SDR, DUMMY_RWDS_SDR, JMP_ON_CS, CMD_DDR, RADDR_DDR, CADDR_DDR, MODE1_DDR,
# MODE2_DDR, MODE4_DDR, MODE8_DDR, WRITE_DDR, READ_DDR, LEARN_DDR, DATSZ_DDR, DUMMY_DDR, DUMMY_RWDS_DDR>
OPERATION_CODE: STOP
lookupTable_seq12_instr1:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq12_instr2:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq12_instr3:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq12_instr4:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq12_instr5:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq12_instr6:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq12_instr7:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
# ----------------------------------===== lookupTable_seq13_instr0 [Optional] =====-----------------------------------
# Description: Offset: 0x00000150, Width: 16b; Lookup table holds Flash command sequences 13, instruction 0
lookupTable_seq13_instr0:
# ------------------------------------------===== OPERAND [Optional] =====------------------------------------------
# Description: Offset: 0b, Width: 8b, Instruction operand. Its values depends on used instruction
OPERAND: 0
# -----------------------------------------===== NUM_PADS [Optional] =====------------------------------------------
# Description: Offset: 8b, Width: 2b, Number of pads used by instruction. Some instructions ignores this parameter.
# - 1PAD, (0): Single mode. One pad is used.
# - 2PAD, (1): Dual mode. Two pads are used.
# - 4PAD, (2): Quad mode. Four pads are used.
# - 8PAD, (3): Octal mode. Eight pads are used.
# Possible options: <1PAD, 2PAD, 4PAD, 8PAD>
NUM_PADS: 1PAD
# --------------------------------------===== OPERATION_CODE [Optional] =====---------------------------------------
# Description: Offset: 10b, Width: 6b, Instruction operation code.
# - STOP, (0): Stop execution and de-assert CS. Then, the next command sequence (to the same flash device) starts
# from instruction pointer 0.
# - CMD_SDR, (1): Transmit command code to Flash.
# - RADDR_SDR, (2): Transmit row address to Flash.
# - CADDR_SDR, (3): Transmit column address to Flash.
# - MODE1_SDR, (4): Transmit mode bits to Flash.
# - MODE2_SDR, (5): Transmit mode bits to Flash.
# - MODE4_SDR, (6): Transmit mode bits to Flash.
# - MODE8_SDR, (7): Transmit mode bits to Flash.
# - WRITE_SDR, (8): Transmit program data to Flash device.
# - READ_SDR, (9): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_SDR, (10): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_SDR, (11): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_SDR, (12): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_SDR, (13): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# - JMP_ON_CS, (31): Stop execution, de-assert CS and save operand[7:0] as the instruction start pointer for next
# sequence.Normally this instruction is used to support Execute-In-Place enhanced mode. See XIP enhanced mode for
# more details.This instruction is only allowed for AHB read commands. There is interrupt status bit set
# (INTR[IPCMDERR] or INTR[AHBCMDERR]) when using this instruction in IP command or AHB write command.
# - CMD_DDR, (33): Transmit command code to Flash.
# - RADDR_DDR, (34): Transmit row address to Flash.
# - CADDR_DDR, (35): Transmit column address to Flash.
# - MODE1_DDR, (36): Transmit mode bits to Flash.
# - MODE2_DDR, (37): Transmit mode bits to Flash.
# - MODE4_DDR, (38): Transmit mode bits to Flash.
# - MODE8_DDR, (39): Transmit mode bits to Flash.
# - WRITE_DDR, (40): Transmit program data to Flash device.
# - READ_DDR, (41): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_DDR, (42): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_DDR, (43): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_DDR, (44): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_DDR, (45): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# Possible options: <STOP, CMD_SDR, RADDR_SDR, CADDR_SDR, MODE1_SDR, MODE2_SDR, MODE4_SDR, MODE8_SDR, WRITE_SDR,
# READ_SDR, LEARN_SDR, DATSZ_SDR, DUMMY_SDR, DUMMY_RWDS_SDR, JMP_ON_CS, CMD_DDR, RADDR_DDR, CADDR_DDR, MODE1_DDR,
# MODE2_DDR, MODE4_DDR, MODE8_DDR, WRITE_DDR, READ_DDR, LEARN_DDR, DATSZ_DDR, DUMMY_DDR, DUMMY_RWDS_DDR>
OPERATION_CODE: STOP
lookupTable_seq13_instr1:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq13_instr2:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq13_instr3:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq13_instr4:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq13_instr5:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq13_instr6:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq13_instr7:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
# ----------------------------------===== lookupTable_seq14_instr0 [Optional] =====-----------------------------------
# Description: Offset: 0x00000160, Width: 16b; Lookup table holds Flash command sequences 14, instruction 0
lookupTable_seq14_instr0:
# ------------------------------------------===== OPERAND [Optional] =====------------------------------------------
# Description: Offset: 0b, Width: 8b, Instruction operand. Its values depends on used instruction
OPERAND: 0
# -----------------------------------------===== NUM_PADS [Optional] =====------------------------------------------
# Description: Offset: 8b, Width: 2b, Number of pads used by instruction. Some instructions ignores this parameter.
# - 1PAD, (0): Single mode. One pad is used.
# - 2PAD, (1): Dual mode. Two pads are used.
# - 4PAD, (2): Quad mode. Four pads are used.
# - 8PAD, (3): Octal mode. Eight pads are used.
# Possible options: <1PAD, 2PAD, 4PAD, 8PAD>
NUM_PADS: 1PAD
# --------------------------------------===== OPERATION_CODE [Optional] =====---------------------------------------
# Description: Offset: 10b, Width: 6b, Instruction operation code.
# - STOP, (0): Stop execution and de-assert CS. Then, the next command sequence (to the same flash device) starts
# from instruction pointer 0.
# - CMD_SDR, (1): Transmit command code to Flash.
# - RADDR_SDR, (2): Transmit row address to Flash.
# - CADDR_SDR, (3): Transmit column address to Flash.
# - MODE1_SDR, (4): Transmit mode bits to Flash.
# - MODE2_SDR, (5): Transmit mode bits to Flash.
# - MODE4_SDR, (6): Transmit mode bits to Flash.
# - MODE8_SDR, (7): Transmit mode bits to Flash.
# - WRITE_SDR, (8): Transmit program data to Flash device.
# - READ_SDR, (9): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_SDR, (10): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_SDR, (11): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_SDR, (12): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_SDR, (13): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# - JMP_ON_CS, (31): Stop execution, de-assert CS and save operand[7:0] as the instruction start pointer for next
# sequence.Normally this instruction is used to support Execute-In-Place enhanced mode. See XIP enhanced mode for
# more details.This instruction is only allowed for AHB read commands. There is interrupt status bit set
# (INTR[IPCMDERR] or INTR[AHBCMDERR]) when using this instruction in IP command or AHB write command.
# - CMD_DDR, (33): Transmit command code to Flash.
# - RADDR_DDR, (34): Transmit row address to Flash.
# - CADDR_DDR, (35): Transmit column address to Flash.
# - MODE1_DDR, (36): Transmit mode bits to Flash.
# - MODE2_DDR, (37): Transmit mode bits to Flash.
# - MODE4_DDR, (38): Transmit mode bits to Flash.
# - MODE8_DDR, (39): Transmit mode bits to Flash.
# - WRITE_DDR, (40): Transmit program data to Flash device.
# - READ_DDR, (41): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_DDR, (42): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_DDR, (43): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_DDR, (44): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_DDR, (45): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# Possible options: <STOP, CMD_SDR, RADDR_SDR, CADDR_SDR, MODE1_SDR, MODE2_SDR, MODE4_SDR, MODE8_SDR, WRITE_SDR,
# READ_SDR, LEARN_SDR, DATSZ_SDR, DUMMY_SDR, DUMMY_RWDS_SDR, JMP_ON_CS, CMD_DDR, RADDR_DDR, CADDR_DDR, MODE1_DDR,
# MODE2_DDR, MODE4_DDR, MODE8_DDR, WRITE_DDR, READ_DDR, LEARN_DDR, DATSZ_DDR, DUMMY_DDR, DUMMY_RWDS_DDR>
OPERATION_CODE: STOP
lookupTable_seq14_instr1:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq14_instr2:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq14_instr3:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq14_instr4:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq14_instr5:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq14_instr6:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq14_instr7:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
# ----------------------------------===== lookupTable_seq15_instr0 [Optional] =====-----------------------------------
# Description: Offset: 0x00000170, Width: 16b; Lookup table holds Flash command sequences 15, instruction 0
lookupTable_seq15_instr0:
# ------------------------------------------===== OPERAND [Optional] =====------------------------------------------
# Description: Offset: 0b, Width: 8b, Instruction operand. Its values depends on used instruction
OPERAND: 0
# -----------------------------------------===== NUM_PADS [Optional] =====------------------------------------------
# Description: Offset: 8b, Width: 2b, Number of pads used by instruction. Some instructions ignores this parameter.
# - 1PAD, (0): Single mode. One pad is used.
# - 2PAD, (1): Dual mode. Two pads are used.
# - 4PAD, (2): Quad mode. Four pads are used.
# - 8PAD, (3): Octal mode. Eight pads are used.
# Possible options: <1PAD, 2PAD, 4PAD, 8PAD>
NUM_PADS: 1PAD
# --------------------------------------===== OPERATION_CODE [Optional] =====---------------------------------------
# Description: Offset: 10b, Width: 6b, Instruction operation code.
# - STOP, (0): Stop execution and de-assert CS. Then, the next command sequence (to the same flash device) starts
# from instruction pointer 0.
# - CMD_SDR, (1): Transmit command code to Flash.
# - RADDR_SDR, (2): Transmit row address to Flash.
# - CADDR_SDR, (3): Transmit column address to Flash.
# - MODE1_SDR, (4): Transmit mode bits to Flash.
# - MODE2_SDR, (5): Transmit mode bits to Flash.
# - MODE4_SDR, (6): Transmit mode bits to Flash.
# - MODE8_SDR, (7): Transmit mode bits to Flash.
# - WRITE_SDR, (8): Transmit program data to Flash device.
# - READ_SDR, (9): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_SDR, (10): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_SDR, (11): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_SDR, (12): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_SDR, (13): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# - JMP_ON_CS, (31): Stop execution, de-assert CS and save operand[7:0] as the instruction start pointer for next
# sequence.Normally this instruction is used to support Execute-In-Place enhanced mode. See XIP enhanced mode for
# more details.This instruction is only allowed for AHB read commands. There is interrupt status bit set
# (INTR[IPCMDERR] or INTR[AHBCMDERR]) when using this instruction in IP command or AHB write command.
# - CMD_DDR, (33): Transmit command code to Flash.
# - RADDR_DDR, (34): Transmit row address to Flash.
# - CADDR_DDR, (35): Transmit column address to Flash.
# - MODE1_DDR, (36): Transmit mode bits to Flash.
# - MODE2_DDR, (37): Transmit mode bits to Flash.
# - MODE4_DDR, (38): Transmit mode bits to Flash.
# - MODE8_DDR, (39): Transmit mode bits to Flash.
# - WRITE_DDR, (40): Transmit program data to Flash device.
# - READ_DDR, (41): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_DDR, (42): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_DDR, (43): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_DDR, (44): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_DDR, (45): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# Possible options: <STOP, CMD_SDR, RADDR_SDR, CADDR_SDR, MODE1_SDR, MODE2_SDR, MODE4_SDR, MODE8_SDR, WRITE_SDR,
# READ_SDR, LEARN_SDR, DATSZ_SDR, DUMMY_SDR, DUMMY_RWDS_SDR, JMP_ON_CS, CMD_DDR, RADDR_DDR, CADDR_DDR, MODE1_DDR,
# MODE2_DDR, MODE4_DDR, MODE8_DDR, WRITE_DDR, READ_DDR, LEARN_DDR, DATSZ_DDR, DUMMY_DDR, DUMMY_RWDS_DDR>
OPERATION_CODE: STOP
lookupTable_seq15_instr1:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq15_instr2:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq15_instr3:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq15_instr4:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq15_instr5:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq15_instr6:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq15_instr7:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
# ---------------------------------------===== lutCustomSeq_0 [Optional] =====----------------------------------------
# Description: Offset: 0x00000180, Width: 32b; [0x180-0x1af] Customizable LUT Sequences
lutCustomSeq_0:
# ------------------------------------------===== seqNum [Optional] =====-------------------------------------------
# Description: Offset: 0b, Width: 8b, Sequence Number, valid number: 1-16
seqNum: 0
# -------------------------------------------===== seqId [Optional] =====-------------------------------------------
# Description: Offset: 8b, Width: 8b, Sequence Index, valid number: 0-15
seqId: 0
# -----------------------------------------===== reserved [Optional] =====------------------------------------------
# Description: Offset: 16b, Width: 16b, N/A
reserved: 0
# ---------------------------------------===== lutCustomSeq_1 [Optional] =====----------------------------------------
# Description: Offset: 0x00000184, Width: 32b; [0x180-0x1af] Customizable LUT Sequences
lutCustomSeq_1:
# ------------------------------------------===== seqNum [Optional] =====-------------------------------------------
# Description: Offset: 0b, Width: 8b, Sequence Number, valid number: 1-16
seqNum: 0
# -------------------------------------------===== seqId [Optional] =====-------------------------------------------
# Description: Offset: 8b, Width: 8b, Sequence Index, valid number: 0-15
seqId: 0
# -----------------------------------------===== reserved [Optional] =====------------------------------------------
# Description: Offset: 16b, Width: 16b, N/A
reserved: 0
# ---------------------------------------===== lutCustomSeq_2 [Optional] =====----------------------------------------
# Description: Offset: 0x00000188, Width: 32b; [0x180-0x1af] Customizable LUT Sequences
lutCustomSeq_2:
# ------------------------------------------===== seqNum [Optional] =====-------------------------------------------
# Description: Offset: 0b, Width: 8b, Sequence Number, valid number: 1-16
seqNum: 0
# -------------------------------------------===== seqId [Optional] =====-------------------------------------------
# Description: Offset: 8b, Width: 8b, Sequence Index, valid number: 0-15
seqId: 0
# -----------------------------------------===== reserved [Optional] =====------------------------------------------
# Description: Offset: 16b, Width: 16b, N/A
reserved: 0
# ---------------------------------------===== lutCustomSeq_3 [Optional] =====----------------------------------------
# Description: Offset: 0x0000018C, Width: 32b; [0x180-0x1af] Customizable LUT Sequences
lutCustomSeq_3:
# ------------------------------------------===== seqNum [Optional] =====-------------------------------------------
# Description: Offset: 0b, Width: 8b, Sequence Number, valid number: 1-16
seqNum: 0
# -------------------------------------------===== seqId [Optional] =====-------------------------------------------
# Description: Offset: 8b, Width: 8b, Sequence Index, valid number: 0-15
seqId: 0
# -----------------------------------------===== reserved [Optional] =====------------------------------------------
# Description: Offset: 16b, Width: 16b, N/A
reserved: 0
# ---------------------------------------===== lutCustomSeq_4 [Optional] =====----------------------------------------
# Description: Offset: 0x00000190, Width: 32b; [0x180-0x1af] Customizable LUT Sequences
lutCustomSeq_4:
# ------------------------------------------===== seqNum [Optional] =====-------------------------------------------
# Description: Offset: 0b, Width: 8b, Sequence Number, valid number: 1-16
seqNum: 0
# -------------------------------------------===== seqId [Optional] =====-------------------------------------------
# Description: Offset: 8b, Width: 8b, Sequence Index, valid number: 0-15
seqId: 0
# -----------------------------------------===== reserved [Optional] =====------------------------------------------
# Description: Offset: 16b, Width: 16b, N/A
reserved: 0
# ---------------------------------------===== lutCustomSeq_5 [Optional] =====----------------------------------------
# Description: Offset: 0x00000194, Width: 32b; [0x180-0x1af] Customizable LUT Sequences
lutCustomSeq_5:
# ------------------------------------------===== seqNum [Optional] =====-------------------------------------------
# Description: Offset: 0b, Width: 8b, Sequence Number, valid number: 1-16
seqNum: 0
# -------------------------------------------===== seqId [Optional] =====-------------------------------------------
# Description: Offset: 8b, Width: 8b, Sequence Index, valid number: 0-15
seqId: 0
# -----------------------------------------===== reserved [Optional] =====------------------------------------------
# Description: Offset: 16b, Width: 16b, N/A
reserved: 0
# ---------------------------------------===== lutCustomSeq_6 [Optional] =====----------------------------------------
# Description: Offset: 0x00000198, Width: 32b; [0x180-0x1af] Customizable LUT Sequences
lutCustomSeq_6:
# ------------------------------------------===== seqNum [Optional] =====-------------------------------------------
# Description: Offset: 0b, Width: 8b, Sequence Number, valid number: 1-16
seqNum: 0
# -------------------------------------------===== seqId [Optional] =====-------------------------------------------
# Description: Offset: 8b, Width: 8b, Sequence Index, valid number: 0-15
seqId: 0
# -----------------------------------------===== reserved [Optional] =====------------------------------------------
# Description: Offset: 16b, Width: 16b, N/A
reserved: 0
# ---------------------------------------===== lutCustomSeq_7 [Optional] =====----------------------------------------
# Description: Offset: 0x0000019C, Width: 32b; [0x180-0x1af] Customizable LUT Sequences
lutCustomSeq_7:
# ------------------------------------------===== seqNum [Optional] =====-------------------------------------------
# Description: Offset: 0b, Width: 8b, Sequence Number, valid number: 1-16
seqNum: 0
# -------------------------------------------===== seqId [Optional] =====-------------------------------------------
# Description: Offset: 8b, Width: 8b, Sequence Index, valid number: 0-15
seqId: 0
# -----------------------------------------===== reserved [Optional] =====------------------------------------------
# Description: Offset: 16b, Width: 16b, N/A
reserved: 0
# ---------------------------------------===== lutCustomSeq_8 [Optional] =====----------------------------------------
# Description: Offset: 0x000001A0, Width: 32b; [0x180-0x1af] Customizable LUT Sequences
lutCustomSeq_8:
# ------------------------------------------===== seqNum [Optional] =====-------------------------------------------
# Description: Offset: 0b, Width: 8b, Sequence Number, valid number: 1-16
seqNum: 0
# -------------------------------------------===== seqId [Optional] =====-------------------------------------------
# Description: Offset: 8b, Width: 8b, Sequence Index, valid number: 0-15
seqId: 0
# -----------------------------------------===== reserved [Optional] =====------------------------------------------
# Description: Offset: 16b, Width: 16b, N/A
reserved: 0
# ---------------------------------------===== lutCustomSeq_9 [Optional] =====----------------------------------------
# Description: Offset: 0x000001A4, Width: 32b; [0x180-0x1af] Customizable LUT Sequences
lutCustomSeq_9:
# ------------------------------------------===== seqNum [Optional] =====-------------------------------------------
# Description: Offset: 0b, Width: 8b, Sequence Number, valid number: 1-16
seqNum: 0
# -------------------------------------------===== seqId [Optional] =====-------------------------------------------
# Description: Offset: 8b, Width: 8b, Sequence Index, valid number: 0-15
seqId: 0
# -----------------------------------------===== reserved [Optional] =====------------------------------------------
# Description: Offset: 16b, Width: 16b, N/A
reserved: 0
# ---------------------------------------===== lutCustomSeq_10 [Optional] =====---------------------------------------
# Description: Offset: 0x000001A8, Width: 32b; [0x180-0x1af] Customizable LUT Sequences
lutCustomSeq_10:
# ------------------------------------------===== seqNum [Optional] =====-------------------------------------------
# Description: Offset: 0b, Width: 8b, Sequence Number, valid number: 1-16
seqNum: 0
# -------------------------------------------===== seqId [Optional] =====-------------------------------------------
# Description: Offset: 8b, Width: 8b, Sequence Index, valid number: 0-15
seqId: 0
# -----------------------------------------===== reserved [Optional] =====------------------------------------------
# Description: Offset: 16b, Width: 16b, N/A
reserved: 0
# ---------------------------------------===== lutCustomSeq_11 [Optional] =====---------------------------------------
# Description: Offset: 0x000001AC, Width: 32b; [0x180-0x1af] Customizable LUT Sequences
lutCustomSeq_11:
# ------------------------------------------===== seqNum [Optional] =====-------------------------------------------
# Description: Offset: 0b, Width: 8b, Sequence Number, valid number: 1-16
seqNum: 0
# -------------------------------------------===== seqId [Optional] =====-------------------------------------------
# Description: Offset: 8b, Width: 8b, Sequence Index, valid number: 0-15
seqId: 0
# -----------------------------------------===== reserved [Optional] =====------------------------------------------
# Description: Offset: 16b, Width: 16b, N/A
reserved: 0
# -----------------------------------------===== reserved9_0 [Optional] =====-----------------------------------------
# Description: Offset: 0x000001B0, Width: 32b; [0x1b0-0x1bf] Reserved for future use
reserved9_0: '0x00000000'
# -----------------------------------------===== reserved9_1 [Optional] =====-----------------------------------------
# Description: Offset: 0x000001B4, Width: 32b; [0x1b0-0x1bf] Reserved for future use
reserved9_1: '0x00000000'
# -----------------------------------------===== reserved9_2 [Optional] =====-----------------------------------------
# Description: Offset: 0x000001B8, Width: 32b; [0x1b0-0x1bf] Reserved for future use
reserved9_2: '0x00000000'
# -----------------------------------------===== reserved9_3 [Optional] =====-----------------------------------------
# Description: Offset: 0x000001BC, Width: 32b; [0x1b0-0x1bf] Reserved for future use
reserved9_3: '0x00000000'
# ------------------------------------------===== pageSize [Optional] =====-------------------------------------------
# Description: Offset: 0x000001C0, Width: 32b; Page size of Serial NOR
pageSize: '0x00000000'
# -----------------------------------------===== sectorSize [Optional] =====------------------------------------------
# Description: Offset: 0x000001C4, Width: 32b; Sector size of Serial NOR
sectorSize: '0x00000000'
# -------------------------------------===== ipcmdSerialClkFreq [Optional] =====--------------------------------------
# Description: Offset: 0x000001C8, Width: 8b; Clock frequency for IP command
ipcmdSerialClkFreq: '0x00'
# -------------------------------------===== isUniformBlockSize [Optional] =====--------------------------------------
# Description: Offset: 0x000001C9, Width: 8b; Sector/Block size is the same
isUniformBlockSize: '0x00'
# -------------------------------------===== isDataOrderSwapped [Optional] =====--------------------------------------
# Description: Offset: 0x000001CA, Width: 8b; The data order is swapped in OPI DDR mode
isDataOrderSwapped: '0x00'
# ----------------------------------------===== reserved10_0 [Optional] =====-----------------------------------------
# Description: Offset: 0x000001CB, Width: 8b; Reserved for future use
reserved10_0: '0x00'
# ----------------------------------------===== reserved10_1 [Optional] =====-----------------------------------------
# Description: Offset: 0x000001CC, Width: 8b; Reserved for future use
reserved10_1: '0x00'
# ----------------------------------------===== reserved10_2 [Optional] =====-----------------------------------------
# Description: Offset: 0x000001CD, Width: 8b; Reserved for future use
reserved10_2: '0x00'
# ----------------------------------------===== reserved10_3 [Optional] =====-----------------------------------------
# Description: Offset: 0x000001CE, Width: 8b; Reserved for future use
reserved10_3: '0x00'
# ----------------------------------------===== reserved10_4 [Optional] =====-----------------------------------------
# Description: Offset: 0x000001CF, Width: 8b; Reserved for future use
reserved10_4: '0x00'
# ------------------------------------------===== blockSize [Optional] =====------------------------------------------
# Description: Offset: 0x000001D0, Width: 32b; Block size
blockSize: '0x00000000'
# ----------------------------------------===== flashStateCtx [Optional] =====----------------------------------------
# Description: Offset: 0x000001D4, Width: 32b; Flash State Context after being configured
flashStateCtx:
# ---------------------------------------===== flashPorMode [Optional] =====----------------------------------------
# Description: Offset: 0b, Width: 8b, Flash POR Mode
flashPorMode: 0
# -------------------------------------===== flashCurrentMode [Optional] =====--------------------------------------
# Description: Offset: 8b, Width: 8b, Sequence Number, valid number: 1-16
flashCurrentMode: 0
# -----------------------------------------===== reserved [Optional] =====------------------------------------------
# Description: Offset: 16b, Width: 8b, Sequence Number, valid number: 1-16
reserved: 0
# ----------------------------------===== flashRestoringSequence [Optional] =====-----------------------------------
# Description: Offset: 24b, Width: 8b, Sequence Number, valid number: 1-16
flashRestoringSequence: 0
# ----------------------------------------===== reserved11_0 [Optional] =====-----------------------------------------
# Description: Offset: 0x000001D8, Width: 32b; Reserved for future use
reserved11_0: '0x00000000'
# ----------------------------------------===== reserved11_1 [Optional] =====-----------------------------------------
# Description: Offset: 0x000001DC, Width: 32b; Reserved for future use
reserved11_1: '0x00000000'
# ----------------------------------------===== reserved11_2 [Optional] =====-----------------------------------------
# Description: Offset: 0x000001E0, Width: 32b; Reserved for future use
reserved11_2: '0x00000000'
# ----------------------------------------===== reserved11_3 [Optional] =====-----------------------------------------
# Description: Offset: 0x000001E4, Width: 32b; Reserved for future use
reserved11_3: '0x00000000'
# ----------------------------------------===== reserved11_4 [Optional] =====-----------------------------------------
# Description: Offset: 0x000001E8, Width: 32b; Reserved for future use
reserved11_4: '0x00000000'
# ----------------------------------------===== reserved11_5 [Optional] =====-----------------------------------------
# Description: Offset: 0x000001EC, Width: 32b; Reserved for future use
reserved11_5: '0x00000000'
# ----------------------------------------===== reserved11_6 [Optional] =====-----------------------------------------
# Description: Offset: 0x000001F0, Width: 32b; Reserved for future use
reserved11_6: '0x00000000'
# ----------------------------------------===== reserved11_7 [Optional] =====-----------------------------------------
# Description: Offset: 0x000001F4, Width: 32b; Reserved for future use
reserved11_7: '0x00000000'
# ----------------------------------------===== reserved11_8 [Optional] =====-----------------------------------------
# Description: Offset: 0x000001F8, Width: 32b; Reserved for future use
reserved11_8: '0x00000000'
# ----------------------------------------===== reserved11_9 [Optional] =====-----------------------------------------
# Description: Offset: 0x000001FC, Width: 32b; Reserved for future use
reserved11_9: '0x00000000'
FCB for mimxrt1182, Revision: b0 and flexspi_nor#
FCB for mimxrt1182, Revision: b0 and flexspi_nor JSON schema
FCB for mimxrt1182, Revision: b0 and flexspi_nor YAML configuration template
# ================================= FCB for mimxrt1182, Revision: b0 and flexspi_nor =================================
# ======================================================================================================================
# == FCB for mimxrt1182, Revision: b0 and flexspi_nor ==
# ======================================================================================================================
# -------------------------------------===== The chip family name [Required] =====--------------------------------------
# Description: NXP chip family identifier.
family: CHOOSE_FROM_TABLE
# -----------------------------------------===== MCU revision [Optional] =====------------------------------------------
# Description: Revision of silicon. The 'latest' name, means most current revision.
# Possible options: <a0, b0, latest>
revision: b0
# ------------------------------------------===== Memory type [Required] =====------------------------------------------
# Description: Specify type of memory used by FCB description.
# Possible options: <flexspi_nor>
type: flexspi_nor
# ------------------------------------------===== mimxrt1182 [Required] =====-------------------------------------------
fcb_settings:
# ---------------------------------------------===== tag [Optional] =====---------------------------------------------
# Description: Offset: 0x00000000, Width: 32b; [0x000-0x003] Tag, fixed value 0x42464346UL
tag: '0x42464346'
# -------------------------------------------===== version [Optional] =====-------------------------------------------
# Description: Offset: 0x00000004, Width: 32b; [0x004-0x007] Version,[31:24] -'V', [23:16] - Major, [15:8] - Minor,
# [7:0] - bugfix
version:
# ------------------------------------------===== bugfix [Optional] =====-------------------------------------------
# Description: Offset: 0b, Width: 8b, [07:00] Bugfix - 0
bugfix: 0
# -------------------------------------------===== minor [Optional] =====-------------------------------------------
# Description: Offset: 8b, Width: 8b, [15:08] Minor
minor: 0
# -------------------------------------------===== major [Optional] =====-------------------------------------------
# Description: Offset: 16b, Width: 8b, [23:16] Major - 1
major: 1
# -----------------------------------------===== reserved [Optional] =====------------------------------------------
# Description: Offset: 24b, Width: 8b, [32:24] Ascii 'V'
reserved: 86
# ------------------------------------------===== reserved0 [Optional] =====------------------------------------------
# Description: Offset: 0x00000008, Width: 32b; [0x008-0x00b] Reserved for future use
reserved0: '0x00000000'
# --------------------------------------===== readSampleClkSrc [Optional] =====---------------------------------------
# Description: Offset: 0x0000000C, Width: 8b; [0x00c-0x00c] Read Sample Clock Source, valid value: 0/1/3
readSampleClkSrc: '0x00'
# -----------------------------------------===== csHoldTime [Optional] =====------------------------------------------
# Description: Offset: 0x0000000D, Width: 8b; [0x00d-0x00d] CS hold time, default value: 3
csHoldTime: '0x00'
# -----------------------------------------===== csSetupTime [Optional] =====-----------------------------------------
# Description: Offset: 0x0000000E, Width: 8b; [0x00e-0x00e] CS setup time, default value: 3
csSetupTime: '0x00'
# -------------------------------------===== columnAddressWidth [Optional] =====--------------------------------------
# Description: Offset: 0x0000000F, Width: 8b; [0x00f-0x00f] Column Address with, for HyperBus protocol, it is fixed
# to 3, For Serial NAND, need to refer to datasheet
columnAddressWidth: '0x00'
# -------------------------------------===== deviceModeCfgEnable [Optional] =====-------------------------------------
# Description: Offset: 0x00000010, Width: 8b; [0x010-0x010] Device Mode Configure enable flag, 1 - Enable, 0 -
# Disable
deviceModeCfgEnable: '0x00'
# ---------------------------------------===== deviceModeType [Optional] =====----------------------------------------
# Description: Offset: 0x00000011, Width: 8b; [0x011-0x011] Specify the configuration command type: 0 - Generic, 1 -
# Quad Enable, 2 - SPI-to-xSPI, 3 - xSPI-to-SPI
deviceModeType: '0x00'
# -------------------------------------===== waitTimeCfgCommands [Optional] =====-------------------------------------
# Description: Offset: 0x00000012, Width: 16b; [0x012-0x013] Wait time for all configuration commands, unit: 100us,
# Used for DPI/QPI/OPI switch or reset command
waitTimeCfgCommands: '0x0000'
# ----------------------------------------===== deviceModeSeq [Optional] =====----------------------------------------
# Description: Offset: 0x00000014, Width: 32b; [0x014-0x017] Device mode sequence info, [7:0] - LUT sequence id,
# [15:8] - LUt sequence number, [31:16] Reserved
deviceModeSeq:
# ------------------------------------------===== seqNum [Optional] =====-------------------------------------------
# Description: Offset: 0b, Width: 8b, Sequence Number, valid number: 1-16
seqNum: 0
# -------------------------------------------===== seqId [Optional] =====-------------------------------------------
# Description: Offset: 8b, Width: 8b, Sequence Index, valid number: 0-15
seqId: 0
# -----------------------------------------===== reserved [Optional] =====------------------------------------------
# Description: Offset: 16b, Width: 16b, N/A
reserved: 0
# ----------------------------------------===== deviceModeArg [Optional] =====----------------------------------------
# Description: Offset: 0x00000018, Width: 32b; [0x018-0x01b] Argument/Parameter for device configuration. effective
# only when deviceModeCfgEnable = 1
deviceModeArg: '0x00000000'
# ---------------------------------------===== configCmdEnable [Optional] =====---------------------------------------
# Description: Offset: 0x0000001C, Width: 8b; [0x01c-0x01c] Configure command Enable Flag, 1 - Enable, 0 - Disable
configCmdEnable: '0x00'
# ------------------------------------------===== reserved1 [Optional] =====------------------------------------------
# Description: Offset: 0x0000001D, Width: 24b; [0x01d-0x019] Reserved for future use
reserved1: '0x000000'
# ---------------------------------------===== configCmdSeqs_0 [Optional] =====---------------------------------------
# Description: Offset: 0x00000020, Width: 32b; [0x020-0x02b] Sequence info for Device Configuration command, similar
# as deviceModeSeq
configCmdSeqs_0:
# ------------------------------------------===== seqNum [Optional] =====-------------------------------------------
# Description: Offset: 0b, Width: 8b, Sequence Number, valid number: 1-16
seqNum: 0
# -------------------------------------------===== seqId [Optional] =====-------------------------------------------
# Description: Offset: 8b, Width: 8b, Sequence Index, valid number: 0-15
seqId: 0
# -----------------------------------------===== reserved [Optional] =====------------------------------------------
# Description: Offset: 16b, Width: 16b, N/A
reserved: 0
# ---------------------------------------===== configCmdSeqs_1 [Optional] =====---------------------------------------
# Description: Offset: 0x00000024, Width: 32b; [0x020-0x02b] Sequence info for Device Configuration command, similar
# as deviceModeSeq
configCmdSeqs_1:
# ------------------------------------------===== seqNum [Optional] =====-------------------------------------------
# Description: Offset: 0b, Width: 8b, Sequence Number, valid number: 1-16
seqNum: 0
# -------------------------------------------===== seqId [Optional] =====-------------------------------------------
# Description: Offset: 8b, Width: 8b, Sequence Index, valid number: 0-15
seqId: 0
# -----------------------------------------===== reserved [Optional] =====------------------------------------------
# Description: Offset: 16b, Width: 16b, N/A
reserved: 0
# ---------------------------------------===== configCmdSeqs_2 [Optional] =====---------------------------------------
# Description: Offset: 0x00000028, Width: 32b; [0x020-0x02b] Sequence info for Device Configuration command, similar
# as deviceModeSeq
configCmdSeqs_2:
# ------------------------------------------===== seqNum [Optional] =====-------------------------------------------
# Description: Offset: 0b, Width: 8b, Sequence Number, valid number: 1-16
seqNum: 0
# -------------------------------------------===== seqId [Optional] =====-------------------------------------------
# Description: Offset: 8b, Width: 8b, Sequence Index, valid number: 0-15
seqId: 0
# -----------------------------------------===== reserved [Optional] =====------------------------------------------
# Description: Offset: 16b, Width: 16b, N/A
reserved: 0
# ------------------------------------------===== reserved2 [Optional] =====------------------------------------------
# Description: Offset: 0x0000002C, Width: 32b; [0x02c-0x02f] Reserved for future use
reserved2: '0x00000000'
# ---------------------------------------===== configCmdArgs_0 [Optional] =====---------------------------------------
# Description: Offset: 0x00000030, Width: 32b; [0x030-0x03b] Arguments/Parameters for device Configuration commands
configCmdArgs_0: '0x00000000'
# ---------------------------------------===== configCmdArgs_1 [Optional] =====---------------------------------------
# Description: Offset: 0x00000034, Width: 32b; [0x030-0x03b] Arguments/Parameters for device Configuration commands
configCmdArgs_1: '0x00000000'
# ---------------------------------------===== configCmdArgs_2 [Optional] =====---------------------------------------
# Description: Offset: 0x00000038, Width: 32b; [0x030-0x03b] Arguments/Parameters for device Configuration commands
configCmdArgs_2: '0x00000000'
# ------------------------------------------===== reserved3 [Optional] =====------------------------------------------
# Description: Offset: 0x0000003C, Width: 32b; [0x03c-0x03f] Reserved for future use
reserved3: '0x00000000'
# ------------------------------------===== controllerMiscOption [Optional] =====-------------------------------------
# Description: Offset: 0x00000040, Width: 32b; [0x040-0x043] Controller Misc Options, see Misc feature bit
# definitions for more details
controllerMiscOption: '0x00000000'
# -----------------------------------------===== deviceType [Optional] =====------------------------------------------
# Description: Offset: 0x00000044, Width: 8b; [0x044-0x044] Device Type: See Flash Type Definition for more details
deviceType: '0x00'
# ----------------------------------------===== sflashPadType [Optional] =====----------------------------------------
# Description: Offset: 0x00000045, Width: 8b; [0x045-0x045] Serial Flash Pad Type: 1 - Single, 2 - Dual, 4 - Quad, 8
# - Octal
sflashPadType: '0x00'
# ----------------------------------------===== serialClkFreq [Optional] =====----------------------------------------
# Description: Offset: 0x00000046, Width: 8b; [0x046-0x046] Serial Flash Frequency, device specific definitions, See
# System Boot Chapter for more details
serialClkFreq: '0x00'
# -------------------------------------===== lutCustomSeqEnable [Optional] =====--------------------------------------
# Description: Offset: 0x00000047, Width: 8b; [0x047-0x047] LUT customization Enable, it is required if the
# program/erase cannot be done using 1 LUT sequence, currently, only applicable to HyperFLASH
lutCustomSeqEnable: '0x00'
# ------------------------------------------===== reserved4 [Optional] =====------------------------------------------
# Description: Offset: 0x00000048, Width: 64b; [0x048-0x04f] Reserved for future use
reserved4: '0x0000000000000000'
# ----------------------------------------===== sflashA1Size [Optional] =====-----------------------------------------
# Description: Offset: 0x00000050, Width: 32b; [0x050-0x053] Size of Flash connected to A1
sflashA1Size: '0x00000000'
# ----------------------------------------===== sflashA2Size [Optional] =====-----------------------------------------
# Description: Offset: 0x00000054, Width: 32b; [0x054-0x057] Size of Flash connected to A2
sflashA2Size: '0x00000000'
# ----------------------------------------===== sflashB1Size [Optional] =====-----------------------------------------
# Description: Offset: 0x00000058, Width: 32b; [0x058-0x05b] Size of Flash connected to B1
sflashB1Size: '0x00000000'
# ----------------------------------------===== sflashB2Size [Optional] =====-----------------------------------------
# Description: Offset: 0x0000005C, Width: 32b; [0x05c-0x05f] Size of Flash connected to B2
sflashB2Size: '0x00000000'
# -----------------------------------===== csPadSettingOverrideEn [Optional] =====------------------------------------
# Description: Offset: 0x00000060, Width: 8b; [0x060-0x060] Set to 0 if it is not supported
csPadSettingOverrideEn: '0x00'
# ------------------------------------===== csPadSettingOverride [Optional] =====-------------------------------------
# Description: Offset: 0x00000061, Width: 8b; [0x061-0x061] Overriding pad setting of CS
csPadSettingOverride: '0x00'
# ------------------------------------------===== reserved5 [Optional] =====------------------------------------------
# Description: Offset: 0x00000062, Width: 16b; [0x062-0x063] Reserved for future use
reserved5: '0x0000'
# ----------------------------------===== sclkPadSettingOverrideEn [Optional] =====-----------------------------------
# Description: Offset: 0x00000064, Width: 8b; [0x064-0x064] Set to 0 if it is not supported
sclkPadSettingOverrideEn: '0x00'
# -----------------------------------===== sclkPadSettingOverride [Optional] =====------------------------------------
# Description: Offset: 0x00000065, Width: 8b; [0x065-0x065] Overriding pad setting of SCLK
sclkPadSettingOverride: '0x00'
# ------------------------------------------===== reserved6 [Optional] =====------------------------------------------
# Description: Offset: 0x00000066, Width: 16b; [0x066-0x067] Reserved for future use
reserved6: '0x0000'
# ----------------------------------===== dataPadSettingOverrideEn [Optional] =====-----------------------------------
# Description: Offset: 0x00000068, Width: 8b; [0x068-0x068] Set to 0 if it is not supported
dataPadSettingOverrideEn: '0x00'
# -----------------------------------===== dataPadSettingOverride [Optional] =====------------------------------------
# Description: Offset: 0x00000069, Width: 8b; [0x069-0x069] Overriding pad setting of data signals
dataPadSettingOverride: '0x00'
# ------------------------------------------===== reserved7 [Optional] =====------------------------------------------
# Description: Offset: 0x0000006A, Width: 16b; [0x06a-0x06b] Reserved for future use
reserved7: '0x0000'
# -----------------------------------===== dqsPadSettingOverrideEn [Optional] =====-----------------------------------
# Description: Offset: 0x0000006C, Width: 8b; [0x06c-0x06c] Set to 0 if it is not supported
dqsPadSettingOverrideEn: '0x00'
# ------------------------------------===== dqsPadSettingOverride [Optional] =====------------------------------------
# Description: Offset: 0x0000006D, Width: 8b; [0x06d-0x06d] Overriding pad setting of DQS
dqsPadSettingOverride: '0x00'
# ------------------------------------------===== reserved8 [Optional] =====------------------------------------------
# Description: Offset: 0x0000006E, Width: 16b; [0x06e-0x06f] Reserved for future use
reserved8: '0x0000'
# -----------------------------------------===== timeoutInMs [Optional] =====-----------------------------------------
# Description: Offset: 0x00000070, Width: 32b; [0x070-0x073] Timeout threshold for read status command
timeoutInMs: '0x00000000'
# ---------------------------------------===== commandInterval [Optional] =====---------------------------------------
# Description: Offset: 0x00000074, Width: 32b; [0x074-0x077] CS deselect interval between two commands
commandInterval: '0x00000000'
# ----------------------------------------===== dataValidTime [Optional] =====----------------------------------------
# Description: Offset: 0x00000078, Width: 32b; [0x078-0x07b] CLK edge to data valid time for PORT A and PORT B, in
# terms of 0.1ns
dataValidTime:
# ---------------------------------------===== dllAValidTime [Optional] =====---------------------------------------
# Description: Offset: 0b, Width: 16b, Data valid time for DLLA in terms of 0.1 ns
dllAValidTime: 0
# ---------------------------------------===== dllBValidTime [Optional] =====---------------------------------------
# Description: Offset: 16b, Width: 16b, Data valid time for DLLB in terms of 0.1 ns
dllBValidTime: 0
# -----------------------------------------===== busyOffset [Optional] =====------------------------------------------
# Description: Offset: 0x0000007C, Width: 16b; [0x07c-0x07d] Busy offset, valid value: 0-31
busyOffset: '0x0000'
# ---------------------------------------===== busyBitPolarity [Optional] =====---------------------------------------
# Description: Offset: 0x0000007E, Width: 16b; [0x07e-0x07f] Busy flag polarity, 0 - busy flag is 1 when flash device
# is busy, 1 - busy flag is 0 when flash device is busy
busyBitPolarity: '0x0000'
# -----------------------------------===== lookupTable_seq0_instr0 [Optional] =====-----------------------------------
# Description: Offset: 0x00000080, Width: 16b; Lookup table holds Flash command sequences 0, instruction 0
lookupTable_seq0_instr0:
# ------------------------------------------===== OPERAND [Optional] =====------------------------------------------
# Description: Offset: 0b, Width: 8b, Instruction operand. Its values depends on used instruction
OPERAND: 0
# -----------------------------------------===== NUM_PADS [Optional] =====------------------------------------------
# Description: Offset: 8b, Width: 2b, Number of pads used by instruction. Some instructions ignores this parameter.
# - 1PAD, (0): Single mode. One pad is used.
# - 2PAD, (1): Dual mode. Two pads are used.
# - 4PAD, (2): Quad mode. Four pads are used.
# - 8PAD, (3): Octal mode. Eight pads are used.
# Possible options: <1PAD, 2PAD, 4PAD, 8PAD>
NUM_PADS: 1PAD
# --------------------------------------===== OPERATION_CODE [Optional] =====---------------------------------------
# Description: Offset: 10b, Width: 6b, Instruction operation code.
# - STOP, (0): Stop execution and de-assert CS. Then, the next command sequence (to the same flash device) starts
# from instruction pointer 0.
# - CMD_SDR, (1): Transmit command code to Flash.
# - RADDR_SDR, (2): Transmit row address to Flash.
# - CADDR_SDR, (3): Transmit column address to Flash.
# - MODE1_SDR, (4): Transmit mode bits to Flash.
# - MODE2_SDR, (5): Transmit mode bits to Flash.
# - MODE4_SDR, (6): Transmit mode bits to Flash.
# - MODE8_SDR, (7): Transmit mode bits to Flash.
# - WRITE_SDR, (8): Transmit program data to Flash device.
# - READ_SDR, (9): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_SDR, (10): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_SDR, (11): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_SDR, (12): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_SDR, (13): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# - JMP_ON_CS, (31): Stop execution, de-assert CS and save operand[7:0] as the instruction start pointer for next
# sequence.Normally this instruction is used to support Execute-In-Place enhanced mode. See XIP enhanced mode for
# more details.This instruction is only allowed for AHB read commands. There is interrupt status bit set
# (INTR[IPCMDERR] or INTR[AHBCMDERR]) when using this instruction in IP command or AHB write command.
# - CMD_DDR, (33): Transmit command code to Flash.
# - RADDR_DDR, (34): Transmit row address to Flash.
# - CADDR_DDR, (35): Transmit column address to Flash.
# - MODE1_DDR, (36): Transmit mode bits to Flash.
# - MODE2_DDR, (37): Transmit mode bits to Flash.
# - MODE4_DDR, (38): Transmit mode bits to Flash.
# - MODE8_DDR, (39): Transmit mode bits to Flash.
# - WRITE_DDR, (40): Transmit program data to Flash device.
# - READ_DDR, (41): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_DDR, (42): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_DDR, (43): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_DDR, (44): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_DDR, (45): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# Possible options: <STOP, CMD_SDR, RADDR_SDR, CADDR_SDR, MODE1_SDR, MODE2_SDR, MODE4_SDR, MODE8_SDR, WRITE_SDR,
# READ_SDR, LEARN_SDR, DATSZ_SDR, DUMMY_SDR, DUMMY_RWDS_SDR, JMP_ON_CS, CMD_DDR, RADDR_DDR, CADDR_DDR, MODE1_DDR,
# MODE2_DDR, MODE4_DDR, MODE8_DDR, WRITE_DDR, READ_DDR, LEARN_DDR, DATSZ_DDR, DUMMY_DDR, DUMMY_RWDS_DDR>
OPERATION_CODE: STOP
lookupTable_seq0_instr1:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq0_instr2:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq0_instr3:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq0_instr4:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq0_instr5:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq0_instr6:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq0_instr7:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
# -----------------------------------===== lookupTable_seq1_instr0 [Optional] =====-----------------------------------
# Description: Offset: 0x00000090, Width: 16b; Lookup table holds Flash command sequences 1, instruction 0
lookupTable_seq1_instr0:
# ------------------------------------------===== OPERAND [Optional] =====------------------------------------------
# Description: Offset: 0b, Width: 8b, Instruction operand. Its values depends on used instruction
OPERAND: 0
# -----------------------------------------===== NUM_PADS [Optional] =====------------------------------------------
# Description: Offset: 8b, Width: 2b, Number of pads used by instruction. Some instructions ignores this parameter.
# - 1PAD, (0): Single mode. One pad is used.
# - 2PAD, (1): Dual mode. Two pads are used.
# - 4PAD, (2): Quad mode. Four pads are used.
# - 8PAD, (3): Octal mode. Eight pads are used.
# Possible options: <1PAD, 2PAD, 4PAD, 8PAD>
NUM_PADS: 1PAD
# --------------------------------------===== OPERATION_CODE [Optional] =====---------------------------------------
# Description: Offset: 10b, Width: 6b, Instruction operation code.
# - STOP, (0): Stop execution and de-assert CS. Then, the next command sequence (to the same flash device) starts
# from instruction pointer 0.
# - CMD_SDR, (1): Transmit command code to Flash.
# - RADDR_SDR, (2): Transmit row address to Flash.
# - CADDR_SDR, (3): Transmit column address to Flash.
# - MODE1_SDR, (4): Transmit mode bits to Flash.
# - MODE2_SDR, (5): Transmit mode bits to Flash.
# - MODE4_SDR, (6): Transmit mode bits to Flash.
# - MODE8_SDR, (7): Transmit mode bits to Flash.
# - WRITE_SDR, (8): Transmit program data to Flash device.
# - READ_SDR, (9): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_SDR, (10): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_SDR, (11): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_SDR, (12): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_SDR, (13): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# - JMP_ON_CS, (31): Stop execution, de-assert CS and save operand[7:0] as the instruction start pointer for next
# sequence.Normally this instruction is used to support Execute-In-Place enhanced mode. See XIP enhanced mode for
# more details.This instruction is only allowed for AHB read commands. There is interrupt status bit set
# (INTR[IPCMDERR] or INTR[AHBCMDERR]) when using this instruction in IP command or AHB write command.
# - CMD_DDR, (33): Transmit command code to Flash.
# - RADDR_DDR, (34): Transmit row address to Flash.
# - CADDR_DDR, (35): Transmit column address to Flash.
# - MODE1_DDR, (36): Transmit mode bits to Flash.
# - MODE2_DDR, (37): Transmit mode bits to Flash.
# - MODE4_DDR, (38): Transmit mode bits to Flash.
# - MODE8_DDR, (39): Transmit mode bits to Flash.
# - WRITE_DDR, (40): Transmit program data to Flash device.
# - READ_DDR, (41): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_DDR, (42): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_DDR, (43): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_DDR, (44): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_DDR, (45): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# Possible options: <STOP, CMD_SDR, RADDR_SDR, CADDR_SDR, MODE1_SDR, MODE2_SDR, MODE4_SDR, MODE8_SDR, WRITE_SDR,
# READ_SDR, LEARN_SDR, DATSZ_SDR, DUMMY_SDR, DUMMY_RWDS_SDR, JMP_ON_CS, CMD_DDR, RADDR_DDR, CADDR_DDR, MODE1_DDR,
# MODE2_DDR, MODE4_DDR, MODE8_DDR, WRITE_DDR, READ_DDR, LEARN_DDR, DATSZ_DDR, DUMMY_DDR, DUMMY_RWDS_DDR>
OPERATION_CODE: STOP
lookupTable_seq1_instr1:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq1_instr2:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq1_instr3:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq1_instr4:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq1_instr5:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq1_instr6:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq1_instr7:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
# -----------------------------------===== lookupTable_seq2_instr0 [Optional] =====-----------------------------------
# Description: Offset: 0x000000A0, Width: 16b; Lookup table holds Flash command sequences 2, instruction 0
lookupTable_seq2_instr0:
# ------------------------------------------===== OPERAND [Optional] =====------------------------------------------
# Description: Offset: 0b, Width: 8b, Instruction operand. Its values depends on used instruction
OPERAND: 0
# -----------------------------------------===== NUM_PADS [Optional] =====------------------------------------------
# Description: Offset: 8b, Width: 2b, Number of pads used by instruction. Some instructions ignores this parameter.
# - 1PAD, (0): Single mode. One pad is used.
# - 2PAD, (1): Dual mode. Two pads are used.
# - 4PAD, (2): Quad mode. Four pads are used.
# - 8PAD, (3): Octal mode. Eight pads are used.
# Possible options: <1PAD, 2PAD, 4PAD, 8PAD>
NUM_PADS: 1PAD
# --------------------------------------===== OPERATION_CODE [Optional] =====---------------------------------------
# Description: Offset: 10b, Width: 6b, Instruction operation code.
# - STOP, (0): Stop execution and de-assert CS. Then, the next command sequence (to the same flash device) starts
# from instruction pointer 0.
# - CMD_SDR, (1): Transmit command code to Flash.
# - RADDR_SDR, (2): Transmit row address to Flash.
# - CADDR_SDR, (3): Transmit column address to Flash.
# - MODE1_SDR, (4): Transmit mode bits to Flash.
# - MODE2_SDR, (5): Transmit mode bits to Flash.
# - MODE4_SDR, (6): Transmit mode bits to Flash.
# - MODE8_SDR, (7): Transmit mode bits to Flash.
# - WRITE_SDR, (8): Transmit program data to Flash device.
# - READ_SDR, (9): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_SDR, (10): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_SDR, (11): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_SDR, (12): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_SDR, (13): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# - JMP_ON_CS, (31): Stop execution, de-assert CS and save operand[7:0] as the instruction start pointer for next
# sequence.Normally this instruction is used to support Execute-In-Place enhanced mode. See XIP enhanced mode for
# more details.This instruction is only allowed for AHB read commands. There is interrupt status bit set
# (INTR[IPCMDERR] or INTR[AHBCMDERR]) when using this instruction in IP command or AHB write command.
# - CMD_DDR, (33): Transmit command code to Flash.
# - RADDR_DDR, (34): Transmit row address to Flash.
# - CADDR_DDR, (35): Transmit column address to Flash.
# - MODE1_DDR, (36): Transmit mode bits to Flash.
# - MODE2_DDR, (37): Transmit mode bits to Flash.
# - MODE4_DDR, (38): Transmit mode bits to Flash.
# - MODE8_DDR, (39): Transmit mode bits to Flash.
# - WRITE_DDR, (40): Transmit program data to Flash device.
# - READ_DDR, (41): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_DDR, (42): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_DDR, (43): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_DDR, (44): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_DDR, (45): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# Possible options: <STOP, CMD_SDR, RADDR_SDR, CADDR_SDR, MODE1_SDR, MODE2_SDR, MODE4_SDR, MODE8_SDR, WRITE_SDR,
# READ_SDR, LEARN_SDR, DATSZ_SDR, DUMMY_SDR, DUMMY_RWDS_SDR, JMP_ON_CS, CMD_DDR, RADDR_DDR, CADDR_DDR, MODE1_DDR,
# MODE2_DDR, MODE4_DDR, MODE8_DDR, WRITE_DDR, READ_DDR, LEARN_DDR, DATSZ_DDR, DUMMY_DDR, DUMMY_RWDS_DDR>
OPERATION_CODE: STOP
lookupTable_seq2_instr1:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq2_instr2:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq2_instr3:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq2_instr4:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq2_instr5:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq2_instr6:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq2_instr7:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
# -----------------------------------===== lookupTable_seq3_instr0 [Optional] =====-----------------------------------
# Description: Offset: 0x000000B0, Width: 16b; Lookup table holds Flash command sequences 3, instruction 0
lookupTable_seq3_instr0:
# ------------------------------------------===== OPERAND [Optional] =====------------------------------------------
# Description: Offset: 0b, Width: 8b, Instruction operand. Its values depends on used instruction
OPERAND: 0
# -----------------------------------------===== NUM_PADS [Optional] =====------------------------------------------
# Description: Offset: 8b, Width: 2b, Number of pads used by instruction. Some instructions ignores this parameter.
# - 1PAD, (0): Single mode. One pad is used.
# - 2PAD, (1): Dual mode. Two pads are used.
# - 4PAD, (2): Quad mode. Four pads are used.
# - 8PAD, (3): Octal mode. Eight pads are used.
# Possible options: <1PAD, 2PAD, 4PAD, 8PAD>
NUM_PADS: 1PAD
# --------------------------------------===== OPERATION_CODE [Optional] =====---------------------------------------
# Description: Offset: 10b, Width: 6b, Instruction operation code.
# - STOP, (0): Stop execution and de-assert CS. Then, the next command sequence (to the same flash device) starts
# from instruction pointer 0.
# - CMD_SDR, (1): Transmit command code to Flash.
# - RADDR_SDR, (2): Transmit row address to Flash.
# - CADDR_SDR, (3): Transmit column address to Flash.
# - MODE1_SDR, (4): Transmit mode bits to Flash.
# - MODE2_SDR, (5): Transmit mode bits to Flash.
# - MODE4_SDR, (6): Transmit mode bits to Flash.
# - MODE8_SDR, (7): Transmit mode bits to Flash.
# - WRITE_SDR, (8): Transmit program data to Flash device.
# - READ_SDR, (9): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_SDR, (10): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_SDR, (11): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_SDR, (12): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_SDR, (13): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# - JMP_ON_CS, (31): Stop execution, de-assert CS and save operand[7:0] as the instruction start pointer for next
# sequence.Normally this instruction is used to support Execute-In-Place enhanced mode. See XIP enhanced mode for
# more details.This instruction is only allowed for AHB read commands. There is interrupt status bit set
# (INTR[IPCMDERR] or INTR[AHBCMDERR]) when using this instruction in IP command or AHB write command.
# - CMD_DDR, (33): Transmit command code to Flash.
# - RADDR_DDR, (34): Transmit row address to Flash.
# - CADDR_DDR, (35): Transmit column address to Flash.
# - MODE1_DDR, (36): Transmit mode bits to Flash.
# - MODE2_DDR, (37): Transmit mode bits to Flash.
# - MODE4_DDR, (38): Transmit mode bits to Flash.
# - MODE8_DDR, (39): Transmit mode bits to Flash.
# - WRITE_DDR, (40): Transmit program data to Flash device.
# - READ_DDR, (41): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_DDR, (42): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_DDR, (43): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_DDR, (44): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_DDR, (45): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# Possible options: <STOP, CMD_SDR, RADDR_SDR, CADDR_SDR, MODE1_SDR, MODE2_SDR, MODE4_SDR, MODE8_SDR, WRITE_SDR,
# READ_SDR, LEARN_SDR, DATSZ_SDR, DUMMY_SDR, DUMMY_RWDS_SDR, JMP_ON_CS, CMD_DDR, RADDR_DDR, CADDR_DDR, MODE1_DDR,
# MODE2_DDR, MODE4_DDR, MODE8_DDR, WRITE_DDR, READ_DDR, LEARN_DDR, DATSZ_DDR, DUMMY_DDR, DUMMY_RWDS_DDR>
OPERATION_CODE: STOP
lookupTable_seq3_instr1:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq3_instr2:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq3_instr3:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq3_instr4:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq3_instr5:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq3_instr6:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq3_instr7:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
# -----------------------------------===== lookupTable_seq4_instr0 [Optional] =====-----------------------------------
# Description: Offset: 0x000000C0, Width: 16b; Lookup table holds Flash command sequences 4, instruction 0
lookupTable_seq4_instr0:
# ------------------------------------------===== OPERAND [Optional] =====------------------------------------------
# Description: Offset: 0b, Width: 8b, Instruction operand. Its values depends on used instruction
OPERAND: 0
# -----------------------------------------===== NUM_PADS [Optional] =====------------------------------------------
# Description: Offset: 8b, Width: 2b, Number of pads used by instruction. Some instructions ignores this parameter.
# - 1PAD, (0): Single mode. One pad is used.
# - 2PAD, (1): Dual mode. Two pads are used.
# - 4PAD, (2): Quad mode. Four pads are used.
# - 8PAD, (3): Octal mode. Eight pads are used.
# Possible options: <1PAD, 2PAD, 4PAD, 8PAD>
NUM_PADS: 1PAD
# --------------------------------------===== OPERATION_CODE [Optional] =====---------------------------------------
# Description: Offset: 10b, Width: 6b, Instruction operation code.
# - STOP, (0): Stop execution and de-assert CS. Then, the next command sequence (to the same flash device) starts
# from instruction pointer 0.
# - CMD_SDR, (1): Transmit command code to Flash.
# - RADDR_SDR, (2): Transmit row address to Flash.
# - CADDR_SDR, (3): Transmit column address to Flash.
# - MODE1_SDR, (4): Transmit mode bits to Flash.
# - MODE2_SDR, (5): Transmit mode bits to Flash.
# - MODE4_SDR, (6): Transmit mode bits to Flash.
# - MODE8_SDR, (7): Transmit mode bits to Flash.
# - WRITE_SDR, (8): Transmit program data to Flash device.
# - READ_SDR, (9): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_SDR, (10): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_SDR, (11): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_SDR, (12): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_SDR, (13): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# - JMP_ON_CS, (31): Stop execution, de-assert CS and save operand[7:0] as the instruction start pointer for next
# sequence.Normally this instruction is used to support Execute-In-Place enhanced mode. See XIP enhanced mode for
# more details.This instruction is only allowed for AHB read commands. There is interrupt status bit set
# (INTR[IPCMDERR] or INTR[AHBCMDERR]) when using this instruction in IP command or AHB write command.
# - CMD_DDR, (33): Transmit command code to Flash.
# - RADDR_DDR, (34): Transmit row address to Flash.
# - CADDR_DDR, (35): Transmit column address to Flash.
# - MODE1_DDR, (36): Transmit mode bits to Flash.
# - MODE2_DDR, (37): Transmit mode bits to Flash.
# - MODE4_DDR, (38): Transmit mode bits to Flash.
# - MODE8_DDR, (39): Transmit mode bits to Flash.
# - WRITE_DDR, (40): Transmit program data to Flash device.
# - READ_DDR, (41): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_DDR, (42): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_DDR, (43): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_DDR, (44): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_DDR, (45): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# Possible options: <STOP, CMD_SDR, RADDR_SDR, CADDR_SDR, MODE1_SDR, MODE2_SDR, MODE4_SDR, MODE8_SDR, WRITE_SDR,
# READ_SDR, LEARN_SDR, DATSZ_SDR, DUMMY_SDR, DUMMY_RWDS_SDR, JMP_ON_CS, CMD_DDR, RADDR_DDR, CADDR_DDR, MODE1_DDR,
# MODE2_DDR, MODE4_DDR, MODE8_DDR, WRITE_DDR, READ_DDR, LEARN_DDR, DATSZ_DDR, DUMMY_DDR, DUMMY_RWDS_DDR>
OPERATION_CODE: STOP
lookupTable_seq4_instr1:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq4_instr2:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq4_instr3:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq4_instr4:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq4_instr5:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq4_instr6:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq4_instr7:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
# -----------------------------------===== lookupTable_seq5_instr0 [Optional] =====-----------------------------------
# Description: Offset: 0x000000D0, Width: 16b; Lookup table holds Flash command sequences 5, instruction 0
lookupTable_seq5_instr0:
# ------------------------------------------===== OPERAND [Optional] =====------------------------------------------
# Description: Offset: 0b, Width: 8b, Instruction operand. Its values depends on used instruction
OPERAND: 0
# -----------------------------------------===== NUM_PADS [Optional] =====------------------------------------------
# Description: Offset: 8b, Width: 2b, Number of pads used by instruction. Some instructions ignores this parameter.
# - 1PAD, (0): Single mode. One pad is used.
# - 2PAD, (1): Dual mode. Two pads are used.
# - 4PAD, (2): Quad mode. Four pads are used.
# - 8PAD, (3): Octal mode. Eight pads are used.
# Possible options: <1PAD, 2PAD, 4PAD, 8PAD>
NUM_PADS: 1PAD
# --------------------------------------===== OPERATION_CODE [Optional] =====---------------------------------------
# Description: Offset: 10b, Width: 6b, Instruction operation code.
# - STOP, (0): Stop execution and de-assert CS. Then, the next command sequence (to the same flash device) starts
# from instruction pointer 0.
# - CMD_SDR, (1): Transmit command code to Flash.
# - RADDR_SDR, (2): Transmit row address to Flash.
# - CADDR_SDR, (3): Transmit column address to Flash.
# - MODE1_SDR, (4): Transmit mode bits to Flash.
# - MODE2_SDR, (5): Transmit mode bits to Flash.
# - MODE4_SDR, (6): Transmit mode bits to Flash.
# - MODE8_SDR, (7): Transmit mode bits to Flash.
# - WRITE_SDR, (8): Transmit program data to Flash device.
# - READ_SDR, (9): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_SDR, (10): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_SDR, (11): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_SDR, (12): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_SDR, (13): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# - JMP_ON_CS, (31): Stop execution, de-assert CS and save operand[7:0] as the instruction start pointer for next
# sequence.Normally this instruction is used to support Execute-In-Place enhanced mode. See XIP enhanced mode for
# more details.This instruction is only allowed for AHB read commands. There is interrupt status bit set
# (INTR[IPCMDERR] or INTR[AHBCMDERR]) when using this instruction in IP command or AHB write command.
# - CMD_DDR, (33): Transmit command code to Flash.
# - RADDR_DDR, (34): Transmit row address to Flash.
# - CADDR_DDR, (35): Transmit column address to Flash.
# - MODE1_DDR, (36): Transmit mode bits to Flash.
# - MODE2_DDR, (37): Transmit mode bits to Flash.
# - MODE4_DDR, (38): Transmit mode bits to Flash.
# - MODE8_DDR, (39): Transmit mode bits to Flash.
# - WRITE_DDR, (40): Transmit program data to Flash device.
# - READ_DDR, (41): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_DDR, (42): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_DDR, (43): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_DDR, (44): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_DDR, (45): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# Possible options: <STOP, CMD_SDR, RADDR_SDR, CADDR_SDR, MODE1_SDR, MODE2_SDR, MODE4_SDR, MODE8_SDR, WRITE_SDR,
# READ_SDR, LEARN_SDR, DATSZ_SDR, DUMMY_SDR, DUMMY_RWDS_SDR, JMP_ON_CS, CMD_DDR, RADDR_DDR, CADDR_DDR, MODE1_DDR,
# MODE2_DDR, MODE4_DDR, MODE8_DDR, WRITE_DDR, READ_DDR, LEARN_DDR, DATSZ_DDR, DUMMY_DDR, DUMMY_RWDS_DDR>
OPERATION_CODE: STOP
lookupTable_seq5_instr1:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq5_instr2:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq5_instr3:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq5_instr4:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq5_instr5:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq5_instr6:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq5_instr7:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
# -----------------------------------===== lookupTable_seq6_instr0 [Optional] =====-----------------------------------
# Description: Offset: 0x000000E0, Width: 16b; Lookup table holds Flash command sequences 6, instruction 0
lookupTable_seq6_instr0:
# ------------------------------------------===== OPERAND [Optional] =====------------------------------------------
# Description: Offset: 0b, Width: 8b, Instruction operand. Its values depends on used instruction
OPERAND: 0
# -----------------------------------------===== NUM_PADS [Optional] =====------------------------------------------
# Description: Offset: 8b, Width: 2b, Number of pads used by instruction. Some instructions ignores this parameter.
# - 1PAD, (0): Single mode. One pad is used.
# - 2PAD, (1): Dual mode. Two pads are used.
# - 4PAD, (2): Quad mode. Four pads are used.
# - 8PAD, (3): Octal mode. Eight pads are used.
# Possible options: <1PAD, 2PAD, 4PAD, 8PAD>
NUM_PADS: 1PAD
# --------------------------------------===== OPERATION_CODE [Optional] =====---------------------------------------
# Description: Offset: 10b, Width: 6b, Instruction operation code.
# - STOP, (0): Stop execution and de-assert CS. Then, the next command sequence (to the same flash device) starts
# from instruction pointer 0.
# - CMD_SDR, (1): Transmit command code to Flash.
# - RADDR_SDR, (2): Transmit row address to Flash.
# - CADDR_SDR, (3): Transmit column address to Flash.
# - MODE1_SDR, (4): Transmit mode bits to Flash.
# - MODE2_SDR, (5): Transmit mode bits to Flash.
# - MODE4_SDR, (6): Transmit mode bits to Flash.
# - MODE8_SDR, (7): Transmit mode bits to Flash.
# - WRITE_SDR, (8): Transmit program data to Flash device.
# - READ_SDR, (9): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_SDR, (10): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_SDR, (11): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_SDR, (12): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_SDR, (13): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# - JMP_ON_CS, (31): Stop execution, de-assert CS and save operand[7:0] as the instruction start pointer for next
# sequence.Normally this instruction is used to support Execute-In-Place enhanced mode. See XIP enhanced mode for
# more details.This instruction is only allowed for AHB read commands. There is interrupt status bit set
# (INTR[IPCMDERR] or INTR[AHBCMDERR]) when using this instruction in IP command or AHB write command.
# - CMD_DDR, (33): Transmit command code to Flash.
# - RADDR_DDR, (34): Transmit row address to Flash.
# - CADDR_DDR, (35): Transmit column address to Flash.
# - MODE1_DDR, (36): Transmit mode bits to Flash.
# - MODE2_DDR, (37): Transmit mode bits to Flash.
# - MODE4_DDR, (38): Transmit mode bits to Flash.
# - MODE8_DDR, (39): Transmit mode bits to Flash.
# - WRITE_DDR, (40): Transmit program data to Flash device.
# - READ_DDR, (41): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_DDR, (42): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_DDR, (43): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_DDR, (44): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_DDR, (45): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# Possible options: <STOP, CMD_SDR, RADDR_SDR, CADDR_SDR, MODE1_SDR, MODE2_SDR, MODE4_SDR, MODE8_SDR, WRITE_SDR,
# READ_SDR, LEARN_SDR, DATSZ_SDR, DUMMY_SDR, DUMMY_RWDS_SDR, JMP_ON_CS, CMD_DDR, RADDR_DDR, CADDR_DDR, MODE1_DDR,
# MODE2_DDR, MODE4_DDR, MODE8_DDR, WRITE_DDR, READ_DDR, LEARN_DDR, DATSZ_DDR, DUMMY_DDR, DUMMY_RWDS_DDR>
OPERATION_CODE: STOP
lookupTable_seq6_instr1:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq6_instr2:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq6_instr3:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq6_instr4:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq6_instr5:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq6_instr6:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq6_instr7:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
# -----------------------------------===== lookupTable_seq7_instr0 [Optional] =====-----------------------------------
# Description: Offset: 0x000000F0, Width: 16b; Lookup table holds Flash command sequences 7, instruction 0
lookupTable_seq7_instr0:
# ------------------------------------------===== OPERAND [Optional] =====------------------------------------------
# Description: Offset: 0b, Width: 8b, Instruction operand. Its values depends on used instruction
OPERAND: 0
# -----------------------------------------===== NUM_PADS [Optional] =====------------------------------------------
# Description: Offset: 8b, Width: 2b, Number of pads used by instruction. Some instructions ignores this parameter.
# - 1PAD, (0): Single mode. One pad is used.
# - 2PAD, (1): Dual mode. Two pads are used.
# - 4PAD, (2): Quad mode. Four pads are used.
# - 8PAD, (3): Octal mode. Eight pads are used.
# Possible options: <1PAD, 2PAD, 4PAD, 8PAD>
NUM_PADS: 1PAD
# --------------------------------------===== OPERATION_CODE [Optional] =====---------------------------------------
# Description: Offset: 10b, Width: 6b, Instruction operation code.
# - STOP, (0): Stop execution and de-assert CS. Then, the next command sequence (to the same flash device) starts
# from instruction pointer 0.
# - CMD_SDR, (1): Transmit command code to Flash.
# - RADDR_SDR, (2): Transmit row address to Flash.
# - CADDR_SDR, (3): Transmit column address to Flash.
# - MODE1_SDR, (4): Transmit mode bits to Flash.
# - MODE2_SDR, (5): Transmit mode bits to Flash.
# - MODE4_SDR, (6): Transmit mode bits to Flash.
# - MODE8_SDR, (7): Transmit mode bits to Flash.
# - WRITE_SDR, (8): Transmit program data to Flash device.
# - READ_SDR, (9): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_SDR, (10): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_SDR, (11): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_SDR, (12): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_SDR, (13): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# - JMP_ON_CS, (31): Stop execution, de-assert CS and save operand[7:0] as the instruction start pointer for next
# sequence.Normally this instruction is used to support Execute-In-Place enhanced mode. See XIP enhanced mode for
# more details.This instruction is only allowed for AHB read commands. There is interrupt status bit set
# (INTR[IPCMDERR] or INTR[AHBCMDERR]) when using this instruction in IP command or AHB write command.
# - CMD_DDR, (33): Transmit command code to Flash.
# - RADDR_DDR, (34): Transmit row address to Flash.
# - CADDR_DDR, (35): Transmit column address to Flash.
# - MODE1_DDR, (36): Transmit mode bits to Flash.
# - MODE2_DDR, (37): Transmit mode bits to Flash.
# - MODE4_DDR, (38): Transmit mode bits to Flash.
# - MODE8_DDR, (39): Transmit mode bits to Flash.
# - WRITE_DDR, (40): Transmit program data to Flash device.
# - READ_DDR, (41): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_DDR, (42): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_DDR, (43): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_DDR, (44): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_DDR, (45): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# Possible options: <STOP, CMD_SDR, RADDR_SDR, CADDR_SDR, MODE1_SDR, MODE2_SDR, MODE4_SDR, MODE8_SDR, WRITE_SDR,
# READ_SDR, LEARN_SDR, DATSZ_SDR, DUMMY_SDR, DUMMY_RWDS_SDR, JMP_ON_CS, CMD_DDR, RADDR_DDR, CADDR_DDR, MODE1_DDR,
# MODE2_DDR, MODE4_DDR, MODE8_DDR, WRITE_DDR, READ_DDR, LEARN_DDR, DATSZ_DDR, DUMMY_DDR, DUMMY_RWDS_DDR>
OPERATION_CODE: STOP
lookupTable_seq7_instr1:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq7_instr2:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq7_instr3:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq7_instr4:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq7_instr5:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq7_instr6:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq7_instr7:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
# -----------------------------------===== lookupTable_seq8_instr0 [Optional] =====-----------------------------------
# Description: Offset: 0x00000100, Width: 16b; Lookup table holds Flash command sequences 8, instruction 0
lookupTable_seq8_instr0:
# ------------------------------------------===== OPERAND [Optional] =====------------------------------------------
# Description: Offset: 0b, Width: 8b, Instruction operand. Its values depends on used instruction
OPERAND: 0
# -----------------------------------------===== NUM_PADS [Optional] =====------------------------------------------
# Description: Offset: 8b, Width: 2b, Number of pads used by instruction. Some instructions ignores this parameter.
# - 1PAD, (0): Single mode. One pad is used.
# - 2PAD, (1): Dual mode. Two pads are used.
# - 4PAD, (2): Quad mode. Four pads are used.
# - 8PAD, (3): Octal mode. Eight pads are used.
# Possible options: <1PAD, 2PAD, 4PAD, 8PAD>
NUM_PADS: 1PAD
# --------------------------------------===== OPERATION_CODE [Optional] =====---------------------------------------
# Description: Offset: 10b, Width: 6b, Instruction operation code.
# - STOP, (0): Stop execution and de-assert CS. Then, the next command sequence (to the same flash device) starts
# from instruction pointer 0.
# - CMD_SDR, (1): Transmit command code to Flash.
# - RADDR_SDR, (2): Transmit row address to Flash.
# - CADDR_SDR, (3): Transmit column address to Flash.
# - MODE1_SDR, (4): Transmit mode bits to Flash.
# - MODE2_SDR, (5): Transmit mode bits to Flash.
# - MODE4_SDR, (6): Transmit mode bits to Flash.
# - MODE8_SDR, (7): Transmit mode bits to Flash.
# - WRITE_SDR, (8): Transmit program data to Flash device.
# - READ_SDR, (9): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_SDR, (10): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_SDR, (11): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_SDR, (12): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_SDR, (13): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# - JMP_ON_CS, (31): Stop execution, de-assert CS and save operand[7:0] as the instruction start pointer for next
# sequence.Normally this instruction is used to support Execute-In-Place enhanced mode. See XIP enhanced mode for
# more details.This instruction is only allowed for AHB read commands. There is interrupt status bit set
# (INTR[IPCMDERR] or INTR[AHBCMDERR]) when using this instruction in IP command or AHB write command.
# - CMD_DDR, (33): Transmit command code to Flash.
# - RADDR_DDR, (34): Transmit row address to Flash.
# - CADDR_DDR, (35): Transmit column address to Flash.
# - MODE1_DDR, (36): Transmit mode bits to Flash.
# - MODE2_DDR, (37): Transmit mode bits to Flash.
# - MODE4_DDR, (38): Transmit mode bits to Flash.
# - MODE8_DDR, (39): Transmit mode bits to Flash.
# - WRITE_DDR, (40): Transmit program data to Flash device.
# - READ_DDR, (41): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_DDR, (42): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_DDR, (43): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_DDR, (44): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_DDR, (45): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# Possible options: <STOP, CMD_SDR, RADDR_SDR, CADDR_SDR, MODE1_SDR, MODE2_SDR, MODE4_SDR, MODE8_SDR, WRITE_SDR,
# READ_SDR, LEARN_SDR, DATSZ_SDR, DUMMY_SDR, DUMMY_RWDS_SDR, JMP_ON_CS, CMD_DDR, RADDR_DDR, CADDR_DDR, MODE1_DDR,
# MODE2_DDR, MODE4_DDR, MODE8_DDR, WRITE_DDR, READ_DDR, LEARN_DDR, DATSZ_DDR, DUMMY_DDR, DUMMY_RWDS_DDR>
OPERATION_CODE: STOP
lookupTable_seq8_instr1:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq8_instr2:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq8_instr3:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq8_instr4:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq8_instr5:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq8_instr6:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq8_instr7:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
# -----------------------------------===== lookupTable_seq9_instr0 [Optional] =====-----------------------------------
# Description: Offset: 0x00000110, Width: 16b; Lookup table holds Flash command sequences 9, instruction 0
lookupTable_seq9_instr0:
# ------------------------------------------===== OPERAND [Optional] =====------------------------------------------
# Description: Offset: 0b, Width: 8b, Instruction operand. Its values depends on used instruction
OPERAND: 0
# -----------------------------------------===== NUM_PADS [Optional] =====------------------------------------------
# Description: Offset: 8b, Width: 2b, Number of pads used by instruction. Some instructions ignores this parameter.
# - 1PAD, (0): Single mode. One pad is used.
# - 2PAD, (1): Dual mode. Two pads are used.
# - 4PAD, (2): Quad mode. Four pads are used.
# - 8PAD, (3): Octal mode. Eight pads are used.
# Possible options: <1PAD, 2PAD, 4PAD, 8PAD>
NUM_PADS: 1PAD
# --------------------------------------===== OPERATION_CODE [Optional] =====---------------------------------------
# Description: Offset: 10b, Width: 6b, Instruction operation code.
# - STOP, (0): Stop execution and de-assert CS. Then, the next command sequence (to the same flash device) starts
# from instruction pointer 0.
# - CMD_SDR, (1): Transmit command code to Flash.
# - RADDR_SDR, (2): Transmit row address to Flash.
# - CADDR_SDR, (3): Transmit column address to Flash.
# - MODE1_SDR, (4): Transmit mode bits to Flash.
# - MODE2_SDR, (5): Transmit mode bits to Flash.
# - MODE4_SDR, (6): Transmit mode bits to Flash.
# - MODE8_SDR, (7): Transmit mode bits to Flash.
# - WRITE_SDR, (8): Transmit program data to Flash device.
# - READ_SDR, (9): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_SDR, (10): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_SDR, (11): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_SDR, (12): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_SDR, (13): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# - JMP_ON_CS, (31): Stop execution, de-assert CS and save operand[7:0] as the instruction start pointer for next
# sequence.Normally this instruction is used to support Execute-In-Place enhanced mode. See XIP enhanced mode for
# more details.This instruction is only allowed for AHB read commands. There is interrupt status bit set
# (INTR[IPCMDERR] or INTR[AHBCMDERR]) when using this instruction in IP command or AHB write command.
# - CMD_DDR, (33): Transmit command code to Flash.
# - RADDR_DDR, (34): Transmit row address to Flash.
# - CADDR_DDR, (35): Transmit column address to Flash.
# - MODE1_DDR, (36): Transmit mode bits to Flash.
# - MODE2_DDR, (37): Transmit mode bits to Flash.
# - MODE4_DDR, (38): Transmit mode bits to Flash.
# - MODE8_DDR, (39): Transmit mode bits to Flash.
# - WRITE_DDR, (40): Transmit program data to Flash device.
# - READ_DDR, (41): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_DDR, (42): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_DDR, (43): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_DDR, (44): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_DDR, (45): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# Possible options: <STOP, CMD_SDR, RADDR_SDR, CADDR_SDR, MODE1_SDR, MODE2_SDR, MODE4_SDR, MODE8_SDR, WRITE_SDR,
# READ_SDR, LEARN_SDR, DATSZ_SDR, DUMMY_SDR, DUMMY_RWDS_SDR, JMP_ON_CS, CMD_DDR, RADDR_DDR, CADDR_DDR, MODE1_DDR,
# MODE2_DDR, MODE4_DDR, MODE8_DDR, WRITE_DDR, READ_DDR, LEARN_DDR, DATSZ_DDR, DUMMY_DDR, DUMMY_RWDS_DDR>
OPERATION_CODE: STOP
lookupTable_seq9_instr1:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq9_instr2:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq9_instr3:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq9_instr4:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq9_instr5:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq9_instr6:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq9_instr7:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
# ----------------------------------===== lookupTable_seq10_instr0 [Optional] =====-----------------------------------
# Description: Offset: 0x00000120, Width: 16b; Lookup table holds Flash command sequences 10, instruction 0
lookupTable_seq10_instr0:
# ------------------------------------------===== OPERAND [Optional] =====------------------------------------------
# Description: Offset: 0b, Width: 8b, Instruction operand. Its values depends on used instruction
OPERAND: 0
# -----------------------------------------===== NUM_PADS [Optional] =====------------------------------------------
# Description: Offset: 8b, Width: 2b, Number of pads used by instruction. Some instructions ignores this parameter.
# - 1PAD, (0): Single mode. One pad is used.
# - 2PAD, (1): Dual mode. Two pads are used.
# - 4PAD, (2): Quad mode. Four pads are used.
# - 8PAD, (3): Octal mode. Eight pads are used.
# Possible options: <1PAD, 2PAD, 4PAD, 8PAD>
NUM_PADS: 1PAD
# --------------------------------------===== OPERATION_CODE [Optional] =====---------------------------------------
# Description: Offset: 10b, Width: 6b, Instruction operation code.
# - STOP, (0): Stop execution and de-assert CS. Then, the next command sequence (to the same flash device) starts
# from instruction pointer 0.
# - CMD_SDR, (1): Transmit command code to Flash.
# - RADDR_SDR, (2): Transmit row address to Flash.
# - CADDR_SDR, (3): Transmit column address to Flash.
# - MODE1_SDR, (4): Transmit mode bits to Flash.
# - MODE2_SDR, (5): Transmit mode bits to Flash.
# - MODE4_SDR, (6): Transmit mode bits to Flash.
# - MODE8_SDR, (7): Transmit mode bits to Flash.
# - WRITE_SDR, (8): Transmit program data to Flash device.
# - READ_SDR, (9): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_SDR, (10): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_SDR, (11): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_SDR, (12): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_SDR, (13): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# - JMP_ON_CS, (31): Stop execution, de-assert CS and save operand[7:0] as the instruction start pointer for next
# sequence.Normally this instruction is used to support Execute-In-Place enhanced mode. See XIP enhanced mode for
# more details.This instruction is only allowed for AHB read commands. There is interrupt status bit set
# (INTR[IPCMDERR] or INTR[AHBCMDERR]) when using this instruction in IP command or AHB write command.
# - CMD_DDR, (33): Transmit command code to Flash.
# - RADDR_DDR, (34): Transmit row address to Flash.
# - CADDR_DDR, (35): Transmit column address to Flash.
# - MODE1_DDR, (36): Transmit mode bits to Flash.
# - MODE2_DDR, (37): Transmit mode bits to Flash.
# - MODE4_DDR, (38): Transmit mode bits to Flash.
# - MODE8_DDR, (39): Transmit mode bits to Flash.
# - WRITE_DDR, (40): Transmit program data to Flash device.
# - READ_DDR, (41): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_DDR, (42): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_DDR, (43): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_DDR, (44): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_DDR, (45): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# Possible options: <STOP, CMD_SDR, RADDR_SDR, CADDR_SDR, MODE1_SDR, MODE2_SDR, MODE4_SDR, MODE8_SDR, WRITE_SDR,
# READ_SDR, LEARN_SDR, DATSZ_SDR, DUMMY_SDR, DUMMY_RWDS_SDR, JMP_ON_CS, CMD_DDR, RADDR_DDR, CADDR_DDR, MODE1_DDR,
# MODE2_DDR, MODE4_DDR, MODE8_DDR, WRITE_DDR, READ_DDR, LEARN_DDR, DATSZ_DDR, DUMMY_DDR, DUMMY_RWDS_DDR>
OPERATION_CODE: STOP
lookupTable_seq10_instr1:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq10_instr2:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq10_instr3:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq10_instr4:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq10_instr5:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq10_instr6:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq10_instr7:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
# ----------------------------------===== lookupTable_seq11_instr0 [Optional] =====-----------------------------------
# Description: Offset: 0x00000130, Width: 16b; Lookup table holds Flash command sequences 11, instruction 0
lookupTable_seq11_instr0:
# ------------------------------------------===== OPERAND [Optional] =====------------------------------------------
# Description: Offset: 0b, Width: 8b, Instruction operand. Its values depends on used instruction
OPERAND: 0
# -----------------------------------------===== NUM_PADS [Optional] =====------------------------------------------
# Description: Offset: 8b, Width: 2b, Number of pads used by instruction. Some instructions ignores this parameter.
# - 1PAD, (0): Single mode. One pad is used.
# - 2PAD, (1): Dual mode. Two pads are used.
# - 4PAD, (2): Quad mode. Four pads are used.
# - 8PAD, (3): Octal mode. Eight pads are used.
# Possible options: <1PAD, 2PAD, 4PAD, 8PAD>
NUM_PADS: 1PAD
# --------------------------------------===== OPERATION_CODE [Optional] =====---------------------------------------
# Description: Offset: 10b, Width: 6b, Instruction operation code.
# - STOP, (0): Stop execution and de-assert CS. Then, the next command sequence (to the same flash device) starts
# from instruction pointer 0.
# - CMD_SDR, (1): Transmit command code to Flash.
# - RADDR_SDR, (2): Transmit row address to Flash.
# - CADDR_SDR, (3): Transmit column address to Flash.
# - MODE1_SDR, (4): Transmit mode bits to Flash.
# - MODE2_SDR, (5): Transmit mode bits to Flash.
# - MODE4_SDR, (6): Transmit mode bits to Flash.
# - MODE8_SDR, (7): Transmit mode bits to Flash.
# - WRITE_SDR, (8): Transmit program data to Flash device.
# - READ_SDR, (9): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_SDR, (10): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_SDR, (11): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_SDR, (12): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_SDR, (13): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# - JMP_ON_CS, (31): Stop execution, de-assert CS and save operand[7:0] as the instruction start pointer for next
# sequence.Normally this instruction is used to support Execute-In-Place enhanced mode. See XIP enhanced mode for
# more details.This instruction is only allowed for AHB read commands. There is interrupt status bit set
# (INTR[IPCMDERR] or INTR[AHBCMDERR]) when using this instruction in IP command or AHB write command.
# - CMD_DDR, (33): Transmit command code to Flash.
# - RADDR_DDR, (34): Transmit row address to Flash.
# - CADDR_DDR, (35): Transmit column address to Flash.
# - MODE1_DDR, (36): Transmit mode bits to Flash.
# - MODE2_DDR, (37): Transmit mode bits to Flash.
# - MODE4_DDR, (38): Transmit mode bits to Flash.
# - MODE8_DDR, (39): Transmit mode bits to Flash.
# - WRITE_DDR, (40): Transmit program data to Flash device.
# - READ_DDR, (41): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_DDR, (42): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_DDR, (43): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_DDR, (44): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_DDR, (45): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# Possible options: <STOP, CMD_SDR, RADDR_SDR, CADDR_SDR, MODE1_SDR, MODE2_SDR, MODE4_SDR, MODE8_SDR, WRITE_SDR,
# READ_SDR, LEARN_SDR, DATSZ_SDR, DUMMY_SDR, DUMMY_RWDS_SDR, JMP_ON_CS, CMD_DDR, RADDR_DDR, CADDR_DDR, MODE1_DDR,
# MODE2_DDR, MODE4_DDR, MODE8_DDR, WRITE_DDR, READ_DDR, LEARN_DDR, DATSZ_DDR, DUMMY_DDR, DUMMY_RWDS_DDR>
OPERATION_CODE: STOP
lookupTable_seq11_instr1:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq11_instr2:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq11_instr3:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq11_instr4:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq11_instr5:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq11_instr6:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq11_instr7:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
# ----------------------------------===== lookupTable_seq12_instr0 [Optional] =====-----------------------------------
# Description: Offset: 0x00000140, Width: 16b; Lookup table holds Flash command sequences 12, instruction 0
lookupTable_seq12_instr0:
# ------------------------------------------===== OPERAND [Optional] =====------------------------------------------
# Description: Offset: 0b, Width: 8b, Instruction operand. Its values depends on used instruction
OPERAND: 0
# -----------------------------------------===== NUM_PADS [Optional] =====------------------------------------------
# Description: Offset: 8b, Width: 2b, Number of pads used by instruction. Some instructions ignores this parameter.
# - 1PAD, (0): Single mode. One pad is used.
# - 2PAD, (1): Dual mode. Two pads are used.
# - 4PAD, (2): Quad mode. Four pads are used.
# - 8PAD, (3): Octal mode. Eight pads are used.
# Possible options: <1PAD, 2PAD, 4PAD, 8PAD>
NUM_PADS: 1PAD
# --------------------------------------===== OPERATION_CODE [Optional] =====---------------------------------------
# Description: Offset: 10b, Width: 6b, Instruction operation code.
# - STOP, (0): Stop execution and de-assert CS. Then, the next command sequence (to the same flash device) starts
# from instruction pointer 0.
# - CMD_SDR, (1): Transmit command code to Flash.
# - RADDR_SDR, (2): Transmit row address to Flash.
# - CADDR_SDR, (3): Transmit column address to Flash.
# - MODE1_SDR, (4): Transmit mode bits to Flash.
# - MODE2_SDR, (5): Transmit mode bits to Flash.
# - MODE4_SDR, (6): Transmit mode bits to Flash.
# - MODE8_SDR, (7): Transmit mode bits to Flash.
# - WRITE_SDR, (8): Transmit program data to Flash device.
# - READ_SDR, (9): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_SDR, (10): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_SDR, (11): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_SDR, (12): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_SDR, (13): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# - JMP_ON_CS, (31): Stop execution, de-assert CS and save operand[7:0] as the instruction start pointer for next
# sequence.Normally this instruction is used to support Execute-In-Place enhanced mode. See XIP enhanced mode for
# more details.This instruction is only allowed for AHB read commands. There is interrupt status bit set
# (INTR[IPCMDERR] or INTR[AHBCMDERR]) when using this instruction in IP command or AHB write command.
# - CMD_DDR, (33): Transmit command code to Flash.
# - RADDR_DDR, (34): Transmit row address to Flash.
# - CADDR_DDR, (35): Transmit column address to Flash.
# - MODE1_DDR, (36): Transmit mode bits to Flash.
# - MODE2_DDR, (37): Transmit mode bits to Flash.
# - MODE4_DDR, (38): Transmit mode bits to Flash.
# - MODE8_DDR, (39): Transmit mode bits to Flash.
# - WRITE_DDR, (40): Transmit program data to Flash device.
# - READ_DDR, (41): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_DDR, (42): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_DDR, (43): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_DDR, (44): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_DDR, (45): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# Possible options: <STOP, CMD_SDR, RADDR_SDR, CADDR_SDR, MODE1_SDR, MODE2_SDR, MODE4_SDR, MODE8_SDR, WRITE_SDR,
# READ_SDR, LEARN_SDR, DATSZ_SDR, DUMMY_SDR, DUMMY_RWDS_SDR, JMP_ON_CS, CMD_DDR, RADDR_DDR, CADDR_DDR, MODE1_DDR,
# MODE2_DDR, MODE4_DDR, MODE8_DDR, WRITE_DDR, READ_DDR, LEARN_DDR, DATSZ_DDR, DUMMY_DDR, DUMMY_RWDS_DDR>
OPERATION_CODE: STOP
lookupTable_seq12_instr1:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq12_instr2:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq12_instr3:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq12_instr4:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq12_instr5:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq12_instr6:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq12_instr7:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
# ----------------------------------===== lookupTable_seq13_instr0 [Optional] =====-----------------------------------
# Description: Offset: 0x00000150, Width: 16b; Lookup table holds Flash command sequences 13, instruction 0
lookupTable_seq13_instr0:
# ------------------------------------------===== OPERAND [Optional] =====------------------------------------------
# Description: Offset: 0b, Width: 8b, Instruction operand. Its values depends on used instruction
OPERAND: 0
# -----------------------------------------===== NUM_PADS [Optional] =====------------------------------------------
# Description: Offset: 8b, Width: 2b, Number of pads used by instruction. Some instructions ignores this parameter.
# - 1PAD, (0): Single mode. One pad is used.
# - 2PAD, (1): Dual mode. Two pads are used.
# - 4PAD, (2): Quad mode. Four pads are used.
# - 8PAD, (3): Octal mode. Eight pads are used.
# Possible options: <1PAD, 2PAD, 4PAD, 8PAD>
NUM_PADS: 1PAD
# --------------------------------------===== OPERATION_CODE [Optional] =====---------------------------------------
# Description: Offset: 10b, Width: 6b, Instruction operation code.
# - STOP, (0): Stop execution and de-assert CS. Then, the next command sequence (to the same flash device) starts
# from instruction pointer 0.
# - CMD_SDR, (1): Transmit command code to Flash.
# - RADDR_SDR, (2): Transmit row address to Flash.
# - CADDR_SDR, (3): Transmit column address to Flash.
# - MODE1_SDR, (4): Transmit mode bits to Flash.
# - MODE2_SDR, (5): Transmit mode bits to Flash.
# - MODE4_SDR, (6): Transmit mode bits to Flash.
# - MODE8_SDR, (7): Transmit mode bits to Flash.
# - WRITE_SDR, (8): Transmit program data to Flash device.
# - READ_SDR, (9): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_SDR, (10): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_SDR, (11): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_SDR, (12): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_SDR, (13): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# - JMP_ON_CS, (31): Stop execution, de-assert CS and save operand[7:0] as the instruction start pointer for next
# sequence.Normally this instruction is used to support Execute-In-Place enhanced mode. See XIP enhanced mode for
# more details.This instruction is only allowed for AHB read commands. There is interrupt status bit set
# (INTR[IPCMDERR] or INTR[AHBCMDERR]) when using this instruction in IP command or AHB write command.
# - CMD_DDR, (33): Transmit command code to Flash.
# - RADDR_DDR, (34): Transmit row address to Flash.
# - CADDR_DDR, (35): Transmit column address to Flash.
# - MODE1_DDR, (36): Transmit mode bits to Flash.
# - MODE2_DDR, (37): Transmit mode bits to Flash.
# - MODE4_DDR, (38): Transmit mode bits to Flash.
# - MODE8_DDR, (39): Transmit mode bits to Flash.
# - WRITE_DDR, (40): Transmit program data to Flash device.
# - READ_DDR, (41): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_DDR, (42): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_DDR, (43): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_DDR, (44): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_DDR, (45): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# Possible options: <STOP, CMD_SDR, RADDR_SDR, CADDR_SDR, MODE1_SDR, MODE2_SDR, MODE4_SDR, MODE8_SDR, WRITE_SDR,
# READ_SDR, LEARN_SDR, DATSZ_SDR, DUMMY_SDR, DUMMY_RWDS_SDR, JMP_ON_CS, CMD_DDR, RADDR_DDR, CADDR_DDR, MODE1_DDR,
# MODE2_DDR, MODE4_DDR, MODE8_DDR, WRITE_DDR, READ_DDR, LEARN_DDR, DATSZ_DDR, DUMMY_DDR, DUMMY_RWDS_DDR>
OPERATION_CODE: STOP
lookupTable_seq13_instr1:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq13_instr2:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq13_instr3:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq13_instr4:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq13_instr5:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq13_instr6:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq13_instr7:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
# ----------------------------------===== lookupTable_seq14_instr0 [Optional] =====-----------------------------------
# Description: Offset: 0x00000160, Width: 16b; Lookup table holds Flash command sequences 14, instruction 0
lookupTable_seq14_instr0:
# ------------------------------------------===== OPERAND [Optional] =====------------------------------------------
# Description: Offset: 0b, Width: 8b, Instruction operand. Its values depends on used instruction
OPERAND: 0
# -----------------------------------------===== NUM_PADS [Optional] =====------------------------------------------
# Description: Offset: 8b, Width: 2b, Number of pads used by instruction. Some instructions ignores this parameter.
# - 1PAD, (0): Single mode. One pad is used.
# - 2PAD, (1): Dual mode. Two pads are used.
# - 4PAD, (2): Quad mode. Four pads are used.
# - 8PAD, (3): Octal mode. Eight pads are used.
# Possible options: <1PAD, 2PAD, 4PAD, 8PAD>
NUM_PADS: 1PAD
# --------------------------------------===== OPERATION_CODE [Optional] =====---------------------------------------
# Description: Offset: 10b, Width: 6b, Instruction operation code.
# - STOP, (0): Stop execution and de-assert CS. Then, the next command sequence (to the same flash device) starts
# from instruction pointer 0.
# - CMD_SDR, (1): Transmit command code to Flash.
# - RADDR_SDR, (2): Transmit row address to Flash.
# - CADDR_SDR, (3): Transmit column address to Flash.
# - MODE1_SDR, (4): Transmit mode bits to Flash.
# - MODE2_SDR, (5): Transmit mode bits to Flash.
# - MODE4_SDR, (6): Transmit mode bits to Flash.
# - MODE8_SDR, (7): Transmit mode bits to Flash.
# - WRITE_SDR, (8): Transmit program data to Flash device.
# - READ_SDR, (9): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_SDR, (10): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_SDR, (11): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_SDR, (12): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_SDR, (13): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# - JMP_ON_CS, (31): Stop execution, de-assert CS and save operand[7:0] as the instruction start pointer for next
# sequence.Normally this instruction is used to support Execute-In-Place enhanced mode. See XIP enhanced mode for
# more details.This instruction is only allowed for AHB read commands. There is interrupt status bit set
# (INTR[IPCMDERR] or INTR[AHBCMDERR]) when using this instruction in IP command or AHB write command.
# - CMD_DDR, (33): Transmit command code to Flash.
# - RADDR_DDR, (34): Transmit row address to Flash.
# - CADDR_DDR, (35): Transmit column address to Flash.
# - MODE1_DDR, (36): Transmit mode bits to Flash.
# - MODE2_DDR, (37): Transmit mode bits to Flash.
# - MODE4_DDR, (38): Transmit mode bits to Flash.
# - MODE8_DDR, (39): Transmit mode bits to Flash.
# - WRITE_DDR, (40): Transmit program data to Flash device.
# - READ_DDR, (41): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_DDR, (42): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_DDR, (43): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_DDR, (44): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_DDR, (45): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# Possible options: <STOP, CMD_SDR, RADDR_SDR, CADDR_SDR, MODE1_SDR, MODE2_SDR, MODE4_SDR, MODE8_SDR, WRITE_SDR,
# READ_SDR, LEARN_SDR, DATSZ_SDR, DUMMY_SDR, DUMMY_RWDS_SDR, JMP_ON_CS, CMD_DDR, RADDR_DDR, CADDR_DDR, MODE1_DDR,
# MODE2_DDR, MODE4_DDR, MODE8_DDR, WRITE_DDR, READ_DDR, LEARN_DDR, DATSZ_DDR, DUMMY_DDR, DUMMY_RWDS_DDR>
OPERATION_CODE: STOP
lookupTable_seq14_instr1:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq14_instr2:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq14_instr3:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq14_instr4:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq14_instr5:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq14_instr6:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq14_instr7:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
# ----------------------------------===== lookupTable_seq15_instr0 [Optional] =====-----------------------------------
# Description: Offset: 0x00000170, Width: 16b; Lookup table holds Flash command sequences 15, instruction 0
lookupTable_seq15_instr0:
# ------------------------------------------===== OPERAND [Optional] =====------------------------------------------
# Description: Offset: 0b, Width: 8b, Instruction operand. Its values depends on used instruction
OPERAND: 0
# -----------------------------------------===== NUM_PADS [Optional] =====------------------------------------------
# Description: Offset: 8b, Width: 2b, Number of pads used by instruction. Some instructions ignores this parameter.
# - 1PAD, (0): Single mode. One pad is used.
# - 2PAD, (1): Dual mode. Two pads are used.
# - 4PAD, (2): Quad mode. Four pads are used.
# - 8PAD, (3): Octal mode. Eight pads are used.
# Possible options: <1PAD, 2PAD, 4PAD, 8PAD>
NUM_PADS: 1PAD
# --------------------------------------===== OPERATION_CODE [Optional] =====---------------------------------------
# Description: Offset: 10b, Width: 6b, Instruction operation code.
# - STOP, (0): Stop execution and de-assert CS. Then, the next command sequence (to the same flash device) starts
# from instruction pointer 0.
# - CMD_SDR, (1): Transmit command code to Flash.
# - RADDR_SDR, (2): Transmit row address to Flash.
# - CADDR_SDR, (3): Transmit column address to Flash.
# - MODE1_SDR, (4): Transmit mode bits to Flash.
# - MODE2_SDR, (5): Transmit mode bits to Flash.
# - MODE4_SDR, (6): Transmit mode bits to Flash.
# - MODE8_SDR, (7): Transmit mode bits to Flash.
# - WRITE_SDR, (8): Transmit program data to Flash device.
# - READ_SDR, (9): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_SDR, (10): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_SDR, (11): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_SDR, (12): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_SDR, (13): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# - JMP_ON_CS, (31): Stop execution, de-assert CS and save operand[7:0] as the instruction start pointer for next
# sequence.Normally this instruction is used to support Execute-In-Place enhanced mode. See XIP enhanced mode for
# more details.This instruction is only allowed for AHB read commands. There is interrupt status bit set
# (INTR[IPCMDERR] or INTR[AHBCMDERR]) when using this instruction in IP command or AHB write command.
# - CMD_DDR, (33): Transmit command code to Flash.
# - RADDR_DDR, (34): Transmit row address to Flash.
# - CADDR_DDR, (35): Transmit column address to Flash.
# - MODE1_DDR, (36): Transmit mode bits to Flash.
# - MODE2_DDR, (37): Transmit mode bits to Flash.
# - MODE4_DDR, (38): Transmit mode bits to Flash.
# - MODE8_DDR, (39): Transmit mode bits to Flash.
# - WRITE_DDR, (40): Transmit program data to Flash device.
# - READ_DDR, (41): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_DDR, (42): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_DDR, (43): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_DDR, (44): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_DDR, (45): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# Possible options: <STOP, CMD_SDR, RADDR_SDR, CADDR_SDR, MODE1_SDR, MODE2_SDR, MODE4_SDR, MODE8_SDR, WRITE_SDR,
# READ_SDR, LEARN_SDR, DATSZ_SDR, DUMMY_SDR, DUMMY_RWDS_SDR, JMP_ON_CS, CMD_DDR, RADDR_DDR, CADDR_DDR, MODE1_DDR,
# MODE2_DDR, MODE4_DDR, MODE8_DDR, WRITE_DDR, READ_DDR, LEARN_DDR, DATSZ_DDR, DUMMY_DDR, DUMMY_RWDS_DDR>
OPERATION_CODE: STOP
lookupTable_seq15_instr1:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq15_instr2:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq15_instr3:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq15_instr4:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq15_instr5:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq15_instr6:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq15_instr7:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
# ---------------------------------------===== lutCustomSeq_0 [Optional] =====----------------------------------------
# Description: Offset: 0x00000180, Width: 32b; [0x180-0x1af] Customizable LUT Sequences
lutCustomSeq_0:
# ------------------------------------------===== seqNum [Optional] =====-------------------------------------------
# Description: Offset: 0b, Width: 8b, Sequence Number, valid number: 1-16
seqNum: 0
# -------------------------------------------===== seqId [Optional] =====-------------------------------------------
# Description: Offset: 8b, Width: 8b, Sequence Index, valid number: 0-15
seqId: 0
# -----------------------------------------===== reserved [Optional] =====------------------------------------------
# Description: Offset: 16b, Width: 16b, N/A
reserved: 0
# ---------------------------------------===== lutCustomSeq_1 [Optional] =====----------------------------------------
# Description: Offset: 0x00000184, Width: 32b; [0x180-0x1af] Customizable LUT Sequences
lutCustomSeq_1:
# ------------------------------------------===== seqNum [Optional] =====-------------------------------------------
# Description: Offset: 0b, Width: 8b, Sequence Number, valid number: 1-16
seqNum: 0
# -------------------------------------------===== seqId [Optional] =====-------------------------------------------
# Description: Offset: 8b, Width: 8b, Sequence Index, valid number: 0-15
seqId: 0
# -----------------------------------------===== reserved [Optional] =====------------------------------------------
# Description: Offset: 16b, Width: 16b, N/A
reserved: 0
# ---------------------------------------===== lutCustomSeq_2 [Optional] =====----------------------------------------
# Description: Offset: 0x00000188, Width: 32b; [0x180-0x1af] Customizable LUT Sequences
lutCustomSeq_2:
# ------------------------------------------===== seqNum [Optional] =====-------------------------------------------
# Description: Offset: 0b, Width: 8b, Sequence Number, valid number: 1-16
seqNum: 0
# -------------------------------------------===== seqId [Optional] =====-------------------------------------------
# Description: Offset: 8b, Width: 8b, Sequence Index, valid number: 0-15
seqId: 0
# -----------------------------------------===== reserved [Optional] =====------------------------------------------
# Description: Offset: 16b, Width: 16b, N/A
reserved: 0
# ---------------------------------------===== lutCustomSeq_3 [Optional] =====----------------------------------------
# Description: Offset: 0x0000018C, Width: 32b; [0x180-0x1af] Customizable LUT Sequences
lutCustomSeq_3:
# ------------------------------------------===== seqNum [Optional] =====-------------------------------------------
# Description: Offset: 0b, Width: 8b, Sequence Number, valid number: 1-16
seqNum: 0
# -------------------------------------------===== seqId [Optional] =====-------------------------------------------
# Description: Offset: 8b, Width: 8b, Sequence Index, valid number: 0-15
seqId: 0
# -----------------------------------------===== reserved [Optional] =====------------------------------------------
# Description: Offset: 16b, Width: 16b, N/A
reserved: 0
# ---------------------------------------===== lutCustomSeq_4 [Optional] =====----------------------------------------
# Description: Offset: 0x00000190, Width: 32b; [0x180-0x1af] Customizable LUT Sequences
lutCustomSeq_4:
# ------------------------------------------===== seqNum [Optional] =====-------------------------------------------
# Description: Offset: 0b, Width: 8b, Sequence Number, valid number: 1-16
seqNum: 0
# -------------------------------------------===== seqId [Optional] =====-------------------------------------------
# Description: Offset: 8b, Width: 8b, Sequence Index, valid number: 0-15
seqId: 0
# -----------------------------------------===== reserved [Optional] =====------------------------------------------
# Description: Offset: 16b, Width: 16b, N/A
reserved: 0
# ---------------------------------------===== lutCustomSeq_5 [Optional] =====----------------------------------------
# Description: Offset: 0x00000194, Width: 32b; [0x180-0x1af] Customizable LUT Sequences
lutCustomSeq_5:
# ------------------------------------------===== seqNum [Optional] =====-------------------------------------------
# Description: Offset: 0b, Width: 8b, Sequence Number, valid number: 1-16
seqNum: 0
# -------------------------------------------===== seqId [Optional] =====-------------------------------------------
# Description: Offset: 8b, Width: 8b, Sequence Index, valid number: 0-15
seqId: 0
# -----------------------------------------===== reserved [Optional] =====------------------------------------------
# Description: Offset: 16b, Width: 16b, N/A
reserved: 0
# ---------------------------------------===== lutCustomSeq_6 [Optional] =====----------------------------------------
# Description: Offset: 0x00000198, Width: 32b; [0x180-0x1af] Customizable LUT Sequences
lutCustomSeq_6:
# ------------------------------------------===== seqNum [Optional] =====-------------------------------------------
# Description: Offset: 0b, Width: 8b, Sequence Number, valid number: 1-16
seqNum: 0
# -------------------------------------------===== seqId [Optional] =====-------------------------------------------
# Description: Offset: 8b, Width: 8b, Sequence Index, valid number: 0-15
seqId: 0
# -----------------------------------------===== reserved [Optional] =====------------------------------------------
# Description: Offset: 16b, Width: 16b, N/A
reserved: 0
# ---------------------------------------===== lutCustomSeq_7 [Optional] =====----------------------------------------
# Description: Offset: 0x0000019C, Width: 32b; [0x180-0x1af] Customizable LUT Sequences
lutCustomSeq_7:
# ------------------------------------------===== seqNum [Optional] =====-------------------------------------------
# Description: Offset: 0b, Width: 8b, Sequence Number, valid number: 1-16
seqNum: 0
# -------------------------------------------===== seqId [Optional] =====-------------------------------------------
# Description: Offset: 8b, Width: 8b, Sequence Index, valid number: 0-15
seqId: 0
# -----------------------------------------===== reserved [Optional] =====------------------------------------------
# Description: Offset: 16b, Width: 16b, N/A
reserved: 0
# ---------------------------------------===== lutCustomSeq_8 [Optional] =====----------------------------------------
# Description: Offset: 0x000001A0, Width: 32b; [0x180-0x1af] Customizable LUT Sequences
lutCustomSeq_8:
# ------------------------------------------===== seqNum [Optional] =====-------------------------------------------
# Description: Offset: 0b, Width: 8b, Sequence Number, valid number: 1-16
seqNum: 0
# -------------------------------------------===== seqId [Optional] =====-------------------------------------------
# Description: Offset: 8b, Width: 8b, Sequence Index, valid number: 0-15
seqId: 0
# -----------------------------------------===== reserved [Optional] =====------------------------------------------
# Description: Offset: 16b, Width: 16b, N/A
reserved: 0
# ---------------------------------------===== lutCustomSeq_9 [Optional] =====----------------------------------------
# Description: Offset: 0x000001A4, Width: 32b; [0x180-0x1af] Customizable LUT Sequences
lutCustomSeq_9:
# ------------------------------------------===== seqNum [Optional] =====-------------------------------------------
# Description: Offset: 0b, Width: 8b, Sequence Number, valid number: 1-16
seqNum: 0
# -------------------------------------------===== seqId [Optional] =====-------------------------------------------
# Description: Offset: 8b, Width: 8b, Sequence Index, valid number: 0-15
seqId: 0
# -----------------------------------------===== reserved [Optional] =====------------------------------------------
# Description: Offset: 16b, Width: 16b, N/A
reserved: 0
# ---------------------------------------===== lutCustomSeq_10 [Optional] =====---------------------------------------
# Description: Offset: 0x000001A8, Width: 32b; [0x180-0x1af] Customizable LUT Sequences
lutCustomSeq_10:
# ------------------------------------------===== seqNum [Optional] =====-------------------------------------------
# Description: Offset: 0b, Width: 8b, Sequence Number, valid number: 1-16
seqNum: 0
# -------------------------------------------===== seqId [Optional] =====-------------------------------------------
# Description: Offset: 8b, Width: 8b, Sequence Index, valid number: 0-15
seqId: 0
# -----------------------------------------===== reserved [Optional] =====------------------------------------------
# Description: Offset: 16b, Width: 16b, N/A
reserved: 0
# ---------------------------------------===== lutCustomSeq_11 [Optional] =====---------------------------------------
# Description: Offset: 0x000001AC, Width: 32b; [0x180-0x1af] Customizable LUT Sequences
lutCustomSeq_11:
# ------------------------------------------===== seqNum [Optional] =====-------------------------------------------
# Description: Offset: 0b, Width: 8b, Sequence Number, valid number: 1-16
seqNum: 0
# -------------------------------------------===== seqId [Optional] =====-------------------------------------------
# Description: Offset: 8b, Width: 8b, Sequence Index, valid number: 0-15
seqId: 0
# -----------------------------------------===== reserved [Optional] =====------------------------------------------
# Description: Offset: 16b, Width: 16b, N/A
reserved: 0
# -----------------------------------------===== reserved9_0 [Optional] =====-----------------------------------------
# Description: Offset: 0x000001B0, Width: 32b; [0x1b0-0x1bf] Reserved for future use
reserved9_0: '0x00000000'
# -----------------------------------------===== reserved9_1 [Optional] =====-----------------------------------------
# Description: Offset: 0x000001B4, Width: 32b; [0x1b0-0x1bf] Reserved for future use
reserved9_1: '0x00000000'
# -----------------------------------------===== reserved9_2 [Optional] =====-----------------------------------------
# Description: Offset: 0x000001B8, Width: 32b; [0x1b0-0x1bf] Reserved for future use
reserved9_2: '0x00000000'
# -----------------------------------------===== reserved9_3 [Optional] =====-----------------------------------------
# Description: Offset: 0x000001BC, Width: 32b; [0x1b0-0x1bf] Reserved for future use
reserved9_3: '0x00000000'
# ------------------------------------------===== pageSize [Optional] =====-------------------------------------------
# Description: Offset: 0x000001C0, Width: 32b; Page size of Serial NOR
pageSize: '0x00000000'
# -----------------------------------------===== sectorSize [Optional] =====------------------------------------------
# Description: Offset: 0x000001C4, Width: 32b; Sector size of Serial NOR
sectorSize: '0x00000000'
# -------------------------------------===== ipcmdSerialClkFreq [Optional] =====--------------------------------------
# Description: Offset: 0x000001C8, Width: 8b; Clock frequency for IP command
ipcmdSerialClkFreq: '0x00'
# -------------------------------------===== isUniformBlockSize [Optional] =====--------------------------------------
# Description: Offset: 0x000001C9, Width: 8b; Sector/Block size is the same
isUniformBlockSize: '0x00'
# -------------------------------------===== isDataOrderSwapped [Optional] =====--------------------------------------
# Description: Offset: 0x000001CA, Width: 8b; The data order is swapped in OPI DDR mode
isDataOrderSwapped: '0x00'
# ----------------------------------------===== reserved10_0 [Optional] =====-----------------------------------------
# Description: Offset: 0x000001CB, Width: 8b; Reserved for future use
reserved10_0: '0x00'
# ----------------------------------------===== reserved10_1 [Optional] =====-----------------------------------------
# Description: Offset: 0x000001CC, Width: 8b; Reserved for future use
reserved10_1: '0x00'
# ----------------------------------------===== reserved10_2 [Optional] =====-----------------------------------------
# Description: Offset: 0x000001CD, Width: 8b; Reserved for future use
reserved10_2: '0x00'
# ----------------------------------------===== reserved10_3 [Optional] =====-----------------------------------------
# Description: Offset: 0x000001CE, Width: 8b; Reserved for future use
reserved10_3: '0x00'
# ----------------------------------------===== reserved10_4 [Optional] =====-----------------------------------------
# Description: Offset: 0x000001CF, Width: 8b; Reserved for future use
reserved10_4: '0x00'
# ------------------------------------------===== blockSize [Optional] =====------------------------------------------
# Description: Offset: 0x000001D0, Width: 32b; Block size
blockSize: '0x00000000'
# ----------------------------------------===== flashStateCtx [Optional] =====----------------------------------------
# Description: Offset: 0x000001D4, Width: 32b; Flash State Context after being configured
flashStateCtx:
# ---------------------------------------===== flashPorMode [Optional] =====----------------------------------------
# Description: Offset: 0b, Width: 8b, Flash POR Mode
flashPorMode: 0
# -------------------------------------===== flashCurrentMode [Optional] =====--------------------------------------
# Description: Offset: 8b, Width: 8b, Sequence Number, valid number: 1-16
flashCurrentMode: 0
# -----------------------------------------===== reserved [Optional] =====------------------------------------------
# Description: Offset: 16b, Width: 8b, Sequence Number, valid number: 1-16
reserved: 0
# ----------------------------------===== flashRestoringSequence [Optional] =====-----------------------------------
# Description: Offset: 24b, Width: 8b, Sequence Number, valid number: 1-16
flashRestoringSequence: 0
# ----------------------------------------===== reserved11_0 [Optional] =====-----------------------------------------
# Description: Offset: 0x000001D8, Width: 32b; Reserved for future use
reserved11_0: '0x00000000'
# ----------------------------------------===== reserved11_1 [Optional] =====-----------------------------------------
# Description: Offset: 0x000001DC, Width: 32b; Reserved for future use
reserved11_1: '0x00000000'
# ----------------------------------------===== reserved11_2 [Optional] =====-----------------------------------------
# Description: Offset: 0x000001E0, Width: 32b; Reserved for future use
reserved11_2: '0x00000000'
# ----------------------------------------===== reserved11_3 [Optional] =====-----------------------------------------
# Description: Offset: 0x000001E4, Width: 32b; Reserved for future use
reserved11_3: '0x00000000'
# ----------------------------------------===== reserved11_4 [Optional] =====-----------------------------------------
# Description: Offset: 0x000001E8, Width: 32b; Reserved for future use
reserved11_4: '0x00000000'
# ----------------------------------------===== reserved11_5 [Optional] =====-----------------------------------------
# Description: Offset: 0x000001EC, Width: 32b; Reserved for future use
reserved11_5: '0x00000000'
# ----------------------------------------===== reserved11_6 [Optional] =====-----------------------------------------
# Description: Offset: 0x000001F0, Width: 32b; Reserved for future use
reserved11_6: '0x00000000'
# ----------------------------------------===== reserved11_7 [Optional] =====-----------------------------------------
# Description: Offset: 0x000001F4, Width: 32b; Reserved for future use
reserved11_7: '0x00000000'
# ----------------------------------------===== reserved11_8 [Optional] =====-----------------------------------------
# Description: Offset: 0x000001F8, Width: 32b; Reserved for future use
reserved11_8: '0x00000000'
# ----------------------------------------===== reserved11_9 [Optional] =====-----------------------------------------
# Description: Offset: 0x000001FC, Width: 32b; Reserved for future use
reserved11_9: '0x00000000'
FCB for mimxrt1187, Revision: b0 and flexspi_nor#
FCB for mimxrt1187, Revision: b0 and flexspi_nor JSON schema
FCB for mimxrt1187, Revision: b0 and flexspi_nor YAML configuration template
# ================================= FCB for mimxrt1187, Revision: b0 and flexspi_nor =================================
# ======================================================================================================================
# == FCB for mimxrt1187, Revision: b0 and flexspi_nor ==
# ======================================================================================================================
# -------------------------------------===== The chip family name [Required] =====--------------------------------------
# Description: NXP chip family identifier.
family: CHOOSE_FROM_TABLE
# -----------------------------------------===== MCU revision [Optional] =====------------------------------------------
# Description: Revision of silicon. The 'latest' name, means most current revision.
# Possible options: <a0, b0, latest>
revision: b0
# ------------------------------------------===== Memory type [Required] =====------------------------------------------
# Description: Specify type of memory used by FCB description.
# Possible options: <flexspi_nor>
type: flexspi_nor
# ------------------------------------------===== mimxrt1187 [Required] =====-------------------------------------------
fcb_settings:
# ---------------------------------------------===== tag [Optional] =====---------------------------------------------
# Description: Offset: 0x00000000, Width: 32b; [0x000-0x003] Tag, fixed value 0x42464346UL
tag: '0x42464346'
# -------------------------------------------===== version [Optional] =====-------------------------------------------
# Description: Offset: 0x00000004, Width: 32b; [0x004-0x007] Version,[31:24] -'V', [23:16] - Major, [15:8] - Minor,
# [7:0] - bugfix
version:
# ------------------------------------------===== bugfix [Optional] =====-------------------------------------------
# Description: Offset: 0b, Width: 8b, [07:00] Bugfix - 0
bugfix: 0
# -------------------------------------------===== minor [Optional] =====-------------------------------------------
# Description: Offset: 8b, Width: 8b, [15:08] Minor
minor: 0
# -------------------------------------------===== major [Optional] =====-------------------------------------------
# Description: Offset: 16b, Width: 8b, [23:16] Major - 1
major: 1
# -----------------------------------------===== reserved [Optional] =====------------------------------------------
# Description: Offset: 24b, Width: 8b, [32:24] Ascii 'V'
reserved: 86
# ------------------------------------------===== reserved0 [Optional] =====------------------------------------------
# Description: Offset: 0x00000008, Width: 32b; [0x008-0x00b] Reserved for future use
reserved0: '0x00000000'
# --------------------------------------===== readSampleClkSrc [Optional] =====---------------------------------------
# Description: Offset: 0x0000000C, Width: 8b; [0x00c-0x00c] Read Sample Clock Source, valid value: 0/1/3
readSampleClkSrc: '0x00'
# -----------------------------------------===== csHoldTime [Optional] =====------------------------------------------
# Description: Offset: 0x0000000D, Width: 8b; [0x00d-0x00d] CS hold time, default value: 3
csHoldTime: '0x00'
# -----------------------------------------===== csSetupTime [Optional] =====-----------------------------------------
# Description: Offset: 0x0000000E, Width: 8b; [0x00e-0x00e] CS setup time, default value: 3
csSetupTime: '0x00'
# -------------------------------------===== columnAddressWidth [Optional] =====--------------------------------------
# Description: Offset: 0x0000000F, Width: 8b; [0x00f-0x00f] Column Address with, for HyperBus protocol, it is fixed
# to 3, For Serial NAND, need to refer to datasheet
columnAddressWidth: '0x00'
# -------------------------------------===== deviceModeCfgEnable [Optional] =====-------------------------------------
# Description: Offset: 0x00000010, Width: 8b; [0x010-0x010] Device Mode Configure enable flag, 1 - Enable, 0 -
# Disable
deviceModeCfgEnable: '0x00'
# ---------------------------------------===== deviceModeType [Optional] =====----------------------------------------
# Description: Offset: 0x00000011, Width: 8b; [0x011-0x011] Specify the configuration command type: 0 - Generic, 1 -
# Quad Enable, 2 - SPI-to-xSPI, 3 - xSPI-to-SPI
deviceModeType: '0x00'
# -------------------------------------===== waitTimeCfgCommands [Optional] =====-------------------------------------
# Description: Offset: 0x00000012, Width: 16b; [0x012-0x013] Wait time for all configuration commands, unit: 100us,
# Used for DPI/QPI/OPI switch or reset command
waitTimeCfgCommands: '0x0000'
# ----------------------------------------===== deviceModeSeq [Optional] =====----------------------------------------
# Description: Offset: 0x00000014, Width: 32b; [0x014-0x017] Device mode sequence info, [7:0] - LUT sequence id,
# [15:8] - LUt sequence number, [31:16] Reserved
deviceModeSeq:
# ------------------------------------------===== seqNum [Optional] =====-------------------------------------------
# Description: Offset: 0b, Width: 8b, Sequence Number, valid number: 1-16
seqNum: 0
# -------------------------------------------===== seqId [Optional] =====-------------------------------------------
# Description: Offset: 8b, Width: 8b, Sequence Index, valid number: 0-15
seqId: 0
# -----------------------------------------===== reserved [Optional] =====------------------------------------------
# Description: Offset: 16b, Width: 16b, N/A
reserved: 0
# ----------------------------------------===== deviceModeArg [Optional] =====----------------------------------------
# Description: Offset: 0x00000018, Width: 32b; [0x018-0x01b] Argument/Parameter for device configuration. effective
# only when deviceModeCfgEnable = 1
deviceModeArg: '0x00000000'
# ---------------------------------------===== configCmdEnable [Optional] =====---------------------------------------
# Description: Offset: 0x0000001C, Width: 8b; [0x01c-0x01c] Configure command Enable Flag, 1 - Enable, 0 - Disable
configCmdEnable: '0x00'
# ------------------------------------------===== reserved1 [Optional] =====------------------------------------------
# Description: Offset: 0x0000001D, Width: 24b; [0x01d-0x019] Reserved for future use
reserved1: '0x000000'
# ---------------------------------------===== configCmdSeqs_0 [Optional] =====---------------------------------------
# Description: Offset: 0x00000020, Width: 32b; [0x020-0x02b] Sequence info for Device Configuration command, similar
# as deviceModeSeq
configCmdSeqs_0:
# ------------------------------------------===== seqNum [Optional] =====-------------------------------------------
# Description: Offset: 0b, Width: 8b, Sequence Number, valid number: 1-16
seqNum: 0
# -------------------------------------------===== seqId [Optional] =====-------------------------------------------
# Description: Offset: 8b, Width: 8b, Sequence Index, valid number: 0-15
seqId: 0
# -----------------------------------------===== reserved [Optional] =====------------------------------------------
# Description: Offset: 16b, Width: 16b, N/A
reserved: 0
# ---------------------------------------===== configCmdSeqs_1 [Optional] =====---------------------------------------
# Description: Offset: 0x00000024, Width: 32b; [0x020-0x02b] Sequence info for Device Configuration command, similar
# as deviceModeSeq
configCmdSeqs_1:
# ------------------------------------------===== seqNum [Optional] =====-------------------------------------------
# Description: Offset: 0b, Width: 8b, Sequence Number, valid number: 1-16
seqNum: 0
# -------------------------------------------===== seqId [Optional] =====-------------------------------------------
# Description: Offset: 8b, Width: 8b, Sequence Index, valid number: 0-15
seqId: 0
# -----------------------------------------===== reserved [Optional] =====------------------------------------------
# Description: Offset: 16b, Width: 16b, N/A
reserved: 0
# ---------------------------------------===== configCmdSeqs_2 [Optional] =====---------------------------------------
# Description: Offset: 0x00000028, Width: 32b; [0x020-0x02b] Sequence info for Device Configuration command, similar
# as deviceModeSeq
configCmdSeqs_2:
# ------------------------------------------===== seqNum [Optional] =====-------------------------------------------
# Description: Offset: 0b, Width: 8b, Sequence Number, valid number: 1-16
seqNum: 0
# -------------------------------------------===== seqId [Optional] =====-------------------------------------------
# Description: Offset: 8b, Width: 8b, Sequence Index, valid number: 0-15
seqId: 0
# -----------------------------------------===== reserved [Optional] =====------------------------------------------
# Description: Offset: 16b, Width: 16b, N/A
reserved: 0
# ------------------------------------------===== reserved2 [Optional] =====------------------------------------------
# Description: Offset: 0x0000002C, Width: 32b; [0x02c-0x02f] Reserved for future use
reserved2: '0x00000000'
# ---------------------------------------===== configCmdArgs_0 [Optional] =====---------------------------------------
# Description: Offset: 0x00000030, Width: 32b; [0x030-0x03b] Arguments/Parameters for device Configuration commands
configCmdArgs_0: '0x00000000'
# ---------------------------------------===== configCmdArgs_1 [Optional] =====---------------------------------------
# Description: Offset: 0x00000034, Width: 32b; [0x030-0x03b] Arguments/Parameters for device Configuration commands
configCmdArgs_1: '0x00000000'
# ---------------------------------------===== configCmdArgs_2 [Optional] =====---------------------------------------
# Description: Offset: 0x00000038, Width: 32b; [0x030-0x03b] Arguments/Parameters for device Configuration commands
configCmdArgs_2: '0x00000000'
# ------------------------------------------===== reserved3 [Optional] =====------------------------------------------
# Description: Offset: 0x0000003C, Width: 32b; [0x03c-0x03f] Reserved for future use
reserved3: '0x00000000'
# ------------------------------------===== controllerMiscOption [Optional] =====-------------------------------------
# Description: Offset: 0x00000040, Width: 32b; [0x040-0x043] Controller Misc Options, see Misc feature bit
# definitions for more details
controllerMiscOption: '0x00000000'
# -----------------------------------------===== deviceType [Optional] =====------------------------------------------
# Description: Offset: 0x00000044, Width: 8b; [0x044-0x044] Device Type: See Flash Type Definition for more details
deviceType: '0x00'
# ----------------------------------------===== sflashPadType [Optional] =====----------------------------------------
# Description: Offset: 0x00000045, Width: 8b; [0x045-0x045] Serial Flash Pad Type: 1 - Single, 2 - Dual, 4 - Quad, 8
# - Octal
sflashPadType: '0x00'
# ----------------------------------------===== serialClkFreq [Optional] =====----------------------------------------
# Description: Offset: 0x00000046, Width: 8b; [0x046-0x046] Serial Flash Frequency, device specific definitions, See
# System Boot Chapter for more details
serialClkFreq: '0x00'
# -------------------------------------===== lutCustomSeqEnable [Optional] =====--------------------------------------
# Description: Offset: 0x00000047, Width: 8b; [0x047-0x047] LUT customization Enable, it is required if the
# program/erase cannot be done using 1 LUT sequence, currently, only applicable to HyperFLASH
lutCustomSeqEnable: '0x00'
# ------------------------------------------===== reserved4 [Optional] =====------------------------------------------
# Description: Offset: 0x00000048, Width: 64b; [0x048-0x04f] Reserved for future use
reserved4: '0x0000000000000000'
# ----------------------------------------===== sflashA1Size [Optional] =====-----------------------------------------
# Description: Offset: 0x00000050, Width: 32b; [0x050-0x053] Size of Flash connected to A1
sflashA1Size: '0x00000000'
# ----------------------------------------===== sflashA2Size [Optional] =====-----------------------------------------
# Description: Offset: 0x00000054, Width: 32b; [0x054-0x057] Size of Flash connected to A2
sflashA2Size: '0x00000000'
# ----------------------------------------===== sflashB1Size [Optional] =====-----------------------------------------
# Description: Offset: 0x00000058, Width: 32b; [0x058-0x05b] Size of Flash connected to B1
sflashB1Size: '0x00000000'
# ----------------------------------------===== sflashB2Size [Optional] =====-----------------------------------------
# Description: Offset: 0x0000005C, Width: 32b; [0x05c-0x05f] Size of Flash connected to B2
sflashB2Size: '0x00000000'
# -----------------------------------===== csPadSettingOverrideEn [Optional] =====------------------------------------
# Description: Offset: 0x00000060, Width: 8b; [0x060-0x060] Set to 0 if it is not supported
csPadSettingOverrideEn: '0x00'
# ------------------------------------===== csPadSettingOverride [Optional] =====-------------------------------------
# Description: Offset: 0x00000061, Width: 8b; [0x061-0x061] Overriding pad setting of CS
csPadSettingOverride: '0x00'
# ------------------------------------------===== reserved5 [Optional] =====------------------------------------------
# Description: Offset: 0x00000062, Width: 16b; [0x062-0x063] Reserved for future use
reserved5: '0x0000'
# ----------------------------------===== sclkPadSettingOverrideEn [Optional] =====-----------------------------------
# Description: Offset: 0x00000064, Width: 8b; [0x064-0x064] Set to 0 if it is not supported
sclkPadSettingOverrideEn: '0x00'
# -----------------------------------===== sclkPadSettingOverride [Optional] =====------------------------------------
# Description: Offset: 0x00000065, Width: 8b; [0x065-0x065] Overriding pad setting of SCLK
sclkPadSettingOverride: '0x00'
# ------------------------------------------===== reserved6 [Optional] =====------------------------------------------
# Description: Offset: 0x00000066, Width: 16b; [0x066-0x067] Reserved for future use
reserved6: '0x0000'
# ----------------------------------===== dataPadSettingOverrideEn [Optional] =====-----------------------------------
# Description: Offset: 0x00000068, Width: 8b; [0x068-0x068] Set to 0 if it is not supported
dataPadSettingOverrideEn: '0x00'
# -----------------------------------===== dataPadSettingOverride [Optional] =====------------------------------------
# Description: Offset: 0x00000069, Width: 8b; [0x069-0x069] Overriding pad setting of data signals
dataPadSettingOverride: '0x00'
# ------------------------------------------===== reserved7 [Optional] =====------------------------------------------
# Description: Offset: 0x0000006A, Width: 16b; [0x06a-0x06b] Reserved for future use
reserved7: '0x0000'
# -----------------------------------===== dqsPadSettingOverrideEn [Optional] =====-----------------------------------
# Description: Offset: 0x0000006C, Width: 8b; [0x06c-0x06c] Set to 0 if it is not supported
dqsPadSettingOverrideEn: '0x00'
# ------------------------------------===== dqsPadSettingOverride [Optional] =====------------------------------------
# Description: Offset: 0x0000006D, Width: 8b; [0x06d-0x06d] Overriding pad setting of DQS
dqsPadSettingOverride: '0x00'
# ------------------------------------------===== reserved8 [Optional] =====------------------------------------------
# Description: Offset: 0x0000006E, Width: 16b; [0x06e-0x06f] Reserved for future use
reserved8: '0x0000'
# -----------------------------------------===== timeoutInMs [Optional] =====-----------------------------------------
# Description: Offset: 0x00000070, Width: 32b; [0x070-0x073] Timeout threshold for read status command
timeoutInMs: '0x00000000'
# ---------------------------------------===== commandInterval [Optional] =====---------------------------------------
# Description: Offset: 0x00000074, Width: 32b; [0x074-0x077] CS deselect interval between two commands
commandInterval: '0x00000000'
# ----------------------------------------===== dataValidTime [Optional] =====----------------------------------------
# Description: Offset: 0x00000078, Width: 32b; [0x078-0x07b] CLK edge to data valid time for PORT A and PORT B, in
# terms of 0.1ns
dataValidTime:
# ---------------------------------------===== dllAValidTime [Optional] =====---------------------------------------
# Description: Offset: 0b, Width: 16b, Data valid time for DLLA in terms of 0.1 ns
dllAValidTime: 0
# ---------------------------------------===== dllBValidTime [Optional] =====---------------------------------------
# Description: Offset: 16b, Width: 16b, Data valid time for DLLB in terms of 0.1 ns
dllBValidTime: 0
# -----------------------------------------===== busyOffset [Optional] =====------------------------------------------
# Description: Offset: 0x0000007C, Width: 16b; [0x07c-0x07d] Busy offset, valid value: 0-31
busyOffset: '0x0000'
# ---------------------------------------===== busyBitPolarity [Optional] =====---------------------------------------
# Description: Offset: 0x0000007E, Width: 16b; [0x07e-0x07f] Busy flag polarity, 0 - busy flag is 1 when flash device
# is busy, 1 - busy flag is 0 when flash device is busy
busyBitPolarity: '0x0000'
# -----------------------------------===== lookupTable_seq0_instr0 [Optional] =====-----------------------------------
# Description: Offset: 0x00000080, Width: 16b; Lookup table holds Flash command sequences 0, instruction 0
lookupTable_seq0_instr0:
# ------------------------------------------===== OPERAND [Optional] =====------------------------------------------
# Description: Offset: 0b, Width: 8b, Instruction operand. Its values depends on used instruction
OPERAND: 0
# -----------------------------------------===== NUM_PADS [Optional] =====------------------------------------------
# Description: Offset: 8b, Width: 2b, Number of pads used by instruction. Some instructions ignores this parameter.
# - 1PAD, (0): Single mode. One pad is used.
# - 2PAD, (1): Dual mode. Two pads are used.
# - 4PAD, (2): Quad mode. Four pads are used.
# - 8PAD, (3): Octal mode. Eight pads are used.
# Possible options: <1PAD, 2PAD, 4PAD, 8PAD>
NUM_PADS: 1PAD
# --------------------------------------===== OPERATION_CODE [Optional] =====---------------------------------------
# Description: Offset: 10b, Width: 6b, Instruction operation code.
# - STOP, (0): Stop execution and de-assert CS. Then, the next command sequence (to the same flash device) starts
# from instruction pointer 0.
# - CMD_SDR, (1): Transmit command code to Flash.
# - RADDR_SDR, (2): Transmit row address to Flash.
# - CADDR_SDR, (3): Transmit column address to Flash.
# - MODE1_SDR, (4): Transmit mode bits to Flash.
# - MODE2_SDR, (5): Transmit mode bits to Flash.
# - MODE4_SDR, (6): Transmit mode bits to Flash.
# - MODE8_SDR, (7): Transmit mode bits to Flash.
# - WRITE_SDR, (8): Transmit program data to Flash device.
# - READ_SDR, (9): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_SDR, (10): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_SDR, (11): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_SDR, (12): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_SDR, (13): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# - JMP_ON_CS, (31): Stop execution, de-assert CS and save operand[7:0] as the instruction start pointer for next
# sequence.Normally this instruction is used to support Execute-In-Place enhanced mode. See XIP enhanced mode for
# more details.This instruction is only allowed for AHB read commands. There is interrupt status bit set
# (INTR[IPCMDERR] or INTR[AHBCMDERR]) when using this instruction in IP command or AHB write command.
# - CMD_DDR, (33): Transmit command code to Flash.
# - RADDR_DDR, (34): Transmit row address to Flash.
# - CADDR_DDR, (35): Transmit column address to Flash.
# - MODE1_DDR, (36): Transmit mode bits to Flash.
# - MODE2_DDR, (37): Transmit mode bits to Flash.
# - MODE4_DDR, (38): Transmit mode bits to Flash.
# - MODE8_DDR, (39): Transmit mode bits to Flash.
# - WRITE_DDR, (40): Transmit program data to Flash device.
# - READ_DDR, (41): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_DDR, (42): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_DDR, (43): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_DDR, (44): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_DDR, (45): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# Possible options: <STOP, CMD_SDR, RADDR_SDR, CADDR_SDR, MODE1_SDR, MODE2_SDR, MODE4_SDR, MODE8_SDR, WRITE_SDR,
# READ_SDR, LEARN_SDR, DATSZ_SDR, DUMMY_SDR, DUMMY_RWDS_SDR, JMP_ON_CS, CMD_DDR, RADDR_DDR, CADDR_DDR, MODE1_DDR,
# MODE2_DDR, MODE4_DDR, MODE8_DDR, WRITE_DDR, READ_DDR, LEARN_DDR, DATSZ_DDR, DUMMY_DDR, DUMMY_RWDS_DDR>
OPERATION_CODE: STOP
lookupTable_seq0_instr1:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq0_instr2:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq0_instr3:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq0_instr4:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq0_instr5:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq0_instr6:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq0_instr7:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
# -----------------------------------===== lookupTable_seq1_instr0 [Optional] =====-----------------------------------
# Description: Offset: 0x00000090, Width: 16b; Lookup table holds Flash command sequences 1, instruction 0
lookupTable_seq1_instr0:
# ------------------------------------------===== OPERAND [Optional] =====------------------------------------------
# Description: Offset: 0b, Width: 8b, Instruction operand. Its values depends on used instruction
OPERAND: 0
# -----------------------------------------===== NUM_PADS [Optional] =====------------------------------------------
# Description: Offset: 8b, Width: 2b, Number of pads used by instruction. Some instructions ignores this parameter.
# - 1PAD, (0): Single mode. One pad is used.
# - 2PAD, (1): Dual mode. Two pads are used.
# - 4PAD, (2): Quad mode. Four pads are used.
# - 8PAD, (3): Octal mode. Eight pads are used.
# Possible options: <1PAD, 2PAD, 4PAD, 8PAD>
NUM_PADS: 1PAD
# --------------------------------------===== OPERATION_CODE [Optional] =====---------------------------------------
# Description: Offset: 10b, Width: 6b, Instruction operation code.
# - STOP, (0): Stop execution and de-assert CS. Then, the next command sequence (to the same flash device) starts
# from instruction pointer 0.
# - CMD_SDR, (1): Transmit command code to Flash.
# - RADDR_SDR, (2): Transmit row address to Flash.
# - CADDR_SDR, (3): Transmit column address to Flash.
# - MODE1_SDR, (4): Transmit mode bits to Flash.
# - MODE2_SDR, (5): Transmit mode bits to Flash.
# - MODE4_SDR, (6): Transmit mode bits to Flash.
# - MODE8_SDR, (7): Transmit mode bits to Flash.
# - WRITE_SDR, (8): Transmit program data to Flash device.
# - READ_SDR, (9): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_SDR, (10): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_SDR, (11): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_SDR, (12): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_SDR, (13): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# - JMP_ON_CS, (31): Stop execution, de-assert CS and save operand[7:0] as the instruction start pointer for next
# sequence.Normally this instruction is used to support Execute-In-Place enhanced mode. See XIP enhanced mode for
# more details.This instruction is only allowed for AHB read commands. There is interrupt status bit set
# (INTR[IPCMDERR] or INTR[AHBCMDERR]) when using this instruction in IP command or AHB write command.
# - CMD_DDR, (33): Transmit command code to Flash.
# - RADDR_DDR, (34): Transmit row address to Flash.
# - CADDR_DDR, (35): Transmit column address to Flash.
# - MODE1_DDR, (36): Transmit mode bits to Flash.
# - MODE2_DDR, (37): Transmit mode bits to Flash.
# - MODE4_DDR, (38): Transmit mode bits to Flash.
# - MODE8_DDR, (39): Transmit mode bits to Flash.
# - WRITE_DDR, (40): Transmit program data to Flash device.
# - READ_DDR, (41): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_DDR, (42): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_DDR, (43): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_DDR, (44): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_DDR, (45): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# Possible options: <STOP, CMD_SDR, RADDR_SDR, CADDR_SDR, MODE1_SDR, MODE2_SDR, MODE4_SDR, MODE8_SDR, WRITE_SDR,
# READ_SDR, LEARN_SDR, DATSZ_SDR, DUMMY_SDR, DUMMY_RWDS_SDR, JMP_ON_CS, CMD_DDR, RADDR_DDR, CADDR_DDR, MODE1_DDR,
# MODE2_DDR, MODE4_DDR, MODE8_DDR, WRITE_DDR, READ_DDR, LEARN_DDR, DATSZ_DDR, DUMMY_DDR, DUMMY_RWDS_DDR>
OPERATION_CODE: STOP
lookupTable_seq1_instr1:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq1_instr2:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq1_instr3:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq1_instr4:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq1_instr5:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq1_instr6:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq1_instr7:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
# -----------------------------------===== lookupTable_seq2_instr0 [Optional] =====-----------------------------------
# Description: Offset: 0x000000A0, Width: 16b; Lookup table holds Flash command sequences 2, instruction 0
lookupTable_seq2_instr0:
# ------------------------------------------===== OPERAND [Optional] =====------------------------------------------
# Description: Offset: 0b, Width: 8b, Instruction operand. Its values depends on used instruction
OPERAND: 0
# -----------------------------------------===== NUM_PADS [Optional] =====------------------------------------------
# Description: Offset: 8b, Width: 2b, Number of pads used by instruction. Some instructions ignores this parameter.
# - 1PAD, (0): Single mode. One pad is used.
# - 2PAD, (1): Dual mode. Two pads are used.
# - 4PAD, (2): Quad mode. Four pads are used.
# - 8PAD, (3): Octal mode. Eight pads are used.
# Possible options: <1PAD, 2PAD, 4PAD, 8PAD>
NUM_PADS: 1PAD
# --------------------------------------===== OPERATION_CODE [Optional] =====---------------------------------------
# Description: Offset: 10b, Width: 6b, Instruction operation code.
# - STOP, (0): Stop execution and de-assert CS. Then, the next command sequence (to the same flash device) starts
# from instruction pointer 0.
# - CMD_SDR, (1): Transmit command code to Flash.
# - RADDR_SDR, (2): Transmit row address to Flash.
# - CADDR_SDR, (3): Transmit column address to Flash.
# - MODE1_SDR, (4): Transmit mode bits to Flash.
# - MODE2_SDR, (5): Transmit mode bits to Flash.
# - MODE4_SDR, (6): Transmit mode bits to Flash.
# - MODE8_SDR, (7): Transmit mode bits to Flash.
# - WRITE_SDR, (8): Transmit program data to Flash device.
# - READ_SDR, (9): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_SDR, (10): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_SDR, (11): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_SDR, (12): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_SDR, (13): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# - JMP_ON_CS, (31): Stop execution, de-assert CS and save operand[7:0] as the instruction start pointer for next
# sequence.Normally this instruction is used to support Execute-In-Place enhanced mode. See XIP enhanced mode for
# more details.This instruction is only allowed for AHB read commands. There is interrupt status bit set
# (INTR[IPCMDERR] or INTR[AHBCMDERR]) when using this instruction in IP command or AHB write command.
# - CMD_DDR, (33): Transmit command code to Flash.
# - RADDR_DDR, (34): Transmit row address to Flash.
# - CADDR_DDR, (35): Transmit column address to Flash.
# - MODE1_DDR, (36): Transmit mode bits to Flash.
# - MODE2_DDR, (37): Transmit mode bits to Flash.
# - MODE4_DDR, (38): Transmit mode bits to Flash.
# - MODE8_DDR, (39): Transmit mode bits to Flash.
# - WRITE_DDR, (40): Transmit program data to Flash device.
# - READ_DDR, (41): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_DDR, (42): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_DDR, (43): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_DDR, (44): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_DDR, (45): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# Possible options: <STOP, CMD_SDR, RADDR_SDR, CADDR_SDR, MODE1_SDR, MODE2_SDR, MODE4_SDR, MODE8_SDR, WRITE_SDR,
# READ_SDR, LEARN_SDR, DATSZ_SDR, DUMMY_SDR, DUMMY_RWDS_SDR, JMP_ON_CS, CMD_DDR, RADDR_DDR, CADDR_DDR, MODE1_DDR,
# MODE2_DDR, MODE4_DDR, MODE8_DDR, WRITE_DDR, READ_DDR, LEARN_DDR, DATSZ_DDR, DUMMY_DDR, DUMMY_RWDS_DDR>
OPERATION_CODE: STOP
lookupTable_seq2_instr1:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq2_instr2:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq2_instr3:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq2_instr4:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq2_instr5:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq2_instr6:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq2_instr7:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
# -----------------------------------===== lookupTable_seq3_instr0 [Optional] =====-----------------------------------
# Description: Offset: 0x000000B0, Width: 16b; Lookup table holds Flash command sequences 3, instruction 0
lookupTable_seq3_instr0:
# ------------------------------------------===== OPERAND [Optional] =====------------------------------------------
# Description: Offset: 0b, Width: 8b, Instruction operand. Its values depends on used instruction
OPERAND: 0
# -----------------------------------------===== NUM_PADS [Optional] =====------------------------------------------
# Description: Offset: 8b, Width: 2b, Number of pads used by instruction. Some instructions ignores this parameter.
# - 1PAD, (0): Single mode. One pad is used.
# - 2PAD, (1): Dual mode. Two pads are used.
# - 4PAD, (2): Quad mode. Four pads are used.
# - 8PAD, (3): Octal mode. Eight pads are used.
# Possible options: <1PAD, 2PAD, 4PAD, 8PAD>
NUM_PADS: 1PAD
# --------------------------------------===== OPERATION_CODE [Optional] =====---------------------------------------
# Description: Offset: 10b, Width: 6b, Instruction operation code.
# - STOP, (0): Stop execution and de-assert CS. Then, the next command sequence (to the same flash device) starts
# from instruction pointer 0.
# - CMD_SDR, (1): Transmit command code to Flash.
# - RADDR_SDR, (2): Transmit row address to Flash.
# - CADDR_SDR, (3): Transmit column address to Flash.
# - MODE1_SDR, (4): Transmit mode bits to Flash.
# - MODE2_SDR, (5): Transmit mode bits to Flash.
# - MODE4_SDR, (6): Transmit mode bits to Flash.
# - MODE8_SDR, (7): Transmit mode bits to Flash.
# - WRITE_SDR, (8): Transmit program data to Flash device.
# - READ_SDR, (9): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_SDR, (10): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_SDR, (11): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_SDR, (12): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_SDR, (13): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# - JMP_ON_CS, (31): Stop execution, de-assert CS and save operand[7:0] as the instruction start pointer for next
# sequence.Normally this instruction is used to support Execute-In-Place enhanced mode. See XIP enhanced mode for
# more details.This instruction is only allowed for AHB read commands. There is interrupt status bit set
# (INTR[IPCMDERR] or INTR[AHBCMDERR]) when using this instruction in IP command or AHB write command.
# - CMD_DDR, (33): Transmit command code to Flash.
# - RADDR_DDR, (34): Transmit row address to Flash.
# - CADDR_DDR, (35): Transmit column address to Flash.
# - MODE1_DDR, (36): Transmit mode bits to Flash.
# - MODE2_DDR, (37): Transmit mode bits to Flash.
# - MODE4_DDR, (38): Transmit mode bits to Flash.
# - MODE8_DDR, (39): Transmit mode bits to Flash.
# - WRITE_DDR, (40): Transmit program data to Flash device.
# - READ_DDR, (41): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_DDR, (42): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_DDR, (43): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_DDR, (44): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_DDR, (45): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# Possible options: <STOP, CMD_SDR, RADDR_SDR, CADDR_SDR, MODE1_SDR, MODE2_SDR, MODE4_SDR, MODE8_SDR, WRITE_SDR,
# READ_SDR, LEARN_SDR, DATSZ_SDR, DUMMY_SDR, DUMMY_RWDS_SDR, JMP_ON_CS, CMD_DDR, RADDR_DDR, CADDR_DDR, MODE1_DDR,
# MODE2_DDR, MODE4_DDR, MODE8_DDR, WRITE_DDR, READ_DDR, LEARN_DDR, DATSZ_DDR, DUMMY_DDR, DUMMY_RWDS_DDR>
OPERATION_CODE: STOP
lookupTable_seq3_instr1:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq3_instr2:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq3_instr3:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq3_instr4:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq3_instr5:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq3_instr6:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq3_instr7:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
# -----------------------------------===== lookupTable_seq4_instr0 [Optional] =====-----------------------------------
# Description: Offset: 0x000000C0, Width: 16b; Lookup table holds Flash command sequences 4, instruction 0
lookupTable_seq4_instr0:
# ------------------------------------------===== OPERAND [Optional] =====------------------------------------------
# Description: Offset: 0b, Width: 8b, Instruction operand. Its values depends on used instruction
OPERAND: 0
# -----------------------------------------===== NUM_PADS [Optional] =====------------------------------------------
# Description: Offset: 8b, Width: 2b, Number of pads used by instruction. Some instructions ignores this parameter.
# - 1PAD, (0): Single mode. One pad is used.
# - 2PAD, (1): Dual mode. Two pads are used.
# - 4PAD, (2): Quad mode. Four pads are used.
# - 8PAD, (3): Octal mode. Eight pads are used.
# Possible options: <1PAD, 2PAD, 4PAD, 8PAD>
NUM_PADS: 1PAD
# --------------------------------------===== OPERATION_CODE [Optional] =====---------------------------------------
# Description: Offset: 10b, Width: 6b, Instruction operation code.
# - STOP, (0): Stop execution and de-assert CS. Then, the next command sequence (to the same flash device) starts
# from instruction pointer 0.
# - CMD_SDR, (1): Transmit command code to Flash.
# - RADDR_SDR, (2): Transmit row address to Flash.
# - CADDR_SDR, (3): Transmit column address to Flash.
# - MODE1_SDR, (4): Transmit mode bits to Flash.
# - MODE2_SDR, (5): Transmit mode bits to Flash.
# - MODE4_SDR, (6): Transmit mode bits to Flash.
# - MODE8_SDR, (7): Transmit mode bits to Flash.
# - WRITE_SDR, (8): Transmit program data to Flash device.
# - READ_SDR, (9): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_SDR, (10): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_SDR, (11): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_SDR, (12): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_SDR, (13): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# - JMP_ON_CS, (31): Stop execution, de-assert CS and save operand[7:0] as the instruction start pointer for next
# sequence.Normally this instruction is used to support Execute-In-Place enhanced mode. See XIP enhanced mode for
# more details.This instruction is only allowed for AHB read commands. There is interrupt status bit set
# (INTR[IPCMDERR] or INTR[AHBCMDERR]) when using this instruction in IP command or AHB write command.
# - CMD_DDR, (33): Transmit command code to Flash.
# - RADDR_DDR, (34): Transmit row address to Flash.
# - CADDR_DDR, (35): Transmit column address to Flash.
# - MODE1_DDR, (36): Transmit mode bits to Flash.
# - MODE2_DDR, (37): Transmit mode bits to Flash.
# - MODE4_DDR, (38): Transmit mode bits to Flash.
# - MODE8_DDR, (39): Transmit mode bits to Flash.
# - WRITE_DDR, (40): Transmit program data to Flash device.
# - READ_DDR, (41): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_DDR, (42): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_DDR, (43): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_DDR, (44): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_DDR, (45): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# Possible options: <STOP, CMD_SDR, RADDR_SDR, CADDR_SDR, MODE1_SDR, MODE2_SDR, MODE4_SDR, MODE8_SDR, WRITE_SDR,
# READ_SDR, LEARN_SDR, DATSZ_SDR, DUMMY_SDR, DUMMY_RWDS_SDR, JMP_ON_CS, CMD_DDR, RADDR_DDR, CADDR_DDR, MODE1_DDR,
# MODE2_DDR, MODE4_DDR, MODE8_DDR, WRITE_DDR, READ_DDR, LEARN_DDR, DATSZ_DDR, DUMMY_DDR, DUMMY_RWDS_DDR>
OPERATION_CODE: STOP
lookupTable_seq4_instr1:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq4_instr2:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq4_instr3:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq4_instr4:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq4_instr5:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq4_instr6:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq4_instr7:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
# -----------------------------------===== lookupTable_seq5_instr0 [Optional] =====-----------------------------------
# Description: Offset: 0x000000D0, Width: 16b; Lookup table holds Flash command sequences 5, instruction 0
lookupTable_seq5_instr0:
# ------------------------------------------===== OPERAND [Optional] =====------------------------------------------
# Description: Offset: 0b, Width: 8b, Instruction operand. Its values depends on used instruction
OPERAND: 0
# -----------------------------------------===== NUM_PADS [Optional] =====------------------------------------------
# Description: Offset: 8b, Width: 2b, Number of pads used by instruction. Some instructions ignores this parameter.
# - 1PAD, (0): Single mode. One pad is used.
# - 2PAD, (1): Dual mode. Two pads are used.
# - 4PAD, (2): Quad mode. Four pads are used.
# - 8PAD, (3): Octal mode. Eight pads are used.
# Possible options: <1PAD, 2PAD, 4PAD, 8PAD>
NUM_PADS: 1PAD
# --------------------------------------===== OPERATION_CODE [Optional] =====---------------------------------------
# Description: Offset: 10b, Width: 6b, Instruction operation code.
# - STOP, (0): Stop execution and de-assert CS. Then, the next command sequence (to the same flash device) starts
# from instruction pointer 0.
# - CMD_SDR, (1): Transmit command code to Flash.
# - RADDR_SDR, (2): Transmit row address to Flash.
# - CADDR_SDR, (3): Transmit column address to Flash.
# - MODE1_SDR, (4): Transmit mode bits to Flash.
# - MODE2_SDR, (5): Transmit mode bits to Flash.
# - MODE4_SDR, (6): Transmit mode bits to Flash.
# - MODE8_SDR, (7): Transmit mode bits to Flash.
# - WRITE_SDR, (8): Transmit program data to Flash device.
# - READ_SDR, (9): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_SDR, (10): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_SDR, (11): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_SDR, (12): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_SDR, (13): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# - JMP_ON_CS, (31): Stop execution, de-assert CS and save operand[7:0] as the instruction start pointer for next
# sequence.Normally this instruction is used to support Execute-In-Place enhanced mode. See XIP enhanced mode for
# more details.This instruction is only allowed for AHB read commands. There is interrupt status bit set
# (INTR[IPCMDERR] or INTR[AHBCMDERR]) when using this instruction in IP command or AHB write command.
# - CMD_DDR, (33): Transmit command code to Flash.
# - RADDR_DDR, (34): Transmit row address to Flash.
# - CADDR_DDR, (35): Transmit column address to Flash.
# - MODE1_DDR, (36): Transmit mode bits to Flash.
# - MODE2_DDR, (37): Transmit mode bits to Flash.
# - MODE4_DDR, (38): Transmit mode bits to Flash.
# - MODE8_DDR, (39): Transmit mode bits to Flash.
# - WRITE_DDR, (40): Transmit program data to Flash device.
# - READ_DDR, (41): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_DDR, (42): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_DDR, (43): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_DDR, (44): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_DDR, (45): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# Possible options: <STOP, CMD_SDR, RADDR_SDR, CADDR_SDR, MODE1_SDR, MODE2_SDR, MODE4_SDR, MODE8_SDR, WRITE_SDR,
# READ_SDR, LEARN_SDR, DATSZ_SDR, DUMMY_SDR, DUMMY_RWDS_SDR, JMP_ON_CS, CMD_DDR, RADDR_DDR, CADDR_DDR, MODE1_DDR,
# MODE2_DDR, MODE4_DDR, MODE8_DDR, WRITE_DDR, READ_DDR, LEARN_DDR, DATSZ_DDR, DUMMY_DDR, DUMMY_RWDS_DDR>
OPERATION_CODE: STOP
lookupTable_seq5_instr1:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq5_instr2:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq5_instr3:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq5_instr4:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq5_instr5:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq5_instr6:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq5_instr7:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
# -----------------------------------===== lookupTable_seq6_instr0 [Optional] =====-----------------------------------
# Description: Offset: 0x000000E0, Width: 16b; Lookup table holds Flash command sequences 6, instruction 0
lookupTable_seq6_instr0:
# ------------------------------------------===== OPERAND [Optional] =====------------------------------------------
# Description: Offset: 0b, Width: 8b, Instruction operand. Its values depends on used instruction
OPERAND: 0
# -----------------------------------------===== NUM_PADS [Optional] =====------------------------------------------
# Description: Offset: 8b, Width: 2b, Number of pads used by instruction. Some instructions ignores this parameter.
# - 1PAD, (0): Single mode. One pad is used.
# - 2PAD, (1): Dual mode. Two pads are used.
# - 4PAD, (2): Quad mode. Four pads are used.
# - 8PAD, (3): Octal mode. Eight pads are used.
# Possible options: <1PAD, 2PAD, 4PAD, 8PAD>
NUM_PADS: 1PAD
# --------------------------------------===== OPERATION_CODE [Optional] =====---------------------------------------
# Description: Offset: 10b, Width: 6b, Instruction operation code.
# - STOP, (0): Stop execution and de-assert CS. Then, the next command sequence (to the same flash device) starts
# from instruction pointer 0.
# - CMD_SDR, (1): Transmit command code to Flash.
# - RADDR_SDR, (2): Transmit row address to Flash.
# - CADDR_SDR, (3): Transmit column address to Flash.
# - MODE1_SDR, (4): Transmit mode bits to Flash.
# - MODE2_SDR, (5): Transmit mode bits to Flash.
# - MODE4_SDR, (6): Transmit mode bits to Flash.
# - MODE8_SDR, (7): Transmit mode bits to Flash.
# - WRITE_SDR, (8): Transmit program data to Flash device.
# - READ_SDR, (9): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_SDR, (10): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_SDR, (11): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_SDR, (12): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_SDR, (13): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# - JMP_ON_CS, (31): Stop execution, de-assert CS and save operand[7:0] as the instruction start pointer for next
# sequence.Normally this instruction is used to support Execute-In-Place enhanced mode. See XIP enhanced mode for
# more details.This instruction is only allowed for AHB read commands. There is interrupt status bit set
# (INTR[IPCMDERR] or INTR[AHBCMDERR]) when using this instruction in IP command or AHB write command.
# - CMD_DDR, (33): Transmit command code to Flash.
# - RADDR_DDR, (34): Transmit row address to Flash.
# - CADDR_DDR, (35): Transmit column address to Flash.
# - MODE1_DDR, (36): Transmit mode bits to Flash.
# - MODE2_DDR, (37): Transmit mode bits to Flash.
# - MODE4_DDR, (38): Transmit mode bits to Flash.
# - MODE8_DDR, (39): Transmit mode bits to Flash.
# - WRITE_DDR, (40): Transmit program data to Flash device.
# - READ_DDR, (41): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_DDR, (42): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_DDR, (43): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_DDR, (44): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_DDR, (45): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# Possible options: <STOP, CMD_SDR, RADDR_SDR, CADDR_SDR, MODE1_SDR, MODE2_SDR, MODE4_SDR, MODE8_SDR, WRITE_SDR,
# READ_SDR, LEARN_SDR, DATSZ_SDR, DUMMY_SDR, DUMMY_RWDS_SDR, JMP_ON_CS, CMD_DDR, RADDR_DDR, CADDR_DDR, MODE1_DDR,
# MODE2_DDR, MODE4_DDR, MODE8_DDR, WRITE_DDR, READ_DDR, LEARN_DDR, DATSZ_DDR, DUMMY_DDR, DUMMY_RWDS_DDR>
OPERATION_CODE: STOP
lookupTable_seq6_instr1:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq6_instr2:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq6_instr3:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq6_instr4:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq6_instr5:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq6_instr6:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq6_instr7:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
# -----------------------------------===== lookupTable_seq7_instr0 [Optional] =====-----------------------------------
# Description: Offset: 0x000000F0, Width: 16b; Lookup table holds Flash command sequences 7, instruction 0
lookupTable_seq7_instr0:
# ------------------------------------------===== OPERAND [Optional] =====------------------------------------------
# Description: Offset: 0b, Width: 8b, Instruction operand. Its values depends on used instruction
OPERAND: 0
# -----------------------------------------===== NUM_PADS [Optional] =====------------------------------------------
# Description: Offset: 8b, Width: 2b, Number of pads used by instruction. Some instructions ignores this parameter.
# - 1PAD, (0): Single mode. One pad is used.
# - 2PAD, (1): Dual mode. Two pads are used.
# - 4PAD, (2): Quad mode. Four pads are used.
# - 8PAD, (3): Octal mode. Eight pads are used.
# Possible options: <1PAD, 2PAD, 4PAD, 8PAD>
NUM_PADS: 1PAD
# --------------------------------------===== OPERATION_CODE [Optional] =====---------------------------------------
# Description: Offset: 10b, Width: 6b, Instruction operation code.
# - STOP, (0): Stop execution and de-assert CS. Then, the next command sequence (to the same flash device) starts
# from instruction pointer 0.
# - CMD_SDR, (1): Transmit command code to Flash.
# - RADDR_SDR, (2): Transmit row address to Flash.
# - CADDR_SDR, (3): Transmit column address to Flash.
# - MODE1_SDR, (4): Transmit mode bits to Flash.
# - MODE2_SDR, (5): Transmit mode bits to Flash.
# - MODE4_SDR, (6): Transmit mode bits to Flash.
# - MODE8_SDR, (7): Transmit mode bits to Flash.
# - WRITE_SDR, (8): Transmit program data to Flash device.
# - READ_SDR, (9): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_SDR, (10): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_SDR, (11): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_SDR, (12): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_SDR, (13): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# - JMP_ON_CS, (31): Stop execution, de-assert CS and save operand[7:0] as the instruction start pointer for next
# sequence.Normally this instruction is used to support Execute-In-Place enhanced mode. See XIP enhanced mode for
# more details.This instruction is only allowed for AHB read commands. There is interrupt status bit set
# (INTR[IPCMDERR] or INTR[AHBCMDERR]) when using this instruction in IP command or AHB write command.
# - CMD_DDR, (33): Transmit command code to Flash.
# - RADDR_DDR, (34): Transmit row address to Flash.
# - CADDR_DDR, (35): Transmit column address to Flash.
# - MODE1_DDR, (36): Transmit mode bits to Flash.
# - MODE2_DDR, (37): Transmit mode bits to Flash.
# - MODE4_DDR, (38): Transmit mode bits to Flash.
# - MODE8_DDR, (39): Transmit mode bits to Flash.
# - WRITE_DDR, (40): Transmit program data to Flash device.
# - READ_DDR, (41): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_DDR, (42): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_DDR, (43): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_DDR, (44): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_DDR, (45): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# Possible options: <STOP, CMD_SDR, RADDR_SDR, CADDR_SDR, MODE1_SDR, MODE2_SDR, MODE4_SDR, MODE8_SDR, WRITE_SDR,
# READ_SDR, LEARN_SDR, DATSZ_SDR, DUMMY_SDR, DUMMY_RWDS_SDR, JMP_ON_CS, CMD_DDR, RADDR_DDR, CADDR_DDR, MODE1_DDR,
# MODE2_DDR, MODE4_DDR, MODE8_DDR, WRITE_DDR, READ_DDR, LEARN_DDR, DATSZ_DDR, DUMMY_DDR, DUMMY_RWDS_DDR>
OPERATION_CODE: STOP
lookupTable_seq7_instr1:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq7_instr2:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq7_instr3:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq7_instr4:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq7_instr5:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq7_instr6:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq7_instr7:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
# -----------------------------------===== lookupTable_seq8_instr0 [Optional] =====-----------------------------------
# Description: Offset: 0x00000100, Width: 16b; Lookup table holds Flash command sequences 8, instruction 0
lookupTable_seq8_instr0:
# ------------------------------------------===== OPERAND [Optional] =====------------------------------------------
# Description: Offset: 0b, Width: 8b, Instruction operand. Its values depends on used instruction
OPERAND: 0
# -----------------------------------------===== NUM_PADS [Optional] =====------------------------------------------
# Description: Offset: 8b, Width: 2b, Number of pads used by instruction. Some instructions ignores this parameter.
# - 1PAD, (0): Single mode. One pad is used.
# - 2PAD, (1): Dual mode. Two pads are used.
# - 4PAD, (2): Quad mode. Four pads are used.
# - 8PAD, (3): Octal mode. Eight pads are used.
# Possible options: <1PAD, 2PAD, 4PAD, 8PAD>
NUM_PADS: 1PAD
# --------------------------------------===== OPERATION_CODE [Optional] =====---------------------------------------
# Description: Offset: 10b, Width: 6b, Instruction operation code.
# - STOP, (0): Stop execution and de-assert CS. Then, the next command sequence (to the same flash device) starts
# from instruction pointer 0.
# - CMD_SDR, (1): Transmit command code to Flash.
# - RADDR_SDR, (2): Transmit row address to Flash.
# - CADDR_SDR, (3): Transmit column address to Flash.
# - MODE1_SDR, (4): Transmit mode bits to Flash.
# - MODE2_SDR, (5): Transmit mode bits to Flash.
# - MODE4_SDR, (6): Transmit mode bits to Flash.
# - MODE8_SDR, (7): Transmit mode bits to Flash.
# - WRITE_SDR, (8): Transmit program data to Flash device.
# - READ_SDR, (9): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_SDR, (10): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_SDR, (11): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_SDR, (12): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_SDR, (13): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# - JMP_ON_CS, (31): Stop execution, de-assert CS and save operand[7:0] as the instruction start pointer for next
# sequence.Normally this instruction is used to support Execute-In-Place enhanced mode. See XIP enhanced mode for
# more details.This instruction is only allowed for AHB read commands. There is interrupt status bit set
# (INTR[IPCMDERR] or INTR[AHBCMDERR]) when using this instruction in IP command or AHB write command.
# - CMD_DDR, (33): Transmit command code to Flash.
# - RADDR_DDR, (34): Transmit row address to Flash.
# - CADDR_DDR, (35): Transmit column address to Flash.
# - MODE1_DDR, (36): Transmit mode bits to Flash.
# - MODE2_DDR, (37): Transmit mode bits to Flash.
# - MODE4_DDR, (38): Transmit mode bits to Flash.
# - MODE8_DDR, (39): Transmit mode bits to Flash.
# - WRITE_DDR, (40): Transmit program data to Flash device.
# - READ_DDR, (41): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_DDR, (42): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_DDR, (43): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_DDR, (44): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_DDR, (45): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# Possible options: <STOP, CMD_SDR, RADDR_SDR, CADDR_SDR, MODE1_SDR, MODE2_SDR, MODE4_SDR, MODE8_SDR, WRITE_SDR,
# READ_SDR, LEARN_SDR, DATSZ_SDR, DUMMY_SDR, DUMMY_RWDS_SDR, JMP_ON_CS, CMD_DDR, RADDR_DDR, CADDR_DDR, MODE1_DDR,
# MODE2_DDR, MODE4_DDR, MODE8_DDR, WRITE_DDR, READ_DDR, LEARN_DDR, DATSZ_DDR, DUMMY_DDR, DUMMY_RWDS_DDR>
OPERATION_CODE: STOP
lookupTable_seq8_instr1:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq8_instr2:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq8_instr3:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq8_instr4:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq8_instr5:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq8_instr6:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq8_instr7:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
# -----------------------------------===== lookupTable_seq9_instr0 [Optional] =====-----------------------------------
# Description: Offset: 0x00000110, Width: 16b; Lookup table holds Flash command sequences 9, instruction 0
lookupTable_seq9_instr0:
# ------------------------------------------===== OPERAND [Optional] =====------------------------------------------
# Description: Offset: 0b, Width: 8b, Instruction operand. Its values depends on used instruction
OPERAND: 0
# -----------------------------------------===== NUM_PADS [Optional] =====------------------------------------------
# Description: Offset: 8b, Width: 2b, Number of pads used by instruction. Some instructions ignores this parameter.
# - 1PAD, (0): Single mode. One pad is used.
# - 2PAD, (1): Dual mode. Two pads are used.
# - 4PAD, (2): Quad mode. Four pads are used.
# - 8PAD, (3): Octal mode. Eight pads are used.
# Possible options: <1PAD, 2PAD, 4PAD, 8PAD>
NUM_PADS: 1PAD
# --------------------------------------===== OPERATION_CODE [Optional] =====---------------------------------------
# Description: Offset: 10b, Width: 6b, Instruction operation code.
# - STOP, (0): Stop execution and de-assert CS. Then, the next command sequence (to the same flash device) starts
# from instruction pointer 0.
# - CMD_SDR, (1): Transmit command code to Flash.
# - RADDR_SDR, (2): Transmit row address to Flash.
# - CADDR_SDR, (3): Transmit column address to Flash.
# - MODE1_SDR, (4): Transmit mode bits to Flash.
# - MODE2_SDR, (5): Transmit mode bits to Flash.
# - MODE4_SDR, (6): Transmit mode bits to Flash.
# - MODE8_SDR, (7): Transmit mode bits to Flash.
# - WRITE_SDR, (8): Transmit program data to Flash device.
# - READ_SDR, (9): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_SDR, (10): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_SDR, (11): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_SDR, (12): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_SDR, (13): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# - JMP_ON_CS, (31): Stop execution, de-assert CS and save operand[7:0] as the instruction start pointer for next
# sequence.Normally this instruction is used to support Execute-In-Place enhanced mode. See XIP enhanced mode for
# more details.This instruction is only allowed for AHB read commands. There is interrupt status bit set
# (INTR[IPCMDERR] or INTR[AHBCMDERR]) when using this instruction in IP command or AHB write command.
# - CMD_DDR, (33): Transmit command code to Flash.
# - RADDR_DDR, (34): Transmit row address to Flash.
# - CADDR_DDR, (35): Transmit column address to Flash.
# - MODE1_DDR, (36): Transmit mode bits to Flash.
# - MODE2_DDR, (37): Transmit mode bits to Flash.
# - MODE4_DDR, (38): Transmit mode bits to Flash.
# - MODE8_DDR, (39): Transmit mode bits to Flash.
# - WRITE_DDR, (40): Transmit program data to Flash device.
# - READ_DDR, (41): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_DDR, (42): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_DDR, (43): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_DDR, (44): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_DDR, (45): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# Possible options: <STOP, CMD_SDR, RADDR_SDR, CADDR_SDR, MODE1_SDR, MODE2_SDR, MODE4_SDR, MODE8_SDR, WRITE_SDR,
# READ_SDR, LEARN_SDR, DATSZ_SDR, DUMMY_SDR, DUMMY_RWDS_SDR, JMP_ON_CS, CMD_DDR, RADDR_DDR, CADDR_DDR, MODE1_DDR,
# MODE2_DDR, MODE4_DDR, MODE8_DDR, WRITE_DDR, READ_DDR, LEARN_DDR, DATSZ_DDR, DUMMY_DDR, DUMMY_RWDS_DDR>
OPERATION_CODE: STOP
lookupTable_seq9_instr1:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq9_instr2:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq9_instr3:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq9_instr4:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq9_instr5:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq9_instr6:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq9_instr7:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
# ----------------------------------===== lookupTable_seq10_instr0 [Optional] =====-----------------------------------
# Description: Offset: 0x00000120, Width: 16b; Lookup table holds Flash command sequences 10, instruction 0
lookupTable_seq10_instr0:
# ------------------------------------------===== OPERAND [Optional] =====------------------------------------------
# Description: Offset: 0b, Width: 8b, Instruction operand. Its values depends on used instruction
OPERAND: 0
# -----------------------------------------===== NUM_PADS [Optional] =====------------------------------------------
# Description: Offset: 8b, Width: 2b, Number of pads used by instruction. Some instructions ignores this parameter.
# - 1PAD, (0): Single mode. One pad is used.
# - 2PAD, (1): Dual mode. Two pads are used.
# - 4PAD, (2): Quad mode. Four pads are used.
# - 8PAD, (3): Octal mode. Eight pads are used.
# Possible options: <1PAD, 2PAD, 4PAD, 8PAD>
NUM_PADS: 1PAD
# --------------------------------------===== OPERATION_CODE [Optional] =====---------------------------------------
# Description: Offset: 10b, Width: 6b, Instruction operation code.
# - STOP, (0): Stop execution and de-assert CS. Then, the next command sequence (to the same flash device) starts
# from instruction pointer 0.
# - CMD_SDR, (1): Transmit command code to Flash.
# - RADDR_SDR, (2): Transmit row address to Flash.
# - CADDR_SDR, (3): Transmit column address to Flash.
# - MODE1_SDR, (4): Transmit mode bits to Flash.
# - MODE2_SDR, (5): Transmit mode bits to Flash.
# - MODE4_SDR, (6): Transmit mode bits to Flash.
# - MODE8_SDR, (7): Transmit mode bits to Flash.
# - WRITE_SDR, (8): Transmit program data to Flash device.
# - READ_SDR, (9): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_SDR, (10): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_SDR, (11): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_SDR, (12): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_SDR, (13): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# - JMP_ON_CS, (31): Stop execution, de-assert CS and save operand[7:0] as the instruction start pointer for next
# sequence.Normally this instruction is used to support Execute-In-Place enhanced mode. See XIP enhanced mode for
# more details.This instruction is only allowed for AHB read commands. There is interrupt status bit set
# (INTR[IPCMDERR] or INTR[AHBCMDERR]) when using this instruction in IP command or AHB write command.
# - CMD_DDR, (33): Transmit command code to Flash.
# - RADDR_DDR, (34): Transmit row address to Flash.
# - CADDR_DDR, (35): Transmit column address to Flash.
# - MODE1_DDR, (36): Transmit mode bits to Flash.
# - MODE2_DDR, (37): Transmit mode bits to Flash.
# - MODE4_DDR, (38): Transmit mode bits to Flash.
# - MODE8_DDR, (39): Transmit mode bits to Flash.
# - WRITE_DDR, (40): Transmit program data to Flash device.
# - READ_DDR, (41): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_DDR, (42): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_DDR, (43): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_DDR, (44): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_DDR, (45): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# Possible options: <STOP, CMD_SDR, RADDR_SDR, CADDR_SDR, MODE1_SDR, MODE2_SDR, MODE4_SDR, MODE8_SDR, WRITE_SDR,
# READ_SDR, LEARN_SDR, DATSZ_SDR, DUMMY_SDR, DUMMY_RWDS_SDR, JMP_ON_CS, CMD_DDR, RADDR_DDR, CADDR_DDR, MODE1_DDR,
# MODE2_DDR, MODE4_DDR, MODE8_DDR, WRITE_DDR, READ_DDR, LEARN_DDR, DATSZ_DDR, DUMMY_DDR, DUMMY_RWDS_DDR>
OPERATION_CODE: STOP
lookupTable_seq10_instr1:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq10_instr2:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq10_instr3:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq10_instr4:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq10_instr5:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq10_instr6:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq10_instr7:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
# ----------------------------------===== lookupTable_seq11_instr0 [Optional] =====-----------------------------------
# Description: Offset: 0x00000130, Width: 16b; Lookup table holds Flash command sequences 11, instruction 0
lookupTable_seq11_instr0:
# ------------------------------------------===== OPERAND [Optional] =====------------------------------------------
# Description: Offset: 0b, Width: 8b, Instruction operand. Its values depends on used instruction
OPERAND: 0
# -----------------------------------------===== NUM_PADS [Optional] =====------------------------------------------
# Description: Offset: 8b, Width: 2b, Number of pads used by instruction. Some instructions ignores this parameter.
# - 1PAD, (0): Single mode. One pad is used.
# - 2PAD, (1): Dual mode. Two pads are used.
# - 4PAD, (2): Quad mode. Four pads are used.
# - 8PAD, (3): Octal mode. Eight pads are used.
# Possible options: <1PAD, 2PAD, 4PAD, 8PAD>
NUM_PADS: 1PAD
# --------------------------------------===== OPERATION_CODE [Optional] =====---------------------------------------
# Description: Offset: 10b, Width: 6b, Instruction operation code.
# - STOP, (0): Stop execution and de-assert CS. Then, the next command sequence (to the same flash device) starts
# from instruction pointer 0.
# - CMD_SDR, (1): Transmit command code to Flash.
# - RADDR_SDR, (2): Transmit row address to Flash.
# - CADDR_SDR, (3): Transmit column address to Flash.
# - MODE1_SDR, (4): Transmit mode bits to Flash.
# - MODE2_SDR, (5): Transmit mode bits to Flash.
# - MODE4_SDR, (6): Transmit mode bits to Flash.
# - MODE8_SDR, (7): Transmit mode bits to Flash.
# - WRITE_SDR, (8): Transmit program data to Flash device.
# - READ_SDR, (9): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_SDR, (10): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_SDR, (11): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_SDR, (12): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_SDR, (13): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# - JMP_ON_CS, (31): Stop execution, de-assert CS and save operand[7:0] as the instruction start pointer for next
# sequence.Normally this instruction is used to support Execute-In-Place enhanced mode. See XIP enhanced mode for
# more details.This instruction is only allowed for AHB read commands. There is interrupt status bit set
# (INTR[IPCMDERR] or INTR[AHBCMDERR]) when using this instruction in IP command or AHB write command.
# - CMD_DDR, (33): Transmit command code to Flash.
# - RADDR_DDR, (34): Transmit row address to Flash.
# - CADDR_DDR, (35): Transmit column address to Flash.
# - MODE1_DDR, (36): Transmit mode bits to Flash.
# - MODE2_DDR, (37): Transmit mode bits to Flash.
# - MODE4_DDR, (38): Transmit mode bits to Flash.
# - MODE8_DDR, (39): Transmit mode bits to Flash.
# - WRITE_DDR, (40): Transmit program data to Flash device.
# - READ_DDR, (41): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_DDR, (42): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_DDR, (43): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_DDR, (44): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_DDR, (45): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# Possible options: <STOP, CMD_SDR, RADDR_SDR, CADDR_SDR, MODE1_SDR, MODE2_SDR, MODE4_SDR, MODE8_SDR, WRITE_SDR,
# READ_SDR, LEARN_SDR, DATSZ_SDR, DUMMY_SDR, DUMMY_RWDS_SDR, JMP_ON_CS, CMD_DDR, RADDR_DDR, CADDR_DDR, MODE1_DDR,
# MODE2_DDR, MODE4_DDR, MODE8_DDR, WRITE_DDR, READ_DDR, LEARN_DDR, DATSZ_DDR, DUMMY_DDR, DUMMY_RWDS_DDR>
OPERATION_CODE: STOP
lookupTable_seq11_instr1:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq11_instr2:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq11_instr3:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq11_instr4:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq11_instr5:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq11_instr6:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq11_instr7:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
# ----------------------------------===== lookupTable_seq12_instr0 [Optional] =====-----------------------------------
# Description: Offset: 0x00000140, Width: 16b; Lookup table holds Flash command sequences 12, instruction 0
lookupTable_seq12_instr0:
# ------------------------------------------===== OPERAND [Optional] =====------------------------------------------
# Description: Offset: 0b, Width: 8b, Instruction operand. Its values depends on used instruction
OPERAND: 0
# -----------------------------------------===== NUM_PADS [Optional] =====------------------------------------------
# Description: Offset: 8b, Width: 2b, Number of pads used by instruction. Some instructions ignores this parameter.
# - 1PAD, (0): Single mode. One pad is used.
# - 2PAD, (1): Dual mode. Two pads are used.
# - 4PAD, (2): Quad mode. Four pads are used.
# - 8PAD, (3): Octal mode. Eight pads are used.
# Possible options: <1PAD, 2PAD, 4PAD, 8PAD>
NUM_PADS: 1PAD
# --------------------------------------===== OPERATION_CODE [Optional] =====---------------------------------------
# Description: Offset: 10b, Width: 6b, Instruction operation code.
# - STOP, (0): Stop execution and de-assert CS. Then, the next command sequence (to the same flash device) starts
# from instruction pointer 0.
# - CMD_SDR, (1): Transmit command code to Flash.
# - RADDR_SDR, (2): Transmit row address to Flash.
# - CADDR_SDR, (3): Transmit column address to Flash.
# - MODE1_SDR, (4): Transmit mode bits to Flash.
# - MODE2_SDR, (5): Transmit mode bits to Flash.
# - MODE4_SDR, (6): Transmit mode bits to Flash.
# - MODE8_SDR, (7): Transmit mode bits to Flash.
# - WRITE_SDR, (8): Transmit program data to Flash device.
# - READ_SDR, (9): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_SDR, (10): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_SDR, (11): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_SDR, (12): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_SDR, (13): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# - JMP_ON_CS, (31): Stop execution, de-assert CS and save operand[7:0] as the instruction start pointer for next
# sequence.Normally this instruction is used to support Execute-In-Place enhanced mode. See XIP enhanced mode for
# more details.This instruction is only allowed for AHB read commands. There is interrupt status bit set
# (INTR[IPCMDERR] or INTR[AHBCMDERR]) when using this instruction in IP command or AHB write command.
# - CMD_DDR, (33): Transmit command code to Flash.
# - RADDR_DDR, (34): Transmit row address to Flash.
# - CADDR_DDR, (35): Transmit column address to Flash.
# - MODE1_DDR, (36): Transmit mode bits to Flash.
# - MODE2_DDR, (37): Transmit mode bits to Flash.
# - MODE4_DDR, (38): Transmit mode bits to Flash.
# - MODE8_DDR, (39): Transmit mode bits to Flash.
# - WRITE_DDR, (40): Transmit program data to Flash device.
# - READ_DDR, (41): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_DDR, (42): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_DDR, (43): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_DDR, (44): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_DDR, (45): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# Possible options: <STOP, CMD_SDR, RADDR_SDR, CADDR_SDR, MODE1_SDR, MODE2_SDR, MODE4_SDR, MODE8_SDR, WRITE_SDR,
# READ_SDR, LEARN_SDR, DATSZ_SDR, DUMMY_SDR, DUMMY_RWDS_SDR, JMP_ON_CS, CMD_DDR, RADDR_DDR, CADDR_DDR, MODE1_DDR,
# MODE2_DDR, MODE4_DDR, MODE8_DDR, WRITE_DDR, READ_DDR, LEARN_DDR, DATSZ_DDR, DUMMY_DDR, DUMMY_RWDS_DDR>
OPERATION_CODE: STOP
lookupTable_seq12_instr1:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq12_instr2:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq12_instr3:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq12_instr4:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq12_instr5:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq12_instr6:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq12_instr7:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
# ----------------------------------===== lookupTable_seq13_instr0 [Optional] =====-----------------------------------
# Description: Offset: 0x00000150, Width: 16b; Lookup table holds Flash command sequences 13, instruction 0
lookupTable_seq13_instr0:
# ------------------------------------------===== OPERAND [Optional] =====------------------------------------------
# Description: Offset: 0b, Width: 8b, Instruction operand. Its values depends on used instruction
OPERAND: 0
# -----------------------------------------===== NUM_PADS [Optional] =====------------------------------------------
# Description: Offset: 8b, Width: 2b, Number of pads used by instruction. Some instructions ignores this parameter.
# - 1PAD, (0): Single mode. One pad is used.
# - 2PAD, (1): Dual mode. Two pads are used.
# - 4PAD, (2): Quad mode. Four pads are used.
# - 8PAD, (3): Octal mode. Eight pads are used.
# Possible options: <1PAD, 2PAD, 4PAD, 8PAD>
NUM_PADS: 1PAD
# --------------------------------------===== OPERATION_CODE [Optional] =====---------------------------------------
# Description: Offset: 10b, Width: 6b, Instruction operation code.
# - STOP, (0): Stop execution and de-assert CS. Then, the next command sequence (to the same flash device) starts
# from instruction pointer 0.
# - CMD_SDR, (1): Transmit command code to Flash.
# - RADDR_SDR, (2): Transmit row address to Flash.
# - CADDR_SDR, (3): Transmit column address to Flash.
# - MODE1_SDR, (4): Transmit mode bits to Flash.
# - MODE2_SDR, (5): Transmit mode bits to Flash.
# - MODE4_SDR, (6): Transmit mode bits to Flash.
# - MODE8_SDR, (7): Transmit mode bits to Flash.
# - WRITE_SDR, (8): Transmit program data to Flash device.
# - READ_SDR, (9): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_SDR, (10): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_SDR, (11): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_SDR, (12): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_SDR, (13): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# - JMP_ON_CS, (31): Stop execution, de-assert CS and save operand[7:0] as the instruction start pointer for next
# sequence.Normally this instruction is used to support Execute-In-Place enhanced mode. See XIP enhanced mode for
# more details.This instruction is only allowed for AHB read commands. There is interrupt status bit set
# (INTR[IPCMDERR] or INTR[AHBCMDERR]) when using this instruction in IP command or AHB write command.
# - CMD_DDR, (33): Transmit command code to Flash.
# - RADDR_DDR, (34): Transmit row address to Flash.
# - CADDR_DDR, (35): Transmit column address to Flash.
# - MODE1_DDR, (36): Transmit mode bits to Flash.
# - MODE2_DDR, (37): Transmit mode bits to Flash.
# - MODE4_DDR, (38): Transmit mode bits to Flash.
# - MODE8_DDR, (39): Transmit mode bits to Flash.
# - WRITE_DDR, (40): Transmit program data to Flash device.
# - READ_DDR, (41): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_DDR, (42): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_DDR, (43): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_DDR, (44): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_DDR, (45): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# Possible options: <STOP, CMD_SDR, RADDR_SDR, CADDR_SDR, MODE1_SDR, MODE2_SDR, MODE4_SDR, MODE8_SDR, WRITE_SDR,
# READ_SDR, LEARN_SDR, DATSZ_SDR, DUMMY_SDR, DUMMY_RWDS_SDR, JMP_ON_CS, CMD_DDR, RADDR_DDR, CADDR_DDR, MODE1_DDR,
# MODE2_DDR, MODE4_DDR, MODE8_DDR, WRITE_DDR, READ_DDR, LEARN_DDR, DATSZ_DDR, DUMMY_DDR, DUMMY_RWDS_DDR>
OPERATION_CODE: STOP
lookupTable_seq13_instr1:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq13_instr2:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq13_instr3:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq13_instr4:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq13_instr5:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq13_instr6:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq13_instr7:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
# ----------------------------------===== lookupTable_seq14_instr0 [Optional] =====-----------------------------------
# Description: Offset: 0x00000160, Width: 16b; Lookup table holds Flash command sequences 14, instruction 0
lookupTable_seq14_instr0:
# ------------------------------------------===== OPERAND [Optional] =====------------------------------------------
# Description: Offset: 0b, Width: 8b, Instruction operand. Its values depends on used instruction
OPERAND: 0
# -----------------------------------------===== NUM_PADS [Optional] =====------------------------------------------
# Description: Offset: 8b, Width: 2b, Number of pads used by instruction. Some instructions ignores this parameter.
# - 1PAD, (0): Single mode. One pad is used.
# - 2PAD, (1): Dual mode. Two pads are used.
# - 4PAD, (2): Quad mode. Four pads are used.
# - 8PAD, (3): Octal mode. Eight pads are used.
# Possible options: <1PAD, 2PAD, 4PAD, 8PAD>
NUM_PADS: 1PAD
# --------------------------------------===== OPERATION_CODE [Optional] =====---------------------------------------
# Description: Offset: 10b, Width: 6b, Instruction operation code.
# - STOP, (0): Stop execution and de-assert CS. Then, the next command sequence (to the same flash device) starts
# from instruction pointer 0.
# - CMD_SDR, (1): Transmit command code to Flash.
# - RADDR_SDR, (2): Transmit row address to Flash.
# - CADDR_SDR, (3): Transmit column address to Flash.
# - MODE1_SDR, (4): Transmit mode bits to Flash.
# - MODE2_SDR, (5): Transmit mode bits to Flash.
# - MODE4_SDR, (6): Transmit mode bits to Flash.
# - MODE8_SDR, (7): Transmit mode bits to Flash.
# - WRITE_SDR, (8): Transmit program data to Flash device.
# - READ_SDR, (9): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_SDR, (10): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_SDR, (11): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_SDR, (12): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_SDR, (13): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# - JMP_ON_CS, (31): Stop execution, de-assert CS and save operand[7:0] as the instruction start pointer for next
# sequence.Normally this instruction is used to support Execute-In-Place enhanced mode. See XIP enhanced mode for
# more details.This instruction is only allowed for AHB read commands. There is interrupt status bit set
# (INTR[IPCMDERR] or INTR[AHBCMDERR]) when using this instruction in IP command or AHB write command.
# - CMD_DDR, (33): Transmit command code to Flash.
# - RADDR_DDR, (34): Transmit row address to Flash.
# - CADDR_DDR, (35): Transmit column address to Flash.
# - MODE1_DDR, (36): Transmit mode bits to Flash.
# - MODE2_DDR, (37): Transmit mode bits to Flash.
# - MODE4_DDR, (38): Transmit mode bits to Flash.
# - MODE8_DDR, (39): Transmit mode bits to Flash.
# - WRITE_DDR, (40): Transmit program data to Flash device.
# - READ_DDR, (41): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_DDR, (42): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_DDR, (43): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_DDR, (44): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_DDR, (45): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# Possible options: <STOP, CMD_SDR, RADDR_SDR, CADDR_SDR, MODE1_SDR, MODE2_SDR, MODE4_SDR, MODE8_SDR, WRITE_SDR,
# READ_SDR, LEARN_SDR, DATSZ_SDR, DUMMY_SDR, DUMMY_RWDS_SDR, JMP_ON_CS, CMD_DDR, RADDR_DDR, CADDR_DDR, MODE1_DDR,
# MODE2_DDR, MODE4_DDR, MODE8_DDR, WRITE_DDR, READ_DDR, LEARN_DDR, DATSZ_DDR, DUMMY_DDR, DUMMY_RWDS_DDR>
OPERATION_CODE: STOP
lookupTable_seq14_instr1:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq14_instr2:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq14_instr3:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq14_instr4:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq14_instr5:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq14_instr6:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq14_instr7:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
# ----------------------------------===== lookupTable_seq15_instr0 [Optional] =====-----------------------------------
# Description: Offset: 0x00000170, Width: 16b; Lookup table holds Flash command sequences 15, instruction 0
lookupTable_seq15_instr0:
# ------------------------------------------===== OPERAND [Optional] =====------------------------------------------
# Description: Offset: 0b, Width: 8b, Instruction operand. Its values depends on used instruction
OPERAND: 0
# -----------------------------------------===== NUM_PADS [Optional] =====------------------------------------------
# Description: Offset: 8b, Width: 2b, Number of pads used by instruction. Some instructions ignores this parameter.
# - 1PAD, (0): Single mode. One pad is used.
# - 2PAD, (1): Dual mode. Two pads are used.
# - 4PAD, (2): Quad mode. Four pads are used.
# - 8PAD, (3): Octal mode. Eight pads are used.
# Possible options: <1PAD, 2PAD, 4PAD, 8PAD>
NUM_PADS: 1PAD
# --------------------------------------===== OPERATION_CODE [Optional] =====---------------------------------------
# Description: Offset: 10b, Width: 6b, Instruction operation code.
# - STOP, (0): Stop execution and de-assert CS. Then, the next command sequence (to the same flash device) starts
# from instruction pointer 0.
# - CMD_SDR, (1): Transmit command code to Flash.
# - RADDR_SDR, (2): Transmit row address to Flash.
# - CADDR_SDR, (3): Transmit column address to Flash.
# - MODE1_SDR, (4): Transmit mode bits to Flash.
# - MODE2_SDR, (5): Transmit mode bits to Flash.
# - MODE4_SDR, (6): Transmit mode bits to Flash.
# - MODE8_SDR, (7): Transmit mode bits to Flash.
# - WRITE_SDR, (8): Transmit program data to Flash device.
# - READ_SDR, (9): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_SDR, (10): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_SDR, (11): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_SDR, (12): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_SDR, (13): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# - JMP_ON_CS, (31): Stop execution, de-assert CS and save operand[7:0] as the instruction start pointer for next
# sequence.Normally this instruction is used to support Execute-In-Place enhanced mode. See XIP enhanced mode for
# more details.This instruction is only allowed for AHB read commands. There is interrupt status bit set
# (INTR[IPCMDERR] or INTR[AHBCMDERR]) when using this instruction in IP command or AHB write command.
# - CMD_DDR, (33): Transmit command code to Flash.
# - RADDR_DDR, (34): Transmit row address to Flash.
# - CADDR_DDR, (35): Transmit column address to Flash.
# - MODE1_DDR, (36): Transmit mode bits to Flash.
# - MODE2_DDR, (37): Transmit mode bits to Flash.
# - MODE4_DDR, (38): Transmit mode bits to Flash.
# - MODE8_DDR, (39): Transmit mode bits to Flash.
# - WRITE_DDR, (40): Transmit program data to Flash device.
# - READ_DDR, (41): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_DDR, (42): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_DDR, (43): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_DDR, (44): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_DDR, (45): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# Possible options: <STOP, CMD_SDR, RADDR_SDR, CADDR_SDR, MODE1_SDR, MODE2_SDR, MODE4_SDR, MODE8_SDR, WRITE_SDR,
# READ_SDR, LEARN_SDR, DATSZ_SDR, DUMMY_SDR, DUMMY_RWDS_SDR, JMP_ON_CS, CMD_DDR, RADDR_DDR, CADDR_DDR, MODE1_DDR,
# MODE2_DDR, MODE4_DDR, MODE8_DDR, WRITE_DDR, READ_DDR, LEARN_DDR, DATSZ_DDR, DUMMY_DDR, DUMMY_RWDS_DDR>
OPERATION_CODE: STOP
lookupTable_seq15_instr1:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq15_instr2:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq15_instr3:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq15_instr4:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq15_instr5:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq15_instr6:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq15_instr7:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
# ---------------------------------------===== lutCustomSeq_0 [Optional] =====----------------------------------------
# Description: Offset: 0x00000180, Width: 32b; [0x180-0x1af] Customizable LUT Sequences
lutCustomSeq_0:
# ------------------------------------------===== seqNum [Optional] =====-------------------------------------------
# Description: Offset: 0b, Width: 8b, Sequence Number, valid number: 1-16
seqNum: 0
# -------------------------------------------===== seqId [Optional] =====-------------------------------------------
# Description: Offset: 8b, Width: 8b, Sequence Index, valid number: 0-15
seqId: 0
# -----------------------------------------===== reserved [Optional] =====------------------------------------------
# Description: Offset: 16b, Width: 16b, N/A
reserved: 0
# ---------------------------------------===== lutCustomSeq_1 [Optional] =====----------------------------------------
# Description: Offset: 0x00000184, Width: 32b; [0x180-0x1af] Customizable LUT Sequences
lutCustomSeq_1:
# ------------------------------------------===== seqNum [Optional] =====-------------------------------------------
# Description: Offset: 0b, Width: 8b, Sequence Number, valid number: 1-16
seqNum: 0
# -------------------------------------------===== seqId [Optional] =====-------------------------------------------
# Description: Offset: 8b, Width: 8b, Sequence Index, valid number: 0-15
seqId: 0
# -----------------------------------------===== reserved [Optional] =====------------------------------------------
# Description: Offset: 16b, Width: 16b, N/A
reserved: 0
# ---------------------------------------===== lutCustomSeq_2 [Optional] =====----------------------------------------
# Description: Offset: 0x00000188, Width: 32b; [0x180-0x1af] Customizable LUT Sequences
lutCustomSeq_2:
# ------------------------------------------===== seqNum [Optional] =====-------------------------------------------
# Description: Offset: 0b, Width: 8b, Sequence Number, valid number: 1-16
seqNum: 0
# -------------------------------------------===== seqId [Optional] =====-------------------------------------------
# Description: Offset: 8b, Width: 8b, Sequence Index, valid number: 0-15
seqId: 0
# -----------------------------------------===== reserved [Optional] =====------------------------------------------
# Description: Offset: 16b, Width: 16b, N/A
reserved: 0
# ---------------------------------------===== lutCustomSeq_3 [Optional] =====----------------------------------------
# Description: Offset: 0x0000018C, Width: 32b; [0x180-0x1af] Customizable LUT Sequences
lutCustomSeq_3:
# ------------------------------------------===== seqNum [Optional] =====-------------------------------------------
# Description: Offset: 0b, Width: 8b, Sequence Number, valid number: 1-16
seqNum: 0
# -------------------------------------------===== seqId [Optional] =====-------------------------------------------
# Description: Offset: 8b, Width: 8b, Sequence Index, valid number: 0-15
seqId: 0
# -----------------------------------------===== reserved [Optional] =====------------------------------------------
# Description: Offset: 16b, Width: 16b, N/A
reserved: 0
# ---------------------------------------===== lutCustomSeq_4 [Optional] =====----------------------------------------
# Description: Offset: 0x00000190, Width: 32b; [0x180-0x1af] Customizable LUT Sequences
lutCustomSeq_4:
# ------------------------------------------===== seqNum [Optional] =====-------------------------------------------
# Description: Offset: 0b, Width: 8b, Sequence Number, valid number: 1-16
seqNum: 0
# -------------------------------------------===== seqId [Optional] =====-------------------------------------------
# Description: Offset: 8b, Width: 8b, Sequence Index, valid number: 0-15
seqId: 0
# -----------------------------------------===== reserved [Optional] =====------------------------------------------
# Description: Offset: 16b, Width: 16b, N/A
reserved: 0
# ---------------------------------------===== lutCustomSeq_5 [Optional] =====----------------------------------------
# Description: Offset: 0x00000194, Width: 32b; [0x180-0x1af] Customizable LUT Sequences
lutCustomSeq_5:
# ------------------------------------------===== seqNum [Optional] =====-------------------------------------------
# Description: Offset: 0b, Width: 8b, Sequence Number, valid number: 1-16
seqNum: 0
# -------------------------------------------===== seqId [Optional] =====-------------------------------------------
# Description: Offset: 8b, Width: 8b, Sequence Index, valid number: 0-15
seqId: 0
# -----------------------------------------===== reserved [Optional] =====------------------------------------------
# Description: Offset: 16b, Width: 16b, N/A
reserved: 0
# ---------------------------------------===== lutCustomSeq_6 [Optional] =====----------------------------------------
# Description: Offset: 0x00000198, Width: 32b; [0x180-0x1af] Customizable LUT Sequences
lutCustomSeq_6:
# ------------------------------------------===== seqNum [Optional] =====-------------------------------------------
# Description: Offset: 0b, Width: 8b, Sequence Number, valid number: 1-16
seqNum: 0
# -------------------------------------------===== seqId [Optional] =====-------------------------------------------
# Description: Offset: 8b, Width: 8b, Sequence Index, valid number: 0-15
seqId: 0
# -----------------------------------------===== reserved [Optional] =====------------------------------------------
# Description: Offset: 16b, Width: 16b, N/A
reserved: 0
# ---------------------------------------===== lutCustomSeq_7 [Optional] =====----------------------------------------
# Description: Offset: 0x0000019C, Width: 32b; [0x180-0x1af] Customizable LUT Sequences
lutCustomSeq_7:
# ------------------------------------------===== seqNum [Optional] =====-------------------------------------------
# Description: Offset: 0b, Width: 8b, Sequence Number, valid number: 1-16
seqNum: 0
# -------------------------------------------===== seqId [Optional] =====-------------------------------------------
# Description: Offset: 8b, Width: 8b, Sequence Index, valid number: 0-15
seqId: 0
# -----------------------------------------===== reserved [Optional] =====------------------------------------------
# Description: Offset: 16b, Width: 16b, N/A
reserved: 0
# ---------------------------------------===== lutCustomSeq_8 [Optional] =====----------------------------------------
# Description: Offset: 0x000001A0, Width: 32b; [0x180-0x1af] Customizable LUT Sequences
lutCustomSeq_8:
# ------------------------------------------===== seqNum [Optional] =====-------------------------------------------
# Description: Offset: 0b, Width: 8b, Sequence Number, valid number: 1-16
seqNum: 0
# -------------------------------------------===== seqId [Optional] =====-------------------------------------------
# Description: Offset: 8b, Width: 8b, Sequence Index, valid number: 0-15
seqId: 0
# -----------------------------------------===== reserved [Optional] =====------------------------------------------
# Description: Offset: 16b, Width: 16b, N/A
reserved: 0
# ---------------------------------------===== lutCustomSeq_9 [Optional] =====----------------------------------------
# Description: Offset: 0x000001A4, Width: 32b; [0x180-0x1af] Customizable LUT Sequences
lutCustomSeq_9:
# ------------------------------------------===== seqNum [Optional] =====-------------------------------------------
# Description: Offset: 0b, Width: 8b, Sequence Number, valid number: 1-16
seqNum: 0
# -------------------------------------------===== seqId [Optional] =====-------------------------------------------
# Description: Offset: 8b, Width: 8b, Sequence Index, valid number: 0-15
seqId: 0
# -----------------------------------------===== reserved [Optional] =====------------------------------------------
# Description: Offset: 16b, Width: 16b, N/A
reserved: 0
# ---------------------------------------===== lutCustomSeq_10 [Optional] =====---------------------------------------
# Description: Offset: 0x000001A8, Width: 32b; [0x180-0x1af] Customizable LUT Sequences
lutCustomSeq_10:
# ------------------------------------------===== seqNum [Optional] =====-------------------------------------------
# Description: Offset: 0b, Width: 8b, Sequence Number, valid number: 1-16
seqNum: 0
# -------------------------------------------===== seqId [Optional] =====-------------------------------------------
# Description: Offset: 8b, Width: 8b, Sequence Index, valid number: 0-15
seqId: 0
# -----------------------------------------===== reserved [Optional] =====------------------------------------------
# Description: Offset: 16b, Width: 16b, N/A
reserved: 0
# ---------------------------------------===== lutCustomSeq_11 [Optional] =====---------------------------------------
# Description: Offset: 0x000001AC, Width: 32b; [0x180-0x1af] Customizable LUT Sequences
lutCustomSeq_11:
# ------------------------------------------===== seqNum [Optional] =====-------------------------------------------
# Description: Offset: 0b, Width: 8b, Sequence Number, valid number: 1-16
seqNum: 0
# -------------------------------------------===== seqId [Optional] =====-------------------------------------------
# Description: Offset: 8b, Width: 8b, Sequence Index, valid number: 0-15
seqId: 0
# -----------------------------------------===== reserved [Optional] =====------------------------------------------
# Description: Offset: 16b, Width: 16b, N/A
reserved: 0
# -----------------------------------------===== reserved9_0 [Optional] =====-----------------------------------------
# Description: Offset: 0x000001B0, Width: 32b; [0x1b0-0x1bf] Reserved for future use
reserved9_0: '0x00000000'
# -----------------------------------------===== reserved9_1 [Optional] =====-----------------------------------------
# Description: Offset: 0x000001B4, Width: 32b; [0x1b0-0x1bf] Reserved for future use
reserved9_1: '0x00000000'
# -----------------------------------------===== reserved9_2 [Optional] =====-----------------------------------------
# Description: Offset: 0x000001B8, Width: 32b; [0x1b0-0x1bf] Reserved for future use
reserved9_2: '0x00000000'
# -----------------------------------------===== reserved9_3 [Optional] =====-----------------------------------------
# Description: Offset: 0x000001BC, Width: 32b; [0x1b0-0x1bf] Reserved for future use
reserved9_3: '0x00000000'
# ------------------------------------------===== pageSize [Optional] =====-------------------------------------------
# Description: Offset: 0x000001C0, Width: 32b; Page size of Serial NOR
pageSize: '0x00000000'
# -----------------------------------------===== sectorSize [Optional] =====------------------------------------------
# Description: Offset: 0x000001C4, Width: 32b; Sector size of Serial NOR
sectorSize: '0x00000000'
# -------------------------------------===== ipcmdSerialClkFreq [Optional] =====--------------------------------------
# Description: Offset: 0x000001C8, Width: 8b; Clock frequency for IP command
ipcmdSerialClkFreq: '0x00'
# -------------------------------------===== isUniformBlockSize [Optional] =====--------------------------------------
# Description: Offset: 0x000001C9, Width: 8b; Sector/Block size is the same
isUniformBlockSize: '0x00'
# -------------------------------------===== isDataOrderSwapped [Optional] =====--------------------------------------
# Description: Offset: 0x000001CA, Width: 8b; The data order is swapped in OPI DDR mode
isDataOrderSwapped: '0x00'
# ----------------------------------------===== reserved10_0 [Optional] =====-----------------------------------------
# Description: Offset: 0x000001CB, Width: 8b; Reserved for future use
reserved10_0: '0x00'
# ----------------------------------------===== reserved10_1 [Optional] =====-----------------------------------------
# Description: Offset: 0x000001CC, Width: 8b; Reserved for future use
reserved10_1: '0x00'
# ----------------------------------------===== reserved10_2 [Optional] =====-----------------------------------------
# Description: Offset: 0x000001CD, Width: 8b; Reserved for future use
reserved10_2: '0x00'
# ----------------------------------------===== reserved10_3 [Optional] =====-----------------------------------------
# Description: Offset: 0x000001CE, Width: 8b; Reserved for future use
reserved10_3: '0x00'
# ----------------------------------------===== reserved10_4 [Optional] =====-----------------------------------------
# Description: Offset: 0x000001CF, Width: 8b; Reserved for future use
reserved10_4: '0x00'
# ------------------------------------------===== blockSize [Optional] =====------------------------------------------
# Description: Offset: 0x000001D0, Width: 32b; Block size
blockSize: '0x00000000'
# ----------------------------------------===== flashStateCtx [Optional] =====----------------------------------------
# Description: Offset: 0x000001D4, Width: 32b; Flash State Context after being configured
flashStateCtx:
# ---------------------------------------===== flashPorMode [Optional] =====----------------------------------------
# Description: Offset: 0b, Width: 8b, Flash POR Mode
flashPorMode: 0
# -------------------------------------===== flashCurrentMode [Optional] =====--------------------------------------
# Description: Offset: 8b, Width: 8b, Sequence Number, valid number: 1-16
flashCurrentMode: 0
# -----------------------------------------===== reserved [Optional] =====------------------------------------------
# Description: Offset: 16b, Width: 8b, Sequence Number, valid number: 1-16
reserved: 0
# ----------------------------------===== flashRestoringSequence [Optional] =====-----------------------------------
# Description: Offset: 24b, Width: 8b, Sequence Number, valid number: 1-16
flashRestoringSequence: 0
# ----------------------------------------===== reserved11_0 [Optional] =====-----------------------------------------
# Description: Offset: 0x000001D8, Width: 32b; Reserved for future use
reserved11_0: '0x00000000'
# ----------------------------------------===== reserved11_1 [Optional] =====-----------------------------------------
# Description: Offset: 0x000001DC, Width: 32b; Reserved for future use
reserved11_1: '0x00000000'
# ----------------------------------------===== reserved11_2 [Optional] =====-----------------------------------------
# Description: Offset: 0x000001E0, Width: 32b; Reserved for future use
reserved11_2: '0x00000000'
# ----------------------------------------===== reserved11_3 [Optional] =====-----------------------------------------
# Description: Offset: 0x000001E4, Width: 32b; Reserved for future use
reserved11_3: '0x00000000'
# ----------------------------------------===== reserved11_4 [Optional] =====-----------------------------------------
# Description: Offset: 0x000001E8, Width: 32b; Reserved for future use
reserved11_4: '0x00000000'
# ----------------------------------------===== reserved11_5 [Optional] =====-----------------------------------------
# Description: Offset: 0x000001EC, Width: 32b; Reserved for future use
reserved11_5: '0x00000000'
# ----------------------------------------===== reserved11_6 [Optional] =====-----------------------------------------
# Description: Offset: 0x000001F0, Width: 32b; Reserved for future use
reserved11_6: '0x00000000'
# ----------------------------------------===== reserved11_7 [Optional] =====-----------------------------------------
# Description: Offset: 0x000001F4, Width: 32b; Reserved for future use
reserved11_7: '0x00000000'
# ----------------------------------------===== reserved11_8 [Optional] =====-----------------------------------------
# Description: Offset: 0x000001F8, Width: 32b; Reserved for future use
reserved11_8: '0x00000000'
# ----------------------------------------===== reserved11_9 [Optional] =====-----------------------------------------
# Description: Offset: 0x000001FC, Width: 32b; Reserved for future use
reserved11_9: '0x00000000'
FCB for mimxrt1189, Revision: b0 and flexspi_nor#
FCB for mimxrt1189, Revision: b0 and flexspi_nor JSON schema
FCB for mimxrt1189, Revision: b0 and flexspi_nor YAML configuration template
# ================================= FCB for mimxrt1189, Revision: b0 and flexspi_nor =================================
# ======================================================================================================================
# == FCB for mimxrt1189, Revision: b0 and flexspi_nor ==
# ======================================================================================================================
# -------------------------------------===== The chip family name [Required] =====--------------------------------------
# Description: NXP chip family identifier.
family: CHOOSE_FROM_TABLE
# -----------------------------------------===== MCU revision [Optional] =====------------------------------------------
# Description: Revision of silicon. The 'latest' name, means most current revision.
# Possible options: <a0, b0, latest>
revision: b0
# ------------------------------------------===== Memory type [Required] =====------------------------------------------
# Description: Specify type of memory used by FCB description.
# Possible options: <flexspi_nor>
type: flexspi_nor
# ------------------------------------------===== mimxrt1189 [Required] =====-------------------------------------------
fcb_settings:
# ---------------------------------------------===== tag [Optional] =====---------------------------------------------
# Description: Offset: 0x00000000, Width: 32b; [0x000-0x003] Tag, fixed value 0x42464346UL
tag: '0x42464346'
# -------------------------------------------===== version [Optional] =====-------------------------------------------
# Description: Offset: 0x00000004, Width: 32b; [0x004-0x007] Version,[31:24] -'V', [23:16] - Major, [15:8] - Minor,
# [7:0] - bugfix
version:
# ------------------------------------------===== bugfix [Optional] =====-------------------------------------------
# Description: Offset: 0b, Width: 8b, [07:00] Bugfix - 0
bugfix: 0
# -------------------------------------------===== minor [Optional] =====-------------------------------------------
# Description: Offset: 8b, Width: 8b, [15:08] Minor
minor: 0
# -------------------------------------------===== major [Optional] =====-------------------------------------------
# Description: Offset: 16b, Width: 8b, [23:16] Major - 1
major: 1
# -----------------------------------------===== reserved [Optional] =====------------------------------------------
# Description: Offset: 24b, Width: 8b, [32:24] Ascii 'V'
reserved: 86
# ------------------------------------------===== reserved0 [Optional] =====------------------------------------------
# Description: Offset: 0x00000008, Width: 32b; [0x008-0x00b] Reserved for future use
reserved0: '0x00000000'
# --------------------------------------===== readSampleClkSrc [Optional] =====---------------------------------------
# Description: Offset: 0x0000000C, Width: 8b; [0x00c-0x00c] Read Sample Clock Source, valid value: 0/1/3
readSampleClkSrc: '0x00'
# -----------------------------------------===== csHoldTime [Optional] =====------------------------------------------
# Description: Offset: 0x0000000D, Width: 8b; [0x00d-0x00d] CS hold time, default value: 3
csHoldTime: '0x00'
# -----------------------------------------===== csSetupTime [Optional] =====-----------------------------------------
# Description: Offset: 0x0000000E, Width: 8b; [0x00e-0x00e] CS setup time, default value: 3
csSetupTime: '0x00'
# -------------------------------------===== columnAddressWidth [Optional] =====--------------------------------------
# Description: Offset: 0x0000000F, Width: 8b; [0x00f-0x00f] Column Address with, for HyperBus protocol, it is fixed
# to 3, For Serial NAND, need to refer to datasheet
columnAddressWidth: '0x00'
# -------------------------------------===== deviceModeCfgEnable [Optional] =====-------------------------------------
# Description: Offset: 0x00000010, Width: 8b; [0x010-0x010] Device Mode Configure enable flag, 1 - Enable, 0 -
# Disable
deviceModeCfgEnable: '0x00'
# ---------------------------------------===== deviceModeType [Optional] =====----------------------------------------
# Description: Offset: 0x00000011, Width: 8b; [0x011-0x011] Specify the configuration command type: 0 - Generic, 1 -
# Quad Enable, 2 - SPI-to-xSPI, 3 - xSPI-to-SPI
deviceModeType: '0x00'
# -------------------------------------===== waitTimeCfgCommands [Optional] =====-------------------------------------
# Description: Offset: 0x00000012, Width: 16b; [0x012-0x013] Wait time for all configuration commands, unit: 100us,
# Used for DPI/QPI/OPI switch or reset command
waitTimeCfgCommands: '0x0000'
# ----------------------------------------===== deviceModeSeq [Optional] =====----------------------------------------
# Description: Offset: 0x00000014, Width: 32b; [0x014-0x017] Device mode sequence info, [7:0] - LUT sequence id,
# [15:8] - LUt sequence number, [31:16] Reserved
deviceModeSeq:
# ------------------------------------------===== seqNum [Optional] =====-------------------------------------------
# Description: Offset: 0b, Width: 8b, Sequence Number, valid number: 1-16
seqNum: 0
# -------------------------------------------===== seqId [Optional] =====-------------------------------------------
# Description: Offset: 8b, Width: 8b, Sequence Index, valid number: 0-15
seqId: 0
# -----------------------------------------===== reserved [Optional] =====------------------------------------------
# Description: Offset: 16b, Width: 16b, N/A
reserved: 0
# ----------------------------------------===== deviceModeArg [Optional] =====----------------------------------------
# Description: Offset: 0x00000018, Width: 32b; [0x018-0x01b] Argument/Parameter for device configuration. effective
# only when deviceModeCfgEnable = 1
deviceModeArg: '0x00000000'
# ---------------------------------------===== configCmdEnable [Optional] =====---------------------------------------
# Description: Offset: 0x0000001C, Width: 8b; [0x01c-0x01c] Configure command Enable Flag, 1 - Enable, 0 - Disable
configCmdEnable: '0x00'
# ------------------------------------------===== reserved1 [Optional] =====------------------------------------------
# Description: Offset: 0x0000001D, Width: 24b; [0x01d-0x019] Reserved for future use
reserved1: '0x000000'
# ---------------------------------------===== configCmdSeqs_0 [Optional] =====---------------------------------------
# Description: Offset: 0x00000020, Width: 32b; [0x020-0x02b] Sequence info for Device Configuration command, similar
# as deviceModeSeq
configCmdSeqs_0:
# ------------------------------------------===== seqNum [Optional] =====-------------------------------------------
# Description: Offset: 0b, Width: 8b, Sequence Number, valid number: 1-16
seqNum: 0
# -------------------------------------------===== seqId [Optional] =====-------------------------------------------
# Description: Offset: 8b, Width: 8b, Sequence Index, valid number: 0-15
seqId: 0
# -----------------------------------------===== reserved [Optional] =====------------------------------------------
# Description: Offset: 16b, Width: 16b, N/A
reserved: 0
# ---------------------------------------===== configCmdSeqs_1 [Optional] =====---------------------------------------
# Description: Offset: 0x00000024, Width: 32b; [0x020-0x02b] Sequence info for Device Configuration command, similar
# as deviceModeSeq
configCmdSeqs_1:
# ------------------------------------------===== seqNum [Optional] =====-------------------------------------------
# Description: Offset: 0b, Width: 8b, Sequence Number, valid number: 1-16
seqNum: 0
# -------------------------------------------===== seqId [Optional] =====-------------------------------------------
# Description: Offset: 8b, Width: 8b, Sequence Index, valid number: 0-15
seqId: 0
# -----------------------------------------===== reserved [Optional] =====------------------------------------------
# Description: Offset: 16b, Width: 16b, N/A
reserved: 0
# ---------------------------------------===== configCmdSeqs_2 [Optional] =====---------------------------------------
# Description: Offset: 0x00000028, Width: 32b; [0x020-0x02b] Sequence info for Device Configuration command, similar
# as deviceModeSeq
configCmdSeqs_2:
# ------------------------------------------===== seqNum [Optional] =====-------------------------------------------
# Description: Offset: 0b, Width: 8b, Sequence Number, valid number: 1-16
seqNum: 0
# -------------------------------------------===== seqId [Optional] =====-------------------------------------------
# Description: Offset: 8b, Width: 8b, Sequence Index, valid number: 0-15
seqId: 0
# -----------------------------------------===== reserved [Optional] =====------------------------------------------
# Description: Offset: 16b, Width: 16b, N/A
reserved: 0
# ------------------------------------------===== reserved2 [Optional] =====------------------------------------------
# Description: Offset: 0x0000002C, Width: 32b; [0x02c-0x02f] Reserved for future use
reserved2: '0x00000000'
# ---------------------------------------===== configCmdArgs_0 [Optional] =====---------------------------------------
# Description: Offset: 0x00000030, Width: 32b; [0x030-0x03b] Arguments/Parameters for device Configuration commands
configCmdArgs_0: '0x00000000'
# ---------------------------------------===== configCmdArgs_1 [Optional] =====---------------------------------------
# Description: Offset: 0x00000034, Width: 32b; [0x030-0x03b] Arguments/Parameters for device Configuration commands
configCmdArgs_1: '0x00000000'
# ---------------------------------------===== configCmdArgs_2 [Optional] =====---------------------------------------
# Description: Offset: 0x00000038, Width: 32b; [0x030-0x03b] Arguments/Parameters for device Configuration commands
configCmdArgs_2: '0x00000000'
# ------------------------------------------===== reserved3 [Optional] =====------------------------------------------
# Description: Offset: 0x0000003C, Width: 32b; [0x03c-0x03f] Reserved for future use
reserved3: '0x00000000'
# ------------------------------------===== controllerMiscOption [Optional] =====-------------------------------------
# Description: Offset: 0x00000040, Width: 32b; [0x040-0x043] Controller Misc Options, see Misc feature bit
# definitions for more details
controllerMiscOption: '0x00000000'
# -----------------------------------------===== deviceType [Optional] =====------------------------------------------
# Description: Offset: 0x00000044, Width: 8b; [0x044-0x044] Device Type: See Flash Type Definition for more details
deviceType: '0x00'
# ----------------------------------------===== sflashPadType [Optional] =====----------------------------------------
# Description: Offset: 0x00000045, Width: 8b; [0x045-0x045] Serial Flash Pad Type: 1 - Single, 2 - Dual, 4 - Quad, 8
# - Octal
sflashPadType: '0x00'
# ----------------------------------------===== serialClkFreq [Optional] =====----------------------------------------
# Description: Offset: 0x00000046, Width: 8b; [0x046-0x046] Serial Flash Frequency, device specific definitions, See
# System Boot Chapter for more details
serialClkFreq: '0x00'
# -------------------------------------===== lutCustomSeqEnable [Optional] =====--------------------------------------
# Description: Offset: 0x00000047, Width: 8b; [0x047-0x047] LUT customization Enable, it is required if the
# program/erase cannot be done using 1 LUT sequence, currently, only applicable to HyperFLASH
lutCustomSeqEnable: '0x00'
# ------------------------------------------===== reserved4 [Optional] =====------------------------------------------
# Description: Offset: 0x00000048, Width: 64b; [0x048-0x04f] Reserved for future use
reserved4: '0x0000000000000000'
# ----------------------------------------===== sflashA1Size [Optional] =====-----------------------------------------
# Description: Offset: 0x00000050, Width: 32b; [0x050-0x053] Size of Flash connected to A1
sflashA1Size: '0x00000000'
# ----------------------------------------===== sflashA2Size [Optional] =====-----------------------------------------
# Description: Offset: 0x00000054, Width: 32b; [0x054-0x057] Size of Flash connected to A2
sflashA2Size: '0x00000000'
# ----------------------------------------===== sflashB1Size [Optional] =====-----------------------------------------
# Description: Offset: 0x00000058, Width: 32b; [0x058-0x05b] Size of Flash connected to B1
sflashB1Size: '0x00000000'
# ----------------------------------------===== sflashB2Size [Optional] =====-----------------------------------------
# Description: Offset: 0x0000005C, Width: 32b; [0x05c-0x05f] Size of Flash connected to B2
sflashB2Size: '0x00000000'
# -----------------------------------===== csPadSettingOverrideEn [Optional] =====------------------------------------
# Description: Offset: 0x00000060, Width: 8b; [0x060-0x060] Set to 0 if it is not supported
csPadSettingOverrideEn: '0x00'
# ------------------------------------===== csPadSettingOverride [Optional] =====-------------------------------------
# Description: Offset: 0x00000061, Width: 8b; [0x061-0x061] Overriding pad setting of CS
csPadSettingOverride: '0x00'
# ------------------------------------------===== reserved5 [Optional] =====------------------------------------------
# Description: Offset: 0x00000062, Width: 16b; [0x062-0x063] Reserved for future use
reserved5: '0x0000'
# ----------------------------------===== sclkPadSettingOverrideEn [Optional] =====-----------------------------------
# Description: Offset: 0x00000064, Width: 8b; [0x064-0x064] Set to 0 if it is not supported
sclkPadSettingOverrideEn: '0x00'
# -----------------------------------===== sclkPadSettingOverride [Optional] =====------------------------------------
# Description: Offset: 0x00000065, Width: 8b; [0x065-0x065] Overriding pad setting of SCLK
sclkPadSettingOverride: '0x00'
# ------------------------------------------===== reserved6 [Optional] =====------------------------------------------
# Description: Offset: 0x00000066, Width: 16b; [0x066-0x067] Reserved for future use
reserved6: '0x0000'
# ----------------------------------===== dataPadSettingOverrideEn [Optional] =====-----------------------------------
# Description: Offset: 0x00000068, Width: 8b; [0x068-0x068] Set to 0 if it is not supported
dataPadSettingOverrideEn: '0x00'
# -----------------------------------===== dataPadSettingOverride [Optional] =====------------------------------------
# Description: Offset: 0x00000069, Width: 8b; [0x069-0x069] Overriding pad setting of data signals
dataPadSettingOverride: '0x00'
# ------------------------------------------===== reserved7 [Optional] =====------------------------------------------
# Description: Offset: 0x0000006A, Width: 16b; [0x06a-0x06b] Reserved for future use
reserved7: '0x0000'
# -----------------------------------===== dqsPadSettingOverrideEn [Optional] =====-----------------------------------
# Description: Offset: 0x0000006C, Width: 8b; [0x06c-0x06c] Set to 0 if it is not supported
dqsPadSettingOverrideEn: '0x00'
# ------------------------------------===== dqsPadSettingOverride [Optional] =====------------------------------------
# Description: Offset: 0x0000006D, Width: 8b; [0x06d-0x06d] Overriding pad setting of DQS
dqsPadSettingOverride: '0x00'
# ------------------------------------------===== reserved8 [Optional] =====------------------------------------------
# Description: Offset: 0x0000006E, Width: 16b; [0x06e-0x06f] Reserved for future use
reserved8: '0x0000'
# -----------------------------------------===== timeoutInMs [Optional] =====-----------------------------------------
# Description: Offset: 0x00000070, Width: 32b; [0x070-0x073] Timeout threshold for read status command
timeoutInMs: '0x00000000'
# ---------------------------------------===== commandInterval [Optional] =====---------------------------------------
# Description: Offset: 0x00000074, Width: 32b; [0x074-0x077] CS deselect interval between two commands
commandInterval: '0x00000000'
# ----------------------------------------===== dataValidTime [Optional] =====----------------------------------------
# Description: Offset: 0x00000078, Width: 32b; [0x078-0x07b] CLK edge to data valid time for PORT A and PORT B, in
# terms of 0.1ns
dataValidTime:
# ---------------------------------------===== dllAValidTime [Optional] =====---------------------------------------
# Description: Offset: 0b, Width: 16b, Data valid time for DLLA in terms of 0.1 ns
dllAValidTime: 0
# ---------------------------------------===== dllBValidTime [Optional] =====---------------------------------------
# Description: Offset: 16b, Width: 16b, Data valid time for DLLB in terms of 0.1 ns
dllBValidTime: 0
# -----------------------------------------===== busyOffset [Optional] =====------------------------------------------
# Description: Offset: 0x0000007C, Width: 16b; [0x07c-0x07d] Busy offset, valid value: 0-31
busyOffset: '0x0000'
# ---------------------------------------===== busyBitPolarity [Optional] =====---------------------------------------
# Description: Offset: 0x0000007E, Width: 16b; [0x07e-0x07f] Busy flag polarity, 0 - busy flag is 1 when flash device
# is busy, 1 - busy flag is 0 when flash device is busy
busyBitPolarity: '0x0000'
# -----------------------------------===== lookupTable_seq0_instr0 [Optional] =====-----------------------------------
# Description: Offset: 0x00000080, Width: 16b; Lookup table holds Flash command sequences 0, instruction 0
lookupTable_seq0_instr0:
# ------------------------------------------===== OPERAND [Optional] =====------------------------------------------
# Description: Offset: 0b, Width: 8b, Instruction operand. Its values depends on used instruction
OPERAND: 0
# -----------------------------------------===== NUM_PADS [Optional] =====------------------------------------------
# Description: Offset: 8b, Width: 2b, Number of pads used by instruction. Some instructions ignores this parameter.
# - 1PAD, (0): Single mode. One pad is used.
# - 2PAD, (1): Dual mode. Two pads are used.
# - 4PAD, (2): Quad mode. Four pads are used.
# - 8PAD, (3): Octal mode. Eight pads are used.
# Possible options: <1PAD, 2PAD, 4PAD, 8PAD>
NUM_PADS: 1PAD
# --------------------------------------===== OPERATION_CODE [Optional] =====---------------------------------------
# Description: Offset: 10b, Width: 6b, Instruction operation code.
# - STOP, (0): Stop execution and de-assert CS. Then, the next command sequence (to the same flash device) starts
# from instruction pointer 0.
# - CMD_SDR, (1): Transmit command code to Flash.
# - RADDR_SDR, (2): Transmit row address to Flash.
# - CADDR_SDR, (3): Transmit column address to Flash.
# - MODE1_SDR, (4): Transmit mode bits to Flash.
# - MODE2_SDR, (5): Transmit mode bits to Flash.
# - MODE4_SDR, (6): Transmit mode bits to Flash.
# - MODE8_SDR, (7): Transmit mode bits to Flash.
# - WRITE_SDR, (8): Transmit program data to Flash device.
# - READ_SDR, (9): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_SDR, (10): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_SDR, (11): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_SDR, (12): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_SDR, (13): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# - JMP_ON_CS, (31): Stop execution, de-assert CS and save operand[7:0] as the instruction start pointer for next
# sequence.Normally this instruction is used to support Execute-In-Place enhanced mode. See XIP enhanced mode for
# more details.This instruction is only allowed for AHB read commands. There is interrupt status bit set
# (INTR[IPCMDERR] or INTR[AHBCMDERR]) when using this instruction in IP command or AHB write command.
# - CMD_DDR, (33): Transmit command code to Flash.
# - RADDR_DDR, (34): Transmit row address to Flash.
# - CADDR_DDR, (35): Transmit column address to Flash.
# - MODE1_DDR, (36): Transmit mode bits to Flash.
# - MODE2_DDR, (37): Transmit mode bits to Flash.
# - MODE4_DDR, (38): Transmit mode bits to Flash.
# - MODE8_DDR, (39): Transmit mode bits to Flash.
# - WRITE_DDR, (40): Transmit program data to Flash device.
# - READ_DDR, (41): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_DDR, (42): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_DDR, (43): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_DDR, (44): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_DDR, (45): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# Possible options: <STOP, CMD_SDR, RADDR_SDR, CADDR_SDR, MODE1_SDR, MODE2_SDR, MODE4_SDR, MODE8_SDR, WRITE_SDR,
# READ_SDR, LEARN_SDR, DATSZ_SDR, DUMMY_SDR, DUMMY_RWDS_SDR, JMP_ON_CS, CMD_DDR, RADDR_DDR, CADDR_DDR, MODE1_DDR,
# MODE2_DDR, MODE4_DDR, MODE8_DDR, WRITE_DDR, READ_DDR, LEARN_DDR, DATSZ_DDR, DUMMY_DDR, DUMMY_RWDS_DDR>
OPERATION_CODE: STOP
lookupTable_seq0_instr1:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq0_instr2:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq0_instr3:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq0_instr4:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq0_instr5:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq0_instr6:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq0_instr7:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
# -----------------------------------===== lookupTable_seq1_instr0 [Optional] =====-----------------------------------
# Description: Offset: 0x00000090, Width: 16b; Lookup table holds Flash command sequences 1, instruction 0
lookupTable_seq1_instr0:
# ------------------------------------------===== OPERAND [Optional] =====------------------------------------------
# Description: Offset: 0b, Width: 8b, Instruction operand. Its values depends on used instruction
OPERAND: 0
# -----------------------------------------===== NUM_PADS [Optional] =====------------------------------------------
# Description: Offset: 8b, Width: 2b, Number of pads used by instruction. Some instructions ignores this parameter.
# - 1PAD, (0): Single mode. One pad is used.
# - 2PAD, (1): Dual mode. Two pads are used.
# - 4PAD, (2): Quad mode. Four pads are used.
# - 8PAD, (3): Octal mode. Eight pads are used.
# Possible options: <1PAD, 2PAD, 4PAD, 8PAD>
NUM_PADS: 1PAD
# --------------------------------------===== OPERATION_CODE [Optional] =====---------------------------------------
# Description: Offset: 10b, Width: 6b, Instruction operation code.
# - STOP, (0): Stop execution and de-assert CS. Then, the next command sequence (to the same flash device) starts
# from instruction pointer 0.
# - CMD_SDR, (1): Transmit command code to Flash.
# - RADDR_SDR, (2): Transmit row address to Flash.
# - CADDR_SDR, (3): Transmit column address to Flash.
# - MODE1_SDR, (4): Transmit mode bits to Flash.
# - MODE2_SDR, (5): Transmit mode bits to Flash.
# - MODE4_SDR, (6): Transmit mode bits to Flash.
# - MODE8_SDR, (7): Transmit mode bits to Flash.
# - WRITE_SDR, (8): Transmit program data to Flash device.
# - READ_SDR, (9): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_SDR, (10): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_SDR, (11): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_SDR, (12): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_SDR, (13): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# - JMP_ON_CS, (31): Stop execution, de-assert CS and save operand[7:0] as the instruction start pointer for next
# sequence.Normally this instruction is used to support Execute-In-Place enhanced mode. See XIP enhanced mode for
# more details.This instruction is only allowed for AHB read commands. There is interrupt status bit set
# (INTR[IPCMDERR] or INTR[AHBCMDERR]) when using this instruction in IP command or AHB write command.
# - CMD_DDR, (33): Transmit command code to Flash.
# - RADDR_DDR, (34): Transmit row address to Flash.
# - CADDR_DDR, (35): Transmit column address to Flash.
# - MODE1_DDR, (36): Transmit mode bits to Flash.
# - MODE2_DDR, (37): Transmit mode bits to Flash.
# - MODE4_DDR, (38): Transmit mode bits to Flash.
# - MODE8_DDR, (39): Transmit mode bits to Flash.
# - WRITE_DDR, (40): Transmit program data to Flash device.
# - READ_DDR, (41): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_DDR, (42): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_DDR, (43): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_DDR, (44): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_DDR, (45): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# Possible options: <STOP, CMD_SDR, RADDR_SDR, CADDR_SDR, MODE1_SDR, MODE2_SDR, MODE4_SDR, MODE8_SDR, WRITE_SDR,
# READ_SDR, LEARN_SDR, DATSZ_SDR, DUMMY_SDR, DUMMY_RWDS_SDR, JMP_ON_CS, CMD_DDR, RADDR_DDR, CADDR_DDR, MODE1_DDR,
# MODE2_DDR, MODE4_DDR, MODE8_DDR, WRITE_DDR, READ_DDR, LEARN_DDR, DATSZ_DDR, DUMMY_DDR, DUMMY_RWDS_DDR>
OPERATION_CODE: STOP
lookupTable_seq1_instr1:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq1_instr2:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq1_instr3:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq1_instr4:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq1_instr5:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq1_instr6:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq1_instr7:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
# -----------------------------------===== lookupTable_seq2_instr0 [Optional] =====-----------------------------------
# Description: Offset: 0x000000A0, Width: 16b; Lookup table holds Flash command sequences 2, instruction 0
lookupTable_seq2_instr0:
# ------------------------------------------===== OPERAND [Optional] =====------------------------------------------
# Description: Offset: 0b, Width: 8b, Instruction operand. Its values depends on used instruction
OPERAND: 0
# -----------------------------------------===== NUM_PADS [Optional] =====------------------------------------------
# Description: Offset: 8b, Width: 2b, Number of pads used by instruction. Some instructions ignores this parameter.
# - 1PAD, (0): Single mode. One pad is used.
# - 2PAD, (1): Dual mode. Two pads are used.
# - 4PAD, (2): Quad mode. Four pads are used.
# - 8PAD, (3): Octal mode. Eight pads are used.
# Possible options: <1PAD, 2PAD, 4PAD, 8PAD>
NUM_PADS: 1PAD
# --------------------------------------===== OPERATION_CODE [Optional] =====---------------------------------------
# Description: Offset: 10b, Width: 6b, Instruction operation code.
# - STOP, (0): Stop execution and de-assert CS. Then, the next command sequence (to the same flash device) starts
# from instruction pointer 0.
# - CMD_SDR, (1): Transmit command code to Flash.
# - RADDR_SDR, (2): Transmit row address to Flash.
# - CADDR_SDR, (3): Transmit column address to Flash.
# - MODE1_SDR, (4): Transmit mode bits to Flash.
# - MODE2_SDR, (5): Transmit mode bits to Flash.
# - MODE4_SDR, (6): Transmit mode bits to Flash.
# - MODE8_SDR, (7): Transmit mode bits to Flash.
# - WRITE_SDR, (8): Transmit program data to Flash device.
# - READ_SDR, (9): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_SDR, (10): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_SDR, (11): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_SDR, (12): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_SDR, (13): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# - JMP_ON_CS, (31): Stop execution, de-assert CS and save operand[7:0] as the instruction start pointer for next
# sequence.Normally this instruction is used to support Execute-In-Place enhanced mode. See XIP enhanced mode for
# more details.This instruction is only allowed for AHB read commands. There is interrupt status bit set
# (INTR[IPCMDERR] or INTR[AHBCMDERR]) when using this instruction in IP command or AHB write command.
# - CMD_DDR, (33): Transmit command code to Flash.
# - RADDR_DDR, (34): Transmit row address to Flash.
# - CADDR_DDR, (35): Transmit column address to Flash.
# - MODE1_DDR, (36): Transmit mode bits to Flash.
# - MODE2_DDR, (37): Transmit mode bits to Flash.
# - MODE4_DDR, (38): Transmit mode bits to Flash.
# - MODE8_DDR, (39): Transmit mode bits to Flash.
# - WRITE_DDR, (40): Transmit program data to Flash device.
# - READ_DDR, (41): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_DDR, (42): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_DDR, (43): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_DDR, (44): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_DDR, (45): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# Possible options: <STOP, CMD_SDR, RADDR_SDR, CADDR_SDR, MODE1_SDR, MODE2_SDR, MODE4_SDR, MODE8_SDR, WRITE_SDR,
# READ_SDR, LEARN_SDR, DATSZ_SDR, DUMMY_SDR, DUMMY_RWDS_SDR, JMP_ON_CS, CMD_DDR, RADDR_DDR, CADDR_DDR, MODE1_DDR,
# MODE2_DDR, MODE4_DDR, MODE8_DDR, WRITE_DDR, READ_DDR, LEARN_DDR, DATSZ_DDR, DUMMY_DDR, DUMMY_RWDS_DDR>
OPERATION_CODE: STOP
lookupTable_seq2_instr1:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq2_instr2:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq2_instr3:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq2_instr4:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq2_instr5:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq2_instr6:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq2_instr7:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
# -----------------------------------===== lookupTable_seq3_instr0 [Optional] =====-----------------------------------
# Description: Offset: 0x000000B0, Width: 16b; Lookup table holds Flash command sequences 3, instruction 0
lookupTable_seq3_instr0:
# ------------------------------------------===== OPERAND [Optional] =====------------------------------------------
# Description: Offset: 0b, Width: 8b, Instruction operand. Its values depends on used instruction
OPERAND: 0
# -----------------------------------------===== NUM_PADS [Optional] =====------------------------------------------
# Description: Offset: 8b, Width: 2b, Number of pads used by instruction. Some instructions ignores this parameter.
# - 1PAD, (0): Single mode. One pad is used.
# - 2PAD, (1): Dual mode. Two pads are used.
# - 4PAD, (2): Quad mode. Four pads are used.
# - 8PAD, (3): Octal mode. Eight pads are used.
# Possible options: <1PAD, 2PAD, 4PAD, 8PAD>
NUM_PADS: 1PAD
# --------------------------------------===== OPERATION_CODE [Optional] =====---------------------------------------
# Description: Offset: 10b, Width: 6b, Instruction operation code.
# - STOP, (0): Stop execution and de-assert CS. Then, the next command sequence (to the same flash device) starts
# from instruction pointer 0.
# - CMD_SDR, (1): Transmit command code to Flash.
# - RADDR_SDR, (2): Transmit row address to Flash.
# - CADDR_SDR, (3): Transmit column address to Flash.
# - MODE1_SDR, (4): Transmit mode bits to Flash.
# - MODE2_SDR, (5): Transmit mode bits to Flash.
# - MODE4_SDR, (6): Transmit mode bits to Flash.
# - MODE8_SDR, (7): Transmit mode bits to Flash.
# - WRITE_SDR, (8): Transmit program data to Flash device.
# - READ_SDR, (9): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_SDR, (10): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_SDR, (11): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_SDR, (12): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_SDR, (13): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# - JMP_ON_CS, (31): Stop execution, de-assert CS and save operand[7:0] as the instruction start pointer for next
# sequence.Normally this instruction is used to support Execute-In-Place enhanced mode. See XIP enhanced mode for
# more details.This instruction is only allowed for AHB read commands. There is interrupt status bit set
# (INTR[IPCMDERR] or INTR[AHBCMDERR]) when using this instruction in IP command or AHB write command.
# - CMD_DDR, (33): Transmit command code to Flash.
# - RADDR_DDR, (34): Transmit row address to Flash.
# - CADDR_DDR, (35): Transmit column address to Flash.
# - MODE1_DDR, (36): Transmit mode bits to Flash.
# - MODE2_DDR, (37): Transmit mode bits to Flash.
# - MODE4_DDR, (38): Transmit mode bits to Flash.
# - MODE8_DDR, (39): Transmit mode bits to Flash.
# - WRITE_DDR, (40): Transmit program data to Flash device.
# - READ_DDR, (41): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_DDR, (42): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_DDR, (43): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_DDR, (44): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_DDR, (45): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# Possible options: <STOP, CMD_SDR, RADDR_SDR, CADDR_SDR, MODE1_SDR, MODE2_SDR, MODE4_SDR, MODE8_SDR, WRITE_SDR,
# READ_SDR, LEARN_SDR, DATSZ_SDR, DUMMY_SDR, DUMMY_RWDS_SDR, JMP_ON_CS, CMD_DDR, RADDR_DDR, CADDR_DDR, MODE1_DDR,
# MODE2_DDR, MODE4_DDR, MODE8_DDR, WRITE_DDR, READ_DDR, LEARN_DDR, DATSZ_DDR, DUMMY_DDR, DUMMY_RWDS_DDR>
OPERATION_CODE: STOP
lookupTable_seq3_instr1:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq3_instr2:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq3_instr3:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq3_instr4:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq3_instr5:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq3_instr6:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq3_instr7:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
# -----------------------------------===== lookupTable_seq4_instr0 [Optional] =====-----------------------------------
# Description: Offset: 0x000000C0, Width: 16b; Lookup table holds Flash command sequences 4, instruction 0
lookupTable_seq4_instr0:
# ------------------------------------------===== OPERAND [Optional] =====------------------------------------------
# Description: Offset: 0b, Width: 8b, Instruction operand. Its values depends on used instruction
OPERAND: 0
# -----------------------------------------===== NUM_PADS [Optional] =====------------------------------------------
# Description: Offset: 8b, Width: 2b, Number of pads used by instruction. Some instructions ignores this parameter.
# - 1PAD, (0): Single mode. One pad is used.
# - 2PAD, (1): Dual mode. Two pads are used.
# - 4PAD, (2): Quad mode. Four pads are used.
# - 8PAD, (3): Octal mode. Eight pads are used.
# Possible options: <1PAD, 2PAD, 4PAD, 8PAD>
NUM_PADS: 1PAD
# --------------------------------------===== OPERATION_CODE [Optional] =====---------------------------------------
# Description: Offset: 10b, Width: 6b, Instruction operation code.
# - STOP, (0): Stop execution and de-assert CS. Then, the next command sequence (to the same flash device) starts
# from instruction pointer 0.
# - CMD_SDR, (1): Transmit command code to Flash.
# - RADDR_SDR, (2): Transmit row address to Flash.
# - CADDR_SDR, (3): Transmit column address to Flash.
# - MODE1_SDR, (4): Transmit mode bits to Flash.
# - MODE2_SDR, (5): Transmit mode bits to Flash.
# - MODE4_SDR, (6): Transmit mode bits to Flash.
# - MODE8_SDR, (7): Transmit mode bits to Flash.
# - WRITE_SDR, (8): Transmit program data to Flash device.
# - READ_SDR, (9): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_SDR, (10): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_SDR, (11): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_SDR, (12): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_SDR, (13): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# - JMP_ON_CS, (31): Stop execution, de-assert CS and save operand[7:0] as the instruction start pointer for next
# sequence.Normally this instruction is used to support Execute-In-Place enhanced mode. See XIP enhanced mode for
# more details.This instruction is only allowed for AHB read commands. There is interrupt status bit set
# (INTR[IPCMDERR] or INTR[AHBCMDERR]) when using this instruction in IP command or AHB write command.
# - CMD_DDR, (33): Transmit command code to Flash.
# - RADDR_DDR, (34): Transmit row address to Flash.
# - CADDR_DDR, (35): Transmit column address to Flash.
# - MODE1_DDR, (36): Transmit mode bits to Flash.
# - MODE2_DDR, (37): Transmit mode bits to Flash.
# - MODE4_DDR, (38): Transmit mode bits to Flash.
# - MODE8_DDR, (39): Transmit mode bits to Flash.
# - WRITE_DDR, (40): Transmit program data to Flash device.
# - READ_DDR, (41): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_DDR, (42): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_DDR, (43): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_DDR, (44): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_DDR, (45): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# Possible options: <STOP, CMD_SDR, RADDR_SDR, CADDR_SDR, MODE1_SDR, MODE2_SDR, MODE4_SDR, MODE8_SDR, WRITE_SDR,
# READ_SDR, LEARN_SDR, DATSZ_SDR, DUMMY_SDR, DUMMY_RWDS_SDR, JMP_ON_CS, CMD_DDR, RADDR_DDR, CADDR_DDR, MODE1_DDR,
# MODE2_DDR, MODE4_DDR, MODE8_DDR, WRITE_DDR, READ_DDR, LEARN_DDR, DATSZ_DDR, DUMMY_DDR, DUMMY_RWDS_DDR>
OPERATION_CODE: STOP
lookupTable_seq4_instr1:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq4_instr2:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq4_instr3:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq4_instr4:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq4_instr5:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq4_instr6:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq4_instr7:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
# -----------------------------------===== lookupTable_seq5_instr0 [Optional] =====-----------------------------------
# Description: Offset: 0x000000D0, Width: 16b; Lookup table holds Flash command sequences 5, instruction 0
lookupTable_seq5_instr0:
# ------------------------------------------===== OPERAND [Optional] =====------------------------------------------
# Description: Offset: 0b, Width: 8b, Instruction operand. Its values depends on used instruction
OPERAND: 0
# -----------------------------------------===== NUM_PADS [Optional] =====------------------------------------------
# Description: Offset: 8b, Width: 2b, Number of pads used by instruction. Some instructions ignores this parameter.
# - 1PAD, (0): Single mode. One pad is used.
# - 2PAD, (1): Dual mode. Two pads are used.
# - 4PAD, (2): Quad mode. Four pads are used.
# - 8PAD, (3): Octal mode. Eight pads are used.
# Possible options: <1PAD, 2PAD, 4PAD, 8PAD>
NUM_PADS: 1PAD
# --------------------------------------===== OPERATION_CODE [Optional] =====---------------------------------------
# Description: Offset: 10b, Width: 6b, Instruction operation code.
# - STOP, (0): Stop execution and de-assert CS. Then, the next command sequence (to the same flash device) starts
# from instruction pointer 0.
# - CMD_SDR, (1): Transmit command code to Flash.
# - RADDR_SDR, (2): Transmit row address to Flash.
# - CADDR_SDR, (3): Transmit column address to Flash.
# - MODE1_SDR, (4): Transmit mode bits to Flash.
# - MODE2_SDR, (5): Transmit mode bits to Flash.
# - MODE4_SDR, (6): Transmit mode bits to Flash.
# - MODE8_SDR, (7): Transmit mode bits to Flash.
# - WRITE_SDR, (8): Transmit program data to Flash device.
# - READ_SDR, (9): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_SDR, (10): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_SDR, (11): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_SDR, (12): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_SDR, (13): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# - JMP_ON_CS, (31): Stop execution, de-assert CS and save operand[7:0] as the instruction start pointer for next
# sequence.Normally this instruction is used to support Execute-In-Place enhanced mode. See XIP enhanced mode for
# more details.This instruction is only allowed for AHB read commands. There is interrupt status bit set
# (INTR[IPCMDERR] or INTR[AHBCMDERR]) when using this instruction in IP command or AHB write command.
# - CMD_DDR, (33): Transmit command code to Flash.
# - RADDR_DDR, (34): Transmit row address to Flash.
# - CADDR_DDR, (35): Transmit column address to Flash.
# - MODE1_DDR, (36): Transmit mode bits to Flash.
# - MODE2_DDR, (37): Transmit mode bits to Flash.
# - MODE4_DDR, (38): Transmit mode bits to Flash.
# - MODE8_DDR, (39): Transmit mode bits to Flash.
# - WRITE_DDR, (40): Transmit program data to Flash device.
# - READ_DDR, (41): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_DDR, (42): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_DDR, (43): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_DDR, (44): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_DDR, (45): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# Possible options: <STOP, CMD_SDR, RADDR_SDR, CADDR_SDR, MODE1_SDR, MODE2_SDR, MODE4_SDR, MODE8_SDR, WRITE_SDR,
# READ_SDR, LEARN_SDR, DATSZ_SDR, DUMMY_SDR, DUMMY_RWDS_SDR, JMP_ON_CS, CMD_DDR, RADDR_DDR, CADDR_DDR, MODE1_DDR,
# MODE2_DDR, MODE4_DDR, MODE8_DDR, WRITE_DDR, READ_DDR, LEARN_DDR, DATSZ_DDR, DUMMY_DDR, DUMMY_RWDS_DDR>
OPERATION_CODE: STOP
lookupTable_seq5_instr1:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq5_instr2:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq5_instr3:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq5_instr4:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq5_instr5:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq5_instr6:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq5_instr7:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
# -----------------------------------===== lookupTable_seq6_instr0 [Optional] =====-----------------------------------
# Description: Offset: 0x000000E0, Width: 16b; Lookup table holds Flash command sequences 6, instruction 0
lookupTable_seq6_instr0:
# ------------------------------------------===== OPERAND [Optional] =====------------------------------------------
# Description: Offset: 0b, Width: 8b, Instruction operand. Its values depends on used instruction
OPERAND: 0
# -----------------------------------------===== NUM_PADS [Optional] =====------------------------------------------
# Description: Offset: 8b, Width: 2b, Number of pads used by instruction. Some instructions ignores this parameter.
# - 1PAD, (0): Single mode. One pad is used.
# - 2PAD, (1): Dual mode. Two pads are used.
# - 4PAD, (2): Quad mode. Four pads are used.
# - 8PAD, (3): Octal mode. Eight pads are used.
# Possible options: <1PAD, 2PAD, 4PAD, 8PAD>
NUM_PADS: 1PAD
# --------------------------------------===== OPERATION_CODE [Optional] =====---------------------------------------
# Description: Offset: 10b, Width: 6b, Instruction operation code.
# - STOP, (0): Stop execution and de-assert CS. Then, the next command sequence (to the same flash device) starts
# from instruction pointer 0.
# - CMD_SDR, (1): Transmit command code to Flash.
# - RADDR_SDR, (2): Transmit row address to Flash.
# - CADDR_SDR, (3): Transmit column address to Flash.
# - MODE1_SDR, (4): Transmit mode bits to Flash.
# - MODE2_SDR, (5): Transmit mode bits to Flash.
# - MODE4_SDR, (6): Transmit mode bits to Flash.
# - MODE8_SDR, (7): Transmit mode bits to Flash.
# - WRITE_SDR, (8): Transmit program data to Flash device.
# - READ_SDR, (9): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_SDR, (10): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_SDR, (11): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_SDR, (12): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_SDR, (13): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# - JMP_ON_CS, (31): Stop execution, de-assert CS and save operand[7:0] as the instruction start pointer for next
# sequence.Normally this instruction is used to support Execute-In-Place enhanced mode. See XIP enhanced mode for
# more details.This instruction is only allowed for AHB read commands. There is interrupt status bit set
# (INTR[IPCMDERR] or INTR[AHBCMDERR]) when using this instruction in IP command or AHB write command.
# - CMD_DDR, (33): Transmit command code to Flash.
# - RADDR_DDR, (34): Transmit row address to Flash.
# - CADDR_DDR, (35): Transmit column address to Flash.
# - MODE1_DDR, (36): Transmit mode bits to Flash.
# - MODE2_DDR, (37): Transmit mode bits to Flash.
# - MODE4_DDR, (38): Transmit mode bits to Flash.
# - MODE8_DDR, (39): Transmit mode bits to Flash.
# - WRITE_DDR, (40): Transmit program data to Flash device.
# - READ_DDR, (41): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_DDR, (42): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_DDR, (43): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_DDR, (44): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_DDR, (45): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# Possible options: <STOP, CMD_SDR, RADDR_SDR, CADDR_SDR, MODE1_SDR, MODE2_SDR, MODE4_SDR, MODE8_SDR, WRITE_SDR,
# READ_SDR, LEARN_SDR, DATSZ_SDR, DUMMY_SDR, DUMMY_RWDS_SDR, JMP_ON_CS, CMD_DDR, RADDR_DDR, CADDR_DDR, MODE1_DDR,
# MODE2_DDR, MODE4_DDR, MODE8_DDR, WRITE_DDR, READ_DDR, LEARN_DDR, DATSZ_DDR, DUMMY_DDR, DUMMY_RWDS_DDR>
OPERATION_CODE: STOP
lookupTable_seq6_instr1:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq6_instr2:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq6_instr3:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq6_instr4:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq6_instr5:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq6_instr6:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq6_instr7:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
# -----------------------------------===== lookupTable_seq7_instr0 [Optional] =====-----------------------------------
# Description: Offset: 0x000000F0, Width: 16b; Lookup table holds Flash command sequences 7, instruction 0
lookupTable_seq7_instr0:
# ------------------------------------------===== OPERAND [Optional] =====------------------------------------------
# Description: Offset: 0b, Width: 8b, Instruction operand. Its values depends on used instruction
OPERAND: 0
# -----------------------------------------===== NUM_PADS [Optional] =====------------------------------------------
# Description: Offset: 8b, Width: 2b, Number of pads used by instruction. Some instructions ignores this parameter.
# - 1PAD, (0): Single mode. One pad is used.
# - 2PAD, (1): Dual mode. Two pads are used.
# - 4PAD, (2): Quad mode. Four pads are used.
# - 8PAD, (3): Octal mode. Eight pads are used.
# Possible options: <1PAD, 2PAD, 4PAD, 8PAD>
NUM_PADS: 1PAD
# --------------------------------------===== OPERATION_CODE [Optional] =====---------------------------------------
# Description: Offset: 10b, Width: 6b, Instruction operation code.
# - STOP, (0): Stop execution and de-assert CS. Then, the next command sequence (to the same flash device) starts
# from instruction pointer 0.
# - CMD_SDR, (1): Transmit command code to Flash.
# - RADDR_SDR, (2): Transmit row address to Flash.
# - CADDR_SDR, (3): Transmit column address to Flash.
# - MODE1_SDR, (4): Transmit mode bits to Flash.
# - MODE2_SDR, (5): Transmit mode bits to Flash.
# - MODE4_SDR, (6): Transmit mode bits to Flash.
# - MODE8_SDR, (7): Transmit mode bits to Flash.
# - WRITE_SDR, (8): Transmit program data to Flash device.
# - READ_SDR, (9): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_SDR, (10): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_SDR, (11): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_SDR, (12): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_SDR, (13): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# - JMP_ON_CS, (31): Stop execution, de-assert CS and save operand[7:0] as the instruction start pointer for next
# sequence.Normally this instruction is used to support Execute-In-Place enhanced mode. See XIP enhanced mode for
# more details.This instruction is only allowed for AHB read commands. There is interrupt status bit set
# (INTR[IPCMDERR] or INTR[AHBCMDERR]) when using this instruction in IP command or AHB write command.
# - CMD_DDR, (33): Transmit command code to Flash.
# - RADDR_DDR, (34): Transmit row address to Flash.
# - CADDR_DDR, (35): Transmit column address to Flash.
# - MODE1_DDR, (36): Transmit mode bits to Flash.
# - MODE2_DDR, (37): Transmit mode bits to Flash.
# - MODE4_DDR, (38): Transmit mode bits to Flash.
# - MODE8_DDR, (39): Transmit mode bits to Flash.
# - WRITE_DDR, (40): Transmit program data to Flash device.
# - READ_DDR, (41): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_DDR, (42): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_DDR, (43): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_DDR, (44): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_DDR, (45): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# Possible options: <STOP, CMD_SDR, RADDR_SDR, CADDR_SDR, MODE1_SDR, MODE2_SDR, MODE4_SDR, MODE8_SDR, WRITE_SDR,
# READ_SDR, LEARN_SDR, DATSZ_SDR, DUMMY_SDR, DUMMY_RWDS_SDR, JMP_ON_CS, CMD_DDR, RADDR_DDR, CADDR_DDR, MODE1_DDR,
# MODE2_DDR, MODE4_DDR, MODE8_DDR, WRITE_DDR, READ_DDR, LEARN_DDR, DATSZ_DDR, DUMMY_DDR, DUMMY_RWDS_DDR>
OPERATION_CODE: STOP
lookupTable_seq7_instr1:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq7_instr2:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq7_instr3:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq7_instr4:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq7_instr5:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq7_instr6:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq7_instr7:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
# -----------------------------------===== lookupTable_seq8_instr0 [Optional] =====-----------------------------------
# Description: Offset: 0x00000100, Width: 16b; Lookup table holds Flash command sequences 8, instruction 0
lookupTable_seq8_instr0:
# ------------------------------------------===== OPERAND [Optional] =====------------------------------------------
# Description: Offset: 0b, Width: 8b, Instruction operand. Its values depends on used instruction
OPERAND: 0
# -----------------------------------------===== NUM_PADS [Optional] =====------------------------------------------
# Description: Offset: 8b, Width: 2b, Number of pads used by instruction. Some instructions ignores this parameter.
# - 1PAD, (0): Single mode. One pad is used.
# - 2PAD, (1): Dual mode. Two pads are used.
# - 4PAD, (2): Quad mode. Four pads are used.
# - 8PAD, (3): Octal mode. Eight pads are used.
# Possible options: <1PAD, 2PAD, 4PAD, 8PAD>
NUM_PADS: 1PAD
# --------------------------------------===== OPERATION_CODE [Optional] =====---------------------------------------
# Description: Offset: 10b, Width: 6b, Instruction operation code.
# - STOP, (0): Stop execution and de-assert CS. Then, the next command sequence (to the same flash device) starts
# from instruction pointer 0.
# - CMD_SDR, (1): Transmit command code to Flash.
# - RADDR_SDR, (2): Transmit row address to Flash.
# - CADDR_SDR, (3): Transmit column address to Flash.
# - MODE1_SDR, (4): Transmit mode bits to Flash.
# - MODE2_SDR, (5): Transmit mode bits to Flash.
# - MODE4_SDR, (6): Transmit mode bits to Flash.
# - MODE8_SDR, (7): Transmit mode bits to Flash.
# - WRITE_SDR, (8): Transmit program data to Flash device.
# - READ_SDR, (9): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_SDR, (10): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_SDR, (11): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_SDR, (12): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_SDR, (13): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# - JMP_ON_CS, (31): Stop execution, de-assert CS and save operand[7:0] as the instruction start pointer for next
# sequence.Normally this instruction is used to support Execute-In-Place enhanced mode. See XIP enhanced mode for
# more details.This instruction is only allowed for AHB read commands. There is interrupt status bit set
# (INTR[IPCMDERR] or INTR[AHBCMDERR]) when using this instruction in IP command or AHB write command.
# - CMD_DDR, (33): Transmit command code to Flash.
# - RADDR_DDR, (34): Transmit row address to Flash.
# - CADDR_DDR, (35): Transmit column address to Flash.
# - MODE1_DDR, (36): Transmit mode bits to Flash.
# - MODE2_DDR, (37): Transmit mode bits to Flash.
# - MODE4_DDR, (38): Transmit mode bits to Flash.
# - MODE8_DDR, (39): Transmit mode bits to Flash.
# - WRITE_DDR, (40): Transmit program data to Flash device.
# - READ_DDR, (41): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_DDR, (42): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_DDR, (43): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_DDR, (44): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_DDR, (45): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# Possible options: <STOP, CMD_SDR, RADDR_SDR, CADDR_SDR, MODE1_SDR, MODE2_SDR, MODE4_SDR, MODE8_SDR, WRITE_SDR,
# READ_SDR, LEARN_SDR, DATSZ_SDR, DUMMY_SDR, DUMMY_RWDS_SDR, JMP_ON_CS, CMD_DDR, RADDR_DDR, CADDR_DDR, MODE1_DDR,
# MODE2_DDR, MODE4_DDR, MODE8_DDR, WRITE_DDR, READ_DDR, LEARN_DDR, DATSZ_DDR, DUMMY_DDR, DUMMY_RWDS_DDR>
OPERATION_CODE: STOP
lookupTable_seq8_instr1:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq8_instr2:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq8_instr3:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq8_instr4:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq8_instr5:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq8_instr6:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq8_instr7:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
# -----------------------------------===== lookupTable_seq9_instr0 [Optional] =====-----------------------------------
# Description: Offset: 0x00000110, Width: 16b; Lookup table holds Flash command sequences 9, instruction 0
lookupTable_seq9_instr0:
# ------------------------------------------===== OPERAND [Optional] =====------------------------------------------
# Description: Offset: 0b, Width: 8b, Instruction operand. Its values depends on used instruction
OPERAND: 0
# -----------------------------------------===== NUM_PADS [Optional] =====------------------------------------------
# Description: Offset: 8b, Width: 2b, Number of pads used by instruction. Some instructions ignores this parameter.
# - 1PAD, (0): Single mode. One pad is used.
# - 2PAD, (1): Dual mode. Two pads are used.
# - 4PAD, (2): Quad mode. Four pads are used.
# - 8PAD, (3): Octal mode. Eight pads are used.
# Possible options: <1PAD, 2PAD, 4PAD, 8PAD>
NUM_PADS: 1PAD
# --------------------------------------===== OPERATION_CODE [Optional] =====---------------------------------------
# Description: Offset: 10b, Width: 6b, Instruction operation code.
# - STOP, (0): Stop execution and de-assert CS. Then, the next command sequence (to the same flash device) starts
# from instruction pointer 0.
# - CMD_SDR, (1): Transmit command code to Flash.
# - RADDR_SDR, (2): Transmit row address to Flash.
# - CADDR_SDR, (3): Transmit column address to Flash.
# - MODE1_SDR, (4): Transmit mode bits to Flash.
# - MODE2_SDR, (5): Transmit mode bits to Flash.
# - MODE4_SDR, (6): Transmit mode bits to Flash.
# - MODE8_SDR, (7): Transmit mode bits to Flash.
# - WRITE_SDR, (8): Transmit program data to Flash device.
# - READ_SDR, (9): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_SDR, (10): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_SDR, (11): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_SDR, (12): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_SDR, (13): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# - JMP_ON_CS, (31): Stop execution, de-assert CS and save operand[7:0] as the instruction start pointer for next
# sequence.Normally this instruction is used to support Execute-In-Place enhanced mode. See XIP enhanced mode for
# more details.This instruction is only allowed for AHB read commands. There is interrupt status bit set
# (INTR[IPCMDERR] or INTR[AHBCMDERR]) when using this instruction in IP command or AHB write command.
# - CMD_DDR, (33): Transmit command code to Flash.
# - RADDR_DDR, (34): Transmit row address to Flash.
# - CADDR_DDR, (35): Transmit column address to Flash.
# - MODE1_DDR, (36): Transmit mode bits to Flash.
# - MODE2_DDR, (37): Transmit mode bits to Flash.
# - MODE4_DDR, (38): Transmit mode bits to Flash.
# - MODE8_DDR, (39): Transmit mode bits to Flash.
# - WRITE_DDR, (40): Transmit program data to Flash device.
# - READ_DDR, (41): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_DDR, (42): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_DDR, (43): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_DDR, (44): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_DDR, (45): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# Possible options: <STOP, CMD_SDR, RADDR_SDR, CADDR_SDR, MODE1_SDR, MODE2_SDR, MODE4_SDR, MODE8_SDR, WRITE_SDR,
# READ_SDR, LEARN_SDR, DATSZ_SDR, DUMMY_SDR, DUMMY_RWDS_SDR, JMP_ON_CS, CMD_DDR, RADDR_DDR, CADDR_DDR, MODE1_DDR,
# MODE2_DDR, MODE4_DDR, MODE8_DDR, WRITE_DDR, READ_DDR, LEARN_DDR, DATSZ_DDR, DUMMY_DDR, DUMMY_RWDS_DDR>
OPERATION_CODE: STOP
lookupTable_seq9_instr1:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq9_instr2:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq9_instr3:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq9_instr4:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq9_instr5:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq9_instr6:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq9_instr7:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
# ----------------------------------===== lookupTable_seq10_instr0 [Optional] =====-----------------------------------
# Description: Offset: 0x00000120, Width: 16b; Lookup table holds Flash command sequences 10, instruction 0
lookupTable_seq10_instr0:
# ------------------------------------------===== OPERAND [Optional] =====------------------------------------------
# Description: Offset: 0b, Width: 8b, Instruction operand. Its values depends on used instruction
OPERAND: 0
# -----------------------------------------===== NUM_PADS [Optional] =====------------------------------------------
# Description: Offset: 8b, Width: 2b, Number of pads used by instruction. Some instructions ignores this parameter.
# - 1PAD, (0): Single mode. One pad is used.
# - 2PAD, (1): Dual mode. Two pads are used.
# - 4PAD, (2): Quad mode. Four pads are used.
# - 8PAD, (3): Octal mode. Eight pads are used.
# Possible options: <1PAD, 2PAD, 4PAD, 8PAD>
NUM_PADS: 1PAD
# --------------------------------------===== OPERATION_CODE [Optional] =====---------------------------------------
# Description: Offset: 10b, Width: 6b, Instruction operation code.
# - STOP, (0): Stop execution and de-assert CS. Then, the next command sequence (to the same flash device) starts
# from instruction pointer 0.
# - CMD_SDR, (1): Transmit command code to Flash.
# - RADDR_SDR, (2): Transmit row address to Flash.
# - CADDR_SDR, (3): Transmit column address to Flash.
# - MODE1_SDR, (4): Transmit mode bits to Flash.
# - MODE2_SDR, (5): Transmit mode bits to Flash.
# - MODE4_SDR, (6): Transmit mode bits to Flash.
# - MODE8_SDR, (7): Transmit mode bits to Flash.
# - WRITE_SDR, (8): Transmit program data to Flash device.
# - READ_SDR, (9): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_SDR, (10): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_SDR, (11): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_SDR, (12): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_SDR, (13): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# - JMP_ON_CS, (31): Stop execution, de-assert CS and save operand[7:0] as the instruction start pointer for next
# sequence.Normally this instruction is used to support Execute-In-Place enhanced mode. See XIP enhanced mode for
# more details.This instruction is only allowed for AHB read commands. There is interrupt status bit set
# (INTR[IPCMDERR] or INTR[AHBCMDERR]) when using this instruction in IP command or AHB write command.
# - CMD_DDR, (33): Transmit command code to Flash.
# - RADDR_DDR, (34): Transmit row address to Flash.
# - CADDR_DDR, (35): Transmit column address to Flash.
# - MODE1_DDR, (36): Transmit mode bits to Flash.
# - MODE2_DDR, (37): Transmit mode bits to Flash.
# - MODE4_DDR, (38): Transmit mode bits to Flash.
# - MODE8_DDR, (39): Transmit mode bits to Flash.
# - WRITE_DDR, (40): Transmit program data to Flash device.
# - READ_DDR, (41): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_DDR, (42): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_DDR, (43): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_DDR, (44): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_DDR, (45): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# Possible options: <STOP, CMD_SDR, RADDR_SDR, CADDR_SDR, MODE1_SDR, MODE2_SDR, MODE4_SDR, MODE8_SDR, WRITE_SDR,
# READ_SDR, LEARN_SDR, DATSZ_SDR, DUMMY_SDR, DUMMY_RWDS_SDR, JMP_ON_CS, CMD_DDR, RADDR_DDR, CADDR_DDR, MODE1_DDR,
# MODE2_DDR, MODE4_DDR, MODE8_DDR, WRITE_DDR, READ_DDR, LEARN_DDR, DATSZ_DDR, DUMMY_DDR, DUMMY_RWDS_DDR>
OPERATION_CODE: STOP
lookupTable_seq10_instr1:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq10_instr2:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq10_instr3:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq10_instr4:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq10_instr5:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq10_instr6:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq10_instr7:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
# ----------------------------------===== lookupTable_seq11_instr0 [Optional] =====-----------------------------------
# Description: Offset: 0x00000130, Width: 16b; Lookup table holds Flash command sequences 11, instruction 0
lookupTable_seq11_instr0:
# ------------------------------------------===== OPERAND [Optional] =====------------------------------------------
# Description: Offset: 0b, Width: 8b, Instruction operand. Its values depends on used instruction
OPERAND: 0
# -----------------------------------------===== NUM_PADS [Optional] =====------------------------------------------
# Description: Offset: 8b, Width: 2b, Number of pads used by instruction. Some instructions ignores this parameter.
# - 1PAD, (0): Single mode. One pad is used.
# - 2PAD, (1): Dual mode. Two pads are used.
# - 4PAD, (2): Quad mode. Four pads are used.
# - 8PAD, (3): Octal mode. Eight pads are used.
# Possible options: <1PAD, 2PAD, 4PAD, 8PAD>
NUM_PADS: 1PAD
# --------------------------------------===== OPERATION_CODE [Optional] =====---------------------------------------
# Description: Offset: 10b, Width: 6b, Instruction operation code.
# - STOP, (0): Stop execution and de-assert CS. Then, the next command sequence (to the same flash device) starts
# from instruction pointer 0.
# - CMD_SDR, (1): Transmit command code to Flash.
# - RADDR_SDR, (2): Transmit row address to Flash.
# - CADDR_SDR, (3): Transmit column address to Flash.
# - MODE1_SDR, (4): Transmit mode bits to Flash.
# - MODE2_SDR, (5): Transmit mode bits to Flash.
# - MODE4_SDR, (6): Transmit mode bits to Flash.
# - MODE8_SDR, (7): Transmit mode bits to Flash.
# - WRITE_SDR, (8): Transmit program data to Flash device.
# - READ_SDR, (9): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_SDR, (10): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_SDR, (11): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_SDR, (12): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_SDR, (13): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# - JMP_ON_CS, (31): Stop execution, de-assert CS and save operand[7:0] as the instruction start pointer for next
# sequence.Normally this instruction is used to support Execute-In-Place enhanced mode. See XIP enhanced mode for
# more details.This instruction is only allowed for AHB read commands. There is interrupt status bit set
# (INTR[IPCMDERR] or INTR[AHBCMDERR]) when using this instruction in IP command or AHB write command.
# - CMD_DDR, (33): Transmit command code to Flash.
# - RADDR_DDR, (34): Transmit row address to Flash.
# - CADDR_DDR, (35): Transmit column address to Flash.
# - MODE1_DDR, (36): Transmit mode bits to Flash.
# - MODE2_DDR, (37): Transmit mode bits to Flash.
# - MODE4_DDR, (38): Transmit mode bits to Flash.
# - MODE8_DDR, (39): Transmit mode bits to Flash.
# - WRITE_DDR, (40): Transmit program data to Flash device.
# - READ_DDR, (41): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_DDR, (42): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_DDR, (43): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_DDR, (44): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_DDR, (45): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# Possible options: <STOP, CMD_SDR, RADDR_SDR, CADDR_SDR, MODE1_SDR, MODE2_SDR, MODE4_SDR, MODE8_SDR, WRITE_SDR,
# READ_SDR, LEARN_SDR, DATSZ_SDR, DUMMY_SDR, DUMMY_RWDS_SDR, JMP_ON_CS, CMD_DDR, RADDR_DDR, CADDR_DDR, MODE1_DDR,
# MODE2_DDR, MODE4_DDR, MODE8_DDR, WRITE_DDR, READ_DDR, LEARN_DDR, DATSZ_DDR, DUMMY_DDR, DUMMY_RWDS_DDR>
OPERATION_CODE: STOP
lookupTable_seq11_instr1:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq11_instr2:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq11_instr3:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq11_instr4:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq11_instr5:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq11_instr6:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq11_instr7:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
# ----------------------------------===== lookupTable_seq12_instr0 [Optional] =====-----------------------------------
# Description: Offset: 0x00000140, Width: 16b; Lookup table holds Flash command sequences 12, instruction 0
lookupTable_seq12_instr0:
# ------------------------------------------===== OPERAND [Optional] =====------------------------------------------
# Description: Offset: 0b, Width: 8b, Instruction operand. Its values depends on used instruction
OPERAND: 0
# -----------------------------------------===== NUM_PADS [Optional] =====------------------------------------------
# Description: Offset: 8b, Width: 2b, Number of pads used by instruction. Some instructions ignores this parameter.
# - 1PAD, (0): Single mode. One pad is used.
# - 2PAD, (1): Dual mode. Two pads are used.
# - 4PAD, (2): Quad mode. Four pads are used.
# - 8PAD, (3): Octal mode. Eight pads are used.
# Possible options: <1PAD, 2PAD, 4PAD, 8PAD>
NUM_PADS: 1PAD
# --------------------------------------===== OPERATION_CODE [Optional] =====---------------------------------------
# Description: Offset: 10b, Width: 6b, Instruction operation code.
# - STOP, (0): Stop execution and de-assert CS. Then, the next command sequence (to the same flash device) starts
# from instruction pointer 0.
# - CMD_SDR, (1): Transmit command code to Flash.
# - RADDR_SDR, (2): Transmit row address to Flash.
# - CADDR_SDR, (3): Transmit column address to Flash.
# - MODE1_SDR, (4): Transmit mode bits to Flash.
# - MODE2_SDR, (5): Transmit mode bits to Flash.
# - MODE4_SDR, (6): Transmit mode bits to Flash.
# - MODE8_SDR, (7): Transmit mode bits to Flash.
# - WRITE_SDR, (8): Transmit program data to Flash device.
# - READ_SDR, (9): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_SDR, (10): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_SDR, (11): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_SDR, (12): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_SDR, (13): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# - JMP_ON_CS, (31): Stop execution, de-assert CS and save operand[7:0] as the instruction start pointer for next
# sequence.Normally this instruction is used to support Execute-In-Place enhanced mode. See XIP enhanced mode for
# more details.This instruction is only allowed for AHB read commands. There is interrupt status bit set
# (INTR[IPCMDERR] or INTR[AHBCMDERR]) when using this instruction in IP command or AHB write command.
# - CMD_DDR, (33): Transmit command code to Flash.
# - RADDR_DDR, (34): Transmit row address to Flash.
# - CADDR_DDR, (35): Transmit column address to Flash.
# - MODE1_DDR, (36): Transmit mode bits to Flash.
# - MODE2_DDR, (37): Transmit mode bits to Flash.
# - MODE4_DDR, (38): Transmit mode bits to Flash.
# - MODE8_DDR, (39): Transmit mode bits to Flash.
# - WRITE_DDR, (40): Transmit program data to Flash device.
# - READ_DDR, (41): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_DDR, (42): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_DDR, (43): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_DDR, (44): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_DDR, (45): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# Possible options: <STOP, CMD_SDR, RADDR_SDR, CADDR_SDR, MODE1_SDR, MODE2_SDR, MODE4_SDR, MODE8_SDR, WRITE_SDR,
# READ_SDR, LEARN_SDR, DATSZ_SDR, DUMMY_SDR, DUMMY_RWDS_SDR, JMP_ON_CS, CMD_DDR, RADDR_DDR, CADDR_DDR, MODE1_DDR,
# MODE2_DDR, MODE4_DDR, MODE8_DDR, WRITE_DDR, READ_DDR, LEARN_DDR, DATSZ_DDR, DUMMY_DDR, DUMMY_RWDS_DDR>
OPERATION_CODE: STOP
lookupTable_seq12_instr1:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq12_instr2:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq12_instr3:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq12_instr4:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq12_instr5:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq12_instr6:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq12_instr7:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
# ----------------------------------===== lookupTable_seq13_instr0 [Optional] =====-----------------------------------
# Description: Offset: 0x00000150, Width: 16b; Lookup table holds Flash command sequences 13, instruction 0
lookupTable_seq13_instr0:
# ------------------------------------------===== OPERAND [Optional] =====------------------------------------------
# Description: Offset: 0b, Width: 8b, Instruction operand. Its values depends on used instruction
OPERAND: 0
# -----------------------------------------===== NUM_PADS [Optional] =====------------------------------------------
# Description: Offset: 8b, Width: 2b, Number of pads used by instruction. Some instructions ignores this parameter.
# - 1PAD, (0): Single mode. One pad is used.
# - 2PAD, (1): Dual mode. Two pads are used.
# - 4PAD, (2): Quad mode. Four pads are used.
# - 8PAD, (3): Octal mode. Eight pads are used.
# Possible options: <1PAD, 2PAD, 4PAD, 8PAD>
NUM_PADS: 1PAD
# --------------------------------------===== OPERATION_CODE [Optional] =====---------------------------------------
# Description: Offset: 10b, Width: 6b, Instruction operation code.
# - STOP, (0): Stop execution and de-assert CS. Then, the next command sequence (to the same flash device) starts
# from instruction pointer 0.
# - CMD_SDR, (1): Transmit command code to Flash.
# - RADDR_SDR, (2): Transmit row address to Flash.
# - CADDR_SDR, (3): Transmit column address to Flash.
# - MODE1_SDR, (4): Transmit mode bits to Flash.
# - MODE2_SDR, (5): Transmit mode bits to Flash.
# - MODE4_SDR, (6): Transmit mode bits to Flash.
# - MODE8_SDR, (7): Transmit mode bits to Flash.
# - WRITE_SDR, (8): Transmit program data to Flash device.
# - READ_SDR, (9): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_SDR, (10): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_SDR, (11): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_SDR, (12): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_SDR, (13): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# - JMP_ON_CS, (31): Stop execution, de-assert CS and save operand[7:0] as the instruction start pointer for next
# sequence.Normally this instruction is used to support Execute-In-Place enhanced mode. See XIP enhanced mode for
# more details.This instruction is only allowed for AHB read commands. There is interrupt status bit set
# (INTR[IPCMDERR] or INTR[AHBCMDERR]) when using this instruction in IP command or AHB write command.
# - CMD_DDR, (33): Transmit command code to Flash.
# - RADDR_DDR, (34): Transmit row address to Flash.
# - CADDR_DDR, (35): Transmit column address to Flash.
# - MODE1_DDR, (36): Transmit mode bits to Flash.
# - MODE2_DDR, (37): Transmit mode bits to Flash.
# - MODE4_DDR, (38): Transmit mode bits to Flash.
# - MODE8_DDR, (39): Transmit mode bits to Flash.
# - WRITE_DDR, (40): Transmit program data to Flash device.
# - READ_DDR, (41): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_DDR, (42): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_DDR, (43): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_DDR, (44): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_DDR, (45): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# Possible options: <STOP, CMD_SDR, RADDR_SDR, CADDR_SDR, MODE1_SDR, MODE2_SDR, MODE4_SDR, MODE8_SDR, WRITE_SDR,
# READ_SDR, LEARN_SDR, DATSZ_SDR, DUMMY_SDR, DUMMY_RWDS_SDR, JMP_ON_CS, CMD_DDR, RADDR_DDR, CADDR_DDR, MODE1_DDR,
# MODE2_DDR, MODE4_DDR, MODE8_DDR, WRITE_DDR, READ_DDR, LEARN_DDR, DATSZ_DDR, DUMMY_DDR, DUMMY_RWDS_DDR>
OPERATION_CODE: STOP
lookupTable_seq13_instr1:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq13_instr2:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq13_instr3:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq13_instr4:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq13_instr5:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq13_instr6:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq13_instr7:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
# ----------------------------------===== lookupTable_seq14_instr0 [Optional] =====-----------------------------------
# Description: Offset: 0x00000160, Width: 16b; Lookup table holds Flash command sequences 14, instruction 0
lookupTable_seq14_instr0:
# ------------------------------------------===== OPERAND [Optional] =====------------------------------------------
# Description: Offset: 0b, Width: 8b, Instruction operand. Its values depends on used instruction
OPERAND: 0
# -----------------------------------------===== NUM_PADS [Optional] =====------------------------------------------
# Description: Offset: 8b, Width: 2b, Number of pads used by instruction. Some instructions ignores this parameter.
# - 1PAD, (0): Single mode. One pad is used.
# - 2PAD, (1): Dual mode. Two pads are used.
# - 4PAD, (2): Quad mode. Four pads are used.
# - 8PAD, (3): Octal mode. Eight pads are used.
# Possible options: <1PAD, 2PAD, 4PAD, 8PAD>
NUM_PADS: 1PAD
# --------------------------------------===== OPERATION_CODE [Optional] =====---------------------------------------
# Description: Offset: 10b, Width: 6b, Instruction operation code.
# - STOP, (0): Stop execution and de-assert CS. Then, the next command sequence (to the same flash device) starts
# from instruction pointer 0.
# - CMD_SDR, (1): Transmit command code to Flash.
# - RADDR_SDR, (2): Transmit row address to Flash.
# - CADDR_SDR, (3): Transmit column address to Flash.
# - MODE1_SDR, (4): Transmit mode bits to Flash.
# - MODE2_SDR, (5): Transmit mode bits to Flash.
# - MODE4_SDR, (6): Transmit mode bits to Flash.
# - MODE8_SDR, (7): Transmit mode bits to Flash.
# - WRITE_SDR, (8): Transmit program data to Flash device.
# - READ_SDR, (9): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_SDR, (10): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_SDR, (11): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_SDR, (12): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_SDR, (13): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# - JMP_ON_CS, (31): Stop execution, de-assert CS and save operand[7:0] as the instruction start pointer for next
# sequence.Normally this instruction is used to support Execute-In-Place enhanced mode. See XIP enhanced mode for
# more details.This instruction is only allowed for AHB read commands. There is interrupt status bit set
# (INTR[IPCMDERR] or INTR[AHBCMDERR]) when using this instruction in IP command or AHB write command.
# - CMD_DDR, (33): Transmit command code to Flash.
# - RADDR_DDR, (34): Transmit row address to Flash.
# - CADDR_DDR, (35): Transmit column address to Flash.
# - MODE1_DDR, (36): Transmit mode bits to Flash.
# - MODE2_DDR, (37): Transmit mode bits to Flash.
# - MODE4_DDR, (38): Transmit mode bits to Flash.
# - MODE8_DDR, (39): Transmit mode bits to Flash.
# - WRITE_DDR, (40): Transmit program data to Flash device.
# - READ_DDR, (41): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_DDR, (42): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_DDR, (43): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_DDR, (44): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_DDR, (45): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# Possible options: <STOP, CMD_SDR, RADDR_SDR, CADDR_SDR, MODE1_SDR, MODE2_SDR, MODE4_SDR, MODE8_SDR, WRITE_SDR,
# READ_SDR, LEARN_SDR, DATSZ_SDR, DUMMY_SDR, DUMMY_RWDS_SDR, JMP_ON_CS, CMD_DDR, RADDR_DDR, CADDR_DDR, MODE1_DDR,
# MODE2_DDR, MODE4_DDR, MODE8_DDR, WRITE_DDR, READ_DDR, LEARN_DDR, DATSZ_DDR, DUMMY_DDR, DUMMY_RWDS_DDR>
OPERATION_CODE: STOP
lookupTable_seq14_instr1:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq14_instr2:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq14_instr3:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq14_instr4:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq14_instr5:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq14_instr6:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq14_instr7:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
# ----------------------------------===== lookupTable_seq15_instr0 [Optional] =====-----------------------------------
# Description: Offset: 0x00000170, Width: 16b; Lookup table holds Flash command sequences 15, instruction 0
lookupTable_seq15_instr0:
# ------------------------------------------===== OPERAND [Optional] =====------------------------------------------
# Description: Offset: 0b, Width: 8b, Instruction operand. Its values depends on used instruction
OPERAND: 0
# -----------------------------------------===== NUM_PADS [Optional] =====------------------------------------------
# Description: Offset: 8b, Width: 2b, Number of pads used by instruction. Some instructions ignores this parameter.
# - 1PAD, (0): Single mode. One pad is used.
# - 2PAD, (1): Dual mode. Two pads are used.
# - 4PAD, (2): Quad mode. Four pads are used.
# - 8PAD, (3): Octal mode. Eight pads are used.
# Possible options: <1PAD, 2PAD, 4PAD, 8PAD>
NUM_PADS: 1PAD
# --------------------------------------===== OPERATION_CODE [Optional] =====---------------------------------------
# Description: Offset: 10b, Width: 6b, Instruction operation code.
# - STOP, (0): Stop execution and de-assert CS. Then, the next command sequence (to the same flash device) starts
# from instruction pointer 0.
# - CMD_SDR, (1): Transmit command code to Flash.
# - RADDR_SDR, (2): Transmit row address to Flash.
# - CADDR_SDR, (3): Transmit column address to Flash.
# - MODE1_SDR, (4): Transmit mode bits to Flash.
# - MODE2_SDR, (5): Transmit mode bits to Flash.
# - MODE4_SDR, (6): Transmit mode bits to Flash.
# - MODE8_SDR, (7): Transmit mode bits to Flash.
# - WRITE_SDR, (8): Transmit program data to Flash device.
# - READ_SDR, (9): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_SDR, (10): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_SDR, (11): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_SDR, (12): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_SDR, (13): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# - JMP_ON_CS, (31): Stop execution, de-assert CS and save operand[7:0] as the instruction start pointer for next
# sequence.Normally this instruction is used to support Execute-In-Place enhanced mode. See XIP enhanced mode for
# more details.This instruction is only allowed for AHB read commands. There is interrupt status bit set
# (INTR[IPCMDERR] or INTR[AHBCMDERR]) when using this instruction in IP command or AHB write command.
# - CMD_DDR, (33): Transmit command code to Flash.
# - RADDR_DDR, (34): Transmit row address to Flash.
# - CADDR_DDR, (35): Transmit column address to Flash.
# - MODE1_DDR, (36): Transmit mode bits to Flash.
# - MODE2_DDR, (37): Transmit mode bits to Flash.
# - MODE4_DDR, (38): Transmit mode bits to Flash.
# - MODE8_DDR, (39): Transmit mode bits to Flash.
# - WRITE_DDR, (40): Transmit program data to Flash device.
# - READ_DDR, (41): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_DDR, (42): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_DDR, (43): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_DDR, (44): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_DDR, (45): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# Possible options: <STOP, CMD_SDR, RADDR_SDR, CADDR_SDR, MODE1_SDR, MODE2_SDR, MODE4_SDR, MODE8_SDR, WRITE_SDR,
# READ_SDR, LEARN_SDR, DATSZ_SDR, DUMMY_SDR, DUMMY_RWDS_SDR, JMP_ON_CS, CMD_DDR, RADDR_DDR, CADDR_DDR, MODE1_DDR,
# MODE2_DDR, MODE4_DDR, MODE8_DDR, WRITE_DDR, READ_DDR, LEARN_DDR, DATSZ_DDR, DUMMY_DDR, DUMMY_RWDS_DDR>
OPERATION_CODE: STOP
lookupTable_seq15_instr1:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq15_instr2:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq15_instr3:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq15_instr4:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq15_instr5:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq15_instr6:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq15_instr7:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
# ---------------------------------------===== lutCustomSeq_0 [Optional] =====----------------------------------------
# Description: Offset: 0x00000180, Width: 32b; [0x180-0x1af] Customizable LUT Sequences
lutCustomSeq_0:
# ------------------------------------------===== seqNum [Optional] =====-------------------------------------------
# Description: Offset: 0b, Width: 8b, Sequence Number, valid number: 1-16
seqNum: 0
# -------------------------------------------===== seqId [Optional] =====-------------------------------------------
# Description: Offset: 8b, Width: 8b, Sequence Index, valid number: 0-15
seqId: 0
# -----------------------------------------===== reserved [Optional] =====------------------------------------------
# Description: Offset: 16b, Width: 16b, N/A
reserved: 0
# ---------------------------------------===== lutCustomSeq_1 [Optional] =====----------------------------------------
# Description: Offset: 0x00000184, Width: 32b; [0x180-0x1af] Customizable LUT Sequences
lutCustomSeq_1:
# ------------------------------------------===== seqNum [Optional] =====-------------------------------------------
# Description: Offset: 0b, Width: 8b, Sequence Number, valid number: 1-16
seqNum: 0
# -------------------------------------------===== seqId [Optional] =====-------------------------------------------
# Description: Offset: 8b, Width: 8b, Sequence Index, valid number: 0-15
seqId: 0
# -----------------------------------------===== reserved [Optional] =====------------------------------------------
# Description: Offset: 16b, Width: 16b, N/A
reserved: 0
# ---------------------------------------===== lutCustomSeq_2 [Optional] =====----------------------------------------
# Description: Offset: 0x00000188, Width: 32b; [0x180-0x1af] Customizable LUT Sequences
lutCustomSeq_2:
# ------------------------------------------===== seqNum [Optional] =====-------------------------------------------
# Description: Offset: 0b, Width: 8b, Sequence Number, valid number: 1-16
seqNum: 0
# -------------------------------------------===== seqId [Optional] =====-------------------------------------------
# Description: Offset: 8b, Width: 8b, Sequence Index, valid number: 0-15
seqId: 0
# -----------------------------------------===== reserved [Optional] =====------------------------------------------
# Description: Offset: 16b, Width: 16b, N/A
reserved: 0
# ---------------------------------------===== lutCustomSeq_3 [Optional] =====----------------------------------------
# Description: Offset: 0x0000018C, Width: 32b; [0x180-0x1af] Customizable LUT Sequences
lutCustomSeq_3:
# ------------------------------------------===== seqNum [Optional] =====-------------------------------------------
# Description: Offset: 0b, Width: 8b, Sequence Number, valid number: 1-16
seqNum: 0
# -------------------------------------------===== seqId [Optional] =====-------------------------------------------
# Description: Offset: 8b, Width: 8b, Sequence Index, valid number: 0-15
seqId: 0
# -----------------------------------------===== reserved [Optional] =====------------------------------------------
# Description: Offset: 16b, Width: 16b, N/A
reserved: 0
# ---------------------------------------===== lutCustomSeq_4 [Optional] =====----------------------------------------
# Description: Offset: 0x00000190, Width: 32b; [0x180-0x1af] Customizable LUT Sequences
lutCustomSeq_4:
# ------------------------------------------===== seqNum [Optional] =====-------------------------------------------
# Description: Offset: 0b, Width: 8b, Sequence Number, valid number: 1-16
seqNum: 0
# -------------------------------------------===== seqId [Optional] =====-------------------------------------------
# Description: Offset: 8b, Width: 8b, Sequence Index, valid number: 0-15
seqId: 0
# -----------------------------------------===== reserved [Optional] =====------------------------------------------
# Description: Offset: 16b, Width: 16b, N/A
reserved: 0
# ---------------------------------------===== lutCustomSeq_5 [Optional] =====----------------------------------------
# Description: Offset: 0x00000194, Width: 32b; [0x180-0x1af] Customizable LUT Sequences
lutCustomSeq_5:
# ------------------------------------------===== seqNum [Optional] =====-------------------------------------------
# Description: Offset: 0b, Width: 8b, Sequence Number, valid number: 1-16
seqNum: 0
# -------------------------------------------===== seqId [Optional] =====-------------------------------------------
# Description: Offset: 8b, Width: 8b, Sequence Index, valid number: 0-15
seqId: 0
# -----------------------------------------===== reserved [Optional] =====------------------------------------------
# Description: Offset: 16b, Width: 16b, N/A
reserved: 0
# ---------------------------------------===== lutCustomSeq_6 [Optional] =====----------------------------------------
# Description: Offset: 0x00000198, Width: 32b; [0x180-0x1af] Customizable LUT Sequences
lutCustomSeq_6:
# ------------------------------------------===== seqNum [Optional] =====-------------------------------------------
# Description: Offset: 0b, Width: 8b, Sequence Number, valid number: 1-16
seqNum: 0
# -------------------------------------------===== seqId [Optional] =====-------------------------------------------
# Description: Offset: 8b, Width: 8b, Sequence Index, valid number: 0-15
seqId: 0
# -----------------------------------------===== reserved [Optional] =====------------------------------------------
# Description: Offset: 16b, Width: 16b, N/A
reserved: 0
# ---------------------------------------===== lutCustomSeq_7 [Optional] =====----------------------------------------
# Description: Offset: 0x0000019C, Width: 32b; [0x180-0x1af] Customizable LUT Sequences
lutCustomSeq_7:
# ------------------------------------------===== seqNum [Optional] =====-------------------------------------------
# Description: Offset: 0b, Width: 8b, Sequence Number, valid number: 1-16
seqNum: 0
# -------------------------------------------===== seqId [Optional] =====-------------------------------------------
# Description: Offset: 8b, Width: 8b, Sequence Index, valid number: 0-15
seqId: 0
# -----------------------------------------===== reserved [Optional] =====------------------------------------------
# Description: Offset: 16b, Width: 16b, N/A
reserved: 0
# ---------------------------------------===== lutCustomSeq_8 [Optional] =====----------------------------------------
# Description: Offset: 0x000001A0, Width: 32b; [0x180-0x1af] Customizable LUT Sequences
lutCustomSeq_8:
# ------------------------------------------===== seqNum [Optional] =====-------------------------------------------
# Description: Offset: 0b, Width: 8b, Sequence Number, valid number: 1-16
seqNum: 0
# -------------------------------------------===== seqId [Optional] =====-------------------------------------------
# Description: Offset: 8b, Width: 8b, Sequence Index, valid number: 0-15
seqId: 0
# -----------------------------------------===== reserved [Optional] =====------------------------------------------
# Description: Offset: 16b, Width: 16b, N/A
reserved: 0
# ---------------------------------------===== lutCustomSeq_9 [Optional] =====----------------------------------------
# Description: Offset: 0x000001A4, Width: 32b; [0x180-0x1af] Customizable LUT Sequences
lutCustomSeq_9:
# ------------------------------------------===== seqNum [Optional] =====-------------------------------------------
# Description: Offset: 0b, Width: 8b, Sequence Number, valid number: 1-16
seqNum: 0
# -------------------------------------------===== seqId [Optional] =====-------------------------------------------
# Description: Offset: 8b, Width: 8b, Sequence Index, valid number: 0-15
seqId: 0
# -----------------------------------------===== reserved [Optional] =====------------------------------------------
# Description: Offset: 16b, Width: 16b, N/A
reserved: 0
# ---------------------------------------===== lutCustomSeq_10 [Optional] =====---------------------------------------
# Description: Offset: 0x000001A8, Width: 32b; [0x180-0x1af] Customizable LUT Sequences
lutCustomSeq_10:
# ------------------------------------------===== seqNum [Optional] =====-------------------------------------------
# Description: Offset: 0b, Width: 8b, Sequence Number, valid number: 1-16
seqNum: 0
# -------------------------------------------===== seqId [Optional] =====-------------------------------------------
# Description: Offset: 8b, Width: 8b, Sequence Index, valid number: 0-15
seqId: 0
# -----------------------------------------===== reserved [Optional] =====------------------------------------------
# Description: Offset: 16b, Width: 16b, N/A
reserved: 0
# ---------------------------------------===== lutCustomSeq_11 [Optional] =====---------------------------------------
# Description: Offset: 0x000001AC, Width: 32b; [0x180-0x1af] Customizable LUT Sequences
lutCustomSeq_11:
# ------------------------------------------===== seqNum [Optional] =====-------------------------------------------
# Description: Offset: 0b, Width: 8b, Sequence Number, valid number: 1-16
seqNum: 0
# -------------------------------------------===== seqId [Optional] =====-------------------------------------------
# Description: Offset: 8b, Width: 8b, Sequence Index, valid number: 0-15
seqId: 0
# -----------------------------------------===== reserved [Optional] =====------------------------------------------
# Description: Offset: 16b, Width: 16b, N/A
reserved: 0
# -----------------------------------------===== reserved9_0 [Optional] =====-----------------------------------------
# Description: Offset: 0x000001B0, Width: 32b; [0x1b0-0x1bf] Reserved for future use
reserved9_0: '0x00000000'
# -----------------------------------------===== reserved9_1 [Optional] =====-----------------------------------------
# Description: Offset: 0x000001B4, Width: 32b; [0x1b0-0x1bf] Reserved for future use
reserved9_1: '0x00000000'
# -----------------------------------------===== reserved9_2 [Optional] =====-----------------------------------------
# Description: Offset: 0x000001B8, Width: 32b; [0x1b0-0x1bf] Reserved for future use
reserved9_2: '0x00000000'
# -----------------------------------------===== reserved9_3 [Optional] =====-----------------------------------------
# Description: Offset: 0x000001BC, Width: 32b; [0x1b0-0x1bf] Reserved for future use
reserved9_3: '0x00000000'
# ------------------------------------------===== pageSize [Optional] =====-------------------------------------------
# Description: Offset: 0x000001C0, Width: 32b; Page size of Serial NOR
pageSize: '0x00000000'
# -----------------------------------------===== sectorSize [Optional] =====------------------------------------------
# Description: Offset: 0x000001C4, Width: 32b; Sector size of Serial NOR
sectorSize: '0x00000000'
# -------------------------------------===== ipcmdSerialClkFreq [Optional] =====--------------------------------------
# Description: Offset: 0x000001C8, Width: 8b; Clock frequency for IP command
ipcmdSerialClkFreq: '0x00'
# -------------------------------------===== isUniformBlockSize [Optional] =====--------------------------------------
# Description: Offset: 0x000001C9, Width: 8b; Sector/Block size is the same
isUniformBlockSize: '0x00'
# -------------------------------------===== isDataOrderSwapped [Optional] =====--------------------------------------
# Description: Offset: 0x000001CA, Width: 8b; The data order is swapped in OPI DDR mode
isDataOrderSwapped: '0x00'
# ----------------------------------------===== reserved10_0 [Optional] =====-----------------------------------------
# Description: Offset: 0x000001CB, Width: 8b; Reserved for future use
reserved10_0: '0x00'
# ----------------------------------------===== reserved10_1 [Optional] =====-----------------------------------------
# Description: Offset: 0x000001CC, Width: 8b; Reserved for future use
reserved10_1: '0x00'
# ----------------------------------------===== reserved10_2 [Optional] =====-----------------------------------------
# Description: Offset: 0x000001CD, Width: 8b; Reserved for future use
reserved10_2: '0x00'
# ----------------------------------------===== reserved10_3 [Optional] =====-----------------------------------------
# Description: Offset: 0x000001CE, Width: 8b; Reserved for future use
reserved10_3: '0x00'
# ----------------------------------------===== reserved10_4 [Optional] =====-----------------------------------------
# Description: Offset: 0x000001CF, Width: 8b; Reserved for future use
reserved10_4: '0x00'
# ------------------------------------------===== blockSize [Optional] =====------------------------------------------
# Description: Offset: 0x000001D0, Width: 32b; Block size
blockSize: '0x00000000'
# ----------------------------------------===== flashStateCtx [Optional] =====----------------------------------------
# Description: Offset: 0x000001D4, Width: 32b; Flash State Context after being configured
flashStateCtx:
# ---------------------------------------===== flashPorMode [Optional] =====----------------------------------------
# Description: Offset: 0b, Width: 8b, Flash POR Mode
flashPorMode: 0
# -------------------------------------===== flashCurrentMode [Optional] =====--------------------------------------
# Description: Offset: 8b, Width: 8b, Sequence Number, valid number: 1-16
flashCurrentMode: 0
# -----------------------------------------===== reserved [Optional] =====------------------------------------------
# Description: Offset: 16b, Width: 8b, Sequence Number, valid number: 1-16
reserved: 0
# ----------------------------------===== flashRestoringSequence [Optional] =====-----------------------------------
# Description: Offset: 24b, Width: 8b, Sequence Number, valid number: 1-16
flashRestoringSequence: 0
# ----------------------------------------===== reserved11_0 [Optional] =====-----------------------------------------
# Description: Offset: 0x000001D8, Width: 32b; Reserved for future use
reserved11_0: '0x00000000'
# ----------------------------------------===== reserved11_1 [Optional] =====-----------------------------------------
# Description: Offset: 0x000001DC, Width: 32b; Reserved for future use
reserved11_1: '0x00000000'
# ----------------------------------------===== reserved11_2 [Optional] =====-----------------------------------------
# Description: Offset: 0x000001E0, Width: 32b; Reserved for future use
reserved11_2: '0x00000000'
# ----------------------------------------===== reserved11_3 [Optional] =====-----------------------------------------
# Description: Offset: 0x000001E4, Width: 32b; Reserved for future use
reserved11_3: '0x00000000'
# ----------------------------------------===== reserved11_4 [Optional] =====-----------------------------------------
# Description: Offset: 0x000001E8, Width: 32b; Reserved for future use
reserved11_4: '0x00000000'
# ----------------------------------------===== reserved11_5 [Optional] =====-----------------------------------------
# Description: Offset: 0x000001EC, Width: 32b; Reserved for future use
reserved11_5: '0x00000000'
# ----------------------------------------===== reserved11_6 [Optional] =====-----------------------------------------
# Description: Offset: 0x000001F0, Width: 32b; Reserved for future use
reserved11_6: '0x00000000'
# ----------------------------------------===== reserved11_7 [Optional] =====-----------------------------------------
# Description: Offset: 0x000001F4, Width: 32b; Reserved for future use
reserved11_7: '0x00000000'
# ----------------------------------------===== reserved11_8 [Optional] =====-----------------------------------------
# Description: Offset: 0x000001F8, Width: 32b; Reserved for future use
reserved11_8: '0x00000000'
# ----------------------------------------===== reserved11_9 [Optional] =====-----------------------------------------
# Description: Offset: 0x000001FC, Width: 32b; Reserved for future use
reserved11_9: '0x00000000'
FCB for mimxrt533s, Revision: b0 and flexspi_nor#
FCB for mimxrt533s, Revision: b0 and flexspi_nor JSON schema
FCB for mimxrt533s, Revision: b0 and flexspi_nor YAML configuration template
# ================================= FCB for mimxrt533s, Revision: b0 and flexspi_nor =================================
# ======================================================================================================================
# == FCB for mimxrt533s, Revision: b0 and flexspi_nor ==
# ======================================================================================================================
# -------------------------------------===== The chip family name [Required] =====--------------------------------------
# Description: NXP chip family identifier.
family: CHOOSE_FROM_TABLE
# -----------------------------------------===== MCU revision [Optional] =====------------------------------------------
# Description: Revision of silicon. The 'latest' name, means most current revision.
# Possible options: <a0, b0, latest>
revision: b0
# ------------------------------------------===== Memory type [Required] =====------------------------------------------
# Description: Specify type of memory used by FCB description.
# Possible options: <flexspi_nor>
type: flexspi_nor
# ------------------------------------------===== mimxrt533s [Required] =====-------------------------------------------
fcb_settings:
# ---------------------------------------------===== tag [Optional] =====---------------------------------------------
# Description: Offset: 0x00000000, Width: 32b; [0x000-0x003] Tag, fixed value 0x42464346UL
tag: '0x42464346'
# -------------------------------------------===== version [Optional] =====-------------------------------------------
# Description: Offset: 0x00000004, Width: 32b; [0x004-0x007] Version,[31:24] -'V', [23:16] - Major, [15:8] - Minor,
# [7:0] - bugfix
version: '0x56010400'
# ------------------------------------------===== reserved0 [Optional] =====------------------------------------------
# Description: Offset: 0x00000008, Width: 32b; [0x008-0x00b] Reserved for future use
reserved0: '0x00000000'
# --------------------------------------===== readSampleClkSrc [Optional] =====---------------------------------------
# Description: Offset: 0x0000000C, Width: 8b; [0x00c-0x00c] Read Sample Clock Source, valid value: 0/1/3
readSampleClkSrc: '0x00'
# -----------------------------------------===== csHoldTime [Optional] =====------------------------------------------
# Description: Offset: 0x0000000D, Width: 8b; [0x00d-0x00d] CS hold time, default value: 3
csHoldTime: '0x00'
# -----------------------------------------===== csSetupTime [Optional] =====-----------------------------------------
# Description: Offset: 0x0000000E, Width: 8b; [0x00e-0x00e] CS setup time, default value: 3
csSetupTime: '0x00'
# -------------------------------------===== columnAddressWidth [Optional] =====--------------------------------------
# Description: Offset: 0x0000000F, Width: 8b; [0x00f-0x00f] Column Address with, for HyperBus protocol, it is fixed
# to 3, For Serial NAND, need to refer to datasheet
columnAddressWidth: '0x00'
# -------------------------------------===== deviceModeCfgEnable [Optional] =====-------------------------------------
# Description: Offset: 0x00000010, Width: 8b; [0x010-0x010] Device Mode Configure enable flag, 1 - Enable, 0 -
# Disable
deviceModeCfgEnable: '0x00'
# ---------------------------------------===== deviceModeType [Optional] =====----------------------------------------
# Description: Offset: 0x00000011, Width: 8b; [0x011-0x011] Specify the configuration command type:Quad Enable,
# DPI/QPI/OPI switch, Generic configuration, etc.
deviceModeType: '0x00'
# -------------------------------------===== waitTimeCfgCommands [Optional] =====-------------------------------------
# Description: Offset: 0x00000012, Width: 16b; [0x012-0x013] Wait time for all configuration commands, unit: 100us,
# Used for DPI/QPI/OPI switch or reset command
waitTimeCfgCommands: '0x0000'
# ----------------------------------------===== deviceModeSeq [Optional] =====----------------------------------------
# Description: Offset: 0x00000014, Width: 32b; [0x014-0x017] Device mode sequence info, [7:0] - LUT sequence id,
# [15:8] - LUt sequence number, [31:16] Reserved
deviceModeSeq:
# ------------------------------------------===== seqNum [Optional] =====-------------------------------------------
# Description: Offset: 0b, Width: 8b, Sequence Number, valid number: 1-16
seqNum: 0
# -------------------------------------------===== seqId [Optional] =====-------------------------------------------
# Description: Offset: 8b, Width: 8b, Sequence Index, valid number: 0-15
seqId: 0
# -----------------------------------------===== reserved [Optional] =====------------------------------------------
# Description: Offset: 16b, Width: 16b, N/A
reserved: 0
# ----------------------------------------===== deviceModeArg [Optional] =====----------------------------------------
# Description: Offset: 0x00000018, Width: 32b; [0x018-0x01b] Argument/Parameter for device configuration
deviceModeArg: '0x00000000'
# ---------------------------------------===== configCmdEnable [Optional] =====---------------------------------------
# Description: Offset: 0x0000001C, Width: 8b; [0x01c-0x01c] Configure command Enable Flag, 1 - Enable, 0 - Disable
configCmdEnable: '0x00'
# --------------------------------------===== configModeType_0 [Optional] =====---------------------------------------
# Description: Offset: 0x0000001D, Width: 8b; [0x01d-0x01f] Configure Mode Type, similar as deviceModeTpe
configModeType_0: '0x00'
# --------------------------------------===== configModeType_1 [Optional] =====---------------------------------------
# Description: Offset: 0x0000001E, Width: 8b; [0x01d-0x01f] Configure Mode Type, similar as deviceModeTpe
configModeType_1: '0x00'
# --------------------------------------===== configModeType_2 [Optional] =====---------------------------------------
# Description: Offset: 0x0000001F, Width: 8b; [0x01d-0x01f] Configure Mode Type, similar as deviceModeTpe
configModeType_2: '0x00'
# ---------------------------------------===== configCmdSeqs_0 [Optional] =====---------------------------------------
# Description: Offset: 0x00000020, Width: 32b; [0x020-0x02b] Sequence info for Device Configuration command, similar
# as deviceModeSeq
configCmdSeqs_0:
# ------------------------------------------===== seqNum [Optional] =====-------------------------------------------
# Description: Offset: 0b, Width: 8b, Sequence Number, valid number: 1-16
seqNum: 0
# -------------------------------------------===== seqId [Optional] =====-------------------------------------------
# Description: Offset: 8b, Width: 8b, Sequence Index, valid number: 0-15
seqId: 0
# -----------------------------------------===== reserved [Optional] =====------------------------------------------
# Description: Offset: 16b, Width: 16b, N/A
reserved: 0
# ---------------------------------------===== configCmdSeqs_1 [Optional] =====---------------------------------------
# Description: Offset: 0x00000024, Width: 32b; [0x020-0x02b] Sequence info for Device Configuration command, similar
# as deviceModeSeq
configCmdSeqs_1:
# ------------------------------------------===== seqNum [Optional] =====-------------------------------------------
# Description: Offset: 0b, Width: 8b, Sequence Number, valid number: 1-16
seqNum: 0
# -------------------------------------------===== seqId [Optional] =====-------------------------------------------
# Description: Offset: 8b, Width: 8b, Sequence Index, valid number: 0-15
seqId: 0
# -----------------------------------------===== reserved [Optional] =====------------------------------------------
# Description: Offset: 16b, Width: 16b, N/A
reserved: 0
# ---------------------------------------===== configCmdSeqs_2 [Optional] =====---------------------------------------
# Description: Offset: 0x00000028, Width: 32b; [0x020-0x02b] Sequence info for Device Configuration command, similar
# as deviceModeSeq
configCmdSeqs_2:
# ------------------------------------------===== seqNum [Optional] =====-------------------------------------------
# Description: Offset: 0b, Width: 8b, Sequence Number, valid number: 1-16
seqNum: 0
# -------------------------------------------===== seqId [Optional] =====-------------------------------------------
# Description: Offset: 8b, Width: 8b, Sequence Index, valid number: 0-15
seqId: 0
# -----------------------------------------===== reserved [Optional] =====------------------------------------------
# Description: Offset: 16b, Width: 16b, N/A
reserved: 0
# ------------------------------------------===== reserved1 [Optional] =====------------------------------------------
# Description: Offset: 0x0000002C, Width: 32b; [0x02c-0x02f] Reserved for future use
reserved1: '0x00000000'
# ---------------------------------------===== configCmdArgs_0 [Optional] =====---------------------------------------
# Description: Offset: 0x00000030, Width: 32b; [0x030-0x03b] Arguments/Parameters for device Configuration commands
configCmdArgs_0: '0x00000000'
# ---------------------------------------===== configCmdArgs_1 [Optional] =====---------------------------------------
# Description: Offset: 0x00000034, Width: 32b; [0x030-0x03b] Arguments/Parameters for device Configuration commands
configCmdArgs_1: '0x00000000'
# ---------------------------------------===== configCmdArgs_2 [Optional] =====---------------------------------------
# Description: Offset: 0x00000038, Width: 32b; [0x030-0x03b] Arguments/Parameters for device Configuration commands
configCmdArgs_2: '0x00000000'
# ------------------------------------------===== reserved2 [Optional] =====------------------------------------------
# Description: Offset: 0x0000003C, Width: 32b; [0x03c-0x03f] Reserved for future use
reserved2: '0x00000000'
# ------------------------------------===== controllerMiscOption [Optional] =====-------------------------------------
# Description: Offset: 0x00000040, Width: 32b; [0x040-0x043] Controller Misc Options, see Misc feature bit
# definitions for more details
controllerMiscOption: '0x00000000'
# -----------------------------------------===== deviceType [Optional] =====------------------------------------------
# Description: Offset: 0x00000044, Width: 8b; [0x044-0x044] Device Type: See Flash Type Definition for more details
deviceType: '0x00'
# ----------------------------------------===== sflashPadType [Optional] =====----------------------------------------
# Description: Offset: 0x00000045, Width: 8b; [0x045-0x045] Serial Flash Pad Type: 1 - Single, 2 - Dual, 4 - Quad, 8
# - Octal
sflashPadType: '0x00'
# ----------------------------------------===== serialClkFreq [Optional] =====----------------------------------------
# Description: Offset: 0x00000046, Width: 8b; [0x046-0x046] Serial Flash Frequency, device specific definitions, See
# System Boot Chapter for more details
serialClkFreq: '0x00'
# -------------------------------------===== lutCustomSeqEnable [Optional] =====--------------------------------------
# Description: Offset: 0x00000047, Width: 8b; [0x047-0x047] LUT customization Enable, it is required if the
# program/erase cannot be done using 1 LUT sequence, currently, only applicable to HyperFLASH
lutCustomSeqEnable: '0x00'
# -----------------------------------------===== reserved3_0 [Optional] =====-----------------------------------------
# Description: Offset: 0x00000048, Width: 32b; [0x048-0x04f] Reserved for future use
reserved3_0: '0x00000000'
# -----------------------------------------===== reserved3_1 [Optional] =====-----------------------------------------
# Description: Offset: 0x0000004C, Width: 32b; [0x048-0x04f] Reserved for future use
reserved3_1: '0x00000000'
# ----------------------------------------===== sflashA1Size [Optional] =====-----------------------------------------
# Description: Offset: 0x00000050, Width: 32b; [0x050-0x053] Size of Flash connected to A1
sflashA1Size: '0x00000000'
# ----------------------------------------===== sflashA2Size [Optional] =====-----------------------------------------
# Description: Offset: 0x00000054, Width: 32b; [0x054-0x057] Size of Flash connected to A2
sflashA2Size: '0x00000000'
# ----------------------------------------===== sflashB1Size [Optional] =====-----------------------------------------
# Description: Offset: 0x00000058, Width: 32b; [0x058-0x05b] Size of Flash connected to B1
sflashB1Size: '0x00000000'
# ----------------------------------------===== sflashB2Size [Optional] =====-----------------------------------------
# Description: Offset: 0x0000005C, Width: 32b; [0x05c-0x05f] Size of Flash connected to B2
sflashB2Size: '0x00000000'
# ------------------------------------===== csPadSettingOverride [Optional] =====-------------------------------------
# Description: Offset: 0x00000060, Width: 32b; [0x060-0x063] CS pad setting override value
csPadSettingOverride: '0x00000000'
# -----------------------------------===== sclkPadSettingOverride [Optional] =====------------------------------------
# Description: Offset: 0x00000064, Width: 32b; [0x064-0x067] SCK pad setting override value
sclkPadSettingOverride: '0x00000000'
# -----------------------------------===== dataPadSettingOverride [Optional] =====------------------------------------
# Description: Offset: 0x00000068, Width: 32b; [0x068-0x06b] data pad setting override value
dataPadSettingOverride: '0x00000000'
# ------------------------------------===== dqsPadSettingOverride [Optional] =====------------------------------------
# Description: Offset: 0x0000006C, Width: 32b; [0x06c-0x06f] DQS pad setting override value
dqsPadSettingOverride: '0x00000000'
# -----------------------------------------===== timeoutInMs [Optional] =====-----------------------------------------
# Description: Offset: 0x00000070, Width: 32b; [0x070-0x073] Timeout threshold for read status command
timeoutInMs: '0x00000000'
# ---------------------------------------===== commandInterval [Optional] =====---------------------------------------
# Description: Offset: 0x00000074, Width: 32b; [0x074-0x077] CS deselect interval between two commands
commandInterval: '0x00000000'
# ---------------------------------------===== dataValidTime_0 [Optional] =====---------------------------------------
# Description: Offset: 0x00000078, Width: 16b; [0x078-0x07b] CLK edge to data valid time for PORT A and PORT B
dataValidTime_0:
# ----------------------------------------===== time_100ps [Optional] =====-----------------------------------------
# Description: Offset: 0b, Width: 8b, Data valid time, in terms of 100ps
time_100ps: 0
# ----------------------------------------===== delay_cells [Optional] =====----------------------------------------
# Description: Offset: 8b, Width: 8b, Data valid time, in terms of delay cells
delay_cells: 0
# ---------------------------------------===== dataValidTime_1 [Optional] =====---------------------------------------
# Description: Offset: 0x0000007A, Width: 16b; [0x078-0x07b] CLK edge to data valid time for PORT A and PORT B
dataValidTime_1:
# ----------------------------------------===== time_100ps [Optional] =====-----------------------------------------
# Description: Offset: 0b, Width: 8b, Data valid time, in terms of 100ps
time_100ps: 0
# ----------------------------------------===== delay_cells [Optional] =====----------------------------------------
# Description: Offset: 8b, Width: 8b, Data valid time, in terms of delay cells
delay_cells: 0
# -----------------------------------------===== busyOffset [Optional] =====------------------------------------------
# Description: Offset: 0x0000007C, Width: 16b; [0x07c-0x07d] Busy offset, valid value: 0-31
busyOffset: '0x0000'
# ---------------------------------------===== busyBitPolarity [Optional] =====---------------------------------------
# Description: Offset: 0x0000007E, Width: 16b; [0x07e-0x07f] Busy flag polarity, 0 - busy flag is 1 when flash device
# is busy, 1 - busy flag is 0 when flash device is busy
busyBitPolarity: '0x0000'
# -----------------------------------===== lookupTable_seq0_instr0 [Optional] =====-----------------------------------
# Description: Offset: 0x00000080, Width: 16b; Lookup table holds Flash command sequences 0, instruction 0
lookupTable_seq0_instr0:
# ------------------------------------------===== OPERAND [Optional] =====------------------------------------------
# Description: Offset: 0b, Width: 8b, Instruction operand. Its values depends on used instruction
OPERAND: 0
# -----------------------------------------===== NUM_PADS [Optional] =====------------------------------------------
# Description: Offset: 8b, Width: 2b, Number of pads used by instruction. Some instructions ignores this parameter.
# - 1PAD, (0): Single mode. One pad is used.
# - 2PAD, (1): Dual mode. Two pads are used.
# - 4PAD, (2): Quad mode. Four pads are used.
# - 8PAD, (3): Octal mode. Eight pads are used.
# Possible options: <1PAD, 2PAD, 4PAD, 8PAD>
NUM_PADS: 1PAD
# --------------------------------------===== OPERATION_CODE [Optional] =====---------------------------------------
# Description: Offset: 10b, Width: 6b, Instruction operation code.
# - STOP, (0): Stop execution and de-assert CS. Then, the next command sequence (to the same flash device) starts
# from instruction pointer 0.
# - CMD_SDR, (1): Transmit command code to Flash.
# - RADDR_SDR, (2): Transmit row address to Flash.
# - CADDR_SDR, (3): Transmit column address to Flash.
# - MODE1_SDR, (4): Transmit mode bits to Flash.
# - MODE2_SDR, (5): Transmit mode bits to Flash.
# - MODE4_SDR, (6): Transmit mode bits to Flash.
# - MODE8_SDR, (7): Transmit mode bits to Flash.
# - WRITE_SDR, (8): Transmit program data to Flash device.
# - READ_SDR, (9): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_SDR, (10): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_SDR, (11): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_SDR, (12): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_SDR, (13): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# - JMP_ON_CS, (31): Stop execution, de-assert CS and save operand[7:0] as the instruction start pointer for next
# sequence.Normally this instruction is used to support Execute-In-Place enhanced mode. See XIP enhanced mode for
# more details.This instruction is only allowed for AHB read commands. There is interrupt status bit set
# (INTR[IPCMDERR] or INTR[AHBCMDERR]) when using this instruction in IP command or AHB write command.
# - CMD_DDR, (33): Transmit command code to Flash.
# - RADDR_DDR, (34): Transmit row address to Flash.
# - CADDR_DDR, (35): Transmit column address to Flash.
# - MODE1_DDR, (36): Transmit mode bits to Flash.
# - MODE2_DDR, (37): Transmit mode bits to Flash.
# - MODE4_DDR, (38): Transmit mode bits to Flash.
# - MODE8_DDR, (39): Transmit mode bits to Flash.
# - WRITE_DDR, (40): Transmit program data to Flash device.
# - READ_DDR, (41): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_DDR, (42): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_DDR, (43): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_DDR, (44): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_DDR, (45): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# Possible options: <STOP, CMD_SDR, RADDR_SDR, CADDR_SDR, MODE1_SDR, MODE2_SDR, MODE4_SDR, MODE8_SDR, WRITE_SDR,
# READ_SDR, LEARN_SDR, DATSZ_SDR, DUMMY_SDR, DUMMY_RWDS_SDR, JMP_ON_CS, CMD_DDR, RADDR_DDR, CADDR_DDR, MODE1_DDR,
# MODE2_DDR, MODE4_DDR, MODE8_DDR, WRITE_DDR, READ_DDR, LEARN_DDR, DATSZ_DDR, DUMMY_DDR, DUMMY_RWDS_DDR>
OPERATION_CODE: STOP
lookupTable_seq0_instr1:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq0_instr2:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq0_instr3:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq0_instr4:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq0_instr5:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq0_instr6:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq0_instr7:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
# -----------------------------------===== lookupTable_seq1_instr0 [Optional] =====-----------------------------------
# Description: Offset: 0x00000090, Width: 16b; Lookup table holds Flash command sequences 1, instruction 0
lookupTable_seq1_instr0:
# ------------------------------------------===== OPERAND [Optional] =====------------------------------------------
# Description: Offset: 0b, Width: 8b, Instruction operand. Its values depends on used instruction
OPERAND: 0
# -----------------------------------------===== NUM_PADS [Optional] =====------------------------------------------
# Description: Offset: 8b, Width: 2b, Number of pads used by instruction. Some instructions ignores this parameter.
# - 1PAD, (0): Single mode. One pad is used.
# - 2PAD, (1): Dual mode. Two pads are used.
# - 4PAD, (2): Quad mode. Four pads are used.
# - 8PAD, (3): Octal mode. Eight pads are used.
# Possible options: <1PAD, 2PAD, 4PAD, 8PAD>
NUM_PADS: 1PAD
# --------------------------------------===== OPERATION_CODE [Optional] =====---------------------------------------
# Description: Offset: 10b, Width: 6b, Instruction operation code.
# - STOP, (0): Stop execution and de-assert CS. Then, the next command sequence (to the same flash device) starts
# from instruction pointer 0.
# - CMD_SDR, (1): Transmit command code to Flash.
# - RADDR_SDR, (2): Transmit row address to Flash.
# - CADDR_SDR, (3): Transmit column address to Flash.
# - MODE1_SDR, (4): Transmit mode bits to Flash.
# - MODE2_SDR, (5): Transmit mode bits to Flash.
# - MODE4_SDR, (6): Transmit mode bits to Flash.
# - MODE8_SDR, (7): Transmit mode bits to Flash.
# - WRITE_SDR, (8): Transmit program data to Flash device.
# - READ_SDR, (9): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_SDR, (10): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_SDR, (11): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_SDR, (12): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_SDR, (13): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# - JMP_ON_CS, (31): Stop execution, de-assert CS and save operand[7:0] as the instruction start pointer for next
# sequence.Normally this instruction is used to support Execute-In-Place enhanced mode. See XIP enhanced mode for
# more details.This instruction is only allowed for AHB read commands. There is interrupt status bit set
# (INTR[IPCMDERR] or INTR[AHBCMDERR]) when using this instruction in IP command or AHB write command.
# - CMD_DDR, (33): Transmit command code to Flash.
# - RADDR_DDR, (34): Transmit row address to Flash.
# - CADDR_DDR, (35): Transmit column address to Flash.
# - MODE1_DDR, (36): Transmit mode bits to Flash.
# - MODE2_DDR, (37): Transmit mode bits to Flash.
# - MODE4_DDR, (38): Transmit mode bits to Flash.
# - MODE8_DDR, (39): Transmit mode bits to Flash.
# - WRITE_DDR, (40): Transmit program data to Flash device.
# - READ_DDR, (41): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_DDR, (42): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_DDR, (43): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_DDR, (44): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_DDR, (45): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# Possible options: <STOP, CMD_SDR, RADDR_SDR, CADDR_SDR, MODE1_SDR, MODE2_SDR, MODE4_SDR, MODE8_SDR, WRITE_SDR,
# READ_SDR, LEARN_SDR, DATSZ_SDR, DUMMY_SDR, DUMMY_RWDS_SDR, JMP_ON_CS, CMD_DDR, RADDR_DDR, CADDR_DDR, MODE1_DDR,
# MODE2_DDR, MODE4_DDR, MODE8_DDR, WRITE_DDR, READ_DDR, LEARN_DDR, DATSZ_DDR, DUMMY_DDR, DUMMY_RWDS_DDR>
OPERATION_CODE: STOP
lookupTable_seq1_instr1:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq1_instr2:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq1_instr3:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq1_instr4:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq1_instr5:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq1_instr6:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq1_instr7:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
# -----------------------------------===== lookupTable_seq2_instr0 [Optional] =====-----------------------------------
# Description: Offset: 0x000000A0, Width: 16b; Lookup table holds Flash command sequences 2, instruction 0
lookupTable_seq2_instr0:
# ------------------------------------------===== OPERAND [Optional] =====------------------------------------------
# Description: Offset: 0b, Width: 8b, Instruction operand. Its values depends on used instruction
OPERAND: 0
# -----------------------------------------===== NUM_PADS [Optional] =====------------------------------------------
# Description: Offset: 8b, Width: 2b, Number of pads used by instruction. Some instructions ignores this parameter.
# - 1PAD, (0): Single mode. One pad is used.
# - 2PAD, (1): Dual mode. Two pads are used.
# - 4PAD, (2): Quad mode. Four pads are used.
# - 8PAD, (3): Octal mode. Eight pads are used.
# Possible options: <1PAD, 2PAD, 4PAD, 8PAD>
NUM_PADS: 1PAD
# --------------------------------------===== OPERATION_CODE [Optional] =====---------------------------------------
# Description: Offset: 10b, Width: 6b, Instruction operation code.
# - STOP, (0): Stop execution and de-assert CS. Then, the next command sequence (to the same flash device) starts
# from instruction pointer 0.
# - CMD_SDR, (1): Transmit command code to Flash.
# - RADDR_SDR, (2): Transmit row address to Flash.
# - CADDR_SDR, (3): Transmit column address to Flash.
# - MODE1_SDR, (4): Transmit mode bits to Flash.
# - MODE2_SDR, (5): Transmit mode bits to Flash.
# - MODE4_SDR, (6): Transmit mode bits to Flash.
# - MODE8_SDR, (7): Transmit mode bits to Flash.
# - WRITE_SDR, (8): Transmit program data to Flash device.
# - READ_SDR, (9): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_SDR, (10): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_SDR, (11): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_SDR, (12): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_SDR, (13): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# - JMP_ON_CS, (31): Stop execution, de-assert CS and save operand[7:0] as the instruction start pointer for next
# sequence.Normally this instruction is used to support Execute-In-Place enhanced mode. See XIP enhanced mode for
# more details.This instruction is only allowed for AHB read commands. There is interrupt status bit set
# (INTR[IPCMDERR] or INTR[AHBCMDERR]) when using this instruction in IP command or AHB write command.
# - CMD_DDR, (33): Transmit command code to Flash.
# - RADDR_DDR, (34): Transmit row address to Flash.
# - CADDR_DDR, (35): Transmit column address to Flash.
# - MODE1_DDR, (36): Transmit mode bits to Flash.
# - MODE2_DDR, (37): Transmit mode bits to Flash.
# - MODE4_DDR, (38): Transmit mode bits to Flash.
# - MODE8_DDR, (39): Transmit mode bits to Flash.
# - WRITE_DDR, (40): Transmit program data to Flash device.
# - READ_DDR, (41): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_DDR, (42): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_DDR, (43): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_DDR, (44): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_DDR, (45): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# Possible options: <STOP, CMD_SDR, RADDR_SDR, CADDR_SDR, MODE1_SDR, MODE2_SDR, MODE4_SDR, MODE8_SDR, WRITE_SDR,
# READ_SDR, LEARN_SDR, DATSZ_SDR, DUMMY_SDR, DUMMY_RWDS_SDR, JMP_ON_CS, CMD_DDR, RADDR_DDR, CADDR_DDR, MODE1_DDR,
# MODE2_DDR, MODE4_DDR, MODE8_DDR, WRITE_DDR, READ_DDR, LEARN_DDR, DATSZ_DDR, DUMMY_DDR, DUMMY_RWDS_DDR>
OPERATION_CODE: STOP
lookupTable_seq2_instr1:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq2_instr2:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq2_instr3:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq2_instr4:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq2_instr5:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq2_instr6:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq2_instr7:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
# -----------------------------------===== lookupTable_seq3_instr0 [Optional] =====-----------------------------------
# Description: Offset: 0x000000B0, Width: 16b; Lookup table holds Flash command sequences 3, instruction 0
lookupTable_seq3_instr0:
# ------------------------------------------===== OPERAND [Optional] =====------------------------------------------
# Description: Offset: 0b, Width: 8b, Instruction operand. Its values depends on used instruction
OPERAND: 0
# -----------------------------------------===== NUM_PADS [Optional] =====------------------------------------------
# Description: Offset: 8b, Width: 2b, Number of pads used by instruction. Some instructions ignores this parameter.
# - 1PAD, (0): Single mode. One pad is used.
# - 2PAD, (1): Dual mode. Two pads are used.
# - 4PAD, (2): Quad mode. Four pads are used.
# - 8PAD, (3): Octal mode. Eight pads are used.
# Possible options: <1PAD, 2PAD, 4PAD, 8PAD>
NUM_PADS: 1PAD
# --------------------------------------===== OPERATION_CODE [Optional] =====---------------------------------------
# Description: Offset: 10b, Width: 6b, Instruction operation code.
# - STOP, (0): Stop execution and de-assert CS. Then, the next command sequence (to the same flash device) starts
# from instruction pointer 0.
# - CMD_SDR, (1): Transmit command code to Flash.
# - RADDR_SDR, (2): Transmit row address to Flash.
# - CADDR_SDR, (3): Transmit column address to Flash.
# - MODE1_SDR, (4): Transmit mode bits to Flash.
# - MODE2_SDR, (5): Transmit mode bits to Flash.
# - MODE4_SDR, (6): Transmit mode bits to Flash.
# - MODE8_SDR, (7): Transmit mode bits to Flash.
# - WRITE_SDR, (8): Transmit program data to Flash device.
# - READ_SDR, (9): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_SDR, (10): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_SDR, (11): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_SDR, (12): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_SDR, (13): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# - JMP_ON_CS, (31): Stop execution, de-assert CS and save operand[7:0] as the instruction start pointer for next
# sequence.Normally this instruction is used to support Execute-In-Place enhanced mode. See XIP enhanced mode for
# more details.This instruction is only allowed for AHB read commands. There is interrupt status bit set
# (INTR[IPCMDERR] or INTR[AHBCMDERR]) when using this instruction in IP command or AHB write command.
# - CMD_DDR, (33): Transmit command code to Flash.
# - RADDR_DDR, (34): Transmit row address to Flash.
# - CADDR_DDR, (35): Transmit column address to Flash.
# - MODE1_DDR, (36): Transmit mode bits to Flash.
# - MODE2_DDR, (37): Transmit mode bits to Flash.
# - MODE4_DDR, (38): Transmit mode bits to Flash.
# - MODE8_DDR, (39): Transmit mode bits to Flash.
# - WRITE_DDR, (40): Transmit program data to Flash device.
# - READ_DDR, (41): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_DDR, (42): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_DDR, (43): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_DDR, (44): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_DDR, (45): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# Possible options: <STOP, CMD_SDR, RADDR_SDR, CADDR_SDR, MODE1_SDR, MODE2_SDR, MODE4_SDR, MODE8_SDR, WRITE_SDR,
# READ_SDR, LEARN_SDR, DATSZ_SDR, DUMMY_SDR, DUMMY_RWDS_SDR, JMP_ON_CS, CMD_DDR, RADDR_DDR, CADDR_DDR, MODE1_DDR,
# MODE2_DDR, MODE4_DDR, MODE8_DDR, WRITE_DDR, READ_DDR, LEARN_DDR, DATSZ_DDR, DUMMY_DDR, DUMMY_RWDS_DDR>
OPERATION_CODE: STOP
lookupTable_seq3_instr1:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq3_instr2:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq3_instr3:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq3_instr4:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq3_instr5:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq3_instr6:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq3_instr7:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
# -----------------------------------===== lookupTable_seq4_instr0 [Optional] =====-----------------------------------
# Description: Offset: 0x000000C0, Width: 16b; Lookup table holds Flash command sequences 4, instruction 0
lookupTable_seq4_instr0:
# ------------------------------------------===== OPERAND [Optional] =====------------------------------------------
# Description: Offset: 0b, Width: 8b, Instruction operand. Its values depends on used instruction
OPERAND: 0
# -----------------------------------------===== NUM_PADS [Optional] =====------------------------------------------
# Description: Offset: 8b, Width: 2b, Number of pads used by instruction. Some instructions ignores this parameter.
# - 1PAD, (0): Single mode. One pad is used.
# - 2PAD, (1): Dual mode. Two pads are used.
# - 4PAD, (2): Quad mode. Four pads are used.
# - 8PAD, (3): Octal mode. Eight pads are used.
# Possible options: <1PAD, 2PAD, 4PAD, 8PAD>
NUM_PADS: 1PAD
# --------------------------------------===== OPERATION_CODE [Optional] =====---------------------------------------
# Description: Offset: 10b, Width: 6b, Instruction operation code.
# - STOP, (0): Stop execution and de-assert CS. Then, the next command sequence (to the same flash device) starts
# from instruction pointer 0.
# - CMD_SDR, (1): Transmit command code to Flash.
# - RADDR_SDR, (2): Transmit row address to Flash.
# - CADDR_SDR, (3): Transmit column address to Flash.
# - MODE1_SDR, (4): Transmit mode bits to Flash.
# - MODE2_SDR, (5): Transmit mode bits to Flash.
# - MODE4_SDR, (6): Transmit mode bits to Flash.
# - MODE8_SDR, (7): Transmit mode bits to Flash.
# - WRITE_SDR, (8): Transmit program data to Flash device.
# - READ_SDR, (9): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_SDR, (10): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_SDR, (11): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_SDR, (12): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_SDR, (13): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# - JMP_ON_CS, (31): Stop execution, de-assert CS and save operand[7:0] as the instruction start pointer for next
# sequence.Normally this instruction is used to support Execute-In-Place enhanced mode. See XIP enhanced mode for
# more details.This instruction is only allowed for AHB read commands. There is interrupt status bit set
# (INTR[IPCMDERR] or INTR[AHBCMDERR]) when using this instruction in IP command or AHB write command.
# - CMD_DDR, (33): Transmit command code to Flash.
# - RADDR_DDR, (34): Transmit row address to Flash.
# - CADDR_DDR, (35): Transmit column address to Flash.
# - MODE1_DDR, (36): Transmit mode bits to Flash.
# - MODE2_DDR, (37): Transmit mode bits to Flash.
# - MODE4_DDR, (38): Transmit mode bits to Flash.
# - MODE8_DDR, (39): Transmit mode bits to Flash.
# - WRITE_DDR, (40): Transmit program data to Flash device.
# - READ_DDR, (41): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_DDR, (42): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_DDR, (43): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_DDR, (44): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_DDR, (45): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# Possible options: <STOP, CMD_SDR, RADDR_SDR, CADDR_SDR, MODE1_SDR, MODE2_SDR, MODE4_SDR, MODE8_SDR, WRITE_SDR,
# READ_SDR, LEARN_SDR, DATSZ_SDR, DUMMY_SDR, DUMMY_RWDS_SDR, JMP_ON_CS, CMD_DDR, RADDR_DDR, CADDR_DDR, MODE1_DDR,
# MODE2_DDR, MODE4_DDR, MODE8_DDR, WRITE_DDR, READ_DDR, LEARN_DDR, DATSZ_DDR, DUMMY_DDR, DUMMY_RWDS_DDR>
OPERATION_CODE: STOP
lookupTable_seq4_instr1:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq4_instr2:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq4_instr3:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq4_instr4:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq4_instr5:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq4_instr6:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq4_instr7:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
# -----------------------------------===== lookupTable_seq5_instr0 [Optional] =====-----------------------------------
# Description: Offset: 0x000000D0, Width: 16b; Lookup table holds Flash command sequences 5, instruction 0
lookupTable_seq5_instr0:
# ------------------------------------------===== OPERAND [Optional] =====------------------------------------------
# Description: Offset: 0b, Width: 8b, Instruction operand. Its values depends on used instruction
OPERAND: 0
# -----------------------------------------===== NUM_PADS [Optional] =====------------------------------------------
# Description: Offset: 8b, Width: 2b, Number of pads used by instruction. Some instructions ignores this parameter.
# - 1PAD, (0): Single mode. One pad is used.
# - 2PAD, (1): Dual mode. Two pads are used.
# - 4PAD, (2): Quad mode. Four pads are used.
# - 8PAD, (3): Octal mode. Eight pads are used.
# Possible options: <1PAD, 2PAD, 4PAD, 8PAD>
NUM_PADS: 1PAD
# --------------------------------------===== OPERATION_CODE [Optional] =====---------------------------------------
# Description: Offset: 10b, Width: 6b, Instruction operation code.
# - STOP, (0): Stop execution and de-assert CS. Then, the next command sequence (to the same flash device) starts
# from instruction pointer 0.
# - CMD_SDR, (1): Transmit command code to Flash.
# - RADDR_SDR, (2): Transmit row address to Flash.
# - CADDR_SDR, (3): Transmit column address to Flash.
# - MODE1_SDR, (4): Transmit mode bits to Flash.
# - MODE2_SDR, (5): Transmit mode bits to Flash.
# - MODE4_SDR, (6): Transmit mode bits to Flash.
# - MODE8_SDR, (7): Transmit mode bits to Flash.
# - WRITE_SDR, (8): Transmit program data to Flash device.
# - READ_SDR, (9): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_SDR, (10): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_SDR, (11): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_SDR, (12): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_SDR, (13): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# - JMP_ON_CS, (31): Stop execution, de-assert CS and save operand[7:0] as the instruction start pointer for next
# sequence.Normally this instruction is used to support Execute-In-Place enhanced mode. See XIP enhanced mode for
# more details.This instruction is only allowed for AHB read commands. There is interrupt status bit set
# (INTR[IPCMDERR] or INTR[AHBCMDERR]) when using this instruction in IP command or AHB write command.
# - CMD_DDR, (33): Transmit command code to Flash.
# - RADDR_DDR, (34): Transmit row address to Flash.
# - CADDR_DDR, (35): Transmit column address to Flash.
# - MODE1_DDR, (36): Transmit mode bits to Flash.
# - MODE2_DDR, (37): Transmit mode bits to Flash.
# - MODE4_DDR, (38): Transmit mode bits to Flash.
# - MODE8_DDR, (39): Transmit mode bits to Flash.
# - WRITE_DDR, (40): Transmit program data to Flash device.
# - READ_DDR, (41): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_DDR, (42): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_DDR, (43): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_DDR, (44): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_DDR, (45): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# Possible options: <STOP, CMD_SDR, RADDR_SDR, CADDR_SDR, MODE1_SDR, MODE2_SDR, MODE4_SDR, MODE8_SDR, WRITE_SDR,
# READ_SDR, LEARN_SDR, DATSZ_SDR, DUMMY_SDR, DUMMY_RWDS_SDR, JMP_ON_CS, CMD_DDR, RADDR_DDR, CADDR_DDR, MODE1_DDR,
# MODE2_DDR, MODE4_DDR, MODE8_DDR, WRITE_DDR, READ_DDR, LEARN_DDR, DATSZ_DDR, DUMMY_DDR, DUMMY_RWDS_DDR>
OPERATION_CODE: STOP
lookupTable_seq5_instr1:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq5_instr2:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq5_instr3:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq5_instr4:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq5_instr5:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq5_instr6:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq5_instr7:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
# -----------------------------------===== lookupTable_seq6_instr0 [Optional] =====-----------------------------------
# Description: Offset: 0x000000E0, Width: 16b; Lookup table holds Flash command sequences 6, instruction 0
lookupTable_seq6_instr0:
# ------------------------------------------===== OPERAND [Optional] =====------------------------------------------
# Description: Offset: 0b, Width: 8b, Instruction operand. Its values depends on used instruction
OPERAND: 0
# -----------------------------------------===== NUM_PADS [Optional] =====------------------------------------------
# Description: Offset: 8b, Width: 2b, Number of pads used by instruction. Some instructions ignores this parameter.
# - 1PAD, (0): Single mode. One pad is used.
# - 2PAD, (1): Dual mode. Two pads are used.
# - 4PAD, (2): Quad mode. Four pads are used.
# - 8PAD, (3): Octal mode. Eight pads are used.
# Possible options: <1PAD, 2PAD, 4PAD, 8PAD>
NUM_PADS: 1PAD
# --------------------------------------===== OPERATION_CODE [Optional] =====---------------------------------------
# Description: Offset: 10b, Width: 6b, Instruction operation code.
# - STOP, (0): Stop execution and de-assert CS. Then, the next command sequence (to the same flash device) starts
# from instruction pointer 0.
# - CMD_SDR, (1): Transmit command code to Flash.
# - RADDR_SDR, (2): Transmit row address to Flash.
# - CADDR_SDR, (3): Transmit column address to Flash.
# - MODE1_SDR, (4): Transmit mode bits to Flash.
# - MODE2_SDR, (5): Transmit mode bits to Flash.
# - MODE4_SDR, (6): Transmit mode bits to Flash.
# - MODE8_SDR, (7): Transmit mode bits to Flash.
# - WRITE_SDR, (8): Transmit program data to Flash device.
# - READ_SDR, (9): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_SDR, (10): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_SDR, (11): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_SDR, (12): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_SDR, (13): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# - JMP_ON_CS, (31): Stop execution, de-assert CS and save operand[7:0] as the instruction start pointer for next
# sequence.Normally this instruction is used to support Execute-In-Place enhanced mode. See XIP enhanced mode for
# more details.This instruction is only allowed for AHB read commands. There is interrupt status bit set
# (INTR[IPCMDERR] or INTR[AHBCMDERR]) when using this instruction in IP command or AHB write command.
# - CMD_DDR, (33): Transmit command code to Flash.
# - RADDR_DDR, (34): Transmit row address to Flash.
# - CADDR_DDR, (35): Transmit column address to Flash.
# - MODE1_DDR, (36): Transmit mode bits to Flash.
# - MODE2_DDR, (37): Transmit mode bits to Flash.
# - MODE4_DDR, (38): Transmit mode bits to Flash.
# - MODE8_DDR, (39): Transmit mode bits to Flash.
# - WRITE_DDR, (40): Transmit program data to Flash device.
# - READ_DDR, (41): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_DDR, (42): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_DDR, (43): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_DDR, (44): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_DDR, (45): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# Possible options: <STOP, CMD_SDR, RADDR_SDR, CADDR_SDR, MODE1_SDR, MODE2_SDR, MODE4_SDR, MODE8_SDR, WRITE_SDR,
# READ_SDR, LEARN_SDR, DATSZ_SDR, DUMMY_SDR, DUMMY_RWDS_SDR, JMP_ON_CS, CMD_DDR, RADDR_DDR, CADDR_DDR, MODE1_DDR,
# MODE2_DDR, MODE4_DDR, MODE8_DDR, WRITE_DDR, READ_DDR, LEARN_DDR, DATSZ_DDR, DUMMY_DDR, DUMMY_RWDS_DDR>
OPERATION_CODE: STOP
lookupTable_seq6_instr1:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq6_instr2:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq6_instr3:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq6_instr4:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq6_instr5:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq6_instr6:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq6_instr7:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
# -----------------------------------===== lookupTable_seq7_instr0 [Optional] =====-----------------------------------
# Description: Offset: 0x000000F0, Width: 16b; Lookup table holds Flash command sequences 7, instruction 0
lookupTable_seq7_instr0:
# ------------------------------------------===== OPERAND [Optional] =====------------------------------------------
# Description: Offset: 0b, Width: 8b, Instruction operand. Its values depends on used instruction
OPERAND: 0
# -----------------------------------------===== NUM_PADS [Optional] =====------------------------------------------
# Description: Offset: 8b, Width: 2b, Number of pads used by instruction. Some instructions ignores this parameter.
# - 1PAD, (0): Single mode. One pad is used.
# - 2PAD, (1): Dual mode. Two pads are used.
# - 4PAD, (2): Quad mode. Four pads are used.
# - 8PAD, (3): Octal mode. Eight pads are used.
# Possible options: <1PAD, 2PAD, 4PAD, 8PAD>
NUM_PADS: 1PAD
# --------------------------------------===== OPERATION_CODE [Optional] =====---------------------------------------
# Description: Offset: 10b, Width: 6b, Instruction operation code.
# - STOP, (0): Stop execution and de-assert CS. Then, the next command sequence (to the same flash device) starts
# from instruction pointer 0.
# - CMD_SDR, (1): Transmit command code to Flash.
# - RADDR_SDR, (2): Transmit row address to Flash.
# - CADDR_SDR, (3): Transmit column address to Flash.
# - MODE1_SDR, (4): Transmit mode bits to Flash.
# - MODE2_SDR, (5): Transmit mode bits to Flash.
# - MODE4_SDR, (6): Transmit mode bits to Flash.
# - MODE8_SDR, (7): Transmit mode bits to Flash.
# - WRITE_SDR, (8): Transmit program data to Flash device.
# - READ_SDR, (9): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_SDR, (10): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_SDR, (11): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_SDR, (12): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_SDR, (13): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# - JMP_ON_CS, (31): Stop execution, de-assert CS and save operand[7:0] as the instruction start pointer for next
# sequence.Normally this instruction is used to support Execute-In-Place enhanced mode. See XIP enhanced mode for
# more details.This instruction is only allowed for AHB read commands. There is interrupt status bit set
# (INTR[IPCMDERR] or INTR[AHBCMDERR]) when using this instruction in IP command or AHB write command.
# - CMD_DDR, (33): Transmit command code to Flash.
# - RADDR_DDR, (34): Transmit row address to Flash.
# - CADDR_DDR, (35): Transmit column address to Flash.
# - MODE1_DDR, (36): Transmit mode bits to Flash.
# - MODE2_DDR, (37): Transmit mode bits to Flash.
# - MODE4_DDR, (38): Transmit mode bits to Flash.
# - MODE8_DDR, (39): Transmit mode bits to Flash.
# - WRITE_DDR, (40): Transmit program data to Flash device.
# - READ_DDR, (41): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_DDR, (42): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_DDR, (43): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_DDR, (44): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_DDR, (45): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# Possible options: <STOP, CMD_SDR, RADDR_SDR, CADDR_SDR, MODE1_SDR, MODE2_SDR, MODE4_SDR, MODE8_SDR, WRITE_SDR,
# READ_SDR, LEARN_SDR, DATSZ_SDR, DUMMY_SDR, DUMMY_RWDS_SDR, JMP_ON_CS, CMD_DDR, RADDR_DDR, CADDR_DDR, MODE1_DDR,
# MODE2_DDR, MODE4_DDR, MODE8_DDR, WRITE_DDR, READ_DDR, LEARN_DDR, DATSZ_DDR, DUMMY_DDR, DUMMY_RWDS_DDR>
OPERATION_CODE: STOP
lookupTable_seq7_instr1:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq7_instr2:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq7_instr3:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq7_instr4:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq7_instr5:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq7_instr6:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq7_instr7:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
# -----------------------------------===== lookupTable_seq8_instr0 [Optional] =====-----------------------------------
# Description: Offset: 0x00000100, Width: 16b; Lookup table holds Flash command sequences 8, instruction 0
lookupTable_seq8_instr0:
# ------------------------------------------===== OPERAND [Optional] =====------------------------------------------
# Description: Offset: 0b, Width: 8b, Instruction operand. Its values depends on used instruction
OPERAND: 0
# -----------------------------------------===== NUM_PADS [Optional] =====------------------------------------------
# Description: Offset: 8b, Width: 2b, Number of pads used by instruction. Some instructions ignores this parameter.
# - 1PAD, (0): Single mode. One pad is used.
# - 2PAD, (1): Dual mode. Two pads are used.
# - 4PAD, (2): Quad mode. Four pads are used.
# - 8PAD, (3): Octal mode. Eight pads are used.
# Possible options: <1PAD, 2PAD, 4PAD, 8PAD>
NUM_PADS: 1PAD
# --------------------------------------===== OPERATION_CODE [Optional] =====---------------------------------------
# Description: Offset: 10b, Width: 6b, Instruction operation code.
# - STOP, (0): Stop execution and de-assert CS. Then, the next command sequence (to the same flash device) starts
# from instruction pointer 0.
# - CMD_SDR, (1): Transmit command code to Flash.
# - RADDR_SDR, (2): Transmit row address to Flash.
# - CADDR_SDR, (3): Transmit column address to Flash.
# - MODE1_SDR, (4): Transmit mode bits to Flash.
# - MODE2_SDR, (5): Transmit mode bits to Flash.
# - MODE4_SDR, (6): Transmit mode bits to Flash.
# - MODE8_SDR, (7): Transmit mode bits to Flash.
# - WRITE_SDR, (8): Transmit program data to Flash device.
# - READ_SDR, (9): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_SDR, (10): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_SDR, (11): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_SDR, (12): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_SDR, (13): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# - JMP_ON_CS, (31): Stop execution, de-assert CS and save operand[7:0] as the instruction start pointer for next
# sequence.Normally this instruction is used to support Execute-In-Place enhanced mode. See XIP enhanced mode for
# more details.This instruction is only allowed for AHB read commands. There is interrupt status bit set
# (INTR[IPCMDERR] or INTR[AHBCMDERR]) when using this instruction in IP command or AHB write command.
# - CMD_DDR, (33): Transmit command code to Flash.
# - RADDR_DDR, (34): Transmit row address to Flash.
# - CADDR_DDR, (35): Transmit column address to Flash.
# - MODE1_DDR, (36): Transmit mode bits to Flash.
# - MODE2_DDR, (37): Transmit mode bits to Flash.
# - MODE4_DDR, (38): Transmit mode bits to Flash.
# - MODE8_DDR, (39): Transmit mode bits to Flash.
# - WRITE_DDR, (40): Transmit program data to Flash device.
# - READ_DDR, (41): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_DDR, (42): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_DDR, (43): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_DDR, (44): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_DDR, (45): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# Possible options: <STOP, CMD_SDR, RADDR_SDR, CADDR_SDR, MODE1_SDR, MODE2_SDR, MODE4_SDR, MODE8_SDR, WRITE_SDR,
# READ_SDR, LEARN_SDR, DATSZ_SDR, DUMMY_SDR, DUMMY_RWDS_SDR, JMP_ON_CS, CMD_DDR, RADDR_DDR, CADDR_DDR, MODE1_DDR,
# MODE2_DDR, MODE4_DDR, MODE8_DDR, WRITE_DDR, READ_DDR, LEARN_DDR, DATSZ_DDR, DUMMY_DDR, DUMMY_RWDS_DDR>
OPERATION_CODE: STOP
lookupTable_seq8_instr1:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq8_instr2:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq8_instr3:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq8_instr4:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq8_instr5:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq8_instr6:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq8_instr7:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
# -----------------------------------===== lookupTable_seq9_instr0 [Optional] =====-----------------------------------
# Description: Offset: 0x00000110, Width: 16b; Lookup table holds Flash command sequences 9, instruction 0
lookupTable_seq9_instr0:
# ------------------------------------------===== OPERAND [Optional] =====------------------------------------------
# Description: Offset: 0b, Width: 8b, Instruction operand. Its values depends on used instruction
OPERAND: 0
# -----------------------------------------===== NUM_PADS [Optional] =====------------------------------------------
# Description: Offset: 8b, Width: 2b, Number of pads used by instruction. Some instructions ignores this parameter.
# - 1PAD, (0): Single mode. One pad is used.
# - 2PAD, (1): Dual mode. Two pads are used.
# - 4PAD, (2): Quad mode. Four pads are used.
# - 8PAD, (3): Octal mode. Eight pads are used.
# Possible options: <1PAD, 2PAD, 4PAD, 8PAD>
NUM_PADS: 1PAD
# --------------------------------------===== OPERATION_CODE [Optional] =====---------------------------------------
# Description: Offset: 10b, Width: 6b, Instruction operation code.
# - STOP, (0): Stop execution and de-assert CS. Then, the next command sequence (to the same flash device) starts
# from instruction pointer 0.
# - CMD_SDR, (1): Transmit command code to Flash.
# - RADDR_SDR, (2): Transmit row address to Flash.
# - CADDR_SDR, (3): Transmit column address to Flash.
# - MODE1_SDR, (4): Transmit mode bits to Flash.
# - MODE2_SDR, (5): Transmit mode bits to Flash.
# - MODE4_SDR, (6): Transmit mode bits to Flash.
# - MODE8_SDR, (7): Transmit mode bits to Flash.
# - WRITE_SDR, (8): Transmit program data to Flash device.
# - READ_SDR, (9): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_SDR, (10): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_SDR, (11): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_SDR, (12): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_SDR, (13): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# - JMP_ON_CS, (31): Stop execution, de-assert CS and save operand[7:0] as the instruction start pointer for next
# sequence.Normally this instruction is used to support Execute-In-Place enhanced mode. See XIP enhanced mode for
# more details.This instruction is only allowed for AHB read commands. There is interrupt status bit set
# (INTR[IPCMDERR] or INTR[AHBCMDERR]) when using this instruction in IP command or AHB write command.
# - CMD_DDR, (33): Transmit command code to Flash.
# - RADDR_DDR, (34): Transmit row address to Flash.
# - CADDR_DDR, (35): Transmit column address to Flash.
# - MODE1_DDR, (36): Transmit mode bits to Flash.
# - MODE2_DDR, (37): Transmit mode bits to Flash.
# - MODE4_DDR, (38): Transmit mode bits to Flash.
# - MODE8_DDR, (39): Transmit mode bits to Flash.
# - WRITE_DDR, (40): Transmit program data to Flash device.
# - READ_DDR, (41): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_DDR, (42): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_DDR, (43): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_DDR, (44): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_DDR, (45): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# Possible options: <STOP, CMD_SDR, RADDR_SDR, CADDR_SDR, MODE1_SDR, MODE2_SDR, MODE4_SDR, MODE8_SDR, WRITE_SDR,
# READ_SDR, LEARN_SDR, DATSZ_SDR, DUMMY_SDR, DUMMY_RWDS_SDR, JMP_ON_CS, CMD_DDR, RADDR_DDR, CADDR_DDR, MODE1_DDR,
# MODE2_DDR, MODE4_DDR, MODE8_DDR, WRITE_DDR, READ_DDR, LEARN_DDR, DATSZ_DDR, DUMMY_DDR, DUMMY_RWDS_DDR>
OPERATION_CODE: STOP
lookupTable_seq9_instr1:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq9_instr2:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq9_instr3:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq9_instr4:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq9_instr5:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq9_instr6:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq9_instr7:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
# ----------------------------------===== lookupTable_seq10_instr0 [Optional] =====-----------------------------------
# Description: Offset: 0x00000120, Width: 16b; Lookup table holds Flash command sequences 10, instruction 0
lookupTable_seq10_instr0:
# ------------------------------------------===== OPERAND [Optional] =====------------------------------------------
# Description: Offset: 0b, Width: 8b, Instruction operand. Its values depends on used instruction
OPERAND: 0
# -----------------------------------------===== NUM_PADS [Optional] =====------------------------------------------
# Description: Offset: 8b, Width: 2b, Number of pads used by instruction. Some instructions ignores this parameter.
# - 1PAD, (0): Single mode. One pad is used.
# - 2PAD, (1): Dual mode. Two pads are used.
# - 4PAD, (2): Quad mode. Four pads are used.
# - 8PAD, (3): Octal mode. Eight pads are used.
# Possible options: <1PAD, 2PAD, 4PAD, 8PAD>
NUM_PADS: 1PAD
# --------------------------------------===== OPERATION_CODE [Optional] =====---------------------------------------
# Description: Offset: 10b, Width: 6b, Instruction operation code.
# - STOP, (0): Stop execution and de-assert CS. Then, the next command sequence (to the same flash device) starts
# from instruction pointer 0.
# - CMD_SDR, (1): Transmit command code to Flash.
# - RADDR_SDR, (2): Transmit row address to Flash.
# - CADDR_SDR, (3): Transmit column address to Flash.
# - MODE1_SDR, (4): Transmit mode bits to Flash.
# - MODE2_SDR, (5): Transmit mode bits to Flash.
# - MODE4_SDR, (6): Transmit mode bits to Flash.
# - MODE8_SDR, (7): Transmit mode bits to Flash.
# - WRITE_SDR, (8): Transmit program data to Flash device.
# - READ_SDR, (9): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_SDR, (10): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_SDR, (11): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_SDR, (12): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_SDR, (13): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# - JMP_ON_CS, (31): Stop execution, de-assert CS and save operand[7:0] as the instruction start pointer for next
# sequence.Normally this instruction is used to support Execute-In-Place enhanced mode. See XIP enhanced mode for
# more details.This instruction is only allowed for AHB read commands. There is interrupt status bit set
# (INTR[IPCMDERR] or INTR[AHBCMDERR]) when using this instruction in IP command or AHB write command.
# - CMD_DDR, (33): Transmit command code to Flash.
# - RADDR_DDR, (34): Transmit row address to Flash.
# - CADDR_DDR, (35): Transmit column address to Flash.
# - MODE1_DDR, (36): Transmit mode bits to Flash.
# - MODE2_DDR, (37): Transmit mode bits to Flash.
# - MODE4_DDR, (38): Transmit mode bits to Flash.
# - MODE8_DDR, (39): Transmit mode bits to Flash.
# - WRITE_DDR, (40): Transmit program data to Flash device.
# - READ_DDR, (41): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_DDR, (42): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_DDR, (43): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_DDR, (44): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_DDR, (45): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# Possible options: <STOP, CMD_SDR, RADDR_SDR, CADDR_SDR, MODE1_SDR, MODE2_SDR, MODE4_SDR, MODE8_SDR, WRITE_SDR,
# READ_SDR, LEARN_SDR, DATSZ_SDR, DUMMY_SDR, DUMMY_RWDS_SDR, JMP_ON_CS, CMD_DDR, RADDR_DDR, CADDR_DDR, MODE1_DDR,
# MODE2_DDR, MODE4_DDR, MODE8_DDR, WRITE_DDR, READ_DDR, LEARN_DDR, DATSZ_DDR, DUMMY_DDR, DUMMY_RWDS_DDR>
OPERATION_CODE: STOP
lookupTable_seq10_instr1:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq10_instr2:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq10_instr3:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq10_instr4:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq10_instr5:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq10_instr6:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq10_instr7:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
# ----------------------------------===== lookupTable_seq11_instr0 [Optional] =====-----------------------------------
# Description: Offset: 0x00000130, Width: 16b; Lookup table holds Flash command sequences 11, instruction 0
lookupTable_seq11_instr0:
# ------------------------------------------===== OPERAND [Optional] =====------------------------------------------
# Description: Offset: 0b, Width: 8b, Instruction operand. Its values depends on used instruction
OPERAND: 0
# -----------------------------------------===== NUM_PADS [Optional] =====------------------------------------------
# Description: Offset: 8b, Width: 2b, Number of pads used by instruction. Some instructions ignores this parameter.
# - 1PAD, (0): Single mode. One pad is used.
# - 2PAD, (1): Dual mode. Two pads are used.
# - 4PAD, (2): Quad mode. Four pads are used.
# - 8PAD, (3): Octal mode. Eight pads are used.
# Possible options: <1PAD, 2PAD, 4PAD, 8PAD>
NUM_PADS: 1PAD
# --------------------------------------===== OPERATION_CODE [Optional] =====---------------------------------------
# Description: Offset: 10b, Width: 6b, Instruction operation code.
# - STOP, (0): Stop execution and de-assert CS. Then, the next command sequence (to the same flash device) starts
# from instruction pointer 0.
# - CMD_SDR, (1): Transmit command code to Flash.
# - RADDR_SDR, (2): Transmit row address to Flash.
# - CADDR_SDR, (3): Transmit column address to Flash.
# - MODE1_SDR, (4): Transmit mode bits to Flash.
# - MODE2_SDR, (5): Transmit mode bits to Flash.
# - MODE4_SDR, (6): Transmit mode bits to Flash.
# - MODE8_SDR, (7): Transmit mode bits to Flash.
# - WRITE_SDR, (8): Transmit program data to Flash device.
# - READ_SDR, (9): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_SDR, (10): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_SDR, (11): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_SDR, (12): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_SDR, (13): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# - JMP_ON_CS, (31): Stop execution, de-assert CS and save operand[7:0] as the instruction start pointer for next
# sequence.Normally this instruction is used to support Execute-In-Place enhanced mode. See XIP enhanced mode for
# more details.This instruction is only allowed for AHB read commands. There is interrupt status bit set
# (INTR[IPCMDERR] or INTR[AHBCMDERR]) when using this instruction in IP command or AHB write command.
# - CMD_DDR, (33): Transmit command code to Flash.
# - RADDR_DDR, (34): Transmit row address to Flash.
# - CADDR_DDR, (35): Transmit column address to Flash.
# - MODE1_DDR, (36): Transmit mode bits to Flash.
# - MODE2_DDR, (37): Transmit mode bits to Flash.
# - MODE4_DDR, (38): Transmit mode bits to Flash.
# - MODE8_DDR, (39): Transmit mode bits to Flash.
# - WRITE_DDR, (40): Transmit program data to Flash device.
# - READ_DDR, (41): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_DDR, (42): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_DDR, (43): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_DDR, (44): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_DDR, (45): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# Possible options: <STOP, CMD_SDR, RADDR_SDR, CADDR_SDR, MODE1_SDR, MODE2_SDR, MODE4_SDR, MODE8_SDR, WRITE_SDR,
# READ_SDR, LEARN_SDR, DATSZ_SDR, DUMMY_SDR, DUMMY_RWDS_SDR, JMP_ON_CS, CMD_DDR, RADDR_DDR, CADDR_DDR, MODE1_DDR,
# MODE2_DDR, MODE4_DDR, MODE8_DDR, WRITE_DDR, READ_DDR, LEARN_DDR, DATSZ_DDR, DUMMY_DDR, DUMMY_RWDS_DDR>
OPERATION_CODE: STOP
lookupTable_seq11_instr1:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq11_instr2:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq11_instr3:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq11_instr4:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq11_instr5:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq11_instr6:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq11_instr7:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
# ----------------------------------===== lookupTable_seq12_instr0 [Optional] =====-----------------------------------
# Description: Offset: 0x00000140, Width: 16b; Lookup table holds Flash command sequences 12, instruction 0
lookupTable_seq12_instr0:
# ------------------------------------------===== OPERAND [Optional] =====------------------------------------------
# Description: Offset: 0b, Width: 8b, Instruction operand. Its values depends on used instruction
OPERAND: 0
# -----------------------------------------===== NUM_PADS [Optional] =====------------------------------------------
# Description: Offset: 8b, Width: 2b, Number of pads used by instruction. Some instructions ignores this parameter.
# - 1PAD, (0): Single mode. One pad is used.
# - 2PAD, (1): Dual mode. Two pads are used.
# - 4PAD, (2): Quad mode. Four pads are used.
# - 8PAD, (3): Octal mode. Eight pads are used.
# Possible options: <1PAD, 2PAD, 4PAD, 8PAD>
NUM_PADS: 1PAD
# --------------------------------------===== OPERATION_CODE [Optional] =====---------------------------------------
# Description: Offset: 10b, Width: 6b, Instruction operation code.
# - STOP, (0): Stop execution and de-assert CS. Then, the next command sequence (to the same flash device) starts
# from instruction pointer 0.
# - CMD_SDR, (1): Transmit command code to Flash.
# - RADDR_SDR, (2): Transmit row address to Flash.
# - CADDR_SDR, (3): Transmit column address to Flash.
# - MODE1_SDR, (4): Transmit mode bits to Flash.
# - MODE2_SDR, (5): Transmit mode bits to Flash.
# - MODE4_SDR, (6): Transmit mode bits to Flash.
# - MODE8_SDR, (7): Transmit mode bits to Flash.
# - WRITE_SDR, (8): Transmit program data to Flash device.
# - READ_SDR, (9): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_SDR, (10): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_SDR, (11): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_SDR, (12): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_SDR, (13): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# - JMP_ON_CS, (31): Stop execution, de-assert CS and save operand[7:0] as the instruction start pointer for next
# sequence.Normally this instruction is used to support Execute-In-Place enhanced mode. See XIP enhanced mode for
# more details.This instruction is only allowed for AHB read commands. There is interrupt status bit set
# (INTR[IPCMDERR] or INTR[AHBCMDERR]) when using this instruction in IP command or AHB write command.
# - CMD_DDR, (33): Transmit command code to Flash.
# - RADDR_DDR, (34): Transmit row address to Flash.
# - CADDR_DDR, (35): Transmit column address to Flash.
# - MODE1_DDR, (36): Transmit mode bits to Flash.
# - MODE2_DDR, (37): Transmit mode bits to Flash.
# - MODE4_DDR, (38): Transmit mode bits to Flash.
# - MODE8_DDR, (39): Transmit mode bits to Flash.
# - WRITE_DDR, (40): Transmit program data to Flash device.
# - READ_DDR, (41): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_DDR, (42): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_DDR, (43): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_DDR, (44): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_DDR, (45): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# Possible options: <STOP, CMD_SDR, RADDR_SDR, CADDR_SDR, MODE1_SDR, MODE2_SDR, MODE4_SDR, MODE8_SDR, WRITE_SDR,
# READ_SDR, LEARN_SDR, DATSZ_SDR, DUMMY_SDR, DUMMY_RWDS_SDR, JMP_ON_CS, CMD_DDR, RADDR_DDR, CADDR_DDR, MODE1_DDR,
# MODE2_DDR, MODE4_DDR, MODE8_DDR, WRITE_DDR, READ_DDR, LEARN_DDR, DATSZ_DDR, DUMMY_DDR, DUMMY_RWDS_DDR>
OPERATION_CODE: STOP
lookupTable_seq12_instr1:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq12_instr2:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq12_instr3:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq12_instr4:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq12_instr5:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq12_instr6:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq12_instr7:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
# ----------------------------------===== lookupTable_seq13_instr0 [Optional] =====-----------------------------------
# Description: Offset: 0x00000150, Width: 16b; Lookup table holds Flash command sequences 13, instruction 0
lookupTable_seq13_instr0:
# ------------------------------------------===== OPERAND [Optional] =====------------------------------------------
# Description: Offset: 0b, Width: 8b, Instruction operand. Its values depends on used instruction
OPERAND: 0
# -----------------------------------------===== NUM_PADS [Optional] =====------------------------------------------
# Description: Offset: 8b, Width: 2b, Number of pads used by instruction. Some instructions ignores this parameter.
# - 1PAD, (0): Single mode. One pad is used.
# - 2PAD, (1): Dual mode. Two pads are used.
# - 4PAD, (2): Quad mode. Four pads are used.
# - 8PAD, (3): Octal mode. Eight pads are used.
# Possible options: <1PAD, 2PAD, 4PAD, 8PAD>
NUM_PADS: 1PAD
# --------------------------------------===== OPERATION_CODE [Optional] =====---------------------------------------
# Description: Offset: 10b, Width: 6b, Instruction operation code.
# - STOP, (0): Stop execution and de-assert CS. Then, the next command sequence (to the same flash device) starts
# from instruction pointer 0.
# - CMD_SDR, (1): Transmit command code to Flash.
# - RADDR_SDR, (2): Transmit row address to Flash.
# - CADDR_SDR, (3): Transmit column address to Flash.
# - MODE1_SDR, (4): Transmit mode bits to Flash.
# - MODE2_SDR, (5): Transmit mode bits to Flash.
# - MODE4_SDR, (6): Transmit mode bits to Flash.
# - MODE8_SDR, (7): Transmit mode bits to Flash.
# - WRITE_SDR, (8): Transmit program data to Flash device.
# - READ_SDR, (9): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_SDR, (10): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_SDR, (11): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_SDR, (12): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_SDR, (13): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# - JMP_ON_CS, (31): Stop execution, de-assert CS and save operand[7:0] as the instruction start pointer for next
# sequence.Normally this instruction is used to support Execute-In-Place enhanced mode. See XIP enhanced mode for
# more details.This instruction is only allowed for AHB read commands. There is interrupt status bit set
# (INTR[IPCMDERR] or INTR[AHBCMDERR]) when using this instruction in IP command or AHB write command.
# - CMD_DDR, (33): Transmit command code to Flash.
# - RADDR_DDR, (34): Transmit row address to Flash.
# - CADDR_DDR, (35): Transmit column address to Flash.
# - MODE1_DDR, (36): Transmit mode bits to Flash.
# - MODE2_DDR, (37): Transmit mode bits to Flash.
# - MODE4_DDR, (38): Transmit mode bits to Flash.
# - MODE8_DDR, (39): Transmit mode bits to Flash.
# - WRITE_DDR, (40): Transmit program data to Flash device.
# - READ_DDR, (41): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_DDR, (42): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_DDR, (43): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_DDR, (44): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_DDR, (45): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# Possible options: <STOP, CMD_SDR, RADDR_SDR, CADDR_SDR, MODE1_SDR, MODE2_SDR, MODE4_SDR, MODE8_SDR, WRITE_SDR,
# READ_SDR, LEARN_SDR, DATSZ_SDR, DUMMY_SDR, DUMMY_RWDS_SDR, JMP_ON_CS, CMD_DDR, RADDR_DDR, CADDR_DDR, MODE1_DDR,
# MODE2_DDR, MODE4_DDR, MODE8_DDR, WRITE_DDR, READ_DDR, LEARN_DDR, DATSZ_DDR, DUMMY_DDR, DUMMY_RWDS_DDR>
OPERATION_CODE: STOP
lookupTable_seq13_instr1:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq13_instr2:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq13_instr3:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq13_instr4:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq13_instr5:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq13_instr6:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq13_instr7:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
# ----------------------------------===== lookupTable_seq14_instr0 [Optional] =====-----------------------------------
# Description: Offset: 0x00000160, Width: 16b; Lookup table holds Flash command sequences 14, instruction 0
lookupTable_seq14_instr0:
# ------------------------------------------===== OPERAND [Optional] =====------------------------------------------
# Description: Offset: 0b, Width: 8b, Instruction operand. Its values depends on used instruction
OPERAND: 0
# -----------------------------------------===== NUM_PADS [Optional] =====------------------------------------------
# Description: Offset: 8b, Width: 2b, Number of pads used by instruction. Some instructions ignores this parameter.
# - 1PAD, (0): Single mode. One pad is used.
# - 2PAD, (1): Dual mode. Two pads are used.
# - 4PAD, (2): Quad mode. Four pads are used.
# - 8PAD, (3): Octal mode. Eight pads are used.
# Possible options: <1PAD, 2PAD, 4PAD, 8PAD>
NUM_PADS: 1PAD
# --------------------------------------===== OPERATION_CODE [Optional] =====---------------------------------------
# Description: Offset: 10b, Width: 6b, Instruction operation code.
# - STOP, (0): Stop execution and de-assert CS. Then, the next command sequence (to the same flash device) starts
# from instruction pointer 0.
# - CMD_SDR, (1): Transmit command code to Flash.
# - RADDR_SDR, (2): Transmit row address to Flash.
# - CADDR_SDR, (3): Transmit column address to Flash.
# - MODE1_SDR, (4): Transmit mode bits to Flash.
# - MODE2_SDR, (5): Transmit mode bits to Flash.
# - MODE4_SDR, (6): Transmit mode bits to Flash.
# - MODE8_SDR, (7): Transmit mode bits to Flash.
# - WRITE_SDR, (8): Transmit program data to Flash device.
# - READ_SDR, (9): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_SDR, (10): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_SDR, (11): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_SDR, (12): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_SDR, (13): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# - JMP_ON_CS, (31): Stop execution, de-assert CS and save operand[7:0] as the instruction start pointer for next
# sequence.Normally this instruction is used to support Execute-In-Place enhanced mode. See XIP enhanced mode for
# more details.This instruction is only allowed for AHB read commands. There is interrupt status bit set
# (INTR[IPCMDERR] or INTR[AHBCMDERR]) when using this instruction in IP command or AHB write command.
# - CMD_DDR, (33): Transmit command code to Flash.
# - RADDR_DDR, (34): Transmit row address to Flash.
# - CADDR_DDR, (35): Transmit column address to Flash.
# - MODE1_DDR, (36): Transmit mode bits to Flash.
# - MODE2_DDR, (37): Transmit mode bits to Flash.
# - MODE4_DDR, (38): Transmit mode bits to Flash.
# - MODE8_DDR, (39): Transmit mode bits to Flash.
# - WRITE_DDR, (40): Transmit program data to Flash device.
# - READ_DDR, (41): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_DDR, (42): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_DDR, (43): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_DDR, (44): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_DDR, (45): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# Possible options: <STOP, CMD_SDR, RADDR_SDR, CADDR_SDR, MODE1_SDR, MODE2_SDR, MODE4_SDR, MODE8_SDR, WRITE_SDR,
# READ_SDR, LEARN_SDR, DATSZ_SDR, DUMMY_SDR, DUMMY_RWDS_SDR, JMP_ON_CS, CMD_DDR, RADDR_DDR, CADDR_DDR, MODE1_DDR,
# MODE2_DDR, MODE4_DDR, MODE8_DDR, WRITE_DDR, READ_DDR, LEARN_DDR, DATSZ_DDR, DUMMY_DDR, DUMMY_RWDS_DDR>
OPERATION_CODE: STOP
lookupTable_seq14_instr1:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq14_instr2:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq14_instr3:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq14_instr4:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq14_instr5:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq14_instr6:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq14_instr7:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
# ----------------------------------===== lookupTable_seq15_instr0 [Optional] =====-----------------------------------
# Description: Offset: 0x00000170, Width: 16b; Lookup table holds Flash command sequences 15, instruction 0
lookupTable_seq15_instr0:
# ------------------------------------------===== OPERAND [Optional] =====------------------------------------------
# Description: Offset: 0b, Width: 8b, Instruction operand. Its values depends on used instruction
OPERAND: 0
# -----------------------------------------===== NUM_PADS [Optional] =====------------------------------------------
# Description: Offset: 8b, Width: 2b, Number of pads used by instruction. Some instructions ignores this parameter.
# - 1PAD, (0): Single mode. One pad is used.
# - 2PAD, (1): Dual mode. Two pads are used.
# - 4PAD, (2): Quad mode. Four pads are used.
# - 8PAD, (3): Octal mode. Eight pads are used.
# Possible options: <1PAD, 2PAD, 4PAD, 8PAD>
NUM_PADS: 1PAD
# --------------------------------------===== OPERATION_CODE [Optional] =====---------------------------------------
# Description: Offset: 10b, Width: 6b, Instruction operation code.
# - STOP, (0): Stop execution and de-assert CS. Then, the next command sequence (to the same flash device) starts
# from instruction pointer 0.
# - CMD_SDR, (1): Transmit command code to Flash.
# - RADDR_SDR, (2): Transmit row address to Flash.
# - CADDR_SDR, (3): Transmit column address to Flash.
# - MODE1_SDR, (4): Transmit mode bits to Flash.
# - MODE2_SDR, (5): Transmit mode bits to Flash.
# - MODE4_SDR, (6): Transmit mode bits to Flash.
# - MODE8_SDR, (7): Transmit mode bits to Flash.
# - WRITE_SDR, (8): Transmit program data to Flash device.
# - READ_SDR, (9): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_SDR, (10): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_SDR, (11): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_SDR, (12): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_SDR, (13): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# - JMP_ON_CS, (31): Stop execution, de-assert CS and save operand[7:0] as the instruction start pointer for next
# sequence.Normally this instruction is used to support Execute-In-Place enhanced mode. See XIP enhanced mode for
# more details.This instruction is only allowed for AHB read commands. There is interrupt status bit set
# (INTR[IPCMDERR] or INTR[AHBCMDERR]) when using this instruction in IP command or AHB write command.
# - CMD_DDR, (33): Transmit command code to Flash.
# - RADDR_DDR, (34): Transmit row address to Flash.
# - CADDR_DDR, (35): Transmit column address to Flash.
# - MODE1_DDR, (36): Transmit mode bits to Flash.
# - MODE2_DDR, (37): Transmit mode bits to Flash.
# - MODE4_DDR, (38): Transmit mode bits to Flash.
# - MODE8_DDR, (39): Transmit mode bits to Flash.
# - WRITE_DDR, (40): Transmit program data to Flash device.
# - READ_DDR, (41): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_DDR, (42): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_DDR, (43): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_DDR, (44): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_DDR, (45): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# Possible options: <STOP, CMD_SDR, RADDR_SDR, CADDR_SDR, MODE1_SDR, MODE2_SDR, MODE4_SDR, MODE8_SDR, WRITE_SDR,
# READ_SDR, LEARN_SDR, DATSZ_SDR, DUMMY_SDR, DUMMY_RWDS_SDR, JMP_ON_CS, CMD_DDR, RADDR_DDR, CADDR_DDR, MODE1_DDR,
# MODE2_DDR, MODE4_DDR, MODE8_DDR, WRITE_DDR, READ_DDR, LEARN_DDR, DATSZ_DDR, DUMMY_DDR, DUMMY_RWDS_DDR>
OPERATION_CODE: STOP
lookupTable_seq15_instr1:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq15_instr2:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq15_instr3:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq15_instr4:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq15_instr5:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq15_instr6:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq15_instr7:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
# ---------------------------------------===== lutCustomSeq_0 [Optional] =====----------------------------------------
# Description: Offset: 0x00000180, Width: 32b; [0x180-0x1af] Customizable LUT Sequences
lutCustomSeq_0:
# ------------------------------------------===== seqNum [Optional] =====-------------------------------------------
# Description: Offset: 0b, Width: 8b, Sequence Number, valid number: 1-16
seqNum: 0
# -------------------------------------------===== seqId [Optional] =====-------------------------------------------
# Description: Offset: 8b, Width: 8b, Sequence Index, valid number: 0-15
seqId: 0
# -----------------------------------------===== reserved [Optional] =====------------------------------------------
# Description: Offset: 16b, Width: 16b, N/A
reserved: 0
# ---------------------------------------===== lutCustomSeq_1 [Optional] =====----------------------------------------
# Description: Offset: 0x00000184, Width: 32b; [0x180-0x1af] Customizable LUT Sequences
lutCustomSeq_1:
# ------------------------------------------===== seqNum [Optional] =====-------------------------------------------
# Description: Offset: 0b, Width: 8b, Sequence Number, valid number: 1-16
seqNum: 0
# -------------------------------------------===== seqId [Optional] =====-------------------------------------------
# Description: Offset: 8b, Width: 8b, Sequence Index, valid number: 0-15
seqId: 0
# -----------------------------------------===== reserved [Optional] =====------------------------------------------
# Description: Offset: 16b, Width: 16b, N/A
reserved: 0
# ---------------------------------------===== lutCustomSeq_2 [Optional] =====----------------------------------------
# Description: Offset: 0x00000188, Width: 32b; [0x180-0x1af] Customizable LUT Sequences
lutCustomSeq_2:
# ------------------------------------------===== seqNum [Optional] =====-------------------------------------------
# Description: Offset: 0b, Width: 8b, Sequence Number, valid number: 1-16
seqNum: 0
# -------------------------------------------===== seqId [Optional] =====-------------------------------------------
# Description: Offset: 8b, Width: 8b, Sequence Index, valid number: 0-15
seqId: 0
# -----------------------------------------===== reserved [Optional] =====------------------------------------------
# Description: Offset: 16b, Width: 16b, N/A
reserved: 0
# ---------------------------------------===== lutCustomSeq_3 [Optional] =====----------------------------------------
# Description: Offset: 0x0000018C, Width: 32b; [0x180-0x1af] Customizable LUT Sequences
lutCustomSeq_3:
# ------------------------------------------===== seqNum [Optional] =====-------------------------------------------
# Description: Offset: 0b, Width: 8b, Sequence Number, valid number: 1-16
seqNum: 0
# -------------------------------------------===== seqId [Optional] =====-------------------------------------------
# Description: Offset: 8b, Width: 8b, Sequence Index, valid number: 0-15
seqId: 0
# -----------------------------------------===== reserved [Optional] =====------------------------------------------
# Description: Offset: 16b, Width: 16b, N/A
reserved: 0
# ---------------------------------------===== lutCustomSeq_4 [Optional] =====----------------------------------------
# Description: Offset: 0x00000190, Width: 32b; [0x180-0x1af] Customizable LUT Sequences
lutCustomSeq_4:
# ------------------------------------------===== seqNum [Optional] =====-------------------------------------------
# Description: Offset: 0b, Width: 8b, Sequence Number, valid number: 1-16
seqNum: 0
# -------------------------------------------===== seqId [Optional] =====-------------------------------------------
# Description: Offset: 8b, Width: 8b, Sequence Index, valid number: 0-15
seqId: 0
# -----------------------------------------===== reserved [Optional] =====------------------------------------------
# Description: Offset: 16b, Width: 16b, N/A
reserved: 0
# ---------------------------------------===== lutCustomSeq_5 [Optional] =====----------------------------------------
# Description: Offset: 0x00000194, Width: 32b; [0x180-0x1af] Customizable LUT Sequences
lutCustomSeq_5:
# ------------------------------------------===== seqNum [Optional] =====-------------------------------------------
# Description: Offset: 0b, Width: 8b, Sequence Number, valid number: 1-16
seqNum: 0
# -------------------------------------------===== seqId [Optional] =====-------------------------------------------
# Description: Offset: 8b, Width: 8b, Sequence Index, valid number: 0-15
seqId: 0
# -----------------------------------------===== reserved [Optional] =====------------------------------------------
# Description: Offset: 16b, Width: 16b, N/A
reserved: 0
# ---------------------------------------===== lutCustomSeq_6 [Optional] =====----------------------------------------
# Description: Offset: 0x00000198, Width: 32b; [0x180-0x1af] Customizable LUT Sequences
lutCustomSeq_6:
# ------------------------------------------===== seqNum [Optional] =====-------------------------------------------
# Description: Offset: 0b, Width: 8b, Sequence Number, valid number: 1-16
seqNum: 0
# -------------------------------------------===== seqId [Optional] =====-------------------------------------------
# Description: Offset: 8b, Width: 8b, Sequence Index, valid number: 0-15
seqId: 0
# -----------------------------------------===== reserved [Optional] =====------------------------------------------
# Description: Offset: 16b, Width: 16b, N/A
reserved: 0
# ---------------------------------------===== lutCustomSeq_7 [Optional] =====----------------------------------------
# Description: Offset: 0x0000019C, Width: 32b; [0x180-0x1af] Customizable LUT Sequences
lutCustomSeq_7:
# ------------------------------------------===== seqNum [Optional] =====-------------------------------------------
# Description: Offset: 0b, Width: 8b, Sequence Number, valid number: 1-16
seqNum: 0
# -------------------------------------------===== seqId [Optional] =====-------------------------------------------
# Description: Offset: 8b, Width: 8b, Sequence Index, valid number: 0-15
seqId: 0
# -----------------------------------------===== reserved [Optional] =====------------------------------------------
# Description: Offset: 16b, Width: 16b, N/A
reserved: 0
# ---------------------------------------===== lutCustomSeq_8 [Optional] =====----------------------------------------
# Description: Offset: 0x000001A0, Width: 32b; [0x180-0x1af] Customizable LUT Sequences
lutCustomSeq_8:
# ------------------------------------------===== seqNum [Optional] =====-------------------------------------------
# Description: Offset: 0b, Width: 8b, Sequence Number, valid number: 1-16
seqNum: 0
# -------------------------------------------===== seqId [Optional] =====-------------------------------------------
# Description: Offset: 8b, Width: 8b, Sequence Index, valid number: 0-15
seqId: 0
# -----------------------------------------===== reserved [Optional] =====------------------------------------------
# Description: Offset: 16b, Width: 16b, N/A
reserved: 0
# ---------------------------------------===== lutCustomSeq_9 [Optional] =====----------------------------------------
# Description: Offset: 0x000001A4, Width: 32b; [0x180-0x1af] Customizable LUT Sequences
lutCustomSeq_9:
# ------------------------------------------===== seqNum [Optional] =====-------------------------------------------
# Description: Offset: 0b, Width: 8b, Sequence Number, valid number: 1-16
seqNum: 0
# -------------------------------------------===== seqId [Optional] =====-------------------------------------------
# Description: Offset: 8b, Width: 8b, Sequence Index, valid number: 0-15
seqId: 0
# -----------------------------------------===== reserved [Optional] =====------------------------------------------
# Description: Offset: 16b, Width: 16b, N/A
reserved: 0
# ---------------------------------------===== lutCustomSeq_10 [Optional] =====---------------------------------------
# Description: Offset: 0x000001A8, Width: 32b; [0x180-0x1af] Customizable LUT Sequences
lutCustomSeq_10:
# ------------------------------------------===== seqNum [Optional] =====-------------------------------------------
# Description: Offset: 0b, Width: 8b, Sequence Number, valid number: 1-16
seqNum: 0
# -------------------------------------------===== seqId [Optional] =====-------------------------------------------
# Description: Offset: 8b, Width: 8b, Sequence Index, valid number: 0-15
seqId: 0
# -----------------------------------------===== reserved [Optional] =====------------------------------------------
# Description: Offset: 16b, Width: 16b, N/A
reserved: 0
# ---------------------------------------===== lutCustomSeq_11 [Optional] =====---------------------------------------
# Description: Offset: 0x000001AC, Width: 32b; [0x180-0x1af] Customizable LUT Sequences
lutCustomSeq_11:
# ------------------------------------------===== seqNum [Optional] =====-------------------------------------------
# Description: Offset: 0b, Width: 8b, Sequence Number, valid number: 1-16
seqNum: 0
# -------------------------------------------===== seqId [Optional] =====-------------------------------------------
# Description: Offset: 8b, Width: 8b, Sequence Index, valid number: 0-15
seqId: 0
# -----------------------------------------===== reserved [Optional] =====------------------------------------------
# Description: Offset: 16b, Width: 16b, N/A
reserved: 0
# -----------------------------------------===== reserved4_0 [Optional] =====-----------------------------------------
# Description: Offset: 0x000001B0, Width: 32b; [0x1b0-0x1bf] Reserved for future use
reserved4_0: '0x00000000'
# -----------------------------------------===== reserved4_1 [Optional] =====-----------------------------------------
# Description: Offset: 0x000001B4, Width: 32b; [0x1b0-0x1bf] Reserved for future use
reserved4_1: '0x00000000'
# -----------------------------------------===== reserved4_2 [Optional] =====-----------------------------------------
# Description: Offset: 0x000001B8, Width: 32b; [0x1b0-0x1bf] Reserved for future use
reserved4_2: '0x00000000'
# -----------------------------------------===== reserved4_3 [Optional] =====-----------------------------------------
# Description: Offset: 0x000001BC, Width: 32b; [0x1b0-0x1bf] Reserved for future use
reserved4_3: '0x00000000'
# ------------------------------------------===== pageSize [Optional] =====-------------------------------------------
# Description: Offset: 0x000001C0, Width: 32b; Page size of Serial NOR
pageSize: '0x00000000'
# -----------------------------------------===== sectorSize [Optional] =====------------------------------------------
# Description: Offset: 0x000001C4, Width: 32b; Sector size of Serial NOR
sectorSize: '0x00000000'
# -------------------------------------===== ipcmdSerialClkFreq [Optional] =====--------------------------------------
# Description: Offset: 0x000001C8, Width: 8b; Clock frequency for IP command
ipcmdSerialClkFreq: '0x00'
# -------------------------------------===== isUniformBlockSize [Optional] =====--------------------------------------
# Description: Offset: 0x000001C9, Width: 8b; Sector/Block size is the same
isUniformBlockSize: '0x00'
# -------------------------------------===== isDataOrderSwapped [Optional] =====--------------------------------------
# Description: Offset: 0x000001CA, Width: 8b; Data order (D0, D1, D2, D3) is swapped (D1,D0, D3, D2)
isDataOrderSwapped: '0x00'
# -----------------------------------------===== reserved0_0 [Optional] =====-----------------------------------------
# Description: Offset: 0x000001CB, Width: 8b; Reserved for future use
reserved0_0: '0x00'
# ----------------------------------------===== serialNorType [Optional] =====----------------------------------------
# Description: Offset: 0x000001CC, Width: 8b; Serial NOR Flash type: 0/1/2/3
serialNorType: '0x00'
# --------------------------------------===== needExitNoCmdMode [Optional] =====--------------------------------------
# Description: Offset: 0x000001CD, Width: 8b; Need to exit NoCmd mode before other IP command
needExitNoCmdMode: '0x00'
# ------------------------------------===== halfClkForNonReadCmd [Optional] =====-------------------------------------
# Description: Offset: 0x000001CE, Width: 8b; Half the Serial Clock for non-read command: true/false
halfClkForNonReadCmd: '0x00'
# ------------------------------------===== needRestoreNoCmdMode [Optional] =====-------------------------------------
# Description: Offset: 0x000001CF, Width: 8b; Need to Restore NoCmd mode after IP command execution
needRestoreNoCmdMode: '0x00'
# ------------------------------------------===== blockSize [Optional] =====------------------------------------------
# Description: Offset: 0x000001D0, Width: 32b; Block size
blockSize: '0x00000000'
# ----------------------------------------===== flashStateCtx [Optional] =====----------------------------------------
# Description: Offset: 0x000001D4, Width: 32b; Flash State Context
flashStateCtx: '0x00000000'
# -----------------------------------------===== reserve2_0 [Optional] =====------------------------------------------
# Description: Offset: 0x000001D8, Width: 32b; Reserved for future use
reserve2_0: '0x00000000'
# -----------------------------------------===== reserve2_1 [Optional] =====------------------------------------------
# Description: Offset: 0x000001DC, Width: 32b; Reserved for future use
reserve2_1: '0x00000000'
# -----------------------------------------===== reserve2_2 [Optional] =====------------------------------------------
# Description: Offset: 0x000001E0, Width: 32b; Reserved for future use
reserve2_2: '0x00000000'
# -----------------------------------------===== reserve2_3 [Optional] =====------------------------------------------
# Description: Offset: 0x000001E4, Width: 32b; Reserved for future use
reserve2_3: '0x00000000'
# -----------------------------------------===== reserve2_4 [Optional] =====------------------------------------------
# Description: Offset: 0x000001E8, Width: 32b; Reserved for future use
reserve2_4: '0x00000000'
# -----------------------------------------===== reserve2_5 [Optional] =====------------------------------------------
# Description: Offset: 0x000001EC, Width: 32b; Reserved for future use
reserve2_5: '0x00000000'
# -----------------------------------------===== reserve2_6 [Optional] =====------------------------------------------
# Description: Offset: 0x000001F0, Width: 32b; Reserved for future use
reserve2_6: '0x00000000'
# -----------------------------------------===== reserve2_7 [Optional] =====------------------------------------------
# Description: Offset: 0x000001F4, Width: 32b; Reserved for future use
reserve2_7: '0x00000000'
# -----------------------------------------===== reserve2_8 [Optional] =====------------------------------------------
# Description: Offset: 0x000001F8, Width: 32b; Reserved for future use
reserve2_8: '0x00000000'
# -----------------------------------------===== reserve2_9 [Optional] =====------------------------------------------
# Description: Offset: 0x000001FC, Width: 32b; Reserved for future use
reserve2_9: '0x00000000'
FCB for mimxrt555s, Revision: b0 and flexspi_nor#
FCB for mimxrt555s, Revision: b0 and flexspi_nor JSON schema
FCB for mimxrt555s, Revision: b0 and flexspi_nor YAML configuration template
# ================================= FCB for mimxrt555s, Revision: b0 and flexspi_nor =================================
# ======================================================================================================================
# == FCB for mimxrt555s, Revision: b0 and flexspi_nor ==
# ======================================================================================================================
# -------------------------------------===== The chip family name [Required] =====--------------------------------------
# Description: NXP chip family identifier.
family: CHOOSE_FROM_TABLE
# -----------------------------------------===== MCU revision [Optional] =====------------------------------------------
# Description: Revision of silicon. The 'latest' name, means most current revision.
# Possible options: <a0, b0, latest>
revision: b0
# ------------------------------------------===== Memory type [Required] =====------------------------------------------
# Description: Specify type of memory used by FCB description.
# Possible options: <flexspi_nor>
type: flexspi_nor
# ------------------------------------------===== mimxrt555s [Required] =====-------------------------------------------
fcb_settings:
# ---------------------------------------------===== tag [Optional] =====---------------------------------------------
# Description: Offset: 0x00000000, Width: 32b; [0x000-0x003] Tag, fixed value 0x42464346UL
tag: '0x42464346'
# -------------------------------------------===== version [Optional] =====-------------------------------------------
# Description: Offset: 0x00000004, Width: 32b; [0x004-0x007] Version,[31:24] -'V', [23:16] - Major, [15:8] - Minor,
# [7:0] - bugfix
version: '0x56010400'
# ------------------------------------------===== reserved0 [Optional] =====------------------------------------------
# Description: Offset: 0x00000008, Width: 32b; [0x008-0x00b] Reserved for future use
reserved0: '0x00000000'
# --------------------------------------===== readSampleClkSrc [Optional] =====---------------------------------------
# Description: Offset: 0x0000000C, Width: 8b; [0x00c-0x00c] Read Sample Clock Source, valid value: 0/1/3
readSampleClkSrc: '0x00'
# -----------------------------------------===== csHoldTime [Optional] =====------------------------------------------
# Description: Offset: 0x0000000D, Width: 8b; [0x00d-0x00d] CS hold time, default value: 3
csHoldTime: '0x00'
# -----------------------------------------===== csSetupTime [Optional] =====-----------------------------------------
# Description: Offset: 0x0000000E, Width: 8b; [0x00e-0x00e] CS setup time, default value: 3
csSetupTime: '0x00'
# -------------------------------------===== columnAddressWidth [Optional] =====--------------------------------------
# Description: Offset: 0x0000000F, Width: 8b; [0x00f-0x00f] Column Address with, for HyperBus protocol, it is fixed
# to 3, For Serial NAND, need to refer to datasheet
columnAddressWidth: '0x00'
# -------------------------------------===== deviceModeCfgEnable [Optional] =====-------------------------------------
# Description: Offset: 0x00000010, Width: 8b; [0x010-0x010] Device Mode Configure enable flag, 1 - Enable, 0 -
# Disable
deviceModeCfgEnable: '0x00'
# ---------------------------------------===== deviceModeType [Optional] =====----------------------------------------
# Description: Offset: 0x00000011, Width: 8b; [0x011-0x011] Specify the configuration command type:Quad Enable,
# DPI/QPI/OPI switch, Generic configuration, etc.
deviceModeType: '0x00'
# -------------------------------------===== waitTimeCfgCommands [Optional] =====-------------------------------------
# Description: Offset: 0x00000012, Width: 16b; [0x012-0x013] Wait time for all configuration commands, unit: 100us,
# Used for DPI/QPI/OPI switch or reset command
waitTimeCfgCommands: '0x0000'
# ----------------------------------------===== deviceModeSeq [Optional] =====----------------------------------------
# Description: Offset: 0x00000014, Width: 32b; [0x014-0x017] Device mode sequence info, [7:0] - LUT sequence id,
# [15:8] - LUt sequence number, [31:16] Reserved
deviceModeSeq:
# ------------------------------------------===== seqNum [Optional] =====-------------------------------------------
# Description: Offset: 0b, Width: 8b, Sequence Number, valid number: 1-16
seqNum: 0
# -------------------------------------------===== seqId [Optional] =====-------------------------------------------
# Description: Offset: 8b, Width: 8b, Sequence Index, valid number: 0-15
seqId: 0
# -----------------------------------------===== reserved [Optional] =====------------------------------------------
# Description: Offset: 16b, Width: 16b, N/A
reserved: 0
# ----------------------------------------===== deviceModeArg [Optional] =====----------------------------------------
# Description: Offset: 0x00000018, Width: 32b; [0x018-0x01b] Argument/Parameter for device configuration
deviceModeArg: '0x00000000'
# ---------------------------------------===== configCmdEnable [Optional] =====---------------------------------------
# Description: Offset: 0x0000001C, Width: 8b; [0x01c-0x01c] Configure command Enable Flag, 1 - Enable, 0 - Disable
configCmdEnable: '0x00'
# --------------------------------------===== configModeType_0 [Optional] =====---------------------------------------
# Description: Offset: 0x0000001D, Width: 8b; [0x01d-0x01f] Configure Mode Type, similar as deviceModeTpe
configModeType_0: '0x00'
# --------------------------------------===== configModeType_1 [Optional] =====---------------------------------------
# Description: Offset: 0x0000001E, Width: 8b; [0x01d-0x01f] Configure Mode Type, similar as deviceModeTpe
configModeType_1: '0x00'
# --------------------------------------===== configModeType_2 [Optional] =====---------------------------------------
# Description: Offset: 0x0000001F, Width: 8b; [0x01d-0x01f] Configure Mode Type, similar as deviceModeTpe
configModeType_2: '0x00'
# ---------------------------------------===== configCmdSeqs_0 [Optional] =====---------------------------------------
# Description: Offset: 0x00000020, Width: 32b; [0x020-0x02b] Sequence info for Device Configuration command, similar
# as deviceModeSeq
configCmdSeqs_0:
# ------------------------------------------===== seqNum [Optional] =====-------------------------------------------
# Description: Offset: 0b, Width: 8b, Sequence Number, valid number: 1-16
seqNum: 0
# -------------------------------------------===== seqId [Optional] =====-------------------------------------------
# Description: Offset: 8b, Width: 8b, Sequence Index, valid number: 0-15
seqId: 0
# -----------------------------------------===== reserved [Optional] =====------------------------------------------
# Description: Offset: 16b, Width: 16b, N/A
reserved: 0
# ---------------------------------------===== configCmdSeqs_1 [Optional] =====---------------------------------------
# Description: Offset: 0x00000024, Width: 32b; [0x020-0x02b] Sequence info for Device Configuration command, similar
# as deviceModeSeq
configCmdSeqs_1:
# ------------------------------------------===== seqNum [Optional] =====-------------------------------------------
# Description: Offset: 0b, Width: 8b, Sequence Number, valid number: 1-16
seqNum: 0
# -------------------------------------------===== seqId [Optional] =====-------------------------------------------
# Description: Offset: 8b, Width: 8b, Sequence Index, valid number: 0-15
seqId: 0
# -----------------------------------------===== reserved [Optional] =====------------------------------------------
# Description: Offset: 16b, Width: 16b, N/A
reserved: 0
# ---------------------------------------===== configCmdSeqs_2 [Optional] =====---------------------------------------
# Description: Offset: 0x00000028, Width: 32b; [0x020-0x02b] Sequence info for Device Configuration command, similar
# as deviceModeSeq
configCmdSeqs_2:
# ------------------------------------------===== seqNum [Optional] =====-------------------------------------------
# Description: Offset: 0b, Width: 8b, Sequence Number, valid number: 1-16
seqNum: 0
# -------------------------------------------===== seqId [Optional] =====-------------------------------------------
# Description: Offset: 8b, Width: 8b, Sequence Index, valid number: 0-15
seqId: 0
# -----------------------------------------===== reserved [Optional] =====------------------------------------------
# Description: Offset: 16b, Width: 16b, N/A
reserved: 0
# ------------------------------------------===== reserved1 [Optional] =====------------------------------------------
# Description: Offset: 0x0000002C, Width: 32b; [0x02c-0x02f] Reserved for future use
reserved1: '0x00000000'
# ---------------------------------------===== configCmdArgs_0 [Optional] =====---------------------------------------
# Description: Offset: 0x00000030, Width: 32b; [0x030-0x03b] Arguments/Parameters for device Configuration commands
configCmdArgs_0: '0x00000000'
# ---------------------------------------===== configCmdArgs_1 [Optional] =====---------------------------------------
# Description: Offset: 0x00000034, Width: 32b; [0x030-0x03b] Arguments/Parameters for device Configuration commands
configCmdArgs_1: '0x00000000'
# ---------------------------------------===== configCmdArgs_2 [Optional] =====---------------------------------------
# Description: Offset: 0x00000038, Width: 32b; [0x030-0x03b] Arguments/Parameters for device Configuration commands
configCmdArgs_2: '0x00000000'
# ------------------------------------------===== reserved2 [Optional] =====------------------------------------------
# Description: Offset: 0x0000003C, Width: 32b; [0x03c-0x03f] Reserved for future use
reserved2: '0x00000000'
# ------------------------------------===== controllerMiscOption [Optional] =====-------------------------------------
# Description: Offset: 0x00000040, Width: 32b; [0x040-0x043] Controller Misc Options, see Misc feature bit
# definitions for more details
controllerMiscOption: '0x00000000'
# -----------------------------------------===== deviceType [Optional] =====------------------------------------------
# Description: Offset: 0x00000044, Width: 8b; [0x044-0x044] Device Type: See Flash Type Definition for more details
deviceType: '0x00'
# ----------------------------------------===== sflashPadType [Optional] =====----------------------------------------
# Description: Offset: 0x00000045, Width: 8b; [0x045-0x045] Serial Flash Pad Type: 1 - Single, 2 - Dual, 4 - Quad, 8
# - Octal
sflashPadType: '0x00'
# ----------------------------------------===== serialClkFreq [Optional] =====----------------------------------------
# Description: Offset: 0x00000046, Width: 8b; [0x046-0x046] Serial Flash Frequency, device specific definitions, See
# System Boot Chapter for more details
serialClkFreq: '0x00'
# -------------------------------------===== lutCustomSeqEnable [Optional] =====--------------------------------------
# Description: Offset: 0x00000047, Width: 8b; [0x047-0x047] LUT customization Enable, it is required if the
# program/erase cannot be done using 1 LUT sequence, currently, only applicable to HyperFLASH
lutCustomSeqEnable: '0x00'
# -----------------------------------------===== reserved3_0 [Optional] =====-----------------------------------------
# Description: Offset: 0x00000048, Width: 32b; [0x048-0x04f] Reserved for future use
reserved3_0: '0x00000000'
# -----------------------------------------===== reserved3_1 [Optional] =====-----------------------------------------
# Description: Offset: 0x0000004C, Width: 32b; [0x048-0x04f] Reserved for future use
reserved3_1: '0x00000000'
# ----------------------------------------===== sflashA1Size [Optional] =====-----------------------------------------
# Description: Offset: 0x00000050, Width: 32b; [0x050-0x053] Size of Flash connected to A1
sflashA1Size: '0x00000000'
# ----------------------------------------===== sflashA2Size [Optional] =====-----------------------------------------
# Description: Offset: 0x00000054, Width: 32b; [0x054-0x057] Size of Flash connected to A2
sflashA2Size: '0x00000000'
# ----------------------------------------===== sflashB1Size [Optional] =====-----------------------------------------
# Description: Offset: 0x00000058, Width: 32b; [0x058-0x05b] Size of Flash connected to B1
sflashB1Size: '0x00000000'
# ----------------------------------------===== sflashB2Size [Optional] =====-----------------------------------------
# Description: Offset: 0x0000005C, Width: 32b; [0x05c-0x05f] Size of Flash connected to B2
sflashB2Size: '0x00000000'
# ------------------------------------===== csPadSettingOverride [Optional] =====-------------------------------------
# Description: Offset: 0x00000060, Width: 32b; [0x060-0x063] CS pad setting override value
csPadSettingOverride: '0x00000000'
# -----------------------------------===== sclkPadSettingOverride [Optional] =====------------------------------------
# Description: Offset: 0x00000064, Width: 32b; [0x064-0x067] SCK pad setting override value
sclkPadSettingOverride: '0x00000000'
# -----------------------------------===== dataPadSettingOverride [Optional] =====------------------------------------
# Description: Offset: 0x00000068, Width: 32b; [0x068-0x06b] data pad setting override value
dataPadSettingOverride: '0x00000000'
# ------------------------------------===== dqsPadSettingOverride [Optional] =====------------------------------------
# Description: Offset: 0x0000006C, Width: 32b; [0x06c-0x06f] DQS pad setting override value
dqsPadSettingOverride: '0x00000000'
# -----------------------------------------===== timeoutInMs [Optional] =====-----------------------------------------
# Description: Offset: 0x00000070, Width: 32b; [0x070-0x073] Timeout threshold for read status command
timeoutInMs: '0x00000000'
# ---------------------------------------===== commandInterval [Optional] =====---------------------------------------
# Description: Offset: 0x00000074, Width: 32b; [0x074-0x077] CS deselect interval between two commands
commandInterval: '0x00000000'
# ---------------------------------------===== dataValidTime_0 [Optional] =====---------------------------------------
# Description: Offset: 0x00000078, Width: 16b; [0x078-0x07b] CLK edge to data valid time for PORT A and PORT B
dataValidTime_0:
# ----------------------------------------===== time_100ps [Optional] =====-----------------------------------------
# Description: Offset: 0b, Width: 8b, Data valid time, in terms of 100ps
time_100ps: 0
# ----------------------------------------===== delay_cells [Optional] =====----------------------------------------
# Description: Offset: 8b, Width: 8b, Data valid time, in terms of delay cells
delay_cells: 0
# ---------------------------------------===== dataValidTime_1 [Optional] =====---------------------------------------
# Description: Offset: 0x0000007A, Width: 16b; [0x078-0x07b] CLK edge to data valid time for PORT A and PORT B
dataValidTime_1:
# ----------------------------------------===== time_100ps [Optional] =====-----------------------------------------
# Description: Offset: 0b, Width: 8b, Data valid time, in terms of 100ps
time_100ps: 0
# ----------------------------------------===== delay_cells [Optional] =====----------------------------------------
# Description: Offset: 8b, Width: 8b, Data valid time, in terms of delay cells
delay_cells: 0
# -----------------------------------------===== busyOffset [Optional] =====------------------------------------------
# Description: Offset: 0x0000007C, Width: 16b; [0x07c-0x07d] Busy offset, valid value: 0-31
busyOffset: '0x0000'
# ---------------------------------------===== busyBitPolarity [Optional] =====---------------------------------------
# Description: Offset: 0x0000007E, Width: 16b; [0x07e-0x07f] Busy flag polarity, 0 - busy flag is 1 when flash device
# is busy, 1 - busy flag is 0 when flash device is busy
busyBitPolarity: '0x0000'
# -----------------------------------===== lookupTable_seq0_instr0 [Optional] =====-----------------------------------
# Description: Offset: 0x00000080, Width: 16b; Lookup table holds Flash command sequences 0, instruction 0
lookupTable_seq0_instr0:
# ------------------------------------------===== OPERAND [Optional] =====------------------------------------------
# Description: Offset: 0b, Width: 8b, Instruction operand. Its values depends on used instruction
OPERAND: 0
# -----------------------------------------===== NUM_PADS [Optional] =====------------------------------------------
# Description: Offset: 8b, Width: 2b, Number of pads used by instruction. Some instructions ignores this parameter.
# - 1PAD, (0): Single mode. One pad is used.
# - 2PAD, (1): Dual mode. Two pads are used.
# - 4PAD, (2): Quad mode. Four pads are used.
# - 8PAD, (3): Octal mode. Eight pads are used.
# Possible options: <1PAD, 2PAD, 4PAD, 8PAD>
NUM_PADS: 1PAD
# --------------------------------------===== OPERATION_CODE [Optional] =====---------------------------------------
# Description: Offset: 10b, Width: 6b, Instruction operation code.
# - STOP, (0): Stop execution and de-assert CS. Then, the next command sequence (to the same flash device) starts
# from instruction pointer 0.
# - CMD_SDR, (1): Transmit command code to Flash.
# - RADDR_SDR, (2): Transmit row address to Flash.
# - CADDR_SDR, (3): Transmit column address to Flash.
# - MODE1_SDR, (4): Transmit mode bits to Flash.
# - MODE2_SDR, (5): Transmit mode bits to Flash.
# - MODE4_SDR, (6): Transmit mode bits to Flash.
# - MODE8_SDR, (7): Transmit mode bits to Flash.
# - WRITE_SDR, (8): Transmit program data to Flash device.
# - READ_SDR, (9): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_SDR, (10): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_SDR, (11): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_SDR, (12): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_SDR, (13): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# - JMP_ON_CS, (31): Stop execution, de-assert CS and save operand[7:0] as the instruction start pointer for next
# sequence.Normally this instruction is used to support Execute-In-Place enhanced mode. See XIP enhanced mode for
# more details.This instruction is only allowed for AHB read commands. There is interrupt status bit set
# (INTR[IPCMDERR] or INTR[AHBCMDERR]) when using this instruction in IP command or AHB write command.
# - CMD_DDR, (33): Transmit command code to Flash.
# - RADDR_DDR, (34): Transmit row address to Flash.
# - CADDR_DDR, (35): Transmit column address to Flash.
# - MODE1_DDR, (36): Transmit mode bits to Flash.
# - MODE2_DDR, (37): Transmit mode bits to Flash.
# - MODE4_DDR, (38): Transmit mode bits to Flash.
# - MODE8_DDR, (39): Transmit mode bits to Flash.
# - WRITE_DDR, (40): Transmit program data to Flash device.
# - READ_DDR, (41): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_DDR, (42): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_DDR, (43): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_DDR, (44): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_DDR, (45): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# Possible options: <STOP, CMD_SDR, RADDR_SDR, CADDR_SDR, MODE1_SDR, MODE2_SDR, MODE4_SDR, MODE8_SDR, WRITE_SDR,
# READ_SDR, LEARN_SDR, DATSZ_SDR, DUMMY_SDR, DUMMY_RWDS_SDR, JMP_ON_CS, CMD_DDR, RADDR_DDR, CADDR_DDR, MODE1_DDR,
# MODE2_DDR, MODE4_DDR, MODE8_DDR, WRITE_DDR, READ_DDR, LEARN_DDR, DATSZ_DDR, DUMMY_DDR, DUMMY_RWDS_DDR>
OPERATION_CODE: STOP
lookupTable_seq0_instr1:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq0_instr2:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq0_instr3:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq0_instr4:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq0_instr5:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq0_instr6:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq0_instr7:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
# -----------------------------------===== lookupTable_seq1_instr0 [Optional] =====-----------------------------------
# Description: Offset: 0x00000090, Width: 16b; Lookup table holds Flash command sequences 1, instruction 0
lookupTable_seq1_instr0:
# ------------------------------------------===== OPERAND [Optional] =====------------------------------------------
# Description: Offset: 0b, Width: 8b, Instruction operand. Its values depends on used instruction
OPERAND: 0
# -----------------------------------------===== NUM_PADS [Optional] =====------------------------------------------
# Description: Offset: 8b, Width: 2b, Number of pads used by instruction. Some instructions ignores this parameter.
# - 1PAD, (0): Single mode. One pad is used.
# - 2PAD, (1): Dual mode. Two pads are used.
# - 4PAD, (2): Quad mode. Four pads are used.
# - 8PAD, (3): Octal mode. Eight pads are used.
# Possible options: <1PAD, 2PAD, 4PAD, 8PAD>
NUM_PADS: 1PAD
# --------------------------------------===== OPERATION_CODE [Optional] =====---------------------------------------
# Description: Offset: 10b, Width: 6b, Instruction operation code.
# - STOP, (0): Stop execution and de-assert CS. Then, the next command sequence (to the same flash device) starts
# from instruction pointer 0.
# - CMD_SDR, (1): Transmit command code to Flash.
# - RADDR_SDR, (2): Transmit row address to Flash.
# - CADDR_SDR, (3): Transmit column address to Flash.
# - MODE1_SDR, (4): Transmit mode bits to Flash.
# - MODE2_SDR, (5): Transmit mode bits to Flash.
# - MODE4_SDR, (6): Transmit mode bits to Flash.
# - MODE8_SDR, (7): Transmit mode bits to Flash.
# - WRITE_SDR, (8): Transmit program data to Flash device.
# - READ_SDR, (9): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_SDR, (10): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_SDR, (11): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_SDR, (12): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_SDR, (13): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# - JMP_ON_CS, (31): Stop execution, de-assert CS and save operand[7:0] as the instruction start pointer for next
# sequence.Normally this instruction is used to support Execute-In-Place enhanced mode. See XIP enhanced mode for
# more details.This instruction is only allowed for AHB read commands. There is interrupt status bit set
# (INTR[IPCMDERR] or INTR[AHBCMDERR]) when using this instruction in IP command or AHB write command.
# - CMD_DDR, (33): Transmit command code to Flash.
# - RADDR_DDR, (34): Transmit row address to Flash.
# - CADDR_DDR, (35): Transmit column address to Flash.
# - MODE1_DDR, (36): Transmit mode bits to Flash.
# - MODE2_DDR, (37): Transmit mode bits to Flash.
# - MODE4_DDR, (38): Transmit mode bits to Flash.
# - MODE8_DDR, (39): Transmit mode bits to Flash.
# - WRITE_DDR, (40): Transmit program data to Flash device.
# - READ_DDR, (41): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_DDR, (42): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_DDR, (43): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_DDR, (44): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_DDR, (45): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# Possible options: <STOP, CMD_SDR, RADDR_SDR, CADDR_SDR, MODE1_SDR, MODE2_SDR, MODE4_SDR, MODE8_SDR, WRITE_SDR,
# READ_SDR, LEARN_SDR, DATSZ_SDR, DUMMY_SDR, DUMMY_RWDS_SDR, JMP_ON_CS, CMD_DDR, RADDR_DDR, CADDR_DDR, MODE1_DDR,
# MODE2_DDR, MODE4_DDR, MODE8_DDR, WRITE_DDR, READ_DDR, LEARN_DDR, DATSZ_DDR, DUMMY_DDR, DUMMY_RWDS_DDR>
OPERATION_CODE: STOP
lookupTable_seq1_instr1:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq1_instr2:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq1_instr3:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq1_instr4:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq1_instr5:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq1_instr6:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq1_instr7:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
# -----------------------------------===== lookupTable_seq2_instr0 [Optional] =====-----------------------------------
# Description: Offset: 0x000000A0, Width: 16b; Lookup table holds Flash command sequences 2, instruction 0
lookupTable_seq2_instr0:
# ------------------------------------------===== OPERAND [Optional] =====------------------------------------------
# Description: Offset: 0b, Width: 8b, Instruction operand. Its values depends on used instruction
OPERAND: 0
# -----------------------------------------===== NUM_PADS [Optional] =====------------------------------------------
# Description: Offset: 8b, Width: 2b, Number of pads used by instruction. Some instructions ignores this parameter.
# - 1PAD, (0): Single mode. One pad is used.
# - 2PAD, (1): Dual mode. Two pads are used.
# - 4PAD, (2): Quad mode. Four pads are used.
# - 8PAD, (3): Octal mode. Eight pads are used.
# Possible options: <1PAD, 2PAD, 4PAD, 8PAD>
NUM_PADS: 1PAD
# --------------------------------------===== OPERATION_CODE [Optional] =====---------------------------------------
# Description: Offset: 10b, Width: 6b, Instruction operation code.
# - STOP, (0): Stop execution and de-assert CS. Then, the next command sequence (to the same flash device) starts
# from instruction pointer 0.
# - CMD_SDR, (1): Transmit command code to Flash.
# - RADDR_SDR, (2): Transmit row address to Flash.
# - CADDR_SDR, (3): Transmit column address to Flash.
# - MODE1_SDR, (4): Transmit mode bits to Flash.
# - MODE2_SDR, (5): Transmit mode bits to Flash.
# - MODE4_SDR, (6): Transmit mode bits to Flash.
# - MODE8_SDR, (7): Transmit mode bits to Flash.
# - WRITE_SDR, (8): Transmit program data to Flash device.
# - READ_SDR, (9): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_SDR, (10): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_SDR, (11): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_SDR, (12): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_SDR, (13): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# - JMP_ON_CS, (31): Stop execution, de-assert CS and save operand[7:0] as the instruction start pointer for next
# sequence.Normally this instruction is used to support Execute-In-Place enhanced mode. See XIP enhanced mode for
# more details.This instruction is only allowed for AHB read commands. There is interrupt status bit set
# (INTR[IPCMDERR] or INTR[AHBCMDERR]) when using this instruction in IP command or AHB write command.
# - CMD_DDR, (33): Transmit command code to Flash.
# - RADDR_DDR, (34): Transmit row address to Flash.
# - CADDR_DDR, (35): Transmit column address to Flash.
# - MODE1_DDR, (36): Transmit mode bits to Flash.
# - MODE2_DDR, (37): Transmit mode bits to Flash.
# - MODE4_DDR, (38): Transmit mode bits to Flash.
# - MODE8_DDR, (39): Transmit mode bits to Flash.
# - WRITE_DDR, (40): Transmit program data to Flash device.
# - READ_DDR, (41): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_DDR, (42): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_DDR, (43): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_DDR, (44): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_DDR, (45): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# Possible options: <STOP, CMD_SDR, RADDR_SDR, CADDR_SDR, MODE1_SDR, MODE2_SDR, MODE4_SDR, MODE8_SDR, WRITE_SDR,
# READ_SDR, LEARN_SDR, DATSZ_SDR, DUMMY_SDR, DUMMY_RWDS_SDR, JMP_ON_CS, CMD_DDR, RADDR_DDR, CADDR_DDR, MODE1_DDR,
# MODE2_DDR, MODE4_DDR, MODE8_DDR, WRITE_DDR, READ_DDR, LEARN_DDR, DATSZ_DDR, DUMMY_DDR, DUMMY_RWDS_DDR>
OPERATION_CODE: STOP
lookupTable_seq2_instr1:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq2_instr2:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq2_instr3:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq2_instr4:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq2_instr5:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq2_instr6:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq2_instr7:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
# -----------------------------------===== lookupTable_seq3_instr0 [Optional] =====-----------------------------------
# Description: Offset: 0x000000B0, Width: 16b; Lookup table holds Flash command sequences 3, instruction 0
lookupTable_seq3_instr0:
# ------------------------------------------===== OPERAND [Optional] =====------------------------------------------
# Description: Offset: 0b, Width: 8b, Instruction operand. Its values depends on used instruction
OPERAND: 0
# -----------------------------------------===== NUM_PADS [Optional] =====------------------------------------------
# Description: Offset: 8b, Width: 2b, Number of pads used by instruction. Some instructions ignores this parameter.
# - 1PAD, (0): Single mode. One pad is used.
# - 2PAD, (1): Dual mode. Two pads are used.
# - 4PAD, (2): Quad mode. Four pads are used.
# - 8PAD, (3): Octal mode. Eight pads are used.
# Possible options: <1PAD, 2PAD, 4PAD, 8PAD>
NUM_PADS: 1PAD
# --------------------------------------===== OPERATION_CODE [Optional] =====---------------------------------------
# Description: Offset: 10b, Width: 6b, Instruction operation code.
# - STOP, (0): Stop execution and de-assert CS. Then, the next command sequence (to the same flash device) starts
# from instruction pointer 0.
# - CMD_SDR, (1): Transmit command code to Flash.
# - RADDR_SDR, (2): Transmit row address to Flash.
# - CADDR_SDR, (3): Transmit column address to Flash.
# - MODE1_SDR, (4): Transmit mode bits to Flash.
# - MODE2_SDR, (5): Transmit mode bits to Flash.
# - MODE4_SDR, (6): Transmit mode bits to Flash.
# - MODE8_SDR, (7): Transmit mode bits to Flash.
# - WRITE_SDR, (8): Transmit program data to Flash device.
# - READ_SDR, (9): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_SDR, (10): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_SDR, (11): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_SDR, (12): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_SDR, (13): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# - JMP_ON_CS, (31): Stop execution, de-assert CS and save operand[7:0] as the instruction start pointer for next
# sequence.Normally this instruction is used to support Execute-In-Place enhanced mode. See XIP enhanced mode for
# more details.This instruction is only allowed for AHB read commands. There is interrupt status bit set
# (INTR[IPCMDERR] or INTR[AHBCMDERR]) when using this instruction in IP command or AHB write command.
# - CMD_DDR, (33): Transmit command code to Flash.
# - RADDR_DDR, (34): Transmit row address to Flash.
# - CADDR_DDR, (35): Transmit column address to Flash.
# - MODE1_DDR, (36): Transmit mode bits to Flash.
# - MODE2_DDR, (37): Transmit mode bits to Flash.
# - MODE4_DDR, (38): Transmit mode bits to Flash.
# - MODE8_DDR, (39): Transmit mode bits to Flash.
# - WRITE_DDR, (40): Transmit program data to Flash device.
# - READ_DDR, (41): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_DDR, (42): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_DDR, (43): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_DDR, (44): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_DDR, (45): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# Possible options: <STOP, CMD_SDR, RADDR_SDR, CADDR_SDR, MODE1_SDR, MODE2_SDR, MODE4_SDR, MODE8_SDR, WRITE_SDR,
# READ_SDR, LEARN_SDR, DATSZ_SDR, DUMMY_SDR, DUMMY_RWDS_SDR, JMP_ON_CS, CMD_DDR, RADDR_DDR, CADDR_DDR, MODE1_DDR,
# MODE2_DDR, MODE4_DDR, MODE8_DDR, WRITE_DDR, READ_DDR, LEARN_DDR, DATSZ_DDR, DUMMY_DDR, DUMMY_RWDS_DDR>
OPERATION_CODE: STOP
lookupTable_seq3_instr1:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq3_instr2:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq3_instr3:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq3_instr4:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq3_instr5:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq3_instr6:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq3_instr7:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
# -----------------------------------===== lookupTable_seq4_instr0 [Optional] =====-----------------------------------
# Description: Offset: 0x000000C0, Width: 16b; Lookup table holds Flash command sequences 4, instruction 0
lookupTable_seq4_instr0:
# ------------------------------------------===== OPERAND [Optional] =====------------------------------------------
# Description: Offset: 0b, Width: 8b, Instruction operand. Its values depends on used instruction
OPERAND: 0
# -----------------------------------------===== NUM_PADS [Optional] =====------------------------------------------
# Description: Offset: 8b, Width: 2b, Number of pads used by instruction. Some instructions ignores this parameter.
# - 1PAD, (0): Single mode. One pad is used.
# - 2PAD, (1): Dual mode. Two pads are used.
# - 4PAD, (2): Quad mode. Four pads are used.
# - 8PAD, (3): Octal mode. Eight pads are used.
# Possible options: <1PAD, 2PAD, 4PAD, 8PAD>
NUM_PADS: 1PAD
# --------------------------------------===== OPERATION_CODE [Optional] =====---------------------------------------
# Description: Offset: 10b, Width: 6b, Instruction operation code.
# - STOP, (0): Stop execution and de-assert CS. Then, the next command sequence (to the same flash device) starts
# from instruction pointer 0.
# - CMD_SDR, (1): Transmit command code to Flash.
# - RADDR_SDR, (2): Transmit row address to Flash.
# - CADDR_SDR, (3): Transmit column address to Flash.
# - MODE1_SDR, (4): Transmit mode bits to Flash.
# - MODE2_SDR, (5): Transmit mode bits to Flash.
# - MODE4_SDR, (6): Transmit mode bits to Flash.
# - MODE8_SDR, (7): Transmit mode bits to Flash.
# - WRITE_SDR, (8): Transmit program data to Flash device.
# - READ_SDR, (9): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_SDR, (10): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_SDR, (11): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_SDR, (12): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_SDR, (13): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# - JMP_ON_CS, (31): Stop execution, de-assert CS and save operand[7:0] as the instruction start pointer for next
# sequence.Normally this instruction is used to support Execute-In-Place enhanced mode. See XIP enhanced mode for
# more details.This instruction is only allowed for AHB read commands. There is interrupt status bit set
# (INTR[IPCMDERR] or INTR[AHBCMDERR]) when using this instruction in IP command or AHB write command.
# - CMD_DDR, (33): Transmit command code to Flash.
# - RADDR_DDR, (34): Transmit row address to Flash.
# - CADDR_DDR, (35): Transmit column address to Flash.
# - MODE1_DDR, (36): Transmit mode bits to Flash.
# - MODE2_DDR, (37): Transmit mode bits to Flash.
# - MODE4_DDR, (38): Transmit mode bits to Flash.
# - MODE8_DDR, (39): Transmit mode bits to Flash.
# - WRITE_DDR, (40): Transmit program data to Flash device.
# - READ_DDR, (41): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_DDR, (42): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_DDR, (43): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_DDR, (44): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_DDR, (45): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# Possible options: <STOP, CMD_SDR, RADDR_SDR, CADDR_SDR, MODE1_SDR, MODE2_SDR, MODE4_SDR, MODE8_SDR, WRITE_SDR,
# READ_SDR, LEARN_SDR, DATSZ_SDR, DUMMY_SDR, DUMMY_RWDS_SDR, JMP_ON_CS, CMD_DDR, RADDR_DDR, CADDR_DDR, MODE1_DDR,
# MODE2_DDR, MODE4_DDR, MODE8_DDR, WRITE_DDR, READ_DDR, LEARN_DDR, DATSZ_DDR, DUMMY_DDR, DUMMY_RWDS_DDR>
OPERATION_CODE: STOP
lookupTable_seq4_instr1:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq4_instr2:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq4_instr3:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq4_instr4:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq4_instr5:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq4_instr6:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq4_instr7:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
# -----------------------------------===== lookupTable_seq5_instr0 [Optional] =====-----------------------------------
# Description: Offset: 0x000000D0, Width: 16b; Lookup table holds Flash command sequences 5, instruction 0
lookupTable_seq5_instr0:
# ------------------------------------------===== OPERAND [Optional] =====------------------------------------------
# Description: Offset: 0b, Width: 8b, Instruction operand. Its values depends on used instruction
OPERAND: 0
# -----------------------------------------===== NUM_PADS [Optional] =====------------------------------------------
# Description: Offset: 8b, Width: 2b, Number of pads used by instruction. Some instructions ignores this parameter.
# - 1PAD, (0): Single mode. One pad is used.
# - 2PAD, (1): Dual mode. Two pads are used.
# - 4PAD, (2): Quad mode. Four pads are used.
# - 8PAD, (3): Octal mode. Eight pads are used.
# Possible options: <1PAD, 2PAD, 4PAD, 8PAD>
NUM_PADS: 1PAD
# --------------------------------------===== OPERATION_CODE [Optional] =====---------------------------------------
# Description: Offset: 10b, Width: 6b, Instruction operation code.
# - STOP, (0): Stop execution and de-assert CS. Then, the next command sequence (to the same flash device) starts
# from instruction pointer 0.
# - CMD_SDR, (1): Transmit command code to Flash.
# - RADDR_SDR, (2): Transmit row address to Flash.
# - CADDR_SDR, (3): Transmit column address to Flash.
# - MODE1_SDR, (4): Transmit mode bits to Flash.
# - MODE2_SDR, (5): Transmit mode bits to Flash.
# - MODE4_SDR, (6): Transmit mode bits to Flash.
# - MODE8_SDR, (7): Transmit mode bits to Flash.
# - WRITE_SDR, (8): Transmit program data to Flash device.
# - READ_SDR, (9): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_SDR, (10): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_SDR, (11): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_SDR, (12): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_SDR, (13): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# - JMP_ON_CS, (31): Stop execution, de-assert CS and save operand[7:0] as the instruction start pointer for next
# sequence.Normally this instruction is used to support Execute-In-Place enhanced mode. See XIP enhanced mode for
# more details.This instruction is only allowed for AHB read commands. There is interrupt status bit set
# (INTR[IPCMDERR] or INTR[AHBCMDERR]) when using this instruction in IP command or AHB write command.
# - CMD_DDR, (33): Transmit command code to Flash.
# - RADDR_DDR, (34): Transmit row address to Flash.
# - CADDR_DDR, (35): Transmit column address to Flash.
# - MODE1_DDR, (36): Transmit mode bits to Flash.
# - MODE2_DDR, (37): Transmit mode bits to Flash.
# - MODE4_DDR, (38): Transmit mode bits to Flash.
# - MODE8_DDR, (39): Transmit mode bits to Flash.
# - WRITE_DDR, (40): Transmit program data to Flash device.
# - READ_DDR, (41): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_DDR, (42): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_DDR, (43): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_DDR, (44): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_DDR, (45): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# Possible options: <STOP, CMD_SDR, RADDR_SDR, CADDR_SDR, MODE1_SDR, MODE2_SDR, MODE4_SDR, MODE8_SDR, WRITE_SDR,
# READ_SDR, LEARN_SDR, DATSZ_SDR, DUMMY_SDR, DUMMY_RWDS_SDR, JMP_ON_CS, CMD_DDR, RADDR_DDR, CADDR_DDR, MODE1_DDR,
# MODE2_DDR, MODE4_DDR, MODE8_DDR, WRITE_DDR, READ_DDR, LEARN_DDR, DATSZ_DDR, DUMMY_DDR, DUMMY_RWDS_DDR>
OPERATION_CODE: STOP
lookupTable_seq5_instr1:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq5_instr2:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq5_instr3:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq5_instr4:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq5_instr5:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq5_instr6:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq5_instr7:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
# -----------------------------------===== lookupTable_seq6_instr0 [Optional] =====-----------------------------------
# Description: Offset: 0x000000E0, Width: 16b; Lookup table holds Flash command sequences 6, instruction 0
lookupTable_seq6_instr0:
# ------------------------------------------===== OPERAND [Optional] =====------------------------------------------
# Description: Offset: 0b, Width: 8b, Instruction operand. Its values depends on used instruction
OPERAND: 0
# -----------------------------------------===== NUM_PADS [Optional] =====------------------------------------------
# Description: Offset: 8b, Width: 2b, Number of pads used by instruction. Some instructions ignores this parameter.
# - 1PAD, (0): Single mode. One pad is used.
# - 2PAD, (1): Dual mode. Two pads are used.
# - 4PAD, (2): Quad mode. Four pads are used.
# - 8PAD, (3): Octal mode. Eight pads are used.
# Possible options: <1PAD, 2PAD, 4PAD, 8PAD>
NUM_PADS: 1PAD
# --------------------------------------===== OPERATION_CODE [Optional] =====---------------------------------------
# Description: Offset: 10b, Width: 6b, Instruction operation code.
# - STOP, (0): Stop execution and de-assert CS. Then, the next command sequence (to the same flash device) starts
# from instruction pointer 0.
# - CMD_SDR, (1): Transmit command code to Flash.
# - RADDR_SDR, (2): Transmit row address to Flash.
# - CADDR_SDR, (3): Transmit column address to Flash.
# - MODE1_SDR, (4): Transmit mode bits to Flash.
# - MODE2_SDR, (5): Transmit mode bits to Flash.
# - MODE4_SDR, (6): Transmit mode bits to Flash.
# - MODE8_SDR, (7): Transmit mode bits to Flash.
# - WRITE_SDR, (8): Transmit program data to Flash device.
# - READ_SDR, (9): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_SDR, (10): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_SDR, (11): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_SDR, (12): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_SDR, (13): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# - JMP_ON_CS, (31): Stop execution, de-assert CS and save operand[7:0] as the instruction start pointer for next
# sequence.Normally this instruction is used to support Execute-In-Place enhanced mode. See XIP enhanced mode for
# more details.This instruction is only allowed for AHB read commands. There is interrupt status bit set
# (INTR[IPCMDERR] or INTR[AHBCMDERR]) when using this instruction in IP command or AHB write command.
# - CMD_DDR, (33): Transmit command code to Flash.
# - RADDR_DDR, (34): Transmit row address to Flash.
# - CADDR_DDR, (35): Transmit column address to Flash.
# - MODE1_DDR, (36): Transmit mode bits to Flash.
# - MODE2_DDR, (37): Transmit mode bits to Flash.
# - MODE4_DDR, (38): Transmit mode bits to Flash.
# - MODE8_DDR, (39): Transmit mode bits to Flash.
# - WRITE_DDR, (40): Transmit program data to Flash device.
# - READ_DDR, (41): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_DDR, (42): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_DDR, (43): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_DDR, (44): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_DDR, (45): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# Possible options: <STOP, CMD_SDR, RADDR_SDR, CADDR_SDR, MODE1_SDR, MODE2_SDR, MODE4_SDR, MODE8_SDR, WRITE_SDR,
# READ_SDR, LEARN_SDR, DATSZ_SDR, DUMMY_SDR, DUMMY_RWDS_SDR, JMP_ON_CS, CMD_DDR, RADDR_DDR, CADDR_DDR, MODE1_DDR,
# MODE2_DDR, MODE4_DDR, MODE8_DDR, WRITE_DDR, READ_DDR, LEARN_DDR, DATSZ_DDR, DUMMY_DDR, DUMMY_RWDS_DDR>
OPERATION_CODE: STOP
lookupTable_seq6_instr1:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq6_instr2:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq6_instr3:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq6_instr4:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq6_instr5:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq6_instr6:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq6_instr7:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
# -----------------------------------===== lookupTable_seq7_instr0 [Optional] =====-----------------------------------
# Description: Offset: 0x000000F0, Width: 16b; Lookup table holds Flash command sequences 7, instruction 0
lookupTable_seq7_instr0:
# ------------------------------------------===== OPERAND [Optional] =====------------------------------------------
# Description: Offset: 0b, Width: 8b, Instruction operand. Its values depends on used instruction
OPERAND: 0
# -----------------------------------------===== NUM_PADS [Optional] =====------------------------------------------
# Description: Offset: 8b, Width: 2b, Number of pads used by instruction. Some instructions ignores this parameter.
# - 1PAD, (0): Single mode. One pad is used.
# - 2PAD, (1): Dual mode. Two pads are used.
# - 4PAD, (2): Quad mode. Four pads are used.
# - 8PAD, (3): Octal mode. Eight pads are used.
# Possible options: <1PAD, 2PAD, 4PAD, 8PAD>
NUM_PADS: 1PAD
# --------------------------------------===== OPERATION_CODE [Optional] =====---------------------------------------
# Description: Offset: 10b, Width: 6b, Instruction operation code.
# - STOP, (0): Stop execution and de-assert CS. Then, the next command sequence (to the same flash device) starts
# from instruction pointer 0.
# - CMD_SDR, (1): Transmit command code to Flash.
# - RADDR_SDR, (2): Transmit row address to Flash.
# - CADDR_SDR, (3): Transmit column address to Flash.
# - MODE1_SDR, (4): Transmit mode bits to Flash.
# - MODE2_SDR, (5): Transmit mode bits to Flash.
# - MODE4_SDR, (6): Transmit mode bits to Flash.
# - MODE8_SDR, (7): Transmit mode bits to Flash.
# - WRITE_SDR, (8): Transmit program data to Flash device.
# - READ_SDR, (9): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_SDR, (10): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_SDR, (11): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_SDR, (12): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_SDR, (13): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# - JMP_ON_CS, (31): Stop execution, de-assert CS and save operand[7:0] as the instruction start pointer for next
# sequence.Normally this instruction is used to support Execute-In-Place enhanced mode. See XIP enhanced mode for
# more details.This instruction is only allowed for AHB read commands. There is interrupt status bit set
# (INTR[IPCMDERR] or INTR[AHBCMDERR]) when using this instruction in IP command or AHB write command.
# - CMD_DDR, (33): Transmit command code to Flash.
# - RADDR_DDR, (34): Transmit row address to Flash.
# - CADDR_DDR, (35): Transmit column address to Flash.
# - MODE1_DDR, (36): Transmit mode bits to Flash.
# - MODE2_DDR, (37): Transmit mode bits to Flash.
# - MODE4_DDR, (38): Transmit mode bits to Flash.
# - MODE8_DDR, (39): Transmit mode bits to Flash.
# - WRITE_DDR, (40): Transmit program data to Flash device.
# - READ_DDR, (41): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_DDR, (42): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_DDR, (43): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_DDR, (44): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_DDR, (45): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# Possible options: <STOP, CMD_SDR, RADDR_SDR, CADDR_SDR, MODE1_SDR, MODE2_SDR, MODE4_SDR, MODE8_SDR, WRITE_SDR,
# READ_SDR, LEARN_SDR, DATSZ_SDR, DUMMY_SDR, DUMMY_RWDS_SDR, JMP_ON_CS, CMD_DDR, RADDR_DDR, CADDR_DDR, MODE1_DDR,
# MODE2_DDR, MODE4_DDR, MODE8_DDR, WRITE_DDR, READ_DDR, LEARN_DDR, DATSZ_DDR, DUMMY_DDR, DUMMY_RWDS_DDR>
OPERATION_CODE: STOP
lookupTable_seq7_instr1:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq7_instr2:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq7_instr3:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq7_instr4:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq7_instr5:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq7_instr6:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq7_instr7:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
# -----------------------------------===== lookupTable_seq8_instr0 [Optional] =====-----------------------------------
# Description: Offset: 0x00000100, Width: 16b; Lookup table holds Flash command sequences 8, instruction 0
lookupTable_seq8_instr0:
# ------------------------------------------===== OPERAND [Optional] =====------------------------------------------
# Description: Offset: 0b, Width: 8b, Instruction operand. Its values depends on used instruction
OPERAND: 0
# -----------------------------------------===== NUM_PADS [Optional] =====------------------------------------------
# Description: Offset: 8b, Width: 2b, Number of pads used by instruction. Some instructions ignores this parameter.
# - 1PAD, (0): Single mode. One pad is used.
# - 2PAD, (1): Dual mode. Two pads are used.
# - 4PAD, (2): Quad mode. Four pads are used.
# - 8PAD, (3): Octal mode. Eight pads are used.
# Possible options: <1PAD, 2PAD, 4PAD, 8PAD>
NUM_PADS: 1PAD
# --------------------------------------===== OPERATION_CODE [Optional] =====---------------------------------------
# Description: Offset: 10b, Width: 6b, Instruction operation code.
# - STOP, (0): Stop execution and de-assert CS. Then, the next command sequence (to the same flash device) starts
# from instruction pointer 0.
# - CMD_SDR, (1): Transmit command code to Flash.
# - RADDR_SDR, (2): Transmit row address to Flash.
# - CADDR_SDR, (3): Transmit column address to Flash.
# - MODE1_SDR, (4): Transmit mode bits to Flash.
# - MODE2_SDR, (5): Transmit mode bits to Flash.
# - MODE4_SDR, (6): Transmit mode bits to Flash.
# - MODE8_SDR, (7): Transmit mode bits to Flash.
# - WRITE_SDR, (8): Transmit program data to Flash device.
# - READ_SDR, (9): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_SDR, (10): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_SDR, (11): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_SDR, (12): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_SDR, (13): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# - JMP_ON_CS, (31): Stop execution, de-assert CS and save operand[7:0] as the instruction start pointer for next
# sequence.Normally this instruction is used to support Execute-In-Place enhanced mode. See XIP enhanced mode for
# more details.This instruction is only allowed for AHB read commands. There is interrupt status bit set
# (INTR[IPCMDERR] or INTR[AHBCMDERR]) when using this instruction in IP command or AHB write command.
# - CMD_DDR, (33): Transmit command code to Flash.
# - RADDR_DDR, (34): Transmit row address to Flash.
# - CADDR_DDR, (35): Transmit column address to Flash.
# - MODE1_DDR, (36): Transmit mode bits to Flash.
# - MODE2_DDR, (37): Transmit mode bits to Flash.
# - MODE4_DDR, (38): Transmit mode bits to Flash.
# - MODE8_DDR, (39): Transmit mode bits to Flash.
# - WRITE_DDR, (40): Transmit program data to Flash device.
# - READ_DDR, (41): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_DDR, (42): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_DDR, (43): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_DDR, (44): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_DDR, (45): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# Possible options: <STOP, CMD_SDR, RADDR_SDR, CADDR_SDR, MODE1_SDR, MODE2_SDR, MODE4_SDR, MODE8_SDR, WRITE_SDR,
# READ_SDR, LEARN_SDR, DATSZ_SDR, DUMMY_SDR, DUMMY_RWDS_SDR, JMP_ON_CS, CMD_DDR, RADDR_DDR, CADDR_DDR, MODE1_DDR,
# MODE2_DDR, MODE4_DDR, MODE8_DDR, WRITE_DDR, READ_DDR, LEARN_DDR, DATSZ_DDR, DUMMY_DDR, DUMMY_RWDS_DDR>
OPERATION_CODE: STOP
lookupTable_seq8_instr1:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq8_instr2:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq8_instr3:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq8_instr4:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq8_instr5:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq8_instr6:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq8_instr7:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
# -----------------------------------===== lookupTable_seq9_instr0 [Optional] =====-----------------------------------
# Description: Offset: 0x00000110, Width: 16b; Lookup table holds Flash command sequences 9, instruction 0
lookupTable_seq9_instr0:
# ------------------------------------------===== OPERAND [Optional] =====------------------------------------------
# Description: Offset: 0b, Width: 8b, Instruction operand. Its values depends on used instruction
OPERAND: 0
# -----------------------------------------===== NUM_PADS [Optional] =====------------------------------------------
# Description: Offset: 8b, Width: 2b, Number of pads used by instruction. Some instructions ignores this parameter.
# - 1PAD, (0): Single mode. One pad is used.
# - 2PAD, (1): Dual mode. Two pads are used.
# - 4PAD, (2): Quad mode. Four pads are used.
# - 8PAD, (3): Octal mode. Eight pads are used.
# Possible options: <1PAD, 2PAD, 4PAD, 8PAD>
NUM_PADS: 1PAD
# --------------------------------------===== OPERATION_CODE [Optional] =====---------------------------------------
# Description: Offset: 10b, Width: 6b, Instruction operation code.
# - STOP, (0): Stop execution and de-assert CS. Then, the next command sequence (to the same flash device) starts
# from instruction pointer 0.
# - CMD_SDR, (1): Transmit command code to Flash.
# - RADDR_SDR, (2): Transmit row address to Flash.
# - CADDR_SDR, (3): Transmit column address to Flash.
# - MODE1_SDR, (4): Transmit mode bits to Flash.
# - MODE2_SDR, (5): Transmit mode bits to Flash.
# - MODE4_SDR, (6): Transmit mode bits to Flash.
# - MODE8_SDR, (7): Transmit mode bits to Flash.
# - WRITE_SDR, (8): Transmit program data to Flash device.
# - READ_SDR, (9): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_SDR, (10): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_SDR, (11): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_SDR, (12): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_SDR, (13): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# - JMP_ON_CS, (31): Stop execution, de-assert CS and save operand[7:0] as the instruction start pointer for next
# sequence.Normally this instruction is used to support Execute-In-Place enhanced mode. See XIP enhanced mode for
# more details.This instruction is only allowed for AHB read commands. There is interrupt status bit set
# (INTR[IPCMDERR] or INTR[AHBCMDERR]) when using this instruction in IP command or AHB write command.
# - CMD_DDR, (33): Transmit command code to Flash.
# - RADDR_DDR, (34): Transmit row address to Flash.
# - CADDR_DDR, (35): Transmit column address to Flash.
# - MODE1_DDR, (36): Transmit mode bits to Flash.
# - MODE2_DDR, (37): Transmit mode bits to Flash.
# - MODE4_DDR, (38): Transmit mode bits to Flash.
# - MODE8_DDR, (39): Transmit mode bits to Flash.
# - WRITE_DDR, (40): Transmit program data to Flash device.
# - READ_DDR, (41): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_DDR, (42): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_DDR, (43): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_DDR, (44): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_DDR, (45): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# Possible options: <STOP, CMD_SDR, RADDR_SDR, CADDR_SDR, MODE1_SDR, MODE2_SDR, MODE4_SDR, MODE8_SDR, WRITE_SDR,
# READ_SDR, LEARN_SDR, DATSZ_SDR, DUMMY_SDR, DUMMY_RWDS_SDR, JMP_ON_CS, CMD_DDR, RADDR_DDR, CADDR_DDR, MODE1_DDR,
# MODE2_DDR, MODE4_DDR, MODE8_DDR, WRITE_DDR, READ_DDR, LEARN_DDR, DATSZ_DDR, DUMMY_DDR, DUMMY_RWDS_DDR>
OPERATION_CODE: STOP
lookupTable_seq9_instr1:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq9_instr2:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq9_instr3:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq9_instr4:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq9_instr5:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq9_instr6:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq9_instr7:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
# ----------------------------------===== lookupTable_seq10_instr0 [Optional] =====-----------------------------------
# Description: Offset: 0x00000120, Width: 16b; Lookup table holds Flash command sequences 10, instruction 0
lookupTable_seq10_instr0:
# ------------------------------------------===== OPERAND [Optional] =====------------------------------------------
# Description: Offset: 0b, Width: 8b, Instruction operand. Its values depends on used instruction
OPERAND: 0
# -----------------------------------------===== NUM_PADS [Optional] =====------------------------------------------
# Description: Offset: 8b, Width: 2b, Number of pads used by instruction. Some instructions ignores this parameter.
# - 1PAD, (0): Single mode. One pad is used.
# - 2PAD, (1): Dual mode. Two pads are used.
# - 4PAD, (2): Quad mode. Four pads are used.
# - 8PAD, (3): Octal mode. Eight pads are used.
# Possible options: <1PAD, 2PAD, 4PAD, 8PAD>
NUM_PADS: 1PAD
# --------------------------------------===== OPERATION_CODE [Optional] =====---------------------------------------
# Description: Offset: 10b, Width: 6b, Instruction operation code.
# - STOP, (0): Stop execution and de-assert CS. Then, the next command sequence (to the same flash device) starts
# from instruction pointer 0.
# - CMD_SDR, (1): Transmit command code to Flash.
# - RADDR_SDR, (2): Transmit row address to Flash.
# - CADDR_SDR, (3): Transmit column address to Flash.
# - MODE1_SDR, (4): Transmit mode bits to Flash.
# - MODE2_SDR, (5): Transmit mode bits to Flash.
# - MODE4_SDR, (6): Transmit mode bits to Flash.
# - MODE8_SDR, (7): Transmit mode bits to Flash.
# - WRITE_SDR, (8): Transmit program data to Flash device.
# - READ_SDR, (9): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_SDR, (10): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_SDR, (11): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_SDR, (12): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_SDR, (13): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# - JMP_ON_CS, (31): Stop execution, de-assert CS and save operand[7:0] as the instruction start pointer for next
# sequence.Normally this instruction is used to support Execute-In-Place enhanced mode. See XIP enhanced mode for
# more details.This instruction is only allowed for AHB read commands. There is interrupt status bit set
# (INTR[IPCMDERR] or INTR[AHBCMDERR]) when using this instruction in IP command or AHB write command.
# - CMD_DDR, (33): Transmit command code to Flash.
# - RADDR_DDR, (34): Transmit row address to Flash.
# - CADDR_DDR, (35): Transmit column address to Flash.
# - MODE1_DDR, (36): Transmit mode bits to Flash.
# - MODE2_DDR, (37): Transmit mode bits to Flash.
# - MODE4_DDR, (38): Transmit mode bits to Flash.
# - MODE8_DDR, (39): Transmit mode bits to Flash.
# - WRITE_DDR, (40): Transmit program data to Flash device.
# - READ_DDR, (41): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_DDR, (42): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_DDR, (43): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_DDR, (44): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_DDR, (45): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# Possible options: <STOP, CMD_SDR, RADDR_SDR, CADDR_SDR, MODE1_SDR, MODE2_SDR, MODE4_SDR, MODE8_SDR, WRITE_SDR,
# READ_SDR, LEARN_SDR, DATSZ_SDR, DUMMY_SDR, DUMMY_RWDS_SDR, JMP_ON_CS, CMD_DDR, RADDR_DDR, CADDR_DDR, MODE1_DDR,
# MODE2_DDR, MODE4_DDR, MODE8_DDR, WRITE_DDR, READ_DDR, LEARN_DDR, DATSZ_DDR, DUMMY_DDR, DUMMY_RWDS_DDR>
OPERATION_CODE: STOP
lookupTable_seq10_instr1:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq10_instr2:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq10_instr3:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq10_instr4:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq10_instr5:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq10_instr6:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq10_instr7:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
# ----------------------------------===== lookupTable_seq11_instr0 [Optional] =====-----------------------------------
# Description: Offset: 0x00000130, Width: 16b; Lookup table holds Flash command sequences 11, instruction 0
lookupTable_seq11_instr0:
# ------------------------------------------===== OPERAND [Optional] =====------------------------------------------
# Description: Offset: 0b, Width: 8b, Instruction operand. Its values depends on used instruction
OPERAND: 0
# -----------------------------------------===== NUM_PADS [Optional] =====------------------------------------------
# Description: Offset: 8b, Width: 2b, Number of pads used by instruction. Some instructions ignores this parameter.
# - 1PAD, (0): Single mode. One pad is used.
# - 2PAD, (1): Dual mode. Two pads are used.
# - 4PAD, (2): Quad mode. Four pads are used.
# - 8PAD, (3): Octal mode. Eight pads are used.
# Possible options: <1PAD, 2PAD, 4PAD, 8PAD>
NUM_PADS: 1PAD
# --------------------------------------===== OPERATION_CODE [Optional] =====---------------------------------------
# Description: Offset: 10b, Width: 6b, Instruction operation code.
# - STOP, (0): Stop execution and de-assert CS. Then, the next command sequence (to the same flash device) starts
# from instruction pointer 0.
# - CMD_SDR, (1): Transmit command code to Flash.
# - RADDR_SDR, (2): Transmit row address to Flash.
# - CADDR_SDR, (3): Transmit column address to Flash.
# - MODE1_SDR, (4): Transmit mode bits to Flash.
# - MODE2_SDR, (5): Transmit mode bits to Flash.
# - MODE4_SDR, (6): Transmit mode bits to Flash.
# - MODE8_SDR, (7): Transmit mode bits to Flash.
# - WRITE_SDR, (8): Transmit program data to Flash device.
# - READ_SDR, (9): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_SDR, (10): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_SDR, (11): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_SDR, (12): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_SDR, (13): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# - JMP_ON_CS, (31): Stop execution, de-assert CS and save operand[7:0] as the instruction start pointer for next
# sequence.Normally this instruction is used to support Execute-In-Place enhanced mode. See XIP enhanced mode for
# more details.This instruction is only allowed for AHB read commands. There is interrupt status bit set
# (INTR[IPCMDERR] or INTR[AHBCMDERR]) when using this instruction in IP command or AHB write command.
# - CMD_DDR, (33): Transmit command code to Flash.
# - RADDR_DDR, (34): Transmit row address to Flash.
# - CADDR_DDR, (35): Transmit column address to Flash.
# - MODE1_DDR, (36): Transmit mode bits to Flash.
# - MODE2_DDR, (37): Transmit mode bits to Flash.
# - MODE4_DDR, (38): Transmit mode bits to Flash.
# - MODE8_DDR, (39): Transmit mode bits to Flash.
# - WRITE_DDR, (40): Transmit program data to Flash device.
# - READ_DDR, (41): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_DDR, (42): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_DDR, (43): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_DDR, (44): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_DDR, (45): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# Possible options: <STOP, CMD_SDR, RADDR_SDR, CADDR_SDR, MODE1_SDR, MODE2_SDR, MODE4_SDR, MODE8_SDR, WRITE_SDR,
# READ_SDR, LEARN_SDR, DATSZ_SDR, DUMMY_SDR, DUMMY_RWDS_SDR, JMP_ON_CS, CMD_DDR, RADDR_DDR, CADDR_DDR, MODE1_DDR,
# MODE2_DDR, MODE4_DDR, MODE8_DDR, WRITE_DDR, READ_DDR, LEARN_DDR, DATSZ_DDR, DUMMY_DDR, DUMMY_RWDS_DDR>
OPERATION_CODE: STOP
lookupTable_seq11_instr1:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq11_instr2:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq11_instr3:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq11_instr4:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq11_instr5:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq11_instr6:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq11_instr7:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
# ----------------------------------===== lookupTable_seq12_instr0 [Optional] =====-----------------------------------
# Description: Offset: 0x00000140, Width: 16b; Lookup table holds Flash command sequences 12, instruction 0
lookupTable_seq12_instr0:
# ------------------------------------------===== OPERAND [Optional] =====------------------------------------------
# Description: Offset: 0b, Width: 8b, Instruction operand. Its values depends on used instruction
OPERAND: 0
# -----------------------------------------===== NUM_PADS [Optional] =====------------------------------------------
# Description: Offset: 8b, Width: 2b, Number of pads used by instruction. Some instructions ignores this parameter.
# - 1PAD, (0): Single mode. One pad is used.
# - 2PAD, (1): Dual mode. Two pads are used.
# - 4PAD, (2): Quad mode. Four pads are used.
# - 8PAD, (3): Octal mode. Eight pads are used.
# Possible options: <1PAD, 2PAD, 4PAD, 8PAD>
NUM_PADS: 1PAD
# --------------------------------------===== OPERATION_CODE [Optional] =====---------------------------------------
# Description: Offset: 10b, Width: 6b, Instruction operation code.
# - STOP, (0): Stop execution and de-assert CS. Then, the next command sequence (to the same flash device) starts
# from instruction pointer 0.
# - CMD_SDR, (1): Transmit command code to Flash.
# - RADDR_SDR, (2): Transmit row address to Flash.
# - CADDR_SDR, (3): Transmit column address to Flash.
# - MODE1_SDR, (4): Transmit mode bits to Flash.
# - MODE2_SDR, (5): Transmit mode bits to Flash.
# - MODE4_SDR, (6): Transmit mode bits to Flash.
# - MODE8_SDR, (7): Transmit mode bits to Flash.
# - WRITE_SDR, (8): Transmit program data to Flash device.
# - READ_SDR, (9): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_SDR, (10): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_SDR, (11): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_SDR, (12): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_SDR, (13): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# - JMP_ON_CS, (31): Stop execution, de-assert CS and save operand[7:0] as the instruction start pointer for next
# sequence.Normally this instruction is used to support Execute-In-Place enhanced mode. See XIP enhanced mode for
# more details.This instruction is only allowed for AHB read commands. There is interrupt status bit set
# (INTR[IPCMDERR] or INTR[AHBCMDERR]) when using this instruction in IP command or AHB write command.
# - CMD_DDR, (33): Transmit command code to Flash.
# - RADDR_DDR, (34): Transmit row address to Flash.
# - CADDR_DDR, (35): Transmit column address to Flash.
# - MODE1_DDR, (36): Transmit mode bits to Flash.
# - MODE2_DDR, (37): Transmit mode bits to Flash.
# - MODE4_DDR, (38): Transmit mode bits to Flash.
# - MODE8_DDR, (39): Transmit mode bits to Flash.
# - WRITE_DDR, (40): Transmit program data to Flash device.
# - READ_DDR, (41): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_DDR, (42): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_DDR, (43): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_DDR, (44): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_DDR, (45): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# Possible options: <STOP, CMD_SDR, RADDR_SDR, CADDR_SDR, MODE1_SDR, MODE2_SDR, MODE4_SDR, MODE8_SDR, WRITE_SDR,
# READ_SDR, LEARN_SDR, DATSZ_SDR, DUMMY_SDR, DUMMY_RWDS_SDR, JMP_ON_CS, CMD_DDR, RADDR_DDR, CADDR_DDR, MODE1_DDR,
# MODE2_DDR, MODE4_DDR, MODE8_DDR, WRITE_DDR, READ_DDR, LEARN_DDR, DATSZ_DDR, DUMMY_DDR, DUMMY_RWDS_DDR>
OPERATION_CODE: STOP
lookupTable_seq12_instr1:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq12_instr2:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq12_instr3:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq12_instr4:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq12_instr5:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq12_instr6:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq12_instr7:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
# ----------------------------------===== lookupTable_seq13_instr0 [Optional] =====-----------------------------------
# Description: Offset: 0x00000150, Width: 16b; Lookup table holds Flash command sequences 13, instruction 0
lookupTable_seq13_instr0:
# ------------------------------------------===== OPERAND [Optional] =====------------------------------------------
# Description: Offset: 0b, Width: 8b, Instruction operand. Its values depends on used instruction
OPERAND: 0
# -----------------------------------------===== NUM_PADS [Optional] =====------------------------------------------
# Description: Offset: 8b, Width: 2b, Number of pads used by instruction. Some instructions ignores this parameter.
# - 1PAD, (0): Single mode. One pad is used.
# - 2PAD, (1): Dual mode. Two pads are used.
# - 4PAD, (2): Quad mode. Four pads are used.
# - 8PAD, (3): Octal mode. Eight pads are used.
# Possible options: <1PAD, 2PAD, 4PAD, 8PAD>
NUM_PADS: 1PAD
# --------------------------------------===== OPERATION_CODE [Optional] =====---------------------------------------
# Description: Offset: 10b, Width: 6b, Instruction operation code.
# - STOP, (0): Stop execution and de-assert CS. Then, the next command sequence (to the same flash device) starts
# from instruction pointer 0.
# - CMD_SDR, (1): Transmit command code to Flash.
# - RADDR_SDR, (2): Transmit row address to Flash.
# - CADDR_SDR, (3): Transmit column address to Flash.
# - MODE1_SDR, (4): Transmit mode bits to Flash.
# - MODE2_SDR, (5): Transmit mode bits to Flash.
# - MODE4_SDR, (6): Transmit mode bits to Flash.
# - MODE8_SDR, (7): Transmit mode bits to Flash.
# - WRITE_SDR, (8): Transmit program data to Flash device.
# - READ_SDR, (9): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_SDR, (10): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_SDR, (11): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_SDR, (12): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_SDR, (13): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# - JMP_ON_CS, (31): Stop execution, de-assert CS and save operand[7:0] as the instruction start pointer for next
# sequence.Normally this instruction is used to support Execute-In-Place enhanced mode. See XIP enhanced mode for
# more details.This instruction is only allowed for AHB read commands. There is interrupt status bit set
# (INTR[IPCMDERR] or INTR[AHBCMDERR]) when using this instruction in IP command or AHB write command.
# - CMD_DDR, (33): Transmit command code to Flash.
# - RADDR_DDR, (34): Transmit row address to Flash.
# - CADDR_DDR, (35): Transmit column address to Flash.
# - MODE1_DDR, (36): Transmit mode bits to Flash.
# - MODE2_DDR, (37): Transmit mode bits to Flash.
# - MODE4_DDR, (38): Transmit mode bits to Flash.
# - MODE8_DDR, (39): Transmit mode bits to Flash.
# - WRITE_DDR, (40): Transmit program data to Flash device.
# - READ_DDR, (41): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_DDR, (42): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_DDR, (43): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_DDR, (44): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_DDR, (45): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# Possible options: <STOP, CMD_SDR, RADDR_SDR, CADDR_SDR, MODE1_SDR, MODE2_SDR, MODE4_SDR, MODE8_SDR, WRITE_SDR,
# READ_SDR, LEARN_SDR, DATSZ_SDR, DUMMY_SDR, DUMMY_RWDS_SDR, JMP_ON_CS, CMD_DDR, RADDR_DDR, CADDR_DDR, MODE1_DDR,
# MODE2_DDR, MODE4_DDR, MODE8_DDR, WRITE_DDR, READ_DDR, LEARN_DDR, DATSZ_DDR, DUMMY_DDR, DUMMY_RWDS_DDR>
OPERATION_CODE: STOP
lookupTable_seq13_instr1:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq13_instr2:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq13_instr3:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq13_instr4:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq13_instr5:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq13_instr6:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq13_instr7:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
# ----------------------------------===== lookupTable_seq14_instr0 [Optional] =====-----------------------------------
# Description: Offset: 0x00000160, Width: 16b; Lookup table holds Flash command sequences 14, instruction 0
lookupTable_seq14_instr0:
# ------------------------------------------===== OPERAND [Optional] =====------------------------------------------
# Description: Offset: 0b, Width: 8b, Instruction operand. Its values depends on used instruction
OPERAND: 0
# -----------------------------------------===== NUM_PADS [Optional] =====------------------------------------------
# Description: Offset: 8b, Width: 2b, Number of pads used by instruction. Some instructions ignores this parameter.
# - 1PAD, (0): Single mode. One pad is used.
# - 2PAD, (1): Dual mode. Two pads are used.
# - 4PAD, (2): Quad mode. Four pads are used.
# - 8PAD, (3): Octal mode. Eight pads are used.
# Possible options: <1PAD, 2PAD, 4PAD, 8PAD>
NUM_PADS: 1PAD
# --------------------------------------===== OPERATION_CODE [Optional] =====---------------------------------------
# Description: Offset: 10b, Width: 6b, Instruction operation code.
# - STOP, (0): Stop execution and de-assert CS. Then, the next command sequence (to the same flash device) starts
# from instruction pointer 0.
# - CMD_SDR, (1): Transmit command code to Flash.
# - RADDR_SDR, (2): Transmit row address to Flash.
# - CADDR_SDR, (3): Transmit column address to Flash.
# - MODE1_SDR, (4): Transmit mode bits to Flash.
# - MODE2_SDR, (5): Transmit mode bits to Flash.
# - MODE4_SDR, (6): Transmit mode bits to Flash.
# - MODE8_SDR, (7): Transmit mode bits to Flash.
# - WRITE_SDR, (8): Transmit program data to Flash device.
# - READ_SDR, (9): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_SDR, (10): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_SDR, (11): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_SDR, (12): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_SDR, (13): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# - JMP_ON_CS, (31): Stop execution, de-assert CS and save operand[7:0] as the instruction start pointer for next
# sequence.Normally this instruction is used to support Execute-In-Place enhanced mode. See XIP enhanced mode for
# more details.This instruction is only allowed for AHB read commands. There is interrupt status bit set
# (INTR[IPCMDERR] or INTR[AHBCMDERR]) when using this instruction in IP command or AHB write command.
# - CMD_DDR, (33): Transmit command code to Flash.
# - RADDR_DDR, (34): Transmit row address to Flash.
# - CADDR_DDR, (35): Transmit column address to Flash.
# - MODE1_DDR, (36): Transmit mode bits to Flash.
# - MODE2_DDR, (37): Transmit mode bits to Flash.
# - MODE4_DDR, (38): Transmit mode bits to Flash.
# - MODE8_DDR, (39): Transmit mode bits to Flash.
# - WRITE_DDR, (40): Transmit program data to Flash device.
# - READ_DDR, (41): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_DDR, (42): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_DDR, (43): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_DDR, (44): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_DDR, (45): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# Possible options: <STOP, CMD_SDR, RADDR_SDR, CADDR_SDR, MODE1_SDR, MODE2_SDR, MODE4_SDR, MODE8_SDR, WRITE_SDR,
# READ_SDR, LEARN_SDR, DATSZ_SDR, DUMMY_SDR, DUMMY_RWDS_SDR, JMP_ON_CS, CMD_DDR, RADDR_DDR, CADDR_DDR, MODE1_DDR,
# MODE2_DDR, MODE4_DDR, MODE8_DDR, WRITE_DDR, READ_DDR, LEARN_DDR, DATSZ_DDR, DUMMY_DDR, DUMMY_RWDS_DDR>
OPERATION_CODE: STOP
lookupTable_seq14_instr1:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq14_instr2:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq14_instr3:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq14_instr4:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq14_instr5:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq14_instr6:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq14_instr7:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
# ----------------------------------===== lookupTable_seq15_instr0 [Optional] =====-----------------------------------
# Description: Offset: 0x00000170, Width: 16b; Lookup table holds Flash command sequences 15, instruction 0
lookupTable_seq15_instr0:
# ------------------------------------------===== OPERAND [Optional] =====------------------------------------------
# Description: Offset: 0b, Width: 8b, Instruction operand. Its values depends on used instruction
OPERAND: 0
# -----------------------------------------===== NUM_PADS [Optional] =====------------------------------------------
# Description: Offset: 8b, Width: 2b, Number of pads used by instruction. Some instructions ignores this parameter.
# - 1PAD, (0): Single mode. One pad is used.
# - 2PAD, (1): Dual mode. Two pads are used.
# - 4PAD, (2): Quad mode. Four pads are used.
# - 8PAD, (3): Octal mode. Eight pads are used.
# Possible options: <1PAD, 2PAD, 4PAD, 8PAD>
NUM_PADS: 1PAD
# --------------------------------------===== OPERATION_CODE [Optional] =====---------------------------------------
# Description: Offset: 10b, Width: 6b, Instruction operation code.
# - STOP, (0): Stop execution and de-assert CS. Then, the next command sequence (to the same flash device) starts
# from instruction pointer 0.
# - CMD_SDR, (1): Transmit command code to Flash.
# - RADDR_SDR, (2): Transmit row address to Flash.
# - CADDR_SDR, (3): Transmit column address to Flash.
# - MODE1_SDR, (4): Transmit mode bits to Flash.
# - MODE2_SDR, (5): Transmit mode bits to Flash.
# - MODE4_SDR, (6): Transmit mode bits to Flash.
# - MODE8_SDR, (7): Transmit mode bits to Flash.
# - WRITE_SDR, (8): Transmit program data to Flash device.
# - READ_SDR, (9): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_SDR, (10): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_SDR, (11): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_SDR, (12): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_SDR, (13): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# - JMP_ON_CS, (31): Stop execution, de-assert CS and save operand[7:0] as the instruction start pointer for next
# sequence.Normally this instruction is used to support Execute-In-Place enhanced mode. See XIP enhanced mode for
# more details.This instruction is only allowed for AHB read commands. There is interrupt status bit set
# (INTR[IPCMDERR] or INTR[AHBCMDERR]) when using this instruction in IP command or AHB write command.
# - CMD_DDR, (33): Transmit command code to Flash.
# - RADDR_DDR, (34): Transmit row address to Flash.
# - CADDR_DDR, (35): Transmit column address to Flash.
# - MODE1_DDR, (36): Transmit mode bits to Flash.
# - MODE2_DDR, (37): Transmit mode bits to Flash.
# - MODE4_DDR, (38): Transmit mode bits to Flash.
# - MODE8_DDR, (39): Transmit mode bits to Flash.
# - WRITE_DDR, (40): Transmit program data to Flash device.
# - READ_DDR, (41): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_DDR, (42): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_DDR, (43): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_DDR, (44): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_DDR, (45): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# Possible options: <STOP, CMD_SDR, RADDR_SDR, CADDR_SDR, MODE1_SDR, MODE2_SDR, MODE4_SDR, MODE8_SDR, WRITE_SDR,
# READ_SDR, LEARN_SDR, DATSZ_SDR, DUMMY_SDR, DUMMY_RWDS_SDR, JMP_ON_CS, CMD_DDR, RADDR_DDR, CADDR_DDR, MODE1_DDR,
# MODE2_DDR, MODE4_DDR, MODE8_DDR, WRITE_DDR, READ_DDR, LEARN_DDR, DATSZ_DDR, DUMMY_DDR, DUMMY_RWDS_DDR>
OPERATION_CODE: STOP
lookupTable_seq15_instr1:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq15_instr2:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq15_instr3:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq15_instr4:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq15_instr5:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq15_instr6:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq15_instr7:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
# ---------------------------------------===== lutCustomSeq_0 [Optional] =====----------------------------------------
# Description: Offset: 0x00000180, Width: 32b; [0x180-0x1af] Customizable LUT Sequences
lutCustomSeq_0:
# ------------------------------------------===== seqNum [Optional] =====-------------------------------------------
# Description: Offset: 0b, Width: 8b, Sequence Number, valid number: 1-16
seqNum: 0
# -------------------------------------------===== seqId [Optional] =====-------------------------------------------
# Description: Offset: 8b, Width: 8b, Sequence Index, valid number: 0-15
seqId: 0
# -----------------------------------------===== reserved [Optional] =====------------------------------------------
# Description: Offset: 16b, Width: 16b, N/A
reserved: 0
# ---------------------------------------===== lutCustomSeq_1 [Optional] =====----------------------------------------
# Description: Offset: 0x00000184, Width: 32b; [0x180-0x1af] Customizable LUT Sequences
lutCustomSeq_1:
# ------------------------------------------===== seqNum [Optional] =====-------------------------------------------
# Description: Offset: 0b, Width: 8b, Sequence Number, valid number: 1-16
seqNum: 0
# -------------------------------------------===== seqId [Optional] =====-------------------------------------------
# Description: Offset: 8b, Width: 8b, Sequence Index, valid number: 0-15
seqId: 0
# -----------------------------------------===== reserved [Optional] =====------------------------------------------
# Description: Offset: 16b, Width: 16b, N/A
reserved: 0
# ---------------------------------------===== lutCustomSeq_2 [Optional] =====----------------------------------------
# Description: Offset: 0x00000188, Width: 32b; [0x180-0x1af] Customizable LUT Sequences
lutCustomSeq_2:
# ------------------------------------------===== seqNum [Optional] =====-------------------------------------------
# Description: Offset: 0b, Width: 8b, Sequence Number, valid number: 1-16
seqNum: 0
# -------------------------------------------===== seqId [Optional] =====-------------------------------------------
# Description: Offset: 8b, Width: 8b, Sequence Index, valid number: 0-15
seqId: 0
# -----------------------------------------===== reserved [Optional] =====------------------------------------------
# Description: Offset: 16b, Width: 16b, N/A
reserved: 0
# ---------------------------------------===== lutCustomSeq_3 [Optional] =====----------------------------------------
# Description: Offset: 0x0000018C, Width: 32b; [0x180-0x1af] Customizable LUT Sequences
lutCustomSeq_3:
# ------------------------------------------===== seqNum [Optional] =====-------------------------------------------
# Description: Offset: 0b, Width: 8b, Sequence Number, valid number: 1-16
seqNum: 0
# -------------------------------------------===== seqId [Optional] =====-------------------------------------------
# Description: Offset: 8b, Width: 8b, Sequence Index, valid number: 0-15
seqId: 0
# -----------------------------------------===== reserved [Optional] =====------------------------------------------
# Description: Offset: 16b, Width: 16b, N/A
reserved: 0
# ---------------------------------------===== lutCustomSeq_4 [Optional] =====----------------------------------------
# Description: Offset: 0x00000190, Width: 32b; [0x180-0x1af] Customizable LUT Sequences
lutCustomSeq_4:
# ------------------------------------------===== seqNum [Optional] =====-------------------------------------------
# Description: Offset: 0b, Width: 8b, Sequence Number, valid number: 1-16
seqNum: 0
# -------------------------------------------===== seqId [Optional] =====-------------------------------------------
# Description: Offset: 8b, Width: 8b, Sequence Index, valid number: 0-15
seqId: 0
# -----------------------------------------===== reserved [Optional] =====------------------------------------------
# Description: Offset: 16b, Width: 16b, N/A
reserved: 0
# ---------------------------------------===== lutCustomSeq_5 [Optional] =====----------------------------------------
# Description: Offset: 0x00000194, Width: 32b; [0x180-0x1af] Customizable LUT Sequences
lutCustomSeq_5:
# ------------------------------------------===== seqNum [Optional] =====-------------------------------------------
# Description: Offset: 0b, Width: 8b, Sequence Number, valid number: 1-16
seqNum: 0
# -------------------------------------------===== seqId [Optional] =====-------------------------------------------
# Description: Offset: 8b, Width: 8b, Sequence Index, valid number: 0-15
seqId: 0
# -----------------------------------------===== reserved [Optional] =====------------------------------------------
# Description: Offset: 16b, Width: 16b, N/A
reserved: 0
# ---------------------------------------===== lutCustomSeq_6 [Optional] =====----------------------------------------
# Description: Offset: 0x00000198, Width: 32b; [0x180-0x1af] Customizable LUT Sequences
lutCustomSeq_6:
# ------------------------------------------===== seqNum [Optional] =====-------------------------------------------
# Description: Offset: 0b, Width: 8b, Sequence Number, valid number: 1-16
seqNum: 0
# -------------------------------------------===== seqId [Optional] =====-------------------------------------------
# Description: Offset: 8b, Width: 8b, Sequence Index, valid number: 0-15
seqId: 0
# -----------------------------------------===== reserved [Optional] =====------------------------------------------
# Description: Offset: 16b, Width: 16b, N/A
reserved: 0
# ---------------------------------------===== lutCustomSeq_7 [Optional] =====----------------------------------------
# Description: Offset: 0x0000019C, Width: 32b; [0x180-0x1af] Customizable LUT Sequences
lutCustomSeq_7:
# ------------------------------------------===== seqNum [Optional] =====-------------------------------------------
# Description: Offset: 0b, Width: 8b, Sequence Number, valid number: 1-16
seqNum: 0
# -------------------------------------------===== seqId [Optional] =====-------------------------------------------
# Description: Offset: 8b, Width: 8b, Sequence Index, valid number: 0-15
seqId: 0
# -----------------------------------------===== reserved [Optional] =====------------------------------------------
# Description: Offset: 16b, Width: 16b, N/A
reserved: 0
# ---------------------------------------===== lutCustomSeq_8 [Optional] =====----------------------------------------
# Description: Offset: 0x000001A0, Width: 32b; [0x180-0x1af] Customizable LUT Sequences
lutCustomSeq_8:
# ------------------------------------------===== seqNum [Optional] =====-------------------------------------------
# Description: Offset: 0b, Width: 8b, Sequence Number, valid number: 1-16
seqNum: 0
# -------------------------------------------===== seqId [Optional] =====-------------------------------------------
# Description: Offset: 8b, Width: 8b, Sequence Index, valid number: 0-15
seqId: 0
# -----------------------------------------===== reserved [Optional] =====------------------------------------------
# Description: Offset: 16b, Width: 16b, N/A
reserved: 0
# ---------------------------------------===== lutCustomSeq_9 [Optional] =====----------------------------------------
# Description: Offset: 0x000001A4, Width: 32b; [0x180-0x1af] Customizable LUT Sequences
lutCustomSeq_9:
# ------------------------------------------===== seqNum [Optional] =====-------------------------------------------
# Description: Offset: 0b, Width: 8b, Sequence Number, valid number: 1-16
seqNum: 0
# -------------------------------------------===== seqId [Optional] =====-------------------------------------------
# Description: Offset: 8b, Width: 8b, Sequence Index, valid number: 0-15
seqId: 0
# -----------------------------------------===== reserved [Optional] =====------------------------------------------
# Description: Offset: 16b, Width: 16b, N/A
reserved: 0
# ---------------------------------------===== lutCustomSeq_10 [Optional] =====---------------------------------------
# Description: Offset: 0x000001A8, Width: 32b; [0x180-0x1af] Customizable LUT Sequences
lutCustomSeq_10:
# ------------------------------------------===== seqNum [Optional] =====-------------------------------------------
# Description: Offset: 0b, Width: 8b, Sequence Number, valid number: 1-16
seqNum: 0
# -------------------------------------------===== seqId [Optional] =====-------------------------------------------
# Description: Offset: 8b, Width: 8b, Sequence Index, valid number: 0-15
seqId: 0
# -----------------------------------------===== reserved [Optional] =====------------------------------------------
# Description: Offset: 16b, Width: 16b, N/A
reserved: 0
# ---------------------------------------===== lutCustomSeq_11 [Optional] =====---------------------------------------
# Description: Offset: 0x000001AC, Width: 32b; [0x180-0x1af] Customizable LUT Sequences
lutCustomSeq_11:
# ------------------------------------------===== seqNum [Optional] =====-------------------------------------------
# Description: Offset: 0b, Width: 8b, Sequence Number, valid number: 1-16
seqNum: 0
# -------------------------------------------===== seqId [Optional] =====-------------------------------------------
# Description: Offset: 8b, Width: 8b, Sequence Index, valid number: 0-15
seqId: 0
# -----------------------------------------===== reserved [Optional] =====------------------------------------------
# Description: Offset: 16b, Width: 16b, N/A
reserved: 0
# -----------------------------------------===== reserved4_0 [Optional] =====-----------------------------------------
# Description: Offset: 0x000001B0, Width: 32b; [0x1b0-0x1bf] Reserved for future use
reserved4_0: '0x00000000'
# -----------------------------------------===== reserved4_1 [Optional] =====-----------------------------------------
# Description: Offset: 0x000001B4, Width: 32b; [0x1b0-0x1bf] Reserved for future use
reserved4_1: '0x00000000'
# -----------------------------------------===== reserved4_2 [Optional] =====-----------------------------------------
# Description: Offset: 0x000001B8, Width: 32b; [0x1b0-0x1bf] Reserved for future use
reserved4_2: '0x00000000'
# -----------------------------------------===== reserved4_3 [Optional] =====-----------------------------------------
# Description: Offset: 0x000001BC, Width: 32b; [0x1b0-0x1bf] Reserved for future use
reserved4_3: '0x00000000'
# ------------------------------------------===== pageSize [Optional] =====-------------------------------------------
# Description: Offset: 0x000001C0, Width: 32b; Page size of Serial NOR
pageSize: '0x00000000'
# -----------------------------------------===== sectorSize [Optional] =====------------------------------------------
# Description: Offset: 0x000001C4, Width: 32b; Sector size of Serial NOR
sectorSize: '0x00000000'
# -------------------------------------===== ipcmdSerialClkFreq [Optional] =====--------------------------------------
# Description: Offset: 0x000001C8, Width: 8b; Clock frequency for IP command
ipcmdSerialClkFreq: '0x00'
# -------------------------------------===== isUniformBlockSize [Optional] =====--------------------------------------
# Description: Offset: 0x000001C9, Width: 8b; Sector/Block size is the same
isUniformBlockSize: '0x00'
# -------------------------------------===== isDataOrderSwapped [Optional] =====--------------------------------------
# Description: Offset: 0x000001CA, Width: 8b; Data order (D0, D1, D2, D3) is swapped (D1,D0, D3, D2)
isDataOrderSwapped: '0x00'
# -----------------------------------------===== reserved0_0 [Optional] =====-----------------------------------------
# Description: Offset: 0x000001CB, Width: 8b; Reserved for future use
reserved0_0: '0x00'
# ----------------------------------------===== serialNorType [Optional] =====----------------------------------------
# Description: Offset: 0x000001CC, Width: 8b; Serial NOR Flash type: 0/1/2/3
serialNorType: '0x00'
# --------------------------------------===== needExitNoCmdMode [Optional] =====--------------------------------------
# Description: Offset: 0x000001CD, Width: 8b; Need to exit NoCmd mode before other IP command
needExitNoCmdMode: '0x00'
# ------------------------------------===== halfClkForNonReadCmd [Optional] =====-------------------------------------
# Description: Offset: 0x000001CE, Width: 8b; Half the Serial Clock for non-read command: true/false
halfClkForNonReadCmd: '0x00'
# ------------------------------------===== needRestoreNoCmdMode [Optional] =====-------------------------------------
# Description: Offset: 0x000001CF, Width: 8b; Need to Restore NoCmd mode after IP command execution
needRestoreNoCmdMode: '0x00'
# ------------------------------------------===== blockSize [Optional] =====------------------------------------------
# Description: Offset: 0x000001D0, Width: 32b; Block size
blockSize: '0x00000000'
# ----------------------------------------===== flashStateCtx [Optional] =====----------------------------------------
# Description: Offset: 0x000001D4, Width: 32b; Flash State Context
flashStateCtx: '0x00000000'
# -----------------------------------------===== reserve2_0 [Optional] =====------------------------------------------
# Description: Offset: 0x000001D8, Width: 32b; Reserved for future use
reserve2_0: '0x00000000'
# -----------------------------------------===== reserve2_1 [Optional] =====------------------------------------------
# Description: Offset: 0x000001DC, Width: 32b; Reserved for future use
reserve2_1: '0x00000000'
# -----------------------------------------===== reserve2_2 [Optional] =====------------------------------------------
# Description: Offset: 0x000001E0, Width: 32b; Reserved for future use
reserve2_2: '0x00000000'
# -----------------------------------------===== reserve2_3 [Optional] =====------------------------------------------
# Description: Offset: 0x000001E4, Width: 32b; Reserved for future use
reserve2_3: '0x00000000'
# -----------------------------------------===== reserve2_4 [Optional] =====------------------------------------------
# Description: Offset: 0x000001E8, Width: 32b; Reserved for future use
reserve2_4: '0x00000000'
# -----------------------------------------===== reserve2_5 [Optional] =====------------------------------------------
# Description: Offset: 0x000001EC, Width: 32b; Reserved for future use
reserve2_5: '0x00000000'
# -----------------------------------------===== reserve2_6 [Optional] =====------------------------------------------
# Description: Offset: 0x000001F0, Width: 32b; Reserved for future use
reserve2_6: '0x00000000'
# -----------------------------------------===== reserve2_7 [Optional] =====------------------------------------------
# Description: Offset: 0x000001F4, Width: 32b; Reserved for future use
reserve2_7: '0x00000000'
# -----------------------------------------===== reserve2_8 [Optional] =====------------------------------------------
# Description: Offset: 0x000001F8, Width: 32b; Reserved for future use
reserve2_8: '0x00000000'
# -----------------------------------------===== reserve2_9 [Optional] =====------------------------------------------
# Description: Offset: 0x000001FC, Width: 32b; Reserved for future use
reserve2_9: '0x00000000'
FCB for mimxrt595s, Revision: b0 and flexspi_nor#
FCB for mimxrt595s, Revision: b0 and flexspi_nor JSON schema
FCB for mimxrt595s, Revision: b0 and flexspi_nor YAML configuration template
# ================================= FCB for mimxrt595s, Revision: b0 and flexspi_nor =================================
# ======================================================================================================================
# == FCB for mimxrt595s, Revision: b0 and flexspi_nor ==
# ======================================================================================================================
# -------------------------------------===== The chip family name [Required] =====--------------------------------------
# Description: NXP chip family identifier.
family: CHOOSE_FROM_TABLE
# -----------------------------------------===== MCU revision [Optional] =====------------------------------------------
# Description: Revision of silicon. The 'latest' name, means most current revision.
# Possible options: <a0, b0, latest>
revision: b0
# ------------------------------------------===== Memory type [Required] =====------------------------------------------
# Description: Specify type of memory used by FCB description.
# Possible options: <flexspi_nor>
type: flexspi_nor
# ------------------------------------------===== mimxrt595s [Required] =====-------------------------------------------
fcb_settings:
# ---------------------------------------------===== tag [Optional] =====---------------------------------------------
# Description: Offset: 0x00000000, Width: 32b; [0x000-0x003] Tag, fixed value 0x42464346UL
tag: '0x42464346'
# -------------------------------------------===== version [Optional] =====-------------------------------------------
# Description: Offset: 0x00000004, Width: 32b; [0x004-0x007] Version,[31:24] -'V', [23:16] - Major, [15:8] - Minor,
# [7:0] - bugfix
version: '0x56010400'
# ------------------------------------------===== reserved0 [Optional] =====------------------------------------------
# Description: Offset: 0x00000008, Width: 32b; [0x008-0x00b] Reserved for future use
reserved0: '0x00000000'
# --------------------------------------===== readSampleClkSrc [Optional] =====---------------------------------------
# Description: Offset: 0x0000000C, Width: 8b; [0x00c-0x00c] Read Sample Clock Source, valid value: 0/1/3
readSampleClkSrc: '0x00'
# -----------------------------------------===== csHoldTime [Optional] =====------------------------------------------
# Description: Offset: 0x0000000D, Width: 8b; [0x00d-0x00d] CS hold time, default value: 3
csHoldTime: '0x00'
# -----------------------------------------===== csSetupTime [Optional] =====-----------------------------------------
# Description: Offset: 0x0000000E, Width: 8b; [0x00e-0x00e] CS setup time, default value: 3
csSetupTime: '0x00'
# -------------------------------------===== columnAddressWidth [Optional] =====--------------------------------------
# Description: Offset: 0x0000000F, Width: 8b; [0x00f-0x00f] Column Address with, for HyperBus protocol, it is fixed
# to 3, For Serial NAND, need to refer to datasheet
columnAddressWidth: '0x00'
# -------------------------------------===== deviceModeCfgEnable [Optional] =====-------------------------------------
# Description: Offset: 0x00000010, Width: 8b; [0x010-0x010] Device Mode Configure enable flag, 1 - Enable, 0 -
# Disable
deviceModeCfgEnable: '0x00'
# ---------------------------------------===== deviceModeType [Optional] =====----------------------------------------
# Description: Offset: 0x00000011, Width: 8b; [0x011-0x011] Specify the configuration command type:Quad Enable,
# DPI/QPI/OPI switch, Generic configuration, etc.
deviceModeType: '0x00'
# -------------------------------------===== waitTimeCfgCommands [Optional] =====-------------------------------------
# Description: Offset: 0x00000012, Width: 16b; [0x012-0x013] Wait time for all configuration commands, unit: 100us,
# Used for DPI/QPI/OPI switch or reset command
waitTimeCfgCommands: '0x0000'
# ----------------------------------------===== deviceModeSeq [Optional] =====----------------------------------------
# Description: Offset: 0x00000014, Width: 32b; [0x014-0x017] Device mode sequence info, [7:0] - LUT sequence id,
# [15:8] - LUt sequence number, [31:16] Reserved
deviceModeSeq:
# ------------------------------------------===== seqNum [Optional] =====-------------------------------------------
# Description: Offset: 0b, Width: 8b, Sequence Number, valid number: 1-16
seqNum: 0
# -------------------------------------------===== seqId [Optional] =====-------------------------------------------
# Description: Offset: 8b, Width: 8b, Sequence Index, valid number: 0-15
seqId: 0
# -----------------------------------------===== reserved [Optional] =====------------------------------------------
# Description: Offset: 16b, Width: 16b, N/A
reserved: 0
# ----------------------------------------===== deviceModeArg [Optional] =====----------------------------------------
# Description: Offset: 0x00000018, Width: 32b; [0x018-0x01b] Argument/Parameter for device configuration
deviceModeArg: '0x00000000'
# ---------------------------------------===== configCmdEnable [Optional] =====---------------------------------------
# Description: Offset: 0x0000001C, Width: 8b; [0x01c-0x01c] Configure command Enable Flag, 1 - Enable, 0 - Disable
configCmdEnable: '0x00'
# --------------------------------------===== configModeType_0 [Optional] =====---------------------------------------
# Description: Offset: 0x0000001D, Width: 8b; [0x01d-0x01f] Configure Mode Type, similar as deviceModeTpe
configModeType_0: '0x00'
# --------------------------------------===== configModeType_1 [Optional] =====---------------------------------------
# Description: Offset: 0x0000001E, Width: 8b; [0x01d-0x01f] Configure Mode Type, similar as deviceModeTpe
configModeType_1: '0x00'
# --------------------------------------===== configModeType_2 [Optional] =====---------------------------------------
# Description: Offset: 0x0000001F, Width: 8b; [0x01d-0x01f] Configure Mode Type, similar as deviceModeTpe
configModeType_2: '0x00'
# ---------------------------------------===== configCmdSeqs_0 [Optional] =====---------------------------------------
# Description: Offset: 0x00000020, Width: 32b; [0x020-0x02b] Sequence info for Device Configuration command, similar
# as deviceModeSeq
configCmdSeqs_0:
# ------------------------------------------===== seqNum [Optional] =====-------------------------------------------
# Description: Offset: 0b, Width: 8b, Sequence Number, valid number: 1-16
seqNum: 0
# -------------------------------------------===== seqId [Optional] =====-------------------------------------------
# Description: Offset: 8b, Width: 8b, Sequence Index, valid number: 0-15
seqId: 0
# -----------------------------------------===== reserved [Optional] =====------------------------------------------
# Description: Offset: 16b, Width: 16b, N/A
reserved: 0
# ---------------------------------------===== configCmdSeqs_1 [Optional] =====---------------------------------------
# Description: Offset: 0x00000024, Width: 32b; [0x020-0x02b] Sequence info for Device Configuration command, similar
# as deviceModeSeq
configCmdSeqs_1:
# ------------------------------------------===== seqNum [Optional] =====-------------------------------------------
# Description: Offset: 0b, Width: 8b, Sequence Number, valid number: 1-16
seqNum: 0
# -------------------------------------------===== seqId [Optional] =====-------------------------------------------
# Description: Offset: 8b, Width: 8b, Sequence Index, valid number: 0-15
seqId: 0
# -----------------------------------------===== reserved [Optional] =====------------------------------------------
# Description: Offset: 16b, Width: 16b, N/A
reserved: 0
# ---------------------------------------===== configCmdSeqs_2 [Optional] =====---------------------------------------
# Description: Offset: 0x00000028, Width: 32b; [0x020-0x02b] Sequence info for Device Configuration command, similar
# as deviceModeSeq
configCmdSeqs_2:
# ------------------------------------------===== seqNum [Optional] =====-------------------------------------------
# Description: Offset: 0b, Width: 8b, Sequence Number, valid number: 1-16
seqNum: 0
# -------------------------------------------===== seqId [Optional] =====-------------------------------------------
# Description: Offset: 8b, Width: 8b, Sequence Index, valid number: 0-15
seqId: 0
# -----------------------------------------===== reserved [Optional] =====------------------------------------------
# Description: Offset: 16b, Width: 16b, N/A
reserved: 0
# ------------------------------------------===== reserved1 [Optional] =====------------------------------------------
# Description: Offset: 0x0000002C, Width: 32b; [0x02c-0x02f] Reserved for future use
reserved1: '0x00000000'
# ---------------------------------------===== configCmdArgs_0 [Optional] =====---------------------------------------
# Description: Offset: 0x00000030, Width: 32b; [0x030-0x03b] Arguments/Parameters for device Configuration commands
configCmdArgs_0: '0x00000000'
# ---------------------------------------===== configCmdArgs_1 [Optional] =====---------------------------------------
# Description: Offset: 0x00000034, Width: 32b; [0x030-0x03b] Arguments/Parameters for device Configuration commands
configCmdArgs_1: '0x00000000'
# ---------------------------------------===== configCmdArgs_2 [Optional] =====---------------------------------------
# Description: Offset: 0x00000038, Width: 32b; [0x030-0x03b] Arguments/Parameters for device Configuration commands
configCmdArgs_2: '0x00000000'
# ------------------------------------------===== reserved2 [Optional] =====------------------------------------------
# Description: Offset: 0x0000003C, Width: 32b; [0x03c-0x03f] Reserved for future use
reserved2: '0x00000000'
# ------------------------------------===== controllerMiscOption [Optional] =====-------------------------------------
# Description: Offset: 0x00000040, Width: 32b; [0x040-0x043] Controller Misc Options, see Misc feature bit
# definitions for more details
controllerMiscOption: '0x00000000'
# -----------------------------------------===== deviceType [Optional] =====------------------------------------------
# Description: Offset: 0x00000044, Width: 8b; [0x044-0x044] Device Type: See Flash Type Definition for more details
deviceType: '0x00'
# ----------------------------------------===== sflashPadType [Optional] =====----------------------------------------
# Description: Offset: 0x00000045, Width: 8b; [0x045-0x045] Serial Flash Pad Type: 1 - Single, 2 - Dual, 4 - Quad, 8
# - Octal
sflashPadType: '0x00'
# ----------------------------------------===== serialClkFreq [Optional] =====----------------------------------------
# Description: Offset: 0x00000046, Width: 8b; [0x046-0x046] Serial Flash Frequency, device specific definitions, See
# System Boot Chapter for more details
serialClkFreq: '0x00'
# -------------------------------------===== lutCustomSeqEnable [Optional] =====--------------------------------------
# Description: Offset: 0x00000047, Width: 8b; [0x047-0x047] LUT customization Enable, it is required if the
# program/erase cannot be done using 1 LUT sequence, currently, only applicable to HyperFLASH
lutCustomSeqEnable: '0x00'
# -----------------------------------------===== reserved3_0 [Optional] =====-----------------------------------------
# Description: Offset: 0x00000048, Width: 32b; [0x048-0x04f] Reserved for future use
reserved3_0: '0x00000000'
# -----------------------------------------===== reserved3_1 [Optional] =====-----------------------------------------
# Description: Offset: 0x0000004C, Width: 32b; [0x048-0x04f] Reserved for future use
reserved3_1: '0x00000000'
# ----------------------------------------===== sflashA1Size [Optional] =====-----------------------------------------
# Description: Offset: 0x00000050, Width: 32b; [0x050-0x053] Size of Flash connected to A1
sflashA1Size: '0x00000000'
# ----------------------------------------===== sflashA2Size [Optional] =====-----------------------------------------
# Description: Offset: 0x00000054, Width: 32b; [0x054-0x057] Size of Flash connected to A2
sflashA2Size: '0x00000000'
# ----------------------------------------===== sflashB1Size [Optional] =====-----------------------------------------
# Description: Offset: 0x00000058, Width: 32b; [0x058-0x05b] Size of Flash connected to B1
sflashB1Size: '0x00000000'
# ----------------------------------------===== sflashB2Size [Optional] =====-----------------------------------------
# Description: Offset: 0x0000005C, Width: 32b; [0x05c-0x05f] Size of Flash connected to B2
sflashB2Size: '0x00000000'
# ------------------------------------===== csPadSettingOverride [Optional] =====-------------------------------------
# Description: Offset: 0x00000060, Width: 32b; [0x060-0x063] CS pad setting override value
csPadSettingOverride: '0x00000000'
# -----------------------------------===== sclkPadSettingOverride [Optional] =====------------------------------------
# Description: Offset: 0x00000064, Width: 32b; [0x064-0x067] SCK pad setting override value
sclkPadSettingOverride: '0x00000000'
# -----------------------------------===== dataPadSettingOverride [Optional] =====------------------------------------
# Description: Offset: 0x00000068, Width: 32b; [0x068-0x06b] data pad setting override value
dataPadSettingOverride: '0x00000000'
# ------------------------------------===== dqsPadSettingOverride [Optional] =====------------------------------------
# Description: Offset: 0x0000006C, Width: 32b; [0x06c-0x06f] DQS pad setting override value
dqsPadSettingOverride: '0x00000000'
# -----------------------------------------===== timeoutInMs [Optional] =====-----------------------------------------
# Description: Offset: 0x00000070, Width: 32b; [0x070-0x073] Timeout threshold for read status command
timeoutInMs: '0x00000000'
# ---------------------------------------===== commandInterval [Optional] =====---------------------------------------
# Description: Offset: 0x00000074, Width: 32b; [0x074-0x077] CS deselect interval between two commands
commandInterval: '0x00000000'
# ---------------------------------------===== dataValidTime_0 [Optional] =====---------------------------------------
# Description: Offset: 0x00000078, Width: 16b; [0x078-0x07b] CLK edge to data valid time for PORT A and PORT B
dataValidTime_0:
# ----------------------------------------===== time_100ps [Optional] =====-----------------------------------------
# Description: Offset: 0b, Width: 8b, Data valid time, in terms of 100ps
time_100ps: 0
# ----------------------------------------===== delay_cells [Optional] =====----------------------------------------
# Description: Offset: 8b, Width: 8b, Data valid time, in terms of delay cells
delay_cells: 0
# ---------------------------------------===== dataValidTime_1 [Optional] =====---------------------------------------
# Description: Offset: 0x0000007A, Width: 16b; [0x078-0x07b] CLK edge to data valid time for PORT A and PORT B
dataValidTime_1:
# ----------------------------------------===== time_100ps [Optional] =====-----------------------------------------
# Description: Offset: 0b, Width: 8b, Data valid time, in terms of 100ps
time_100ps: 0
# ----------------------------------------===== delay_cells [Optional] =====----------------------------------------
# Description: Offset: 8b, Width: 8b, Data valid time, in terms of delay cells
delay_cells: 0
# -----------------------------------------===== busyOffset [Optional] =====------------------------------------------
# Description: Offset: 0x0000007C, Width: 16b; [0x07c-0x07d] Busy offset, valid value: 0-31
busyOffset: '0x0000'
# ---------------------------------------===== busyBitPolarity [Optional] =====---------------------------------------
# Description: Offset: 0x0000007E, Width: 16b; [0x07e-0x07f] Busy flag polarity, 0 - busy flag is 1 when flash device
# is busy, 1 - busy flag is 0 when flash device is busy
busyBitPolarity: '0x0000'
# -----------------------------------===== lookupTable_seq0_instr0 [Optional] =====-----------------------------------
# Description: Offset: 0x00000080, Width: 16b; Lookup table holds Flash command sequences 0, instruction 0
lookupTable_seq0_instr0:
# ------------------------------------------===== OPERAND [Optional] =====------------------------------------------
# Description: Offset: 0b, Width: 8b, Instruction operand. Its values depends on used instruction
OPERAND: 0
# -----------------------------------------===== NUM_PADS [Optional] =====------------------------------------------
# Description: Offset: 8b, Width: 2b, Number of pads used by instruction. Some instructions ignores this parameter.
# - 1PAD, (0): Single mode. One pad is used.
# - 2PAD, (1): Dual mode. Two pads are used.
# - 4PAD, (2): Quad mode. Four pads are used.
# - 8PAD, (3): Octal mode. Eight pads are used.
# Possible options: <1PAD, 2PAD, 4PAD, 8PAD>
NUM_PADS: 1PAD
# --------------------------------------===== OPERATION_CODE [Optional] =====---------------------------------------
# Description: Offset: 10b, Width: 6b, Instruction operation code.
# - STOP, (0): Stop execution and de-assert CS. Then, the next command sequence (to the same flash device) starts
# from instruction pointer 0.
# - CMD_SDR, (1): Transmit command code to Flash.
# - RADDR_SDR, (2): Transmit row address to Flash.
# - CADDR_SDR, (3): Transmit column address to Flash.
# - MODE1_SDR, (4): Transmit mode bits to Flash.
# - MODE2_SDR, (5): Transmit mode bits to Flash.
# - MODE4_SDR, (6): Transmit mode bits to Flash.
# - MODE8_SDR, (7): Transmit mode bits to Flash.
# - WRITE_SDR, (8): Transmit program data to Flash device.
# - READ_SDR, (9): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_SDR, (10): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_SDR, (11): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_SDR, (12): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_SDR, (13): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# - JMP_ON_CS, (31): Stop execution, de-assert CS and save operand[7:0] as the instruction start pointer for next
# sequence.Normally this instruction is used to support Execute-In-Place enhanced mode. See XIP enhanced mode for
# more details.This instruction is only allowed for AHB read commands. There is interrupt status bit set
# (INTR[IPCMDERR] or INTR[AHBCMDERR]) when using this instruction in IP command or AHB write command.
# - CMD_DDR, (33): Transmit command code to Flash.
# - RADDR_DDR, (34): Transmit row address to Flash.
# - CADDR_DDR, (35): Transmit column address to Flash.
# - MODE1_DDR, (36): Transmit mode bits to Flash.
# - MODE2_DDR, (37): Transmit mode bits to Flash.
# - MODE4_DDR, (38): Transmit mode bits to Flash.
# - MODE8_DDR, (39): Transmit mode bits to Flash.
# - WRITE_DDR, (40): Transmit program data to Flash device.
# - READ_DDR, (41): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_DDR, (42): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_DDR, (43): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_DDR, (44): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_DDR, (45): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# Possible options: <STOP, CMD_SDR, RADDR_SDR, CADDR_SDR, MODE1_SDR, MODE2_SDR, MODE4_SDR, MODE8_SDR, WRITE_SDR,
# READ_SDR, LEARN_SDR, DATSZ_SDR, DUMMY_SDR, DUMMY_RWDS_SDR, JMP_ON_CS, CMD_DDR, RADDR_DDR, CADDR_DDR, MODE1_DDR,
# MODE2_DDR, MODE4_DDR, MODE8_DDR, WRITE_DDR, READ_DDR, LEARN_DDR, DATSZ_DDR, DUMMY_DDR, DUMMY_RWDS_DDR>
OPERATION_CODE: STOP
lookupTable_seq0_instr1:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq0_instr2:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq0_instr3:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq0_instr4:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq0_instr5:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq0_instr6:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq0_instr7:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
# -----------------------------------===== lookupTable_seq1_instr0 [Optional] =====-----------------------------------
# Description: Offset: 0x00000090, Width: 16b; Lookup table holds Flash command sequences 1, instruction 0
lookupTable_seq1_instr0:
# ------------------------------------------===== OPERAND [Optional] =====------------------------------------------
# Description: Offset: 0b, Width: 8b, Instruction operand. Its values depends on used instruction
OPERAND: 0
# -----------------------------------------===== NUM_PADS [Optional] =====------------------------------------------
# Description: Offset: 8b, Width: 2b, Number of pads used by instruction. Some instructions ignores this parameter.
# - 1PAD, (0): Single mode. One pad is used.
# - 2PAD, (1): Dual mode. Two pads are used.
# - 4PAD, (2): Quad mode. Four pads are used.
# - 8PAD, (3): Octal mode. Eight pads are used.
# Possible options: <1PAD, 2PAD, 4PAD, 8PAD>
NUM_PADS: 1PAD
# --------------------------------------===== OPERATION_CODE [Optional] =====---------------------------------------
# Description: Offset: 10b, Width: 6b, Instruction operation code.
# - STOP, (0): Stop execution and de-assert CS. Then, the next command sequence (to the same flash device) starts
# from instruction pointer 0.
# - CMD_SDR, (1): Transmit command code to Flash.
# - RADDR_SDR, (2): Transmit row address to Flash.
# - CADDR_SDR, (3): Transmit column address to Flash.
# - MODE1_SDR, (4): Transmit mode bits to Flash.
# - MODE2_SDR, (5): Transmit mode bits to Flash.
# - MODE4_SDR, (6): Transmit mode bits to Flash.
# - MODE8_SDR, (7): Transmit mode bits to Flash.
# - WRITE_SDR, (8): Transmit program data to Flash device.
# - READ_SDR, (9): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_SDR, (10): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_SDR, (11): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_SDR, (12): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_SDR, (13): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# - JMP_ON_CS, (31): Stop execution, de-assert CS and save operand[7:0] as the instruction start pointer for next
# sequence.Normally this instruction is used to support Execute-In-Place enhanced mode. See XIP enhanced mode for
# more details.This instruction is only allowed for AHB read commands. There is interrupt status bit set
# (INTR[IPCMDERR] or INTR[AHBCMDERR]) when using this instruction in IP command or AHB write command.
# - CMD_DDR, (33): Transmit command code to Flash.
# - RADDR_DDR, (34): Transmit row address to Flash.
# - CADDR_DDR, (35): Transmit column address to Flash.
# - MODE1_DDR, (36): Transmit mode bits to Flash.
# - MODE2_DDR, (37): Transmit mode bits to Flash.
# - MODE4_DDR, (38): Transmit mode bits to Flash.
# - MODE8_DDR, (39): Transmit mode bits to Flash.
# - WRITE_DDR, (40): Transmit program data to Flash device.
# - READ_DDR, (41): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_DDR, (42): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_DDR, (43): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_DDR, (44): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_DDR, (45): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# Possible options: <STOP, CMD_SDR, RADDR_SDR, CADDR_SDR, MODE1_SDR, MODE2_SDR, MODE4_SDR, MODE8_SDR, WRITE_SDR,
# READ_SDR, LEARN_SDR, DATSZ_SDR, DUMMY_SDR, DUMMY_RWDS_SDR, JMP_ON_CS, CMD_DDR, RADDR_DDR, CADDR_DDR, MODE1_DDR,
# MODE2_DDR, MODE4_DDR, MODE8_DDR, WRITE_DDR, READ_DDR, LEARN_DDR, DATSZ_DDR, DUMMY_DDR, DUMMY_RWDS_DDR>
OPERATION_CODE: STOP
lookupTable_seq1_instr1:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq1_instr2:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq1_instr3:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq1_instr4:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq1_instr5:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq1_instr6:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq1_instr7:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
# -----------------------------------===== lookupTable_seq2_instr0 [Optional] =====-----------------------------------
# Description: Offset: 0x000000A0, Width: 16b; Lookup table holds Flash command sequences 2, instruction 0
lookupTable_seq2_instr0:
# ------------------------------------------===== OPERAND [Optional] =====------------------------------------------
# Description: Offset: 0b, Width: 8b, Instruction operand. Its values depends on used instruction
OPERAND: 0
# -----------------------------------------===== NUM_PADS [Optional] =====------------------------------------------
# Description: Offset: 8b, Width: 2b, Number of pads used by instruction. Some instructions ignores this parameter.
# - 1PAD, (0): Single mode. One pad is used.
# - 2PAD, (1): Dual mode. Two pads are used.
# - 4PAD, (2): Quad mode. Four pads are used.
# - 8PAD, (3): Octal mode. Eight pads are used.
# Possible options: <1PAD, 2PAD, 4PAD, 8PAD>
NUM_PADS: 1PAD
# --------------------------------------===== OPERATION_CODE [Optional] =====---------------------------------------
# Description: Offset: 10b, Width: 6b, Instruction operation code.
# - STOP, (0): Stop execution and de-assert CS. Then, the next command sequence (to the same flash device) starts
# from instruction pointer 0.
# - CMD_SDR, (1): Transmit command code to Flash.
# - RADDR_SDR, (2): Transmit row address to Flash.
# - CADDR_SDR, (3): Transmit column address to Flash.
# - MODE1_SDR, (4): Transmit mode bits to Flash.
# - MODE2_SDR, (5): Transmit mode bits to Flash.
# - MODE4_SDR, (6): Transmit mode bits to Flash.
# - MODE8_SDR, (7): Transmit mode bits to Flash.
# - WRITE_SDR, (8): Transmit program data to Flash device.
# - READ_SDR, (9): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_SDR, (10): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_SDR, (11): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_SDR, (12): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_SDR, (13): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# - JMP_ON_CS, (31): Stop execution, de-assert CS and save operand[7:0] as the instruction start pointer for next
# sequence.Normally this instruction is used to support Execute-In-Place enhanced mode. See XIP enhanced mode for
# more details.This instruction is only allowed for AHB read commands. There is interrupt status bit set
# (INTR[IPCMDERR] or INTR[AHBCMDERR]) when using this instruction in IP command or AHB write command.
# - CMD_DDR, (33): Transmit command code to Flash.
# - RADDR_DDR, (34): Transmit row address to Flash.
# - CADDR_DDR, (35): Transmit column address to Flash.
# - MODE1_DDR, (36): Transmit mode bits to Flash.
# - MODE2_DDR, (37): Transmit mode bits to Flash.
# - MODE4_DDR, (38): Transmit mode bits to Flash.
# - MODE8_DDR, (39): Transmit mode bits to Flash.
# - WRITE_DDR, (40): Transmit program data to Flash device.
# - READ_DDR, (41): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_DDR, (42): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_DDR, (43): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_DDR, (44): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_DDR, (45): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# Possible options: <STOP, CMD_SDR, RADDR_SDR, CADDR_SDR, MODE1_SDR, MODE2_SDR, MODE4_SDR, MODE8_SDR, WRITE_SDR,
# READ_SDR, LEARN_SDR, DATSZ_SDR, DUMMY_SDR, DUMMY_RWDS_SDR, JMP_ON_CS, CMD_DDR, RADDR_DDR, CADDR_DDR, MODE1_DDR,
# MODE2_DDR, MODE4_DDR, MODE8_DDR, WRITE_DDR, READ_DDR, LEARN_DDR, DATSZ_DDR, DUMMY_DDR, DUMMY_RWDS_DDR>
OPERATION_CODE: STOP
lookupTable_seq2_instr1:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq2_instr2:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq2_instr3:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq2_instr4:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq2_instr5:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq2_instr6:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq2_instr7:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
# -----------------------------------===== lookupTable_seq3_instr0 [Optional] =====-----------------------------------
# Description: Offset: 0x000000B0, Width: 16b; Lookup table holds Flash command sequences 3, instruction 0
lookupTable_seq3_instr0:
# ------------------------------------------===== OPERAND [Optional] =====------------------------------------------
# Description: Offset: 0b, Width: 8b, Instruction operand. Its values depends on used instruction
OPERAND: 0
# -----------------------------------------===== NUM_PADS [Optional] =====------------------------------------------
# Description: Offset: 8b, Width: 2b, Number of pads used by instruction. Some instructions ignores this parameter.
# - 1PAD, (0): Single mode. One pad is used.
# - 2PAD, (1): Dual mode. Two pads are used.
# - 4PAD, (2): Quad mode. Four pads are used.
# - 8PAD, (3): Octal mode. Eight pads are used.
# Possible options: <1PAD, 2PAD, 4PAD, 8PAD>
NUM_PADS: 1PAD
# --------------------------------------===== OPERATION_CODE [Optional] =====---------------------------------------
# Description: Offset: 10b, Width: 6b, Instruction operation code.
# - STOP, (0): Stop execution and de-assert CS. Then, the next command sequence (to the same flash device) starts
# from instruction pointer 0.
# - CMD_SDR, (1): Transmit command code to Flash.
# - RADDR_SDR, (2): Transmit row address to Flash.
# - CADDR_SDR, (3): Transmit column address to Flash.
# - MODE1_SDR, (4): Transmit mode bits to Flash.
# - MODE2_SDR, (5): Transmit mode bits to Flash.
# - MODE4_SDR, (6): Transmit mode bits to Flash.
# - MODE8_SDR, (7): Transmit mode bits to Flash.
# - WRITE_SDR, (8): Transmit program data to Flash device.
# - READ_SDR, (9): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_SDR, (10): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_SDR, (11): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_SDR, (12): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_SDR, (13): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# - JMP_ON_CS, (31): Stop execution, de-assert CS and save operand[7:0] as the instruction start pointer for next
# sequence.Normally this instruction is used to support Execute-In-Place enhanced mode. See XIP enhanced mode for
# more details.This instruction is only allowed for AHB read commands. There is interrupt status bit set
# (INTR[IPCMDERR] or INTR[AHBCMDERR]) when using this instruction in IP command or AHB write command.
# - CMD_DDR, (33): Transmit command code to Flash.
# - RADDR_DDR, (34): Transmit row address to Flash.
# - CADDR_DDR, (35): Transmit column address to Flash.
# - MODE1_DDR, (36): Transmit mode bits to Flash.
# - MODE2_DDR, (37): Transmit mode bits to Flash.
# - MODE4_DDR, (38): Transmit mode bits to Flash.
# - MODE8_DDR, (39): Transmit mode bits to Flash.
# - WRITE_DDR, (40): Transmit program data to Flash device.
# - READ_DDR, (41): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_DDR, (42): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_DDR, (43): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_DDR, (44): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_DDR, (45): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# Possible options: <STOP, CMD_SDR, RADDR_SDR, CADDR_SDR, MODE1_SDR, MODE2_SDR, MODE4_SDR, MODE8_SDR, WRITE_SDR,
# READ_SDR, LEARN_SDR, DATSZ_SDR, DUMMY_SDR, DUMMY_RWDS_SDR, JMP_ON_CS, CMD_DDR, RADDR_DDR, CADDR_DDR, MODE1_DDR,
# MODE2_DDR, MODE4_DDR, MODE8_DDR, WRITE_DDR, READ_DDR, LEARN_DDR, DATSZ_DDR, DUMMY_DDR, DUMMY_RWDS_DDR>
OPERATION_CODE: STOP
lookupTable_seq3_instr1:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq3_instr2:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq3_instr3:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq3_instr4:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq3_instr5:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq3_instr6:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq3_instr7:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
# -----------------------------------===== lookupTable_seq4_instr0 [Optional] =====-----------------------------------
# Description: Offset: 0x000000C0, Width: 16b; Lookup table holds Flash command sequences 4, instruction 0
lookupTable_seq4_instr0:
# ------------------------------------------===== OPERAND [Optional] =====------------------------------------------
# Description: Offset: 0b, Width: 8b, Instruction operand. Its values depends on used instruction
OPERAND: 0
# -----------------------------------------===== NUM_PADS [Optional] =====------------------------------------------
# Description: Offset: 8b, Width: 2b, Number of pads used by instruction. Some instructions ignores this parameter.
# - 1PAD, (0): Single mode. One pad is used.
# - 2PAD, (1): Dual mode. Two pads are used.
# - 4PAD, (2): Quad mode. Four pads are used.
# - 8PAD, (3): Octal mode. Eight pads are used.
# Possible options: <1PAD, 2PAD, 4PAD, 8PAD>
NUM_PADS: 1PAD
# --------------------------------------===== OPERATION_CODE [Optional] =====---------------------------------------
# Description: Offset: 10b, Width: 6b, Instruction operation code.
# - STOP, (0): Stop execution and de-assert CS. Then, the next command sequence (to the same flash device) starts
# from instruction pointer 0.
# - CMD_SDR, (1): Transmit command code to Flash.
# - RADDR_SDR, (2): Transmit row address to Flash.
# - CADDR_SDR, (3): Transmit column address to Flash.
# - MODE1_SDR, (4): Transmit mode bits to Flash.
# - MODE2_SDR, (5): Transmit mode bits to Flash.
# - MODE4_SDR, (6): Transmit mode bits to Flash.
# - MODE8_SDR, (7): Transmit mode bits to Flash.
# - WRITE_SDR, (8): Transmit program data to Flash device.
# - READ_SDR, (9): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_SDR, (10): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_SDR, (11): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_SDR, (12): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_SDR, (13): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# - JMP_ON_CS, (31): Stop execution, de-assert CS and save operand[7:0] as the instruction start pointer for next
# sequence.Normally this instruction is used to support Execute-In-Place enhanced mode. See XIP enhanced mode for
# more details.This instruction is only allowed for AHB read commands. There is interrupt status bit set
# (INTR[IPCMDERR] or INTR[AHBCMDERR]) when using this instruction in IP command or AHB write command.
# - CMD_DDR, (33): Transmit command code to Flash.
# - RADDR_DDR, (34): Transmit row address to Flash.
# - CADDR_DDR, (35): Transmit column address to Flash.
# - MODE1_DDR, (36): Transmit mode bits to Flash.
# - MODE2_DDR, (37): Transmit mode bits to Flash.
# - MODE4_DDR, (38): Transmit mode bits to Flash.
# - MODE8_DDR, (39): Transmit mode bits to Flash.
# - WRITE_DDR, (40): Transmit program data to Flash device.
# - READ_DDR, (41): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_DDR, (42): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_DDR, (43): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_DDR, (44): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_DDR, (45): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# Possible options: <STOP, CMD_SDR, RADDR_SDR, CADDR_SDR, MODE1_SDR, MODE2_SDR, MODE4_SDR, MODE8_SDR, WRITE_SDR,
# READ_SDR, LEARN_SDR, DATSZ_SDR, DUMMY_SDR, DUMMY_RWDS_SDR, JMP_ON_CS, CMD_DDR, RADDR_DDR, CADDR_DDR, MODE1_DDR,
# MODE2_DDR, MODE4_DDR, MODE8_DDR, WRITE_DDR, READ_DDR, LEARN_DDR, DATSZ_DDR, DUMMY_DDR, DUMMY_RWDS_DDR>
OPERATION_CODE: STOP
lookupTable_seq4_instr1:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq4_instr2:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq4_instr3:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq4_instr4:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq4_instr5:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq4_instr6:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq4_instr7:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
# -----------------------------------===== lookupTable_seq5_instr0 [Optional] =====-----------------------------------
# Description: Offset: 0x000000D0, Width: 16b; Lookup table holds Flash command sequences 5, instruction 0
lookupTable_seq5_instr0:
# ------------------------------------------===== OPERAND [Optional] =====------------------------------------------
# Description: Offset: 0b, Width: 8b, Instruction operand. Its values depends on used instruction
OPERAND: 0
# -----------------------------------------===== NUM_PADS [Optional] =====------------------------------------------
# Description: Offset: 8b, Width: 2b, Number of pads used by instruction. Some instructions ignores this parameter.
# - 1PAD, (0): Single mode. One pad is used.
# - 2PAD, (1): Dual mode. Two pads are used.
# - 4PAD, (2): Quad mode. Four pads are used.
# - 8PAD, (3): Octal mode. Eight pads are used.
# Possible options: <1PAD, 2PAD, 4PAD, 8PAD>
NUM_PADS: 1PAD
# --------------------------------------===== OPERATION_CODE [Optional] =====---------------------------------------
# Description: Offset: 10b, Width: 6b, Instruction operation code.
# - STOP, (0): Stop execution and de-assert CS. Then, the next command sequence (to the same flash device) starts
# from instruction pointer 0.
# - CMD_SDR, (1): Transmit command code to Flash.
# - RADDR_SDR, (2): Transmit row address to Flash.
# - CADDR_SDR, (3): Transmit column address to Flash.
# - MODE1_SDR, (4): Transmit mode bits to Flash.
# - MODE2_SDR, (5): Transmit mode bits to Flash.
# - MODE4_SDR, (6): Transmit mode bits to Flash.
# - MODE8_SDR, (7): Transmit mode bits to Flash.
# - WRITE_SDR, (8): Transmit program data to Flash device.
# - READ_SDR, (9): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_SDR, (10): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_SDR, (11): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_SDR, (12): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_SDR, (13): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# - JMP_ON_CS, (31): Stop execution, de-assert CS and save operand[7:0] as the instruction start pointer for next
# sequence.Normally this instruction is used to support Execute-In-Place enhanced mode. See XIP enhanced mode for
# more details.This instruction is only allowed for AHB read commands. There is interrupt status bit set
# (INTR[IPCMDERR] or INTR[AHBCMDERR]) when using this instruction in IP command or AHB write command.
# - CMD_DDR, (33): Transmit command code to Flash.
# - RADDR_DDR, (34): Transmit row address to Flash.
# - CADDR_DDR, (35): Transmit column address to Flash.
# - MODE1_DDR, (36): Transmit mode bits to Flash.
# - MODE2_DDR, (37): Transmit mode bits to Flash.
# - MODE4_DDR, (38): Transmit mode bits to Flash.
# - MODE8_DDR, (39): Transmit mode bits to Flash.
# - WRITE_DDR, (40): Transmit program data to Flash device.
# - READ_DDR, (41): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_DDR, (42): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_DDR, (43): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_DDR, (44): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_DDR, (45): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# Possible options: <STOP, CMD_SDR, RADDR_SDR, CADDR_SDR, MODE1_SDR, MODE2_SDR, MODE4_SDR, MODE8_SDR, WRITE_SDR,
# READ_SDR, LEARN_SDR, DATSZ_SDR, DUMMY_SDR, DUMMY_RWDS_SDR, JMP_ON_CS, CMD_DDR, RADDR_DDR, CADDR_DDR, MODE1_DDR,
# MODE2_DDR, MODE4_DDR, MODE8_DDR, WRITE_DDR, READ_DDR, LEARN_DDR, DATSZ_DDR, DUMMY_DDR, DUMMY_RWDS_DDR>
OPERATION_CODE: STOP
lookupTable_seq5_instr1:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq5_instr2:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq5_instr3:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq5_instr4:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq5_instr5:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq5_instr6:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq5_instr7:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
# -----------------------------------===== lookupTable_seq6_instr0 [Optional] =====-----------------------------------
# Description: Offset: 0x000000E0, Width: 16b; Lookup table holds Flash command sequences 6, instruction 0
lookupTable_seq6_instr0:
# ------------------------------------------===== OPERAND [Optional] =====------------------------------------------
# Description: Offset: 0b, Width: 8b, Instruction operand. Its values depends on used instruction
OPERAND: 0
# -----------------------------------------===== NUM_PADS [Optional] =====------------------------------------------
# Description: Offset: 8b, Width: 2b, Number of pads used by instruction. Some instructions ignores this parameter.
# - 1PAD, (0): Single mode. One pad is used.
# - 2PAD, (1): Dual mode. Two pads are used.
# - 4PAD, (2): Quad mode. Four pads are used.
# - 8PAD, (3): Octal mode. Eight pads are used.
# Possible options: <1PAD, 2PAD, 4PAD, 8PAD>
NUM_PADS: 1PAD
# --------------------------------------===== OPERATION_CODE [Optional] =====---------------------------------------
# Description: Offset: 10b, Width: 6b, Instruction operation code.
# - STOP, (0): Stop execution and de-assert CS. Then, the next command sequence (to the same flash device) starts
# from instruction pointer 0.
# - CMD_SDR, (1): Transmit command code to Flash.
# - RADDR_SDR, (2): Transmit row address to Flash.
# - CADDR_SDR, (3): Transmit column address to Flash.
# - MODE1_SDR, (4): Transmit mode bits to Flash.
# - MODE2_SDR, (5): Transmit mode bits to Flash.
# - MODE4_SDR, (6): Transmit mode bits to Flash.
# - MODE8_SDR, (7): Transmit mode bits to Flash.
# - WRITE_SDR, (8): Transmit program data to Flash device.
# - READ_SDR, (9): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_SDR, (10): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_SDR, (11): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_SDR, (12): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_SDR, (13): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# - JMP_ON_CS, (31): Stop execution, de-assert CS and save operand[7:0] as the instruction start pointer for next
# sequence.Normally this instruction is used to support Execute-In-Place enhanced mode. See XIP enhanced mode for
# more details.This instruction is only allowed for AHB read commands. There is interrupt status bit set
# (INTR[IPCMDERR] or INTR[AHBCMDERR]) when using this instruction in IP command or AHB write command.
# - CMD_DDR, (33): Transmit command code to Flash.
# - RADDR_DDR, (34): Transmit row address to Flash.
# - CADDR_DDR, (35): Transmit column address to Flash.
# - MODE1_DDR, (36): Transmit mode bits to Flash.
# - MODE2_DDR, (37): Transmit mode bits to Flash.
# - MODE4_DDR, (38): Transmit mode bits to Flash.
# - MODE8_DDR, (39): Transmit mode bits to Flash.
# - WRITE_DDR, (40): Transmit program data to Flash device.
# - READ_DDR, (41): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_DDR, (42): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_DDR, (43): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_DDR, (44): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_DDR, (45): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# Possible options: <STOP, CMD_SDR, RADDR_SDR, CADDR_SDR, MODE1_SDR, MODE2_SDR, MODE4_SDR, MODE8_SDR, WRITE_SDR,
# READ_SDR, LEARN_SDR, DATSZ_SDR, DUMMY_SDR, DUMMY_RWDS_SDR, JMP_ON_CS, CMD_DDR, RADDR_DDR, CADDR_DDR, MODE1_DDR,
# MODE2_DDR, MODE4_DDR, MODE8_DDR, WRITE_DDR, READ_DDR, LEARN_DDR, DATSZ_DDR, DUMMY_DDR, DUMMY_RWDS_DDR>
OPERATION_CODE: STOP
lookupTable_seq6_instr1:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq6_instr2:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq6_instr3:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq6_instr4:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq6_instr5:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq6_instr6:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq6_instr7:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
# -----------------------------------===== lookupTable_seq7_instr0 [Optional] =====-----------------------------------
# Description: Offset: 0x000000F0, Width: 16b; Lookup table holds Flash command sequences 7, instruction 0
lookupTable_seq7_instr0:
# ------------------------------------------===== OPERAND [Optional] =====------------------------------------------
# Description: Offset: 0b, Width: 8b, Instruction operand. Its values depends on used instruction
OPERAND: 0
# -----------------------------------------===== NUM_PADS [Optional] =====------------------------------------------
# Description: Offset: 8b, Width: 2b, Number of pads used by instruction. Some instructions ignores this parameter.
# - 1PAD, (0): Single mode. One pad is used.
# - 2PAD, (1): Dual mode. Two pads are used.
# - 4PAD, (2): Quad mode. Four pads are used.
# - 8PAD, (3): Octal mode. Eight pads are used.
# Possible options: <1PAD, 2PAD, 4PAD, 8PAD>
NUM_PADS: 1PAD
# --------------------------------------===== OPERATION_CODE [Optional] =====---------------------------------------
# Description: Offset: 10b, Width: 6b, Instruction operation code.
# - STOP, (0): Stop execution and de-assert CS. Then, the next command sequence (to the same flash device) starts
# from instruction pointer 0.
# - CMD_SDR, (1): Transmit command code to Flash.
# - RADDR_SDR, (2): Transmit row address to Flash.
# - CADDR_SDR, (3): Transmit column address to Flash.
# - MODE1_SDR, (4): Transmit mode bits to Flash.
# - MODE2_SDR, (5): Transmit mode bits to Flash.
# - MODE4_SDR, (6): Transmit mode bits to Flash.
# - MODE8_SDR, (7): Transmit mode bits to Flash.
# - WRITE_SDR, (8): Transmit program data to Flash device.
# - READ_SDR, (9): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_SDR, (10): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_SDR, (11): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_SDR, (12): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_SDR, (13): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# - JMP_ON_CS, (31): Stop execution, de-assert CS and save operand[7:0] as the instruction start pointer for next
# sequence.Normally this instruction is used to support Execute-In-Place enhanced mode. See XIP enhanced mode for
# more details.This instruction is only allowed for AHB read commands. There is interrupt status bit set
# (INTR[IPCMDERR] or INTR[AHBCMDERR]) when using this instruction in IP command or AHB write command.
# - CMD_DDR, (33): Transmit command code to Flash.
# - RADDR_DDR, (34): Transmit row address to Flash.
# - CADDR_DDR, (35): Transmit column address to Flash.
# - MODE1_DDR, (36): Transmit mode bits to Flash.
# - MODE2_DDR, (37): Transmit mode bits to Flash.
# - MODE4_DDR, (38): Transmit mode bits to Flash.
# - MODE8_DDR, (39): Transmit mode bits to Flash.
# - WRITE_DDR, (40): Transmit program data to Flash device.
# - READ_DDR, (41): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_DDR, (42): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_DDR, (43): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_DDR, (44): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_DDR, (45): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# Possible options: <STOP, CMD_SDR, RADDR_SDR, CADDR_SDR, MODE1_SDR, MODE2_SDR, MODE4_SDR, MODE8_SDR, WRITE_SDR,
# READ_SDR, LEARN_SDR, DATSZ_SDR, DUMMY_SDR, DUMMY_RWDS_SDR, JMP_ON_CS, CMD_DDR, RADDR_DDR, CADDR_DDR, MODE1_DDR,
# MODE2_DDR, MODE4_DDR, MODE8_DDR, WRITE_DDR, READ_DDR, LEARN_DDR, DATSZ_DDR, DUMMY_DDR, DUMMY_RWDS_DDR>
OPERATION_CODE: STOP
lookupTable_seq7_instr1:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq7_instr2:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq7_instr3:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq7_instr4:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq7_instr5:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq7_instr6:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq7_instr7:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
# -----------------------------------===== lookupTable_seq8_instr0 [Optional] =====-----------------------------------
# Description: Offset: 0x00000100, Width: 16b; Lookup table holds Flash command sequences 8, instruction 0
lookupTable_seq8_instr0:
# ------------------------------------------===== OPERAND [Optional] =====------------------------------------------
# Description: Offset: 0b, Width: 8b, Instruction operand. Its values depends on used instruction
OPERAND: 0
# -----------------------------------------===== NUM_PADS [Optional] =====------------------------------------------
# Description: Offset: 8b, Width: 2b, Number of pads used by instruction. Some instructions ignores this parameter.
# - 1PAD, (0): Single mode. One pad is used.
# - 2PAD, (1): Dual mode. Two pads are used.
# - 4PAD, (2): Quad mode. Four pads are used.
# - 8PAD, (3): Octal mode. Eight pads are used.
# Possible options: <1PAD, 2PAD, 4PAD, 8PAD>
NUM_PADS: 1PAD
# --------------------------------------===== OPERATION_CODE [Optional] =====---------------------------------------
# Description: Offset: 10b, Width: 6b, Instruction operation code.
# - STOP, (0): Stop execution and de-assert CS. Then, the next command sequence (to the same flash device) starts
# from instruction pointer 0.
# - CMD_SDR, (1): Transmit command code to Flash.
# - RADDR_SDR, (2): Transmit row address to Flash.
# - CADDR_SDR, (3): Transmit column address to Flash.
# - MODE1_SDR, (4): Transmit mode bits to Flash.
# - MODE2_SDR, (5): Transmit mode bits to Flash.
# - MODE4_SDR, (6): Transmit mode bits to Flash.
# - MODE8_SDR, (7): Transmit mode bits to Flash.
# - WRITE_SDR, (8): Transmit program data to Flash device.
# - READ_SDR, (9): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_SDR, (10): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_SDR, (11): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_SDR, (12): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_SDR, (13): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# - JMP_ON_CS, (31): Stop execution, de-assert CS and save operand[7:0] as the instruction start pointer for next
# sequence.Normally this instruction is used to support Execute-In-Place enhanced mode. See XIP enhanced mode for
# more details.This instruction is only allowed for AHB read commands. There is interrupt status bit set
# (INTR[IPCMDERR] or INTR[AHBCMDERR]) when using this instruction in IP command or AHB write command.
# - CMD_DDR, (33): Transmit command code to Flash.
# - RADDR_DDR, (34): Transmit row address to Flash.
# - CADDR_DDR, (35): Transmit column address to Flash.
# - MODE1_DDR, (36): Transmit mode bits to Flash.
# - MODE2_DDR, (37): Transmit mode bits to Flash.
# - MODE4_DDR, (38): Transmit mode bits to Flash.
# - MODE8_DDR, (39): Transmit mode bits to Flash.
# - WRITE_DDR, (40): Transmit program data to Flash device.
# - READ_DDR, (41): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_DDR, (42): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_DDR, (43): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_DDR, (44): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_DDR, (45): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# Possible options: <STOP, CMD_SDR, RADDR_SDR, CADDR_SDR, MODE1_SDR, MODE2_SDR, MODE4_SDR, MODE8_SDR, WRITE_SDR,
# READ_SDR, LEARN_SDR, DATSZ_SDR, DUMMY_SDR, DUMMY_RWDS_SDR, JMP_ON_CS, CMD_DDR, RADDR_DDR, CADDR_DDR, MODE1_DDR,
# MODE2_DDR, MODE4_DDR, MODE8_DDR, WRITE_DDR, READ_DDR, LEARN_DDR, DATSZ_DDR, DUMMY_DDR, DUMMY_RWDS_DDR>
OPERATION_CODE: STOP
lookupTable_seq8_instr1:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq8_instr2:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq8_instr3:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq8_instr4:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq8_instr5:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq8_instr6:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq8_instr7:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
# -----------------------------------===== lookupTable_seq9_instr0 [Optional] =====-----------------------------------
# Description: Offset: 0x00000110, Width: 16b; Lookup table holds Flash command sequences 9, instruction 0
lookupTable_seq9_instr0:
# ------------------------------------------===== OPERAND [Optional] =====------------------------------------------
# Description: Offset: 0b, Width: 8b, Instruction operand. Its values depends on used instruction
OPERAND: 0
# -----------------------------------------===== NUM_PADS [Optional] =====------------------------------------------
# Description: Offset: 8b, Width: 2b, Number of pads used by instruction. Some instructions ignores this parameter.
# - 1PAD, (0): Single mode. One pad is used.
# - 2PAD, (1): Dual mode. Two pads are used.
# - 4PAD, (2): Quad mode. Four pads are used.
# - 8PAD, (3): Octal mode. Eight pads are used.
# Possible options: <1PAD, 2PAD, 4PAD, 8PAD>
NUM_PADS: 1PAD
# --------------------------------------===== OPERATION_CODE [Optional] =====---------------------------------------
# Description: Offset: 10b, Width: 6b, Instruction operation code.
# - STOP, (0): Stop execution and de-assert CS. Then, the next command sequence (to the same flash device) starts
# from instruction pointer 0.
# - CMD_SDR, (1): Transmit command code to Flash.
# - RADDR_SDR, (2): Transmit row address to Flash.
# - CADDR_SDR, (3): Transmit column address to Flash.
# - MODE1_SDR, (4): Transmit mode bits to Flash.
# - MODE2_SDR, (5): Transmit mode bits to Flash.
# - MODE4_SDR, (6): Transmit mode bits to Flash.
# - MODE8_SDR, (7): Transmit mode bits to Flash.
# - WRITE_SDR, (8): Transmit program data to Flash device.
# - READ_SDR, (9): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_SDR, (10): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_SDR, (11): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_SDR, (12): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_SDR, (13): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# - JMP_ON_CS, (31): Stop execution, de-assert CS and save operand[7:0] as the instruction start pointer for next
# sequence.Normally this instruction is used to support Execute-In-Place enhanced mode. See XIP enhanced mode for
# more details.This instruction is only allowed for AHB read commands. There is interrupt status bit set
# (INTR[IPCMDERR] or INTR[AHBCMDERR]) when using this instruction in IP command or AHB write command.
# - CMD_DDR, (33): Transmit command code to Flash.
# - RADDR_DDR, (34): Transmit row address to Flash.
# - CADDR_DDR, (35): Transmit column address to Flash.
# - MODE1_DDR, (36): Transmit mode bits to Flash.
# - MODE2_DDR, (37): Transmit mode bits to Flash.
# - MODE4_DDR, (38): Transmit mode bits to Flash.
# - MODE8_DDR, (39): Transmit mode bits to Flash.
# - WRITE_DDR, (40): Transmit program data to Flash device.
# - READ_DDR, (41): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_DDR, (42): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_DDR, (43): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_DDR, (44): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_DDR, (45): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# Possible options: <STOP, CMD_SDR, RADDR_SDR, CADDR_SDR, MODE1_SDR, MODE2_SDR, MODE4_SDR, MODE8_SDR, WRITE_SDR,
# READ_SDR, LEARN_SDR, DATSZ_SDR, DUMMY_SDR, DUMMY_RWDS_SDR, JMP_ON_CS, CMD_DDR, RADDR_DDR, CADDR_DDR, MODE1_DDR,
# MODE2_DDR, MODE4_DDR, MODE8_DDR, WRITE_DDR, READ_DDR, LEARN_DDR, DATSZ_DDR, DUMMY_DDR, DUMMY_RWDS_DDR>
OPERATION_CODE: STOP
lookupTable_seq9_instr1:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq9_instr2:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq9_instr3:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq9_instr4:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq9_instr5:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq9_instr6:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq9_instr7:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
# ----------------------------------===== lookupTable_seq10_instr0 [Optional] =====-----------------------------------
# Description: Offset: 0x00000120, Width: 16b; Lookup table holds Flash command sequences 10, instruction 0
lookupTable_seq10_instr0:
# ------------------------------------------===== OPERAND [Optional] =====------------------------------------------
# Description: Offset: 0b, Width: 8b, Instruction operand. Its values depends on used instruction
OPERAND: 0
# -----------------------------------------===== NUM_PADS [Optional] =====------------------------------------------
# Description: Offset: 8b, Width: 2b, Number of pads used by instruction. Some instructions ignores this parameter.
# - 1PAD, (0): Single mode. One pad is used.
# - 2PAD, (1): Dual mode. Two pads are used.
# - 4PAD, (2): Quad mode. Four pads are used.
# - 8PAD, (3): Octal mode. Eight pads are used.
# Possible options: <1PAD, 2PAD, 4PAD, 8PAD>
NUM_PADS: 1PAD
# --------------------------------------===== OPERATION_CODE [Optional] =====---------------------------------------
# Description: Offset: 10b, Width: 6b, Instruction operation code.
# - STOP, (0): Stop execution and de-assert CS. Then, the next command sequence (to the same flash device) starts
# from instruction pointer 0.
# - CMD_SDR, (1): Transmit command code to Flash.
# - RADDR_SDR, (2): Transmit row address to Flash.
# - CADDR_SDR, (3): Transmit column address to Flash.
# - MODE1_SDR, (4): Transmit mode bits to Flash.
# - MODE2_SDR, (5): Transmit mode bits to Flash.
# - MODE4_SDR, (6): Transmit mode bits to Flash.
# - MODE8_SDR, (7): Transmit mode bits to Flash.
# - WRITE_SDR, (8): Transmit program data to Flash device.
# - READ_SDR, (9): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_SDR, (10): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_SDR, (11): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_SDR, (12): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_SDR, (13): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# - JMP_ON_CS, (31): Stop execution, de-assert CS and save operand[7:0] as the instruction start pointer for next
# sequence.Normally this instruction is used to support Execute-In-Place enhanced mode. See XIP enhanced mode for
# more details.This instruction is only allowed for AHB read commands. There is interrupt status bit set
# (INTR[IPCMDERR] or INTR[AHBCMDERR]) when using this instruction in IP command or AHB write command.
# - CMD_DDR, (33): Transmit command code to Flash.
# - RADDR_DDR, (34): Transmit row address to Flash.
# - CADDR_DDR, (35): Transmit column address to Flash.
# - MODE1_DDR, (36): Transmit mode bits to Flash.
# - MODE2_DDR, (37): Transmit mode bits to Flash.
# - MODE4_DDR, (38): Transmit mode bits to Flash.
# - MODE8_DDR, (39): Transmit mode bits to Flash.
# - WRITE_DDR, (40): Transmit program data to Flash device.
# - READ_DDR, (41): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_DDR, (42): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_DDR, (43): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_DDR, (44): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_DDR, (45): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# Possible options: <STOP, CMD_SDR, RADDR_SDR, CADDR_SDR, MODE1_SDR, MODE2_SDR, MODE4_SDR, MODE8_SDR, WRITE_SDR,
# READ_SDR, LEARN_SDR, DATSZ_SDR, DUMMY_SDR, DUMMY_RWDS_SDR, JMP_ON_CS, CMD_DDR, RADDR_DDR, CADDR_DDR, MODE1_DDR,
# MODE2_DDR, MODE4_DDR, MODE8_DDR, WRITE_DDR, READ_DDR, LEARN_DDR, DATSZ_DDR, DUMMY_DDR, DUMMY_RWDS_DDR>
OPERATION_CODE: STOP
lookupTable_seq10_instr1:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq10_instr2:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq10_instr3:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq10_instr4:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq10_instr5:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq10_instr6:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq10_instr7:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
# ----------------------------------===== lookupTable_seq11_instr0 [Optional] =====-----------------------------------
# Description: Offset: 0x00000130, Width: 16b; Lookup table holds Flash command sequences 11, instruction 0
lookupTable_seq11_instr0:
# ------------------------------------------===== OPERAND [Optional] =====------------------------------------------
# Description: Offset: 0b, Width: 8b, Instruction operand. Its values depends on used instruction
OPERAND: 0
# -----------------------------------------===== NUM_PADS [Optional] =====------------------------------------------
# Description: Offset: 8b, Width: 2b, Number of pads used by instruction. Some instructions ignores this parameter.
# - 1PAD, (0): Single mode. One pad is used.
# - 2PAD, (1): Dual mode. Two pads are used.
# - 4PAD, (2): Quad mode. Four pads are used.
# - 8PAD, (3): Octal mode. Eight pads are used.
# Possible options: <1PAD, 2PAD, 4PAD, 8PAD>
NUM_PADS: 1PAD
# --------------------------------------===== OPERATION_CODE [Optional] =====---------------------------------------
# Description: Offset: 10b, Width: 6b, Instruction operation code.
# - STOP, (0): Stop execution and de-assert CS. Then, the next command sequence (to the same flash device) starts
# from instruction pointer 0.
# - CMD_SDR, (1): Transmit command code to Flash.
# - RADDR_SDR, (2): Transmit row address to Flash.
# - CADDR_SDR, (3): Transmit column address to Flash.
# - MODE1_SDR, (4): Transmit mode bits to Flash.
# - MODE2_SDR, (5): Transmit mode bits to Flash.
# - MODE4_SDR, (6): Transmit mode bits to Flash.
# - MODE8_SDR, (7): Transmit mode bits to Flash.
# - WRITE_SDR, (8): Transmit program data to Flash device.
# - READ_SDR, (9): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_SDR, (10): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_SDR, (11): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_SDR, (12): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_SDR, (13): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# - JMP_ON_CS, (31): Stop execution, de-assert CS and save operand[7:0] as the instruction start pointer for next
# sequence.Normally this instruction is used to support Execute-In-Place enhanced mode. See XIP enhanced mode for
# more details.This instruction is only allowed for AHB read commands. There is interrupt status bit set
# (INTR[IPCMDERR] or INTR[AHBCMDERR]) when using this instruction in IP command or AHB write command.
# - CMD_DDR, (33): Transmit command code to Flash.
# - RADDR_DDR, (34): Transmit row address to Flash.
# - CADDR_DDR, (35): Transmit column address to Flash.
# - MODE1_DDR, (36): Transmit mode bits to Flash.
# - MODE2_DDR, (37): Transmit mode bits to Flash.
# - MODE4_DDR, (38): Transmit mode bits to Flash.
# - MODE8_DDR, (39): Transmit mode bits to Flash.
# - WRITE_DDR, (40): Transmit program data to Flash device.
# - READ_DDR, (41): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_DDR, (42): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_DDR, (43): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_DDR, (44): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_DDR, (45): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# Possible options: <STOP, CMD_SDR, RADDR_SDR, CADDR_SDR, MODE1_SDR, MODE2_SDR, MODE4_SDR, MODE8_SDR, WRITE_SDR,
# READ_SDR, LEARN_SDR, DATSZ_SDR, DUMMY_SDR, DUMMY_RWDS_SDR, JMP_ON_CS, CMD_DDR, RADDR_DDR, CADDR_DDR, MODE1_DDR,
# MODE2_DDR, MODE4_DDR, MODE8_DDR, WRITE_DDR, READ_DDR, LEARN_DDR, DATSZ_DDR, DUMMY_DDR, DUMMY_RWDS_DDR>
OPERATION_CODE: STOP
lookupTable_seq11_instr1:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq11_instr2:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq11_instr3:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq11_instr4:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq11_instr5:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq11_instr6:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq11_instr7:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
# ----------------------------------===== lookupTable_seq12_instr0 [Optional] =====-----------------------------------
# Description: Offset: 0x00000140, Width: 16b; Lookup table holds Flash command sequences 12, instruction 0
lookupTable_seq12_instr0:
# ------------------------------------------===== OPERAND [Optional] =====------------------------------------------
# Description: Offset: 0b, Width: 8b, Instruction operand. Its values depends on used instruction
OPERAND: 0
# -----------------------------------------===== NUM_PADS [Optional] =====------------------------------------------
# Description: Offset: 8b, Width: 2b, Number of pads used by instruction. Some instructions ignores this parameter.
# - 1PAD, (0): Single mode. One pad is used.
# - 2PAD, (1): Dual mode. Two pads are used.
# - 4PAD, (2): Quad mode. Four pads are used.
# - 8PAD, (3): Octal mode. Eight pads are used.
# Possible options: <1PAD, 2PAD, 4PAD, 8PAD>
NUM_PADS: 1PAD
# --------------------------------------===== OPERATION_CODE [Optional] =====---------------------------------------
# Description: Offset: 10b, Width: 6b, Instruction operation code.
# - STOP, (0): Stop execution and de-assert CS. Then, the next command sequence (to the same flash device) starts
# from instruction pointer 0.
# - CMD_SDR, (1): Transmit command code to Flash.
# - RADDR_SDR, (2): Transmit row address to Flash.
# - CADDR_SDR, (3): Transmit column address to Flash.
# - MODE1_SDR, (4): Transmit mode bits to Flash.
# - MODE2_SDR, (5): Transmit mode bits to Flash.
# - MODE4_SDR, (6): Transmit mode bits to Flash.
# - MODE8_SDR, (7): Transmit mode bits to Flash.
# - WRITE_SDR, (8): Transmit program data to Flash device.
# - READ_SDR, (9): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_SDR, (10): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_SDR, (11): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_SDR, (12): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_SDR, (13): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# - JMP_ON_CS, (31): Stop execution, de-assert CS and save operand[7:0] as the instruction start pointer for next
# sequence.Normally this instruction is used to support Execute-In-Place enhanced mode. See XIP enhanced mode for
# more details.This instruction is only allowed for AHB read commands. There is interrupt status bit set
# (INTR[IPCMDERR] or INTR[AHBCMDERR]) when using this instruction in IP command or AHB write command.
# - CMD_DDR, (33): Transmit command code to Flash.
# - RADDR_DDR, (34): Transmit row address to Flash.
# - CADDR_DDR, (35): Transmit column address to Flash.
# - MODE1_DDR, (36): Transmit mode bits to Flash.
# - MODE2_DDR, (37): Transmit mode bits to Flash.
# - MODE4_DDR, (38): Transmit mode bits to Flash.
# - MODE8_DDR, (39): Transmit mode bits to Flash.
# - WRITE_DDR, (40): Transmit program data to Flash device.
# - READ_DDR, (41): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_DDR, (42): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_DDR, (43): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_DDR, (44): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_DDR, (45): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# Possible options: <STOP, CMD_SDR, RADDR_SDR, CADDR_SDR, MODE1_SDR, MODE2_SDR, MODE4_SDR, MODE8_SDR, WRITE_SDR,
# READ_SDR, LEARN_SDR, DATSZ_SDR, DUMMY_SDR, DUMMY_RWDS_SDR, JMP_ON_CS, CMD_DDR, RADDR_DDR, CADDR_DDR, MODE1_DDR,
# MODE2_DDR, MODE4_DDR, MODE8_DDR, WRITE_DDR, READ_DDR, LEARN_DDR, DATSZ_DDR, DUMMY_DDR, DUMMY_RWDS_DDR>
OPERATION_CODE: STOP
lookupTable_seq12_instr1:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq12_instr2:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq12_instr3:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq12_instr4:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq12_instr5:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq12_instr6:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq12_instr7:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
# ----------------------------------===== lookupTable_seq13_instr0 [Optional] =====-----------------------------------
# Description: Offset: 0x00000150, Width: 16b; Lookup table holds Flash command sequences 13, instruction 0
lookupTable_seq13_instr0:
# ------------------------------------------===== OPERAND [Optional] =====------------------------------------------
# Description: Offset: 0b, Width: 8b, Instruction operand. Its values depends on used instruction
OPERAND: 0
# -----------------------------------------===== NUM_PADS [Optional] =====------------------------------------------
# Description: Offset: 8b, Width: 2b, Number of pads used by instruction. Some instructions ignores this parameter.
# - 1PAD, (0): Single mode. One pad is used.
# - 2PAD, (1): Dual mode. Two pads are used.
# - 4PAD, (2): Quad mode. Four pads are used.
# - 8PAD, (3): Octal mode. Eight pads are used.
# Possible options: <1PAD, 2PAD, 4PAD, 8PAD>
NUM_PADS: 1PAD
# --------------------------------------===== OPERATION_CODE [Optional] =====---------------------------------------
# Description: Offset: 10b, Width: 6b, Instruction operation code.
# - STOP, (0): Stop execution and de-assert CS. Then, the next command sequence (to the same flash device) starts
# from instruction pointer 0.
# - CMD_SDR, (1): Transmit command code to Flash.
# - RADDR_SDR, (2): Transmit row address to Flash.
# - CADDR_SDR, (3): Transmit column address to Flash.
# - MODE1_SDR, (4): Transmit mode bits to Flash.
# - MODE2_SDR, (5): Transmit mode bits to Flash.
# - MODE4_SDR, (6): Transmit mode bits to Flash.
# - MODE8_SDR, (7): Transmit mode bits to Flash.
# - WRITE_SDR, (8): Transmit program data to Flash device.
# - READ_SDR, (9): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_SDR, (10): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_SDR, (11): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_SDR, (12): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_SDR, (13): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# - JMP_ON_CS, (31): Stop execution, de-assert CS and save operand[7:0] as the instruction start pointer for next
# sequence.Normally this instruction is used to support Execute-In-Place enhanced mode. See XIP enhanced mode for
# more details.This instruction is only allowed for AHB read commands. There is interrupt status bit set
# (INTR[IPCMDERR] or INTR[AHBCMDERR]) when using this instruction in IP command or AHB write command.
# - CMD_DDR, (33): Transmit command code to Flash.
# - RADDR_DDR, (34): Transmit row address to Flash.
# - CADDR_DDR, (35): Transmit column address to Flash.
# - MODE1_DDR, (36): Transmit mode bits to Flash.
# - MODE2_DDR, (37): Transmit mode bits to Flash.
# - MODE4_DDR, (38): Transmit mode bits to Flash.
# - MODE8_DDR, (39): Transmit mode bits to Flash.
# - WRITE_DDR, (40): Transmit program data to Flash device.
# - READ_DDR, (41): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_DDR, (42): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_DDR, (43): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_DDR, (44): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_DDR, (45): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# Possible options: <STOP, CMD_SDR, RADDR_SDR, CADDR_SDR, MODE1_SDR, MODE2_SDR, MODE4_SDR, MODE8_SDR, WRITE_SDR,
# READ_SDR, LEARN_SDR, DATSZ_SDR, DUMMY_SDR, DUMMY_RWDS_SDR, JMP_ON_CS, CMD_DDR, RADDR_DDR, CADDR_DDR, MODE1_DDR,
# MODE2_DDR, MODE4_DDR, MODE8_DDR, WRITE_DDR, READ_DDR, LEARN_DDR, DATSZ_DDR, DUMMY_DDR, DUMMY_RWDS_DDR>
OPERATION_CODE: STOP
lookupTable_seq13_instr1:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq13_instr2:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq13_instr3:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq13_instr4:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq13_instr5:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq13_instr6:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq13_instr7:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
# ----------------------------------===== lookupTable_seq14_instr0 [Optional] =====-----------------------------------
# Description: Offset: 0x00000160, Width: 16b; Lookup table holds Flash command sequences 14, instruction 0
lookupTable_seq14_instr0:
# ------------------------------------------===== OPERAND [Optional] =====------------------------------------------
# Description: Offset: 0b, Width: 8b, Instruction operand. Its values depends on used instruction
OPERAND: 0
# -----------------------------------------===== NUM_PADS [Optional] =====------------------------------------------
# Description: Offset: 8b, Width: 2b, Number of pads used by instruction. Some instructions ignores this parameter.
# - 1PAD, (0): Single mode. One pad is used.
# - 2PAD, (1): Dual mode. Two pads are used.
# - 4PAD, (2): Quad mode. Four pads are used.
# - 8PAD, (3): Octal mode. Eight pads are used.
# Possible options: <1PAD, 2PAD, 4PAD, 8PAD>
NUM_PADS: 1PAD
# --------------------------------------===== OPERATION_CODE [Optional] =====---------------------------------------
# Description: Offset: 10b, Width: 6b, Instruction operation code.
# - STOP, (0): Stop execution and de-assert CS. Then, the next command sequence (to the same flash device) starts
# from instruction pointer 0.
# - CMD_SDR, (1): Transmit command code to Flash.
# - RADDR_SDR, (2): Transmit row address to Flash.
# - CADDR_SDR, (3): Transmit column address to Flash.
# - MODE1_SDR, (4): Transmit mode bits to Flash.
# - MODE2_SDR, (5): Transmit mode bits to Flash.
# - MODE4_SDR, (6): Transmit mode bits to Flash.
# - MODE8_SDR, (7): Transmit mode bits to Flash.
# - WRITE_SDR, (8): Transmit program data to Flash device.
# - READ_SDR, (9): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_SDR, (10): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_SDR, (11): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_SDR, (12): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_SDR, (13): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# - JMP_ON_CS, (31): Stop execution, de-assert CS and save operand[7:0] as the instruction start pointer for next
# sequence.Normally this instruction is used to support Execute-In-Place enhanced mode. See XIP enhanced mode for
# more details.This instruction is only allowed for AHB read commands. There is interrupt status bit set
# (INTR[IPCMDERR] or INTR[AHBCMDERR]) when using this instruction in IP command or AHB write command.
# - CMD_DDR, (33): Transmit command code to Flash.
# - RADDR_DDR, (34): Transmit row address to Flash.
# - CADDR_DDR, (35): Transmit column address to Flash.
# - MODE1_DDR, (36): Transmit mode bits to Flash.
# - MODE2_DDR, (37): Transmit mode bits to Flash.
# - MODE4_DDR, (38): Transmit mode bits to Flash.
# - MODE8_DDR, (39): Transmit mode bits to Flash.
# - WRITE_DDR, (40): Transmit program data to Flash device.
# - READ_DDR, (41): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_DDR, (42): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_DDR, (43): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_DDR, (44): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_DDR, (45): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# Possible options: <STOP, CMD_SDR, RADDR_SDR, CADDR_SDR, MODE1_SDR, MODE2_SDR, MODE4_SDR, MODE8_SDR, WRITE_SDR,
# READ_SDR, LEARN_SDR, DATSZ_SDR, DUMMY_SDR, DUMMY_RWDS_SDR, JMP_ON_CS, CMD_DDR, RADDR_DDR, CADDR_DDR, MODE1_DDR,
# MODE2_DDR, MODE4_DDR, MODE8_DDR, WRITE_DDR, READ_DDR, LEARN_DDR, DATSZ_DDR, DUMMY_DDR, DUMMY_RWDS_DDR>
OPERATION_CODE: STOP
lookupTable_seq14_instr1:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq14_instr2:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq14_instr3:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq14_instr4:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq14_instr5:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq14_instr6:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq14_instr7:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
# ----------------------------------===== lookupTable_seq15_instr0 [Optional] =====-----------------------------------
# Description: Offset: 0x00000170, Width: 16b; Lookup table holds Flash command sequences 15, instruction 0
lookupTable_seq15_instr0:
# ------------------------------------------===== OPERAND [Optional] =====------------------------------------------
# Description: Offset: 0b, Width: 8b, Instruction operand. Its values depends on used instruction
OPERAND: 0
# -----------------------------------------===== NUM_PADS [Optional] =====------------------------------------------
# Description: Offset: 8b, Width: 2b, Number of pads used by instruction. Some instructions ignores this parameter.
# - 1PAD, (0): Single mode. One pad is used.
# - 2PAD, (1): Dual mode. Two pads are used.
# - 4PAD, (2): Quad mode. Four pads are used.
# - 8PAD, (3): Octal mode. Eight pads are used.
# Possible options: <1PAD, 2PAD, 4PAD, 8PAD>
NUM_PADS: 1PAD
# --------------------------------------===== OPERATION_CODE [Optional] =====---------------------------------------
# Description: Offset: 10b, Width: 6b, Instruction operation code.
# - STOP, (0): Stop execution and de-assert CS. Then, the next command sequence (to the same flash device) starts
# from instruction pointer 0.
# - CMD_SDR, (1): Transmit command code to Flash.
# - RADDR_SDR, (2): Transmit row address to Flash.
# - CADDR_SDR, (3): Transmit column address to Flash.
# - MODE1_SDR, (4): Transmit mode bits to Flash.
# - MODE2_SDR, (5): Transmit mode bits to Flash.
# - MODE4_SDR, (6): Transmit mode bits to Flash.
# - MODE8_SDR, (7): Transmit mode bits to Flash.
# - WRITE_SDR, (8): Transmit program data to Flash device.
# - READ_SDR, (9): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_SDR, (10): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_SDR, (11): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_SDR, (12): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_SDR, (13): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# - JMP_ON_CS, (31): Stop execution, de-assert CS and save operand[7:0] as the instruction start pointer for next
# sequence.Normally this instruction is used to support Execute-In-Place enhanced mode. See XIP enhanced mode for
# more details.This instruction is only allowed for AHB read commands. There is interrupt status bit set
# (INTR[IPCMDERR] or INTR[AHBCMDERR]) when using this instruction in IP command or AHB write command.
# - CMD_DDR, (33): Transmit command code to Flash.
# - RADDR_DDR, (34): Transmit row address to Flash.
# - CADDR_DDR, (35): Transmit column address to Flash.
# - MODE1_DDR, (36): Transmit mode bits to Flash.
# - MODE2_DDR, (37): Transmit mode bits to Flash.
# - MODE4_DDR, (38): Transmit mode bits to Flash.
# - MODE8_DDR, (39): Transmit mode bits to Flash.
# - WRITE_DDR, (40): Transmit program data to Flash device.
# - READ_DDR, (41): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_DDR, (42): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_DDR, (43): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_DDR, (44): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_DDR, (45): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# Possible options: <STOP, CMD_SDR, RADDR_SDR, CADDR_SDR, MODE1_SDR, MODE2_SDR, MODE4_SDR, MODE8_SDR, WRITE_SDR,
# READ_SDR, LEARN_SDR, DATSZ_SDR, DUMMY_SDR, DUMMY_RWDS_SDR, JMP_ON_CS, CMD_DDR, RADDR_DDR, CADDR_DDR, MODE1_DDR,
# MODE2_DDR, MODE4_DDR, MODE8_DDR, WRITE_DDR, READ_DDR, LEARN_DDR, DATSZ_DDR, DUMMY_DDR, DUMMY_RWDS_DDR>
OPERATION_CODE: STOP
lookupTable_seq15_instr1:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq15_instr2:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq15_instr3:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq15_instr4:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq15_instr5:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq15_instr6:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq15_instr7:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
# ---------------------------------------===== lutCustomSeq_0 [Optional] =====----------------------------------------
# Description: Offset: 0x00000180, Width: 32b; [0x180-0x1af] Customizable LUT Sequences
lutCustomSeq_0:
# ------------------------------------------===== seqNum [Optional] =====-------------------------------------------
# Description: Offset: 0b, Width: 8b, Sequence Number, valid number: 1-16
seqNum: 0
# -------------------------------------------===== seqId [Optional] =====-------------------------------------------
# Description: Offset: 8b, Width: 8b, Sequence Index, valid number: 0-15
seqId: 0
# -----------------------------------------===== reserved [Optional] =====------------------------------------------
# Description: Offset: 16b, Width: 16b, N/A
reserved: 0
# ---------------------------------------===== lutCustomSeq_1 [Optional] =====----------------------------------------
# Description: Offset: 0x00000184, Width: 32b; [0x180-0x1af] Customizable LUT Sequences
lutCustomSeq_1:
# ------------------------------------------===== seqNum [Optional] =====-------------------------------------------
# Description: Offset: 0b, Width: 8b, Sequence Number, valid number: 1-16
seqNum: 0
# -------------------------------------------===== seqId [Optional] =====-------------------------------------------
# Description: Offset: 8b, Width: 8b, Sequence Index, valid number: 0-15
seqId: 0
# -----------------------------------------===== reserved [Optional] =====------------------------------------------
# Description: Offset: 16b, Width: 16b, N/A
reserved: 0
# ---------------------------------------===== lutCustomSeq_2 [Optional] =====----------------------------------------
# Description: Offset: 0x00000188, Width: 32b; [0x180-0x1af] Customizable LUT Sequences
lutCustomSeq_2:
# ------------------------------------------===== seqNum [Optional] =====-------------------------------------------
# Description: Offset: 0b, Width: 8b, Sequence Number, valid number: 1-16
seqNum: 0
# -------------------------------------------===== seqId [Optional] =====-------------------------------------------
# Description: Offset: 8b, Width: 8b, Sequence Index, valid number: 0-15
seqId: 0
# -----------------------------------------===== reserved [Optional] =====------------------------------------------
# Description: Offset: 16b, Width: 16b, N/A
reserved: 0
# ---------------------------------------===== lutCustomSeq_3 [Optional] =====----------------------------------------
# Description: Offset: 0x0000018C, Width: 32b; [0x180-0x1af] Customizable LUT Sequences
lutCustomSeq_3:
# ------------------------------------------===== seqNum [Optional] =====-------------------------------------------
# Description: Offset: 0b, Width: 8b, Sequence Number, valid number: 1-16
seqNum: 0
# -------------------------------------------===== seqId [Optional] =====-------------------------------------------
# Description: Offset: 8b, Width: 8b, Sequence Index, valid number: 0-15
seqId: 0
# -----------------------------------------===== reserved [Optional] =====------------------------------------------
# Description: Offset: 16b, Width: 16b, N/A
reserved: 0
# ---------------------------------------===== lutCustomSeq_4 [Optional] =====----------------------------------------
# Description: Offset: 0x00000190, Width: 32b; [0x180-0x1af] Customizable LUT Sequences
lutCustomSeq_4:
# ------------------------------------------===== seqNum [Optional] =====-------------------------------------------
# Description: Offset: 0b, Width: 8b, Sequence Number, valid number: 1-16
seqNum: 0
# -------------------------------------------===== seqId [Optional] =====-------------------------------------------
# Description: Offset: 8b, Width: 8b, Sequence Index, valid number: 0-15
seqId: 0
# -----------------------------------------===== reserved [Optional] =====------------------------------------------
# Description: Offset: 16b, Width: 16b, N/A
reserved: 0
# ---------------------------------------===== lutCustomSeq_5 [Optional] =====----------------------------------------
# Description: Offset: 0x00000194, Width: 32b; [0x180-0x1af] Customizable LUT Sequences
lutCustomSeq_5:
# ------------------------------------------===== seqNum [Optional] =====-------------------------------------------
# Description: Offset: 0b, Width: 8b, Sequence Number, valid number: 1-16
seqNum: 0
# -------------------------------------------===== seqId [Optional] =====-------------------------------------------
# Description: Offset: 8b, Width: 8b, Sequence Index, valid number: 0-15
seqId: 0
# -----------------------------------------===== reserved [Optional] =====------------------------------------------
# Description: Offset: 16b, Width: 16b, N/A
reserved: 0
# ---------------------------------------===== lutCustomSeq_6 [Optional] =====----------------------------------------
# Description: Offset: 0x00000198, Width: 32b; [0x180-0x1af] Customizable LUT Sequences
lutCustomSeq_6:
# ------------------------------------------===== seqNum [Optional] =====-------------------------------------------
# Description: Offset: 0b, Width: 8b, Sequence Number, valid number: 1-16
seqNum: 0
# -------------------------------------------===== seqId [Optional] =====-------------------------------------------
# Description: Offset: 8b, Width: 8b, Sequence Index, valid number: 0-15
seqId: 0
# -----------------------------------------===== reserved [Optional] =====------------------------------------------
# Description: Offset: 16b, Width: 16b, N/A
reserved: 0
# ---------------------------------------===== lutCustomSeq_7 [Optional] =====----------------------------------------
# Description: Offset: 0x0000019C, Width: 32b; [0x180-0x1af] Customizable LUT Sequences
lutCustomSeq_7:
# ------------------------------------------===== seqNum [Optional] =====-------------------------------------------
# Description: Offset: 0b, Width: 8b, Sequence Number, valid number: 1-16
seqNum: 0
# -------------------------------------------===== seqId [Optional] =====-------------------------------------------
# Description: Offset: 8b, Width: 8b, Sequence Index, valid number: 0-15
seqId: 0
# -----------------------------------------===== reserved [Optional] =====------------------------------------------
# Description: Offset: 16b, Width: 16b, N/A
reserved: 0
# ---------------------------------------===== lutCustomSeq_8 [Optional] =====----------------------------------------
# Description: Offset: 0x000001A0, Width: 32b; [0x180-0x1af] Customizable LUT Sequences
lutCustomSeq_8:
# ------------------------------------------===== seqNum [Optional] =====-------------------------------------------
# Description: Offset: 0b, Width: 8b, Sequence Number, valid number: 1-16
seqNum: 0
# -------------------------------------------===== seqId [Optional] =====-------------------------------------------
# Description: Offset: 8b, Width: 8b, Sequence Index, valid number: 0-15
seqId: 0
# -----------------------------------------===== reserved [Optional] =====------------------------------------------
# Description: Offset: 16b, Width: 16b, N/A
reserved: 0
# ---------------------------------------===== lutCustomSeq_9 [Optional] =====----------------------------------------
# Description: Offset: 0x000001A4, Width: 32b; [0x180-0x1af] Customizable LUT Sequences
lutCustomSeq_9:
# ------------------------------------------===== seqNum [Optional] =====-------------------------------------------
# Description: Offset: 0b, Width: 8b, Sequence Number, valid number: 1-16
seqNum: 0
# -------------------------------------------===== seqId [Optional] =====-------------------------------------------
# Description: Offset: 8b, Width: 8b, Sequence Index, valid number: 0-15
seqId: 0
# -----------------------------------------===== reserved [Optional] =====------------------------------------------
# Description: Offset: 16b, Width: 16b, N/A
reserved: 0
# ---------------------------------------===== lutCustomSeq_10 [Optional] =====---------------------------------------
# Description: Offset: 0x000001A8, Width: 32b; [0x180-0x1af] Customizable LUT Sequences
lutCustomSeq_10:
# ------------------------------------------===== seqNum [Optional] =====-------------------------------------------
# Description: Offset: 0b, Width: 8b, Sequence Number, valid number: 1-16
seqNum: 0
# -------------------------------------------===== seqId [Optional] =====-------------------------------------------
# Description: Offset: 8b, Width: 8b, Sequence Index, valid number: 0-15
seqId: 0
# -----------------------------------------===== reserved [Optional] =====------------------------------------------
# Description: Offset: 16b, Width: 16b, N/A
reserved: 0
# ---------------------------------------===== lutCustomSeq_11 [Optional] =====---------------------------------------
# Description: Offset: 0x000001AC, Width: 32b; [0x180-0x1af] Customizable LUT Sequences
lutCustomSeq_11:
# ------------------------------------------===== seqNum [Optional] =====-------------------------------------------
# Description: Offset: 0b, Width: 8b, Sequence Number, valid number: 1-16
seqNum: 0
# -------------------------------------------===== seqId [Optional] =====-------------------------------------------
# Description: Offset: 8b, Width: 8b, Sequence Index, valid number: 0-15
seqId: 0
# -----------------------------------------===== reserved [Optional] =====------------------------------------------
# Description: Offset: 16b, Width: 16b, N/A
reserved: 0
# -----------------------------------------===== reserved4_0 [Optional] =====-----------------------------------------
# Description: Offset: 0x000001B0, Width: 32b; [0x1b0-0x1bf] Reserved for future use
reserved4_0: '0x00000000'
# -----------------------------------------===== reserved4_1 [Optional] =====-----------------------------------------
# Description: Offset: 0x000001B4, Width: 32b; [0x1b0-0x1bf] Reserved for future use
reserved4_1: '0x00000000'
# -----------------------------------------===== reserved4_2 [Optional] =====-----------------------------------------
# Description: Offset: 0x000001B8, Width: 32b; [0x1b0-0x1bf] Reserved for future use
reserved4_2: '0x00000000'
# -----------------------------------------===== reserved4_3 [Optional] =====-----------------------------------------
# Description: Offset: 0x000001BC, Width: 32b; [0x1b0-0x1bf] Reserved for future use
reserved4_3: '0x00000000'
# ------------------------------------------===== pageSize [Optional] =====-------------------------------------------
# Description: Offset: 0x000001C0, Width: 32b; Page size of Serial NOR
pageSize: '0x00000000'
# -----------------------------------------===== sectorSize [Optional] =====------------------------------------------
# Description: Offset: 0x000001C4, Width: 32b; Sector size of Serial NOR
sectorSize: '0x00000000'
# -------------------------------------===== ipcmdSerialClkFreq [Optional] =====--------------------------------------
# Description: Offset: 0x000001C8, Width: 8b; Clock frequency for IP command
ipcmdSerialClkFreq: '0x00'
# -------------------------------------===== isUniformBlockSize [Optional] =====--------------------------------------
# Description: Offset: 0x000001C9, Width: 8b; Sector/Block size is the same
isUniformBlockSize: '0x00'
# -------------------------------------===== isDataOrderSwapped [Optional] =====--------------------------------------
# Description: Offset: 0x000001CA, Width: 8b; Data order (D0, D1, D2, D3) is swapped (D1,D0, D3, D2)
isDataOrderSwapped: '0x00'
# -----------------------------------------===== reserved0_0 [Optional] =====-----------------------------------------
# Description: Offset: 0x000001CB, Width: 8b; Reserved for future use
reserved0_0: '0x00'
# ----------------------------------------===== serialNorType [Optional] =====----------------------------------------
# Description: Offset: 0x000001CC, Width: 8b; Serial NOR Flash type: 0/1/2/3
serialNorType: '0x00'
# --------------------------------------===== needExitNoCmdMode [Optional] =====--------------------------------------
# Description: Offset: 0x000001CD, Width: 8b; Need to exit NoCmd mode before other IP command
needExitNoCmdMode: '0x00'
# ------------------------------------===== halfClkForNonReadCmd [Optional] =====-------------------------------------
# Description: Offset: 0x000001CE, Width: 8b; Half the Serial Clock for non-read command: true/false
halfClkForNonReadCmd: '0x00'
# ------------------------------------===== needRestoreNoCmdMode [Optional] =====-------------------------------------
# Description: Offset: 0x000001CF, Width: 8b; Need to Restore NoCmd mode after IP command execution
needRestoreNoCmdMode: '0x00'
# ------------------------------------------===== blockSize [Optional] =====------------------------------------------
# Description: Offset: 0x000001D0, Width: 32b; Block size
blockSize: '0x00000000'
# ----------------------------------------===== flashStateCtx [Optional] =====----------------------------------------
# Description: Offset: 0x000001D4, Width: 32b; Flash State Context
flashStateCtx: '0x00000000'
# -----------------------------------------===== reserve2_0 [Optional] =====------------------------------------------
# Description: Offset: 0x000001D8, Width: 32b; Reserved for future use
reserve2_0: '0x00000000'
# -----------------------------------------===== reserve2_1 [Optional] =====------------------------------------------
# Description: Offset: 0x000001DC, Width: 32b; Reserved for future use
reserve2_1: '0x00000000'
# -----------------------------------------===== reserve2_2 [Optional] =====------------------------------------------
# Description: Offset: 0x000001E0, Width: 32b; Reserved for future use
reserve2_2: '0x00000000'
# -----------------------------------------===== reserve2_3 [Optional] =====------------------------------------------
# Description: Offset: 0x000001E4, Width: 32b; Reserved for future use
reserve2_3: '0x00000000'
# -----------------------------------------===== reserve2_4 [Optional] =====------------------------------------------
# Description: Offset: 0x000001E8, Width: 32b; Reserved for future use
reserve2_4: '0x00000000'
# -----------------------------------------===== reserve2_5 [Optional] =====------------------------------------------
# Description: Offset: 0x000001EC, Width: 32b; Reserved for future use
reserve2_5: '0x00000000'
# -----------------------------------------===== reserve2_6 [Optional] =====------------------------------------------
# Description: Offset: 0x000001F0, Width: 32b; Reserved for future use
reserve2_6: '0x00000000'
# -----------------------------------------===== reserve2_7 [Optional] =====------------------------------------------
# Description: Offset: 0x000001F4, Width: 32b; Reserved for future use
reserve2_7: '0x00000000'
# -----------------------------------------===== reserve2_8 [Optional] =====------------------------------------------
# Description: Offset: 0x000001F8, Width: 32b; Reserved for future use
reserve2_8: '0x00000000'
# -----------------------------------------===== reserve2_9 [Optional] =====------------------------------------------
# Description: Offset: 0x000001FC, Width: 32b; Reserved for future use
reserve2_9: '0x00000000'
FCB for mimxrt685s, Revision: b0 and flexspi_nor#
FCB for mimxrt685s, Revision: b0 and flexspi_nor JSON schema
FCB for mimxrt685s, Revision: b0 and flexspi_nor YAML configuration template
# ================================= FCB for mimxrt685s, Revision: b0 and flexspi_nor =================================
# ======================================================================================================================
# == FCB for mimxrt685s, Revision: b0 and flexspi_nor ==
# ======================================================================================================================
# -------------------------------------===== The chip family name [Required] =====--------------------------------------
# Description: NXP chip family identifier.
family: CHOOSE_FROM_TABLE
# -----------------------------------------===== MCU revision [Optional] =====------------------------------------------
# Description: Revision of silicon. The 'latest' name, means most current revision.
# Possible options: <a0, b0, latest>
revision: b0
# ------------------------------------------===== Memory type [Required] =====------------------------------------------
# Description: Specify type of memory used by FCB description.
# Possible options: <flexspi_nor>
type: flexspi_nor
# ------------------------------------------===== mimxrt685s [Required] =====-------------------------------------------
fcb_settings:
# ---------------------------------------------===== tag [Optional] =====---------------------------------------------
# Description: Offset: 0x00000000, Width: 32b; [0x000-0x003] Tag, fixed value 0x42464346UL
tag: '0x42464346'
# -------------------------------------------===== version [Optional] =====-------------------------------------------
# Description: Offset: 0x00000004, Width: 32b; [0x004-0x007] Version,[31:24] -'V', [23:16] - Major, [15:8] - Minor,
# [7:0] - bugfix
version: '0x56020000'
# ------------------------------------------===== reserved0 [Optional] =====------------------------------------------
# Description: Offset: 0x00000008, Width: 32b; [0x008-0x00b] Reserved for future use
reserved0: '0x00000000'
# --------------------------------------===== readSampleClkSrc [Optional] =====---------------------------------------
# Description: Offset: 0x0000000C, Width: 8b; [0x00c-0x00c] Read Sample Clock Source, valid value: 0/1/3
readSampleClkSrc: '0x00'
# -----------------------------------------===== csHoldTime [Optional] =====------------------------------------------
# Description: Offset: 0x0000000D, Width: 8b; [0x00d-0x00d] CS hold time, default value: 3
csHoldTime: '0x00'
# -----------------------------------------===== csSetupTime [Optional] =====-----------------------------------------
# Description: Offset: 0x0000000E, Width: 8b; [0x00e-0x00e] CS setup time, default value: 3
csSetupTime: '0x00'
# -------------------------------------===== columnAddressWidth [Optional] =====--------------------------------------
# Description: Offset: 0x0000000F, Width: 8b; [0x00f-0x00f] Column Address with, for HyperBus protocol, it is fixed
# to 3, For Serial NAND, need to refer to datasheet
columnAddressWidth: '0x00'
# -------------------------------------===== deviceModeCfgEnable [Optional] =====-------------------------------------
# Description: Offset: 0x00000010, Width: 8b; [0x010-0x010] Device Mode Configure enable flag, 1 - Enable, 0 -
# Disable
deviceModeCfgEnable: '0x00'
# ---------------------------------------===== deviceModeType [Optional] =====----------------------------------------
# Description: Offset: 0x00000011, Width: 8b; [0x011-0x011] Specify the configuration command type:Quad Enable,
# DPI/QPI/OPI switch, Generic configuration, etc.
deviceModeType: '0x00'
# -------------------------------------===== waitTimeCfgCommands [Optional] =====-------------------------------------
# Description: Offset: 0x00000012, Width: 16b; [0x012-0x013] Wait time for all configuration commands, unit: 100us,
# Used for DPI/QPI/OPI switch or reset command
waitTimeCfgCommands: '0x0000'
# ----------------------------------------===== deviceModeSeq [Optional] =====----------------------------------------
# Description: Offset: 0x00000014, Width: 32b; [0x014-0x017] Device mode sequence info, [7:0] - LUT sequence id,
# [15:8] - LUt sequence number, [31:16] Reserved
deviceModeSeq:
# ------------------------------------------===== seqNum [Optional] =====-------------------------------------------
# Description: Offset: 0b, Width: 8b, Sequence Number, valid number: 1-16
seqNum: 0
# -------------------------------------------===== seqId [Optional] =====-------------------------------------------
# Description: Offset: 8b, Width: 8b, Sequence Index, valid number: 0-15
seqId: 0
# -----------------------------------------===== reserved [Optional] =====------------------------------------------
# Description: Offset: 16b, Width: 16b, N/A
reserved: 0
# ----------------------------------------===== deviceModeArg [Optional] =====----------------------------------------
# Description: Offset: 0x00000018, Width: 32b; [0x018-0x01b] Argument/Parameter for device configuration
deviceModeArg: '0x00000000'
# ---------------------------------------===== configCmdEnable [Optional] =====---------------------------------------
# Description: Offset: 0x0000001C, Width: 8b; [0x01c-0x01c] Configure command Enable Flag, 1 - Enable, 0 - Disable
configCmdEnable: '0x00'
# --------------------------------------===== configModeType_0 [Optional] =====---------------------------------------
# Description: Offset: 0x0000001D, Width: 8b; [0x01d-0x01f] Configure Mode Type, similar as deviceModeTpe
configModeType_0: '0x00'
# --------------------------------------===== configModeType_1 [Optional] =====---------------------------------------
# Description: Offset: 0x0000001E, Width: 8b; [0x01d-0x01f] Configure Mode Type, similar as deviceModeTpe
configModeType_1: '0x00'
# --------------------------------------===== configModeType_2 [Optional] =====---------------------------------------
# Description: Offset: 0x0000001F, Width: 8b; [0x01d-0x01f] Configure Mode Type, similar as deviceModeTpe
configModeType_2: '0x00'
# ---------------------------------------===== configCmdSeqs_0 [Optional] =====---------------------------------------
# Description: Offset: 0x00000020, Width: 32b; [0x020-0x02b] Sequence info for Device Configuration command, similar
# as deviceModeSeq
configCmdSeqs_0:
# ------------------------------------------===== seqNum [Optional] =====-------------------------------------------
# Description: Offset: 0b, Width: 8b, Sequence Number, valid number: 1-16
seqNum: 0
# -------------------------------------------===== seqId [Optional] =====-------------------------------------------
# Description: Offset: 8b, Width: 8b, Sequence Index, valid number: 0-15
seqId: 0
# -----------------------------------------===== reserved [Optional] =====------------------------------------------
# Description: Offset: 16b, Width: 16b, N/A
reserved: 0
# ---------------------------------------===== configCmdSeqs_1 [Optional] =====---------------------------------------
# Description: Offset: 0x00000024, Width: 32b; [0x020-0x02b] Sequence info for Device Configuration command, similar
# as deviceModeSeq
configCmdSeqs_1:
# ------------------------------------------===== seqNum [Optional] =====-------------------------------------------
# Description: Offset: 0b, Width: 8b, Sequence Number, valid number: 1-16
seqNum: 0
# -------------------------------------------===== seqId [Optional] =====-------------------------------------------
# Description: Offset: 8b, Width: 8b, Sequence Index, valid number: 0-15
seqId: 0
# -----------------------------------------===== reserved [Optional] =====------------------------------------------
# Description: Offset: 16b, Width: 16b, N/A
reserved: 0
# ---------------------------------------===== configCmdSeqs_2 [Optional] =====---------------------------------------
# Description: Offset: 0x00000028, Width: 32b; [0x020-0x02b] Sequence info for Device Configuration command, similar
# as deviceModeSeq
configCmdSeqs_2:
# ------------------------------------------===== seqNum [Optional] =====-------------------------------------------
# Description: Offset: 0b, Width: 8b, Sequence Number, valid number: 1-16
seqNum: 0
# -------------------------------------------===== seqId [Optional] =====-------------------------------------------
# Description: Offset: 8b, Width: 8b, Sequence Index, valid number: 0-15
seqId: 0
# -----------------------------------------===== reserved [Optional] =====------------------------------------------
# Description: Offset: 16b, Width: 16b, N/A
reserved: 0
# ------------------------------------------===== reserved1 [Optional] =====------------------------------------------
# Description: Offset: 0x0000002C, Width: 32b; [0x02c-0x02f] Reserved for future use
reserved1: '0x00000000'
# ---------------------------------------===== configCmdArgs_0 [Optional] =====---------------------------------------
# Description: Offset: 0x00000030, Width: 32b; [0x030-0x03b] Arguments/Parameters for device Configuration commands
configCmdArgs_0: '0x00000000'
# ---------------------------------------===== configCmdArgs_1 [Optional] =====---------------------------------------
# Description: Offset: 0x00000034, Width: 32b; [0x030-0x03b] Arguments/Parameters for device Configuration commands
configCmdArgs_1: '0x00000000'
# ---------------------------------------===== configCmdArgs_2 [Optional] =====---------------------------------------
# Description: Offset: 0x00000038, Width: 32b; [0x030-0x03b] Arguments/Parameters for device Configuration commands
configCmdArgs_2: '0x00000000'
# ------------------------------------------===== reserved2 [Optional] =====------------------------------------------
# Description: Offset: 0x0000003C, Width: 32b; [0x03c-0x03f] Reserved for future use
reserved2: '0x00000000'
# ------------------------------------===== controllerMiscOption [Optional] =====-------------------------------------
# Description: Offset: 0x00000040, Width: 32b; [0x040-0x043] Controller Misc Options, see Misc feature bit
# definitions for more details
controllerMiscOption: '0x00000000'
# -----------------------------------------===== deviceType [Optional] =====------------------------------------------
# Description: Offset: 0x00000044, Width: 8b; [0x044-0x044] Device Type: See Flash Type Definition for more details
deviceType: '0x00'
# ----------------------------------------===== sflashPadType [Optional] =====----------------------------------------
# Description: Offset: 0x00000045, Width: 8b; [0x045-0x045] Serial Flash Pad Type: 1 - Single, 2 - Dual, 4 - Quad, 8
# - Octal
sflashPadType: '0x00'
# ----------------------------------------===== serialClkFreq [Optional] =====----------------------------------------
# Description: Offset: 0x00000046, Width: 8b; [0x046-0x046] Serial Flash Frequency, device specific definitions, See
# System Boot Chapter for more details
serialClkFreq: '0x00'
# -------------------------------------===== lutCustomSeqEnable [Optional] =====--------------------------------------
# Description: Offset: 0x00000047, Width: 8b; [0x047-0x047] LUT customization Enable, it is required if the
# program/erase cannot be done using 1 LUT sequence, currently, only applicable to HyperFLASH
lutCustomSeqEnable: '0x00'
# -----------------------------------------===== reserved3_0 [Optional] =====-----------------------------------------
# Description: Offset: 0x00000048, Width: 32b; [0x048-0x04f] Reserved for future use
reserved3_0: '0x00000000'
# -----------------------------------------===== reserved3_1 [Optional] =====-----------------------------------------
# Description: Offset: 0x0000004C, Width: 32b; [0x048-0x04f] Reserved for future use
reserved3_1: '0x00000000'
# ----------------------------------------===== sflashA1Size [Optional] =====-----------------------------------------
# Description: Offset: 0x00000050, Width: 32b; [0x050-0x053] Size of Flash connected to A1
sflashA1Size: '0x00000000'
# ----------------------------------------===== sflashA2Size [Optional] =====-----------------------------------------
# Description: Offset: 0x00000054, Width: 32b; [0x054-0x057] Size of Flash connected to A2
sflashA2Size: '0x00000000'
# ----------------------------------------===== sflashB1Size [Optional] =====-----------------------------------------
# Description: Offset: 0x00000058, Width: 32b; [0x058-0x05b] Size of Flash connected to B1
sflashB1Size: '0x00000000'
# ----------------------------------------===== sflashB2Size [Optional] =====-----------------------------------------
# Description: Offset: 0x0000005C, Width: 32b; [0x05c-0x05f] Size of Flash connected to B2
sflashB2Size: '0x00000000'
# ------------------------------------===== csPadSettingOverride [Optional] =====-------------------------------------
# Description: Offset: 0x00000060, Width: 32b; [0x060-0x063] CS pad setting override value
csPadSettingOverride: '0x00000000'
# -----------------------------------===== sclkPadSettingOverride [Optional] =====------------------------------------
# Description: Offset: 0x00000064, Width: 32b; [0x064-0x067] SCK pad setting override value
sclkPadSettingOverride: '0x00000000'
# -----------------------------------===== dataPadSettingOverride [Optional] =====------------------------------------
# Description: Offset: 0x00000068, Width: 32b; [0x068-0x06b] data pad setting override value
dataPadSettingOverride: '0x00000000'
# ------------------------------------===== dqsPadSettingOverride [Optional] =====------------------------------------
# Description: Offset: 0x0000006C, Width: 32b; [0x06c-0x06f] DQS pad setting override value
dqsPadSettingOverride: '0x00000000'
# -----------------------------------------===== timeoutInMs [Optional] =====-----------------------------------------
# Description: Offset: 0x00000070, Width: 32b; [0x070-0x073] Timeout threshold for read status command
timeoutInMs: '0x00000000'
# ---------------------------------------===== commandInterval [Optional] =====---------------------------------------
# Description: Offset: 0x00000074, Width: 32b; [0x074-0x077] CS deselect interval between two commands
commandInterval: '0x00000000'
# ---------------------------------------===== dataValidTime_0 [Optional] =====---------------------------------------
# Description: Offset: 0x00000078, Width: 16b; [0x078-0x07b] CLK edge to data valid time for PORT A and PORT B
dataValidTime_0:
# ----------------------------------------===== time_100ps [Optional] =====-----------------------------------------
# Description: Offset: 0b, Width: 8b, Data valid time, in terms of 100ps
time_100ps: 0
# ----------------------------------------===== delay_cells [Optional] =====----------------------------------------
# Description: Offset: 8b, Width: 8b, Data valid time, in terms of delay cells
delay_cells: 0
# ---------------------------------------===== dataValidTime_1 [Optional] =====---------------------------------------
# Description: Offset: 0x0000007A, Width: 16b; [0x078-0x07b] CLK edge to data valid time for PORT A and PORT B
dataValidTime_1:
# ----------------------------------------===== time_100ps [Optional] =====-----------------------------------------
# Description: Offset: 0b, Width: 8b, Data valid time, in terms of 100ps
time_100ps: 0
# ----------------------------------------===== delay_cells [Optional] =====----------------------------------------
# Description: Offset: 8b, Width: 8b, Data valid time, in terms of delay cells
delay_cells: 0
# -----------------------------------------===== busyOffset [Optional] =====------------------------------------------
# Description: Offset: 0x0000007C, Width: 16b; [0x07c-0x07d] Busy offset, valid value: 0-31
busyOffset: '0x0000'
# ---------------------------------------===== busyBitPolarity [Optional] =====---------------------------------------
# Description: Offset: 0x0000007E, Width: 16b; [0x07e-0x07f] Busy flag polarity, 0 - busy flag is 1 when flash device
# is busy, 1 - busy flag is 0 when flash device is busy
busyBitPolarity: '0x0000'
# -----------------------------------===== lookupTable_seq0_instr0 [Optional] =====-----------------------------------
# Description: Offset: 0x00000080, Width: 16b; Lookup table holds Flash command sequences 0, instruction 0
lookupTable_seq0_instr0:
# ------------------------------------------===== OPERAND [Optional] =====------------------------------------------
# Description: Offset: 0b, Width: 8b, Instruction operand. Its values depends on used instruction
OPERAND: 0
# -----------------------------------------===== NUM_PADS [Optional] =====------------------------------------------
# Description: Offset: 8b, Width: 2b, Number of pads used by instruction. Some instructions ignores this parameter.
# - 1PAD, (0): Single mode. One pad is used.
# - 2PAD, (1): Dual mode. Two pads are used.
# - 4PAD, (2): Quad mode. Four pads are used.
# - 8PAD, (3): Octal mode. Eight pads are used.
# Possible options: <1PAD, 2PAD, 4PAD, 8PAD>
NUM_PADS: 1PAD
# --------------------------------------===== OPERATION_CODE [Optional] =====---------------------------------------
# Description: Offset: 10b, Width: 6b, Instruction operation code.
# - STOP, (0): Stop execution and de-assert CS. Then, the next command sequence (to the same flash device) starts
# from instruction pointer 0.
# - CMD_SDR, (1): Transmit command code to Flash.
# - RADDR_SDR, (2): Transmit row address to Flash.
# - CADDR_SDR, (3): Transmit column address to Flash.
# - MODE1_SDR, (4): Transmit mode bits to Flash.
# - MODE2_SDR, (5): Transmit mode bits to Flash.
# - MODE4_SDR, (6): Transmit mode bits to Flash.
# - MODE8_SDR, (7): Transmit mode bits to Flash.
# - WRITE_SDR, (8): Transmit program data to Flash device.
# - READ_SDR, (9): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_SDR, (10): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_SDR, (11): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_SDR, (12): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_SDR, (13): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# - JMP_ON_CS, (31): Stop execution, de-assert CS and save operand[7:0] as the instruction start pointer for next
# sequence.Normally this instruction is used to support Execute-In-Place enhanced mode. See XIP enhanced mode for
# more details.This instruction is only allowed for AHB read commands. There is interrupt status bit set
# (INTR[IPCMDERR] or INTR[AHBCMDERR]) when using this instruction in IP command or AHB write command.
# - CMD_DDR, (33): Transmit command code to Flash.
# - RADDR_DDR, (34): Transmit row address to Flash.
# - CADDR_DDR, (35): Transmit column address to Flash.
# - MODE1_DDR, (36): Transmit mode bits to Flash.
# - MODE2_DDR, (37): Transmit mode bits to Flash.
# - MODE4_DDR, (38): Transmit mode bits to Flash.
# - MODE8_DDR, (39): Transmit mode bits to Flash.
# - WRITE_DDR, (40): Transmit program data to Flash device.
# - READ_DDR, (41): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_DDR, (42): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_DDR, (43): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_DDR, (44): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_DDR, (45): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# Possible options: <STOP, CMD_SDR, RADDR_SDR, CADDR_SDR, MODE1_SDR, MODE2_SDR, MODE4_SDR, MODE8_SDR, WRITE_SDR,
# READ_SDR, LEARN_SDR, DATSZ_SDR, DUMMY_SDR, DUMMY_RWDS_SDR, JMP_ON_CS, CMD_DDR, RADDR_DDR, CADDR_DDR, MODE1_DDR,
# MODE2_DDR, MODE4_DDR, MODE8_DDR, WRITE_DDR, READ_DDR, LEARN_DDR, DATSZ_DDR, DUMMY_DDR, DUMMY_RWDS_DDR>
OPERATION_CODE: STOP
lookupTable_seq0_instr1:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq0_instr2:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq0_instr3:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq0_instr4:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq0_instr5:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq0_instr6:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq0_instr7:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
# -----------------------------------===== lookupTable_seq1_instr0 [Optional] =====-----------------------------------
# Description: Offset: 0x00000090, Width: 16b; Lookup table holds Flash command sequences 1, instruction 0
lookupTable_seq1_instr0:
# ------------------------------------------===== OPERAND [Optional] =====------------------------------------------
# Description: Offset: 0b, Width: 8b, Instruction operand. Its values depends on used instruction
OPERAND: 0
# -----------------------------------------===== NUM_PADS [Optional] =====------------------------------------------
# Description: Offset: 8b, Width: 2b, Number of pads used by instruction. Some instructions ignores this parameter.
# - 1PAD, (0): Single mode. One pad is used.
# - 2PAD, (1): Dual mode. Two pads are used.
# - 4PAD, (2): Quad mode. Four pads are used.
# - 8PAD, (3): Octal mode. Eight pads are used.
# Possible options: <1PAD, 2PAD, 4PAD, 8PAD>
NUM_PADS: 1PAD
# --------------------------------------===== OPERATION_CODE [Optional] =====---------------------------------------
# Description: Offset: 10b, Width: 6b, Instruction operation code.
# - STOP, (0): Stop execution and de-assert CS. Then, the next command sequence (to the same flash device) starts
# from instruction pointer 0.
# - CMD_SDR, (1): Transmit command code to Flash.
# - RADDR_SDR, (2): Transmit row address to Flash.
# - CADDR_SDR, (3): Transmit column address to Flash.
# - MODE1_SDR, (4): Transmit mode bits to Flash.
# - MODE2_SDR, (5): Transmit mode bits to Flash.
# - MODE4_SDR, (6): Transmit mode bits to Flash.
# - MODE8_SDR, (7): Transmit mode bits to Flash.
# - WRITE_SDR, (8): Transmit program data to Flash device.
# - READ_SDR, (9): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_SDR, (10): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_SDR, (11): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_SDR, (12): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_SDR, (13): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# - JMP_ON_CS, (31): Stop execution, de-assert CS and save operand[7:0] as the instruction start pointer for next
# sequence.Normally this instruction is used to support Execute-In-Place enhanced mode. See XIP enhanced mode for
# more details.This instruction is only allowed for AHB read commands. There is interrupt status bit set
# (INTR[IPCMDERR] or INTR[AHBCMDERR]) when using this instruction in IP command or AHB write command.
# - CMD_DDR, (33): Transmit command code to Flash.
# - RADDR_DDR, (34): Transmit row address to Flash.
# - CADDR_DDR, (35): Transmit column address to Flash.
# - MODE1_DDR, (36): Transmit mode bits to Flash.
# - MODE2_DDR, (37): Transmit mode bits to Flash.
# - MODE4_DDR, (38): Transmit mode bits to Flash.
# - MODE8_DDR, (39): Transmit mode bits to Flash.
# - WRITE_DDR, (40): Transmit program data to Flash device.
# - READ_DDR, (41): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_DDR, (42): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_DDR, (43): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_DDR, (44): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_DDR, (45): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# Possible options: <STOP, CMD_SDR, RADDR_SDR, CADDR_SDR, MODE1_SDR, MODE2_SDR, MODE4_SDR, MODE8_SDR, WRITE_SDR,
# READ_SDR, LEARN_SDR, DATSZ_SDR, DUMMY_SDR, DUMMY_RWDS_SDR, JMP_ON_CS, CMD_DDR, RADDR_DDR, CADDR_DDR, MODE1_DDR,
# MODE2_DDR, MODE4_DDR, MODE8_DDR, WRITE_DDR, READ_DDR, LEARN_DDR, DATSZ_DDR, DUMMY_DDR, DUMMY_RWDS_DDR>
OPERATION_CODE: STOP
lookupTable_seq1_instr1:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq1_instr2:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq1_instr3:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq1_instr4:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq1_instr5:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq1_instr6:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq1_instr7:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
# -----------------------------------===== lookupTable_seq2_instr0 [Optional] =====-----------------------------------
# Description: Offset: 0x000000A0, Width: 16b; Lookup table holds Flash command sequences 2, instruction 0
lookupTable_seq2_instr0:
# ------------------------------------------===== OPERAND [Optional] =====------------------------------------------
# Description: Offset: 0b, Width: 8b, Instruction operand. Its values depends on used instruction
OPERAND: 0
# -----------------------------------------===== NUM_PADS [Optional] =====------------------------------------------
# Description: Offset: 8b, Width: 2b, Number of pads used by instruction. Some instructions ignores this parameter.
# - 1PAD, (0): Single mode. One pad is used.
# - 2PAD, (1): Dual mode. Two pads are used.
# - 4PAD, (2): Quad mode. Four pads are used.
# - 8PAD, (3): Octal mode. Eight pads are used.
# Possible options: <1PAD, 2PAD, 4PAD, 8PAD>
NUM_PADS: 1PAD
# --------------------------------------===== OPERATION_CODE [Optional] =====---------------------------------------
# Description: Offset: 10b, Width: 6b, Instruction operation code.
# - STOP, (0): Stop execution and de-assert CS. Then, the next command sequence (to the same flash device) starts
# from instruction pointer 0.
# - CMD_SDR, (1): Transmit command code to Flash.
# - RADDR_SDR, (2): Transmit row address to Flash.
# - CADDR_SDR, (3): Transmit column address to Flash.
# - MODE1_SDR, (4): Transmit mode bits to Flash.
# - MODE2_SDR, (5): Transmit mode bits to Flash.
# - MODE4_SDR, (6): Transmit mode bits to Flash.
# - MODE8_SDR, (7): Transmit mode bits to Flash.
# - WRITE_SDR, (8): Transmit program data to Flash device.
# - READ_SDR, (9): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_SDR, (10): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_SDR, (11): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_SDR, (12): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_SDR, (13): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# - JMP_ON_CS, (31): Stop execution, de-assert CS and save operand[7:0] as the instruction start pointer for next
# sequence.Normally this instruction is used to support Execute-In-Place enhanced mode. See XIP enhanced mode for
# more details.This instruction is only allowed for AHB read commands. There is interrupt status bit set
# (INTR[IPCMDERR] or INTR[AHBCMDERR]) when using this instruction in IP command or AHB write command.
# - CMD_DDR, (33): Transmit command code to Flash.
# - RADDR_DDR, (34): Transmit row address to Flash.
# - CADDR_DDR, (35): Transmit column address to Flash.
# - MODE1_DDR, (36): Transmit mode bits to Flash.
# - MODE2_DDR, (37): Transmit mode bits to Flash.
# - MODE4_DDR, (38): Transmit mode bits to Flash.
# - MODE8_DDR, (39): Transmit mode bits to Flash.
# - WRITE_DDR, (40): Transmit program data to Flash device.
# - READ_DDR, (41): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_DDR, (42): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_DDR, (43): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_DDR, (44): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_DDR, (45): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# Possible options: <STOP, CMD_SDR, RADDR_SDR, CADDR_SDR, MODE1_SDR, MODE2_SDR, MODE4_SDR, MODE8_SDR, WRITE_SDR,
# READ_SDR, LEARN_SDR, DATSZ_SDR, DUMMY_SDR, DUMMY_RWDS_SDR, JMP_ON_CS, CMD_DDR, RADDR_DDR, CADDR_DDR, MODE1_DDR,
# MODE2_DDR, MODE4_DDR, MODE8_DDR, WRITE_DDR, READ_DDR, LEARN_DDR, DATSZ_DDR, DUMMY_DDR, DUMMY_RWDS_DDR>
OPERATION_CODE: STOP
lookupTable_seq2_instr1:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq2_instr2:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq2_instr3:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq2_instr4:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq2_instr5:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq2_instr6:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq2_instr7:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
# -----------------------------------===== lookupTable_seq3_instr0 [Optional] =====-----------------------------------
# Description: Offset: 0x000000B0, Width: 16b; Lookup table holds Flash command sequences 3, instruction 0
lookupTable_seq3_instr0:
# ------------------------------------------===== OPERAND [Optional] =====------------------------------------------
# Description: Offset: 0b, Width: 8b, Instruction operand. Its values depends on used instruction
OPERAND: 0
# -----------------------------------------===== NUM_PADS [Optional] =====------------------------------------------
# Description: Offset: 8b, Width: 2b, Number of pads used by instruction. Some instructions ignores this parameter.
# - 1PAD, (0): Single mode. One pad is used.
# - 2PAD, (1): Dual mode. Two pads are used.
# - 4PAD, (2): Quad mode. Four pads are used.
# - 8PAD, (3): Octal mode. Eight pads are used.
# Possible options: <1PAD, 2PAD, 4PAD, 8PAD>
NUM_PADS: 1PAD
# --------------------------------------===== OPERATION_CODE [Optional] =====---------------------------------------
# Description: Offset: 10b, Width: 6b, Instruction operation code.
# - STOP, (0): Stop execution and de-assert CS. Then, the next command sequence (to the same flash device) starts
# from instruction pointer 0.
# - CMD_SDR, (1): Transmit command code to Flash.
# - RADDR_SDR, (2): Transmit row address to Flash.
# - CADDR_SDR, (3): Transmit column address to Flash.
# - MODE1_SDR, (4): Transmit mode bits to Flash.
# - MODE2_SDR, (5): Transmit mode bits to Flash.
# - MODE4_SDR, (6): Transmit mode bits to Flash.
# - MODE8_SDR, (7): Transmit mode bits to Flash.
# - WRITE_SDR, (8): Transmit program data to Flash device.
# - READ_SDR, (9): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_SDR, (10): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_SDR, (11): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_SDR, (12): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_SDR, (13): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# - JMP_ON_CS, (31): Stop execution, de-assert CS and save operand[7:0] as the instruction start pointer for next
# sequence.Normally this instruction is used to support Execute-In-Place enhanced mode. See XIP enhanced mode for
# more details.This instruction is only allowed for AHB read commands. There is interrupt status bit set
# (INTR[IPCMDERR] or INTR[AHBCMDERR]) when using this instruction in IP command or AHB write command.
# - CMD_DDR, (33): Transmit command code to Flash.
# - RADDR_DDR, (34): Transmit row address to Flash.
# - CADDR_DDR, (35): Transmit column address to Flash.
# - MODE1_DDR, (36): Transmit mode bits to Flash.
# - MODE2_DDR, (37): Transmit mode bits to Flash.
# - MODE4_DDR, (38): Transmit mode bits to Flash.
# - MODE8_DDR, (39): Transmit mode bits to Flash.
# - WRITE_DDR, (40): Transmit program data to Flash device.
# - READ_DDR, (41): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_DDR, (42): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_DDR, (43): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_DDR, (44): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_DDR, (45): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# Possible options: <STOP, CMD_SDR, RADDR_SDR, CADDR_SDR, MODE1_SDR, MODE2_SDR, MODE4_SDR, MODE8_SDR, WRITE_SDR,
# READ_SDR, LEARN_SDR, DATSZ_SDR, DUMMY_SDR, DUMMY_RWDS_SDR, JMP_ON_CS, CMD_DDR, RADDR_DDR, CADDR_DDR, MODE1_DDR,
# MODE2_DDR, MODE4_DDR, MODE8_DDR, WRITE_DDR, READ_DDR, LEARN_DDR, DATSZ_DDR, DUMMY_DDR, DUMMY_RWDS_DDR>
OPERATION_CODE: STOP
lookupTable_seq3_instr1:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq3_instr2:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq3_instr3:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq3_instr4:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq3_instr5:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq3_instr6:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq3_instr7:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
# -----------------------------------===== lookupTable_seq4_instr0 [Optional] =====-----------------------------------
# Description: Offset: 0x000000C0, Width: 16b; Lookup table holds Flash command sequences 4, instruction 0
lookupTable_seq4_instr0:
# ------------------------------------------===== OPERAND [Optional] =====------------------------------------------
# Description: Offset: 0b, Width: 8b, Instruction operand. Its values depends on used instruction
OPERAND: 0
# -----------------------------------------===== NUM_PADS [Optional] =====------------------------------------------
# Description: Offset: 8b, Width: 2b, Number of pads used by instruction. Some instructions ignores this parameter.
# - 1PAD, (0): Single mode. One pad is used.
# - 2PAD, (1): Dual mode. Two pads are used.
# - 4PAD, (2): Quad mode. Four pads are used.
# - 8PAD, (3): Octal mode. Eight pads are used.
# Possible options: <1PAD, 2PAD, 4PAD, 8PAD>
NUM_PADS: 1PAD
# --------------------------------------===== OPERATION_CODE [Optional] =====---------------------------------------
# Description: Offset: 10b, Width: 6b, Instruction operation code.
# - STOP, (0): Stop execution and de-assert CS. Then, the next command sequence (to the same flash device) starts
# from instruction pointer 0.
# - CMD_SDR, (1): Transmit command code to Flash.
# - RADDR_SDR, (2): Transmit row address to Flash.
# - CADDR_SDR, (3): Transmit column address to Flash.
# - MODE1_SDR, (4): Transmit mode bits to Flash.
# - MODE2_SDR, (5): Transmit mode bits to Flash.
# - MODE4_SDR, (6): Transmit mode bits to Flash.
# - MODE8_SDR, (7): Transmit mode bits to Flash.
# - WRITE_SDR, (8): Transmit program data to Flash device.
# - READ_SDR, (9): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_SDR, (10): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_SDR, (11): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_SDR, (12): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_SDR, (13): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# - JMP_ON_CS, (31): Stop execution, de-assert CS and save operand[7:0] as the instruction start pointer for next
# sequence.Normally this instruction is used to support Execute-In-Place enhanced mode. See XIP enhanced mode for
# more details.This instruction is only allowed for AHB read commands. There is interrupt status bit set
# (INTR[IPCMDERR] or INTR[AHBCMDERR]) when using this instruction in IP command or AHB write command.
# - CMD_DDR, (33): Transmit command code to Flash.
# - RADDR_DDR, (34): Transmit row address to Flash.
# - CADDR_DDR, (35): Transmit column address to Flash.
# - MODE1_DDR, (36): Transmit mode bits to Flash.
# - MODE2_DDR, (37): Transmit mode bits to Flash.
# - MODE4_DDR, (38): Transmit mode bits to Flash.
# - MODE8_DDR, (39): Transmit mode bits to Flash.
# - WRITE_DDR, (40): Transmit program data to Flash device.
# - READ_DDR, (41): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_DDR, (42): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_DDR, (43): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_DDR, (44): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_DDR, (45): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# Possible options: <STOP, CMD_SDR, RADDR_SDR, CADDR_SDR, MODE1_SDR, MODE2_SDR, MODE4_SDR, MODE8_SDR, WRITE_SDR,
# READ_SDR, LEARN_SDR, DATSZ_SDR, DUMMY_SDR, DUMMY_RWDS_SDR, JMP_ON_CS, CMD_DDR, RADDR_DDR, CADDR_DDR, MODE1_DDR,
# MODE2_DDR, MODE4_DDR, MODE8_DDR, WRITE_DDR, READ_DDR, LEARN_DDR, DATSZ_DDR, DUMMY_DDR, DUMMY_RWDS_DDR>
OPERATION_CODE: STOP
lookupTable_seq4_instr1:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq4_instr2:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq4_instr3:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq4_instr4:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq4_instr5:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq4_instr6:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq4_instr7:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
# -----------------------------------===== lookupTable_seq5_instr0 [Optional] =====-----------------------------------
# Description: Offset: 0x000000D0, Width: 16b; Lookup table holds Flash command sequences 5, instruction 0
lookupTable_seq5_instr0:
# ------------------------------------------===== OPERAND [Optional] =====------------------------------------------
# Description: Offset: 0b, Width: 8b, Instruction operand. Its values depends on used instruction
OPERAND: 0
# -----------------------------------------===== NUM_PADS [Optional] =====------------------------------------------
# Description: Offset: 8b, Width: 2b, Number of pads used by instruction. Some instructions ignores this parameter.
# - 1PAD, (0): Single mode. One pad is used.
# - 2PAD, (1): Dual mode. Two pads are used.
# - 4PAD, (2): Quad mode. Four pads are used.
# - 8PAD, (3): Octal mode. Eight pads are used.
# Possible options: <1PAD, 2PAD, 4PAD, 8PAD>
NUM_PADS: 1PAD
# --------------------------------------===== OPERATION_CODE [Optional] =====---------------------------------------
# Description: Offset: 10b, Width: 6b, Instruction operation code.
# - STOP, (0): Stop execution and de-assert CS. Then, the next command sequence (to the same flash device) starts
# from instruction pointer 0.
# - CMD_SDR, (1): Transmit command code to Flash.
# - RADDR_SDR, (2): Transmit row address to Flash.
# - CADDR_SDR, (3): Transmit column address to Flash.
# - MODE1_SDR, (4): Transmit mode bits to Flash.
# - MODE2_SDR, (5): Transmit mode bits to Flash.
# - MODE4_SDR, (6): Transmit mode bits to Flash.
# - MODE8_SDR, (7): Transmit mode bits to Flash.
# - WRITE_SDR, (8): Transmit program data to Flash device.
# - READ_SDR, (9): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_SDR, (10): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_SDR, (11): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_SDR, (12): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_SDR, (13): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# - JMP_ON_CS, (31): Stop execution, de-assert CS and save operand[7:0] as the instruction start pointer for next
# sequence.Normally this instruction is used to support Execute-In-Place enhanced mode. See XIP enhanced mode for
# more details.This instruction is only allowed for AHB read commands. There is interrupt status bit set
# (INTR[IPCMDERR] or INTR[AHBCMDERR]) when using this instruction in IP command or AHB write command.
# - CMD_DDR, (33): Transmit command code to Flash.
# - RADDR_DDR, (34): Transmit row address to Flash.
# - CADDR_DDR, (35): Transmit column address to Flash.
# - MODE1_DDR, (36): Transmit mode bits to Flash.
# - MODE2_DDR, (37): Transmit mode bits to Flash.
# - MODE4_DDR, (38): Transmit mode bits to Flash.
# - MODE8_DDR, (39): Transmit mode bits to Flash.
# - WRITE_DDR, (40): Transmit program data to Flash device.
# - READ_DDR, (41): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_DDR, (42): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_DDR, (43): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_DDR, (44): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_DDR, (45): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# Possible options: <STOP, CMD_SDR, RADDR_SDR, CADDR_SDR, MODE1_SDR, MODE2_SDR, MODE4_SDR, MODE8_SDR, WRITE_SDR,
# READ_SDR, LEARN_SDR, DATSZ_SDR, DUMMY_SDR, DUMMY_RWDS_SDR, JMP_ON_CS, CMD_DDR, RADDR_DDR, CADDR_DDR, MODE1_DDR,
# MODE2_DDR, MODE4_DDR, MODE8_DDR, WRITE_DDR, READ_DDR, LEARN_DDR, DATSZ_DDR, DUMMY_DDR, DUMMY_RWDS_DDR>
OPERATION_CODE: STOP
lookupTable_seq5_instr1:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq5_instr2:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq5_instr3:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq5_instr4:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq5_instr5:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq5_instr6:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq5_instr7:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
# -----------------------------------===== lookupTable_seq6_instr0 [Optional] =====-----------------------------------
# Description: Offset: 0x000000E0, Width: 16b; Lookup table holds Flash command sequences 6, instruction 0
lookupTable_seq6_instr0:
# ------------------------------------------===== OPERAND [Optional] =====------------------------------------------
# Description: Offset: 0b, Width: 8b, Instruction operand. Its values depends on used instruction
OPERAND: 0
# -----------------------------------------===== NUM_PADS [Optional] =====------------------------------------------
# Description: Offset: 8b, Width: 2b, Number of pads used by instruction. Some instructions ignores this parameter.
# - 1PAD, (0): Single mode. One pad is used.
# - 2PAD, (1): Dual mode. Two pads are used.
# - 4PAD, (2): Quad mode. Four pads are used.
# - 8PAD, (3): Octal mode. Eight pads are used.
# Possible options: <1PAD, 2PAD, 4PAD, 8PAD>
NUM_PADS: 1PAD
# --------------------------------------===== OPERATION_CODE [Optional] =====---------------------------------------
# Description: Offset: 10b, Width: 6b, Instruction operation code.
# - STOP, (0): Stop execution and de-assert CS. Then, the next command sequence (to the same flash device) starts
# from instruction pointer 0.
# - CMD_SDR, (1): Transmit command code to Flash.
# - RADDR_SDR, (2): Transmit row address to Flash.
# - CADDR_SDR, (3): Transmit column address to Flash.
# - MODE1_SDR, (4): Transmit mode bits to Flash.
# - MODE2_SDR, (5): Transmit mode bits to Flash.
# - MODE4_SDR, (6): Transmit mode bits to Flash.
# - MODE8_SDR, (7): Transmit mode bits to Flash.
# - WRITE_SDR, (8): Transmit program data to Flash device.
# - READ_SDR, (9): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_SDR, (10): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_SDR, (11): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_SDR, (12): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_SDR, (13): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# - JMP_ON_CS, (31): Stop execution, de-assert CS and save operand[7:0] as the instruction start pointer for next
# sequence.Normally this instruction is used to support Execute-In-Place enhanced mode. See XIP enhanced mode for
# more details.This instruction is only allowed for AHB read commands. There is interrupt status bit set
# (INTR[IPCMDERR] or INTR[AHBCMDERR]) when using this instruction in IP command or AHB write command.
# - CMD_DDR, (33): Transmit command code to Flash.
# - RADDR_DDR, (34): Transmit row address to Flash.
# - CADDR_DDR, (35): Transmit column address to Flash.
# - MODE1_DDR, (36): Transmit mode bits to Flash.
# - MODE2_DDR, (37): Transmit mode bits to Flash.
# - MODE4_DDR, (38): Transmit mode bits to Flash.
# - MODE8_DDR, (39): Transmit mode bits to Flash.
# - WRITE_DDR, (40): Transmit program data to Flash device.
# - READ_DDR, (41): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_DDR, (42): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_DDR, (43): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_DDR, (44): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_DDR, (45): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# Possible options: <STOP, CMD_SDR, RADDR_SDR, CADDR_SDR, MODE1_SDR, MODE2_SDR, MODE4_SDR, MODE8_SDR, WRITE_SDR,
# READ_SDR, LEARN_SDR, DATSZ_SDR, DUMMY_SDR, DUMMY_RWDS_SDR, JMP_ON_CS, CMD_DDR, RADDR_DDR, CADDR_DDR, MODE1_DDR,
# MODE2_DDR, MODE4_DDR, MODE8_DDR, WRITE_DDR, READ_DDR, LEARN_DDR, DATSZ_DDR, DUMMY_DDR, DUMMY_RWDS_DDR>
OPERATION_CODE: STOP
lookupTable_seq6_instr1:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq6_instr2:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq6_instr3:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq6_instr4:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq6_instr5:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq6_instr6:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq6_instr7:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
# -----------------------------------===== lookupTable_seq7_instr0 [Optional] =====-----------------------------------
# Description: Offset: 0x000000F0, Width: 16b; Lookup table holds Flash command sequences 7, instruction 0
lookupTable_seq7_instr0:
# ------------------------------------------===== OPERAND [Optional] =====------------------------------------------
# Description: Offset: 0b, Width: 8b, Instruction operand. Its values depends on used instruction
OPERAND: 0
# -----------------------------------------===== NUM_PADS [Optional] =====------------------------------------------
# Description: Offset: 8b, Width: 2b, Number of pads used by instruction. Some instructions ignores this parameter.
# - 1PAD, (0): Single mode. One pad is used.
# - 2PAD, (1): Dual mode. Two pads are used.
# - 4PAD, (2): Quad mode. Four pads are used.
# - 8PAD, (3): Octal mode. Eight pads are used.
# Possible options: <1PAD, 2PAD, 4PAD, 8PAD>
NUM_PADS: 1PAD
# --------------------------------------===== OPERATION_CODE [Optional] =====---------------------------------------
# Description: Offset: 10b, Width: 6b, Instruction operation code.
# - STOP, (0): Stop execution and de-assert CS. Then, the next command sequence (to the same flash device) starts
# from instruction pointer 0.
# - CMD_SDR, (1): Transmit command code to Flash.
# - RADDR_SDR, (2): Transmit row address to Flash.
# - CADDR_SDR, (3): Transmit column address to Flash.
# - MODE1_SDR, (4): Transmit mode bits to Flash.
# - MODE2_SDR, (5): Transmit mode bits to Flash.
# - MODE4_SDR, (6): Transmit mode bits to Flash.
# - MODE8_SDR, (7): Transmit mode bits to Flash.
# - WRITE_SDR, (8): Transmit program data to Flash device.
# - READ_SDR, (9): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_SDR, (10): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_SDR, (11): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_SDR, (12): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_SDR, (13): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# - JMP_ON_CS, (31): Stop execution, de-assert CS and save operand[7:0] as the instruction start pointer for next
# sequence.Normally this instruction is used to support Execute-In-Place enhanced mode. See XIP enhanced mode for
# more details.This instruction is only allowed for AHB read commands. There is interrupt status bit set
# (INTR[IPCMDERR] or INTR[AHBCMDERR]) when using this instruction in IP command or AHB write command.
# - CMD_DDR, (33): Transmit command code to Flash.
# - RADDR_DDR, (34): Transmit row address to Flash.
# - CADDR_DDR, (35): Transmit column address to Flash.
# - MODE1_DDR, (36): Transmit mode bits to Flash.
# - MODE2_DDR, (37): Transmit mode bits to Flash.
# - MODE4_DDR, (38): Transmit mode bits to Flash.
# - MODE8_DDR, (39): Transmit mode bits to Flash.
# - WRITE_DDR, (40): Transmit program data to Flash device.
# - READ_DDR, (41): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_DDR, (42): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_DDR, (43): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_DDR, (44): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_DDR, (45): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# Possible options: <STOP, CMD_SDR, RADDR_SDR, CADDR_SDR, MODE1_SDR, MODE2_SDR, MODE4_SDR, MODE8_SDR, WRITE_SDR,
# READ_SDR, LEARN_SDR, DATSZ_SDR, DUMMY_SDR, DUMMY_RWDS_SDR, JMP_ON_CS, CMD_DDR, RADDR_DDR, CADDR_DDR, MODE1_DDR,
# MODE2_DDR, MODE4_DDR, MODE8_DDR, WRITE_DDR, READ_DDR, LEARN_DDR, DATSZ_DDR, DUMMY_DDR, DUMMY_RWDS_DDR>
OPERATION_CODE: STOP
lookupTable_seq7_instr1:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq7_instr2:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq7_instr3:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq7_instr4:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq7_instr5:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq7_instr6:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq7_instr7:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
# -----------------------------------===== lookupTable_seq8_instr0 [Optional] =====-----------------------------------
# Description: Offset: 0x00000100, Width: 16b; Lookup table holds Flash command sequences 8, instruction 0
lookupTable_seq8_instr0:
# ------------------------------------------===== OPERAND [Optional] =====------------------------------------------
# Description: Offset: 0b, Width: 8b, Instruction operand. Its values depends on used instruction
OPERAND: 0
# -----------------------------------------===== NUM_PADS [Optional] =====------------------------------------------
# Description: Offset: 8b, Width: 2b, Number of pads used by instruction. Some instructions ignores this parameter.
# - 1PAD, (0): Single mode. One pad is used.
# - 2PAD, (1): Dual mode. Two pads are used.
# - 4PAD, (2): Quad mode. Four pads are used.
# - 8PAD, (3): Octal mode. Eight pads are used.
# Possible options: <1PAD, 2PAD, 4PAD, 8PAD>
NUM_PADS: 1PAD
# --------------------------------------===== OPERATION_CODE [Optional] =====---------------------------------------
# Description: Offset: 10b, Width: 6b, Instruction operation code.
# - STOP, (0): Stop execution and de-assert CS. Then, the next command sequence (to the same flash device) starts
# from instruction pointer 0.
# - CMD_SDR, (1): Transmit command code to Flash.
# - RADDR_SDR, (2): Transmit row address to Flash.
# - CADDR_SDR, (3): Transmit column address to Flash.
# - MODE1_SDR, (4): Transmit mode bits to Flash.
# - MODE2_SDR, (5): Transmit mode bits to Flash.
# - MODE4_SDR, (6): Transmit mode bits to Flash.
# - MODE8_SDR, (7): Transmit mode bits to Flash.
# - WRITE_SDR, (8): Transmit program data to Flash device.
# - READ_SDR, (9): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_SDR, (10): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_SDR, (11): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_SDR, (12): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_SDR, (13): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# - JMP_ON_CS, (31): Stop execution, de-assert CS and save operand[7:0] as the instruction start pointer for next
# sequence.Normally this instruction is used to support Execute-In-Place enhanced mode. See XIP enhanced mode for
# more details.This instruction is only allowed for AHB read commands. There is interrupt status bit set
# (INTR[IPCMDERR] or INTR[AHBCMDERR]) when using this instruction in IP command or AHB write command.
# - CMD_DDR, (33): Transmit command code to Flash.
# - RADDR_DDR, (34): Transmit row address to Flash.
# - CADDR_DDR, (35): Transmit column address to Flash.
# - MODE1_DDR, (36): Transmit mode bits to Flash.
# - MODE2_DDR, (37): Transmit mode bits to Flash.
# - MODE4_DDR, (38): Transmit mode bits to Flash.
# - MODE8_DDR, (39): Transmit mode bits to Flash.
# - WRITE_DDR, (40): Transmit program data to Flash device.
# - READ_DDR, (41): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_DDR, (42): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_DDR, (43): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_DDR, (44): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_DDR, (45): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# Possible options: <STOP, CMD_SDR, RADDR_SDR, CADDR_SDR, MODE1_SDR, MODE2_SDR, MODE4_SDR, MODE8_SDR, WRITE_SDR,
# READ_SDR, LEARN_SDR, DATSZ_SDR, DUMMY_SDR, DUMMY_RWDS_SDR, JMP_ON_CS, CMD_DDR, RADDR_DDR, CADDR_DDR, MODE1_DDR,
# MODE2_DDR, MODE4_DDR, MODE8_DDR, WRITE_DDR, READ_DDR, LEARN_DDR, DATSZ_DDR, DUMMY_DDR, DUMMY_RWDS_DDR>
OPERATION_CODE: STOP
lookupTable_seq8_instr1:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq8_instr2:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq8_instr3:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq8_instr4:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq8_instr5:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq8_instr6:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq8_instr7:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
# -----------------------------------===== lookupTable_seq9_instr0 [Optional] =====-----------------------------------
# Description: Offset: 0x00000110, Width: 16b; Lookup table holds Flash command sequences 9, instruction 0
lookupTable_seq9_instr0:
# ------------------------------------------===== OPERAND [Optional] =====------------------------------------------
# Description: Offset: 0b, Width: 8b, Instruction operand. Its values depends on used instruction
OPERAND: 0
# -----------------------------------------===== NUM_PADS [Optional] =====------------------------------------------
# Description: Offset: 8b, Width: 2b, Number of pads used by instruction. Some instructions ignores this parameter.
# - 1PAD, (0): Single mode. One pad is used.
# - 2PAD, (1): Dual mode. Two pads are used.
# - 4PAD, (2): Quad mode. Four pads are used.
# - 8PAD, (3): Octal mode. Eight pads are used.
# Possible options: <1PAD, 2PAD, 4PAD, 8PAD>
NUM_PADS: 1PAD
# --------------------------------------===== OPERATION_CODE [Optional] =====---------------------------------------
# Description: Offset: 10b, Width: 6b, Instruction operation code.
# - STOP, (0): Stop execution and de-assert CS. Then, the next command sequence (to the same flash device) starts
# from instruction pointer 0.
# - CMD_SDR, (1): Transmit command code to Flash.
# - RADDR_SDR, (2): Transmit row address to Flash.
# - CADDR_SDR, (3): Transmit column address to Flash.
# - MODE1_SDR, (4): Transmit mode bits to Flash.
# - MODE2_SDR, (5): Transmit mode bits to Flash.
# - MODE4_SDR, (6): Transmit mode bits to Flash.
# - MODE8_SDR, (7): Transmit mode bits to Flash.
# - WRITE_SDR, (8): Transmit program data to Flash device.
# - READ_SDR, (9): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_SDR, (10): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_SDR, (11): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_SDR, (12): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_SDR, (13): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# - JMP_ON_CS, (31): Stop execution, de-assert CS and save operand[7:0] as the instruction start pointer for next
# sequence.Normally this instruction is used to support Execute-In-Place enhanced mode. See XIP enhanced mode for
# more details.This instruction is only allowed for AHB read commands. There is interrupt status bit set
# (INTR[IPCMDERR] or INTR[AHBCMDERR]) when using this instruction in IP command or AHB write command.
# - CMD_DDR, (33): Transmit command code to Flash.
# - RADDR_DDR, (34): Transmit row address to Flash.
# - CADDR_DDR, (35): Transmit column address to Flash.
# - MODE1_DDR, (36): Transmit mode bits to Flash.
# - MODE2_DDR, (37): Transmit mode bits to Flash.
# - MODE4_DDR, (38): Transmit mode bits to Flash.
# - MODE8_DDR, (39): Transmit mode bits to Flash.
# - WRITE_DDR, (40): Transmit program data to Flash device.
# - READ_DDR, (41): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_DDR, (42): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_DDR, (43): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_DDR, (44): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_DDR, (45): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# Possible options: <STOP, CMD_SDR, RADDR_SDR, CADDR_SDR, MODE1_SDR, MODE2_SDR, MODE4_SDR, MODE8_SDR, WRITE_SDR,
# READ_SDR, LEARN_SDR, DATSZ_SDR, DUMMY_SDR, DUMMY_RWDS_SDR, JMP_ON_CS, CMD_DDR, RADDR_DDR, CADDR_DDR, MODE1_DDR,
# MODE2_DDR, MODE4_DDR, MODE8_DDR, WRITE_DDR, READ_DDR, LEARN_DDR, DATSZ_DDR, DUMMY_DDR, DUMMY_RWDS_DDR>
OPERATION_CODE: STOP
lookupTable_seq9_instr1:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq9_instr2:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq9_instr3:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq9_instr4:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq9_instr5:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq9_instr6:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq9_instr7:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
# ----------------------------------===== lookupTable_seq10_instr0 [Optional] =====-----------------------------------
# Description: Offset: 0x00000120, Width: 16b; Lookup table holds Flash command sequences 10, instruction 0
lookupTable_seq10_instr0:
# ------------------------------------------===== OPERAND [Optional] =====------------------------------------------
# Description: Offset: 0b, Width: 8b, Instruction operand. Its values depends on used instruction
OPERAND: 0
# -----------------------------------------===== NUM_PADS [Optional] =====------------------------------------------
# Description: Offset: 8b, Width: 2b, Number of pads used by instruction. Some instructions ignores this parameter.
# - 1PAD, (0): Single mode. One pad is used.
# - 2PAD, (1): Dual mode. Two pads are used.
# - 4PAD, (2): Quad mode. Four pads are used.
# - 8PAD, (3): Octal mode. Eight pads are used.
# Possible options: <1PAD, 2PAD, 4PAD, 8PAD>
NUM_PADS: 1PAD
# --------------------------------------===== OPERATION_CODE [Optional] =====---------------------------------------
# Description: Offset: 10b, Width: 6b, Instruction operation code.
# - STOP, (0): Stop execution and de-assert CS. Then, the next command sequence (to the same flash device) starts
# from instruction pointer 0.
# - CMD_SDR, (1): Transmit command code to Flash.
# - RADDR_SDR, (2): Transmit row address to Flash.
# - CADDR_SDR, (3): Transmit column address to Flash.
# - MODE1_SDR, (4): Transmit mode bits to Flash.
# - MODE2_SDR, (5): Transmit mode bits to Flash.
# - MODE4_SDR, (6): Transmit mode bits to Flash.
# - MODE8_SDR, (7): Transmit mode bits to Flash.
# - WRITE_SDR, (8): Transmit program data to Flash device.
# - READ_SDR, (9): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_SDR, (10): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_SDR, (11): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_SDR, (12): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_SDR, (13): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# - JMP_ON_CS, (31): Stop execution, de-assert CS and save operand[7:0] as the instruction start pointer for next
# sequence.Normally this instruction is used to support Execute-In-Place enhanced mode. See XIP enhanced mode for
# more details.This instruction is only allowed for AHB read commands. There is interrupt status bit set
# (INTR[IPCMDERR] or INTR[AHBCMDERR]) when using this instruction in IP command or AHB write command.
# - CMD_DDR, (33): Transmit command code to Flash.
# - RADDR_DDR, (34): Transmit row address to Flash.
# - CADDR_DDR, (35): Transmit column address to Flash.
# - MODE1_DDR, (36): Transmit mode bits to Flash.
# - MODE2_DDR, (37): Transmit mode bits to Flash.
# - MODE4_DDR, (38): Transmit mode bits to Flash.
# - MODE8_DDR, (39): Transmit mode bits to Flash.
# - WRITE_DDR, (40): Transmit program data to Flash device.
# - READ_DDR, (41): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_DDR, (42): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_DDR, (43): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_DDR, (44): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_DDR, (45): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# Possible options: <STOP, CMD_SDR, RADDR_SDR, CADDR_SDR, MODE1_SDR, MODE2_SDR, MODE4_SDR, MODE8_SDR, WRITE_SDR,
# READ_SDR, LEARN_SDR, DATSZ_SDR, DUMMY_SDR, DUMMY_RWDS_SDR, JMP_ON_CS, CMD_DDR, RADDR_DDR, CADDR_DDR, MODE1_DDR,
# MODE2_DDR, MODE4_DDR, MODE8_DDR, WRITE_DDR, READ_DDR, LEARN_DDR, DATSZ_DDR, DUMMY_DDR, DUMMY_RWDS_DDR>
OPERATION_CODE: STOP
lookupTable_seq10_instr1:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq10_instr2:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq10_instr3:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq10_instr4:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq10_instr5:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq10_instr6:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq10_instr7:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
# ----------------------------------===== lookupTable_seq11_instr0 [Optional] =====-----------------------------------
# Description: Offset: 0x00000130, Width: 16b; Lookup table holds Flash command sequences 11, instruction 0
lookupTable_seq11_instr0:
# ------------------------------------------===== OPERAND [Optional] =====------------------------------------------
# Description: Offset: 0b, Width: 8b, Instruction operand. Its values depends on used instruction
OPERAND: 0
# -----------------------------------------===== NUM_PADS [Optional] =====------------------------------------------
# Description: Offset: 8b, Width: 2b, Number of pads used by instruction. Some instructions ignores this parameter.
# - 1PAD, (0): Single mode. One pad is used.
# - 2PAD, (1): Dual mode. Two pads are used.
# - 4PAD, (2): Quad mode. Four pads are used.
# - 8PAD, (3): Octal mode. Eight pads are used.
# Possible options: <1PAD, 2PAD, 4PAD, 8PAD>
NUM_PADS: 1PAD
# --------------------------------------===== OPERATION_CODE [Optional] =====---------------------------------------
# Description: Offset: 10b, Width: 6b, Instruction operation code.
# - STOP, (0): Stop execution and de-assert CS. Then, the next command sequence (to the same flash device) starts
# from instruction pointer 0.
# - CMD_SDR, (1): Transmit command code to Flash.
# - RADDR_SDR, (2): Transmit row address to Flash.
# - CADDR_SDR, (3): Transmit column address to Flash.
# - MODE1_SDR, (4): Transmit mode bits to Flash.
# - MODE2_SDR, (5): Transmit mode bits to Flash.
# - MODE4_SDR, (6): Transmit mode bits to Flash.
# - MODE8_SDR, (7): Transmit mode bits to Flash.
# - WRITE_SDR, (8): Transmit program data to Flash device.
# - READ_SDR, (9): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_SDR, (10): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_SDR, (11): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_SDR, (12): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_SDR, (13): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# - JMP_ON_CS, (31): Stop execution, de-assert CS and save operand[7:0] as the instruction start pointer for next
# sequence.Normally this instruction is used to support Execute-In-Place enhanced mode. See XIP enhanced mode for
# more details.This instruction is only allowed for AHB read commands. There is interrupt status bit set
# (INTR[IPCMDERR] or INTR[AHBCMDERR]) when using this instruction in IP command or AHB write command.
# - CMD_DDR, (33): Transmit command code to Flash.
# - RADDR_DDR, (34): Transmit row address to Flash.
# - CADDR_DDR, (35): Transmit column address to Flash.
# - MODE1_DDR, (36): Transmit mode bits to Flash.
# - MODE2_DDR, (37): Transmit mode bits to Flash.
# - MODE4_DDR, (38): Transmit mode bits to Flash.
# - MODE8_DDR, (39): Transmit mode bits to Flash.
# - WRITE_DDR, (40): Transmit program data to Flash device.
# - READ_DDR, (41): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_DDR, (42): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_DDR, (43): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_DDR, (44): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_DDR, (45): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# Possible options: <STOP, CMD_SDR, RADDR_SDR, CADDR_SDR, MODE1_SDR, MODE2_SDR, MODE4_SDR, MODE8_SDR, WRITE_SDR,
# READ_SDR, LEARN_SDR, DATSZ_SDR, DUMMY_SDR, DUMMY_RWDS_SDR, JMP_ON_CS, CMD_DDR, RADDR_DDR, CADDR_DDR, MODE1_DDR,
# MODE2_DDR, MODE4_DDR, MODE8_DDR, WRITE_DDR, READ_DDR, LEARN_DDR, DATSZ_DDR, DUMMY_DDR, DUMMY_RWDS_DDR>
OPERATION_CODE: STOP
lookupTable_seq11_instr1:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq11_instr2:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq11_instr3:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq11_instr4:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq11_instr5:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq11_instr6:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq11_instr7:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
# ----------------------------------===== lookupTable_seq12_instr0 [Optional] =====-----------------------------------
# Description: Offset: 0x00000140, Width: 16b; Lookup table holds Flash command sequences 12, instruction 0
lookupTable_seq12_instr0:
# ------------------------------------------===== OPERAND [Optional] =====------------------------------------------
# Description: Offset: 0b, Width: 8b, Instruction operand. Its values depends on used instruction
OPERAND: 0
# -----------------------------------------===== NUM_PADS [Optional] =====------------------------------------------
# Description: Offset: 8b, Width: 2b, Number of pads used by instruction. Some instructions ignores this parameter.
# - 1PAD, (0): Single mode. One pad is used.
# - 2PAD, (1): Dual mode. Two pads are used.
# - 4PAD, (2): Quad mode. Four pads are used.
# - 8PAD, (3): Octal mode. Eight pads are used.
# Possible options: <1PAD, 2PAD, 4PAD, 8PAD>
NUM_PADS: 1PAD
# --------------------------------------===== OPERATION_CODE [Optional] =====---------------------------------------
# Description: Offset: 10b, Width: 6b, Instruction operation code.
# - STOP, (0): Stop execution and de-assert CS. Then, the next command sequence (to the same flash device) starts
# from instruction pointer 0.
# - CMD_SDR, (1): Transmit command code to Flash.
# - RADDR_SDR, (2): Transmit row address to Flash.
# - CADDR_SDR, (3): Transmit column address to Flash.
# - MODE1_SDR, (4): Transmit mode bits to Flash.
# - MODE2_SDR, (5): Transmit mode bits to Flash.
# - MODE4_SDR, (6): Transmit mode bits to Flash.
# - MODE8_SDR, (7): Transmit mode bits to Flash.
# - WRITE_SDR, (8): Transmit program data to Flash device.
# - READ_SDR, (9): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_SDR, (10): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_SDR, (11): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_SDR, (12): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_SDR, (13): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# - JMP_ON_CS, (31): Stop execution, de-assert CS and save operand[7:0] as the instruction start pointer for next
# sequence.Normally this instruction is used to support Execute-In-Place enhanced mode. See XIP enhanced mode for
# more details.This instruction is only allowed for AHB read commands. There is interrupt status bit set
# (INTR[IPCMDERR] or INTR[AHBCMDERR]) when using this instruction in IP command or AHB write command.
# - CMD_DDR, (33): Transmit command code to Flash.
# - RADDR_DDR, (34): Transmit row address to Flash.
# - CADDR_DDR, (35): Transmit column address to Flash.
# - MODE1_DDR, (36): Transmit mode bits to Flash.
# - MODE2_DDR, (37): Transmit mode bits to Flash.
# - MODE4_DDR, (38): Transmit mode bits to Flash.
# - MODE8_DDR, (39): Transmit mode bits to Flash.
# - WRITE_DDR, (40): Transmit program data to Flash device.
# - READ_DDR, (41): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_DDR, (42): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_DDR, (43): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_DDR, (44): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_DDR, (45): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# Possible options: <STOP, CMD_SDR, RADDR_SDR, CADDR_SDR, MODE1_SDR, MODE2_SDR, MODE4_SDR, MODE8_SDR, WRITE_SDR,
# READ_SDR, LEARN_SDR, DATSZ_SDR, DUMMY_SDR, DUMMY_RWDS_SDR, JMP_ON_CS, CMD_DDR, RADDR_DDR, CADDR_DDR, MODE1_DDR,
# MODE2_DDR, MODE4_DDR, MODE8_DDR, WRITE_DDR, READ_DDR, LEARN_DDR, DATSZ_DDR, DUMMY_DDR, DUMMY_RWDS_DDR>
OPERATION_CODE: STOP
lookupTable_seq12_instr1:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq12_instr2:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq12_instr3:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq12_instr4:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq12_instr5:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq12_instr6:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq12_instr7:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
# ----------------------------------===== lookupTable_seq13_instr0 [Optional] =====-----------------------------------
# Description: Offset: 0x00000150, Width: 16b; Lookup table holds Flash command sequences 13, instruction 0
lookupTable_seq13_instr0:
# ------------------------------------------===== OPERAND [Optional] =====------------------------------------------
# Description: Offset: 0b, Width: 8b, Instruction operand. Its values depends on used instruction
OPERAND: 0
# -----------------------------------------===== NUM_PADS [Optional] =====------------------------------------------
# Description: Offset: 8b, Width: 2b, Number of pads used by instruction. Some instructions ignores this parameter.
# - 1PAD, (0): Single mode. One pad is used.
# - 2PAD, (1): Dual mode. Two pads are used.
# - 4PAD, (2): Quad mode. Four pads are used.
# - 8PAD, (3): Octal mode. Eight pads are used.
# Possible options: <1PAD, 2PAD, 4PAD, 8PAD>
NUM_PADS: 1PAD
# --------------------------------------===== OPERATION_CODE [Optional] =====---------------------------------------
# Description: Offset: 10b, Width: 6b, Instruction operation code.
# - STOP, (0): Stop execution and de-assert CS. Then, the next command sequence (to the same flash device) starts
# from instruction pointer 0.
# - CMD_SDR, (1): Transmit command code to Flash.
# - RADDR_SDR, (2): Transmit row address to Flash.
# - CADDR_SDR, (3): Transmit column address to Flash.
# - MODE1_SDR, (4): Transmit mode bits to Flash.
# - MODE2_SDR, (5): Transmit mode bits to Flash.
# - MODE4_SDR, (6): Transmit mode bits to Flash.
# - MODE8_SDR, (7): Transmit mode bits to Flash.
# - WRITE_SDR, (8): Transmit program data to Flash device.
# - READ_SDR, (9): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_SDR, (10): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_SDR, (11): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_SDR, (12): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_SDR, (13): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# - JMP_ON_CS, (31): Stop execution, de-assert CS and save operand[7:0] as the instruction start pointer for next
# sequence.Normally this instruction is used to support Execute-In-Place enhanced mode. See XIP enhanced mode for
# more details.This instruction is only allowed for AHB read commands. There is interrupt status bit set
# (INTR[IPCMDERR] or INTR[AHBCMDERR]) when using this instruction in IP command or AHB write command.
# - CMD_DDR, (33): Transmit command code to Flash.
# - RADDR_DDR, (34): Transmit row address to Flash.
# - CADDR_DDR, (35): Transmit column address to Flash.
# - MODE1_DDR, (36): Transmit mode bits to Flash.
# - MODE2_DDR, (37): Transmit mode bits to Flash.
# - MODE4_DDR, (38): Transmit mode bits to Flash.
# - MODE8_DDR, (39): Transmit mode bits to Flash.
# - WRITE_DDR, (40): Transmit program data to Flash device.
# - READ_DDR, (41): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_DDR, (42): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_DDR, (43): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_DDR, (44): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_DDR, (45): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# Possible options: <STOP, CMD_SDR, RADDR_SDR, CADDR_SDR, MODE1_SDR, MODE2_SDR, MODE4_SDR, MODE8_SDR, WRITE_SDR,
# READ_SDR, LEARN_SDR, DATSZ_SDR, DUMMY_SDR, DUMMY_RWDS_SDR, JMP_ON_CS, CMD_DDR, RADDR_DDR, CADDR_DDR, MODE1_DDR,
# MODE2_DDR, MODE4_DDR, MODE8_DDR, WRITE_DDR, READ_DDR, LEARN_DDR, DATSZ_DDR, DUMMY_DDR, DUMMY_RWDS_DDR>
OPERATION_CODE: STOP
lookupTable_seq13_instr1:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq13_instr2:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq13_instr3:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq13_instr4:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq13_instr5:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq13_instr6:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq13_instr7:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
# ----------------------------------===== lookupTable_seq14_instr0 [Optional] =====-----------------------------------
# Description: Offset: 0x00000160, Width: 16b; Lookup table holds Flash command sequences 14, instruction 0
lookupTable_seq14_instr0:
# ------------------------------------------===== OPERAND [Optional] =====------------------------------------------
# Description: Offset: 0b, Width: 8b, Instruction operand. Its values depends on used instruction
OPERAND: 0
# -----------------------------------------===== NUM_PADS [Optional] =====------------------------------------------
# Description: Offset: 8b, Width: 2b, Number of pads used by instruction. Some instructions ignores this parameter.
# - 1PAD, (0): Single mode. One pad is used.
# - 2PAD, (1): Dual mode. Two pads are used.
# - 4PAD, (2): Quad mode. Four pads are used.
# - 8PAD, (3): Octal mode. Eight pads are used.
# Possible options: <1PAD, 2PAD, 4PAD, 8PAD>
NUM_PADS: 1PAD
# --------------------------------------===== OPERATION_CODE [Optional] =====---------------------------------------
# Description: Offset: 10b, Width: 6b, Instruction operation code.
# - STOP, (0): Stop execution and de-assert CS. Then, the next command sequence (to the same flash device) starts
# from instruction pointer 0.
# - CMD_SDR, (1): Transmit command code to Flash.
# - RADDR_SDR, (2): Transmit row address to Flash.
# - CADDR_SDR, (3): Transmit column address to Flash.
# - MODE1_SDR, (4): Transmit mode bits to Flash.
# - MODE2_SDR, (5): Transmit mode bits to Flash.
# - MODE4_SDR, (6): Transmit mode bits to Flash.
# - MODE8_SDR, (7): Transmit mode bits to Flash.
# - WRITE_SDR, (8): Transmit program data to Flash device.
# - READ_SDR, (9): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_SDR, (10): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_SDR, (11): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_SDR, (12): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_SDR, (13): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# - JMP_ON_CS, (31): Stop execution, de-assert CS and save operand[7:0] as the instruction start pointer for next
# sequence.Normally this instruction is used to support Execute-In-Place enhanced mode. See XIP enhanced mode for
# more details.This instruction is only allowed for AHB read commands. There is interrupt status bit set
# (INTR[IPCMDERR] or INTR[AHBCMDERR]) when using this instruction in IP command or AHB write command.
# - CMD_DDR, (33): Transmit command code to Flash.
# - RADDR_DDR, (34): Transmit row address to Flash.
# - CADDR_DDR, (35): Transmit column address to Flash.
# - MODE1_DDR, (36): Transmit mode bits to Flash.
# - MODE2_DDR, (37): Transmit mode bits to Flash.
# - MODE4_DDR, (38): Transmit mode bits to Flash.
# - MODE8_DDR, (39): Transmit mode bits to Flash.
# - WRITE_DDR, (40): Transmit program data to Flash device.
# - READ_DDR, (41): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_DDR, (42): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_DDR, (43): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_DDR, (44): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_DDR, (45): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# Possible options: <STOP, CMD_SDR, RADDR_SDR, CADDR_SDR, MODE1_SDR, MODE2_SDR, MODE4_SDR, MODE8_SDR, WRITE_SDR,
# READ_SDR, LEARN_SDR, DATSZ_SDR, DUMMY_SDR, DUMMY_RWDS_SDR, JMP_ON_CS, CMD_DDR, RADDR_DDR, CADDR_DDR, MODE1_DDR,
# MODE2_DDR, MODE4_DDR, MODE8_DDR, WRITE_DDR, READ_DDR, LEARN_DDR, DATSZ_DDR, DUMMY_DDR, DUMMY_RWDS_DDR>
OPERATION_CODE: STOP
lookupTable_seq14_instr1:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq14_instr2:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq14_instr3:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq14_instr4:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq14_instr5:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq14_instr6:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq14_instr7:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
# ----------------------------------===== lookupTable_seq15_instr0 [Optional] =====-----------------------------------
# Description: Offset: 0x00000170, Width: 16b; Lookup table holds Flash command sequences 15, instruction 0
lookupTable_seq15_instr0:
# ------------------------------------------===== OPERAND [Optional] =====------------------------------------------
# Description: Offset: 0b, Width: 8b, Instruction operand. Its values depends on used instruction
OPERAND: 0
# -----------------------------------------===== NUM_PADS [Optional] =====------------------------------------------
# Description: Offset: 8b, Width: 2b, Number of pads used by instruction. Some instructions ignores this parameter.
# - 1PAD, (0): Single mode. One pad is used.
# - 2PAD, (1): Dual mode. Two pads are used.
# - 4PAD, (2): Quad mode. Four pads are used.
# - 8PAD, (3): Octal mode. Eight pads are used.
# Possible options: <1PAD, 2PAD, 4PAD, 8PAD>
NUM_PADS: 1PAD
# --------------------------------------===== OPERATION_CODE [Optional] =====---------------------------------------
# Description: Offset: 10b, Width: 6b, Instruction operation code.
# - STOP, (0): Stop execution and de-assert CS. Then, the next command sequence (to the same flash device) starts
# from instruction pointer 0.
# - CMD_SDR, (1): Transmit command code to Flash.
# - RADDR_SDR, (2): Transmit row address to Flash.
# - CADDR_SDR, (3): Transmit column address to Flash.
# - MODE1_SDR, (4): Transmit mode bits to Flash.
# - MODE2_SDR, (5): Transmit mode bits to Flash.
# - MODE4_SDR, (6): Transmit mode bits to Flash.
# - MODE8_SDR, (7): Transmit mode bits to Flash.
# - WRITE_SDR, (8): Transmit program data to Flash device.
# - READ_SDR, (9): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_SDR, (10): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_SDR, (11): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_SDR, (12): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_SDR, (13): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# - JMP_ON_CS, (31): Stop execution, de-assert CS and save operand[7:0] as the instruction start pointer for next
# sequence.Normally this instruction is used to support Execute-In-Place enhanced mode. See XIP enhanced mode for
# more details.This instruction is only allowed for AHB read commands. There is interrupt status bit set
# (INTR[IPCMDERR] or INTR[AHBCMDERR]) when using this instruction in IP command or AHB write command.
# - CMD_DDR, (33): Transmit command code to Flash.
# - RADDR_DDR, (34): Transmit row address to Flash.
# - CADDR_DDR, (35): Transmit column address to Flash.
# - MODE1_DDR, (36): Transmit mode bits to Flash.
# - MODE2_DDR, (37): Transmit mode bits to Flash.
# - MODE4_DDR, (38): Transmit mode bits to Flash.
# - MODE8_DDR, (39): Transmit mode bits to Flash.
# - WRITE_DDR, (40): Transmit program data to Flash device.
# - READ_DDR, (41): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_DDR, (42): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_DDR, (43): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_DDR, (44): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_DDR, (45): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# Possible options: <STOP, CMD_SDR, RADDR_SDR, CADDR_SDR, MODE1_SDR, MODE2_SDR, MODE4_SDR, MODE8_SDR, WRITE_SDR,
# READ_SDR, LEARN_SDR, DATSZ_SDR, DUMMY_SDR, DUMMY_RWDS_SDR, JMP_ON_CS, CMD_DDR, RADDR_DDR, CADDR_DDR, MODE1_DDR,
# MODE2_DDR, MODE4_DDR, MODE8_DDR, WRITE_DDR, READ_DDR, LEARN_DDR, DATSZ_DDR, DUMMY_DDR, DUMMY_RWDS_DDR>
OPERATION_CODE: STOP
lookupTable_seq15_instr1:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq15_instr2:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq15_instr3:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq15_instr4:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq15_instr5:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq15_instr6:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq15_instr7:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
# ---------------------------------------===== lutCustomSeq_0 [Optional] =====----------------------------------------
# Description: Offset: 0x00000180, Width: 32b; [0x180-0x1af] Customizable LUT Sequences
lutCustomSeq_0:
# ------------------------------------------===== seqNum [Optional] =====-------------------------------------------
# Description: Offset: 0b, Width: 8b, Sequence Number, valid number: 1-16
seqNum: 0
# -------------------------------------------===== seqId [Optional] =====-------------------------------------------
# Description: Offset: 8b, Width: 8b, Sequence Index, valid number: 0-15
seqId: 0
# -----------------------------------------===== reserved [Optional] =====------------------------------------------
# Description: Offset: 16b, Width: 16b, N/A
reserved: 0
# ---------------------------------------===== lutCustomSeq_1 [Optional] =====----------------------------------------
# Description: Offset: 0x00000184, Width: 32b; [0x180-0x1af] Customizable LUT Sequences
lutCustomSeq_1:
# ------------------------------------------===== seqNum [Optional] =====-------------------------------------------
# Description: Offset: 0b, Width: 8b, Sequence Number, valid number: 1-16
seqNum: 0
# -------------------------------------------===== seqId [Optional] =====-------------------------------------------
# Description: Offset: 8b, Width: 8b, Sequence Index, valid number: 0-15
seqId: 0
# -----------------------------------------===== reserved [Optional] =====------------------------------------------
# Description: Offset: 16b, Width: 16b, N/A
reserved: 0
# ---------------------------------------===== lutCustomSeq_2 [Optional] =====----------------------------------------
# Description: Offset: 0x00000188, Width: 32b; [0x180-0x1af] Customizable LUT Sequences
lutCustomSeq_2:
# ------------------------------------------===== seqNum [Optional] =====-------------------------------------------
# Description: Offset: 0b, Width: 8b, Sequence Number, valid number: 1-16
seqNum: 0
# -------------------------------------------===== seqId [Optional] =====-------------------------------------------
# Description: Offset: 8b, Width: 8b, Sequence Index, valid number: 0-15
seqId: 0
# -----------------------------------------===== reserved [Optional] =====------------------------------------------
# Description: Offset: 16b, Width: 16b, N/A
reserved: 0
# ---------------------------------------===== lutCustomSeq_3 [Optional] =====----------------------------------------
# Description: Offset: 0x0000018C, Width: 32b; [0x180-0x1af] Customizable LUT Sequences
lutCustomSeq_3:
# ------------------------------------------===== seqNum [Optional] =====-------------------------------------------
# Description: Offset: 0b, Width: 8b, Sequence Number, valid number: 1-16
seqNum: 0
# -------------------------------------------===== seqId [Optional] =====-------------------------------------------
# Description: Offset: 8b, Width: 8b, Sequence Index, valid number: 0-15
seqId: 0
# -----------------------------------------===== reserved [Optional] =====------------------------------------------
# Description: Offset: 16b, Width: 16b, N/A
reserved: 0
# ---------------------------------------===== lutCustomSeq_4 [Optional] =====----------------------------------------
# Description: Offset: 0x00000190, Width: 32b; [0x180-0x1af] Customizable LUT Sequences
lutCustomSeq_4:
# ------------------------------------------===== seqNum [Optional] =====-------------------------------------------
# Description: Offset: 0b, Width: 8b, Sequence Number, valid number: 1-16
seqNum: 0
# -------------------------------------------===== seqId [Optional] =====-------------------------------------------
# Description: Offset: 8b, Width: 8b, Sequence Index, valid number: 0-15
seqId: 0
# -----------------------------------------===== reserved [Optional] =====------------------------------------------
# Description: Offset: 16b, Width: 16b, N/A
reserved: 0
# ---------------------------------------===== lutCustomSeq_5 [Optional] =====----------------------------------------
# Description: Offset: 0x00000194, Width: 32b; [0x180-0x1af] Customizable LUT Sequences
lutCustomSeq_5:
# ------------------------------------------===== seqNum [Optional] =====-------------------------------------------
# Description: Offset: 0b, Width: 8b, Sequence Number, valid number: 1-16
seqNum: 0
# -------------------------------------------===== seqId [Optional] =====-------------------------------------------
# Description: Offset: 8b, Width: 8b, Sequence Index, valid number: 0-15
seqId: 0
# -----------------------------------------===== reserved [Optional] =====------------------------------------------
# Description: Offset: 16b, Width: 16b, N/A
reserved: 0
# ---------------------------------------===== lutCustomSeq_6 [Optional] =====----------------------------------------
# Description: Offset: 0x00000198, Width: 32b; [0x180-0x1af] Customizable LUT Sequences
lutCustomSeq_6:
# ------------------------------------------===== seqNum [Optional] =====-------------------------------------------
# Description: Offset: 0b, Width: 8b, Sequence Number, valid number: 1-16
seqNum: 0
# -------------------------------------------===== seqId [Optional] =====-------------------------------------------
# Description: Offset: 8b, Width: 8b, Sequence Index, valid number: 0-15
seqId: 0
# -----------------------------------------===== reserved [Optional] =====------------------------------------------
# Description: Offset: 16b, Width: 16b, N/A
reserved: 0
# ---------------------------------------===== lutCustomSeq_7 [Optional] =====----------------------------------------
# Description: Offset: 0x0000019C, Width: 32b; [0x180-0x1af] Customizable LUT Sequences
lutCustomSeq_7:
# ------------------------------------------===== seqNum [Optional] =====-------------------------------------------
# Description: Offset: 0b, Width: 8b, Sequence Number, valid number: 1-16
seqNum: 0
# -------------------------------------------===== seqId [Optional] =====-------------------------------------------
# Description: Offset: 8b, Width: 8b, Sequence Index, valid number: 0-15
seqId: 0
# -----------------------------------------===== reserved [Optional] =====------------------------------------------
# Description: Offset: 16b, Width: 16b, N/A
reserved: 0
# ---------------------------------------===== lutCustomSeq_8 [Optional] =====----------------------------------------
# Description: Offset: 0x000001A0, Width: 32b; [0x180-0x1af] Customizable LUT Sequences
lutCustomSeq_8:
# ------------------------------------------===== seqNum [Optional] =====-------------------------------------------
# Description: Offset: 0b, Width: 8b, Sequence Number, valid number: 1-16
seqNum: 0
# -------------------------------------------===== seqId [Optional] =====-------------------------------------------
# Description: Offset: 8b, Width: 8b, Sequence Index, valid number: 0-15
seqId: 0
# -----------------------------------------===== reserved [Optional] =====------------------------------------------
# Description: Offset: 16b, Width: 16b, N/A
reserved: 0
# ---------------------------------------===== lutCustomSeq_9 [Optional] =====----------------------------------------
# Description: Offset: 0x000001A4, Width: 32b; [0x180-0x1af] Customizable LUT Sequences
lutCustomSeq_9:
# ------------------------------------------===== seqNum [Optional] =====-------------------------------------------
# Description: Offset: 0b, Width: 8b, Sequence Number, valid number: 1-16
seqNum: 0
# -------------------------------------------===== seqId [Optional] =====-------------------------------------------
# Description: Offset: 8b, Width: 8b, Sequence Index, valid number: 0-15
seqId: 0
# -----------------------------------------===== reserved [Optional] =====------------------------------------------
# Description: Offset: 16b, Width: 16b, N/A
reserved: 0
# ---------------------------------------===== lutCustomSeq_10 [Optional] =====---------------------------------------
# Description: Offset: 0x000001A8, Width: 32b; [0x180-0x1af] Customizable LUT Sequences
lutCustomSeq_10:
# ------------------------------------------===== seqNum [Optional] =====-------------------------------------------
# Description: Offset: 0b, Width: 8b, Sequence Number, valid number: 1-16
seqNum: 0
# -------------------------------------------===== seqId [Optional] =====-------------------------------------------
# Description: Offset: 8b, Width: 8b, Sequence Index, valid number: 0-15
seqId: 0
# -----------------------------------------===== reserved [Optional] =====------------------------------------------
# Description: Offset: 16b, Width: 16b, N/A
reserved: 0
# ---------------------------------------===== lutCustomSeq_11 [Optional] =====---------------------------------------
# Description: Offset: 0x000001AC, Width: 32b; [0x180-0x1af] Customizable LUT Sequences
lutCustomSeq_11:
# ------------------------------------------===== seqNum [Optional] =====-------------------------------------------
# Description: Offset: 0b, Width: 8b, Sequence Number, valid number: 1-16
seqNum: 0
# -------------------------------------------===== seqId [Optional] =====-------------------------------------------
# Description: Offset: 8b, Width: 8b, Sequence Index, valid number: 0-15
seqId: 0
# -----------------------------------------===== reserved [Optional] =====------------------------------------------
# Description: Offset: 16b, Width: 16b, N/A
reserved: 0
# -----------------------------------------===== reserved4_0 [Optional] =====-----------------------------------------
# Description: Offset: 0x000001B0, Width: 32b; [0x1b0-0x1bf] Reserved for future use
reserved4_0: '0x00000000'
# -----------------------------------------===== reserved4_1 [Optional] =====-----------------------------------------
# Description: Offset: 0x000001B4, Width: 32b; [0x1b0-0x1bf] Reserved for future use
reserved4_1: '0x00000000'
# -----------------------------------------===== reserved4_2 [Optional] =====-----------------------------------------
# Description: Offset: 0x000001B8, Width: 32b; [0x1b0-0x1bf] Reserved for future use
reserved4_2: '0x00000000'
# -----------------------------------------===== reserved4_3 [Optional] =====-----------------------------------------
# Description: Offset: 0x000001BC, Width: 32b; [0x1b0-0x1bf] Reserved for future use
reserved4_3: '0x00000000'
# ------------------------------------------===== pageSize [Optional] =====-------------------------------------------
# Description: Offset: 0x000001C0, Width: 32b; Page size of Serial NOR
pageSize: '0x00000000'
# -----------------------------------------===== sectorSize [Optional] =====------------------------------------------
# Description: Offset: 0x000001C4, Width: 32b; Sector size of Serial NOR
sectorSize: '0x00000000'
# -------------------------------------===== ipcmdSerialClkFreq [Optional] =====--------------------------------------
# Description: Offset: 0x000001C8, Width: 8b; Clock frequency for IP command
ipcmdSerialClkFreq: '0x00'
# -------------------------------------===== isUniformBlockSize [Optional] =====--------------------------------------
# Description: Offset: 0x000001C9, Width: 8b; Sector/Block size is the same
isUniformBlockSize: '0x00'
# -------------------------------------===== isDataOrderSwapped [Optional] =====--------------------------------------
# Description: Offset: 0x000001CA, Width: 8b; Data order (D0, D1, D2, D3) is swapped (D1,D0, D3, D2)
isDataOrderSwapped: '0x00'
# -----------------------------------------===== reserved0_0 [Optional] =====-----------------------------------------
# Description: Offset: 0x000001CB, Width: 8b; Reserved for future use
reserved0_0: '0x00'
# ----------------------------------------===== serialNorType [Optional] =====----------------------------------------
# Description: Offset: 0x000001CC, Width: 8b; Serial NOR Flash type: 0/1/2/3
serialNorType: '0x00'
# --------------------------------------===== needExitNoCmdMode [Optional] =====--------------------------------------
# Description: Offset: 0x000001CD, Width: 8b; Need to exit NoCmd mode before other IP command
needExitNoCmdMode: '0x00'
# ------------------------------------===== halfClkForNonReadCmd [Optional] =====-------------------------------------
# Description: Offset: 0x000001CE, Width: 8b; Half the Serial Clock for non-read command: true/false
halfClkForNonReadCmd: '0x00'
# ------------------------------------===== needRestoreNoCmdMode [Optional] =====-------------------------------------
# Description: Offset: 0x000001CF, Width: 8b; Need to Restore NoCmd mode after IP command execution
needRestoreNoCmdMode: '0x00'
# ------------------------------------------===== blockSize [Optional] =====------------------------------------------
# Description: Offset: 0x000001D0, Width: 32b; Block size
blockSize: '0x00000000'
# ----------------------------------------===== flashStateCtx [Optional] =====----------------------------------------
# Description: Offset: 0x000001D4, Width: 32b; Flash State Context
flashStateCtx: '0x00000000'
# -----------------------------------------===== reserve2_0 [Optional] =====------------------------------------------
# Description: Offset: 0x000001D8, Width: 32b; Reserved for future use
reserve2_0: '0x00000000'
# -----------------------------------------===== reserve2_1 [Optional] =====------------------------------------------
# Description: Offset: 0x000001DC, Width: 32b; Reserved for future use
reserve2_1: '0x00000000'
# -----------------------------------------===== reserve2_2 [Optional] =====------------------------------------------
# Description: Offset: 0x000001E0, Width: 32b; Reserved for future use
reserve2_2: '0x00000000'
# -----------------------------------------===== reserve2_3 [Optional] =====------------------------------------------
# Description: Offset: 0x000001E4, Width: 32b; Reserved for future use
reserve2_3: '0x00000000'
# -----------------------------------------===== reserve2_4 [Optional] =====------------------------------------------
# Description: Offset: 0x000001E8, Width: 32b; Reserved for future use
reserve2_4: '0x00000000'
# -----------------------------------------===== reserve2_5 [Optional] =====------------------------------------------
# Description: Offset: 0x000001EC, Width: 32b; Reserved for future use
reserve2_5: '0x00000000'
# -----------------------------------------===== reserve2_6 [Optional] =====------------------------------------------
# Description: Offset: 0x000001F0, Width: 32b; Reserved for future use
reserve2_6: '0x00000000'
# -----------------------------------------===== reserve2_7 [Optional] =====------------------------------------------
# Description: Offset: 0x000001F4, Width: 32b; Reserved for future use
reserve2_7: '0x00000000'
# -----------------------------------------===== reserve2_8 [Optional] =====------------------------------------------
# Description: Offset: 0x000001F8, Width: 32b; Reserved for future use
reserve2_8: '0x00000000'
# -----------------------------------------===== reserve2_9 [Optional] =====------------------------------------------
# Description: Offset: 0x000001FC, Width: 32b; Reserved for future use
reserve2_9: '0x00000000'
FCB for mimxrt735s, Revision: b0 and xspi_nor#
FCB for mimxrt735s, Revision: b0 and xspi_nor JSON schema
FCB for mimxrt735s, Revision: b0 and xspi_nor YAML configuration template
# ================================== FCB for mimxrt735s, Revision: b0 and xspi_nor ===================================
# ======================================================================================================================
# == FCB for mimxrt735s, Revision: b0 and xspi_nor ==
# ======================================================================================================================
# -------------------------------------===== The chip family name [Required] =====--------------------------------------
# Description: NXP chip family identifier.
family: CHOOSE_FROM_TABLE
# -----------------------------------------===== MCU revision [Optional] =====------------------------------------------
# Description: Revision of silicon. The 'latest' name, means most current revision.
# Possible options: <a0, a1, b0, latest>
revision: b0
# ------------------------------------------===== Memory type [Required] =====------------------------------------------
# Description: Specify type of memory used by FCB description.
# Possible options: <xspi_nor>
type: xspi_nor
# ------------------------------------------===== mimxrt735s [Required] =====-------------------------------------------
fcb_settings:
# ---------------------------------------------===== tag [Optional] =====---------------------------------------------
# Description: Offset: 0x00000000, Width: 32b; [0x000-0x003] Tag, fixed value 0x42464346UL
tag: '0x00000000'
# -------------------------------------------===== version [Optional] =====-------------------------------------------
# Description: Offset: 0x00000004, Width: 32b; [0x004-0x007] Version,[31:24] -'V', [23:16] - Major, [15:8] - Minor,
# [7:0] - bugfix
version: '0x00000000'
# ------------------------------------------===== reserved0 [Optional] =====------------------------------------------
# Description: Offset: 0x00000008, Width: 32b; [0x008-0x00b] Reserved for future use
reserved0: '0x00000000'
# --------------------------------------===== readSampleClkSrc [Optional] =====---------------------------------------
# Description: Offset: 0x0000000C, Width: 8b; [0x00c-0x00c] Read Sample Clock Source, valid value: 0: internal
# sampling 2: DQS pad loopback 3: External DQS signal
readSampleClkSrc: '0x00'
# -----------------------------------------===== csHoldTime [Optional] =====------------------------------------------
# Description: Offset: 0x0000000D, Width: 8b; [0x00d-0x00d] CS hold time, default value: 3
csHoldTime: '0x00'
# -----------------------------------------===== csSetupTime [Optional] =====-----------------------------------------
# Description: Offset: 0x0000000E, Width: 8b; [0x00e-0x00e] CS setup time, default value: 3
csSetupTime: '0x00'
# -------------------------------------===== columnAddressWidth [Optional] =====--------------------------------------
# Description: Offset: 0x0000000F, Width: 8b; [0x00f-0x00f] Column Address with, for HyperBus protocol, it is fixed
# to 3, others to 0.
columnAddressWidth: '0x00'
# -------------------------------------===== deviceModeCfgEnable [Optional] =====-------------------------------------
# Description: Offset: 0x00000010, Width: 8b; [0x010-0x010] Device Mode Configure enable flag, 1 - Enable, 0 -
# Disable
deviceModeCfgEnable: '0x00'
# ---------------------------------------===== deviceModeType [Optional] =====----------------------------------------
# Description: Offset: 0x00000011, Width: 8b; [0x011-0x011] Specify the configuration command type. 0: No mode change
# 1: Quad enable (switch from SPI to Quad mode) 2: Spi2Xpi (switch from SPI to DPI, QPI, or OPI mode) 3: Xpi2Spi
# (switch from DPI, QPI, or OPI to SPI mode)
deviceModeType: '0x00'
# -------------------------------------===== waitTimeCfgCommands [Optional] =====-------------------------------------
# Description: Offset: 0x00000012, Width: 16b; [0x012-0x013] Wait time for Device mode configuration command, unit:
# 100us
waitTimeCfgCommands: '0x0000'
# ----------------------------------------===== deviceModeSeq [Optional] =====----------------------------------------
# Description: Offset: 0x00000014, Width: 32b; [0x014-0x017] Device mode sequence info [ 7:0] - Number of required
# sequences [15:8] - Sequence index
deviceModeSeq:
# ------------------------------------------===== seqNum [Optional] =====-------------------------------------------
# Description: Offset: 0b, Width: 8b, Sequence Number, valid number: 1-16
seqNum: 0
# -------------------------------------------===== seqId [Optional] =====-------------------------------------------
# Description: Offset: 8b, Width: 8b, Sequence Index, valid number: 0-15
seqId: 0
# -----------------------------------------===== reserved [Optional] =====------------------------------------------
# Description: Offset: 16b, Width: 16b, N/A
reserved: 0
# ----------------------------------------===== deviceModeArg [Optional] =====----------------------------------------
# Description: Offset: 0x00000018, Width: 32b; [0x018-0x01b] Argument/Parameter for device configuration
deviceModeArg: '0x00000000'
# ---------------------------------------===== configCmdEnable [Optional] =====---------------------------------------
# Description: Offset: 0x0000001C, Width: 8b; [0x01c-0x01c] Configure command Enable Flag, 1 - Enable, 0 - Disable
configCmdEnable: '0x00'
# --------------------------------------===== configModeType_0 [Optional] =====---------------------------------------
# Description: Offset: 0x0000001D, Width: 8b; [0x01d-0x01f] Configure Mode Type, similar as deviceModeTpe
configModeType_0: '0x00'
# --------------------------------------===== configModeType_1 [Optional] =====---------------------------------------
# Description: Offset: 0x0000001E, Width: 8b; [0x01d-0x01f] Configure Mode Type, similar as deviceModeTpe
configModeType_1: '0x00'
# --------------------------------------===== configModeType_2 [Optional] =====---------------------------------------
# Description: Offset: 0x0000001F, Width: 8b; [0x01d-0x01f] Configure Mode Type, similar as deviceModeTpe
configModeType_2: '0x00'
# ---------------------------------------===== configCmdSeqs_0 [Optional] =====---------------------------------------
# Description: Offset: 0x00000020, Width: 32b; [0x020-0x02b] Sequence info for Device Configuration command, similar
# as deviceModeSeq
configCmdSeqs_0:
# ------------------------------------------===== seqNum [Optional] =====-------------------------------------------
# Description: Offset: 0b, Width: 8b, Sequence Number, valid number: 1-16
seqNum: 0
# -------------------------------------------===== seqId [Optional] =====-------------------------------------------
# Description: Offset: 8b, Width: 8b, Sequence Index, valid number: 0-15
seqId: 0
# -----------------------------------------===== reserved [Optional] =====------------------------------------------
# Description: Offset: 16b, Width: 16b, N/A
reserved: 0
# ---------------------------------------===== configCmdSeqs_1 [Optional] =====---------------------------------------
# Description: Offset: 0x00000024, Width: 32b; [0x020-0x02b] Sequence info for Device Configuration command, similar
# as deviceModeSeq
configCmdSeqs_1:
# ------------------------------------------===== seqNum [Optional] =====-------------------------------------------
# Description: Offset: 0b, Width: 8b, Sequence Number, valid number: 1-16
seqNum: 0
# -------------------------------------------===== seqId [Optional] =====-------------------------------------------
# Description: Offset: 8b, Width: 8b, Sequence Index, valid number: 0-15
seqId: 0
# -----------------------------------------===== reserved [Optional] =====------------------------------------------
# Description: Offset: 16b, Width: 16b, N/A
reserved: 0
# ---------------------------------------===== configCmdSeqs_2 [Optional] =====---------------------------------------
# Description: Offset: 0x00000028, Width: 32b; [0x020-0x02b] Sequence info for Device Configuration command, similar
# as deviceModeSeq
configCmdSeqs_2:
# ------------------------------------------===== seqNum [Optional] =====-------------------------------------------
# Description: Offset: 0b, Width: 8b, Sequence Number, valid number: 1-16
seqNum: 0
# -------------------------------------------===== seqId [Optional] =====-------------------------------------------
# Description: Offset: 8b, Width: 8b, Sequence Index, valid number: 0-15
seqId: 0
# -----------------------------------------===== reserved [Optional] =====------------------------------------------
# Description: Offset: 16b, Width: 16b, N/A
reserved: 0
# ------------------------------------------===== reserved1 [Optional] =====------------------------------------------
# Description: Offset: 0x0000002C, Width: 32b; [0x02c-0x02f] Reserved for future use
reserved1: '0x00000000'
# ---------------------------------------===== configCmdArgs_0 [Optional] =====---------------------------------------
# Description: Offset: 0x00000030, Width: 32b; [0x030-0x03b] Arguments/Parameters for device Configuration commands
configCmdArgs_0: '0x00000000'
# ---------------------------------------===== configCmdArgs_1 [Optional] =====---------------------------------------
# Description: Offset: 0x00000034, Width: 32b; [0x030-0x03b] Arguments/Parameters for device Configuration commands
configCmdArgs_1: '0x00000000'
# ---------------------------------------===== configCmdArgs_2 [Optional] =====---------------------------------------
# Description: Offset: 0x00000038, Width: 32b; [0x030-0x03b] Arguments/Parameters for device Configuration commands
configCmdArgs_2: '0x00000000'
# ------------------------------------------===== reserved2 [Optional] =====------------------------------------------
# Description: Offset: 0x0000003C, Width: 32b; [0x03c-0x03f] Reserved for future use
reserved2: '0x00000000'
# ------------------------------------===== controllerMiscOption [Optional] =====-------------------------------------
# Description: Offset: 0x00000040, Width: 32b; N/A
controllerMiscOption: '0x00000000'
# -----------------------------------------===== deviceType [Optional] =====------------------------------------------
# Description: Offset: 0x00000044, Width: 8b; [0x044-0x044] Device Type: 1 for Serial NOR flash memory
deviceType: '0x00'
# ----------------------------------------===== sflashPadType [Optional] =====----------------------------------------
# Description: Offset: 0x00000045, Width: 8b; [0x045-0x045] Serial Flash Pad Type: 1 - Single, 2 - Dual, 4 - Quad, 8
# - Octal
sflashPadType: '0x00'
# ----------------------------------------===== serialClkFreq [Optional] =====----------------------------------------
# Description: Offset: 0x00000046, Width: 8b; [0x046-0x046] Serial Flash Frequency 1: 30 MHz 2: 50 MHz 3: 60 MHz 4:
# 80 MHz 5: 100 MHz 6: 120 MHz 7: 133 MHz 8: 166 MHz 9: 200 MHz
serialClkFreq: '0x00'
# -------------------------------------===== lutCustomSeqEnable [Optional] =====--------------------------------------
# Description: Offset: 0x00000047, Width: 8b; [0x047-0x047] LUT customization Enable, it is required if the
# program/erase cannot be done using 1 LUT sequence, currently, only applicable to HyperFLASH
lutCustomSeqEnable: '0x00'
# -----------------------------------------===== reserved3_0 [Optional] =====-----------------------------------------
# Description: Offset: 0x00000048, Width: 32b; [0x048-0x04f] Reserved for future use
reserved3_0: '0x00000000'
# -----------------------------------------===== reserved3_1 [Optional] =====-----------------------------------------
# Description: Offset: 0x0000004C, Width: 32b; [0x048-0x04f] Reserved for future use
reserved3_1: '0x00000000'
# ----------------------------------------===== sflashA1Size [Optional] =====-----------------------------------------
# Description: Offset: 0x00000050, Width: 32b; [0x050-0x053] Size of Flash connected to A1
sflashA1Size: '0x00000000'
# ----------------------------------------===== sflashA2Size [Optional] =====-----------------------------------------
# Description: Offset: 0x00000054, Width: 32b; [0x054-0x057] Size of Flash connected to A2
sflashA2Size: '0x00000000'
# ----------------------------------------===== sflashB1Size [Optional] =====-----------------------------------------
# Description: Offset: 0x00000058, Width: 32b; [0x058-0x05b] Size of Flash connected to B1
sflashB1Size: '0x00000000'
# ----------------------------------------===== sflashB2Size [Optional] =====-----------------------------------------
# Description: Offset: 0x0000005C, Width: 32b; [0x05c-0x05f] Size of Flash connected to B2
sflashB2Size: '0x00000000'
# ------------------------------------===== csPadSettingOverride [Optional] =====-------------------------------------
# Description: Offset: 0x00000060, Width: 32b; [0x060-0x063] CS pad setting override value
csPadSettingOverride: '0x00000000'
# -----------------------------------===== sclkPadSettingOverride [Optional] =====------------------------------------
# Description: Offset: 0x00000064, Width: 32b; [0x064-0x067] SCK pad setting override value
sclkPadSettingOverride: '0x00000000'
# -----------------------------------===== dataPadSettingOverride [Optional] =====------------------------------------
# Description: Offset: 0x00000068, Width: 32b; [0x068-0x06b] data pad setting override value
dataPadSettingOverride: '0x00000000'
# ------------------------------------===== dqsPadSettingOverride [Optional] =====------------------------------------
# Description: Offset: 0x0000006C, Width: 32b; [0x06c-0x06f] DQS pad setting override value
dqsPadSettingOverride: '0x00000000'
# -----------------------------------------===== timeoutInMs [Optional] =====-----------------------------------------
# Description: Offset: 0x00000070, Width: 32b; [0x070-0x073] Timeout threshold for read status command
timeoutInMs: '0x00000000'
# ---------------------------------------===== commandInterval [Optional] =====---------------------------------------
# Description: Offset: 0x00000074, Width: 32b; [0x074-0x077] CS deselect interval between two commands
commandInterval: '0x00000000'
# ---------------------------------------===== dataValidTime_0 [Optional] =====---------------------------------------
# Description: Offset: 0x00000078, Width: 16b; [0x078-0x07b] CLK edge to data valid time for PORT A and PORT B
dataValidTime_0:
# ----------------------------------------===== time_100ps [Optional] =====-----------------------------------------
# Description: Offset: 0b, Width: 8b, Data valid time, in terms of 100ps
time_100ps: 0
# ----------------------------------------===== delay_cells [Optional] =====----------------------------------------
# Description: Offset: 8b, Width: 8b, Data valid time, in terms of delay cells
delay_cells: 0
# ---------------------------------------===== dataValidTime_1 [Optional] =====---------------------------------------
# Description: Offset: 0x0000007A, Width: 16b; [0x078-0x07b] CLK edge to data valid time for PORT A and PORT B
dataValidTime_1:
# ----------------------------------------===== time_100ps [Optional] =====-----------------------------------------
# Description: Offset: 0b, Width: 8b, Data valid time, in terms of 100ps
time_100ps: 0
# ----------------------------------------===== delay_cells [Optional] =====----------------------------------------
# Description: Offset: 8b, Width: 8b, Data valid time, in terms of delay cells
delay_cells: 0
# -----------------------------------------===== busyOffset [Optional] =====------------------------------------------
# Description: Offset: 0x0000007C, Width: 16b; [0x07c-0x07d] Busy offset, valid value: 0-31
busyOffset: '0x0000'
# ---------------------------------------===== busyBitPolarity [Optional] =====---------------------------------------
# Description: Offset: 0x0000007E, Width: 16b; [0x07e-0x07f] Busy flag polarity, 0 - busy flag is 1 when flash device
# is busy, 1 - busy flag is 0 when flash device is busy
busyBitPolarity: '0x0000'
# ----------------------------------------===== lookupTable_0 [Optional] =====----------------------------------------
# Description: Offset: 0x00000080, Width: 32b; [0x080-0x1e7] Lookup table holds Flash command sequences
lookupTable_0: '0x00000000'
# ----------------------------------------===== lookupTable_1 [Optional] =====----------------------------------------
# Description: Offset: 0x00000084, Width: 32b; [0x080-0x1e7] Lookup table holds Flash command sequences
lookupTable_1: '0x00000000'
# ----------------------------------------===== lookupTable_2 [Optional] =====----------------------------------------
# Description: Offset: 0x00000088, Width: 32b; [0x080-0x1e7] Lookup table holds Flash command sequences
lookupTable_2: '0x00000000'
# ----------------------------------------===== lookupTable_3 [Optional] =====----------------------------------------
# Description: Offset: 0x0000008C, Width: 32b; [0x080-0x1e7] Lookup table holds Flash command sequences
lookupTable_3: '0x00000000'
# ----------------------------------------===== lookupTable_4 [Optional] =====----------------------------------------
# Description: Offset: 0x00000090, Width: 32b; [0x080-0x1e7] Lookup table holds Flash command sequences
lookupTable_4: '0x00000000'
# ----------------------------------------===== lookupTable_5 [Optional] =====----------------------------------------
# Description: Offset: 0x00000094, Width: 32b; [0x080-0x1e7] Lookup table holds Flash command sequences
lookupTable_5: '0x00000000'
# ----------------------------------------===== lookupTable_6 [Optional] =====----------------------------------------
# Description: Offset: 0x00000098, Width: 32b; [0x080-0x1e7] Lookup table holds Flash command sequences
lookupTable_6: '0x00000000'
# ----------------------------------------===== lookupTable_7 [Optional] =====----------------------------------------
# Description: Offset: 0x0000009C, Width: 32b; [0x080-0x1e7] Lookup table holds Flash command sequences
lookupTable_7: '0x00000000'
# ----------------------------------------===== lookupTable_8 [Optional] =====----------------------------------------
# Description: Offset: 0x000000A0, Width: 32b; [0x080-0x1e7] Lookup table holds Flash command sequences
lookupTable_8: '0x00000000'
# ----------------------------------------===== lookupTable_9 [Optional] =====----------------------------------------
# Description: Offset: 0x000000A4, Width: 32b; [0x080-0x1e7] Lookup table holds Flash command sequences
lookupTable_9: '0x00000000'
# ---------------------------------------===== lookupTable_10 [Optional] =====----------------------------------------
# Description: Offset: 0x000000A8, Width: 32b; [0x080-0x1e7] Lookup table holds Flash command sequences
lookupTable_10: '0x00000000'
# ---------------------------------------===== lookupTable_11 [Optional] =====----------------------------------------
# Description: Offset: 0x000000AC, Width: 32b; [0x080-0x1e7] Lookup table holds Flash command sequences
lookupTable_11: '0x00000000'
# ---------------------------------------===== lookupTable_12 [Optional] =====----------------------------------------
# Description: Offset: 0x000000B0, Width: 32b; [0x080-0x1e7] Lookup table holds Flash command sequences
lookupTable_12: '0x00000000'
# ---------------------------------------===== lookupTable_13 [Optional] =====----------------------------------------
# Description: Offset: 0x000000B4, Width: 32b; [0x080-0x1e7] Lookup table holds Flash command sequences
lookupTable_13: '0x00000000'
# ---------------------------------------===== lookupTable_14 [Optional] =====----------------------------------------
# Description: Offset: 0x000000B8, Width: 32b; [0x080-0x1e7] Lookup table holds Flash command sequences
lookupTable_14: '0x00000000'
# ---------------------------------------===== lookupTable_15 [Optional] =====----------------------------------------
# Description: Offset: 0x000000BC, Width: 32b; [0x080-0x1e7] Lookup table holds Flash command sequences
lookupTable_15: '0x00000000'
# ---------------------------------------===== lookupTable_16 [Optional] =====----------------------------------------
# Description: Offset: 0x000000C0, Width: 32b; [0x080-0x1e7] Lookup table holds Flash command sequences
lookupTable_16: '0x00000000'
# ---------------------------------------===== lookupTable_17 [Optional] =====----------------------------------------
# Description: Offset: 0x000000C4, Width: 32b; [0x080-0x1e7] Lookup table holds Flash command sequences
lookupTable_17: '0x00000000'
# ---------------------------------------===== lookupTable_18 [Optional] =====----------------------------------------
# Description: Offset: 0x000000C8, Width: 32b; [0x080-0x1e7] Lookup table holds Flash command sequences
lookupTable_18: '0x00000000'
# ---------------------------------------===== lookupTable_19 [Optional] =====----------------------------------------
# Description: Offset: 0x000000CC, Width: 32b; [0x080-0x1e7] Lookup table holds Flash command sequences
lookupTable_19: '0x00000000'
# ---------------------------------------===== lookupTable_20 [Optional] =====----------------------------------------
# Description: Offset: 0x000000D0, Width: 32b; [0x080-0x1e7] Lookup table holds Flash command sequences
lookupTable_20: '0x00000000'
# ---------------------------------------===== lookupTable_21 [Optional] =====----------------------------------------
# Description: Offset: 0x000000D4, Width: 32b; [0x080-0x1e7] Lookup table holds Flash command sequences
lookupTable_21: '0x00000000'
# ---------------------------------------===== lookupTable_22 [Optional] =====----------------------------------------
# Description: Offset: 0x000000D8, Width: 32b; [0x080-0x1e7] Lookup table holds Flash command sequences
lookupTable_22: '0x00000000'
# ---------------------------------------===== lookupTable_23 [Optional] =====----------------------------------------
# Description: Offset: 0x000000DC, Width: 32b; [0x080-0x1e7] Lookup table holds Flash command sequences
lookupTable_23: '0x00000000'
# ---------------------------------------===== lookupTable_24 [Optional] =====----------------------------------------
# Description: Offset: 0x000000E0, Width: 32b; [0x080-0x1e7] Lookup table holds Flash command sequences
lookupTable_24: '0x00000000'
# ---------------------------------------===== lookupTable_25 [Optional] =====----------------------------------------
# Description: Offset: 0x000000E4, Width: 32b; [0x080-0x1e7] Lookup table holds Flash command sequences
lookupTable_25: '0x00000000'
# ---------------------------------------===== lookupTable_26 [Optional] =====----------------------------------------
# Description: Offset: 0x000000E8, Width: 32b; [0x080-0x1e7] Lookup table holds Flash command sequences
lookupTable_26: '0x00000000'
# ---------------------------------------===== lookupTable_27 [Optional] =====----------------------------------------
# Description: Offset: 0x000000EC, Width: 32b; [0x080-0x1e7] Lookup table holds Flash command sequences
lookupTable_27: '0x00000000'
# ---------------------------------------===== lookupTable_28 [Optional] =====----------------------------------------
# Description: Offset: 0x000000F0, Width: 32b; [0x080-0x1e7] Lookup table holds Flash command sequences
lookupTable_28: '0x00000000'
# ---------------------------------------===== lookupTable_29 [Optional] =====----------------------------------------
# Description: Offset: 0x000000F4, Width: 32b; [0x080-0x1e7] Lookup table holds Flash command sequences
lookupTable_29: '0x00000000'
# ---------------------------------------===== lookupTable_30 [Optional] =====----------------------------------------
# Description: Offset: 0x000000F8, Width: 32b; [0x080-0x1e7] Lookup table holds Flash command sequences
lookupTable_30: '0x00000000'
# ---------------------------------------===== lookupTable_31 [Optional] =====----------------------------------------
# Description: Offset: 0x000000FC, Width: 32b; [0x080-0x1e7] Lookup table holds Flash command sequences
lookupTable_31: '0x00000000'
# ---------------------------------------===== lookupTable_32 [Optional] =====----------------------------------------
# Description: Offset: 0x00000100, Width: 32b; [0x080-0x1e7] Lookup table holds Flash command sequences
lookupTable_32: '0x00000000'
# ---------------------------------------===== lookupTable_33 [Optional] =====----------------------------------------
# Description: Offset: 0x00000104, Width: 32b; [0x080-0x1e7] Lookup table holds Flash command sequences
lookupTable_33: '0x00000000'
# ---------------------------------------===== lookupTable_34 [Optional] =====----------------------------------------
# Description: Offset: 0x00000108, Width: 32b; [0x080-0x1e7] Lookup table holds Flash command sequences
lookupTable_34: '0x00000000'
# ---------------------------------------===== lookupTable_35 [Optional] =====----------------------------------------
# Description: Offset: 0x0000010C, Width: 32b; [0x080-0x1e7] Lookup table holds Flash command sequences
lookupTable_35: '0x00000000'
# ---------------------------------------===== lookupTable_36 [Optional] =====----------------------------------------
# Description: Offset: 0x00000110, Width: 32b; [0x080-0x1e7] Lookup table holds Flash command sequences
lookupTable_36: '0x00000000'
# ---------------------------------------===== lookupTable_37 [Optional] =====----------------------------------------
# Description: Offset: 0x00000114, Width: 32b; [0x080-0x1e7] Lookup table holds Flash command sequences
lookupTable_37: '0x00000000'
# ---------------------------------------===== lookupTable_38 [Optional] =====----------------------------------------
# Description: Offset: 0x00000118, Width: 32b; [0x080-0x1e7] Lookup table holds Flash command sequences
lookupTable_38: '0x00000000'
# ---------------------------------------===== lookupTable_39 [Optional] =====----------------------------------------
# Description: Offset: 0x0000011C, Width: 32b; [0x080-0x1e7] Lookup table holds Flash command sequences
lookupTable_39: '0x00000000'
# ---------------------------------------===== lookupTable_40 [Optional] =====----------------------------------------
# Description: Offset: 0x00000120, Width: 32b; [0x080-0x1e7] Lookup table holds Flash command sequences
lookupTable_40: '0x00000000'
# ---------------------------------------===== lookupTable_41 [Optional] =====----------------------------------------
# Description: Offset: 0x00000124, Width: 32b; [0x080-0x1e7] Lookup table holds Flash command sequences
lookupTable_41: '0x00000000'
# ---------------------------------------===== lookupTable_42 [Optional] =====----------------------------------------
# Description: Offset: 0x00000128, Width: 32b; [0x080-0x1e7] Lookup table holds Flash command sequences
lookupTable_42: '0x00000000'
# ---------------------------------------===== lookupTable_43 [Optional] =====----------------------------------------
# Description: Offset: 0x0000012C, Width: 32b; [0x080-0x1e7] Lookup table holds Flash command sequences
lookupTable_43: '0x00000000'
# ---------------------------------------===== lookupTable_44 [Optional] =====----------------------------------------
# Description: Offset: 0x00000130, Width: 32b; [0x080-0x1e7] Lookup table holds Flash command sequences
lookupTable_44: '0x00000000'
# ---------------------------------------===== lookupTable_45 [Optional] =====----------------------------------------
# Description: Offset: 0x00000134, Width: 32b; [0x080-0x1e7] Lookup table holds Flash command sequences
lookupTable_45: '0x00000000'
# ---------------------------------------===== lookupTable_46 [Optional] =====----------------------------------------
# Description: Offset: 0x00000138, Width: 32b; [0x080-0x1e7] Lookup table holds Flash command sequences
lookupTable_46: '0x00000000'
# ---------------------------------------===== lookupTable_47 [Optional] =====----------------------------------------
# Description: Offset: 0x0000013C, Width: 32b; [0x080-0x1e7] Lookup table holds Flash command sequences
lookupTable_47: '0x00000000'
# ---------------------------------------===== lookupTable_48 [Optional] =====----------------------------------------
# Description: Offset: 0x00000140, Width: 32b; [0x080-0x1e7] Lookup table holds Flash command sequences
lookupTable_48: '0x00000000'
# ---------------------------------------===== lookupTable_49 [Optional] =====----------------------------------------
# Description: Offset: 0x00000144, Width: 32b; [0x080-0x1e7] Lookup table holds Flash command sequences
lookupTable_49: '0x00000000'
# ---------------------------------------===== lookupTable_50 [Optional] =====----------------------------------------
# Description: Offset: 0x00000148, Width: 32b; [0x080-0x1e7] Lookup table holds Flash command sequences
lookupTable_50: '0x00000000'
# ---------------------------------------===== lookupTable_51 [Optional] =====----------------------------------------
# Description: Offset: 0x0000014C, Width: 32b; [0x080-0x1e7] Lookup table holds Flash command sequences
lookupTable_51: '0x00000000'
# ---------------------------------------===== lookupTable_52 [Optional] =====----------------------------------------
# Description: Offset: 0x00000150, Width: 32b; [0x080-0x1e7] Lookup table holds Flash command sequences
lookupTable_52: '0x00000000'
# ---------------------------------------===== lookupTable_53 [Optional] =====----------------------------------------
# Description: Offset: 0x00000154, Width: 32b; [0x080-0x1e7] Lookup table holds Flash command sequences
lookupTable_53: '0x00000000'
# ---------------------------------------===== lookupTable_54 [Optional] =====----------------------------------------
# Description: Offset: 0x00000158, Width: 32b; [0x080-0x1e7] Lookup table holds Flash command sequences
lookupTable_54: '0x00000000'
# ---------------------------------------===== lookupTable_55 [Optional] =====----------------------------------------
# Description: Offset: 0x0000015C, Width: 32b; [0x080-0x1e7] Lookup table holds Flash command sequences
lookupTable_55: '0x00000000'
# ---------------------------------------===== lookupTable_56 [Optional] =====----------------------------------------
# Description: Offset: 0x00000160, Width: 32b; [0x080-0x1e7] Lookup table holds Flash command sequences
lookupTable_56: '0x00000000'
# ---------------------------------------===== lookupTable_57 [Optional] =====----------------------------------------
# Description: Offset: 0x00000164, Width: 32b; [0x080-0x1e7] Lookup table holds Flash command sequences
lookupTable_57: '0x00000000'
# ---------------------------------------===== lookupTable_58 [Optional] =====----------------------------------------
# Description: Offset: 0x00000168, Width: 32b; [0x080-0x1e7] Lookup table holds Flash command sequences
lookupTable_58: '0x00000000'
# ---------------------------------------===== lookupTable_59 [Optional] =====----------------------------------------
# Description: Offset: 0x0000016C, Width: 32b; [0x080-0x1e7] Lookup table holds Flash command sequences
lookupTable_59: '0x00000000'
# ---------------------------------------===== lookupTable_60 [Optional] =====----------------------------------------
# Description: Offset: 0x00000170, Width: 32b; [0x080-0x1e7] Lookup table holds Flash command sequences
lookupTable_60: '0x00000000'
# ---------------------------------------===== lookupTable_61 [Optional] =====----------------------------------------
# Description: Offset: 0x00000174, Width: 32b; [0x080-0x1e7] Lookup table holds Flash command sequences
lookupTable_61: '0x00000000'
# ---------------------------------------===== lookupTable_62 [Optional] =====----------------------------------------
# Description: Offset: 0x00000178, Width: 32b; [0x080-0x1e7] Lookup table holds Flash command sequences
lookupTable_62: '0x00000000'
# ---------------------------------------===== lookupTable_63 [Optional] =====----------------------------------------
# Description: Offset: 0x0000017C, Width: 32b; [0x080-0x1e7] Lookup table holds Flash command sequences
lookupTable_63: '0x00000000'
# ---------------------------------------===== lookupTable_64 [Optional] =====----------------------------------------
# Description: Offset: 0x00000180, Width: 32b; [0x080-0x1e7] Lookup table holds Flash command sequences
lookupTable_64: '0x00000000'
# ---------------------------------------===== lookupTable_65 [Optional] =====----------------------------------------
# Description: Offset: 0x00000184, Width: 32b; [0x080-0x1e7] Lookup table holds Flash command sequences
lookupTable_65: '0x00000000'
# ---------------------------------------===== lookupTable_66 [Optional] =====----------------------------------------
# Description: Offset: 0x00000188, Width: 32b; [0x080-0x1e7] Lookup table holds Flash command sequences
lookupTable_66: '0x00000000'
# ---------------------------------------===== lookupTable_67 [Optional] =====----------------------------------------
# Description: Offset: 0x0000018C, Width: 32b; [0x080-0x1e7] Lookup table holds Flash command sequences
lookupTable_67: '0x00000000'
# ---------------------------------------===== lookupTable_68 [Optional] =====----------------------------------------
# Description: Offset: 0x00000190, Width: 32b; [0x080-0x1e7] Lookup table holds Flash command sequences
lookupTable_68: '0x00000000'
# ---------------------------------------===== lookupTable_69 [Optional] =====----------------------------------------
# Description: Offset: 0x00000194, Width: 32b; [0x080-0x1e7] Lookup table holds Flash command sequences
lookupTable_69: '0x00000000'
# ---------------------------------------===== lookupTable_70 [Optional] =====----------------------------------------
# Description: Offset: 0x00000198, Width: 32b; [0x080-0x1e7] Lookup table holds Flash command sequences
lookupTable_70: '0x00000000'
# ---------------------------------------===== lookupTable_71 [Optional] =====----------------------------------------
# Description: Offset: 0x0000019C, Width: 32b; [0x080-0x1e7] Lookup table holds Flash command sequences
lookupTable_71: '0x00000000'
# ---------------------------------------===== lookupTable_72 [Optional] =====----------------------------------------
# Description: Offset: 0x000001A0, Width: 32b; [0x080-0x1e7] Lookup table holds Flash command sequences
lookupTable_72: '0x00000000'
# ---------------------------------------===== lookupTable_73 [Optional] =====----------------------------------------
# Description: Offset: 0x000001A4, Width: 32b; [0x080-0x1e7] Lookup table holds Flash command sequences
lookupTable_73: '0x00000000'
# ---------------------------------------===== lookupTable_74 [Optional] =====----------------------------------------
# Description: Offset: 0x000001A8, Width: 32b; [0x080-0x1e7] Lookup table holds Flash command sequences
lookupTable_74: '0x00000000'
# ---------------------------------------===== lookupTable_75 [Optional] =====----------------------------------------
# Description: Offset: 0x000001AC, Width: 32b; [0x080-0x1e7] Lookup table holds Flash command sequences
lookupTable_75: '0x00000000'
# ---------------------------------------===== lookupTable_76 [Optional] =====----------------------------------------
# Description: Offset: 0x000001B0, Width: 32b; [0x080-0x1e7] Lookup table holds Flash command sequences
lookupTable_76: '0x00000000'
# ---------------------------------------===== lookupTable_77 [Optional] =====----------------------------------------
# Description: Offset: 0x000001B4, Width: 32b; [0x080-0x1e7] Lookup table holds Flash command sequences
lookupTable_77: '0x00000000'
# ---------------------------------------===== lookupTable_78 [Optional] =====----------------------------------------
# Description: Offset: 0x000001B8, Width: 32b; [0x080-0x1e7] Lookup table holds Flash command sequences
lookupTable_78: '0x00000000'
# ---------------------------------------===== lookupTable_79 [Optional] =====----------------------------------------
# Description: Offset: 0x000001BC, Width: 32b; [0x080-0x1e7] Lookup table holds Flash command sequences
lookupTable_79: '0x00000000'
# ---------------------------------------===== lookupTable_80 [Optional] =====----------------------------------------
# Description: Offset: 0x000001C0, Width: 32b; [0x080-0x1e7] Lookup table holds Flash command sequences
lookupTable_80: '0x00000000'
# ---------------------------------------===== lookupTable_81 [Optional] =====----------------------------------------
# Description: Offset: 0x000001C4, Width: 32b; [0x080-0x1e7] Lookup table holds Flash command sequences
lookupTable_81: '0x00000000'
# ---------------------------------------===== lookupTable_82 [Optional] =====----------------------------------------
# Description: Offset: 0x000001C8, Width: 32b; [0x080-0x1e7] Lookup table holds Flash command sequences
lookupTable_82: '0x00000000'
# ---------------------------------------===== lookupTable_83 [Optional] =====----------------------------------------
# Description: Offset: 0x000001CC, Width: 32b; [0x080-0x1e7] Lookup table holds Flash command sequences
lookupTable_83: '0x00000000'
# ---------------------------------------===== lookupTable_84 [Optional] =====----------------------------------------
# Description: Offset: 0x000001D0, Width: 32b; [0x080-0x1e7] Lookup table holds Flash command sequences
lookupTable_84: '0x00000000'
# ---------------------------------------===== lookupTable_85 [Optional] =====----------------------------------------
# Description: Offset: 0x000001D4, Width: 32b; [0x080-0x1e7] Lookup table holds Flash command sequences
lookupTable_85: '0x00000000'
# ---------------------------------------===== lookupTable_86 [Optional] =====----------------------------------------
# Description: Offset: 0x000001D8, Width: 32b; [0x080-0x1e7] Lookup table holds Flash command sequences
lookupTable_86: '0x00000000'
# ---------------------------------------===== lookupTable_87 [Optional] =====----------------------------------------
# Description: Offset: 0x000001DC, Width: 32b; [0x080-0x1e7] Lookup table holds Flash command sequences
lookupTable_87: '0x00000000'
# ---------------------------------------===== lookupTable_88 [Optional] =====----------------------------------------
# Description: Offset: 0x000001E0, Width: 32b; [0x080-0x1e7] Lookup table holds Flash command sequences
lookupTable_88: '0x00000000'
# ---------------------------------------===== lookupTable_89 [Optional] =====----------------------------------------
# Description: Offset: 0x000001E4, Width: 32b; [0x080-0x1e7] Lookup table holds Flash command sequences
lookupTable_89: '0x00000000'
# ---------------------------------------===== lutCustomSeq_0 [Optional] =====----------------------------------------
# Description: Offset: 0x000001E8, Width: 32b; [0x1e8-0x217] Customizable LUT Sequences
lutCustomSeq_0:
# ------------------------------------------===== seqNum [Optional] =====-------------------------------------------
# Description: Offset: 0b, Width: 8b, Sequence Number, valid number: 1-16
seqNum: 0
# -------------------------------------------===== seqId [Optional] =====-------------------------------------------
# Description: Offset: 8b, Width: 8b, Sequence Index, valid number: 0-15
seqId: 0
# -----------------------------------------===== reserved [Optional] =====------------------------------------------
# Description: Offset: 16b, Width: 16b, N/A
reserved: 0
# ---------------------------------------===== lutCustomSeq_1 [Optional] =====----------------------------------------
# Description: Offset: 0x000001EC, Width: 32b; [0x1e8-0x217] Customizable LUT Sequences
lutCustomSeq_1:
# ------------------------------------------===== seqNum [Optional] =====-------------------------------------------
# Description: Offset: 0b, Width: 8b, Sequence Number, valid number: 1-16
seqNum: 0
# -------------------------------------------===== seqId [Optional] =====-------------------------------------------
# Description: Offset: 8b, Width: 8b, Sequence Index, valid number: 0-15
seqId: 0
# -----------------------------------------===== reserved [Optional] =====------------------------------------------
# Description: Offset: 16b, Width: 16b, N/A
reserved: 0
# ---------------------------------------===== lutCustomSeq_2 [Optional] =====----------------------------------------
# Description: Offset: 0x000001F0, Width: 32b; [0x1e8-0x217] Customizable LUT Sequences
lutCustomSeq_2:
# ------------------------------------------===== seqNum [Optional] =====-------------------------------------------
# Description: Offset: 0b, Width: 8b, Sequence Number, valid number: 1-16
seqNum: 0
# -------------------------------------------===== seqId [Optional] =====-------------------------------------------
# Description: Offset: 8b, Width: 8b, Sequence Index, valid number: 0-15
seqId: 0
# -----------------------------------------===== reserved [Optional] =====------------------------------------------
# Description: Offset: 16b, Width: 16b, N/A
reserved: 0
# ---------------------------------------===== lutCustomSeq_3 [Optional] =====----------------------------------------
# Description: Offset: 0x000001F4, Width: 32b; [0x1e8-0x217] Customizable LUT Sequences
lutCustomSeq_3:
# ------------------------------------------===== seqNum [Optional] =====-------------------------------------------
# Description: Offset: 0b, Width: 8b, Sequence Number, valid number: 1-16
seqNum: 0
# -------------------------------------------===== seqId [Optional] =====-------------------------------------------
# Description: Offset: 8b, Width: 8b, Sequence Index, valid number: 0-15
seqId: 0
# -----------------------------------------===== reserved [Optional] =====------------------------------------------
# Description: Offset: 16b, Width: 16b, N/A
reserved: 0
# ---------------------------------------===== lutCustomSeq_4 [Optional] =====----------------------------------------
# Description: Offset: 0x000001F8, Width: 32b; [0x1e8-0x217] Customizable LUT Sequences
lutCustomSeq_4:
# ------------------------------------------===== seqNum [Optional] =====-------------------------------------------
# Description: Offset: 0b, Width: 8b, Sequence Number, valid number: 1-16
seqNum: 0
# -------------------------------------------===== seqId [Optional] =====-------------------------------------------
# Description: Offset: 8b, Width: 8b, Sequence Index, valid number: 0-15
seqId: 0
# -----------------------------------------===== reserved [Optional] =====------------------------------------------
# Description: Offset: 16b, Width: 16b, N/A
reserved: 0
# ---------------------------------------===== lutCustomSeq_5 [Optional] =====----------------------------------------
# Description: Offset: 0x000001FC, Width: 32b; [0x1e8-0x217] Customizable LUT Sequences
lutCustomSeq_5:
# ------------------------------------------===== seqNum [Optional] =====-------------------------------------------
# Description: Offset: 0b, Width: 8b, Sequence Number, valid number: 1-16
seqNum: 0
# -------------------------------------------===== seqId [Optional] =====-------------------------------------------
# Description: Offset: 8b, Width: 8b, Sequence Index, valid number: 0-15
seqId: 0
# -----------------------------------------===== reserved [Optional] =====------------------------------------------
# Description: Offset: 16b, Width: 16b, N/A
reserved: 0
# ---------------------------------------===== lutCustomSeq_6 [Optional] =====----------------------------------------
# Description: Offset: 0x00000200, Width: 32b; [0x1e8-0x217] Customizable LUT Sequences
lutCustomSeq_6:
# ------------------------------------------===== seqNum [Optional] =====-------------------------------------------
# Description: Offset: 0b, Width: 8b, Sequence Number, valid number: 1-16
seqNum: 0
# -------------------------------------------===== seqId [Optional] =====-------------------------------------------
# Description: Offset: 8b, Width: 8b, Sequence Index, valid number: 0-15
seqId: 0
# -----------------------------------------===== reserved [Optional] =====------------------------------------------
# Description: Offset: 16b, Width: 16b, N/A
reserved: 0
# ---------------------------------------===== lutCustomSeq_7 [Optional] =====----------------------------------------
# Description: Offset: 0x00000204, Width: 32b; [0x1e8-0x217] Customizable LUT Sequences
lutCustomSeq_7:
# ------------------------------------------===== seqNum [Optional] =====-------------------------------------------
# Description: Offset: 0b, Width: 8b, Sequence Number, valid number: 1-16
seqNum: 0
# -------------------------------------------===== seqId [Optional] =====-------------------------------------------
# Description: Offset: 8b, Width: 8b, Sequence Index, valid number: 0-15
seqId: 0
# -----------------------------------------===== reserved [Optional] =====------------------------------------------
# Description: Offset: 16b, Width: 16b, N/A
reserved: 0
# ---------------------------------------===== lutCustomSeq_8 [Optional] =====----------------------------------------
# Description: Offset: 0x00000208, Width: 32b; [0x1e8-0x217] Customizable LUT Sequences
lutCustomSeq_8:
# ------------------------------------------===== seqNum [Optional] =====-------------------------------------------
# Description: Offset: 0b, Width: 8b, Sequence Number, valid number: 1-16
seqNum: 0
# -------------------------------------------===== seqId [Optional] =====-------------------------------------------
# Description: Offset: 8b, Width: 8b, Sequence Index, valid number: 0-15
seqId: 0
# -----------------------------------------===== reserved [Optional] =====------------------------------------------
# Description: Offset: 16b, Width: 16b, N/A
reserved: 0
# ---------------------------------------===== lutCustomSeq_9 [Optional] =====----------------------------------------
# Description: Offset: 0x0000020C, Width: 32b; [0x1e8-0x217] Customizable LUT Sequences
lutCustomSeq_9:
# ------------------------------------------===== seqNum [Optional] =====-------------------------------------------
# Description: Offset: 0b, Width: 8b, Sequence Number, valid number: 1-16
seqNum: 0
# -------------------------------------------===== seqId [Optional] =====-------------------------------------------
# Description: Offset: 8b, Width: 8b, Sequence Index, valid number: 0-15
seqId: 0
# -----------------------------------------===== reserved [Optional] =====------------------------------------------
# Description: Offset: 16b, Width: 16b, N/A
reserved: 0
# ---------------------------------------===== lutCustomSeq_10 [Optional] =====---------------------------------------
# Description: Offset: 0x00000210, Width: 32b; [0x1e8-0x217] Customizable LUT Sequences
lutCustomSeq_10:
# ------------------------------------------===== seqNum [Optional] =====-------------------------------------------
# Description: Offset: 0b, Width: 8b, Sequence Number, valid number: 1-16
seqNum: 0
# -------------------------------------------===== seqId [Optional] =====-------------------------------------------
# Description: Offset: 8b, Width: 8b, Sequence Index, valid number: 0-15
seqId: 0
# -----------------------------------------===== reserved [Optional] =====------------------------------------------
# Description: Offset: 16b, Width: 16b, N/A
reserved: 0
# ---------------------------------------===== lutCustomSeq_11 [Optional] =====---------------------------------------
# Description: Offset: 0x00000214, Width: 32b; [0x1e8-0x217] Customizable LUT Sequences
lutCustomSeq_11:
# ------------------------------------------===== seqNum [Optional] =====-------------------------------------------
# Description: Offset: 0b, Width: 8b, Sequence Number, valid number: 1-16
seqNum: 0
# -------------------------------------------===== seqId [Optional] =====-------------------------------------------
# Description: Offset: 8b, Width: 8b, Sequence Index, valid number: 0-15
seqId: 0
# -----------------------------------------===== reserved [Optional] =====------------------------------------------
# Description: Offset: 16b, Width: 16b, N/A
reserved: 0
# ----------------------------------------===== dllCraSdrVal [Optional] =====-----------------------------------------
# Description: Offset: 0x00000218, Width: 32b; [0x218-0x21b] Customizable DLLCRA for SDR setting
dllCraSdrVal: '0x00000000'
# -----------------------------------------===== smprSdrVal [Optional] =====------------------------------------------
# Description: Offset: 0x0000021C, Width: 32b; [0x21c-0x21f] Customizable SMPR SDR setting
smprSdrVal: '0x00000000'
# ----------------------------------------===== dllCraDdrVal [Optional] =====-----------------------------------------
# Description: Offset: 0x00000220, Width: 32b; [0x220-0x223] Customizable DLLCRA for DDR setting
dllCraDdrVal: '0x00000000'
# -----------------------------------------===== smprDdrVal [Optional] =====------------------------------------------
# Description: Offset: 0x00000224, Width: 32b; [0x224-0x227] Customizable SMPR DDR setting
smprDdrVal: '0x00000000'
# ------------------------------------------===== pageSize [Optional] =====-------------------------------------------
# Description: Offset: 0x00000228, Width: 32b; [0x228-0x22b] Page size of Serial NOR
pageSize: '0x00000000'
# -----------------------------------------===== sectorSize [Optional] =====------------------------------------------
# Description: Offset: 0x0000022C, Width: 32b; [0x22c-0x22f] Sector size of Serial NOR
sectorSize: '0x00000000'
# -------------------------------------===== ipcmdSerialClkFreq [Optional] =====--------------------------------------
# Description: Offset: 0x00000230, Width: 8b; [0x230-0x230] Clock frequency for IP command
ipcmdSerialClkFreq: '0x00'
# -------------------------------------===== isUniformBlockSize [Optional] =====--------------------------------------
# Description: Offset: 0x00000231, Width: 8b; [0x231-0x231] Sector/Block size is the same
isUniformBlockSize: '0x00'
# -------------------------------------===== isDataOrderSwapped [Optional] =====--------------------------------------
# Description: Offset: 0x00000232, Width: 8b; [0x232-0x232] Data order (D0, D1, D2, D3) is swapped (D1,D0, D3, D2)
isDataOrderSwapped: '0x00'
# ------------------------------------------===== reserved4 [Optional] =====------------------------------------------
# Description: Offset: 0x00000233, Width: 8b; [0x233-0x233] Reserved for future use
reserved4: '0x00'
# ----------------------------------------===== serialNorType [Optional] =====----------------------------------------
# Description: Offset: 0x00000234, Width: 8b; [0x234-0x234] Serial NOR Flash type: 0/1/2/3
serialNorType: '0x00'
# --------------------------------------===== needExitNoCmdMode [Optional] =====--------------------------------------
# Description: Offset: 0x00000235, Width: 8b; [0x235-0x235] Need to exit NoCmd mode before other IP command
needExitNoCmdMode: '0x00'
# ------------------------------------===== halfClkForNonReadCmd [Optional] =====-------------------------------------
# Description: Offset: 0x00000236, Width: 8b; [0x236-0x236] Half the Serial Clock for non-read command: true/false
halfClkForNonReadCmd: '0x00'
# ------------------------------------===== needRestoreNoCmdMode [Optional] =====-------------------------------------
# Description: Offset: 0x00000237, Width: 8b; [0x237-0x237] Need to Restore NoCmd mode after IP command execution
needRestoreNoCmdMode: '0x00'
# ------------------------------------------===== blockSize [Optional] =====------------------------------------------
# Description: Offset: 0x00000238, Width: 32b; [0x238-0x23b] Block size
blockSize: '0x00000000'
# ----------------------------------------===== flashStateCtx [Optional] =====----------------------------------------
# Description: Offset: 0x0000023C, Width: 32b; [0x23c-0x23f] Flash State Context
flashStateCtx: '0x00000000'
# -----------------------------------------===== reserved4_0 [Optional] =====-----------------------------------------
# Description: Offset: 0x00000240, Width: 32b; [0x240-0x243] Flash State Context
reserved4_0: '0x00000000'
# -----------------------------------------===== reserved4_1 [Optional] =====-----------------------------------------
# Description: Offset: 0x00000244, Width: 32b; [0x244-0x247] Flash State Context
reserved4_1: '0x00000000'
# -----------------------------------------===== reserved4_2 [Optional] =====-----------------------------------------
# Description: Offset: 0x00000248, Width: 32b; [0x248-0x24b] Flash State Context
reserved4_2: '0x00000000'
# -----------------------------------------===== reserved4_3 [Optional] =====-----------------------------------------
# Description: Offset: 0x0000024C, Width: 32b; [0x24c-0x24f] Flash State Context
reserved4_3: '0x00000000'
# -----------------------------------------===== reserved4_4 [Optional] =====-----------------------------------------
# Description: Offset: 0x00000250, Width: 32b; [0x250-0x253] Flash State Context
reserved4_4: '0x00000000'
# -----------------------------------------===== reserved4_5 [Optional] =====-----------------------------------------
# Description: Offset: 0x00000254, Width: 32b; [0x254-0x257] Flash State Context
reserved4_5: '0x00000000'
# -----------------------------------------===== reserved4_6 [Optional] =====-----------------------------------------
# Description: Offset: 0x00000258, Width: 32b; [0x258-0x25b] Flash State Context
reserved4_6: '0x00000000'
# -----------------------------------------===== reserved4_7 [Optional] =====-----------------------------------------
# Description: Offset: 0x0000025C, Width: 32b; [0x25c-0x25f] Flash State Context
reserved4_7: '0x00000000'
# -----------------------------------------===== reserved4_8 [Optional] =====-----------------------------------------
# Description: Offset: 0x00000260, Width: 32b; [0x260-0x263] Flash State Context
reserved4_8: '0x00000000'
# -----------------------------------------===== reserved4_9 [Optional] =====-----------------------------------------
# Description: Offset: 0x00000264, Width: 32b; [0x264-0x267] Flash State Context
reserved4_9: '0x00000000'
# ----------------------------------------===== reserved4_10 [Optional] =====-----------------------------------------
# Description: Offset: 0x00000268, Width: 32b; [0x268-0x26b] Flash State Context
reserved4_10: '0x00000000'
# ----------------------------------------===== reserved4_11 [Optional] =====-----------------------------------------
# Description: Offset: 0x0000026C, Width: 32b; [0x26c-0x26f] Flash State Context
reserved4_11: '0x00000000'
# ----------------------------------------===== reserved4_12 [Optional] =====-----------------------------------------
# Description: Offset: 0x00000270, Width: 32b; [0x270-0x273] Flash State Context
reserved4_12: '0x00000000'
# ----------------------------------------===== reserved4_13 [Optional] =====-----------------------------------------
# Description: Offset: 0x00000274, Width: 32b; [0x274-0x277] Flash State Context
reserved4_13: '0x00000000'
# ----------------------------------------===== reserved4_14 [Optional] =====-----------------------------------------
# Description: Offset: 0x00000278, Width: 32b; [0x278-0x27b] Flash State Context
reserved4_14: '0x00000000'
# ----------------------------------------===== reserved4_15 [Optional] =====-----------------------------------------
# Description: Offset: 0x0000027C, Width: 32b; [0x27c-0x27f] Flash State Context
reserved4_15: '0x00000000'
# ----------------------------------------===== reserved4_16 [Optional] =====-----------------------------------------
# Description: Offset: 0x00000280, Width: 32b; [0x280-0x283] Flash State Context
reserved4_16: '0x00000000'
# ----------------------------------------===== reserved4_17 [Optional] =====-----------------------------------------
# Description: Offset: 0x00000284, Width: 32b; [0x284-0x287] Flash State Context
reserved4_17: '0x00000000'
# ----------------------------------------===== reserved4_18 [Optional] =====-----------------------------------------
# Description: Offset: 0x00000288, Width: 32b; [0x288-0x28b] Flash State Context
reserved4_18: '0x00000000'
# ----------------------------------------===== reserved4_19 [Optional] =====-----------------------------------------
# Description: Offset: 0x0000028C, Width: 32b; [0x28c-0x28f] Flash State Context
reserved4_19: '0x00000000'
# ----------------------------------------===== reserved4_20 [Optional] =====-----------------------------------------
# Description: Offset: 0x00000290, Width: 32b; [0x290-0x293] Flash State Context
reserved4_20: '0x00000000'
# ----------------------------------------===== reserved4_21 [Optional] =====-----------------------------------------
# Description: Offset: 0x00000294, Width: 32b; [0x294-0x297] Flash State Context
reserved4_21: '0x00000000'
# ----------------------------------------===== reserved4_22 [Optional] =====-----------------------------------------
# Description: Offset: 0x00000298, Width: 32b; [0x298-0x29b] Flash State Context
reserved4_22: '0x00000000'
# ----------------------------------------===== reserved4_23 [Optional] =====-----------------------------------------
# Description: Offset: 0x0000029C, Width: 32b; [0x29c-0x29f] Flash State Context
reserved4_23: '0x00000000'
# ----------------------------------------===== reserved4_24 [Optional] =====-----------------------------------------
# Description: Offset: 0x000002A0, Width: 32b; [0x2a0-0x2a3] Flash State Context
reserved4_24: '0x00000000'
# ----------------------------------------===== reserved4_25 [Optional] =====-----------------------------------------
# Description: Offset: 0x000002A4, Width: 32b; [0x2a4-0x2a7] Flash State Context
reserved4_25: '0x00000000'
# ----------------------------------------===== reserved4_26 [Optional] =====-----------------------------------------
# Description: Offset: 0x000002A8, Width: 32b; [0x2a8-0x2ab] Flash State Context
reserved4_26: '0x00000000'
# ----------------------------------------===== reserved4_27 [Optional] =====-----------------------------------------
# Description: Offset: 0x000002AC, Width: 32b; [0x2ac-0x2af] Flash State Context
reserved4_27: '0x00000000'
# ----------------------------------------===== reserved4_28 [Optional] =====-----------------------------------------
# Description: Offset: 0x000002B0, Width: 32b; [0x2b0-0x2b3] Flash State Context
reserved4_28: '0x00000000'
# ----------------------------------------===== reserved4_29 [Optional] =====-----------------------------------------
# Description: Offset: 0x000002B4, Width: 32b; [0x2b4-0x2b7] Flash State Context
reserved4_29: '0x00000000'
# ----------------------------------------===== reserved4_30 [Optional] =====-----------------------------------------
# Description: Offset: 0x000002B8, Width: 32b; [0x2b8-0x2bb] Flash State Context
reserved4_30: '0x00000000'
# ----------------------------------------===== reserved4_31 [Optional] =====-----------------------------------------
# Description: Offset: 0x000002BC, Width: 32b; [0x2bc-0x2bf] Flash State Context
reserved4_31: '0x00000000'
# ----------------------------------------===== reserved4_32 [Optional] =====-----------------------------------------
# Description: Offset: 0x000002C0, Width: 32b; [0x2c0-0x2c3] Flash State Context
reserved4_32: '0x00000000'
# ----------------------------------------===== reserved4_33 [Optional] =====-----------------------------------------
# Description: Offset: 0x000002C4, Width: 32b; [0x2c4-0x2c7] Flash State Context
reserved4_33: '0x00000000'
# ----------------------------------------===== reserved4_34 [Optional] =====-----------------------------------------
# Description: Offset: 0x000002C8, Width: 32b; [0x2c8-0x2cb] Flash State Context
reserved4_34: '0x00000000'
# ----------------------------------------===== reserved4_35 [Optional] =====-----------------------------------------
# Description: Offset: 0x000002CC, Width: 32b; [0x2cc-0x2cf] Flash State Context
reserved4_35: '0x00000000'
# ----------------------------------------===== reserved4_36 [Optional] =====-----------------------------------------
# Description: Offset: 0x000002D0, Width: 32b; [0x2d0-0x2d3] Flash State Context
reserved4_36: '0x00000000'
# ----------------------------------------===== reserved4_37 [Optional] =====-----------------------------------------
# Description: Offset: 0x000002D4, Width: 32b; [0x2d4-0x2d7] Flash State Context
reserved4_37: '0x00000000'
# ----------------------------------------===== reserved4_38 [Optional] =====-----------------------------------------
# Description: Offset: 0x000002D8, Width: 32b; [0x2d8-0x2db] Flash State Context
reserved4_38: '0x00000000'
# ----------------------------------------===== reserved4_39 [Optional] =====-----------------------------------------
# Description: Offset: 0x000002DC, Width: 32b; [0x2dc-0x2df] Flash State Context
reserved4_39: '0x00000000'
# ----------------------------------------===== reserved4_40 [Optional] =====-----------------------------------------
# Description: Offset: 0x000002E0, Width: 32b; [0x2e0-0x2e3] Flash State Context
reserved4_40: '0x00000000'
# ----------------------------------------===== reserved4_41 [Optional] =====-----------------------------------------
# Description: Offset: 0x000002E4, Width: 32b; [0x2e4-0x2e7] Flash State Context
reserved4_41: '0x00000000'
# ----------------------------------------===== reserved4_42 [Optional] =====-----------------------------------------
# Description: Offset: 0x000002E8, Width: 32b; [0x2e8-0x2eb] Flash State Context
reserved4_42: '0x00000000'
# ----------------------------------------===== reserved4_43 [Optional] =====-----------------------------------------
# Description: Offset: 0x000002EC, Width: 32b; [0x2ec-0x2ef] Flash State Context
reserved4_43: '0x00000000'
# ----------------------------------------===== reserved4_44 [Optional] =====-----------------------------------------
# Description: Offset: 0x000002F0, Width: 32b; [0x2f0-0x2f3] Flash State Context
reserved4_44: '0x00000000'
# ----------------------------------------===== reserved4_45 [Optional] =====-----------------------------------------
# Description: Offset: 0x000002F4, Width: 32b; [0x2f4-0x2f7] Flash State Context
reserved4_45: '0x00000000'
# ----------------------------------------===== reserved4_46 [Optional] =====-----------------------------------------
# Description: Offset: 0x000002F8, Width: 32b; [0x2f8-0x2fb] Flash State Context
reserved4_46: '0x00000000'
# ----------------------------------------===== reserved4_47 [Optional] =====-----------------------------------------
# Description: Offset: 0x000002FC, Width: 32b; [0x2fc-0x2ff] Flash State Context
reserved4_47: '0x00000000'
FCB for mimxrt758s, Revision: b0 and xspi_nor#
FCB for mimxrt758s, Revision: b0 and xspi_nor JSON schema
FCB for mimxrt758s, Revision: b0 and xspi_nor YAML configuration template
# ================================== FCB for mimxrt758s, Revision: b0 and xspi_nor ===================================
# ======================================================================================================================
# == FCB for mimxrt758s, Revision: b0 and xspi_nor ==
# ======================================================================================================================
# -------------------------------------===== The chip family name [Required] =====--------------------------------------
# Description: NXP chip family identifier.
family: CHOOSE_FROM_TABLE
# -----------------------------------------===== MCU revision [Optional] =====------------------------------------------
# Description: Revision of silicon. The 'latest' name, means most current revision.
# Possible options: <a0, a1, b0, latest>
revision: b0
# ------------------------------------------===== Memory type [Required] =====------------------------------------------
# Description: Specify type of memory used by FCB description.
# Possible options: <xspi_nor>
type: xspi_nor
# ------------------------------------------===== mimxrt758s [Required] =====-------------------------------------------
fcb_settings:
# ---------------------------------------------===== tag [Optional] =====---------------------------------------------
# Description: Offset: 0x00000000, Width: 32b; [0x000-0x003] Tag, fixed value 0x42464346UL
tag: '0x00000000'
# -------------------------------------------===== version [Optional] =====-------------------------------------------
# Description: Offset: 0x00000004, Width: 32b; [0x004-0x007] Version,[31:24] -'V', [23:16] - Major, [15:8] - Minor,
# [7:0] - bugfix
version: '0x00000000'
# ------------------------------------------===== reserved0 [Optional] =====------------------------------------------
# Description: Offset: 0x00000008, Width: 32b; [0x008-0x00b] Reserved for future use
reserved0: '0x00000000'
# --------------------------------------===== readSampleClkSrc [Optional] =====---------------------------------------
# Description: Offset: 0x0000000C, Width: 8b; [0x00c-0x00c] Read Sample Clock Source, valid value: 0: internal
# sampling 2: DQS pad loopback 3: External DQS signal
readSampleClkSrc: '0x00'
# -----------------------------------------===== csHoldTime [Optional] =====------------------------------------------
# Description: Offset: 0x0000000D, Width: 8b; [0x00d-0x00d] CS hold time, default value: 3
csHoldTime: '0x00'
# -----------------------------------------===== csSetupTime [Optional] =====-----------------------------------------
# Description: Offset: 0x0000000E, Width: 8b; [0x00e-0x00e] CS setup time, default value: 3
csSetupTime: '0x00'
# -------------------------------------===== columnAddressWidth [Optional] =====--------------------------------------
# Description: Offset: 0x0000000F, Width: 8b; [0x00f-0x00f] Column Address with, for HyperBus protocol, it is fixed
# to 3, others to 0.
columnAddressWidth: '0x00'
# -------------------------------------===== deviceModeCfgEnable [Optional] =====-------------------------------------
# Description: Offset: 0x00000010, Width: 8b; [0x010-0x010] Device Mode Configure enable flag, 1 - Enable, 0 -
# Disable
deviceModeCfgEnable: '0x00'
# ---------------------------------------===== deviceModeType [Optional] =====----------------------------------------
# Description: Offset: 0x00000011, Width: 8b; [0x011-0x011] Specify the configuration command type. 0: No mode change
# 1: Quad enable (switch from SPI to Quad mode) 2: Spi2Xpi (switch from SPI to DPI, QPI, or OPI mode) 3: Xpi2Spi
# (switch from DPI, QPI, or OPI to SPI mode)
deviceModeType: '0x00'
# -------------------------------------===== waitTimeCfgCommands [Optional] =====-------------------------------------
# Description: Offset: 0x00000012, Width: 16b; [0x012-0x013] Wait time for Device mode configuration command, unit:
# 100us
waitTimeCfgCommands: '0x0000'
# ----------------------------------------===== deviceModeSeq [Optional] =====----------------------------------------
# Description: Offset: 0x00000014, Width: 32b; [0x014-0x017] Device mode sequence info [ 7:0] - Number of required
# sequences [15:8] - Sequence index
deviceModeSeq:
# ------------------------------------------===== seqNum [Optional] =====-------------------------------------------
# Description: Offset: 0b, Width: 8b, Sequence Number, valid number: 1-16
seqNum: 0
# -------------------------------------------===== seqId [Optional] =====-------------------------------------------
# Description: Offset: 8b, Width: 8b, Sequence Index, valid number: 0-15
seqId: 0
# -----------------------------------------===== reserved [Optional] =====------------------------------------------
# Description: Offset: 16b, Width: 16b, N/A
reserved: 0
# ----------------------------------------===== deviceModeArg [Optional] =====----------------------------------------
# Description: Offset: 0x00000018, Width: 32b; [0x018-0x01b] Argument/Parameter for device configuration
deviceModeArg: '0x00000000'
# ---------------------------------------===== configCmdEnable [Optional] =====---------------------------------------
# Description: Offset: 0x0000001C, Width: 8b; [0x01c-0x01c] Configure command Enable Flag, 1 - Enable, 0 - Disable
configCmdEnable: '0x00'
# --------------------------------------===== configModeType_0 [Optional] =====---------------------------------------
# Description: Offset: 0x0000001D, Width: 8b; [0x01d-0x01f] Configure Mode Type, similar as deviceModeTpe
configModeType_0: '0x00'
# --------------------------------------===== configModeType_1 [Optional] =====---------------------------------------
# Description: Offset: 0x0000001E, Width: 8b; [0x01d-0x01f] Configure Mode Type, similar as deviceModeTpe
configModeType_1: '0x00'
# --------------------------------------===== configModeType_2 [Optional] =====---------------------------------------
# Description: Offset: 0x0000001F, Width: 8b; [0x01d-0x01f] Configure Mode Type, similar as deviceModeTpe
configModeType_2: '0x00'
# ---------------------------------------===== configCmdSeqs_0 [Optional] =====---------------------------------------
# Description: Offset: 0x00000020, Width: 32b; [0x020-0x02b] Sequence info for Device Configuration command, similar
# as deviceModeSeq
configCmdSeqs_0:
# ------------------------------------------===== seqNum [Optional] =====-------------------------------------------
# Description: Offset: 0b, Width: 8b, Sequence Number, valid number: 1-16
seqNum: 0
# -------------------------------------------===== seqId [Optional] =====-------------------------------------------
# Description: Offset: 8b, Width: 8b, Sequence Index, valid number: 0-15
seqId: 0
# -----------------------------------------===== reserved [Optional] =====------------------------------------------
# Description: Offset: 16b, Width: 16b, N/A
reserved: 0
# ---------------------------------------===== configCmdSeqs_1 [Optional] =====---------------------------------------
# Description: Offset: 0x00000024, Width: 32b; [0x020-0x02b] Sequence info for Device Configuration command, similar
# as deviceModeSeq
configCmdSeqs_1:
# ------------------------------------------===== seqNum [Optional] =====-------------------------------------------
# Description: Offset: 0b, Width: 8b, Sequence Number, valid number: 1-16
seqNum: 0
# -------------------------------------------===== seqId [Optional] =====-------------------------------------------
# Description: Offset: 8b, Width: 8b, Sequence Index, valid number: 0-15
seqId: 0
# -----------------------------------------===== reserved [Optional] =====------------------------------------------
# Description: Offset: 16b, Width: 16b, N/A
reserved: 0
# ---------------------------------------===== configCmdSeqs_2 [Optional] =====---------------------------------------
# Description: Offset: 0x00000028, Width: 32b; [0x020-0x02b] Sequence info for Device Configuration command, similar
# as deviceModeSeq
configCmdSeqs_2:
# ------------------------------------------===== seqNum [Optional] =====-------------------------------------------
# Description: Offset: 0b, Width: 8b, Sequence Number, valid number: 1-16
seqNum: 0
# -------------------------------------------===== seqId [Optional] =====-------------------------------------------
# Description: Offset: 8b, Width: 8b, Sequence Index, valid number: 0-15
seqId: 0
# -----------------------------------------===== reserved [Optional] =====------------------------------------------
# Description: Offset: 16b, Width: 16b, N/A
reserved: 0
# ------------------------------------------===== reserved1 [Optional] =====------------------------------------------
# Description: Offset: 0x0000002C, Width: 32b; [0x02c-0x02f] Reserved for future use
reserved1: '0x00000000'
# ---------------------------------------===== configCmdArgs_0 [Optional] =====---------------------------------------
# Description: Offset: 0x00000030, Width: 32b; [0x030-0x03b] Arguments/Parameters for device Configuration commands
configCmdArgs_0: '0x00000000'
# ---------------------------------------===== configCmdArgs_1 [Optional] =====---------------------------------------
# Description: Offset: 0x00000034, Width: 32b; [0x030-0x03b] Arguments/Parameters for device Configuration commands
configCmdArgs_1: '0x00000000'
# ---------------------------------------===== configCmdArgs_2 [Optional] =====---------------------------------------
# Description: Offset: 0x00000038, Width: 32b; [0x030-0x03b] Arguments/Parameters for device Configuration commands
configCmdArgs_2: '0x00000000'
# ------------------------------------------===== reserved2 [Optional] =====------------------------------------------
# Description: Offset: 0x0000003C, Width: 32b; [0x03c-0x03f] Reserved for future use
reserved2: '0x00000000'
# ------------------------------------===== controllerMiscOption [Optional] =====-------------------------------------
# Description: Offset: 0x00000040, Width: 32b; N/A
controllerMiscOption: '0x00000000'
# -----------------------------------------===== deviceType [Optional] =====------------------------------------------
# Description: Offset: 0x00000044, Width: 8b; [0x044-0x044] Device Type: 1 for Serial NOR flash memory
deviceType: '0x00'
# ----------------------------------------===== sflashPadType [Optional] =====----------------------------------------
# Description: Offset: 0x00000045, Width: 8b; [0x045-0x045] Serial Flash Pad Type: 1 - Single, 2 - Dual, 4 - Quad, 8
# - Octal
sflashPadType: '0x00'
# ----------------------------------------===== serialClkFreq [Optional] =====----------------------------------------
# Description: Offset: 0x00000046, Width: 8b; [0x046-0x046] Serial Flash Frequency 1: 30 MHz 2: 50 MHz 3: 60 MHz 4:
# 80 MHz 5: 100 MHz 6: 120 MHz 7: 133 MHz 8: 166 MHz 9: 200 MHz
serialClkFreq: '0x00'
# -------------------------------------===== lutCustomSeqEnable [Optional] =====--------------------------------------
# Description: Offset: 0x00000047, Width: 8b; [0x047-0x047] LUT customization Enable, it is required if the
# program/erase cannot be done using 1 LUT sequence, currently, only applicable to HyperFLASH
lutCustomSeqEnable: '0x00'
# -----------------------------------------===== reserved3_0 [Optional] =====-----------------------------------------
# Description: Offset: 0x00000048, Width: 32b; [0x048-0x04f] Reserved for future use
reserved3_0: '0x00000000'
# -----------------------------------------===== reserved3_1 [Optional] =====-----------------------------------------
# Description: Offset: 0x0000004C, Width: 32b; [0x048-0x04f] Reserved for future use
reserved3_1: '0x00000000'
# ----------------------------------------===== sflashA1Size [Optional] =====-----------------------------------------
# Description: Offset: 0x00000050, Width: 32b; [0x050-0x053] Size of Flash connected to A1
sflashA1Size: '0x00000000'
# ----------------------------------------===== sflashA2Size [Optional] =====-----------------------------------------
# Description: Offset: 0x00000054, Width: 32b; [0x054-0x057] Size of Flash connected to A2
sflashA2Size: '0x00000000'
# ----------------------------------------===== sflashB1Size [Optional] =====-----------------------------------------
# Description: Offset: 0x00000058, Width: 32b; [0x058-0x05b] Size of Flash connected to B1
sflashB1Size: '0x00000000'
# ----------------------------------------===== sflashB2Size [Optional] =====-----------------------------------------
# Description: Offset: 0x0000005C, Width: 32b; [0x05c-0x05f] Size of Flash connected to B2
sflashB2Size: '0x00000000'
# ------------------------------------===== csPadSettingOverride [Optional] =====-------------------------------------
# Description: Offset: 0x00000060, Width: 32b; [0x060-0x063] CS pad setting override value
csPadSettingOverride: '0x00000000'
# -----------------------------------===== sclkPadSettingOverride [Optional] =====------------------------------------
# Description: Offset: 0x00000064, Width: 32b; [0x064-0x067] SCK pad setting override value
sclkPadSettingOverride: '0x00000000'
# -----------------------------------===== dataPadSettingOverride [Optional] =====------------------------------------
# Description: Offset: 0x00000068, Width: 32b; [0x068-0x06b] data pad setting override value
dataPadSettingOverride: '0x00000000'
# ------------------------------------===== dqsPadSettingOverride [Optional] =====------------------------------------
# Description: Offset: 0x0000006C, Width: 32b; [0x06c-0x06f] DQS pad setting override value
dqsPadSettingOverride: '0x00000000'
# -----------------------------------------===== timeoutInMs [Optional] =====-----------------------------------------
# Description: Offset: 0x00000070, Width: 32b; [0x070-0x073] Timeout threshold for read status command
timeoutInMs: '0x00000000'
# ---------------------------------------===== commandInterval [Optional] =====---------------------------------------
# Description: Offset: 0x00000074, Width: 32b; [0x074-0x077] CS deselect interval between two commands
commandInterval: '0x00000000'
# ---------------------------------------===== dataValidTime_0 [Optional] =====---------------------------------------
# Description: Offset: 0x00000078, Width: 16b; [0x078-0x07b] CLK edge to data valid time for PORT A and PORT B
dataValidTime_0:
# ----------------------------------------===== time_100ps [Optional] =====-----------------------------------------
# Description: Offset: 0b, Width: 8b, Data valid time, in terms of 100ps
time_100ps: 0
# ----------------------------------------===== delay_cells [Optional] =====----------------------------------------
# Description: Offset: 8b, Width: 8b, Data valid time, in terms of delay cells
delay_cells: 0
# ---------------------------------------===== dataValidTime_1 [Optional] =====---------------------------------------
# Description: Offset: 0x0000007A, Width: 16b; [0x078-0x07b] CLK edge to data valid time for PORT A and PORT B
dataValidTime_1:
# ----------------------------------------===== time_100ps [Optional] =====-----------------------------------------
# Description: Offset: 0b, Width: 8b, Data valid time, in terms of 100ps
time_100ps: 0
# ----------------------------------------===== delay_cells [Optional] =====----------------------------------------
# Description: Offset: 8b, Width: 8b, Data valid time, in terms of delay cells
delay_cells: 0
# -----------------------------------------===== busyOffset [Optional] =====------------------------------------------
# Description: Offset: 0x0000007C, Width: 16b; [0x07c-0x07d] Busy offset, valid value: 0-31
busyOffset: '0x0000'
# ---------------------------------------===== busyBitPolarity [Optional] =====---------------------------------------
# Description: Offset: 0x0000007E, Width: 16b; [0x07e-0x07f] Busy flag polarity, 0 - busy flag is 1 when flash device
# is busy, 1 - busy flag is 0 when flash device is busy
busyBitPolarity: '0x0000'
# ----------------------------------------===== lookupTable_0 [Optional] =====----------------------------------------
# Description: Offset: 0x00000080, Width: 32b; [0x080-0x1e7] Lookup table holds Flash command sequences
lookupTable_0: '0x00000000'
# ----------------------------------------===== lookupTable_1 [Optional] =====----------------------------------------
# Description: Offset: 0x00000084, Width: 32b; [0x080-0x1e7] Lookup table holds Flash command sequences
lookupTable_1: '0x00000000'
# ----------------------------------------===== lookupTable_2 [Optional] =====----------------------------------------
# Description: Offset: 0x00000088, Width: 32b; [0x080-0x1e7] Lookup table holds Flash command sequences
lookupTable_2: '0x00000000'
# ----------------------------------------===== lookupTable_3 [Optional] =====----------------------------------------
# Description: Offset: 0x0000008C, Width: 32b; [0x080-0x1e7] Lookup table holds Flash command sequences
lookupTable_3: '0x00000000'
# ----------------------------------------===== lookupTable_4 [Optional] =====----------------------------------------
# Description: Offset: 0x00000090, Width: 32b; [0x080-0x1e7] Lookup table holds Flash command sequences
lookupTable_4: '0x00000000'
# ----------------------------------------===== lookupTable_5 [Optional] =====----------------------------------------
# Description: Offset: 0x00000094, Width: 32b; [0x080-0x1e7] Lookup table holds Flash command sequences
lookupTable_5: '0x00000000'
# ----------------------------------------===== lookupTable_6 [Optional] =====----------------------------------------
# Description: Offset: 0x00000098, Width: 32b; [0x080-0x1e7] Lookup table holds Flash command sequences
lookupTable_6: '0x00000000'
# ----------------------------------------===== lookupTable_7 [Optional] =====----------------------------------------
# Description: Offset: 0x0000009C, Width: 32b; [0x080-0x1e7] Lookup table holds Flash command sequences
lookupTable_7: '0x00000000'
# ----------------------------------------===== lookupTable_8 [Optional] =====----------------------------------------
# Description: Offset: 0x000000A0, Width: 32b; [0x080-0x1e7] Lookup table holds Flash command sequences
lookupTable_8: '0x00000000'
# ----------------------------------------===== lookupTable_9 [Optional] =====----------------------------------------
# Description: Offset: 0x000000A4, Width: 32b; [0x080-0x1e7] Lookup table holds Flash command sequences
lookupTable_9: '0x00000000'
# ---------------------------------------===== lookupTable_10 [Optional] =====----------------------------------------
# Description: Offset: 0x000000A8, Width: 32b; [0x080-0x1e7] Lookup table holds Flash command sequences
lookupTable_10: '0x00000000'
# ---------------------------------------===== lookupTable_11 [Optional] =====----------------------------------------
# Description: Offset: 0x000000AC, Width: 32b; [0x080-0x1e7] Lookup table holds Flash command sequences
lookupTable_11: '0x00000000'
# ---------------------------------------===== lookupTable_12 [Optional] =====----------------------------------------
# Description: Offset: 0x000000B0, Width: 32b; [0x080-0x1e7] Lookup table holds Flash command sequences
lookupTable_12: '0x00000000'
# ---------------------------------------===== lookupTable_13 [Optional] =====----------------------------------------
# Description: Offset: 0x000000B4, Width: 32b; [0x080-0x1e7] Lookup table holds Flash command sequences
lookupTable_13: '0x00000000'
# ---------------------------------------===== lookupTable_14 [Optional] =====----------------------------------------
# Description: Offset: 0x000000B8, Width: 32b; [0x080-0x1e7] Lookup table holds Flash command sequences
lookupTable_14: '0x00000000'
# ---------------------------------------===== lookupTable_15 [Optional] =====----------------------------------------
# Description: Offset: 0x000000BC, Width: 32b; [0x080-0x1e7] Lookup table holds Flash command sequences
lookupTable_15: '0x00000000'
# ---------------------------------------===== lookupTable_16 [Optional] =====----------------------------------------
# Description: Offset: 0x000000C0, Width: 32b; [0x080-0x1e7] Lookup table holds Flash command sequences
lookupTable_16: '0x00000000'
# ---------------------------------------===== lookupTable_17 [Optional] =====----------------------------------------
# Description: Offset: 0x000000C4, Width: 32b; [0x080-0x1e7] Lookup table holds Flash command sequences
lookupTable_17: '0x00000000'
# ---------------------------------------===== lookupTable_18 [Optional] =====----------------------------------------
# Description: Offset: 0x000000C8, Width: 32b; [0x080-0x1e7] Lookup table holds Flash command sequences
lookupTable_18: '0x00000000'
# ---------------------------------------===== lookupTable_19 [Optional] =====----------------------------------------
# Description: Offset: 0x000000CC, Width: 32b; [0x080-0x1e7] Lookup table holds Flash command sequences
lookupTable_19: '0x00000000'
# ---------------------------------------===== lookupTable_20 [Optional] =====----------------------------------------
# Description: Offset: 0x000000D0, Width: 32b; [0x080-0x1e7] Lookup table holds Flash command sequences
lookupTable_20: '0x00000000'
# ---------------------------------------===== lookupTable_21 [Optional] =====----------------------------------------
# Description: Offset: 0x000000D4, Width: 32b; [0x080-0x1e7] Lookup table holds Flash command sequences
lookupTable_21: '0x00000000'
# ---------------------------------------===== lookupTable_22 [Optional] =====----------------------------------------
# Description: Offset: 0x000000D8, Width: 32b; [0x080-0x1e7] Lookup table holds Flash command sequences
lookupTable_22: '0x00000000'
# ---------------------------------------===== lookupTable_23 [Optional] =====----------------------------------------
# Description: Offset: 0x000000DC, Width: 32b; [0x080-0x1e7] Lookup table holds Flash command sequences
lookupTable_23: '0x00000000'
# ---------------------------------------===== lookupTable_24 [Optional] =====----------------------------------------
# Description: Offset: 0x000000E0, Width: 32b; [0x080-0x1e7] Lookup table holds Flash command sequences
lookupTable_24: '0x00000000'
# ---------------------------------------===== lookupTable_25 [Optional] =====----------------------------------------
# Description: Offset: 0x000000E4, Width: 32b; [0x080-0x1e7] Lookup table holds Flash command sequences
lookupTable_25: '0x00000000'
# ---------------------------------------===== lookupTable_26 [Optional] =====----------------------------------------
# Description: Offset: 0x000000E8, Width: 32b; [0x080-0x1e7] Lookup table holds Flash command sequences
lookupTable_26: '0x00000000'
# ---------------------------------------===== lookupTable_27 [Optional] =====----------------------------------------
# Description: Offset: 0x000000EC, Width: 32b; [0x080-0x1e7] Lookup table holds Flash command sequences
lookupTable_27: '0x00000000'
# ---------------------------------------===== lookupTable_28 [Optional] =====----------------------------------------
# Description: Offset: 0x000000F0, Width: 32b; [0x080-0x1e7] Lookup table holds Flash command sequences
lookupTable_28: '0x00000000'
# ---------------------------------------===== lookupTable_29 [Optional] =====----------------------------------------
# Description: Offset: 0x000000F4, Width: 32b; [0x080-0x1e7] Lookup table holds Flash command sequences
lookupTable_29: '0x00000000'
# ---------------------------------------===== lookupTable_30 [Optional] =====----------------------------------------
# Description: Offset: 0x000000F8, Width: 32b; [0x080-0x1e7] Lookup table holds Flash command sequences
lookupTable_30: '0x00000000'
# ---------------------------------------===== lookupTable_31 [Optional] =====----------------------------------------
# Description: Offset: 0x000000FC, Width: 32b; [0x080-0x1e7] Lookup table holds Flash command sequences
lookupTable_31: '0x00000000'
# ---------------------------------------===== lookupTable_32 [Optional] =====----------------------------------------
# Description: Offset: 0x00000100, Width: 32b; [0x080-0x1e7] Lookup table holds Flash command sequences
lookupTable_32: '0x00000000'
# ---------------------------------------===== lookupTable_33 [Optional] =====----------------------------------------
# Description: Offset: 0x00000104, Width: 32b; [0x080-0x1e7] Lookup table holds Flash command sequences
lookupTable_33: '0x00000000'
# ---------------------------------------===== lookupTable_34 [Optional] =====----------------------------------------
# Description: Offset: 0x00000108, Width: 32b; [0x080-0x1e7] Lookup table holds Flash command sequences
lookupTable_34: '0x00000000'
# ---------------------------------------===== lookupTable_35 [Optional] =====----------------------------------------
# Description: Offset: 0x0000010C, Width: 32b; [0x080-0x1e7] Lookup table holds Flash command sequences
lookupTable_35: '0x00000000'
# ---------------------------------------===== lookupTable_36 [Optional] =====----------------------------------------
# Description: Offset: 0x00000110, Width: 32b; [0x080-0x1e7] Lookup table holds Flash command sequences
lookupTable_36: '0x00000000'
# ---------------------------------------===== lookupTable_37 [Optional] =====----------------------------------------
# Description: Offset: 0x00000114, Width: 32b; [0x080-0x1e7] Lookup table holds Flash command sequences
lookupTable_37: '0x00000000'
# ---------------------------------------===== lookupTable_38 [Optional] =====----------------------------------------
# Description: Offset: 0x00000118, Width: 32b; [0x080-0x1e7] Lookup table holds Flash command sequences
lookupTable_38: '0x00000000'
# ---------------------------------------===== lookupTable_39 [Optional] =====----------------------------------------
# Description: Offset: 0x0000011C, Width: 32b; [0x080-0x1e7] Lookup table holds Flash command sequences
lookupTable_39: '0x00000000'
# ---------------------------------------===== lookupTable_40 [Optional] =====----------------------------------------
# Description: Offset: 0x00000120, Width: 32b; [0x080-0x1e7] Lookup table holds Flash command sequences
lookupTable_40: '0x00000000'
# ---------------------------------------===== lookupTable_41 [Optional] =====----------------------------------------
# Description: Offset: 0x00000124, Width: 32b; [0x080-0x1e7] Lookup table holds Flash command sequences
lookupTable_41: '0x00000000'
# ---------------------------------------===== lookupTable_42 [Optional] =====----------------------------------------
# Description: Offset: 0x00000128, Width: 32b; [0x080-0x1e7] Lookup table holds Flash command sequences
lookupTable_42: '0x00000000'
# ---------------------------------------===== lookupTable_43 [Optional] =====----------------------------------------
# Description: Offset: 0x0000012C, Width: 32b; [0x080-0x1e7] Lookup table holds Flash command sequences
lookupTable_43: '0x00000000'
# ---------------------------------------===== lookupTable_44 [Optional] =====----------------------------------------
# Description: Offset: 0x00000130, Width: 32b; [0x080-0x1e7] Lookup table holds Flash command sequences
lookupTable_44: '0x00000000'
# ---------------------------------------===== lookupTable_45 [Optional] =====----------------------------------------
# Description: Offset: 0x00000134, Width: 32b; [0x080-0x1e7] Lookup table holds Flash command sequences
lookupTable_45: '0x00000000'
# ---------------------------------------===== lookupTable_46 [Optional] =====----------------------------------------
# Description: Offset: 0x00000138, Width: 32b; [0x080-0x1e7] Lookup table holds Flash command sequences
lookupTable_46: '0x00000000'
# ---------------------------------------===== lookupTable_47 [Optional] =====----------------------------------------
# Description: Offset: 0x0000013C, Width: 32b; [0x080-0x1e7] Lookup table holds Flash command sequences
lookupTable_47: '0x00000000'
# ---------------------------------------===== lookupTable_48 [Optional] =====----------------------------------------
# Description: Offset: 0x00000140, Width: 32b; [0x080-0x1e7] Lookup table holds Flash command sequences
lookupTable_48: '0x00000000'
# ---------------------------------------===== lookupTable_49 [Optional] =====----------------------------------------
# Description: Offset: 0x00000144, Width: 32b; [0x080-0x1e7] Lookup table holds Flash command sequences
lookupTable_49: '0x00000000'
# ---------------------------------------===== lookupTable_50 [Optional] =====----------------------------------------
# Description: Offset: 0x00000148, Width: 32b; [0x080-0x1e7] Lookup table holds Flash command sequences
lookupTable_50: '0x00000000'
# ---------------------------------------===== lookupTable_51 [Optional] =====----------------------------------------
# Description: Offset: 0x0000014C, Width: 32b; [0x080-0x1e7] Lookup table holds Flash command sequences
lookupTable_51: '0x00000000'
# ---------------------------------------===== lookupTable_52 [Optional] =====----------------------------------------
# Description: Offset: 0x00000150, Width: 32b; [0x080-0x1e7] Lookup table holds Flash command sequences
lookupTable_52: '0x00000000'
# ---------------------------------------===== lookupTable_53 [Optional] =====----------------------------------------
# Description: Offset: 0x00000154, Width: 32b; [0x080-0x1e7] Lookup table holds Flash command sequences
lookupTable_53: '0x00000000'
# ---------------------------------------===== lookupTable_54 [Optional] =====----------------------------------------
# Description: Offset: 0x00000158, Width: 32b; [0x080-0x1e7] Lookup table holds Flash command sequences
lookupTable_54: '0x00000000'
# ---------------------------------------===== lookupTable_55 [Optional] =====----------------------------------------
# Description: Offset: 0x0000015C, Width: 32b; [0x080-0x1e7] Lookup table holds Flash command sequences
lookupTable_55: '0x00000000'
# ---------------------------------------===== lookupTable_56 [Optional] =====----------------------------------------
# Description: Offset: 0x00000160, Width: 32b; [0x080-0x1e7] Lookup table holds Flash command sequences
lookupTable_56: '0x00000000'
# ---------------------------------------===== lookupTable_57 [Optional] =====----------------------------------------
# Description: Offset: 0x00000164, Width: 32b; [0x080-0x1e7] Lookup table holds Flash command sequences
lookupTable_57: '0x00000000'
# ---------------------------------------===== lookupTable_58 [Optional] =====----------------------------------------
# Description: Offset: 0x00000168, Width: 32b; [0x080-0x1e7] Lookup table holds Flash command sequences
lookupTable_58: '0x00000000'
# ---------------------------------------===== lookupTable_59 [Optional] =====----------------------------------------
# Description: Offset: 0x0000016C, Width: 32b; [0x080-0x1e7] Lookup table holds Flash command sequences
lookupTable_59: '0x00000000'
# ---------------------------------------===== lookupTable_60 [Optional] =====----------------------------------------
# Description: Offset: 0x00000170, Width: 32b; [0x080-0x1e7] Lookup table holds Flash command sequences
lookupTable_60: '0x00000000'
# ---------------------------------------===== lookupTable_61 [Optional] =====----------------------------------------
# Description: Offset: 0x00000174, Width: 32b; [0x080-0x1e7] Lookup table holds Flash command sequences
lookupTable_61: '0x00000000'
# ---------------------------------------===== lookupTable_62 [Optional] =====----------------------------------------
# Description: Offset: 0x00000178, Width: 32b; [0x080-0x1e7] Lookup table holds Flash command sequences
lookupTable_62: '0x00000000'
# ---------------------------------------===== lookupTable_63 [Optional] =====----------------------------------------
# Description: Offset: 0x0000017C, Width: 32b; [0x080-0x1e7] Lookup table holds Flash command sequences
lookupTable_63: '0x00000000'
# ---------------------------------------===== lookupTable_64 [Optional] =====----------------------------------------
# Description: Offset: 0x00000180, Width: 32b; [0x080-0x1e7] Lookup table holds Flash command sequences
lookupTable_64: '0x00000000'
# ---------------------------------------===== lookupTable_65 [Optional] =====----------------------------------------
# Description: Offset: 0x00000184, Width: 32b; [0x080-0x1e7] Lookup table holds Flash command sequences
lookupTable_65: '0x00000000'
# ---------------------------------------===== lookupTable_66 [Optional] =====----------------------------------------
# Description: Offset: 0x00000188, Width: 32b; [0x080-0x1e7] Lookup table holds Flash command sequences
lookupTable_66: '0x00000000'
# ---------------------------------------===== lookupTable_67 [Optional] =====----------------------------------------
# Description: Offset: 0x0000018C, Width: 32b; [0x080-0x1e7] Lookup table holds Flash command sequences
lookupTable_67: '0x00000000'
# ---------------------------------------===== lookupTable_68 [Optional] =====----------------------------------------
# Description: Offset: 0x00000190, Width: 32b; [0x080-0x1e7] Lookup table holds Flash command sequences
lookupTable_68: '0x00000000'
# ---------------------------------------===== lookupTable_69 [Optional] =====----------------------------------------
# Description: Offset: 0x00000194, Width: 32b; [0x080-0x1e7] Lookup table holds Flash command sequences
lookupTable_69: '0x00000000'
# ---------------------------------------===== lookupTable_70 [Optional] =====----------------------------------------
# Description: Offset: 0x00000198, Width: 32b; [0x080-0x1e7] Lookup table holds Flash command sequences
lookupTable_70: '0x00000000'
# ---------------------------------------===== lookupTable_71 [Optional] =====----------------------------------------
# Description: Offset: 0x0000019C, Width: 32b; [0x080-0x1e7] Lookup table holds Flash command sequences
lookupTable_71: '0x00000000'
# ---------------------------------------===== lookupTable_72 [Optional] =====----------------------------------------
# Description: Offset: 0x000001A0, Width: 32b; [0x080-0x1e7] Lookup table holds Flash command sequences
lookupTable_72: '0x00000000'
# ---------------------------------------===== lookupTable_73 [Optional] =====----------------------------------------
# Description: Offset: 0x000001A4, Width: 32b; [0x080-0x1e7] Lookup table holds Flash command sequences
lookupTable_73: '0x00000000'
# ---------------------------------------===== lookupTable_74 [Optional] =====----------------------------------------
# Description: Offset: 0x000001A8, Width: 32b; [0x080-0x1e7] Lookup table holds Flash command sequences
lookupTable_74: '0x00000000'
# ---------------------------------------===== lookupTable_75 [Optional] =====----------------------------------------
# Description: Offset: 0x000001AC, Width: 32b; [0x080-0x1e7] Lookup table holds Flash command sequences
lookupTable_75: '0x00000000'
# ---------------------------------------===== lookupTable_76 [Optional] =====----------------------------------------
# Description: Offset: 0x000001B0, Width: 32b; [0x080-0x1e7] Lookup table holds Flash command sequences
lookupTable_76: '0x00000000'
# ---------------------------------------===== lookupTable_77 [Optional] =====----------------------------------------
# Description: Offset: 0x000001B4, Width: 32b; [0x080-0x1e7] Lookup table holds Flash command sequences
lookupTable_77: '0x00000000'
# ---------------------------------------===== lookupTable_78 [Optional] =====----------------------------------------
# Description: Offset: 0x000001B8, Width: 32b; [0x080-0x1e7] Lookup table holds Flash command sequences
lookupTable_78: '0x00000000'
# ---------------------------------------===== lookupTable_79 [Optional] =====----------------------------------------
# Description: Offset: 0x000001BC, Width: 32b; [0x080-0x1e7] Lookup table holds Flash command sequences
lookupTable_79: '0x00000000'
# ---------------------------------------===== lookupTable_80 [Optional] =====----------------------------------------
# Description: Offset: 0x000001C0, Width: 32b; [0x080-0x1e7] Lookup table holds Flash command sequences
lookupTable_80: '0x00000000'
# ---------------------------------------===== lookupTable_81 [Optional] =====----------------------------------------
# Description: Offset: 0x000001C4, Width: 32b; [0x080-0x1e7] Lookup table holds Flash command sequences
lookupTable_81: '0x00000000'
# ---------------------------------------===== lookupTable_82 [Optional] =====----------------------------------------
# Description: Offset: 0x000001C8, Width: 32b; [0x080-0x1e7] Lookup table holds Flash command sequences
lookupTable_82: '0x00000000'
# ---------------------------------------===== lookupTable_83 [Optional] =====----------------------------------------
# Description: Offset: 0x000001CC, Width: 32b; [0x080-0x1e7] Lookup table holds Flash command sequences
lookupTable_83: '0x00000000'
# ---------------------------------------===== lookupTable_84 [Optional] =====----------------------------------------
# Description: Offset: 0x000001D0, Width: 32b; [0x080-0x1e7] Lookup table holds Flash command sequences
lookupTable_84: '0x00000000'
# ---------------------------------------===== lookupTable_85 [Optional] =====----------------------------------------
# Description: Offset: 0x000001D4, Width: 32b; [0x080-0x1e7] Lookup table holds Flash command sequences
lookupTable_85: '0x00000000'
# ---------------------------------------===== lookupTable_86 [Optional] =====----------------------------------------
# Description: Offset: 0x000001D8, Width: 32b; [0x080-0x1e7] Lookup table holds Flash command sequences
lookupTable_86: '0x00000000'
# ---------------------------------------===== lookupTable_87 [Optional] =====----------------------------------------
# Description: Offset: 0x000001DC, Width: 32b; [0x080-0x1e7] Lookup table holds Flash command sequences
lookupTable_87: '0x00000000'
# ---------------------------------------===== lookupTable_88 [Optional] =====----------------------------------------
# Description: Offset: 0x000001E0, Width: 32b; [0x080-0x1e7] Lookup table holds Flash command sequences
lookupTable_88: '0x00000000'
# ---------------------------------------===== lookupTable_89 [Optional] =====----------------------------------------
# Description: Offset: 0x000001E4, Width: 32b; [0x080-0x1e7] Lookup table holds Flash command sequences
lookupTable_89: '0x00000000'
# ---------------------------------------===== lutCustomSeq_0 [Optional] =====----------------------------------------
# Description: Offset: 0x000001E8, Width: 32b; [0x1e8-0x217] Customizable LUT Sequences
lutCustomSeq_0:
# ------------------------------------------===== seqNum [Optional] =====-------------------------------------------
# Description: Offset: 0b, Width: 8b, Sequence Number, valid number: 1-16
seqNum: 0
# -------------------------------------------===== seqId [Optional] =====-------------------------------------------
# Description: Offset: 8b, Width: 8b, Sequence Index, valid number: 0-15
seqId: 0
# -----------------------------------------===== reserved [Optional] =====------------------------------------------
# Description: Offset: 16b, Width: 16b, N/A
reserved: 0
# ---------------------------------------===== lutCustomSeq_1 [Optional] =====----------------------------------------
# Description: Offset: 0x000001EC, Width: 32b; [0x1e8-0x217] Customizable LUT Sequences
lutCustomSeq_1:
# ------------------------------------------===== seqNum [Optional] =====-------------------------------------------
# Description: Offset: 0b, Width: 8b, Sequence Number, valid number: 1-16
seqNum: 0
# -------------------------------------------===== seqId [Optional] =====-------------------------------------------
# Description: Offset: 8b, Width: 8b, Sequence Index, valid number: 0-15
seqId: 0
# -----------------------------------------===== reserved [Optional] =====------------------------------------------
# Description: Offset: 16b, Width: 16b, N/A
reserved: 0
# ---------------------------------------===== lutCustomSeq_2 [Optional] =====----------------------------------------
# Description: Offset: 0x000001F0, Width: 32b; [0x1e8-0x217] Customizable LUT Sequences
lutCustomSeq_2:
# ------------------------------------------===== seqNum [Optional] =====-------------------------------------------
# Description: Offset: 0b, Width: 8b, Sequence Number, valid number: 1-16
seqNum: 0
# -------------------------------------------===== seqId [Optional] =====-------------------------------------------
# Description: Offset: 8b, Width: 8b, Sequence Index, valid number: 0-15
seqId: 0
# -----------------------------------------===== reserved [Optional] =====------------------------------------------
# Description: Offset: 16b, Width: 16b, N/A
reserved: 0
# ---------------------------------------===== lutCustomSeq_3 [Optional] =====----------------------------------------
# Description: Offset: 0x000001F4, Width: 32b; [0x1e8-0x217] Customizable LUT Sequences
lutCustomSeq_3:
# ------------------------------------------===== seqNum [Optional] =====-------------------------------------------
# Description: Offset: 0b, Width: 8b, Sequence Number, valid number: 1-16
seqNum: 0
# -------------------------------------------===== seqId [Optional] =====-------------------------------------------
# Description: Offset: 8b, Width: 8b, Sequence Index, valid number: 0-15
seqId: 0
# -----------------------------------------===== reserved [Optional] =====------------------------------------------
# Description: Offset: 16b, Width: 16b, N/A
reserved: 0
# ---------------------------------------===== lutCustomSeq_4 [Optional] =====----------------------------------------
# Description: Offset: 0x000001F8, Width: 32b; [0x1e8-0x217] Customizable LUT Sequences
lutCustomSeq_4:
# ------------------------------------------===== seqNum [Optional] =====-------------------------------------------
# Description: Offset: 0b, Width: 8b, Sequence Number, valid number: 1-16
seqNum: 0
# -------------------------------------------===== seqId [Optional] =====-------------------------------------------
# Description: Offset: 8b, Width: 8b, Sequence Index, valid number: 0-15
seqId: 0
# -----------------------------------------===== reserved [Optional] =====------------------------------------------
# Description: Offset: 16b, Width: 16b, N/A
reserved: 0
# ---------------------------------------===== lutCustomSeq_5 [Optional] =====----------------------------------------
# Description: Offset: 0x000001FC, Width: 32b; [0x1e8-0x217] Customizable LUT Sequences
lutCustomSeq_5:
# ------------------------------------------===== seqNum [Optional] =====-------------------------------------------
# Description: Offset: 0b, Width: 8b, Sequence Number, valid number: 1-16
seqNum: 0
# -------------------------------------------===== seqId [Optional] =====-------------------------------------------
# Description: Offset: 8b, Width: 8b, Sequence Index, valid number: 0-15
seqId: 0
# -----------------------------------------===== reserved [Optional] =====------------------------------------------
# Description: Offset: 16b, Width: 16b, N/A
reserved: 0
# ---------------------------------------===== lutCustomSeq_6 [Optional] =====----------------------------------------
# Description: Offset: 0x00000200, Width: 32b; [0x1e8-0x217] Customizable LUT Sequences
lutCustomSeq_6:
# ------------------------------------------===== seqNum [Optional] =====-------------------------------------------
# Description: Offset: 0b, Width: 8b, Sequence Number, valid number: 1-16
seqNum: 0
# -------------------------------------------===== seqId [Optional] =====-------------------------------------------
# Description: Offset: 8b, Width: 8b, Sequence Index, valid number: 0-15
seqId: 0
# -----------------------------------------===== reserved [Optional] =====------------------------------------------
# Description: Offset: 16b, Width: 16b, N/A
reserved: 0
# ---------------------------------------===== lutCustomSeq_7 [Optional] =====----------------------------------------
# Description: Offset: 0x00000204, Width: 32b; [0x1e8-0x217] Customizable LUT Sequences
lutCustomSeq_7:
# ------------------------------------------===== seqNum [Optional] =====-------------------------------------------
# Description: Offset: 0b, Width: 8b, Sequence Number, valid number: 1-16
seqNum: 0
# -------------------------------------------===== seqId [Optional] =====-------------------------------------------
# Description: Offset: 8b, Width: 8b, Sequence Index, valid number: 0-15
seqId: 0
# -----------------------------------------===== reserved [Optional] =====------------------------------------------
# Description: Offset: 16b, Width: 16b, N/A
reserved: 0
# ---------------------------------------===== lutCustomSeq_8 [Optional] =====----------------------------------------
# Description: Offset: 0x00000208, Width: 32b; [0x1e8-0x217] Customizable LUT Sequences
lutCustomSeq_8:
# ------------------------------------------===== seqNum [Optional] =====-------------------------------------------
# Description: Offset: 0b, Width: 8b, Sequence Number, valid number: 1-16
seqNum: 0
# -------------------------------------------===== seqId [Optional] =====-------------------------------------------
# Description: Offset: 8b, Width: 8b, Sequence Index, valid number: 0-15
seqId: 0
# -----------------------------------------===== reserved [Optional] =====------------------------------------------
# Description: Offset: 16b, Width: 16b, N/A
reserved: 0
# ---------------------------------------===== lutCustomSeq_9 [Optional] =====----------------------------------------
# Description: Offset: 0x0000020C, Width: 32b; [0x1e8-0x217] Customizable LUT Sequences
lutCustomSeq_9:
# ------------------------------------------===== seqNum [Optional] =====-------------------------------------------
# Description: Offset: 0b, Width: 8b, Sequence Number, valid number: 1-16
seqNum: 0
# -------------------------------------------===== seqId [Optional] =====-------------------------------------------
# Description: Offset: 8b, Width: 8b, Sequence Index, valid number: 0-15
seqId: 0
# -----------------------------------------===== reserved [Optional] =====------------------------------------------
# Description: Offset: 16b, Width: 16b, N/A
reserved: 0
# ---------------------------------------===== lutCustomSeq_10 [Optional] =====---------------------------------------
# Description: Offset: 0x00000210, Width: 32b; [0x1e8-0x217] Customizable LUT Sequences
lutCustomSeq_10:
# ------------------------------------------===== seqNum [Optional] =====-------------------------------------------
# Description: Offset: 0b, Width: 8b, Sequence Number, valid number: 1-16
seqNum: 0
# -------------------------------------------===== seqId [Optional] =====-------------------------------------------
# Description: Offset: 8b, Width: 8b, Sequence Index, valid number: 0-15
seqId: 0
# -----------------------------------------===== reserved [Optional] =====------------------------------------------
# Description: Offset: 16b, Width: 16b, N/A
reserved: 0
# ---------------------------------------===== lutCustomSeq_11 [Optional] =====---------------------------------------
# Description: Offset: 0x00000214, Width: 32b; [0x1e8-0x217] Customizable LUT Sequences
lutCustomSeq_11:
# ------------------------------------------===== seqNum [Optional] =====-------------------------------------------
# Description: Offset: 0b, Width: 8b, Sequence Number, valid number: 1-16
seqNum: 0
# -------------------------------------------===== seqId [Optional] =====-------------------------------------------
# Description: Offset: 8b, Width: 8b, Sequence Index, valid number: 0-15
seqId: 0
# -----------------------------------------===== reserved [Optional] =====------------------------------------------
# Description: Offset: 16b, Width: 16b, N/A
reserved: 0
# ----------------------------------------===== dllCraSdrVal [Optional] =====-----------------------------------------
# Description: Offset: 0x00000218, Width: 32b; [0x218-0x21b] Customizable DLLCRA for SDR setting
dllCraSdrVal: '0x00000000'
# -----------------------------------------===== smprSdrVal [Optional] =====------------------------------------------
# Description: Offset: 0x0000021C, Width: 32b; [0x21c-0x21f] Customizable SMPR SDR setting
smprSdrVal: '0x00000000'
# ----------------------------------------===== dllCraDdrVal [Optional] =====-----------------------------------------
# Description: Offset: 0x00000220, Width: 32b; [0x220-0x223] Customizable DLLCRA for DDR setting
dllCraDdrVal: '0x00000000'
# -----------------------------------------===== smprDdrVal [Optional] =====------------------------------------------
# Description: Offset: 0x00000224, Width: 32b; [0x224-0x227] Customizable SMPR DDR setting
smprDdrVal: '0x00000000'
# ------------------------------------------===== pageSize [Optional] =====-------------------------------------------
# Description: Offset: 0x00000228, Width: 32b; [0x228-0x22b] Page size of Serial NOR
pageSize: '0x00000000'
# -----------------------------------------===== sectorSize [Optional] =====------------------------------------------
# Description: Offset: 0x0000022C, Width: 32b; [0x22c-0x22f] Sector size of Serial NOR
sectorSize: '0x00000000'
# -------------------------------------===== ipcmdSerialClkFreq [Optional] =====--------------------------------------
# Description: Offset: 0x00000230, Width: 8b; [0x230-0x230] Clock frequency for IP command
ipcmdSerialClkFreq: '0x00'
# -------------------------------------===== isUniformBlockSize [Optional] =====--------------------------------------
# Description: Offset: 0x00000231, Width: 8b; [0x231-0x231] Sector/Block size is the same
isUniformBlockSize: '0x00'
# -------------------------------------===== isDataOrderSwapped [Optional] =====--------------------------------------
# Description: Offset: 0x00000232, Width: 8b; [0x232-0x232] Data order (D0, D1, D2, D3) is swapped (D1,D0, D3, D2)
isDataOrderSwapped: '0x00'
# ------------------------------------------===== reserved4 [Optional] =====------------------------------------------
# Description: Offset: 0x00000233, Width: 8b; [0x233-0x233] Reserved for future use
reserved4: '0x00'
# ----------------------------------------===== serialNorType [Optional] =====----------------------------------------
# Description: Offset: 0x00000234, Width: 8b; [0x234-0x234] Serial NOR Flash type: 0/1/2/3
serialNorType: '0x00'
# --------------------------------------===== needExitNoCmdMode [Optional] =====--------------------------------------
# Description: Offset: 0x00000235, Width: 8b; [0x235-0x235] Need to exit NoCmd mode before other IP command
needExitNoCmdMode: '0x00'
# ------------------------------------===== halfClkForNonReadCmd [Optional] =====-------------------------------------
# Description: Offset: 0x00000236, Width: 8b; [0x236-0x236] Half the Serial Clock for non-read command: true/false
halfClkForNonReadCmd: '0x00'
# ------------------------------------===== needRestoreNoCmdMode [Optional] =====-------------------------------------
# Description: Offset: 0x00000237, Width: 8b; [0x237-0x237] Need to Restore NoCmd mode after IP command execution
needRestoreNoCmdMode: '0x00'
# ------------------------------------------===== blockSize [Optional] =====------------------------------------------
# Description: Offset: 0x00000238, Width: 32b; [0x238-0x23b] Block size
blockSize: '0x00000000'
# ----------------------------------------===== flashStateCtx [Optional] =====----------------------------------------
# Description: Offset: 0x0000023C, Width: 32b; [0x23c-0x23f] Flash State Context
flashStateCtx: '0x00000000'
# -----------------------------------------===== reserved4_0 [Optional] =====-----------------------------------------
# Description: Offset: 0x00000240, Width: 32b; [0x240-0x243] Flash State Context
reserved4_0: '0x00000000'
# -----------------------------------------===== reserved4_1 [Optional] =====-----------------------------------------
# Description: Offset: 0x00000244, Width: 32b; [0x244-0x247] Flash State Context
reserved4_1: '0x00000000'
# -----------------------------------------===== reserved4_2 [Optional] =====-----------------------------------------
# Description: Offset: 0x00000248, Width: 32b; [0x248-0x24b] Flash State Context
reserved4_2: '0x00000000'
# -----------------------------------------===== reserved4_3 [Optional] =====-----------------------------------------
# Description: Offset: 0x0000024C, Width: 32b; [0x24c-0x24f] Flash State Context
reserved4_3: '0x00000000'
# -----------------------------------------===== reserved4_4 [Optional] =====-----------------------------------------
# Description: Offset: 0x00000250, Width: 32b; [0x250-0x253] Flash State Context
reserved4_4: '0x00000000'
# -----------------------------------------===== reserved4_5 [Optional] =====-----------------------------------------
# Description: Offset: 0x00000254, Width: 32b; [0x254-0x257] Flash State Context
reserved4_5: '0x00000000'
# -----------------------------------------===== reserved4_6 [Optional] =====-----------------------------------------
# Description: Offset: 0x00000258, Width: 32b; [0x258-0x25b] Flash State Context
reserved4_6: '0x00000000'
# -----------------------------------------===== reserved4_7 [Optional] =====-----------------------------------------
# Description: Offset: 0x0000025C, Width: 32b; [0x25c-0x25f] Flash State Context
reserved4_7: '0x00000000'
# -----------------------------------------===== reserved4_8 [Optional] =====-----------------------------------------
# Description: Offset: 0x00000260, Width: 32b; [0x260-0x263] Flash State Context
reserved4_8: '0x00000000'
# -----------------------------------------===== reserved4_9 [Optional] =====-----------------------------------------
# Description: Offset: 0x00000264, Width: 32b; [0x264-0x267] Flash State Context
reserved4_9: '0x00000000'
# ----------------------------------------===== reserved4_10 [Optional] =====-----------------------------------------
# Description: Offset: 0x00000268, Width: 32b; [0x268-0x26b] Flash State Context
reserved4_10: '0x00000000'
# ----------------------------------------===== reserved4_11 [Optional] =====-----------------------------------------
# Description: Offset: 0x0000026C, Width: 32b; [0x26c-0x26f] Flash State Context
reserved4_11: '0x00000000'
# ----------------------------------------===== reserved4_12 [Optional] =====-----------------------------------------
# Description: Offset: 0x00000270, Width: 32b; [0x270-0x273] Flash State Context
reserved4_12: '0x00000000'
# ----------------------------------------===== reserved4_13 [Optional] =====-----------------------------------------
# Description: Offset: 0x00000274, Width: 32b; [0x274-0x277] Flash State Context
reserved4_13: '0x00000000'
# ----------------------------------------===== reserved4_14 [Optional] =====-----------------------------------------
# Description: Offset: 0x00000278, Width: 32b; [0x278-0x27b] Flash State Context
reserved4_14: '0x00000000'
# ----------------------------------------===== reserved4_15 [Optional] =====-----------------------------------------
# Description: Offset: 0x0000027C, Width: 32b; [0x27c-0x27f] Flash State Context
reserved4_15: '0x00000000'
# ----------------------------------------===== reserved4_16 [Optional] =====-----------------------------------------
# Description: Offset: 0x00000280, Width: 32b; [0x280-0x283] Flash State Context
reserved4_16: '0x00000000'
# ----------------------------------------===== reserved4_17 [Optional] =====-----------------------------------------
# Description: Offset: 0x00000284, Width: 32b; [0x284-0x287] Flash State Context
reserved4_17: '0x00000000'
# ----------------------------------------===== reserved4_18 [Optional] =====-----------------------------------------
# Description: Offset: 0x00000288, Width: 32b; [0x288-0x28b] Flash State Context
reserved4_18: '0x00000000'
# ----------------------------------------===== reserved4_19 [Optional] =====-----------------------------------------
# Description: Offset: 0x0000028C, Width: 32b; [0x28c-0x28f] Flash State Context
reserved4_19: '0x00000000'
# ----------------------------------------===== reserved4_20 [Optional] =====-----------------------------------------
# Description: Offset: 0x00000290, Width: 32b; [0x290-0x293] Flash State Context
reserved4_20: '0x00000000'
# ----------------------------------------===== reserved4_21 [Optional] =====-----------------------------------------
# Description: Offset: 0x00000294, Width: 32b; [0x294-0x297] Flash State Context
reserved4_21: '0x00000000'
# ----------------------------------------===== reserved4_22 [Optional] =====-----------------------------------------
# Description: Offset: 0x00000298, Width: 32b; [0x298-0x29b] Flash State Context
reserved4_22: '0x00000000'
# ----------------------------------------===== reserved4_23 [Optional] =====-----------------------------------------
# Description: Offset: 0x0000029C, Width: 32b; [0x29c-0x29f] Flash State Context
reserved4_23: '0x00000000'
# ----------------------------------------===== reserved4_24 [Optional] =====-----------------------------------------
# Description: Offset: 0x000002A0, Width: 32b; [0x2a0-0x2a3] Flash State Context
reserved4_24: '0x00000000'
# ----------------------------------------===== reserved4_25 [Optional] =====-----------------------------------------
# Description: Offset: 0x000002A4, Width: 32b; [0x2a4-0x2a7] Flash State Context
reserved4_25: '0x00000000'
# ----------------------------------------===== reserved4_26 [Optional] =====-----------------------------------------
# Description: Offset: 0x000002A8, Width: 32b; [0x2a8-0x2ab] Flash State Context
reserved4_26: '0x00000000'
# ----------------------------------------===== reserved4_27 [Optional] =====-----------------------------------------
# Description: Offset: 0x000002AC, Width: 32b; [0x2ac-0x2af] Flash State Context
reserved4_27: '0x00000000'
# ----------------------------------------===== reserved4_28 [Optional] =====-----------------------------------------
# Description: Offset: 0x000002B0, Width: 32b; [0x2b0-0x2b3] Flash State Context
reserved4_28: '0x00000000'
# ----------------------------------------===== reserved4_29 [Optional] =====-----------------------------------------
# Description: Offset: 0x000002B4, Width: 32b; [0x2b4-0x2b7] Flash State Context
reserved4_29: '0x00000000'
# ----------------------------------------===== reserved4_30 [Optional] =====-----------------------------------------
# Description: Offset: 0x000002B8, Width: 32b; [0x2b8-0x2bb] Flash State Context
reserved4_30: '0x00000000'
# ----------------------------------------===== reserved4_31 [Optional] =====-----------------------------------------
# Description: Offset: 0x000002BC, Width: 32b; [0x2bc-0x2bf] Flash State Context
reserved4_31: '0x00000000'
# ----------------------------------------===== reserved4_32 [Optional] =====-----------------------------------------
# Description: Offset: 0x000002C0, Width: 32b; [0x2c0-0x2c3] Flash State Context
reserved4_32: '0x00000000'
# ----------------------------------------===== reserved4_33 [Optional] =====-----------------------------------------
# Description: Offset: 0x000002C4, Width: 32b; [0x2c4-0x2c7] Flash State Context
reserved4_33: '0x00000000'
# ----------------------------------------===== reserved4_34 [Optional] =====-----------------------------------------
# Description: Offset: 0x000002C8, Width: 32b; [0x2c8-0x2cb] Flash State Context
reserved4_34: '0x00000000'
# ----------------------------------------===== reserved4_35 [Optional] =====-----------------------------------------
# Description: Offset: 0x000002CC, Width: 32b; [0x2cc-0x2cf] Flash State Context
reserved4_35: '0x00000000'
# ----------------------------------------===== reserved4_36 [Optional] =====-----------------------------------------
# Description: Offset: 0x000002D0, Width: 32b; [0x2d0-0x2d3] Flash State Context
reserved4_36: '0x00000000'
# ----------------------------------------===== reserved4_37 [Optional] =====-----------------------------------------
# Description: Offset: 0x000002D4, Width: 32b; [0x2d4-0x2d7] Flash State Context
reserved4_37: '0x00000000'
# ----------------------------------------===== reserved4_38 [Optional] =====-----------------------------------------
# Description: Offset: 0x000002D8, Width: 32b; [0x2d8-0x2db] Flash State Context
reserved4_38: '0x00000000'
# ----------------------------------------===== reserved4_39 [Optional] =====-----------------------------------------
# Description: Offset: 0x000002DC, Width: 32b; [0x2dc-0x2df] Flash State Context
reserved4_39: '0x00000000'
# ----------------------------------------===== reserved4_40 [Optional] =====-----------------------------------------
# Description: Offset: 0x000002E0, Width: 32b; [0x2e0-0x2e3] Flash State Context
reserved4_40: '0x00000000'
# ----------------------------------------===== reserved4_41 [Optional] =====-----------------------------------------
# Description: Offset: 0x000002E4, Width: 32b; [0x2e4-0x2e7] Flash State Context
reserved4_41: '0x00000000'
# ----------------------------------------===== reserved4_42 [Optional] =====-----------------------------------------
# Description: Offset: 0x000002E8, Width: 32b; [0x2e8-0x2eb] Flash State Context
reserved4_42: '0x00000000'
# ----------------------------------------===== reserved4_43 [Optional] =====-----------------------------------------
# Description: Offset: 0x000002EC, Width: 32b; [0x2ec-0x2ef] Flash State Context
reserved4_43: '0x00000000'
# ----------------------------------------===== reserved4_44 [Optional] =====-----------------------------------------
# Description: Offset: 0x000002F0, Width: 32b; [0x2f0-0x2f3] Flash State Context
reserved4_44: '0x00000000'
# ----------------------------------------===== reserved4_45 [Optional] =====-----------------------------------------
# Description: Offset: 0x000002F4, Width: 32b; [0x2f4-0x2f7] Flash State Context
reserved4_45: '0x00000000'
# ----------------------------------------===== reserved4_46 [Optional] =====-----------------------------------------
# Description: Offset: 0x000002F8, Width: 32b; [0x2f8-0x2fb] Flash State Context
reserved4_46: '0x00000000'
# ----------------------------------------===== reserved4_47 [Optional] =====-----------------------------------------
# Description: Offset: 0x000002FC, Width: 32b; [0x2fc-0x2ff] Flash State Context
reserved4_47: '0x00000000'
FCB for mimxrt798s, Revision: b0 and xspi_nor#
FCB for mimxrt798s, Revision: b0 and xspi_nor JSON schema
FCB for mimxrt798s, Revision: b0 and xspi_nor YAML configuration template
# ================================== FCB for mimxrt798s, Revision: b0 and xspi_nor ===================================
# ======================================================================================================================
# == FCB for mimxrt798s, Revision: b0 and xspi_nor ==
# ======================================================================================================================
# -------------------------------------===== The chip family name [Required] =====--------------------------------------
# Description: NXP chip family identifier.
family: CHOOSE_FROM_TABLE
# -----------------------------------------===== MCU revision [Optional] =====------------------------------------------
# Description: Revision of silicon. The 'latest' name, means most current revision.
# Possible options: <a0, a1, b0, latest>
revision: b0
# ------------------------------------------===== Memory type [Required] =====------------------------------------------
# Description: Specify type of memory used by FCB description.
# Possible options: <xspi_nor>
type: xspi_nor
# ------------------------------------------===== mimxrt798s [Required] =====-------------------------------------------
fcb_settings:
# ---------------------------------------------===== tag [Optional] =====---------------------------------------------
# Description: Offset: 0x00000000, Width: 32b; [0x000-0x003] Tag, fixed value 0x42464346UL
tag: '0x00000000'
# -------------------------------------------===== version [Optional] =====-------------------------------------------
# Description: Offset: 0x00000004, Width: 32b; [0x004-0x007] Version,[31:24] -'V', [23:16] - Major, [15:8] - Minor,
# [7:0] - bugfix
version: '0x00000000'
# ------------------------------------------===== reserved0 [Optional] =====------------------------------------------
# Description: Offset: 0x00000008, Width: 32b; [0x008-0x00b] Reserved for future use
reserved0: '0x00000000'
# --------------------------------------===== readSampleClkSrc [Optional] =====---------------------------------------
# Description: Offset: 0x0000000C, Width: 8b; [0x00c-0x00c] Read Sample Clock Source, valid value: 0: internal
# sampling 2: DQS pad loopback 3: External DQS signal
readSampleClkSrc: '0x00'
# -----------------------------------------===== csHoldTime [Optional] =====------------------------------------------
# Description: Offset: 0x0000000D, Width: 8b; [0x00d-0x00d] CS hold time, default value: 3
csHoldTime: '0x00'
# -----------------------------------------===== csSetupTime [Optional] =====-----------------------------------------
# Description: Offset: 0x0000000E, Width: 8b; [0x00e-0x00e] CS setup time, default value: 3
csSetupTime: '0x00'
# -------------------------------------===== columnAddressWidth [Optional] =====--------------------------------------
# Description: Offset: 0x0000000F, Width: 8b; [0x00f-0x00f] Column Address with, for HyperBus protocol, it is fixed
# to 3, others to 0.
columnAddressWidth: '0x00'
# -------------------------------------===== deviceModeCfgEnable [Optional] =====-------------------------------------
# Description: Offset: 0x00000010, Width: 8b; [0x010-0x010] Device Mode Configure enable flag, 1 - Enable, 0 -
# Disable
deviceModeCfgEnable: '0x00'
# ---------------------------------------===== deviceModeType [Optional] =====----------------------------------------
# Description: Offset: 0x00000011, Width: 8b; [0x011-0x011] Specify the configuration command type. 0: No mode change
# 1: Quad enable (switch from SPI to Quad mode) 2: Spi2Xpi (switch from SPI to DPI, QPI, or OPI mode) 3: Xpi2Spi
# (switch from DPI, QPI, or OPI to SPI mode)
deviceModeType: '0x00'
# -------------------------------------===== waitTimeCfgCommands [Optional] =====-------------------------------------
# Description: Offset: 0x00000012, Width: 16b; [0x012-0x013] Wait time for Device mode configuration command, unit:
# 100us
waitTimeCfgCommands: '0x0000'
# ----------------------------------------===== deviceModeSeq [Optional] =====----------------------------------------
# Description: Offset: 0x00000014, Width: 32b; [0x014-0x017] Device mode sequence info [ 7:0] - Number of required
# sequences [15:8] - Sequence index
deviceModeSeq:
# ------------------------------------------===== seqNum [Optional] =====-------------------------------------------
# Description: Offset: 0b, Width: 8b, Sequence Number, valid number: 1-16
seqNum: 0
# -------------------------------------------===== seqId [Optional] =====-------------------------------------------
# Description: Offset: 8b, Width: 8b, Sequence Index, valid number: 0-15
seqId: 0
# -----------------------------------------===== reserved [Optional] =====------------------------------------------
# Description: Offset: 16b, Width: 16b, N/A
reserved: 0
# ----------------------------------------===== deviceModeArg [Optional] =====----------------------------------------
# Description: Offset: 0x00000018, Width: 32b; [0x018-0x01b] Argument/Parameter for device configuration
deviceModeArg: '0x00000000'
# ---------------------------------------===== configCmdEnable [Optional] =====---------------------------------------
# Description: Offset: 0x0000001C, Width: 8b; [0x01c-0x01c] Configure command Enable Flag, 1 - Enable, 0 - Disable
configCmdEnable: '0x00'
# --------------------------------------===== configModeType_0 [Optional] =====---------------------------------------
# Description: Offset: 0x0000001D, Width: 8b; [0x01d-0x01f] Configure Mode Type, similar as deviceModeTpe
configModeType_0: '0x00'
# --------------------------------------===== configModeType_1 [Optional] =====---------------------------------------
# Description: Offset: 0x0000001E, Width: 8b; [0x01d-0x01f] Configure Mode Type, similar as deviceModeTpe
configModeType_1: '0x00'
# --------------------------------------===== configModeType_2 [Optional] =====---------------------------------------
# Description: Offset: 0x0000001F, Width: 8b; [0x01d-0x01f] Configure Mode Type, similar as deviceModeTpe
configModeType_2: '0x00'
# ---------------------------------------===== configCmdSeqs_0 [Optional] =====---------------------------------------
# Description: Offset: 0x00000020, Width: 32b; [0x020-0x02b] Sequence info for Device Configuration command, similar
# as deviceModeSeq
configCmdSeqs_0:
# ------------------------------------------===== seqNum [Optional] =====-------------------------------------------
# Description: Offset: 0b, Width: 8b, Sequence Number, valid number: 1-16
seqNum: 0
# -------------------------------------------===== seqId [Optional] =====-------------------------------------------
# Description: Offset: 8b, Width: 8b, Sequence Index, valid number: 0-15
seqId: 0
# -----------------------------------------===== reserved [Optional] =====------------------------------------------
# Description: Offset: 16b, Width: 16b, N/A
reserved: 0
# ---------------------------------------===== configCmdSeqs_1 [Optional] =====---------------------------------------
# Description: Offset: 0x00000024, Width: 32b; [0x020-0x02b] Sequence info for Device Configuration command, similar
# as deviceModeSeq
configCmdSeqs_1:
# ------------------------------------------===== seqNum [Optional] =====-------------------------------------------
# Description: Offset: 0b, Width: 8b, Sequence Number, valid number: 1-16
seqNum: 0
# -------------------------------------------===== seqId [Optional] =====-------------------------------------------
# Description: Offset: 8b, Width: 8b, Sequence Index, valid number: 0-15
seqId: 0
# -----------------------------------------===== reserved [Optional] =====------------------------------------------
# Description: Offset: 16b, Width: 16b, N/A
reserved: 0
# ---------------------------------------===== configCmdSeqs_2 [Optional] =====---------------------------------------
# Description: Offset: 0x00000028, Width: 32b; [0x020-0x02b] Sequence info for Device Configuration command, similar
# as deviceModeSeq
configCmdSeqs_2:
# ------------------------------------------===== seqNum [Optional] =====-------------------------------------------
# Description: Offset: 0b, Width: 8b, Sequence Number, valid number: 1-16
seqNum: 0
# -------------------------------------------===== seqId [Optional] =====-------------------------------------------
# Description: Offset: 8b, Width: 8b, Sequence Index, valid number: 0-15
seqId: 0
# -----------------------------------------===== reserved [Optional] =====------------------------------------------
# Description: Offset: 16b, Width: 16b, N/A
reserved: 0
# ------------------------------------------===== reserved1 [Optional] =====------------------------------------------
# Description: Offset: 0x0000002C, Width: 32b; [0x02c-0x02f] Reserved for future use
reserved1: '0x00000000'
# ---------------------------------------===== configCmdArgs_0 [Optional] =====---------------------------------------
# Description: Offset: 0x00000030, Width: 32b; [0x030-0x03b] Arguments/Parameters for device Configuration commands
configCmdArgs_0: '0x00000000'
# ---------------------------------------===== configCmdArgs_1 [Optional] =====---------------------------------------
# Description: Offset: 0x00000034, Width: 32b; [0x030-0x03b] Arguments/Parameters for device Configuration commands
configCmdArgs_1: '0x00000000'
# ---------------------------------------===== configCmdArgs_2 [Optional] =====---------------------------------------
# Description: Offset: 0x00000038, Width: 32b; [0x030-0x03b] Arguments/Parameters for device Configuration commands
configCmdArgs_2: '0x00000000'
# ------------------------------------------===== reserved2 [Optional] =====------------------------------------------
# Description: Offset: 0x0000003C, Width: 32b; [0x03c-0x03f] Reserved for future use
reserved2: '0x00000000'
# ------------------------------------===== controllerMiscOption [Optional] =====-------------------------------------
# Description: Offset: 0x00000040, Width: 32b; N/A
controllerMiscOption: '0x00000000'
# -----------------------------------------===== deviceType [Optional] =====------------------------------------------
# Description: Offset: 0x00000044, Width: 8b; [0x044-0x044] Device Type: 1 for Serial NOR flash memory
deviceType: '0x00'
# ----------------------------------------===== sflashPadType [Optional] =====----------------------------------------
# Description: Offset: 0x00000045, Width: 8b; [0x045-0x045] Serial Flash Pad Type: 1 - Single, 2 - Dual, 4 - Quad, 8
# - Octal
sflashPadType: '0x00'
# ----------------------------------------===== serialClkFreq [Optional] =====----------------------------------------
# Description: Offset: 0x00000046, Width: 8b; [0x046-0x046] Serial Flash Frequency 1: 30 MHz 2: 50 MHz 3: 60 MHz 4:
# 80 MHz 5: 100 MHz 6: 120 MHz 7: 133 MHz 8: 166 MHz 9: 200 MHz
serialClkFreq: '0x00'
# -------------------------------------===== lutCustomSeqEnable [Optional] =====--------------------------------------
# Description: Offset: 0x00000047, Width: 8b; [0x047-0x047] LUT customization Enable, it is required if the
# program/erase cannot be done using 1 LUT sequence, currently, only applicable to HyperFLASH
lutCustomSeqEnable: '0x00'
# -----------------------------------------===== reserved3_0 [Optional] =====-----------------------------------------
# Description: Offset: 0x00000048, Width: 32b; [0x048-0x04f] Reserved for future use
reserved3_0: '0x00000000'
# -----------------------------------------===== reserved3_1 [Optional] =====-----------------------------------------
# Description: Offset: 0x0000004C, Width: 32b; [0x048-0x04f] Reserved for future use
reserved3_1: '0x00000000'
# ----------------------------------------===== sflashA1Size [Optional] =====-----------------------------------------
# Description: Offset: 0x00000050, Width: 32b; [0x050-0x053] Size of Flash connected to A1
sflashA1Size: '0x00000000'
# ----------------------------------------===== sflashA2Size [Optional] =====-----------------------------------------
# Description: Offset: 0x00000054, Width: 32b; [0x054-0x057] Size of Flash connected to A2
sflashA2Size: '0x00000000'
# ----------------------------------------===== sflashB1Size [Optional] =====-----------------------------------------
# Description: Offset: 0x00000058, Width: 32b; [0x058-0x05b] Size of Flash connected to B1
sflashB1Size: '0x00000000'
# ----------------------------------------===== sflashB2Size [Optional] =====-----------------------------------------
# Description: Offset: 0x0000005C, Width: 32b; [0x05c-0x05f] Size of Flash connected to B2
sflashB2Size: '0x00000000'
# ------------------------------------===== csPadSettingOverride [Optional] =====-------------------------------------
# Description: Offset: 0x00000060, Width: 32b; [0x060-0x063] CS pad setting override value
csPadSettingOverride: '0x00000000'
# -----------------------------------===== sclkPadSettingOverride [Optional] =====------------------------------------
# Description: Offset: 0x00000064, Width: 32b; [0x064-0x067] SCK pad setting override value
sclkPadSettingOverride: '0x00000000'
# -----------------------------------===== dataPadSettingOverride [Optional] =====------------------------------------
# Description: Offset: 0x00000068, Width: 32b; [0x068-0x06b] data pad setting override value
dataPadSettingOverride: '0x00000000'
# ------------------------------------===== dqsPadSettingOverride [Optional] =====------------------------------------
# Description: Offset: 0x0000006C, Width: 32b; [0x06c-0x06f] DQS pad setting override value
dqsPadSettingOverride: '0x00000000'
# -----------------------------------------===== timeoutInMs [Optional] =====-----------------------------------------
# Description: Offset: 0x00000070, Width: 32b; [0x070-0x073] Timeout threshold for read status command
timeoutInMs: '0x00000000'
# ---------------------------------------===== commandInterval [Optional] =====---------------------------------------
# Description: Offset: 0x00000074, Width: 32b; [0x074-0x077] CS deselect interval between two commands
commandInterval: '0x00000000'
# ---------------------------------------===== dataValidTime_0 [Optional] =====---------------------------------------
# Description: Offset: 0x00000078, Width: 16b; [0x078-0x07b] CLK edge to data valid time for PORT A and PORT B
dataValidTime_0:
# ----------------------------------------===== time_100ps [Optional] =====-----------------------------------------
# Description: Offset: 0b, Width: 8b, Data valid time, in terms of 100ps
time_100ps: 0
# ----------------------------------------===== delay_cells [Optional] =====----------------------------------------
# Description: Offset: 8b, Width: 8b, Data valid time, in terms of delay cells
delay_cells: 0
# ---------------------------------------===== dataValidTime_1 [Optional] =====---------------------------------------
# Description: Offset: 0x0000007A, Width: 16b; [0x078-0x07b] CLK edge to data valid time for PORT A and PORT B
dataValidTime_1:
# ----------------------------------------===== time_100ps [Optional] =====-----------------------------------------
# Description: Offset: 0b, Width: 8b, Data valid time, in terms of 100ps
time_100ps: 0
# ----------------------------------------===== delay_cells [Optional] =====----------------------------------------
# Description: Offset: 8b, Width: 8b, Data valid time, in terms of delay cells
delay_cells: 0
# -----------------------------------------===== busyOffset [Optional] =====------------------------------------------
# Description: Offset: 0x0000007C, Width: 16b; [0x07c-0x07d] Busy offset, valid value: 0-31
busyOffset: '0x0000'
# ---------------------------------------===== busyBitPolarity [Optional] =====---------------------------------------
# Description: Offset: 0x0000007E, Width: 16b; [0x07e-0x07f] Busy flag polarity, 0 - busy flag is 1 when flash device
# is busy, 1 - busy flag is 0 when flash device is busy
busyBitPolarity: '0x0000'
# ----------------------------------------===== lookupTable_0 [Optional] =====----------------------------------------
# Description: Offset: 0x00000080, Width: 32b; [0x080-0x1e7] Lookup table holds Flash command sequences
lookupTable_0: '0x00000000'
# ----------------------------------------===== lookupTable_1 [Optional] =====----------------------------------------
# Description: Offset: 0x00000084, Width: 32b; [0x080-0x1e7] Lookup table holds Flash command sequences
lookupTable_1: '0x00000000'
# ----------------------------------------===== lookupTable_2 [Optional] =====----------------------------------------
# Description: Offset: 0x00000088, Width: 32b; [0x080-0x1e7] Lookup table holds Flash command sequences
lookupTable_2: '0x00000000'
# ----------------------------------------===== lookupTable_3 [Optional] =====----------------------------------------
# Description: Offset: 0x0000008C, Width: 32b; [0x080-0x1e7] Lookup table holds Flash command sequences
lookupTable_3: '0x00000000'
# ----------------------------------------===== lookupTable_4 [Optional] =====----------------------------------------
# Description: Offset: 0x00000090, Width: 32b; [0x080-0x1e7] Lookup table holds Flash command sequences
lookupTable_4: '0x00000000'
# ----------------------------------------===== lookupTable_5 [Optional] =====----------------------------------------
# Description: Offset: 0x00000094, Width: 32b; [0x080-0x1e7] Lookup table holds Flash command sequences
lookupTable_5: '0x00000000'
# ----------------------------------------===== lookupTable_6 [Optional] =====----------------------------------------
# Description: Offset: 0x00000098, Width: 32b; [0x080-0x1e7] Lookup table holds Flash command sequences
lookupTable_6: '0x00000000'
# ----------------------------------------===== lookupTable_7 [Optional] =====----------------------------------------
# Description: Offset: 0x0000009C, Width: 32b; [0x080-0x1e7] Lookup table holds Flash command sequences
lookupTable_7: '0x00000000'
# ----------------------------------------===== lookupTable_8 [Optional] =====----------------------------------------
# Description: Offset: 0x000000A0, Width: 32b; [0x080-0x1e7] Lookup table holds Flash command sequences
lookupTable_8: '0x00000000'
# ----------------------------------------===== lookupTable_9 [Optional] =====----------------------------------------
# Description: Offset: 0x000000A4, Width: 32b; [0x080-0x1e7] Lookup table holds Flash command sequences
lookupTable_9: '0x00000000'
# ---------------------------------------===== lookupTable_10 [Optional] =====----------------------------------------
# Description: Offset: 0x000000A8, Width: 32b; [0x080-0x1e7] Lookup table holds Flash command sequences
lookupTable_10: '0x00000000'
# ---------------------------------------===== lookupTable_11 [Optional] =====----------------------------------------
# Description: Offset: 0x000000AC, Width: 32b; [0x080-0x1e7] Lookup table holds Flash command sequences
lookupTable_11: '0x00000000'
# ---------------------------------------===== lookupTable_12 [Optional] =====----------------------------------------
# Description: Offset: 0x000000B0, Width: 32b; [0x080-0x1e7] Lookup table holds Flash command sequences
lookupTable_12: '0x00000000'
# ---------------------------------------===== lookupTable_13 [Optional] =====----------------------------------------
# Description: Offset: 0x000000B4, Width: 32b; [0x080-0x1e7] Lookup table holds Flash command sequences
lookupTable_13: '0x00000000'
# ---------------------------------------===== lookupTable_14 [Optional] =====----------------------------------------
# Description: Offset: 0x000000B8, Width: 32b; [0x080-0x1e7] Lookup table holds Flash command sequences
lookupTable_14: '0x00000000'
# ---------------------------------------===== lookupTable_15 [Optional] =====----------------------------------------
# Description: Offset: 0x000000BC, Width: 32b; [0x080-0x1e7] Lookup table holds Flash command sequences
lookupTable_15: '0x00000000'
# ---------------------------------------===== lookupTable_16 [Optional] =====----------------------------------------
# Description: Offset: 0x000000C0, Width: 32b; [0x080-0x1e7] Lookup table holds Flash command sequences
lookupTable_16: '0x00000000'
# ---------------------------------------===== lookupTable_17 [Optional] =====----------------------------------------
# Description: Offset: 0x000000C4, Width: 32b; [0x080-0x1e7] Lookup table holds Flash command sequences
lookupTable_17: '0x00000000'
# ---------------------------------------===== lookupTable_18 [Optional] =====----------------------------------------
# Description: Offset: 0x000000C8, Width: 32b; [0x080-0x1e7] Lookup table holds Flash command sequences
lookupTable_18: '0x00000000'
# ---------------------------------------===== lookupTable_19 [Optional] =====----------------------------------------
# Description: Offset: 0x000000CC, Width: 32b; [0x080-0x1e7] Lookup table holds Flash command sequences
lookupTable_19: '0x00000000'
# ---------------------------------------===== lookupTable_20 [Optional] =====----------------------------------------
# Description: Offset: 0x000000D0, Width: 32b; [0x080-0x1e7] Lookup table holds Flash command sequences
lookupTable_20: '0x00000000'
# ---------------------------------------===== lookupTable_21 [Optional] =====----------------------------------------
# Description: Offset: 0x000000D4, Width: 32b; [0x080-0x1e7] Lookup table holds Flash command sequences
lookupTable_21: '0x00000000'
# ---------------------------------------===== lookupTable_22 [Optional] =====----------------------------------------
# Description: Offset: 0x000000D8, Width: 32b; [0x080-0x1e7] Lookup table holds Flash command sequences
lookupTable_22: '0x00000000'
# ---------------------------------------===== lookupTable_23 [Optional] =====----------------------------------------
# Description: Offset: 0x000000DC, Width: 32b; [0x080-0x1e7] Lookup table holds Flash command sequences
lookupTable_23: '0x00000000'
# ---------------------------------------===== lookupTable_24 [Optional] =====----------------------------------------
# Description: Offset: 0x000000E0, Width: 32b; [0x080-0x1e7] Lookup table holds Flash command sequences
lookupTable_24: '0x00000000'
# ---------------------------------------===== lookupTable_25 [Optional] =====----------------------------------------
# Description: Offset: 0x000000E4, Width: 32b; [0x080-0x1e7] Lookup table holds Flash command sequences
lookupTable_25: '0x00000000'
# ---------------------------------------===== lookupTable_26 [Optional] =====----------------------------------------
# Description: Offset: 0x000000E8, Width: 32b; [0x080-0x1e7] Lookup table holds Flash command sequences
lookupTable_26: '0x00000000'
# ---------------------------------------===== lookupTable_27 [Optional] =====----------------------------------------
# Description: Offset: 0x000000EC, Width: 32b; [0x080-0x1e7] Lookup table holds Flash command sequences
lookupTable_27: '0x00000000'
# ---------------------------------------===== lookupTable_28 [Optional] =====----------------------------------------
# Description: Offset: 0x000000F0, Width: 32b; [0x080-0x1e7] Lookup table holds Flash command sequences
lookupTable_28: '0x00000000'
# ---------------------------------------===== lookupTable_29 [Optional] =====----------------------------------------
# Description: Offset: 0x000000F4, Width: 32b; [0x080-0x1e7] Lookup table holds Flash command sequences
lookupTable_29: '0x00000000'
# ---------------------------------------===== lookupTable_30 [Optional] =====----------------------------------------
# Description: Offset: 0x000000F8, Width: 32b; [0x080-0x1e7] Lookup table holds Flash command sequences
lookupTable_30: '0x00000000'
# ---------------------------------------===== lookupTable_31 [Optional] =====----------------------------------------
# Description: Offset: 0x000000FC, Width: 32b; [0x080-0x1e7] Lookup table holds Flash command sequences
lookupTable_31: '0x00000000'
# ---------------------------------------===== lookupTable_32 [Optional] =====----------------------------------------
# Description: Offset: 0x00000100, Width: 32b; [0x080-0x1e7] Lookup table holds Flash command sequences
lookupTable_32: '0x00000000'
# ---------------------------------------===== lookupTable_33 [Optional] =====----------------------------------------
# Description: Offset: 0x00000104, Width: 32b; [0x080-0x1e7] Lookup table holds Flash command sequences
lookupTable_33: '0x00000000'
# ---------------------------------------===== lookupTable_34 [Optional] =====----------------------------------------
# Description: Offset: 0x00000108, Width: 32b; [0x080-0x1e7] Lookup table holds Flash command sequences
lookupTable_34: '0x00000000'
# ---------------------------------------===== lookupTable_35 [Optional] =====----------------------------------------
# Description: Offset: 0x0000010C, Width: 32b; [0x080-0x1e7] Lookup table holds Flash command sequences
lookupTable_35: '0x00000000'
# ---------------------------------------===== lookupTable_36 [Optional] =====----------------------------------------
# Description: Offset: 0x00000110, Width: 32b; [0x080-0x1e7] Lookup table holds Flash command sequences
lookupTable_36: '0x00000000'
# ---------------------------------------===== lookupTable_37 [Optional] =====----------------------------------------
# Description: Offset: 0x00000114, Width: 32b; [0x080-0x1e7] Lookup table holds Flash command sequences
lookupTable_37: '0x00000000'
# ---------------------------------------===== lookupTable_38 [Optional] =====----------------------------------------
# Description: Offset: 0x00000118, Width: 32b; [0x080-0x1e7] Lookup table holds Flash command sequences
lookupTable_38: '0x00000000'
# ---------------------------------------===== lookupTable_39 [Optional] =====----------------------------------------
# Description: Offset: 0x0000011C, Width: 32b; [0x080-0x1e7] Lookup table holds Flash command sequences
lookupTable_39: '0x00000000'
# ---------------------------------------===== lookupTable_40 [Optional] =====----------------------------------------
# Description: Offset: 0x00000120, Width: 32b; [0x080-0x1e7] Lookup table holds Flash command sequences
lookupTable_40: '0x00000000'
# ---------------------------------------===== lookupTable_41 [Optional] =====----------------------------------------
# Description: Offset: 0x00000124, Width: 32b; [0x080-0x1e7] Lookup table holds Flash command sequences
lookupTable_41: '0x00000000'
# ---------------------------------------===== lookupTable_42 [Optional] =====----------------------------------------
# Description: Offset: 0x00000128, Width: 32b; [0x080-0x1e7] Lookup table holds Flash command sequences
lookupTable_42: '0x00000000'
# ---------------------------------------===== lookupTable_43 [Optional] =====----------------------------------------
# Description: Offset: 0x0000012C, Width: 32b; [0x080-0x1e7] Lookup table holds Flash command sequences
lookupTable_43: '0x00000000'
# ---------------------------------------===== lookupTable_44 [Optional] =====----------------------------------------
# Description: Offset: 0x00000130, Width: 32b; [0x080-0x1e7] Lookup table holds Flash command sequences
lookupTable_44: '0x00000000'
# ---------------------------------------===== lookupTable_45 [Optional] =====----------------------------------------
# Description: Offset: 0x00000134, Width: 32b; [0x080-0x1e7] Lookup table holds Flash command sequences
lookupTable_45: '0x00000000'
# ---------------------------------------===== lookupTable_46 [Optional] =====----------------------------------------
# Description: Offset: 0x00000138, Width: 32b; [0x080-0x1e7] Lookup table holds Flash command sequences
lookupTable_46: '0x00000000'
# ---------------------------------------===== lookupTable_47 [Optional] =====----------------------------------------
# Description: Offset: 0x0000013C, Width: 32b; [0x080-0x1e7] Lookup table holds Flash command sequences
lookupTable_47: '0x00000000'
# ---------------------------------------===== lookupTable_48 [Optional] =====----------------------------------------
# Description: Offset: 0x00000140, Width: 32b; [0x080-0x1e7] Lookup table holds Flash command sequences
lookupTable_48: '0x00000000'
# ---------------------------------------===== lookupTable_49 [Optional] =====----------------------------------------
# Description: Offset: 0x00000144, Width: 32b; [0x080-0x1e7] Lookup table holds Flash command sequences
lookupTable_49: '0x00000000'
# ---------------------------------------===== lookupTable_50 [Optional] =====----------------------------------------
# Description: Offset: 0x00000148, Width: 32b; [0x080-0x1e7] Lookup table holds Flash command sequences
lookupTable_50: '0x00000000'
# ---------------------------------------===== lookupTable_51 [Optional] =====----------------------------------------
# Description: Offset: 0x0000014C, Width: 32b; [0x080-0x1e7] Lookup table holds Flash command sequences
lookupTable_51: '0x00000000'
# ---------------------------------------===== lookupTable_52 [Optional] =====----------------------------------------
# Description: Offset: 0x00000150, Width: 32b; [0x080-0x1e7] Lookup table holds Flash command sequences
lookupTable_52: '0x00000000'
# ---------------------------------------===== lookupTable_53 [Optional] =====----------------------------------------
# Description: Offset: 0x00000154, Width: 32b; [0x080-0x1e7] Lookup table holds Flash command sequences
lookupTable_53: '0x00000000'
# ---------------------------------------===== lookupTable_54 [Optional] =====----------------------------------------
# Description: Offset: 0x00000158, Width: 32b; [0x080-0x1e7] Lookup table holds Flash command sequences
lookupTable_54: '0x00000000'
# ---------------------------------------===== lookupTable_55 [Optional] =====----------------------------------------
# Description: Offset: 0x0000015C, Width: 32b; [0x080-0x1e7] Lookup table holds Flash command sequences
lookupTable_55: '0x00000000'
# ---------------------------------------===== lookupTable_56 [Optional] =====----------------------------------------
# Description: Offset: 0x00000160, Width: 32b; [0x080-0x1e7] Lookup table holds Flash command sequences
lookupTable_56: '0x00000000'
# ---------------------------------------===== lookupTable_57 [Optional] =====----------------------------------------
# Description: Offset: 0x00000164, Width: 32b; [0x080-0x1e7] Lookup table holds Flash command sequences
lookupTable_57: '0x00000000'
# ---------------------------------------===== lookupTable_58 [Optional] =====----------------------------------------
# Description: Offset: 0x00000168, Width: 32b; [0x080-0x1e7] Lookup table holds Flash command sequences
lookupTable_58: '0x00000000'
# ---------------------------------------===== lookupTable_59 [Optional] =====----------------------------------------
# Description: Offset: 0x0000016C, Width: 32b; [0x080-0x1e7] Lookup table holds Flash command sequences
lookupTable_59: '0x00000000'
# ---------------------------------------===== lookupTable_60 [Optional] =====----------------------------------------
# Description: Offset: 0x00000170, Width: 32b; [0x080-0x1e7] Lookup table holds Flash command sequences
lookupTable_60: '0x00000000'
# ---------------------------------------===== lookupTable_61 [Optional] =====----------------------------------------
# Description: Offset: 0x00000174, Width: 32b; [0x080-0x1e7] Lookup table holds Flash command sequences
lookupTable_61: '0x00000000'
# ---------------------------------------===== lookupTable_62 [Optional] =====----------------------------------------
# Description: Offset: 0x00000178, Width: 32b; [0x080-0x1e7] Lookup table holds Flash command sequences
lookupTable_62: '0x00000000'
# ---------------------------------------===== lookupTable_63 [Optional] =====----------------------------------------
# Description: Offset: 0x0000017C, Width: 32b; [0x080-0x1e7] Lookup table holds Flash command sequences
lookupTable_63: '0x00000000'
# ---------------------------------------===== lookupTable_64 [Optional] =====----------------------------------------
# Description: Offset: 0x00000180, Width: 32b; [0x080-0x1e7] Lookup table holds Flash command sequences
lookupTable_64: '0x00000000'
# ---------------------------------------===== lookupTable_65 [Optional] =====----------------------------------------
# Description: Offset: 0x00000184, Width: 32b; [0x080-0x1e7] Lookup table holds Flash command sequences
lookupTable_65: '0x00000000'
# ---------------------------------------===== lookupTable_66 [Optional] =====----------------------------------------
# Description: Offset: 0x00000188, Width: 32b; [0x080-0x1e7] Lookup table holds Flash command sequences
lookupTable_66: '0x00000000'
# ---------------------------------------===== lookupTable_67 [Optional] =====----------------------------------------
# Description: Offset: 0x0000018C, Width: 32b; [0x080-0x1e7] Lookup table holds Flash command sequences
lookupTable_67: '0x00000000'
# ---------------------------------------===== lookupTable_68 [Optional] =====----------------------------------------
# Description: Offset: 0x00000190, Width: 32b; [0x080-0x1e7] Lookup table holds Flash command sequences
lookupTable_68: '0x00000000'
# ---------------------------------------===== lookupTable_69 [Optional] =====----------------------------------------
# Description: Offset: 0x00000194, Width: 32b; [0x080-0x1e7] Lookup table holds Flash command sequences
lookupTable_69: '0x00000000'
# ---------------------------------------===== lookupTable_70 [Optional] =====----------------------------------------
# Description: Offset: 0x00000198, Width: 32b; [0x080-0x1e7] Lookup table holds Flash command sequences
lookupTable_70: '0x00000000'
# ---------------------------------------===== lookupTable_71 [Optional] =====----------------------------------------
# Description: Offset: 0x0000019C, Width: 32b; [0x080-0x1e7] Lookup table holds Flash command sequences
lookupTable_71: '0x00000000'
# ---------------------------------------===== lookupTable_72 [Optional] =====----------------------------------------
# Description: Offset: 0x000001A0, Width: 32b; [0x080-0x1e7] Lookup table holds Flash command sequences
lookupTable_72: '0x00000000'
# ---------------------------------------===== lookupTable_73 [Optional] =====----------------------------------------
# Description: Offset: 0x000001A4, Width: 32b; [0x080-0x1e7] Lookup table holds Flash command sequences
lookupTable_73: '0x00000000'
# ---------------------------------------===== lookupTable_74 [Optional] =====----------------------------------------
# Description: Offset: 0x000001A8, Width: 32b; [0x080-0x1e7] Lookup table holds Flash command sequences
lookupTable_74: '0x00000000'
# ---------------------------------------===== lookupTable_75 [Optional] =====----------------------------------------
# Description: Offset: 0x000001AC, Width: 32b; [0x080-0x1e7] Lookup table holds Flash command sequences
lookupTable_75: '0x00000000'
# ---------------------------------------===== lookupTable_76 [Optional] =====----------------------------------------
# Description: Offset: 0x000001B0, Width: 32b; [0x080-0x1e7] Lookup table holds Flash command sequences
lookupTable_76: '0x00000000'
# ---------------------------------------===== lookupTable_77 [Optional] =====----------------------------------------
# Description: Offset: 0x000001B4, Width: 32b; [0x080-0x1e7] Lookup table holds Flash command sequences
lookupTable_77: '0x00000000'
# ---------------------------------------===== lookupTable_78 [Optional] =====----------------------------------------
# Description: Offset: 0x000001B8, Width: 32b; [0x080-0x1e7] Lookup table holds Flash command sequences
lookupTable_78: '0x00000000'
# ---------------------------------------===== lookupTable_79 [Optional] =====----------------------------------------
# Description: Offset: 0x000001BC, Width: 32b; [0x080-0x1e7] Lookup table holds Flash command sequences
lookupTable_79: '0x00000000'
# ---------------------------------------===== lookupTable_80 [Optional] =====----------------------------------------
# Description: Offset: 0x000001C0, Width: 32b; [0x080-0x1e7] Lookup table holds Flash command sequences
lookupTable_80: '0x00000000'
# ---------------------------------------===== lookupTable_81 [Optional] =====----------------------------------------
# Description: Offset: 0x000001C4, Width: 32b; [0x080-0x1e7] Lookup table holds Flash command sequences
lookupTable_81: '0x00000000'
# ---------------------------------------===== lookupTable_82 [Optional] =====----------------------------------------
# Description: Offset: 0x000001C8, Width: 32b; [0x080-0x1e7] Lookup table holds Flash command sequences
lookupTable_82: '0x00000000'
# ---------------------------------------===== lookupTable_83 [Optional] =====----------------------------------------
# Description: Offset: 0x000001CC, Width: 32b; [0x080-0x1e7] Lookup table holds Flash command sequences
lookupTable_83: '0x00000000'
# ---------------------------------------===== lookupTable_84 [Optional] =====----------------------------------------
# Description: Offset: 0x000001D0, Width: 32b; [0x080-0x1e7] Lookup table holds Flash command sequences
lookupTable_84: '0x00000000'
# ---------------------------------------===== lookupTable_85 [Optional] =====----------------------------------------
# Description: Offset: 0x000001D4, Width: 32b; [0x080-0x1e7] Lookup table holds Flash command sequences
lookupTable_85: '0x00000000'
# ---------------------------------------===== lookupTable_86 [Optional] =====----------------------------------------
# Description: Offset: 0x000001D8, Width: 32b; [0x080-0x1e7] Lookup table holds Flash command sequences
lookupTable_86: '0x00000000'
# ---------------------------------------===== lookupTable_87 [Optional] =====----------------------------------------
# Description: Offset: 0x000001DC, Width: 32b; [0x080-0x1e7] Lookup table holds Flash command sequences
lookupTable_87: '0x00000000'
# ---------------------------------------===== lookupTable_88 [Optional] =====----------------------------------------
# Description: Offset: 0x000001E0, Width: 32b; [0x080-0x1e7] Lookup table holds Flash command sequences
lookupTable_88: '0x00000000'
# ---------------------------------------===== lookupTable_89 [Optional] =====----------------------------------------
# Description: Offset: 0x000001E4, Width: 32b; [0x080-0x1e7] Lookup table holds Flash command sequences
lookupTable_89: '0x00000000'
# ---------------------------------------===== lutCustomSeq_0 [Optional] =====----------------------------------------
# Description: Offset: 0x000001E8, Width: 32b; [0x1e8-0x217] Customizable LUT Sequences
lutCustomSeq_0:
# ------------------------------------------===== seqNum [Optional] =====-------------------------------------------
# Description: Offset: 0b, Width: 8b, Sequence Number, valid number: 1-16
seqNum: 0
# -------------------------------------------===== seqId [Optional] =====-------------------------------------------
# Description: Offset: 8b, Width: 8b, Sequence Index, valid number: 0-15
seqId: 0
# -----------------------------------------===== reserved [Optional] =====------------------------------------------
# Description: Offset: 16b, Width: 16b, N/A
reserved: 0
# ---------------------------------------===== lutCustomSeq_1 [Optional] =====----------------------------------------
# Description: Offset: 0x000001EC, Width: 32b; [0x1e8-0x217] Customizable LUT Sequences
lutCustomSeq_1:
# ------------------------------------------===== seqNum [Optional] =====-------------------------------------------
# Description: Offset: 0b, Width: 8b, Sequence Number, valid number: 1-16
seqNum: 0
# -------------------------------------------===== seqId [Optional] =====-------------------------------------------
# Description: Offset: 8b, Width: 8b, Sequence Index, valid number: 0-15
seqId: 0
# -----------------------------------------===== reserved [Optional] =====------------------------------------------
# Description: Offset: 16b, Width: 16b, N/A
reserved: 0
# ---------------------------------------===== lutCustomSeq_2 [Optional] =====----------------------------------------
# Description: Offset: 0x000001F0, Width: 32b; [0x1e8-0x217] Customizable LUT Sequences
lutCustomSeq_2:
# ------------------------------------------===== seqNum [Optional] =====-------------------------------------------
# Description: Offset: 0b, Width: 8b, Sequence Number, valid number: 1-16
seqNum: 0
# -------------------------------------------===== seqId [Optional] =====-------------------------------------------
# Description: Offset: 8b, Width: 8b, Sequence Index, valid number: 0-15
seqId: 0
# -----------------------------------------===== reserved [Optional] =====------------------------------------------
# Description: Offset: 16b, Width: 16b, N/A
reserved: 0
# ---------------------------------------===== lutCustomSeq_3 [Optional] =====----------------------------------------
# Description: Offset: 0x000001F4, Width: 32b; [0x1e8-0x217] Customizable LUT Sequences
lutCustomSeq_3:
# ------------------------------------------===== seqNum [Optional] =====-------------------------------------------
# Description: Offset: 0b, Width: 8b, Sequence Number, valid number: 1-16
seqNum: 0
# -------------------------------------------===== seqId [Optional] =====-------------------------------------------
# Description: Offset: 8b, Width: 8b, Sequence Index, valid number: 0-15
seqId: 0
# -----------------------------------------===== reserved [Optional] =====------------------------------------------
# Description: Offset: 16b, Width: 16b, N/A
reserved: 0
# ---------------------------------------===== lutCustomSeq_4 [Optional] =====----------------------------------------
# Description: Offset: 0x000001F8, Width: 32b; [0x1e8-0x217] Customizable LUT Sequences
lutCustomSeq_4:
# ------------------------------------------===== seqNum [Optional] =====-------------------------------------------
# Description: Offset: 0b, Width: 8b, Sequence Number, valid number: 1-16
seqNum: 0
# -------------------------------------------===== seqId [Optional] =====-------------------------------------------
# Description: Offset: 8b, Width: 8b, Sequence Index, valid number: 0-15
seqId: 0
# -----------------------------------------===== reserved [Optional] =====------------------------------------------
# Description: Offset: 16b, Width: 16b, N/A
reserved: 0
# ---------------------------------------===== lutCustomSeq_5 [Optional] =====----------------------------------------
# Description: Offset: 0x000001FC, Width: 32b; [0x1e8-0x217] Customizable LUT Sequences
lutCustomSeq_5:
# ------------------------------------------===== seqNum [Optional] =====-------------------------------------------
# Description: Offset: 0b, Width: 8b, Sequence Number, valid number: 1-16
seqNum: 0
# -------------------------------------------===== seqId [Optional] =====-------------------------------------------
# Description: Offset: 8b, Width: 8b, Sequence Index, valid number: 0-15
seqId: 0
# -----------------------------------------===== reserved [Optional] =====------------------------------------------
# Description: Offset: 16b, Width: 16b, N/A
reserved: 0
# ---------------------------------------===== lutCustomSeq_6 [Optional] =====----------------------------------------
# Description: Offset: 0x00000200, Width: 32b; [0x1e8-0x217] Customizable LUT Sequences
lutCustomSeq_6:
# ------------------------------------------===== seqNum [Optional] =====-------------------------------------------
# Description: Offset: 0b, Width: 8b, Sequence Number, valid number: 1-16
seqNum: 0
# -------------------------------------------===== seqId [Optional] =====-------------------------------------------
# Description: Offset: 8b, Width: 8b, Sequence Index, valid number: 0-15
seqId: 0
# -----------------------------------------===== reserved [Optional] =====------------------------------------------
# Description: Offset: 16b, Width: 16b, N/A
reserved: 0
# ---------------------------------------===== lutCustomSeq_7 [Optional] =====----------------------------------------
# Description: Offset: 0x00000204, Width: 32b; [0x1e8-0x217] Customizable LUT Sequences
lutCustomSeq_7:
# ------------------------------------------===== seqNum [Optional] =====-------------------------------------------
# Description: Offset: 0b, Width: 8b, Sequence Number, valid number: 1-16
seqNum: 0
# -------------------------------------------===== seqId [Optional] =====-------------------------------------------
# Description: Offset: 8b, Width: 8b, Sequence Index, valid number: 0-15
seqId: 0
# -----------------------------------------===== reserved [Optional] =====------------------------------------------
# Description: Offset: 16b, Width: 16b, N/A
reserved: 0
# ---------------------------------------===== lutCustomSeq_8 [Optional] =====----------------------------------------
# Description: Offset: 0x00000208, Width: 32b; [0x1e8-0x217] Customizable LUT Sequences
lutCustomSeq_8:
# ------------------------------------------===== seqNum [Optional] =====-------------------------------------------
# Description: Offset: 0b, Width: 8b, Sequence Number, valid number: 1-16
seqNum: 0
# -------------------------------------------===== seqId [Optional] =====-------------------------------------------
# Description: Offset: 8b, Width: 8b, Sequence Index, valid number: 0-15
seqId: 0
# -----------------------------------------===== reserved [Optional] =====------------------------------------------
# Description: Offset: 16b, Width: 16b, N/A
reserved: 0
# ---------------------------------------===== lutCustomSeq_9 [Optional] =====----------------------------------------
# Description: Offset: 0x0000020C, Width: 32b; [0x1e8-0x217] Customizable LUT Sequences
lutCustomSeq_9:
# ------------------------------------------===== seqNum [Optional] =====-------------------------------------------
# Description: Offset: 0b, Width: 8b, Sequence Number, valid number: 1-16
seqNum: 0
# -------------------------------------------===== seqId [Optional] =====-------------------------------------------
# Description: Offset: 8b, Width: 8b, Sequence Index, valid number: 0-15
seqId: 0
# -----------------------------------------===== reserved [Optional] =====------------------------------------------
# Description: Offset: 16b, Width: 16b, N/A
reserved: 0
# ---------------------------------------===== lutCustomSeq_10 [Optional] =====---------------------------------------
# Description: Offset: 0x00000210, Width: 32b; [0x1e8-0x217] Customizable LUT Sequences
lutCustomSeq_10:
# ------------------------------------------===== seqNum [Optional] =====-------------------------------------------
# Description: Offset: 0b, Width: 8b, Sequence Number, valid number: 1-16
seqNum: 0
# -------------------------------------------===== seqId [Optional] =====-------------------------------------------
# Description: Offset: 8b, Width: 8b, Sequence Index, valid number: 0-15
seqId: 0
# -----------------------------------------===== reserved [Optional] =====------------------------------------------
# Description: Offset: 16b, Width: 16b, N/A
reserved: 0
# ---------------------------------------===== lutCustomSeq_11 [Optional] =====---------------------------------------
# Description: Offset: 0x00000214, Width: 32b; [0x1e8-0x217] Customizable LUT Sequences
lutCustomSeq_11:
# ------------------------------------------===== seqNum [Optional] =====-------------------------------------------
# Description: Offset: 0b, Width: 8b, Sequence Number, valid number: 1-16
seqNum: 0
# -------------------------------------------===== seqId [Optional] =====-------------------------------------------
# Description: Offset: 8b, Width: 8b, Sequence Index, valid number: 0-15
seqId: 0
# -----------------------------------------===== reserved [Optional] =====------------------------------------------
# Description: Offset: 16b, Width: 16b, N/A
reserved: 0
# ----------------------------------------===== dllCraSdrVal [Optional] =====-----------------------------------------
# Description: Offset: 0x00000218, Width: 32b; [0x218-0x21b] Customizable DLLCRA for SDR setting
dllCraSdrVal: '0x00000000'
# -----------------------------------------===== smprSdrVal [Optional] =====------------------------------------------
# Description: Offset: 0x0000021C, Width: 32b; [0x21c-0x21f] Customizable SMPR SDR setting
smprSdrVal: '0x00000000'
# ----------------------------------------===== dllCraDdrVal [Optional] =====-----------------------------------------
# Description: Offset: 0x00000220, Width: 32b; [0x220-0x223] Customizable DLLCRA for DDR setting
dllCraDdrVal: '0x00000000'
# -----------------------------------------===== smprDdrVal [Optional] =====------------------------------------------
# Description: Offset: 0x00000224, Width: 32b; [0x224-0x227] Customizable SMPR DDR setting
smprDdrVal: '0x00000000'
# ------------------------------------------===== pageSize [Optional] =====-------------------------------------------
# Description: Offset: 0x00000228, Width: 32b; [0x228-0x22b] Page size of Serial NOR
pageSize: '0x00000000'
# -----------------------------------------===== sectorSize [Optional] =====------------------------------------------
# Description: Offset: 0x0000022C, Width: 32b; [0x22c-0x22f] Sector size of Serial NOR
sectorSize: '0x00000000'
# -------------------------------------===== ipcmdSerialClkFreq [Optional] =====--------------------------------------
# Description: Offset: 0x00000230, Width: 8b; [0x230-0x230] Clock frequency for IP command
ipcmdSerialClkFreq: '0x00'
# -------------------------------------===== isUniformBlockSize [Optional] =====--------------------------------------
# Description: Offset: 0x00000231, Width: 8b; [0x231-0x231] Sector/Block size is the same
isUniformBlockSize: '0x00'
# -------------------------------------===== isDataOrderSwapped [Optional] =====--------------------------------------
# Description: Offset: 0x00000232, Width: 8b; [0x232-0x232] Data order (D0, D1, D2, D3) is swapped (D1,D0, D3, D2)
isDataOrderSwapped: '0x00'
# ------------------------------------------===== reserved4 [Optional] =====------------------------------------------
# Description: Offset: 0x00000233, Width: 8b; [0x233-0x233] Reserved for future use
reserved4: '0x00'
# ----------------------------------------===== serialNorType [Optional] =====----------------------------------------
# Description: Offset: 0x00000234, Width: 8b; [0x234-0x234] Serial NOR Flash type: 0/1/2/3
serialNorType: '0x00'
# --------------------------------------===== needExitNoCmdMode [Optional] =====--------------------------------------
# Description: Offset: 0x00000235, Width: 8b; [0x235-0x235] Need to exit NoCmd mode before other IP command
needExitNoCmdMode: '0x00'
# ------------------------------------===== halfClkForNonReadCmd [Optional] =====-------------------------------------
# Description: Offset: 0x00000236, Width: 8b; [0x236-0x236] Half the Serial Clock for non-read command: true/false
halfClkForNonReadCmd: '0x00'
# ------------------------------------===== needRestoreNoCmdMode [Optional] =====-------------------------------------
# Description: Offset: 0x00000237, Width: 8b; [0x237-0x237] Need to Restore NoCmd mode after IP command execution
needRestoreNoCmdMode: '0x00'
# ------------------------------------------===== blockSize [Optional] =====------------------------------------------
# Description: Offset: 0x00000238, Width: 32b; [0x238-0x23b] Block size
blockSize: '0x00000000'
# ----------------------------------------===== flashStateCtx [Optional] =====----------------------------------------
# Description: Offset: 0x0000023C, Width: 32b; [0x23c-0x23f] Flash State Context
flashStateCtx: '0x00000000'
# -----------------------------------------===== reserved4_0 [Optional] =====-----------------------------------------
# Description: Offset: 0x00000240, Width: 32b; [0x240-0x243] Flash State Context
reserved4_0: '0x00000000'
# -----------------------------------------===== reserved4_1 [Optional] =====-----------------------------------------
# Description: Offset: 0x00000244, Width: 32b; [0x244-0x247] Flash State Context
reserved4_1: '0x00000000'
# -----------------------------------------===== reserved4_2 [Optional] =====-----------------------------------------
# Description: Offset: 0x00000248, Width: 32b; [0x248-0x24b] Flash State Context
reserved4_2: '0x00000000'
# -----------------------------------------===== reserved4_3 [Optional] =====-----------------------------------------
# Description: Offset: 0x0000024C, Width: 32b; [0x24c-0x24f] Flash State Context
reserved4_3: '0x00000000'
# -----------------------------------------===== reserved4_4 [Optional] =====-----------------------------------------
# Description: Offset: 0x00000250, Width: 32b; [0x250-0x253] Flash State Context
reserved4_4: '0x00000000'
# -----------------------------------------===== reserved4_5 [Optional] =====-----------------------------------------
# Description: Offset: 0x00000254, Width: 32b; [0x254-0x257] Flash State Context
reserved4_5: '0x00000000'
# -----------------------------------------===== reserved4_6 [Optional] =====-----------------------------------------
# Description: Offset: 0x00000258, Width: 32b; [0x258-0x25b] Flash State Context
reserved4_6: '0x00000000'
# -----------------------------------------===== reserved4_7 [Optional] =====-----------------------------------------
# Description: Offset: 0x0000025C, Width: 32b; [0x25c-0x25f] Flash State Context
reserved4_7: '0x00000000'
# -----------------------------------------===== reserved4_8 [Optional] =====-----------------------------------------
# Description: Offset: 0x00000260, Width: 32b; [0x260-0x263] Flash State Context
reserved4_8: '0x00000000'
# -----------------------------------------===== reserved4_9 [Optional] =====-----------------------------------------
# Description: Offset: 0x00000264, Width: 32b; [0x264-0x267] Flash State Context
reserved4_9: '0x00000000'
# ----------------------------------------===== reserved4_10 [Optional] =====-----------------------------------------
# Description: Offset: 0x00000268, Width: 32b; [0x268-0x26b] Flash State Context
reserved4_10: '0x00000000'
# ----------------------------------------===== reserved4_11 [Optional] =====-----------------------------------------
# Description: Offset: 0x0000026C, Width: 32b; [0x26c-0x26f] Flash State Context
reserved4_11: '0x00000000'
# ----------------------------------------===== reserved4_12 [Optional] =====-----------------------------------------
# Description: Offset: 0x00000270, Width: 32b; [0x270-0x273] Flash State Context
reserved4_12: '0x00000000'
# ----------------------------------------===== reserved4_13 [Optional] =====-----------------------------------------
# Description: Offset: 0x00000274, Width: 32b; [0x274-0x277] Flash State Context
reserved4_13: '0x00000000'
# ----------------------------------------===== reserved4_14 [Optional] =====-----------------------------------------
# Description: Offset: 0x00000278, Width: 32b; [0x278-0x27b] Flash State Context
reserved4_14: '0x00000000'
# ----------------------------------------===== reserved4_15 [Optional] =====-----------------------------------------
# Description: Offset: 0x0000027C, Width: 32b; [0x27c-0x27f] Flash State Context
reserved4_15: '0x00000000'
# ----------------------------------------===== reserved4_16 [Optional] =====-----------------------------------------
# Description: Offset: 0x00000280, Width: 32b; [0x280-0x283] Flash State Context
reserved4_16: '0x00000000'
# ----------------------------------------===== reserved4_17 [Optional] =====-----------------------------------------
# Description: Offset: 0x00000284, Width: 32b; [0x284-0x287] Flash State Context
reserved4_17: '0x00000000'
# ----------------------------------------===== reserved4_18 [Optional] =====-----------------------------------------
# Description: Offset: 0x00000288, Width: 32b; [0x288-0x28b] Flash State Context
reserved4_18: '0x00000000'
# ----------------------------------------===== reserved4_19 [Optional] =====-----------------------------------------
# Description: Offset: 0x0000028C, Width: 32b; [0x28c-0x28f] Flash State Context
reserved4_19: '0x00000000'
# ----------------------------------------===== reserved4_20 [Optional] =====-----------------------------------------
# Description: Offset: 0x00000290, Width: 32b; [0x290-0x293] Flash State Context
reserved4_20: '0x00000000'
# ----------------------------------------===== reserved4_21 [Optional] =====-----------------------------------------
# Description: Offset: 0x00000294, Width: 32b; [0x294-0x297] Flash State Context
reserved4_21: '0x00000000'
# ----------------------------------------===== reserved4_22 [Optional] =====-----------------------------------------
# Description: Offset: 0x00000298, Width: 32b; [0x298-0x29b] Flash State Context
reserved4_22: '0x00000000'
# ----------------------------------------===== reserved4_23 [Optional] =====-----------------------------------------
# Description: Offset: 0x0000029C, Width: 32b; [0x29c-0x29f] Flash State Context
reserved4_23: '0x00000000'
# ----------------------------------------===== reserved4_24 [Optional] =====-----------------------------------------
# Description: Offset: 0x000002A0, Width: 32b; [0x2a0-0x2a3] Flash State Context
reserved4_24: '0x00000000'
# ----------------------------------------===== reserved4_25 [Optional] =====-----------------------------------------
# Description: Offset: 0x000002A4, Width: 32b; [0x2a4-0x2a7] Flash State Context
reserved4_25: '0x00000000'
# ----------------------------------------===== reserved4_26 [Optional] =====-----------------------------------------
# Description: Offset: 0x000002A8, Width: 32b; [0x2a8-0x2ab] Flash State Context
reserved4_26: '0x00000000'
# ----------------------------------------===== reserved4_27 [Optional] =====-----------------------------------------
# Description: Offset: 0x000002AC, Width: 32b; [0x2ac-0x2af] Flash State Context
reserved4_27: '0x00000000'
# ----------------------------------------===== reserved4_28 [Optional] =====-----------------------------------------
# Description: Offset: 0x000002B0, Width: 32b; [0x2b0-0x2b3] Flash State Context
reserved4_28: '0x00000000'
# ----------------------------------------===== reserved4_29 [Optional] =====-----------------------------------------
# Description: Offset: 0x000002B4, Width: 32b; [0x2b4-0x2b7] Flash State Context
reserved4_29: '0x00000000'
# ----------------------------------------===== reserved4_30 [Optional] =====-----------------------------------------
# Description: Offset: 0x000002B8, Width: 32b; [0x2b8-0x2bb] Flash State Context
reserved4_30: '0x00000000'
# ----------------------------------------===== reserved4_31 [Optional] =====-----------------------------------------
# Description: Offset: 0x000002BC, Width: 32b; [0x2bc-0x2bf] Flash State Context
reserved4_31: '0x00000000'
# ----------------------------------------===== reserved4_32 [Optional] =====-----------------------------------------
# Description: Offset: 0x000002C0, Width: 32b; [0x2c0-0x2c3] Flash State Context
reserved4_32: '0x00000000'
# ----------------------------------------===== reserved4_33 [Optional] =====-----------------------------------------
# Description: Offset: 0x000002C4, Width: 32b; [0x2c4-0x2c7] Flash State Context
reserved4_33: '0x00000000'
# ----------------------------------------===== reserved4_34 [Optional] =====-----------------------------------------
# Description: Offset: 0x000002C8, Width: 32b; [0x2c8-0x2cb] Flash State Context
reserved4_34: '0x00000000'
# ----------------------------------------===== reserved4_35 [Optional] =====-----------------------------------------
# Description: Offset: 0x000002CC, Width: 32b; [0x2cc-0x2cf] Flash State Context
reserved4_35: '0x00000000'
# ----------------------------------------===== reserved4_36 [Optional] =====-----------------------------------------
# Description: Offset: 0x000002D0, Width: 32b; [0x2d0-0x2d3] Flash State Context
reserved4_36: '0x00000000'
# ----------------------------------------===== reserved4_37 [Optional] =====-----------------------------------------
# Description: Offset: 0x000002D4, Width: 32b; [0x2d4-0x2d7] Flash State Context
reserved4_37: '0x00000000'
# ----------------------------------------===== reserved4_38 [Optional] =====-----------------------------------------
# Description: Offset: 0x000002D8, Width: 32b; [0x2d8-0x2db] Flash State Context
reserved4_38: '0x00000000'
# ----------------------------------------===== reserved4_39 [Optional] =====-----------------------------------------
# Description: Offset: 0x000002DC, Width: 32b; [0x2dc-0x2df] Flash State Context
reserved4_39: '0x00000000'
# ----------------------------------------===== reserved4_40 [Optional] =====-----------------------------------------
# Description: Offset: 0x000002E0, Width: 32b; [0x2e0-0x2e3] Flash State Context
reserved4_40: '0x00000000'
# ----------------------------------------===== reserved4_41 [Optional] =====-----------------------------------------
# Description: Offset: 0x000002E4, Width: 32b; [0x2e4-0x2e7] Flash State Context
reserved4_41: '0x00000000'
# ----------------------------------------===== reserved4_42 [Optional] =====-----------------------------------------
# Description: Offset: 0x000002E8, Width: 32b; [0x2e8-0x2eb] Flash State Context
reserved4_42: '0x00000000'
# ----------------------------------------===== reserved4_43 [Optional] =====-----------------------------------------
# Description: Offset: 0x000002EC, Width: 32b; [0x2ec-0x2ef] Flash State Context
reserved4_43: '0x00000000'
# ----------------------------------------===== reserved4_44 [Optional] =====-----------------------------------------
# Description: Offset: 0x000002F0, Width: 32b; [0x2f0-0x2f3] Flash State Context
reserved4_44: '0x00000000'
# ----------------------------------------===== reserved4_45 [Optional] =====-----------------------------------------
# Description: Offset: 0x000002F4, Width: 32b; [0x2f4-0x2f7] Flash State Context
reserved4_45: '0x00000000'
# ----------------------------------------===== reserved4_46 [Optional] =====-----------------------------------------
# Description: Offset: 0x000002F8, Width: 32b; [0x2f8-0x2fb] Flash State Context
reserved4_46: '0x00000000'
# ----------------------------------------===== reserved4_47 [Optional] =====-----------------------------------------
# Description: Offset: 0x000002FC, Width: 32b; [0x2fc-0x2ff] Flash State Context
reserved4_47: '0x00000000'
FCB for rw610, Revision: a2 and flexspi_nor#
FCB for rw610, Revision: a2 and flexspi_nor JSON schema
FCB for rw610, Revision: a2 and flexspi_nor YAML configuration template
# =================================== FCB for rw610, Revision: a2 and flexspi_nor ====================================
# ======================================================================================================================
# == FCB for rw610, Revision: a2 and flexspi_nor ==
# ======================================================================================================================
# -------------------------------------===== The chip family name [Required] =====--------------------------------------
# Description: NXP chip family identifier.
family: CHOOSE_FROM_TABLE
# -----------------------------------------===== MCU revision [Optional] =====------------------------------------------
# Description: Revision of silicon. The 'latest' name, means most current revision.
# Possible options: <a1, a2, latest>
revision: a2
# ------------------------------------------===== Memory type [Required] =====------------------------------------------
# Description: Specify type of memory used by FCB description.
# Possible options: <flexspi_nor>
type: flexspi_nor
# ---------------------------------------------===== rw610 [Required] =====---------------------------------------------
fcb_settings:
# ---------------------------------------------===== tag [Optional] =====---------------------------------------------
# Description: Offset: 0x00000000, Width: 32b; [0x000-0x003] Tag, fixed value 0x42464346UL
tag: '0x42464346'
# -------------------------------------------===== version [Optional] =====-------------------------------------------
# Description: Offset: 0x00000004, Width: 32b; [0x004-0x007] Version,[31:24] -'V', [23:16] - Major, [15:8] - Minor,
# [7:0] - bugfix
version: '0x56010400'
# ------------------------------------------===== reserved0 [Optional] =====------------------------------------------
# Description: Offset: 0x00000008, Width: 32b; [0x008-0x00b] Reserved for future use
reserved0: '0x00000000'
# --------------------------------------===== readSampleClkSrc [Optional] =====---------------------------------------
# Description: Offset: 0x0000000C, Width: 8b; [0x00c-0x00c] Read Sample Clock Source, valid value: 0/1/3
readSampleClkSrc: '0x00'
# -----------------------------------------===== csHoldTime [Optional] =====------------------------------------------
# Description: Offset: 0x0000000D, Width: 8b; [0x00d-0x00d] CS hold time, default value: 3
csHoldTime: '0x00'
# -----------------------------------------===== csSetupTime [Optional] =====-----------------------------------------
# Description: Offset: 0x0000000E, Width: 8b; [0x00e-0x00e] CS setup time, default value: 3
csSetupTime: '0x00'
# -------------------------------------===== columnAddressWidth [Optional] =====--------------------------------------
# Description: Offset: 0x0000000F, Width: 8b; [0x00f-0x00f] Column Address with, for HyperBus protocol, it is fixed
# to 3, For Serial NAND, need to refer to datasheet
columnAddressWidth: '0x00'
# -------------------------------------===== deviceModeCfgEnable [Optional] =====-------------------------------------
# Description: Offset: 0x00000010, Width: 8b; [0x010-0x010] Device Mode Configure enable flag, 1 - Enable, 0 -
# Disable
deviceModeCfgEnable: '0x00'
# ---------------------------------------===== deviceModeType [Optional] =====----------------------------------------
# Description: Offset: 0x00000011, Width: 8b; [0x011-0x011] Specify the configuration command type:Quad Enable,
# DPI/QPI/OPI switch, Generic configuration, etc.
deviceModeType: '0x00'
# -------------------------------------===== waitTimeCfgCommands [Optional] =====-------------------------------------
# Description: Offset: 0x00000012, Width: 16b; [0x012-0x013] Wait time for all configuration commands, unit: 100us,
# Used for DPI/QPI/OPI switch or reset command
waitTimeCfgCommands: '0x0000'
# ----------------------------------------===== deviceModeSeq [Optional] =====----------------------------------------
# Description: Offset: 0x00000014, Width: 32b; [0x014-0x017] Device mode sequence info, [7:0] - LUT sequence id,
# [15:8] - LUt sequence number, [31:16] Reserved
deviceModeSeq:
# ------------------------------------------===== seqNum [Optional] =====-------------------------------------------
# Description: Offset: 0b, Width: 8b, Sequence Number, valid number: 1-16
seqNum: 0
# -------------------------------------------===== seqId [Optional] =====-------------------------------------------
# Description: Offset: 8b, Width: 8b, Sequence Index, valid number: 0-15
seqId: 0
# -----------------------------------------===== reserved [Optional] =====------------------------------------------
# Description: Offset: 16b, Width: 16b, Reserved
reserved: 0
# ----------------------------------------===== deviceModeArg [Optional] =====----------------------------------------
# Description: Offset: 0x00000018, Width: 32b; [0x018-0x01b] Argument/Parameter for device configuration
deviceModeArg: '0x00000000'
# ---------------------------------------===== configCmdEnable [Optional] =====---------------------------------------
# Description: Offset: 0x0000001C, Width: 8b; [0x01c-0x01c] Configure command Enable Flag, 1 - Enable, 0 - Disable
configCmdEnable: '0x00'
# --------------------------------------===== configModeType_0 [Optional] =====---------------------------------------
# Description: Offset: 0x0000001D, Width: 8b; [0x01d-0x01f] Configure Mode Type, similar as deviceModeTpe
configModeType_0: '0x00'
# --------------------------------------===== configModeType_1 [Optional] =====---------------------------------------
# Description: Offset: 0x0000001E, Width: 8b; [0x01d-0x01f] Configure Mode Type, similar as deviceModeTpe
configModeType_1: '0x00'
# --------------------------------------===== configModeType_2 [Optional] =====---------------------------------------
# Description: Offset: 0x0000001F, Width: 8b; [0x01d-0x01f] Configure Mode Type, similar as deviceModeTpe
configModeType_2: '0x00'
# ---------------------------------------===== configCmdSeqs_0 [Optional] =====---------------------------------------
# Description: Offset: 0x00000020, Width: 32b; [0x020-0x02b] Sequence info for Device Configuration command, similar
# as deviceModeSeq
configCmdSeqs_0:
# ------------------------------------------===== seqNum [Optional] =====-------------------------------------------
# Description: Offset: 0b, Width: 8b, Sequence Number, valid number: 1-16
seqNum: 0
# -------------------------------------------===== seqId [Optional] =====-------------------------------------------
# Description: Offset: 8b, Width: 8b, Sequence Index, valid number: 0-15
seqId: 0
# -----------------------------------------===== reserved [Optional] =====------------------------------------------
# Description: Offset: 16b, Width: 16b, Reserved
reserved: 0
# ---------------------------------------===== configCmdSeqs_1 [Optional] =====---------------------------------------
# Description: Offset: 0x00000024, Width: 32b; [0x020-0x02b] Sequence info for Device Configuration command, similar
# as deviceModeSeq
configCmdSeqs_1:
# ------------------------------------------===== seqNum [Optional] =====-------------------------------------------
# Description: Offset: 0b, Width: 8b, Sequence Number, valid number: 1-16
seqNum: 0
# -------------------------------------------===== seqId [Optional] =====-------------------------------------------
# Description: Offset: 8b, Width: 8b, Sequence Index, valid number: 0-15
seqId: 0
# -----------------------------------------===== reserved [Optional] =====------------------------------------------
# Description: Offset: 16b, Width: 16b, Reserved
reserved: 0
# ---------------------------------------===== configCmdSeqs_2 [Optional] =====---------------------------------------
# Description: Offset: 0x00000028, Width: 32b; [0x020-0x02b] Sequence info for Device Configuration command, similar
# as deviceModeSeq
configCmdSeqs_2:
# ------------------------------------------===== seqNum [Optional] =====-------------------------------------------
# Description: Offset: 0b, Width: 8b, Sequence Number, valid number: 1-16
seqNum: 0
# -------------------------------------------===== seqId [Optional] =====-------------------------------------------
# Description: Offset: 8b, Width: 8b, Sequence Index, valid number: 0-15
seqId: 0
# -----------------------------------------===== reserved [Optional] =====------------------------------------------
# Description: Offset: 16b, Width: 16b, Reserved
reserved: 0
# ------------------------------------------===== reserved1 [Optional] =====------------------------------------------
# Description: Offset: 0x0000002C, Width: 32b; [0x02c-0x02f] Reserved for future use
reserved1: '0x00000000'
# ---------------------------------------===== configCmdArgs_0 [Optional] =====---------------------------------------
# Description: Offset: 0x00000030, Width: 32b; [0x030-0x03b] Arguments/Parameters for device Configuration commands
configCmdArgs_0: '0x00000000'
# ---------------------------------------===== configCmdArgs_1 [Optional] =====---------------------------------------
# Description: Offset: 0x00000034, Width: 32b; [0x030-0x03b] Arguments/Parameters for device Configuration commands
configCmdArgs_1: '0x00000000'
# ---------------------------------------===== configCmdArgs_2 [Optional] =====---------------------------------------
# Description: Offset: 0x00000038, Width: 32b; [0x030-0x03b] Arguments/Parameters for device Configuration commands
configCmdArgs_2: '0x00000000'
# ------------------------------------------===== reserved2 [Optional] =====------------------------------------------
# Description: Offset: 0x0000003C, Width: 32b; [0x03c-0x03f] Reserved for future use
reserved2: '0x00000000'
# ------------------------------------===== controllerMiscOption [Optional] =====-------------------------------------
# Description: Offset: 0x00000040, Width: 32b; [0x040-0x043] Controller Misc Options, see Misc feature bit
# definitions for more details
controllerMiscOption: '0x00000000'
# -----------------------------------------===== deviceType [Optional] =====------------------------------------------
# Description: Offset: 0x00000044, Width: 8b; [0x044-0x044] Device Type: See Flash Type Definition for more details
deviceType: '0x00'
# ----------------------------------------===== sflashPadType [Optional] =====----------------------------------------
# Description: Offset: 0x00000045, Width: 8b; [0x045-0x045] Serial Flash Pad Type: 1 - Single, 2 - Dual, 4 - Quad, 8
# - Octal
sflashPadType: '0x00'
# ----------------------------------------===== serialClkFreq [Optional] =====----------------------------------------
# Description: Offset: 0x00000046, Width: 8b; [0x046-0x046] Serial Flash Frequency, device specific definitions, See
# System Boot Chapter for more details
serialClkFreq: '0x00'
# -------------------------------------===== lutCustomSeqEnable [Optional] =====--------------------------------------
# Description: Offset: 0x00000047, Width: 8b; [0x047-0x047] LUT customization Enable, it is required if the
# program/erase cannot be done using 1 LUT sequence, currently, only applicable to HyperFLASH
lutCustomSeqEnable: '0x00'
# -----------------------------------------===== reserved3_0 [Optional] =====-----------------------------------------
# Description: Offset: 0x00000048, Width: 32b; [0x048-0x04f] Reserved for future use
reserved3_0: '0x00000000'
# -----------------------------------------===== reserved3_1 [Optional] =====-----------------------------------------
# Description: Offset: 0x0000004C, Width: 32b; [0x048-0x04f] Reserved for future use
reserved3_1: '0x00000000'
# ----------------------------------------===== sflashA1Size [Optional] =====-----------------------------------------
# Description: Offset: 0x00000050, Width: 32b; [0x050-0x053] Size of Flash connected to A1
sflashA1Size: '0x00000000'
# ----------------------------------------===== sflashA2Size [Optional] =====-----------------------------------------
# Description: Offset: 0x00000054, Width: 32b; [0x054-0x057] Size of Flash connected to A2
sflashA2Size: '0x00000000'
# ----------------------------------------===== sflashB1Size [Optional] =====-----------------------------------------
# Description: Offset: 0x00000058, Width: 32b; [0x058-0x05b] Size of Flash connected to B1
sflashB1Size: '0x00000000'
# ----------------------------------------===== sflashB2Size [Optional] =====-----------------------------------------
# Description: Offset: 0x0000005C, Width: 32b; [0x05c-0x05f] Size of Flash connected to B2
sflashB2Size: '0x00000000'
# ------------------------------------===== csPadSettingOverride [Optional] =====-------------------------------------
# Description: Offset: 0x00000060, Width: 32b; [0x060-0x063] CS pad setting override value
csPadSettingOverride: '0x00000000'
# -----------------------------------===== sclkPadSettingOverride [Optional] =====------------------------------------
# Description: Offset: 0x00000064, Width: 32b; [0x064-0x067] SCK pad setting override value
sclkPadSettingOverride: '0x00000000'
# -----------------------------------===== dataPadSettingOverride [Optional] =====------------------------------------
# Description: Offset: 0x00000068, Width: 32b; [0x068-0x06b] data pad setting override value
dataPadSettingOverride: '0x00000000'
# ------------------------------------===== dqsPadSettingOverride [Optional] =====------------------------------------
# Description: Offset: 0x0000006C, Width: 32b; [0x06c-0x06f] DQS pad setting override value
dqsPadSettingOverride: '0x00000000'
# -----------------------------------------===== timeoutInMs [Optional] =====-----------------------------------------
# Description: Offset: 0x00000070, Width: 32b; [0x070-0x073] Timeout threshold for read status command
timeoutInMs: '0x00000000'
# ---------------------------------------===== commandInterval [Optional] =====---------------------------------------
# Description: Offset: 0x00000074, Width: 32b; [0x074-0x077] CS deselect interval between two commands
commandInterval: '0x00000000'
# ---------------------------------------===== dataValidTime_0 [Optional] =====---------------------------------------
# Description: Offset: 0x00000078, Width: 16b; [0x078-0x07b] CLK edge to data valid time for PORT A and PORT B
dataValidTime_0:
# ----------------------------------------===== time_100ps [Optional] =====-----------------------------------------
# Description: Offset: 0b, Width: 8b, Data valid time, in terms of 100ps
time_100ps: 0
# ----------------------------------------===== delay_cells [Optional] =====----------------------------------------
# Description: Offset: 8b, Width: 8b, Data valid time, in terms of delay cells
delay_cells: 0
# ---------------------------------------===== dataValidTime_1 [Optional] =====---------------------------------------
# Description: Offset: 0x0000007A, Width: 16b; [0x078-0x07b] CLK edge to data valid time for PORT A and PORT B
dataValidTime_1:
# ----------------------------------------===== time_100ps [Optional] =====-----------------------------------------
# Description: Offset: 0b, Width: 8b, Data valid time, in terms of 100ps
time_100ps: 0
# ----------------------------------------===== delay_cells [Optional] =====----------------------------------------
# Description: Offset: 8b, Width: 8b, Data valid time, in terms of delay cells
delay_cells: 0
# -----------------------------------------===== busyOffset [Optional] =====------------------------------------------
# Description: Offset: 0x0000007C, Width: 16b; [0x07c-0x07d] Busy offset, valid value: 0-31
busyOffset: '0x0000'
# ---------------------------------------===== busyBitPolarity [Optional] =====---------------------------------------
# Description: Offset: 0x0000007E, Width: 16b; [0x07e-0x07f] Busy flag polarity, 0 - busy flag is 1 when flash device
# is busy, 1 - busy flag is 0 when flash device is busy
busyBitPolarity: '0x0000'
# -----------------------------------===== lookupTable_seq0_instr0 [Optional] =====-----------------------------------
# Description: Offset: 0x00000080, Width: 16b; Lookup table holds Flash command sequences 0, instruction 0
lookupTable_seq0_instr0:
# ------------------------------------------===== OPERAND [Optional] =====------------------------------------------
# Description: Offset: 0b, Width: 8b, Instruction operand. Its values depends on used instruction
OPERAND: 0
# -----------------------------------------===== NUM_PADS [Optional] =====------------------------------------------
# Description: Offset: 8b, Width: 2b, Number of pads used by instruction. Some instructions ignores this parameter.
# - 1PAD, (0): Single mode. One pad is used.
# - 2PAD, (1): Dual mode. Two pads are used.
# - 4PAD, (2): Quad mode. Four pads are used.
# - 8PAD, (3): Octal mode. Eight pads are used.
# Possible options: <1PAD, 2PAD, 4PAD, 8PAD>
NUM_PADS: 1PAD
# --------------------------------------===== OPERATION_CODE [Optional] =====---------------------------------------
# Description: Offset: 10b, Width: 6b, Instruction operation code.
# - STOP, (0): Stop execution and de-assert CS. Then, the next command sequence (to the same flash device) starts
# from instruction pointer 0.
# - CMD_SDR, (1): Transmit command code to Flash.
# - RADDR_SDR, (2): Transmit row address to Flash.
# - CADDR_SDR, (3): Transmit column address to Flash.
# - MODE1_SDR, (4): Transmit mode bits to Flash.
# - MODE2_SDR, (5): Transmit mode bits to Flash.
# - MODE4_SDR, (6): Transmit mode bits to Flash.
# - MODE8_SDR, (7): Transmit mode bits to Flash.
# - WRITE_SDR, (8): Transmit program data to Flash device.
# - READ_SDR, (9): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_SDR, (10): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_SDR, (11): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_SDR, (12): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_SDR, (13): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# - JMP_ON_CS, (31): Stop execution, de-assert CS and save operand[7:0] as the instruction start pointer for next
# sequence.Normally this instruction is used to support Execute-In-Place enhanced mode. See XIP enhanced mode for
# more details.This instruction is only allowed for AHB read commands. There is interrupt status bit set
# (INTR[IPCMDERR] or INTR[AHBCMDERR]) when using this instruction in IP command or AHB write command.
# - CMD_DDR, (33): Transmit command code to Flash.
# - RADDR_DDR, (34): Transmit row address to Flash.
# - CADDR_DDR, (35): Transmit column address to Flash.
# - MODE1_DDR, (36): Transmit mode bits to Flash.
# - MODE2_DDR, (37): Transmit mode bits to Flash.
# - MODE4_DDR, (38): Transmit mode bits to Flash.
# - MODE8_DDR, (39): Transmit mode bits to Flash.
# - WRITE_DDR, (40): Transmit program data to Flash device.
# - READ_DDR, (41): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_DDR, (42): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_DDR, (43): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_DDR, (44): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_DDR, (45): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# Possible options: <STOP, CMD_SDR, RADDR_SDR, CADDR_SDR, MODE1_SDR, MODE2_SDR, MODE4_SDR, MODE8_SDR, WRITE_SDR,
# READ_SDR, LEARN_SDR, DATSZ_SDR, DUMMY_SDR, DUMMY_RWDS_SDR, JMP_ON_CS, CMD_DDR, RADDR_DDR, CADDR_DDR, MODE1_DDR,
# MODE2_DDR, MODE4_DDR, MODE8_DDR, WRITE_DDR, READ_DDR, LEARN_DDR, DATSZ_DDR, DUMMY_DDR, DUMMY_RWDS_DDR>
OPERATION_CODE: STOP
lookupTable_seq0_instr1:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq0_instr2:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq0_instr3:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq0_instr4:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq0_instr5:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq0_instr6:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq0_instr7:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
# -----------------------------------===== lookupTable_seq1_instr0 [Optional] =====-----------------------------------
# Description: Offset: 0x00000090, Width: 16b; Lookup table holds Flash command sequences 1, instruction 0
lookupTable_seq1_instr0:
# ------------------------------------------===== OPERAND [Optional] =====------------------------------------------
# Description: Offset: 0b, Width: 8b, Instruction operand. Its values depends on used instruction
OPERAND: 0
# -----------------------------------------===== NUM_PADS [Optional] =====------------------------------------------
# Description: Offset: 8b, Width: 2b, Number of pads used by instruction. Some instructions ignores this parameter.
# - 1PAD, (0): Single mode. One pad is used.
# - 2PAD, (1): Dual mode. Two pads are used.
# - 4PAD, (2): Quad mode. Four pads are used.
# - 8PAD, (3): Octal mode. Eight pads are used.
# Possible options: <1PAD, 2PAD, 4PAD, 8PAD>
NUM_PADS: 1PAD
# --------------------------------------===== OPERATION_CODE [Optional] =====---------------------------------------
# Description: Offset: 10b, Width: 6b, Instruction operation code.
# - STOP, (0): Stop execution and de-assert CS. Then, the next command sequence (to the same flash device) starts
# from instruction pointer 0.
# - CMD_SDR, (1): Transmit command code to Flash.
# - RADDR_SDR, (2): Transmit row address to Flash.
# - CADDR_SDR, (3): Transmit column address to Flash.
# - MODE1_SDR, (4): Transmit mode bits to Flash.
# - MODE2_SDR, (5): Transmit mode bits to Flash.
# - MODE4_SDR, (6): Transmit mode bits to Flash.
# - MODE8_SDR, (7): Transmit mode bits to Flash.
# - WRITE_SDR, (8): Transmit program data to Flash device.
# - READ_SDR, (9): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_SDR, (10): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_SDR, (11): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_SDR, (12): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_SDR, (13): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# - JMP_ON_CS, (31): Stop execution, de-assert CS and save operand[7:0] as the instruction start pointer for next
# sequence.Normally this instruction is used to support Execute-In-Place enhanced mode. See XIP enhanced mode for
# more details.This instruction is only allowed for AHB read commands. There is interrupt status bit set
# (INTR[IPCMDERR] or INTR[AHBCMDERR]) when using this instruction in IP command or AHB write command.
# - CMD_DDR, (33): Transmit command code to Flash.
# - RADDR_DDR, (34): Transmit row address to Flash.
# - CADDR_DDR, (35): Transmit column address to Flash.
# - MODE1_DDR, (36): Transmit mode bits to Flash.
# - MODE2_DDR, (37): Transmit mode bits to Flash.
# - MODE4_DDR, (38): Transmit mode bits to Flash.
# - MODE8_DDR, (39): Transmit mode bits to Flash.
# - WRITE_DDR, (40): Transmit program data to Flash device.
# - READ_DDR, (41): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_DDR, (42): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_DDR, (43): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_DDR, (44): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_DDR, (45): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# Possible options: <STOP, CMD_SDR, RADDR_SDR, CADDR_SDR, MODE1_SDR, MODE2_SDR, MODE4_SDR, MODE8_SDR, WRITE_SDR,
# READ_SDR, LEARN_SDR, DATSZ_SDR, DUMMY_SDR, DUMMY_RWDS_SDR, JMP_ON_CS, CMD_DDR, RADDR_DDR, CADDR_DDR, MODE1_DDR,
# MODE2_DDR, MODE4_DDR, MODE8_DDR, WRITE_DDR, READ_DDR, LEARN_DDR, DATSZ_DDR, DUMMY_DDR, DUMMY_RWDS_DDR>
OPERATION_CODE: STOP
lookupTable_seq1_instr1:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq1_instr2:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq1_instr3:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq1_instr4:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq1_instr5:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq1_instr6:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq1_instr7:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
# -----------------------------------===== lookupTable_seq2_instr0 [Optional] =====-----------------------------------
# Description: Offset: 0x000000A0, Width: 16b; Lookup table holds Flash command sequences 2, instruction 0
lookupTable_seq2_instr0:
# ------------------------------------------===== OPERAND [Optional] =====------------------------------------------
# Description: Offset: 0b, Width: 8b, Instruction operand. Its values depends on used instruction
OPERAND: 0
# -----------------------------------------===== NUM_PADS [Optional] =====------------------------------------------
# Description: Offset: 8b, Width: 2b, Number of pads used by instruction. Some instructions ignores this parameter.
# - 1PAD, (0): Single mode. One pad is used.
# - 2PAD, (1): Dual mode. Two pads are used.
# - 4PAD, (2): Quad mode. Four pads are used.
# - 8PAD, (3): Octal mode. Eight pads are used.
# Possible options: <1PAD, 2PAD, 4PAD, 8PAD>
NUM_PADS: 1PAD
# --------------------------------------===== OPERATION_CODE [Optional] =====---------------------------------------
# Description: Offset: 10b, Width: 6b, Instruction operation code.
# - STOP, (0): Stop execution and de-assert CS. Then, the next command sequence (to the same flash device) starts
# from instruction pointer 0.
# - CMD_SDR, (1): Transmit command code to Flash.
# - RADDR_SDR, (2): Transmit row address to Flash.
# - CADDR_SDR, (3): Transmit column address to Flash.
# - MODE1_SDR, (4): Transmit mode bits to Flash.
# - MODE2_SDR, (5): Transmit mode bits to Flash.
# - MODE4_SDR, (6): Transmit mode bits to Flash.
# - MODE8_SDR, (7): Transmit mode bits to Flash.
# - WRITE_SDR, (8): Transmit program data to Flash device.
# - READ_SDR, (9): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_SDR, (10): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_SDR, (11): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_SDR, (12): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_SDR, (13): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# - JMP_ON_CS, (31): Stop execution, de-assert CS and save operand[7:0] as the instruction start pointer for next
# sequence.Normally this instruction is used to support Execute-In-Place enhanced mode. See XIP enhanced mode for
# more details.This instruction is only allowed for AHB read commands. There is interrupt status bit set
# (INTR[IPCMDERR] or INTR[AHBCMDERR]) when using this instruction in IP command or AHB write command.
# - CMD_DDR, (33): Transmit command code to Flash.
# - RADDR_DDR, (34): Transmit row address to Flash.
# - CADDR_DDR, (35): Transmit column address to Flash.
# - MODE1_DDR, (36): Transmit mode bits to Flash.
# - MODE2_DDR, (37): Transmit mode bits to Flash.
# - MODE4_DDR, (38): Transmit mode bits to Flash.
# - MODE8_DDR, (39): Transmit mode bits to Flash.
# - WRITE_DDR, (40): Transmit program data to Flash device.
# - READ_DDR, (41): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_DDR, (42): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_DDR, (43): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_DDR, (44): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_DDR, (45): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# Possible options: <STOP, CMD_SDR, RADDR_SDR, CADDR_SDR, MODE1_SDR, MODE2_SDR, MODE4_SDR, MODE8_SDR, WRITE_SDR,
# READ_SDR, LEARN_SDR, DATSZ_SDR, DUMMY_SDR, DUMMY_RWDS_SDR, JMP_ON_CS, CMD_DDR, RADDR_DDR, CADDR_DDR, MODE1_DDR,
# MODE2_DDR, MODE4_DDR, MODE8_DDR, WRITE_DDR, READ_DDR, LEARN_DDR, DATSZ_DDR, DUMMY_DDR, DUMMY_RWDS_DDR>
OPERATION_CODE: STOP
lookupTable_seq2_instr1:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq2_instr2:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq2_instr3:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq2_instr4:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq2_instr5:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq2_instr6:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq2_instr7:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
# -----------------------------------===== lookupTable_seq3_instr0 [Optional] =====-----------------------------------
# Description: Offset: 0x000000B0, Width: 16b; Lookup table holds Flash command sequences 3, instruction 0
lookupTable_seq3_instr0:
# ------------------------------------------===== OPERAND [Optional] =====------------------------------------------
# Description: Offset: 0b, Width: 8b, Instruction operand. Its values depends on used instruction
OPERAND: 0
# -----------------------------------------===== NUM_PADS [Optional] =====------------------------------------------
# Description: Offset: 8b, Width: 2b, Number of pads used by instruction. Some instructions ignores this parameter.
# - 1PAD, (0): Single mode. One pad is used.
# - 2PAD, (1): Dual mode. Two pads are used.
# - 4PAD, (2): Quad mode. Four pads are used.
# - 8PAD, (3): Octal mode. Eight pads are used.
# Possible options: <1PAD, 2PAD, 4PAD, 8PAD>
NUM_PADS: 1PAD
# --------------------------------------===== OPERATION_CODE [Optional] =====---------------------------------------
# Description: Offset: 10b, Width: 6b, Instruction operation code.
# - STOP, (0): Stop execution and de-assert CS. Then, the next command sequence (to the same flash device) starts
# from instruction pointer 0.
# - CMD_SDR, (1): Transmit command code to Flash.
# - RADDR_SDR, (2): Transmit row address to Flash.
# - CADDR_SDR, (3): Transmit column address to Flash.
# - MODE1_SDR, (4): Transmit mode bits to Flash.
# - MODE2_SDR, (5): Transmit mode bits to Flash.
# - MODE4_SDR, (6): Transmit mode bits to Flash.
# - MODE8_SDR, (7): Transmit mode bits to Flash.
# - WRITE_SDR, (8): Transmit program data to Flash device.
# - READ_SDR, (9): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_SDR, (10): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_SDR, (11): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_SDR, (12): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_SDR, (13): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# - JMP_ON_CS, (31): Stop execution, de-assert CS and save operand[7:0] as the instruction start pointer for next
# sequence.Normally this instruction is used to support Execute-In-Place enhanced mode. See XIP enhanced mode for
# more details.This instruction is only allowed for AHB read commands. There is interrupt status bit set
# (INTR[IPCMDERR] or INTR[AHBCMDERR]) when using this instruction in IP command or AHB write command.
# - CMD_DDR, (33): Transmit command code to Flash.
# - RADDR_DDR, (34): Transmit row address to Flash.
# - CADDR_DDR, (35): Transmit column address to Flash.
# - MODE1_DDR, (36): Transmit mode bits to Flash.
# - MODE2_DDR, (37): Transmit mode bits to Flash.
# - MODE4_DDR, (38): Transmit mode bits to Flash.
# - MODE8_DDR, (39): Transmit mode bits to Flash.
# - WRITE_DDR, (40): Transmit program data to Flash device.
# - READ_DDR, (41): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_DDR, (42): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_DDR, (43): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_DDR, (44): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_DDR, (45): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# Possible options: <STOP, CMD_SDR, RADDR_SDR, CADDR_SDR, MODE1_SDR, MODE2_SDR, MODE4_SDR, MODE8_SDR, WRITE_SDR,
# READ_SDR, LEARN_SDR, DATSZ_SDR, DUMMY_SDR, DUMMY_RWDS_SDR, JMP_ON_CS, CMD_DDR, RADDR_DDR, CADDR_DDR, MODE1_DDR,
# MODE2_DDR, MODE4_DDR, MODE8_DDR, WRITE_DDR, READ_DDR, LEARN_DDR, DATSZ_DDR, DUMMY_DDR, DUMMY_RWDS_DDR>
OPERATION_CODE: STOP
lookupTable_seq3_instr1:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq3_instr2:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq3_instr3:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq3_instr4:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq3_instr5:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq3_instr6:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq3_instr7:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
# -----------------------------------===== lookupTable_seq4_instr0 [Optional] =====-----------------------------------
# Description: Offset: 0x000000C0, Width: 16b; Lookup table holds Flash command sequences 4, instruction 0
lookupTable_seq4_instr0:
# ------------------------------------------===== OPERAND [Optional] =====------------------------------------------
# Description: Offset: 0b, Width: 8b, Instruction operand. Its values depends on used instruction
OPERAND: 0
# -----------------------------------------===== NUM_PADS [Optional] =====------------------------------------------
# Description: Offset: 8b, Width: 2b, Number of pads used by instruction. Some instructions ignores this parameter.
# - 1PAD, (0): Single mode. One pad is used.
# - 2PAD, (1): Dual mode. Two pads are used.
# - 4PAD, (2): Quad mode. Four pads are used.
# - 8PAD, (3): Octal mode. Eight pads are used.
# Possible options: <1PAD, 2PAD, 4PAD, 8PAD>
NUM_PADS: 1PAD
# --------------------------------------===== OPERATION_CODE [Optional] =====---------------------------------------
# Description: Offset: 10b, Width: 6b, Instruction operation code.
# - STOP, (0): Stop execution and de-assert CS. Then, the next command sequence (to the same flash device) starts
# from instruction pointer 0.
# - CMD_SDR, (1): Transmit command code to Flash.
# - RADDR_SDR, (2): Transmit row address to Flash.
# - CADDR_SDR, (3): Transmit column address to Flash.
# - MODE1_SDR, (4): Transmit mode bits to Flash.
# - MODE2_SDR, (5): Transmit mode bits to Flash.
# - MODE4_SDR, (6): Transmit mode bits to Flash.
# - MODE8_SDR, (7): Transmit mode bits to Flash.
# - WRITE_SDR, (8): Transmit program data to Flash device.
# - READ_SDR, (9): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_SDR, (10): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_SDR, (11): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_SDR, (12): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_SDR, (13): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# - JMP_ON_CS, (31): Stop execution, de-assert CS and save operand[7:0] as the instruction start pointer for next
# sequence.Normally this instruction is used to support Execute-In-Place enhanced mode. See XIP enhanced mode for
# more details.This instruction is only allowed for AHB read commands. There is interrupt status bit set
# (INTR[IPCMDERR] or INTR[AHBCMDERR]) when using this instruction in IP command or AHB write command.
# - CMD_DDR, (33): Transmit command code to Flash.
# - RADDR_DDR, (34): Transmit row address to Flash.
# - CADDR_DDR, (35): Transmit column address to Flash.
# - MODE1_DDR, (36): Transmit mode bits to Flash.
# - MODE2_DDR, (37): Transmit mode bits to Flash.
# - MODE4_DDR, (38): Transmit mode bits to Flash.
# - MODE8_DDR, (39): Transmit mode bits to Flash.
# - WRITE_DDR, (40): Transmit program data to Flash device.
# - READ_DDR, (41): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_DDR, (42): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_DDR, (43): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_DDR, (44): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_DDR, (45): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# Possible options: <STOP, CMD_SDR, RADDR_SDR, CADDR_SDR, MODE1_SDR, MODE2_SDR, MODE4_SDR, MODE8_SDR, WRITE_SDR,
# READ_SDR, LEARN_SDR, DATSZ_SDR, DUMMY_SDR, DUMMY_RWDS_SDR, JMP_ON_CS, CMD_DDR, RADDR_DDR, CADDR_DDR, MODE1_DDR,
# MODE2_DDR, MODE4_DDR, MODE8_DDR, WRITE_DDR, READ_DDR, LEARN_DDR, DATSZ_DDR, DUMMY_DDR, DUMMY_RWDS_DDR>
OPERATION_CODE: STOP
lookupTable_seq4_instr1:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq4_instr2:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq4_instr3:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq4_instr4:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq4_instr5:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq4_instr6:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq4_instr7:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
# -----------------------------------===== lookupTable_seq5_instr0 [Optional] =====-----------------------------------
# Description: Offset: 0x000000D0, Width: 16b; Lookup table holds Flash command sequences 5, instruction 0
lookupTable_seq5_instr0:
# ------------------------------------------===== OPERAND [Optional] =====------------------------------------------
# Description: Offset: 0b, Width: 8b, Instruction operand. Its values depends on used instruction
OPERAND: 0
# -----------------------------------------===== NUM_PADS [Optional] =====------------------------------------------
# Description: Offset: 8b, Width: 2b, Number of pads used by instruction. Some instructions ignores this parameter.
# - 1PAD, (0): Single mode. One pad is used.
# - 2PAD, (1): Dual mode. Two pads are used.
# - 4PAD, (2): Quad mode. Four pads are used.
# - 8PAD, (3): Octal mode. Eight pads are used.
# Possible options: <1PAD, 2PAD, 4PAD, 8PAD>
NUM_PADS: 1PAD
# --------------------------------------===== OPERATION_CODE [Optional] =====---------------------------------------
# Description: Offset: 10b, Width: 6b, Instruction operation code.
# - STOP, (0): Stop execution and de-assert CS. Then, the next command sequence (to the same flash device) starts
# from instruction pointer 0.
# - CMD_SDR, (1): Transmit command code to Flash.
# - RADDR_SDR, (2): Transmit row address to Flash.
# - CADDR_SDR, (3): Transmit column address to Flash.
# - MODE1_SDR, (4): Transmit mode bits to Flash.
# - MODE2_SDR, (5): Transmit mode bits to Flash.
# - MODE4_SDR, (6): Transmit mode bits to Flash.
# - MODE8_SDR, (7): Transmit mode bits to Flash.
# - WRITE_SDR, (8): Transmit program data to Flash device.
# - READ_SDR, (9): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_SDR, (10): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_SDR, (11): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_SDR, (12): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_SDR, (13): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# - JMP_ON_CS, (31): Stop execution, de-assert CS and save operand[7:0] as the instruction start pointer for next
# sequence.Normally this instruction is used to support Execute-In-Place enhanced mode. See XIP enhanced mode for
# more details.This instruction is only allowed for AHB read commands. There is interrupt status bit set
# (INTR[IPCMDERR] or INTR[AHBCMDERR]) when using this instruction in IP command or AHB write command.
# - CMD_DDR, (33): Transmit command code to Flash.
# - RADDR_DDR, (34): Transmit row address to Flash.
# - CADDR_DDR, (35): Transmit column address to Flash.
# - MODE1_DDR, (36): Transmit mode bits to Flash.
# - MODE2_DDR, (37): Transmit mode bits to Flash.
# - MODE4_DDR, (38): Transmit mode bits to Flash.
# - MODE8_DDR, (39): Transmit mode bits to Flash.
# - WRITE_DDR, (40): Transmit program data to Flash device.
# - READ_DDR, (41): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_DDR, (42): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_DDR, (43): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_DDR, (44): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_DDR, (45): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# Possible options: <STOP, CMD_SDR, RADDR_SDR, CADDR_SDR, MODE1_SDR, MODE2_SDR, MODE4_SDR, MODE8_SDR, WRITE_SDR,
# READ_SDR, LEARN_SDR, DATSZ_SDR, DUMMY_SDR, DUMMY_RWDS_SDR, JMP_ON_CS, CMD_DDR, RADDR_DDR, CADDR_DDR, MODE1_DDR,
# MODE2_DDR, MODE4_DDR, MODE8_DDR, WRITE_DDR, READ_DDR, LEARN_DDR, DATSZ_DDR, DUMMY_DDR, DUMMY_RWDS_DDR>
OPERATION_CODE: STOP
lookupTable_seq5_instr1:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq5_instr2:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq5_instr3:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq5_instr4:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq5_instr5:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq5_instr6:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq5_instr7:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
# -----------------------------------===== lookupTable_seq6_instr0 [Optional] =====-----------------------------------
# Description: Offset: 0x000000E0, Width: 16b; Lookup table holds Flash command sequences 6, instruction 0
lookupTable_seq6_instr0:
# ------------------------------------------===== OPERAND [Optional] =====------------------------------------------
# Description: Offset: 0b, Width: 8b, Instruction operand. Its values depends on used instruction
OPERAND: 0
# -----------------------------------------===== NUM_PADS [Optional] =====------------------------------------------
# Description: Offset: 8b, Width: 2b, Number of pads used by instruction. Some instructions ignores this parameter.
# - 1PAD, (0): Single mode. One pad is used.
# - 2PAD, (1): Dual mode. Two pads are used.
# - 4PAD, (2): Quad mode. Four pads are used.
# - 8PAD, (3): Octal mode. Eight pads are used.
# Possible options: <1PAD, 2PAD, 4PAD, 8PAD>
NUM_PADS: 1PAD
# --------------------------------------===== OPERATION_CODE [Optional] =====---------------------------------------
# Description: Offset: 10b, Width: 6b, Instruction operation code.
# - STOP, (0): Stop execution and de-assert CS. Then, the next command sequence (to the same flash device) starts
# from instruction pointer 0.
# - CMD_SDR, (1): Transmit command code to Flash.
# - RADDR_SDR, (2): Transmit row address to Flash.
# - CADDR_SDR, (3): Transmit column address to Flash.
# - MODE1_SDR, (4): Transmit mode bits to Flash.
# - MODE2_SDR, (5): Transmit mode bits to Flash.
# - MODE4_SDR, (6): Transmit mode bits to Flash.
# - MODE8_SDR, (7): Transmit mode bits to Flash.
# - WRITE_SDR, (8): Transmit program data to Flash device.
# - READ_SDR, (9): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_SDR, (10): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_SDR, (11): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_SDR, (12): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_SDR, (13): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# - JMP_ON_CS, (31): Stop execution, de-assert CS and save operand[7:0] as the instruction start pointer for next
# sequence.Normally this instruction is used to support Execute-In-Place enhanced mode. See XIP enhanced mode for
# more details.This instruction is only allowed for AHB read commands. There is interrupt status bit set
# (INTR[IPCMDERR] or INTR[AHBCMDERR]) when using this instruction in IP command or AHB write command.
# - CMD_DDR, (33): Transmit command code to Flash.
# - RADDR_DDR, (34): Transmit row address to Flash.
# - CADDR_DDR, (35): Transmit column address to Flash.
# - MODE1_DDR, (36): Transmit mode bits to Flash.
# - MODE2_DDR, (37): Transmit mode bits to Flash.
# - MODE4_DDR, (38): Transmit mode bits to Flash.
# - MODE8_DDR, (39): Transmit mode bits to Flash.
# - WRITE_DDR, (40): Transmit program data to Flash device.
# - READ_DDR, (41): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_DDR, (42): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_DDR, (43): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_DDR, (44): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_DDR, (45): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# Possible options: <STOP, CMD_SDR, RADDR_SDR, CADDR_SDR, MODE1_SDR, MODE2_SDR, MODE4_SDR, MODE8_SDR, WRITE_SDR,
# READ_SDR, LEARN_SDR, DATSZ_SDR, DUMMY_SDR, DUMMY_RWDS_SDR, JMP_ON_CS, CMD_DDR, RADDR_DDR, CADDR_DDR, MODE1_DDR,
# MODE2_DDR, MODE4_DDR, MODE8_DDR, WRITE_DDR, READ_DDR, LEARN_DDR, DATSZ_DDR, DUMMY_DDR, DUMMY_RWDS_DDR>
OPERATION_CODE: STOP
lookupTable_seq6_instr1:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq6_instr2:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq6_instr3:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq6_instr4:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq6_instr5:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq6_instr6:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq6_instr7:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
# -----------------------------------===== lookupTable_seq7_instr0 [Optional] =====-----------------------------------
# Description: Offset: 0x000000F0, Width: 16b; Lookup table holds Flash command sequences 7, instruction 0
lookupTable_seq7_instr0:
# ------------------------------------------===== OPERAND [Optional] =====------------------------------------------
# Description: Offset: 0b, Width: 8b, Instruction operand. Its values depends on used instruction
OPERAND: 0
# -----------------------------------------===== NUM_PADS [Optional] =====------------------------------------------
# Description: Offset: 8b, Width: 2b, Number of pads used by instruction. Some instructions ignores this parameter.
# - 1PAD, (0): Single mode. One pad is used.
# - 2PAD, (1): Dual mode. Two pads are used.
# - 4PAD, (2): Quad mode. Four pads are used.
# - 8PAD, (3): Octal mode. Eight pads are used.
# Possible options: <1PAD, 2PAD, 4PAD, 8PAD>
NUM_PADS: 1PAD
# --------------------------------------===== OPERATION_CODE [Optional] =====---------------------------------------
# Description: Offset: 10b, Width: 6b, Instruction operation code.
# - STOP, (0): Stop execution and de-assert CS. Then, the next command sequence (to the same flash device) starts
# from instruction pointer 0.
# - CMD_SDR, (1): Transmit command code to Flash.
# - RADDR_SDR, (2): Transmit row address to Flash.
# - CADDR_SDR, (3): Transmit column address to Flash.
# - MODE1_SDR, (4): Transmit mode bits to Flash.
# - MODE2_SDR, (5): Transmit mode bits to Flash.
# - MODE4_SDR, (6): Transmit mode bits to Flash.
# - MODE8_SDR, (7): Transmit mode bits to Flash.
# - WRITE_SDR, (8): Transmit program data to Flash device.
# - READ_SDR, (9): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_SDR, (10): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_SDR, (11): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_SDR, (12): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_SDR, (13): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# - JMP_ON_CS, (31): Stop execution, de-assert CS and save operand[7:0] as the instruction start pointer for next
# sequence.Normally this instruction is used to support Execute-In-Place enhanced mode. See XIP enhanced mode for
# more details.This instruction is only allowed for AHB read commands. There is interrupt status bit set
# (INTR[IPCMDERR] or INTR[AHBCMDERR]) when using this instruction in IP command or AHB write command.
# - CMD_DDR, (33): Transmit command code to Flash.
# - RADDR_DDR, (34): Transmit row address to Flash.
# - CADDR_DDR, (35): Transmit column address to Flash.
# - MODE1_DDR, (36): Transmit mode bits to Flash.
# - MODE2_DDR, (37): Transmit mode bits to Flash.
# - MODE4_DDR, (38): Transmit mode bits to Flash.
# - MODE8_DDR, (39): Transmit mode bits to Flash.
# - WRITE_DDR, (40): Transmit program data to Flash device.
# - READ_DDR, (41): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_DDR, (42): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_DDR, (43): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_DDR, (44): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_DDR, (45): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# Possible options: <STOP, CMD_SDR, RADDR_SDR, CADDR_SDR, MODE1_SDR, MODE2_SDR, MODE4_SDR, MODE8_SDR, WRITE_SDR,
# READ_SDR, LEARN_SDR, DATSZ_SDR, DUMMY_SDR, DUMMY_RWDS_SDR, JMP_ON_CS, CMD_DDR, RADDR_DDR, CADDR_DDR, MODE1_DDR,
# MODE2_DDR, MODE4_DDR, MODE8_DDR, WRITE_DDR, READ_DDR, LEARN_DDR, DATSZ_DDR, DUMMY_DDR, DUMMY_RWDS_DDR>
OPERATION_CODE: STOP
lookupTable_seq7_instr1:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq7_instr2:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq7_instr3:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq7_instr4:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq7_instr5:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq7_instr6:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq7_instr7:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
# -----------------------------------===== lookupTable_seq8_instr0 [Optional] =====-----------------------------------
# Description: Offset: 0x00000100, Width: 16b; Lookup table holds Flash command sequences 8, instruction 0
lookupTable_seq8_instr0:
# ------------------------------------------===== OPERAND [Optional] =====------------------------------------------
# Description: Offset: 0b, Width: 8b, Instruction operand. Its values depends on used instruction
OPERAND: 0
# -----------------------------------------===== NUM_PADS [Optional] =====------------------------------------------
# Description: Offset: 8b, Width: 2b, Number of pads used by instruction. Some instructions ignores this parameter.
# - 1PAD, (0): Single mode. One pad is used.
# - 2PAD, (1): Dual mode. Two pads are used.
# - 4PAD, (2): Quad mode. Four pads are used.
# - 8PAD, (3): Octal mode. Eight pads are used.
# Possible options: <1PAD, 2PAD, 4PAD, 8PAD>
NUM_PADS: 1PAD
# --------------------------------------===== OPERATION_CODE [Optional] =====---------------------------------------
# Description: Offset: 10b, Width: 6b, Instruction operation code.
# - STOP, (0): Stop execution and de-assert CS. Then, the next command sequence (to the same flash device) starts
# from instruction pointer 0.
# - CMD_SDR, (1): Transmit command code to Flash.
# - RADDR_SDR, (2): Transmit row address to Flash.
# - CADDR_SDR, (3): Transmit column address to Flash.
# - MODE1_SDR, (4): Transmit mode bits to Flash.
# - MODE2_SDR, (5): Transmit mode bits to Flash.
# - MODE4_SDR, (6): Transmit mode bits to Flash.
# - MODE8_SDR, (7): Transmit mode bits to Flash.
# - WRITE_SDR, (8): Transmit program data to Flash device.
# - READ_SDR, (9): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_SDR, (10): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_SDR, (11): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_SDR, (12): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_SDR, (13): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# - JMP_ON_CS, (31): Stop execution, de-assert CS and save operand[7:0] as the instruction start pointer for next
# sequence.Normally this instruction is used to support Execute-In-Place enhanced mode. See XIP enhanced mode for
# more details.This instruction is only allowed for AHB read commands. There is interrupt status bit set
# (INTR[IPCMDERR] or INTR[AHBCMDERR]) when using this instruction in IP command or AHB write command.
# - CMD_DDR, (33): Transmit command code to Flash.
# - RADDR_DDR, (34): Transmit row address to Flash.
# - CADDR_DDR, (35): Transmit column address to Flash.
# - MODE1_DDR, (36): Transmit mode bits to Flash.
# - MODE2_DDR, (37): Transmit mode bits to Flash.
# - MODE4_DDR, (38): Transmit mode bits to Flash.
# - MODE8_DDR, (39): Transmit mode bits to Flash.
# - WRITE_DDR, (40): Transmit program data to Flash device.
# - READ_DDR, (41): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_DDR, (42): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_DDR, (43): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_DDR, (44): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_DDR, (45): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# Possible options: <STOP, CMD_SDR, RADDR_SDR, CADDR_SDR, MODE1_SDR, MODE2_SDR, MODE4_SDR, MODE8_SDR, WRITE_SDR,
# READ_SDR, LEARN_SDR, DATSZ_SDR, DUMMY_SDR, DUMMY_RWDS_SDR, JMP_ON_CS, CMD_DDR, RADDR_DDR, CADDR_DDR, MODE1_DDR,
# MODE2_DDR, MODE4_DDR, MODE8_DDR, WRITE_DDR, READ_DDR, LEARN_DDR, DATSZ_DDR, DUMMY_DDR, DUMMY_RWDS_DDR>
OPERATION_CODE: STOP
lookupTable_seq8_instr1:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq8_instr2:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq8_instr3:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq8_instr4:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq8_instr5:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq8_instr6:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq8_instr7:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
# -----------------------------------===== lookupTable_seq9_instr0 [Optional] =====-----------------------------------
# Description: Offset: 0x00000110, Width: 16b; Lookup table holds Flash command sequences 9, instruction 0
lookupTable_seq9_instr0:
# ------------------------------------------===== OPERAND [Optional] =====------------------------------------------
# Description: Offset: 0b, Width: 8b, Instruction operand. Its values depends on used instruction
OPERAND: 0
# -----------------------------------------===== NUM_PADS [Optional] =====------------------------------------------
# Description: Offset: 8b, Width: 2b, Number of pads used by instruction. Some instructions ignores this parameter.
# - 1PAD, (0): Single mode. One pad is used.
# - 2PAD, (1): Dual mode. Two pads are used.
# - 4PAD, (2): Quad mode. Four pads are used.
# - 8PAD, (3): Octal mode. Eight pads are used.
# Possible options: <1PAD, 2PAD, 4PAD, 8PAD>
NUM_PADS: 1PAD
# --------------------------------------===== OPERATION_CODE [Optional] =====---------------------------------------
# Description: Offset: 10b, Width: 6b, Instruction operation code.
# - STOP, (0): Stop execution and de-assert CS. Then, the next command sequence (to the same flash device) starts
# from instruction pointer 0.
# - CMD_SDR, (1): Transmit command code to Flash.
# - RADDR_SDR, (2): Transmit row address to Flash.
# - CADDR_SDR, (3): Transmit column address to Flash.
# - MODE1_SDR, (4): Transmit mode bits to Flash.
# - MODE2_SDR, (5): Transmit mode bits to Flash.
# - MODE4_SDR, (6): Transmit mode bits to Flash.
# - MODE8_SDR, (7): Transmit mode bits to Flash.
# - WRITE_SDR, (8): Transmit program data to Flash device.
# - READ_SDR, (9): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_SDR, (10): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_SDR, (11): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_SDR, (12): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_SDR, (13): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# - JMP_ON_CS, (31): Stop execution, de-assert CS and save operand[7:0] as the instruction start pointer for next
# sequence.Normally this instruction is used to support Execute-In-Place enhanced mode. See XIP enhanced mode for
# more details.This instruction is only allowed for AHB read commands. There is interrupt status bit set
# (INTR[IPCMDERR] or INTR[AHBCMDERR]) when using this instruction in IP command or AHB write command.
# - CMD_DDR, (33): Transmit command code to Flash.
# - RADDR_DDR, (34): Transmit row address to Flash.
# - CADDR_DDR, (35): Transmit column address to Flash.
# - MODE1_DDR, (36): Transmit mode bits to Flash.
# - MODE2_DDR, (37): Transmit mode bits to Flash.
# - MODE4_DDR, (38): Transmit mode bits to Flash.
# - MODE8_DDR, (39): Transmit mode bits to Flash.
# - WRITE_DDR, (40): Transmit program data to Flash device.
# - READ_DDR, (41): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_DDR, (42): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_DDR, (43): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_DDR, (44): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_DDR, (45): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# Possible options: <STOP, CMD_SDR, RADDR_SDR, CADDR_SDR, MODE1_SDR, MODE2_SDR, MODE4_SDR, MODE8_SDR, WRITE_SDR,
# READ_SDR, LEARN_SDR, DATSZ_SDR, DUMMY_SDR, DUMMY_RWDS_SDR, JMP_ON_CS, CMD_DDR, RADDR_DDR, CADDR_DDR, MODE1_DDR,
# MODE2_DDR, MODE4_DDR, MODE8_DDR, WRITE_DDR, READ_DDR, LEARN_DDR, DATSZ_DDR, DUMMY_DDR, DUMMY_RWDS_DDR>
OPERATION_CODE: STOP
lookupTable_seq9_instr1:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq9_instr2:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq9_instr3:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq9_instr4:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq9_instr5:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq9_instr6:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq9_instr7:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
# ----------------------------------===== lookupTable_seq10_instr0 [Optional] =====-----------------------------------
# Description: Offset: 0x00000120, Width: 16b; Lookup table holds Flash command sequences 10, instruction 0
lookupTable_seq10_instr0:
# ------------------------------------------===== OPERAND [Optional] =====------------------------------------------
# Description: Offset: 0b, Width: 8b, Instruction operand. Its values depends on used instruction
OPERAND: 0
# -----------------------------------------===== NUM_PADS [Optional] =====------------------------------------------
# Description: Offset: 8b, Width: 2b, Number of pads used by instruction. Some instructions ignores this parameter.
# - 1PAD, (0): Single mode. One pad is used.
# - 2PAD, (1): Dual mode. Two pads are used.
# - 4PAD, (2): Quad mode. Four pads are used.
# - 8PAD, (3): Octal mode. Eight pads are used.
# Possible options: <1PAD, 2PAD, 4PAD, 8PAD>
NUM_PADS: 1PAD
# --------------------------------------===== OPERATION_CODE [Optional] =====---------------------------------------
# Description: Offset: 10b, Width: 6b, Instruction operation code.
# - STOP, (0): Stop execution and de-assert CS. Then, the next command sequence (to the same flash device) starts
# from instruction pointer 0.
# - CMD_SDR, (1): Transmit command code to Flash.
# - RADDR_SDR, (2): Transmit row address to Flash.
# - CADDR_SDR, (3): Transmit column address to Flash.
# - MODE1_SDR, (4): Transmit mode bits to Flash.
# - MODE2_SDR, (5): Transmit mode bits to Flash.
# - MODE4_SDR, (6): Transmit mode bits to Flash.
# - MODE8_SDR, (7): Transmit mode bits to Flash.
# - WRITE_SDR, (8): Transmit program data to Flash device.
# - READ_SDR, (9): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_SDR, (10): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_SDR, (11): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_SDR, (12): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_SDR, (13): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# - JMP_ON_CS, (31): Stop execution, de-assert CS and save operand[7:0] as the instruction start pointer for next
# sequence.Normally this instruction is used to support Execute-In-Place enhanced mode. See XIP enhanced mode for
# more details.This instruction is only allowed for AHB read commands. There is interrupt status bit set
# (INTR[IPCMDERR] or INTR[AHBCMDERR]) when using this instruction in IP command or AHB write command.
# - CMD_DDR, (33): Transmit command code to Flash.
# - RADDR_DDR, (34): Transmit row address to Flash.
# - CADDR_DDR, (35): Transmit column address to Flash.
# - MODE1_DDR, (36): Transmit mode bits to Flash.
# - MODE2_DDR, (37): Transmit mode bits to Flash.
# - MODE4_DDR, (38): Transmit mode bits to Flash.
# - MODE8_DDR, (39): Transmit mode bits to Flash.
# - WRITE_DDR, (40): Transmit program data to Flash device.
# - READ_DDR, (41): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_DDR, (42): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_DDR, (43): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_DDR, (44): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_DDR, (45): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# Possible options: <STOP, CMD_SDR, RADDR_SDR, CADDR_SDR, MODE1_SDR, MODE2_SDR, MODE4_SDR, MODE8_SDR, WRITE_SDR,
# READ_SDR, LEARN_SDR, DATSZ_SDR, DUMMY_SDR, DUMMY_RWDS_SDR, JMP_ON_CS, CMD_DDR, RADDR_DDR, CADDR_DDR, MODE1_DDR,
# MODE2_DDR, MODE4_DDR, MODE8_DDR, WRITE_DDR, READ_DDR, LEARN_DDR, DATSZ_DDR, DUMMY_DDR, DUMMY_RWDS_DDR>
OPERATION_CODE: STOP
lookupTable_seq10_instr1:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq10_instr2:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq10_instr3:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq10_instr4:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq10_instr5:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq10_instr6:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq10_instr7:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
# ----------------------------------===== lookupTable_seq11_instr0 [Optional] =====-----------------------------------
# Description: Offset: 0x00000130, Width: 16b; Lookup table holds Flash command sequences 11, instruction 0
lookupTable_seq11_instr0:
# ------------------------------------------===== OPERAND [Optional] =====------------------------------------------
# Description: Offset: 0b, Width: 8b, Instruction operand. Its values depends on used instruction
OPERAND: 0
# -----------------------------------------===== NUM_PADS [Optional] =====------------------------------------------
# Description: Offset: 8b, Width: 2b, Number of pads used by instruction. Some instructions ignores this parameter.
# - 1PAD, (0): Single mode. One pad is used.
# - 2PAD, (1): Dual mode. Two pads are used.
# - 4PAD, (2): Quad mode. Four pads are used.
# - 8PAD, (3): Octal mode. Eight pads are used.
# Possible options: <1PAD, 2PAD, 4PAD, 8PAD>
NUM_PADS: 1PAD
# --------------------------------------===== OPERATION_CODE [Optional] =====---------------------------------------
# Description: Offset: 10b, Width: 6b, Instruction operation code.
# - STOP, (0): Stop execution and de-assert CS. Then, the next command sequence (to the same flash device) starts
# from instruction pointer 0.
# - CMD_SDR, (1): Transmit command code to Flash.
# - RADDR_SDR, (2): Transmit row address to Flash.
# - CADDR_SDR, (3): Transmit column address to Flash.
# - MODE1_SDR, (4): Transmit mode bits to Flash.
# - MODE2_SDR, (5): Transmit mode bits to Flash.
# - MODE4_SDR, (6): Transmit mode bits to Flash.
# - MODE8_SDR, (7): Transmit mode bits to Flash.
# - WRITE_SDR, (8): Transmit program data to Flash device.
# - READ_SDR, (9): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_SDR, (10): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_SDR, (11): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_SDR, (12): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_SDR, (13): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# - JMP_ON_CS, (31): Stop execution, de-assert CS and save operand[7:0] as the instruction start pointer for next
# sequence.Normally this instruction is used to support Execute-In-Place enhanced mode. See XIP enhanced mode for
# more details.This instruction is only allowed for AHB read commands. There is interrupt status bit set
# (INTR[IPCMDERR] or INTR[AHBCMDERR]) when using this instruction in IP command or AHB write command.
# - CMD_DDR, (33): Transmit command code to Flash.
# - RADDR_DDR, (34): Transmit row address to Flash.
# - CADDR_DDR, (35): Transmit column address to Flash.
# - MODE1_DDR, (36): Transmit mode bits to Flash.
# - MODE2_DDR, (37): Transmit mode bits to Flash.
# - MODE4_DDR, (38): Transmit mode bits to Flash.
# - MODE8_DDR, (39): Transmit mode bits to Flash.
# - WRITE_DDR, (40): Transmit program data to Flash device.
# - READ_DDR, (41): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_DDR, (42): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_DDR, (43): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_DDR, (44): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_DDR, (45): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# Possible options: <STOP, CMD_SDR, RADDR_SDR, CADDR_SDR, MODE1_SDR, MODE2_SDR, MODE4_SDR, MODE8_SDR, WRITE_SDR,
# READ_SDR, LEARN_SDR, DATSZ_SDR, DUMMY_SDR, DUMMY_RWDS_SDR, JMP_ON_CS, CMD_DDR, RADDR_DDR, CADDR_DDR, MODE1_DDR,
# MODE2_DDR, MODE4_DDR, MODE8_DDR, WRITE_DDR, READ_DDR, LEARN_DDR, DATSZ_DDR, DUMMY_DDR, DUMMY_RWDS_DDR>
OPERATION_CODE: STOP
lookupTable_seq11_instr1:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq11_instr2:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq11_instr3:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq11_instr4:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq11_instr5:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq11_instr6:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq11_instr7:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
# ----------------------------------===== lookupTable_seq12_instr0 [Optional] =====-----------------------------------
# Description: Offset: 0x00000140, Width: 16b; Lookup table holds Flash command sequences 12, instruction 0
lookupTable_seq12_instr0:
# ------------------------------------------===== OPERAND [Optional] =====------------------------------------------
# Description: Offset: 0b, Width: 8b, Instruction operand. Its values depends on used instruction
OPERAND: 0
# -----------------------------------------===== NUM_PADS [Optional] =====------------------------------------------
# Description: Offset: 8b, Width: 2b, Number of pads used by instruction. Some instructions ignores this parameter.
# - 1PAD, (0): Single mode. One pad is used.
# - 2PAD, (1): Dual mode. Two pads are used.
# - 4PAD, (2): Quad mode. Four pads are used.
# - 8PAD, (3): Octal mode. Eight pads are used.
# Possible options: <1PAD, 2PAD, 4PAD, 8PAD>
NUM_PADS: 1PAD
# --------------------------------------===== OPERATION_CODE [Optional] =====---------------------------------------
# Description: Offset: 10b, Width: 6b, Instruction operation code.
# - STOP, (0): Stop execution and de-assert CS. Then, the next command sequence (to the same flash device) starts
# from instruction pointer 0.
# - CMD_SDR, (1): Transmit command code to Flash.
# - RADDR_SDR, (2): Transmit row address to Flash.
# - CADDR_SDR, (3): Transmit column address to Flash.
# - MODE1_SDR, (4): Transmit mode bits to Flash.
# - MODE2_SDR, (5): Transmit mode bits to Flash.
# - MODE4_SDR, (6): Transmit mode bits to Flash.
# - MODE8_SDR, (7): Transmit mode bits to Flash.
# - WRITE_SDR, (8): Transmit program data to Flash device.
# - READ_SDR, (9): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_SDR, (10): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_SDR, (11): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_SDR, (12): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_SDR, (13): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# - JMP_ON_CS, (31): Stop execution, de-assert CS and save operand[7:0] as the instruction start pointer for next
# sequence.Normally this instruction is used to support Execute-In-Place enhanced mode. See XIP enhanced mode for
# more details.This instruction is only allowed for AHB read commands. There is interrupt status bit set
# (INTR[IPCMDERR] or INTR[AHBCMDERR]) when using this instruction in IP command or AHB write command.
# - CMD_DDR, (33): Transmit command code to Flash.
# - RADDR_DDR, (34): Transmit row address to Flash.
# - CADDR_DDR, (35): Transmit column address to Flash.
# - MODE1_DDR, (36): Transmit mode bits to Flash.
# - MODE2_DDR, (37): Transmit mode bits to Flash.
# - MODE4_DDR, (38): Transmit mode bits to Flash.
# - MODE8_DDR, (39): Transmit mode bits to Flash.
# - WRITE_DDR, (40): Transmit program data to Flash device.
# - READ_DDR, (41): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_DDR, (42): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_DDR, (43): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_DDR, (44): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_DDR, (45): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# Possible options: <STOP, CMD_SDR, RADDR_SDR, CADDR_SDR, MODE1_SDR, MODE2_SDR, MODE4_SDR, MODE8_SDR, WRITE_SDR,
# READ_SDR, LEARN_SDR, DATSZ_SDR, DUMMY_SDR, DUMMY_RWDS_SDR, JMP_ON_CS, CMD_DDR, RADDR_DDR, CADDR_DDR, MODE1_DDR,
# MODE2_DDR, MODE4_DDR, MODE8_DDR, WRITE_DDR, READ_DDR, LEARN_DDR, DATSZ_DDR, DUMMY_DDR, DUMMY_RWDS_DDR>
OPERATION_CODE: STOP
lookupTable_seq12_instr1:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq12_instr2:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq12_instr3:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq12_instr4:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq12_instr5:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq12_instr6:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq12_instr7:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
# ----------------------------------===== lookupTable_seq13_instr0 [Optional] =====-----------------------------------
# Description: Offset: 0x00000150, Width: 16b; Lookup table holds Flash command sequences 13, instruction 0
lookupTable_seq13_instr0:
# ------------------------------------------===== OPERAND [Optional] =====------------------------------------------
# Description: Offset: 0b, Width: 8b, Instruction operand. Its values depends on used instruction
OPERAND: 0
# -----------------------------------------===== NUM_PADS [Optional] =====------------------------------------------
# Description: Offset: 8b, Width: 2b, Number of pads used by instruction. Some instructions ignores this parameter.
# - 1PAD, (0): Single mode. One pad is used.
# - 2PAD, (1): Dual mode. Two pads are used.
# - 4PAD, (2): Quad mode. Four pads are used.
# - 8PAD, (3): Octal mode. Eight pads are used.
# Possible options: <1PAD, 2PAD, 4PAD, 8PAD>
NUM_PADS: 1PAD
# --------------------------------------===== OPERATION_CODE [Optional] =====---------------------------------------
# Description: Offset: 10b, Width: 6b, Instruction operation code.
# - STOP, (0): Stop execution and de-assert CS. Then, the next command sequence (to the same flash device) starts
# from instruction pointer 0.
# - CMD_SDR, (1): Transmit command code to Flash.
# - RADDR_SDR, (2): Transmit row address to Flash.
# - CADDR_SDR, (3): Transmit column address to Flash.
# - MODE1_SDR, (4): Transmit mode bits to Flash.
# - MODE2_SDR, (5): Transmit mode bits to Flash.
# - MODE4_SDR, (6): Transmit mode bits to Flash.
# - MODE8_SDR, (7): Transmit mode bits to Flash.
# - WRITE_SDR, (8): Transmit program data to Flash device.
# - READ_SDR, (9): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_SDR, (10): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_SDR, (11): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_SDR, (12): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_SDR, (13): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# - JMP_ON_CS, (31): Stop execution, de-assert CS and save operand[7:0] as the instruction start pointer for next
# sequence.Normally this instruction is used to support Execute-In-Place enhanced mode. See XIP enhanced mode for
# more details.This instruction is only allowed for AHB read commands. There is interrupt status bit set
# (INTR[IPCMDERR] or INTR[AHBCMDERR]) when using this instruction in IP command or AHB write command.
# - CMD_DDR, (33): Transmit command code to Flash.
# - RADDR_DDR, (34): Transmit row address to Flash.
# - CADDR_DDR, (35): Transmit column address to Flash.
# - MODE1_DDR, (36): Transmit mode bits to Flash.
# - MODE2_DDR, (37): Transmit mode bits to Flash.
# - MODE4_DDR, (38): Transmit mode bits to Flash.
# - MODE8_DDR, (39): Transmit mode bits to Flash.
# - WRITE_DDR, (40): Transmit program data to Flash device.
# - READ_DDR, (41): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_DDR, (42): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_DDR, (43): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_DDR, (44): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_DDR, (45): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# Possible options: <STOP, CMD_SDR, RADDR_SDR, CADDR_SDR, MODE1_SDR, MODE2_SDR, MODE4_SDR, MODE8_SDR, WRITE_SDR,
# READ_SDR, LEARN_SDR, DATSZ_SDR, DUMMY_SDR, DUMMY_RWDS_SDR, JMP_ON_CS, CMD_DDR, RADDR_DDR, CADDR_DDR, MODE1_DDR,
# MODE2_DDR, MODE4_DDR, MODE8_DDR, WRITE_DDR, READ_DDR, LEARN_DDR, DATSZ_DDR, DUMMY_DDR, DUMMY_RWDS_DDR>
OPERATION_CODE: STOP
lookupTable_seq13_instr1:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq13_instr2:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq13_instr3:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq13_instr4:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq13_instr5:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq13_instr6:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq13_instr7:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
# ----------------------------------===== lookupTable_seq14_instr0 [Optional] =====-----------------------------------
# Description: Offset: 0x00000160, Width: 16b; Lookup table holds Flash command sequences 14, instruction 0
lookupTable_seq14_instr0:
# ------------------------------------------===== OPERAND [Optional] =====------------------------------------------
# Description: Offset: 0b, Width: 8b, Instruction operand. Its values depends on used instruction
OPERAND: 0
# -----------------------------------------===== NUM_PADS [Optional] =====------------------------------------------
# Description: Offset: 8b, Width: 2b, Number of pads used by instruction. Some instructions ignores this parameter.
# - 1PAD, (0): Single mode. One pad is used.
# - 2PAD, (1): Dual mode. Two pads are used.
# - 4PAD, (2): Quad mode. Four pads are used.
# - 8PAD, (3): Octal mode. Eight pads are used.
# Possible options: <1PAD, 2PAD, 4PAD, 8PAD>
NUM_PADS: 1PAD
# --------------------------------------===== OPERATION_CODE [Optional] =====---------------------------------------
# Description: Offset: 10b, Width: 6b, Instruction operation code.
# - STOP, (0): Stop execution and de-assert CS. Then, the next command sequence (to the same flash device) starts
# from instruction pointer 0.
# - CMD_SDR, (1): Transmit command code to Flash.
# - RADDR_SDR, (2): Transmit row address to Flash.
# - CADDR_SDR, (3): Transmit column address to Flash.
# - MODE1_SDR, (4): Transmit mode bits to Flash.
# - MODE2_SDR, (5): Transmit mode bits to Flash.
# - MODE4_SDR, (6): Transmit mode bits to Flash.
# - MODE8_SDR, (7): Transmit mode bits to Flash.
# - WRITE_SDR, (8): Transmit program data to Flash device.
# - READ_SDR, (9): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_SDR, (10): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_SDR, (11): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_SDR, (12): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_SDR, (13): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# - JMP_ON_CS, (31): Stop execution, de-assert CS and save operand[7:0] as the instruction start pointer for next
# sequence.Normally this instruction is used to support Execute-In-Place enhanced mode. See XIP enhanced mode for
# more details.This instruction is only allowed for AHB read commands. There is interrupt status bit set
# (INTR[IPCMDERR] or INTR[AHBCMDERR]) when using this instruction in IP command or AHB write command.
# - CMD_DDR, (33): Transmit command code to Flash.
# - RADDR_DDR, (34): Transmit row address to Flash.
# - CADDR_DDR, (35): Transmit column address to Flash.
# - MODE1_DDR, (36): Transmit mode bits to Flash.
# - MODE2_DDR, (37): Transmit mode bits to Flash.
# - MODE4_DDR, (38): Transmit mode bits to Flash.
# - MODE8_DDR, (39): Transmit mode bits to Flash.
# - WRITE_DDR, (40): Transmit program data to Flash device.
# - READ_DDR, (41): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_DDR, (42): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_DDR, (43): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_DDR, (44): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_DDR, (45): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# Possible options: <STOP, CMD_SDR, RADDR_SDR, CADDR_SDR, MODE1_SDR, MODE2_SDR, MODE4_SDR, MODE8_SDR, WRITE_SDR,
# READ_SDR, LEARN_SDR, DATSZ_SDR, DUMMY_SDR, DUMMY_RWDS_SDR, JMP_ON_CS, CMD_DDR, RADDR_DDR, CADDR_DDR, MODE1_DDR,
# MODE2_DDR, MODE4_DDR, MODE8_DDR, WRITE_DDR, READ_DDR, LEARN_DDR, DATSZ_DDR, DUMMY_DDR, DUMMY_RWDS_DDR>
OPERATION_CODE: STOP
lookupTable_seq14_instr1:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq14_instr2:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq14_instr3:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq14_instr4:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq14_instr5:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq14_instr6:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq14_instr7:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
# ----------------------------------===== lookupTable_seq15_instr0 [Optional] =====-----------------------------------
# Description: Offset: 0x00000170, Width: 16b; Lookup table holds Flash command sequences 15, instruction 0
lookupTable_seq15_instr0:
# ------------------------------------------===== OPERAND [Optional] =====------------------------------------------
# Description: Offset: 0b, Width: 8b, Instruction operand. Its values depends on used instruction
OPERAND: 0
# -----------------------------------------===== NUM_PADS [Optional] =====------------------------------------------
# Description: Offset: 8b, Width: 2b, Number of pads used by instruction. Some instructions ignores this parameter.
# - 1PAD, (0): Single mode. One pad is used.
# - 2PAD, (1): Dual mode. Two pads are used.
# - 4PAD, (2): Quad mode. Four pads are used.
# - 8PAD, (3): Octal mode. Eight pads are used.
# Possible options: <1PAD, 2PAD, 4PAD, 8PAD>
NUM_PADS: 1PAD
# --------------------------------------===== OPERATION_CODE [Optional] =====---------------------------------------
# Description: Offset: 10b, Width: 6b, Instruction operation code.
# - STOP, (0): Stop execution and de-assert CS. Then, the next command sequence (to the same flash device) starts
# from instruction pointer 0.
# - CMD_SDR, (1): Transmit command code to Flash.
# - RADDR_SDR, (2): Transmit row address to Flash.
# - CADDR_SDR, (3): Transmit column address to Flash.
# - MODE1_SDR, (4): Transmit mode bits to Flash.
# - MODE2_SDR, (5): Transmit mode bits to Flash.
# - MODE4_SDR, (6): Transmit mode bits to Flash.
# - MODE8_SDR, (7): Transmit mode bits to Flash.
# - WRITE_SDR, (8): Transmit program data to Flash device.
# - READ_SDR, (9): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_SDR, (10): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_SDR, (11): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_SDR, (12): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_SDR, (13): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# - JMP_ON_CS, (31): Stop execution, de-assert CS and save operand[7:0] as the instruction start pointer for next
# sequence.Normally this instruction is used to support Execute-In-Place enhanced mode. See XIP enhanced mode for
# more details.This instruction is only allowed for AHB read commands. There is interrupt status bit set
# (INTR[IPCMDERR] or INTR[AHBCMDERR]) when using this instruction in IP command or AHB write command.
# - CMD_DDR, (33): Transmit command code to Flash.
# - RADDR_DDR, (34): Transmit row address to Flash.
# - CADDR_DDR, (35): Transmit column address to Flash.
# - MODE1_DDR, (36): Transmit mode bits to Flash.
# - MODE2_DDR, (37): Transmit mode bits to Flash.
# - MODE4_DDR, (38): Transmit mode bits to Flash.
# - MODE8_DDR, (39): Transmit mode bits to Flash.
# - WRITE_DDR, (40): Transmit program data to Flash device.
# - READ_DDR, (41): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_DDR, (42): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_DDR, (43): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_DDR, (44): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_DDR, (45): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# Possible options: <STOP, CMD_SDR, RADDR_SDR, CADDR_SDR, MODE1_SDR, MODE2_SDR, MODE4_SDR, MODE8_SDR, WRITE_SDR,
# READ_SDR, LEARN_SDR, DATSZ_SDR, DUMMY_SDR, DUMMY_RWDS_SDR, JMP_ON_CS, CMD_DDR, RADDR_DDR, CADDR_DDR, MODE1_DDR,
# MODE2_DDR, MODE4_DDR, MODE8_DDR, WRITE_DDR, READ_DDR, LEARN_DDR, DATSZ_DDR, DUMMY_DDR, DUMMY_RWDS_DDR>
OPERATION_CODE: STOP
lookupTable_seq15_instr1:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq15_instr2:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq15_instr3:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq15_instr4:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq15_instr5:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq15_instr6:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq15_instr7:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
# ---------------------------------------===== lutCustomSeq_0 [Optional] =====----------------------------------------
# Description: Offset: 0x00000180, Width: 32b; [0x180-0x1af] Customizable LUT Sequences
lutCustomSeq_0:
# ------------------------------------------===== seqNum [Optional] =====-------------------------------------------
# Description: Offset: 0b, Width: 8b, Sequence Number, valid number: 1-16
seqNum: 0
# -------------------------------------------===== seqId [Optional] =====-------------------------------------------
# Description: Offset: 8b, Width: 8b, Sequence Index, valid number: 0-15
seqId: 0
# -----------------------------------------===== reserved [Optional] =====------------------------------------------
# Description: Offset: 16b, Width: 16b, Reserved
reserved: 0
# ---------------------------------------===== lutCustomSeq_1 [Optional] =====----------------------------------------
# Description: Offset: 0x00000184, Width: 32b; [0x180-0x1af] Customizable LUT Sequences
lutCustomSeq_1:
# ------------------------------------------===== seqNum [Optional] =====-------------------------------------------
# Description: Offset: 0b, Width: 8b, Sequence Number, valid number: 1-16
seqNum: 0
# -------------------------------------------===== seqId [Optional] =====-------------------------------------------
# Description: Offset: 8b, Width: 8b, Sequence Index, valid number: 0-15
seqId: 0
# -----------------------------------------===== reserved [Optional] =====------------------------------------------
# Description: Offset: 16b, Width: 16b, Reserved
reserved: 0
# ---------------------------------------===== lutCustomSeq_2 [Optional] =====----------------------------------------
# Description: Offset: 0x00000188, Width: 32b; [0x180-0x1af] Customizable LUT Sequences
lutCustomSeq_2:
# ------------------------------------------===== seqNum [Optional] =====-------------------------------------------
# Description: Offset: 0b, Width: 8b, Sequence Number, valid number: 1-16
seqNum: 0
# -------------------------------------------===== seqId [Optional] =====-------------------------------------------
# Description: Offset: 8b, Width: 8b, Sequence Index, valid number: 0-15
seqId: 0
# -----------------------------------------===== reserved [Optional] =====------------------------------------------
# Description: Offset: 16b, Width: 16b, Reserved
reserved: 0
# ---------------------------------------===== lutCustomSeq_3 [Optional] =====----------------------------------------
# Description: Offset: 0x0000018C, Width: 32b; [0x180-0x1af] Customizable LUT Sequences
lutCustomSeq_3:
# ------------------------------------------===== seqNum [Optional] =====-------------------------------------------
# Description: Offset: 0b, Width: 8b, Sequence Number, valid number: 1-16
seqNum: 0
# -------------------------------------------===== seqId [Optional] =====-------------------------------------------
# Description: Offset: 8b, Width: 8b, Sequence Index, valid number: 0-15
seqId: 0
# -----------------------------------------===== reserved [Optional] =====------------------------------------------
# Description: Offset: 16b, Width: 16b, Reserved
reserved: 0
# ---------------------------------------===== lutCustomSeq_4 [Optional] =====----------------------------------------
# Description: Offset: 0x00000190, Width: 32b; [0x180-0x1af] Customizable LUT Sequences
lutCustomSeq_4:
# ------------------------------------------===== seqNum [Optional] =====-------------------------------------------
# Description: Offset: 0b, Width: 8b, Sequence Number, valid number: 1-16
seqNum: 0
# -------------------------------------------===== seqId [Optional] =====-------------------------------------------
# Description: Offset: 8b, Width: 8b, Sequence Index, valid number: 0-15
seqId: 0
# -----------------------------------------===== reserved [Optional] =====------------------------------------------
# Description: Offset: 16b, Width: 16b, Reserved
reserved: 0
# ---------------------------------------===== lutCustomSeq_5 [Optional] =====----------------------------------------
# Description: Offset: 0x00000194, Width: 32b; [0x180-0x1af] Customizable LUT Sequences
lutCustomSeq_5:
# ------------------------------------------===== seqNum [Optional] =====-------------------------------------------
# Description: Offset: 0b, Width: 8b, Sequence Number, valid number: 1-16
seqNum: 0
# -------------------------------------------===== seqId [Optional] =====-------------------------------------------
# Description: Offset: 8b, Width: 8b, Sequence Index, valid number: 0-15
seqId: 0
# -----------------------------------------===== reserved [Optional] =====------------------------------------------
# Description: Offset: 16b, Width: 16b, Reserved
reserved: 0
# ---------------------------------------===== lutCustomSeq_6 [Optional] =====----------------------------------------
# Description: Offset: 0x00000198, Width: 32b; [0x180-0x1af] Customizable LUT Sequences
lutCustomSeq_6:
# ------------------------------------------===== seqNum [Optional] =====-------------------------------------------
# Description: Offset: 0b, Width: 8b, Sequence Number, valid number: 1-16
seqNum: 0
# -------------------------------------------===== seqId [Optional] =====-------------------------------------------
# Description: Offset: 8b, Width: 8b, Sequence Index, valid number: 0-15
seqId: 0
# -----------------------------------------===== reserved [Optional] =====------------------------------------------
# Description: Offset: 16b, Width: 16b, Reserved
reserved: 0
# ---------------------------------------===== lutCustomSeq_7 [Optional] =====----------------------------------------
# Description: Offset: 0x0000019C, Width: 32b; [0x180-0x1af] Customizable LUT Sequences
lutCustomSeq_7:
# ------------------------------------------===== seqNum [Optional] =====-------------------------------------------
# Description: Offset: 0b, Width: 8b, Sequence Number, valid number: 1-16
seqNum: 0
# -------------------------------------------===== seqId [Optional] =====-------------------------------------------
# Description: Offset: 8b, Width: 8b, Sequence Index, valid number: 0-15
seqId: 0
# -----------------------------------------===== reserved [Optional] =====------------------------------------------
# Description: Offset: 16b, Width: 16b, Reserved
reserved: 0
# ---------------------------------------===== lutCustomSeq_8 [Optional] =====----------------------------------------
# Description: Offset: 0x000001A0, Width: 32b; [0x180-0x1af] Customizable LUT Sequences
lutCustomSeq_8:
# ------------------------------------------===== seqNum [Optional] =====-------------------------------------------
# Description: Offset: 0b, Width: 8b, Sequence Number, valid number: 1-16
seqNum: 0
# -------------------------------------------===== seqId [Optional] =====-------------------------------------------
# Description: Offset: 8b, Width: 8b, Sequence Index, valid number: 0-15
seqId: 0
# -----------------------------------------===== reserved [Optional] =====------------------------------------------
# Description: Offset: 16b, Width: 16b, Reserved
reserved: 0
# ---------------------------------------===== lutCustomSeq_9 [Optional] =====----------------------------------------
# Description: Offset: 0x000001A4, Width: 32b; [0x180-0x1af] Customizable LUT Sequences
lutCustomSeq_9:
# ------------------------------------------===== seqNum [Optional] =====-------------------------------------------
# Description: Offset: 0b, Width: 8b, Sequence Number, valid number: 1-16
seqNum: 0
# -------------------------------------------===== seqId [Optional] =====-------------------------------------------
# Description: Offset: 8b, Width: 8b, Sequence Index, valid number: 0-15
seqId: 0
# -----------------------------------------===== reserved [Optional] =====------------------------------------------
# Description: Offset: 16b, Width: 16b, Reserved
reserved: 0
# ---------------------------------------===== lutCustomSeq_10 [Optional] =====---------------------------------------
# Description: Offset: 0x000001A8, Width: 32b; [0x180-0x1af] Customizable LUT Sequences
lutCustomSeq_10:
# ------------------------------------------===== seqNum [Optional] =====-------------------------------------------
# Description: Offset: 0b, Width: 8b, Sequence Number, valid number: 1-16
seqNum: 0
# -------------------------------------------===== seqId [Optional] =====-------------------------------------------
# Description: Offset: 8b, Width: 8b, Sequence Index, valid number: 0-15
seqId: 0
# -----------------------------------------===== reserved [Optional] =====------------------------------------------
# Description: Offset: 16b, Width: 16b, Reserved
reserved: 0
# ---------------------------------------===== lutCustomSeq_11 [Optional] =====---------------------------------------
# Description: Offset: 0x000001AC, Width: 32b; [0x180-0x1af] Customizable LUT Sequences
lutCustomSeq_11:
# ------------------------------------------===== seqNum [Optional] =====-------------------------------------------
# Description: Offset: 0b, Width: 8b, Sequence Number, valid number: 1-16
seqNum: 0
# -------------------------------------------===== seqId [Optional] =====-------------------------------------------
# Description: Offset: 8b, Width: 8b, Sequence Index, valid number: 0-15
seqId: 0
# -----------------------------------------===== reserved [Optional] =====------------------------------------------
# Description: Offset: 16b, Width: 16b, Reserved
reserved: 0
# -----------------------------------------===== reserved4_0 [Optional] =====-----------------------------------------
# Description: Offset: 0x000001B0, Width: 32b; [0x1b0-0x1bf] Reserved for future use
reserved4_0: '0x00000000'
# -----------------------------------------===== reserved4_1 [Optional] =====-----------------------------------------
# Description: Offset: 0x000001B4, Width: 32b; [0x1b0-0x1bf] Reserved for future use
reserved4_1: '0x00000000'
# -----------------------------------------===== reserved4_2 [Optional] =====-----------------------------------------
# Description: Offset: 0x000001B8, Width: 32b; [0x1b0-0x1bf] Reserved for future use
reserved4_2: '0x00000000'
# -----------------------------------------===== reserved4_3 [Optional] =====-----------------------------------------
# Description: Offset: 0x000001BC, Width: 32b; [0x1b0-0x1bf] Reserved for future use
reserved4_3: '0x00000000'
# ------------------------------------------===== pageSize [Optional] =====-------------------------------------------
# Description: Offset: 0x000001C0, Width: 32b; Page size of Serial NOR
pageSize: '0x00000000'
# -----------------------------------------===== sectorSize [Optional] =====------------------------------------------
# Description: Offset: 0x000001C4, Width: 32b; Sector size of Serial NOR
sectorSize: '0x00000000'
# -------------------------------------===== ipcmdSerialClkFreq [Optional] =====--------------------------------------
# Description: Offset: 0x000001C8, Width: 8b; Clock frequency for IP command
ipcmdSerialClkFreq: '0x00'
# -------------------------------------===== isUniformBlockSize [Optional] =====--------------------------------------
# Description: Offset: 0x000001C9, Width: 8b; Sector/Block size is the same
isUniformBlockSize: '0x00'
# -------------------------------------===== isDataOrderSwapped [Optional] =====--------------------------------------
# Description: Offset: 0x000001CA, Width: 8b; Data order (D0, D1, D2, D3) is swapped (D1,D0, D3, D2)
isDataOrderSwapped: '0x00'
# -----------------------------------------===== reserved0_0 [Optional] =====-----------------------------------------
# Description: Offset: 0x000001CB, Width: 8b; Reserved for future use
reserved0_0: '0x00'
# ----------------------------------------===== serialNorType [Optional] =====----------------------------------------
# Description: Offset: 0x000001CC, Width: 8b; Serial NOR Flash type: 0/1/2/3
serialNorType: '0x00'
# --------------------------------------===== needExitNoCmdMode [Optional] =====--------------------------------------
# Description: Offset: 0x000001CD, Width: 8b; Need to exit NoCmd mode before other IP command
needExitNoCmdMode: '0x00'
# ------------------------------------===== halfClkForNonReadCmd [Optional] =====-------------------------------------
# Description: Offset: 0x000001CE, Width: 8b; Half the Serial Clock for non-read command: true/false
halfClkForNonReadCmd: '0x00'
# ------------------------------------===== needRestoreNoCmdMode [Optional] =====-------------------------------------
# Description: Offset: 0x000001CF, Width: 8b; Need to Restore NoCmd mode after IP command execution
needRestoreNoCmdMode: '0x00'
# ------------------------------------------===== blockSize [Optional] =====------------------------------------------
# Description: Offset: 0x000001D0, Width: 32b; Block size
blockSize: '0x00000000'
# ----------------------------------------===== flashStateCtx [Optional] =====----------------------------------------
# Description: Offset: 0x000001D4, Width: 32b; Flash State Context
flashStateCtx: '0x00000000'
# -----------------------------------------===== reserve2_0 [Optional] =====------------------------------------------
# Description: Offset: 0x000001D8, Width: 32b; Reserved for future use
reserve2_0: '0x00000000'
# -----------------------------------------===== reserve2_1 [Optional] =====------------------------------------------
# Description: Offset: 0x000001DC, Width: 32b; Reserved for future use
reserve2_1: '0x00000000'
# -----------------------------------------===== reserve2_2 [Optional] =====------------------------------------------
# Description: Offset: 0x000001E0, Width: 32b; Reserved for future use
reserve2_2: '0x00000000'
# -----------------------------------------===== reserve2_3 [Optional] =====------------------------------------------
# Description: Offset: 0x000001E4, Width: 32b; Reserved for future use
reserve2_3: '0x00000000'
# -----------------------------------------===== reserve2_4 [Optional] =====------------------------------------------
# Description: Offset: 0x000001E8, Width: 32b; Reserved for future use
reserve2_4: '0x00000000'
# -----------------------------------------===== reserve2_5 [Optional] =====------------------------------------------
# Description: Offset: 0x000001EC, Width: 32b; Reserved for future use
reserve2_5: '0x00000000'
# -----------------------------------------===== reserve2_6 [Optional] =====------------------------------------------
# Description: Offset: 0x000001F0, Width: 32b; Reserved for future use
reserve2_6: '0x00000000'
# -----------------------------------------===== reserve2_7 [Optional] =====------------------------------------------
# Description: Offset: 0x000001F4, Width: 32b; Reserved for future use
reserve2_7: '0x00000000'
# -----------------------------------------===== reserve2_8 [Optional] =====------------------------------------------
# Description: Offset: 0x000001F8, Width: 32b; Reserved for future use
reserve2_8: '0x00000000'
# -----------------------------------------===== reserve2_9 [Optional] =====------------------------------------------
# Description: Offset: 0x000001FC, Width: 32b; Reserved for future use
reserve2_9: '0x00000000'
FCB for rw612, Revision: a2 and flexspi_nor#
FCB for rw612, Revision: a2 and flexspi_nor JSON schema
FCB for rw612, Revision: a2 and flexspi_nor YAML configuration template
# =================================== FCB for rw612, Revision: a2 and flexspi_nor ====================================
# ======================================================================================================================
# == FCB for rw612, Revision: a2 and flexspi_nor ==
# ======================================================================================================================
# -------------------------------------===== The chip family name [Required] =====--------------------------------------
# Description: NXP chip family identifier.
family: CHOOSE_FROM_TABLE
# -----------------------------------------===== MCU revision [Optional] =====------------------------------------------
# Description: Revision of silicon. The 'latest' name, means most current revision.
# Possible options: <a1, a2, latest>
revision: a2
# ------------------------------------------===== Memory type [Required] =====------------------------------------------
# Description: Specify type of memory used by FCB description.
# Possible options: <flexspi_nor>
type: flexspi_nor
# ---------------------------------------------===== rw612 [Required] =====---------------------------------------------
fcb_settings:
# ---------------------------------------------===== tag [Optional] =====---------------------------------------------
# Description: Offset: 0x00000000, Width: 32b; [0x000-0x003] Tag, fixed value 0x42464346UL
tag: '0x42464346'
# -------------------------------------------===== version [Optional] =====-------------------------------------------
# Description: Offset: 0x00000004, Width: 32b; [0x004-0x007] Version,[31:24] -'V', [23:16] - Major, [15:8] - Minor,
# [7:0] - bugfix
version: '0x56010400'
# ------------------------------------------===== reserved0 [Optional] =====------------------------------------------
# Description: Offset: 0x00000008, Width: 32b; [0x008-0x00b] Reserved for future use
reserved0: '0x00000000'
# --------------------------------------===== readSampleClkSrc [Optional] =====---------------------------------------
# Description: Offset: 0x0000000C, Width: 8b; [0x00c-0x00c] Read Sample Clock Source, valid value: 0/1/3
readSampleClkSrc: '0x00'
# -----------------------------------------===== csHoldTime [Optional] =====------------------------------------------
# Description: Offset: 0x0000000D, Width: 8b; [0x00d-0x00d] CS hold time, default value: 3
csHoldTime: '0x00'
# -----------------------------------------===== csSetupTime [Optional] =====-----------------------------------------
# Description: Offset: 0x0000000E, Width: 8b; [0x00e-0x00e] CS setup time, default value: 3
csSetupTime: '0x00'
# -------------------------------------===== columnAddressWidth [Optional] =====--------------------------------------
# Description: Offset: 0x0000000F, Width: 8b; [0x00f-0x00f] Column Address with, for HyperBus protocol, it is fixed
# to 3, For Serial NAND, need to refer to datasheet
columnAddressWidth: '0x00'
# -------------------------------------===== deviceModeCfgEnable [Optional] =====-------------------------------------
# Description: Offset: 0x00000010, Width: 8b; [0x010-0x010] Device Mode Configure enable flag, 1 - Enable, 0 -
# Disable
deviceModeCfgEnable: '0x00'
# ---------------------------------------===== deviceModeType [Optional] =====----------------------------------------
# Description: Offset: 0x00000011, Width: 8b; [0x011-0x011] Specify the configuration command type:Quad Enable,
# DPI/QPI/OPI switch, Generic configuration, etc.
deviceModeType: '0x00'
# -------------------------------------===== waitTimeCfgCommands [Optional] =====-------------------------------------
# Description: Offset: 0x00000012, Width: 16b; [0x012-0x013] Wait time for all configuration commands, unit: 100us,
# Used for DPI/QPI/OPI switch or reset command
waitTimeCfgCommands: '0x0000'
# ----------------------------------------===== deviceModeSeq [Optional] =====----------------------------------------
# Description: Offset: 0x00000014, Width: 32b; [0x014-0x017] Device mode sequence info, [7:0] - LUT sequence id,
# [15:8] - LUt sequence number, [31:16] Reserved
deviceModeSeq:
# ------------------------------------------===== seqNum [Optional] =====-------------------------------------------
# Description: Offset: 0b, Width: 8b, Sequence Number, valid number: 1-16
seqNum: 0
# -------------------------------------------===== seqId [Optional] =====-------------------------------------------
# Description: Offset: 8b, Width: 8b, Sequence Index, valid number: 0-15
seqId: 0
# -----------------------------------------===== reserved [Optional] =====------------------------------------------
# Description: Offset: 16b, Width: 16b, Reserved
reserved: 0
# ----------------------------------------===== deviceModeArg [Optional] =====----------------------------------------
# Description: Offset: 0x00000018, Width: 32b; [0x018-0x01b] Argument/Parameter for device configuration
deviceModeArg: '0x00000000'
# ---------------------------------------===== configCmdEnable [Optional] =====---------------------------------------
# Description: Offset: 0x0000001C, Width: 8b; [0x01c-0x01c] Configure command Enable Flag, 1 - Enable, 0 - Disable
configCmdEnable: '0x00'
# --------------------------------------===== configModeType_0 [Optional] =====---------------------------------------
# Description: Offset: 0x0000001D, Width: 8b; [0x01d-0x01f] Configure Mode Type, similar as deviceModeTpe
configModeType_0: '0x00'
# --------------------------------------===== configModeType_1 [Optional] =====---------------------------------------
# Description: Offset: 0x0000001E, Width: 8b; [0x01d-0x01f] Configure Mode Type, similar as deviceModeTpe
configModeType_1: '0x00'
# --------------------------------------===== configModeType_2 [Optional] =====---------------------------------------
# Description: Offset: 0x0000001F, Width: 8b; [0x01d-0x01f] Configure Mode Type, similar as deviceModeTpe
configModeType_2: '0x00'
# ---------------------------------------===== configCmdSeqs_0 [Optional] =====---------------------------------------
# Description: Offset: 0x00000020, Width: 32b; [0x020-0x02b] Sequence info for Device Configuration command, similar
# as deviceModeSeq
configCmdSeqs_0:
# ------------------------------------------===== seqNum [Optional] =====-------------------------------------------
# Description: Offset: 0b, Width: 8b, Sequence Number, valid number: 1-16
seqNum: 0
# -------------------------------------------===== seqId [Optional] =====-------------------------------------------
# Description: Offset: 8b, Width: 8b, Sequence Index, valid number: 0-15
seqId: 0
# -----------------------------------------===== reserved [Optional] =====------------------------------------------
# Description: Offset: 16b, Width: 16b, Reserved
reserved: 0
# ---------------------------------------===== configCmdSeqs_1 [Optional] =====---------------------------------------
# Description: Offset: 0x00000024, Width: 32b; [0x020-0x02b] Sequence info for Device Configuration command, similar
# as deviceModeSeq
configCmdSeqs_1:
# ------------------------------------------===== seqNum [Optional] =====-------------------------------------------
# Description: Offset: 0b, Width: 8b, Sequence Number, valid number: 1-16
seqNum: 0
# -------------------------------------------===== seqId [Optional] =====-------------------------------------------
# Description: Offset: 8b, Width: 8b, Sequence Index, valid number: 0-15
seqId: 0
# -----------------------------------------===== reserved [Optional] =====------------------------------------------
# Description: Offset: 16b, Width: 16b, Reserved
reserved: 0
# ---------------------------------------===== configCmdSeqs_2 [Optional] =====---------------------------------------
# Description: Offset: 0x00000028, Width: 32b; [0x020-0x02b] Sequence info for Device Configuration command, similar
# as deviceModeSeq
configCmdSeqs_2:
# ------------------------------------------===== seqNum [Optional] =====-------------------------------------------
# Description: Offset: 0b, Width: 8b, Sequence Number, valid number: 1-16
seqNum: 0
# -------------------------------------------===== seqId [Optional] =====-------------------------------------------
# Description: Offset: 8b, Width: 8b, Sequence Index, valid number: 0-15
seqId: 0
# -----------------------------------------===== reserved [Optional] =====------------------------------------------
# Description: Offset: 16b, Width: 16b, Reserved
reserved: 0
# ------------------------------------------===== reserved1 [Optional] =====------------------------------------------
# Description: Offset: 0x0000002C, Width: 32b; [0x02c-0x02f] Reserved for future use
reserved1: '0x00000000'
# ---------------------------------------===== configCmdArgs_0 [Optional] =====---------------------------------------
# Description: Offset: 0x00000030, Width: 32b; [0x030-0x03b] Arguments/Parameters for device Configuration commands
configCmdArgs_0: '0x00000000'
# ---------------------------------------===== configCmdArgs_1 [Optional] =====---------------------------------------
# Description: Offset: 0x00000034, Width: 32b; [0x030-0x03b] Arguments/Parameters for device Configuration commands
configCmdArgs_1: '0x00000000'
# ---------------------------------------===== configCmdArgs_2 [Optional] =====---------------------------------------
# Description: Offset: 0x00000038, Width: 32b; [0x030-0x03b] Arguments/Parameters for device Configuration commands
configCmdArgs_2: '0x00000000'
# ------------------------------------------===== reserved2 [Optional] =====------------------------------------------
# Description: Offset: 0x0000003C, Width: 32b; [0x03c-0x03f] Reserved for future use
reserved2: '0x00000000'
# ------------------------------------===== controllerMiscOption [Optional] =====-------------------------------------
# Description: Offset: 0x00000040, Width: 32b; [0x040-0x043] Controller Misc Options, see Misc feature bit
# definitions for more details
controllerMiscOption: '0x00000000'
# -----------------------------------------===== deviceType [Optional] =====------------------------------------------
# Description: Offset: 0x00000044, Width: 8b; [0x044-0x044] Device Type: See Flash Type Definition for more details
deviceType: '0x00'
# ----------------------------------------===== sflashPadType [Optional] =====----------------------------------------
# Description: Offset: 0x00000045, Width: 8b; [0x045-0x045] Serial Flash Pad Type: 1 - Single, 2 - Dual, 4 - Quad, 8
# - Octal
sflashPadType: '0x00'
# ----------------------------------------===== serialClkFreq [Optional] =====----------------------------------------
# Description: Offset: 0x00000046, Width: 8b; [0x046-0x046] Serial Flash Frequency, device specific definitions, See
# System Boot Chapter for more details
serialClkFreq: '0x00'
# -------------------------------------===== lutCustomSeqEnable [Optional] =====--------------------------------------
# Description: Offset: 0x00000047, Width: 8b; [0x047-0x047] LUT customization Enable, it is required if the
# program/erase cannot be done using 1 LUT sequence, currently, only applicable to HyperFLASH
lutCustomSeqEnable: '0x00'
# -----------------------------------------===== reserved3_0 [Optional] =====-----------------------------------------
# Description: Offset: 0x00000048, Width: 32b; [0x048-0x04f] Reserved for future use
reserved3_0: '0x00000000'
# -----------------------------------------===== reserved3_1 [Optional] =====-----------------------------------------
# Description: Offset: 0x0000004C, Width: 32b; [0x048-0x04f] Reserved for future use
reserved3_1: '0x00000000'
# ----------------------------------------===== sflashA1Size [Optional] =====-----------------------------------------
# Description: Offset: 0x00000050, Width: 32b; [0x050-0x053] Size of Flash connected to A1
sflashA1Size: '0x00000000'
# ----------------------------------------===== sflashA2Size [Optional] =====-----------------------------------------
# Description: Offset: 0x00000054, Width: 32b; [0x054-0x057] Size of Flash connected to A2
sflashA2Size: '0x00000000'
# ----------------------------------------===== sflashB1Size [Optional] =====-----------------------------------------
# Description: Offset: 0x00000058, Width: 32b; [0x058-0x05b] Size of Flash connected to B1
sflashB1Size: '0x00000000'
# ----------------------------------------===== sflashB2Size [Optional] =====-----------------------------------------
# Description: Offset: 0x0000005C, Width: 32b; [0x05c-0x05f] Size of Flash connected to B2
sflashB2Size: '0x00000000'
# ------------------------------------===== csPadSettingOverride [Optional] =====-------------------------------------
# Description: Offset: 0x00000060, Width: 32b; [0x060-0x063] CS pad setting override value
csPadSettingOverride: '0x00000000'
# -----------------------------------===== sclkPadSettingOverride [Optional] =====------------------------------------
# Description: Offset: 0x00000064, Width: 32b; [0x064-0x067] SCK pad setting override value
sclkPadSettingOverride: '0x00000000'
# -----------------------------------===== dataPadSettingOverride [Optional] =====------------------------------------
# Description: Offset: 0x00000068, Width: 32b; [0x068-0x06b] data pad setting override value
dataPadSettingOverride: '0x00000000'
# ------------------------------------===== dqsPadSettingOverride [Optional] =====------------------------------------
# Description: Offset: 0x0000006C, Width: 32b; [0x06c-0x06f] DQS pad setting override value
dqsPadSettingOverride: '0x00000000'
# -----------------------------------------===== timeoutInMs [Optional] =====-----------------------------------------
# Description: Offset: 0x00000070, Width: 32b; [0x070-0x073] Timeout threshold for read status command
timeoutInMs: '0x00000000'
# ---------------------------------------===== commandInterval [Optional] =====---------------------------------------
# Description: Offset: 0x00000074, Width: 32b; [0x074-0x077] CS deselect interval between two commands
commandInterval: '0x00000000'
# ---------------------------------------===== dataValidTime_0 [Optional] =====---------------------------------------
# Description: Offset: 0x00000078, Width: 16b; [0x078-0x07b] CLK edge to data valid time for PORT A and PORT B
dataValidTime_0:
# ----------------------------------------===== time_100ps [Optional] =====-----------------------------------------
# Description: Offset: 0b, Width: 8b, Data valid time, in terms of 100ps
time_100ps: 0
# ----------------------------------------===== delay_cells [Optional] =====----------------------------------------
# Description: Offset: 8b, Width: 8b, Data valid time, in terms of delay cells
delay_cells: 0
# ---------------------------------------===== dataValidTime_1 [Optional] =====---------------------------------------
# Description: Offset: 0x0000007A, Width: 16b; [0x078-0x07b] CLK edge to data valid time for PORT A and PORT B
dataValidTime_1:
# ----------------------------------------===== time_100ps [Optional] =====-----------------------------------------
# Description: Offset: 0b, Width: 8b, Data valid time, in terms of 100ps
time_100ps: 0
# ----------------------------------------===== delay_cells [Optional] =====----------------------------------------
# Description: Offset: 8b, Width: 8b, Data valid time, in terms of delay cells
delay_cells: 0
# -----------------------------------------===== busyOffset [Optional] =====------------------------------------------
# Description: Offset: 0x0000007C, Width: 16b; [0x07c-0x07d] Busy offset, valid value: 0-31
busyOffset: '0x0000'
# ---------------------------------------===== busyBitPolarity [Optional] =====---------------------------------------
# Description: Offset: 0x0000007E, Width: 16b; [0x07e-0x07f] Busy flag polarity, 0 - busy flag is 1 when flash device
# is busy, 1 - busy flag is 0 when flash device is busy
busyBitPolarity: '0x0000'
# -----------------------------------===== lookupTable_seq0_instr0 [Optional] =====-----------------------------------
# Description: Offset: 0x00000080, Width: 16b; Lookup table holds Flash command sequences 0, instruction 0
lookupTable_seq0_instr0:
# ------------------------------------------===== OPERAND [Optional] =====------------------------------------------
# Description: Offset: 0b, Width: 8b, Instruction operand. Its values depends on used instruction
OPERAND: 0
# -----------------------------------------===== NUM_PADS [Optional] =====------------------------------------------
# Description: Offset: 8b, Width: 2b, Number of pads used by instruction. Some instructions ignores this parameter.
# - 1PAD, (0): Single mode. One pad is used.
# - 2PAD, (1): Dual mode. Two pads are used.
# - 4PAD, (2): Quad mode. Four pads are used.
# - 8PAD, (3): Octal mode. Eight pads are used.
# Possible options: <1PAD, 2PAD, 4PAD, 8PAD>
NUM_PADS: 1PAD
# --------------------------------------===== OPERATION_CODE [Optional] =====---------------------------------------
# Description: Offset: 10b, Width: 6b, Instruction operation code.
# - STOP, (0): Stop execution and de-assert CS. Then, the next command sequence (to the same flash device) starts
# from instruction pointer 0.
# - CMD_SDR, (1): Transmit command code to Flash.
# - RADDR_SDR, (2): Transmit row address to Flash.
# - CADDR_SDR, (3): Transmit column address to Flash.
# - MODE1_SDR, (4): Transmit mode bits to Flash.
# - MODE2_SDR, (5): Transmit mode bits to Flash.
# - MODE4_SDR, (6): Transmit mode bits to Flash.
# - MODE8_SDR, (7): Transmit mode bits to Flash.
# - WRITE_SDR, (8): Transmit program data to Flash device.
# - READ_SDR, (9): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_SDR, (10): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_SDR, (11): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_SDR, (12): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_SDR, (13): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# - JMP_ON_CS, (31): Stop execution, de-assert CS and save operand[7:0] as the instruction start pointer for next
# sequence.Normally this instruction is used to support Execute-In-Place enhanced mode. See XIP enhanced mode for
# more details.This instruction is only allowed for AHB read commands. There is interrupt status bit set
# (INTR[IPCMDERR] or INTR[AHBCMDERR]) when using this instruction in IP command or AHB write command.
# - CMD_DDR, (33): Transmit command code to Flash.
# - RADDR_DDR, (34): Transmit row address to Flash.
# - CADDR_DDR, (35): Transmit column address to Flash.
# - MODE1_DDR, (36): Transmit mode bits to Flash.
# - MODE2_DDR, (37): Transmit mode bits to Flash.
# - MODE4_DDR, (38): Transmit mode bits to Flash.
# - MODE8_DDR, (39): Transmit mode bits to Flash.
# - WRITE_DDR, (40): Transmit program data to Flash device.
# - READ_DDR, (41): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_DDR, (42): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_DDR, (43): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_DDR, (44): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_DDR, (45): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# Possible options: <STOP, CMD_SDR, RADDR_SDR, CADDR_SDR, MODE1_SDR, MODE2_SDR, MODE4_SDR, MODE8_SDR, WRITE_SDR,
# READ_SDR, LEARN_SDR, DATSZ_SDR, DUMMY_SDR, DUMMY_RWDS_SDR, JMP_ON_CS, CMD_DDR, RADDR_DDR, CADDR_DDR, MODE1_DDR,
# MODE2_DDR, MODE4_DDR, MODE8_DDR, WRITE_DDR, READ_DDR, LEARN_DDR, DATSZ_DDR, DUMMY_DDR, DUMMY_RWDS_DDR>
OPERATION_CODE: STOP
lookupTable_seq0_instr1:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq0_instr2:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq0_instr3:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq0_instr4:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq0_instr5:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq0_instr6:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq0_instr7:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
# -----------------------------------===== lookupTable_seq1_instr0 [Optional] =====-----------------------------------
# Description: Offset: 0x00000090, Width: 16b; Lookup table holds Flash command sequences 1, instruction 0
lookupTable_seq1_instr0:
# ------------------------------------------===== OPERAND [Optional] =====------------------------------------------
# Description: Offset: 0b, Width: 8b, Instruction operand. Its values depends on used instruction
OPERAND: 0
# -----------------------------------------===== NUM_PADS [Optional] =====------------------------------------------
# Description: Offset: 8b, Width: 2b, Number of pads used by instruction. Some instructions ignores this parameter.
# - 1PAD, (0): Single mode. One pad is used.
# - 2PAD, (1): Dual mode. Two pads are used.
# - 4PAD, (2): Quad mode. Four pads are used.
# - 8PAD, (3): Octal mode. Eight pads are used.
# Possible options: <1PAD, 2PAD, 4PAD, 8PAD>
NUM_PADS: 1PAD
# --------------------------------------===== OPERATION_CODE [Optional] =====---------------------------------------
# Description: Offset: 10b, Width: 6b, Instruction operation code.
# - STOP, (0): Stop execution and de-assert CS. Then, the next command sequence (to the same flash device) starts
# from instruction pointer 0.
# - CMD_SDR, (1): Transmit command code to Flash.
# - RADDR_SDR, (2): Transmit row address to Flash.
# - CADDR_SDR, (3): Transmit column address to Flash.
# - MODE1_SDR, (4): Transmit mode bits to Flash.
# - MODE2_SDR, (5): Transmit mode bits to Flash.
# - MODE4_SDR, (6): Transmit mode bits to Flash.
# - MODE8_SDR, (7): Transmit mode bits to Flash.
# - WRITE_SDR, (8): Transmit program data to Flash device.
# - READ_SDR, (9): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_SDR, (10): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_SDR, (11): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_SDR, (12): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_SDR, (13): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# - JMP_ON_CS, (31): Stop execution, de-assert CS and save operand[7:0] as the instruction start pointer for next
# sequence.Normally this instruction is used to support Execute-In-Place enhanced mode. See XIP enhanced mode for
# more details.This instruction is only allowed for AHB read commands. There is interrupt status bit set
# (INTR[IPCMDERR] or INTR[AHBCMDERR]) when using this instruction in IP command or AHB write command.
# - CMD_DDR, (33): Transmit command code to Flash.
# - RADDR_DDR, (34): Transmit row address to Flash.
# - CADDR_DDR, (35): Transmit column address to Flash.
# - MODE1_DDR, (36): Transmit mode bits to Flash.
# - MODE2_DDR, (37): Transmit mode bits to Flash.
# - MODE4_DDR, (38): Transmit mode bits to Flash.
# - MODE8_DDR, (39): Transmit mode bits to Flash.
# - WRITE_DDR, (40): Transmit program data to Flash device.
# - READ_DDR, (41): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_DDR, (42): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_DDR, (43): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_DDR, (44): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_DDR, (45): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# Possible options: <STOP, CMD_SDR, RADDR_SDR, CADDR_SDR, MODE1_SDR, MODE2_SDR, MODE4_SDR, MODE8_SDR, WRITE_SDR,
# READ_SDR, LEARN_SDR, DATSZ_SDR, DUMMY_SDR, DUMMY_RWDS_SDR, JMP_ON_CS, CMD_DDR, RADDR_DDR, CADDR_DDR, MODE1_DDR,
# MODE2_DDR, MODE4_DDR, MODE8_DDR, WRITE_DDR, READ_DDR, LEARN_DDR, DATSZ_DDR, DUMMY_DDR, DUMMY_RWDS_DDR>
OPERATION_CODE: STOP
lookupTable_seq1_instr1:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq1_instr2:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq1_instr3:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq1_instr4:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq1_instr5:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq1_instr6:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq1_instr7:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
# -----------------------------------===== lookupTable_seq2_instr0 [Optional] =====-----------------------------------
# Description: Offset: 0x000000A0, Width: 16b; Lookup table holds Flash command sequences 2, instruction 0
lookupTable_seq2_instr0:
# ------------------------------------------===== OPERAND [Optional] =====------------------------------------------
# Description: Offset: 0b, Width: 8b, Instruction operand. Its values depends on used instruction
OPERAND: 0
# -----------------------------------------===== NUM_PADS [Optional] =====------------------------------------------
# Description: Offset: 8b, Width: 2b, Number of pads used by instruction. Some instructions ignores this parameter.
# - 1PAD, (0): Single mode. One pad is used.
# - 2PAD, (1): Dual mode. Two pads are used.
# - 4PAD, (2): Quad mode. Four pads are used.
# - 8PAD, (3): Octal mode. Eight pads are used.
# Possible options: <1PAD, 2PAD, 4PAD, 8PAD>
NUM_PADS: 1PAD
# --------------------------------------===== OPERATION_CODE [Optional] =====---------------------------------------
# Description: Offset: 10b, Width: 6b, Instruction operation code.
# - STOP, (0): Stop execution and de-assert CS. Then, the next command sequence (to the same flash device) starts
# from instruction pointer 0.
# - CMD_SDR, (1): Transmit command code to Flash.
# - RADDR_SDR, (2): Transmit row address to Flash.
# - CADDR_SDR, (3): Transmit column address to Flash.
# - MODE1_SDR, (4): Transmit mode bits to Flash.
# - MODE2_SDR, (5): Transmit mode bits to Flash.
# - MODE4_SDR, (6): Transmit mode bits to Flash.
# - MODE8_SDR, (7): Transmit mode bits to Flash.
# - WRITE_SDR, (8): Transmit program data to Flash device.
# - READ_SDR, (9): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_SDR, (10): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_SDR, (11): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_SDR, (12): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_SDR, (13): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# - JMP_ON_CS, (31): Stop execution, de-assert CS and save operand[7:0] as the instruction start pointer for next
# sequence.Normally this instruction is used to support Execute-In-Place enhanced mode. See XIP enhanced mode for
# more details.This instruction is only allowed for AHB read commands. There is interrupt status bit set
# (INTR[IPCMDERR] or INTR[AHBCMDERR]) when using this instruction in IP command or AHB write command.
# - CMD_DDR, (33): Transmit command code to Flash.
# - RADDR_DDR, (34): Transmit row address to Flash.
# - CADDR_DDR, (35): Transmit column address to Flash.
# - MODE1_DDR, (36): Transmit mode bits to Flash.
# - MODE2_DDR, (37): Transmit mode bits to Flash.
# - MODE4_DDR, (38): Transmit mode bits to Flash.
# - MODE8_DDR, (39): Transmit mode bits to Flash.
# - WRITE_DDR, (40): Transmit program data to Flash device.
# - READ_DDR, (41): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_DDR, (42): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_DDR, (43): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_DDR, (44): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_DDR, (45): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# Possible options: <STOP, CMD_SDR, RADDR_SDR, CADDR_SDR, MODE1_SDR, MODE2_SDR, MODE4_SDR, MODE8_SDR, WRITE_SDR,
# READ_SDR, LEARN_SDR, DATSZ_SDR, DUMMY_SDR, DUMMY_RWDS_SDR, JMP_ON_CS, CMD_DDR, RADDR_DDR, CADDR_DDR, MODE1_DDR,
# MODE2_DDR, MODE4_DDR, MODE8_DDR, WRITE_DDR, READ_DDR, LEARN_DDR, DATSZ_DDR, DUMMY_DDR, DUMMY_RWDS_DDR>
OPERATION_CODE: STOP
lookupTable_seq2_instr1:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq2_instr2:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq2_instr3:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq2_instr4:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq2_instr5:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq2_instr6:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq2_instr7:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
# -----------------------------------===== lookupTable_seq3_instr0 [Optional] =====-----------------------------------
# Description: Offset: 0x000000B0, Width: 16b; Lookup table holds Flash command sequences 3, instruction 0
lookupTable_seq3_instr0:
# ------------------------------------------===== OPERAND [Optional] =====------------------------------------------
# Description: Offset: 0b, Width: 8b, Instruction operand. Its values depends on used instruction
OPERAND: 0
# -----------------------------------------===== NUM_PADS [Optional] =====------------------------------------------
# Description: Offset: 8b, Width: 2b, Number of pads used by instruction. Some instructions ignores this parameter.
# - 1PAD, (0): Single mode. One pad is used.
# - 2PAD, (1): Dual mode. Two pads are used.
# - 4PAD, (2): Quad mode. Four pads are used.
# - 8PAD, (3): Octal mode. Eight pads are used.
# Possible options: <1PAD, 2PAD, 4PAD, 8PAD>
NUM_PADS: 1PAD
# --------------------------------------===== OPERATION_CODE [Optional] =====---------------------------------------
# Description: Offset: 10b, Width: 6b, Instruction operation code.
# - STOP, (0): Stop execution and de-assert CS. Then, the next command sequence (to the same flash device) starts
# from instruction pointer 0.
# - CMD_SDR, (1): Transmit command code to Flash.
# - RADDR_SDR, (2): Transmit row address to Flash.
# - CADDR_SDR, (3): Transmit column address to Flash.
# - MODE1_SDR, (4): Transmit mode bits to Flash.
# - MODE2_SDR, (5): Transmit mode bits to Flash.
# - MODE4_SDR, (6): Transmit mode bits to Flash.
# - MODE8_SDR, (7): Transmit mode bits to Flash.
# - WRITE_SDR, (8): Transmit program data to Flash device.
# - READ_SDR, (9): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_SDR, (10): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_SDR, (11): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_SDR, (12): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_SDR, (13): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# - JMP_ON_CS, (31): Stop execution, de-assert CS and save operand[7:0] as the instruction start pointer for next
# sequence.Normally this instruction is used to support Execute-In-Place enhanced mode. See XIP enhanced mode for
# more details.This instruction is only allowed for AHB read commands. There is interrupt status bit set
# (INTR[IPCMDERR] or INTR[AHBCMDERR]) when using this instruction in IP command or AHB write command.
# - CMD_DDR, (33): Transmit command code to Flash.
# - RADDR_DDR, (34): Transmit row address to Flash.
# - CADDR_DDR, (35): Transmit column address to Flash.
# - MODE1_DDR, (36): Transmit mode bits to Flash.
# - MODE2_DDR, (37): Transmit mode bits to Flash.
# - MODE4_DDR, (38): Transmit mode bits to Flash.
# - MODE8_DDR, (39): Transmit mode bits to Flash.
# - WRITE_DDR, (40): Transmit program data to Flash device.
# - READ_DDR, (41): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_DDR, (42): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_DDR, (43): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_DDR, (44): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_DDR, (45): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# Possible options: <STOP, CMD_SDR, RADDR_SDR, CADDR_SDR, MODE1_SDR, MODE2_SDR, MODE4_SDR, MODE8_SDR, WRITE_SDR,
# READ_SDR, LEARN_SDR, DATSZ_SDR, DUMMY_SDR, DUMMY_RWDS_SDR, JMP_ON_CS, CMD_DDR, RADDR_DDR, CADDR_DDR, MODE1_DDR,
# MODE2_DDR, MODE4_DDR, MODE8_DDR, WRITE_DDR, READ_DDR, LEARN_DDR, DATSZ_DDR, DUMMY_DDR, DUMMY_RWDS_DDR>
OPERATION_CODE: STOP
lookupTable_seq3_instr1:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq3_instr2:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq3_instr3:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq3_instr4:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq3_instr5:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq3_instr6:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq3_instr7:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
# -----------------------------------===== lookupTable_seq4_instr0 [Optional] =====-----------------------------------
# Description: Offset: 0x000000C0, Width: 16b; Lookup table holds Flash command sequences 4, instruction 0
lookupTable_seq4_instr0:
# ------------------------------------------===== OPERAND [Optional] =====------------------------------------------
# Description: Offset: 0b, Width: 8b, Instruction operand. Its values depends on used instruction
OPERAND: 0
# -----------------------------------------===== NUM_PADS [Optional] =====------------------------------------------
# Description: Offset: 8b, Width: 2b, Number of pads used by instruction. Some instructions ignores this parameter.
# - 1PAD, (0): Single mode. One pad is used.
# - 2PAD, (1): Dual mode. Two pads are used.
# - 4PAD, (2): Quad mode. Four pads are used.
# - 8PAD, (3): Octal mode. Eight pads are used.
# Possible options: <1PAD, 2PAD, 4PAD, 8PAD>
NUM_PADS: 1PAD
# --------------------------------------===== OPERATION_CODE [Optional] =====---------------------------------------
# Description: Offset: 10b, Width: 6b, Instruction operation code.
# - STOP, (0): Stop execution and de-assert CS. Then, the next command sequence (to the same flash device) starts
# from instruction pointer 0.
# - CMD_SDR, (1): Transmit command code to Flash.
# - RADDR_SDR, (2): Transmit row address to Flash.
# - CADDR_SDR, (3): Transmit column address to Flash.
# - MODE1_SDR, (4): Transmit mode bits to Flash.
# - MODE2_SDR, (5): Transmit mode bits to Flash.
# - MODE4_SDR, (6): Transmit mode bits to Flash.
# - MODE8_SDR, (7): Transmit mode bits to Flash.
# - WRITE_SDR, (8): Transmit program data to Flash device.
# - READ_SDR, (9): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_SDR, (10): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_SDR, (11): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_SDR, (12): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_SDR, (13): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# - JMP_ON_CS, (31): Stop execution, de-assert CS and save operand[7:0] as the instruction start pointer for next
# sequence.Normally this instruction is used to support Execute-In-Place enhanced mode. See XIP enhanced mode for
# more details.This instruction is only allowed for AHB read commands. There is interrupt status bit set
# (INTR[IPCMDERR] or INTR[AHBCMDERR]) when using this instruction in IP command or AHB write command.
# - CMD_DDR, (33): Transmit command code to Flash.
# - RADDR_DDR, (34): Transmit row address to Flash.
# - CADDR_DDR, (35): Transmit column address to Flash.
# - MODE1_DDR, (36): Transmit mode bits to Flash.
# - MODE2_DDR, (37): Transmit mode bits to Flash.
# - MODE4_DDR, (38): Transmit mode bits to Flash.
# - MODE8_DDR, (39): Transmit mode bits to Flash.
# - WRITE_DDR, (40): Transmit program data to Flash device.
# - READ_DDR, (41): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_DDR, (42): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_DDR, (43): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_DDR, (44): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_DDR, (45): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# Possible options: <STOP, CMD_SDR, RADDR_SDR, CADDR_SDR, MODE1_SDR, MODE2_SDR, MODE4_SDR, MODE8_SDR, WRITE_SDR,
# READ_SDR, LEARN_SDR, DATSZ_SDR, DUMMY_SDR, DUMMY_RWDS_SDR, JMP_ON_CS, CMD_DDR, RADDR_DDR, CADDR_DDR, MODE1_DDR,
# MODE2_DDR, MODE4_DDR, MODE8_DDR, WRITE_DDR, READ_DDR, LEARN_DDR, DATSZ_DDR, DUMMY_DDR, DUMMY_RWDS_DDR>
OPERATION_CODE: STOP
lookupTable_seq4_instr1:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq4_instr2:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq4_instr3:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq4_instr4:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq4_instr5:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq4_instr6:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq4_instr7:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
# -----------------------------------===== lookupTable_seq5_instr0 [Optional] =====-----------------------------------
# Description: Offset: 0x000000D0, Width: 16b; Lookup table holds Flash command sequences 5, instruction 0
lookupTable_seq5_instr0:
# ------------------------------------------===== OPERAND [Optional] =====------------------------------------------
# Description: Offset: 0b, Width: 8b, Instruction operand. Its values depends on used instruction
OPERAND: 0
# -----------------------------------------===== NUM_PADS [Optional] =====------------------------------------------
# Description: Offset: 8b, Width: 2b, Number of pads used by instruction. Some instructions ignores this parameter.
# - 1PAD, (0): Single mode. One pad is used.
# - 2PAD, (1): Dual mode. Two pads are used.
# - 4PAD, (2): Quad mode. Four pads are used.
# - 8PAD, (3): Octal mode. Eight pads are used.
# Possible options: <1PAD, 2PAD, 4PAD, 8PAD>
NUM_PADS: 1PAD
# --------------------------------------===== OPERATION_CODE [Optional] =====---------------------------------------
# Description: Offset: 10b, Width: 6b, Instruction operation code.
# - STOP, (0): Stop execution and de-assert CS. Then, the next command sequence (to the same flash device) starts
# from instruction pointer 0.
# - CMD_SDR, (1): Transmit command code to Flash.
# - RADDR_SDR, (2): Transmit row address to Flash.
# - CADDR_SDR, (3): Transmit column address to Flash.
# - MODE1_SDR, (4): Transmit mode bits to Flash.
# - MODE2_SDR, (5): Transmit mode bits to Flash.
# - MODE4_SDR, (6): Transmit mode bits to Flash.
# - MODE8_SDR, (7): Transmit mode bits to Flash.
# - WRITE_SDR, (8): Transmit program data to Flash device.
# - READ_SDR, (9): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_SDR, (10): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_SDR, (11): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_SDR, (12): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_SDR, (13): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# - JMP_ON_CS, (31): Stop execution, de-assert CS and save operand[7:0] as the instruction start pointer for next
# sequence.Normally this instruction is used to support Execute-In-Place enhanced mode. See XIP enhanced mode for
# more details.This instruction is only allowed for AHB read commands. There is interrupt status bit set
# (INTR[IPCMDERR] or INTR[AHBCMDERR]) when using this instruction in IP command or AHB write command.
# - CMD_DDR, (33): Transmit command code to Flash.
# - RADDR_DDR, (34): Transmit row address to Flash.
# - CADDR_DDR, (35): Transmit column address to Flash.
# - MODE1_DDR, (36): Transmit mode bits to Flash.
# - MODE2_DDR, (37): Transmit mode bits to Flash.
# - MODE4_DDR, (38): Transmit mode bits to Flash.
# - MODE8_DDR, (39): Transmit mode bits to Flash.
# - WRITE_DDR, (40): Transmit program data to Flash device.
# - READ_DDR, (41): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_DDR, (42): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_DDR, (43): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_DDR, (44): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_DDR, (45): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# Possible options: <STOP, CMD_SDR, RADDR_SDR, CADDR_SDR, MODE1_SDR, MODE2_SDR, MODE4_SDR, MODE8_SDR, WRITE_SDR,
# READ_SDR, LEARN_SDR, DATSZ_SDR, DUMMY_SDR, DUMMY_RWDS_SDR, JMP_ON_CS, CMD_DDR, RADDR_DDR, CADDR_DDR, MODE1_DDR,
# MODE2_DDR, MODE4_DDR, MODE8_DDR, WRITE_DDR, READ_DDR, LEARN_DDR, DATSZ_DDR, DUMMY_DDR, DUMMY_RWDS_DDR>
OPERATION_CODE: STOP
lookupTable_seq5_instr1:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq5_instr2:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq5_instr3:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq5_instr4:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq5_instr5:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq5_instr6:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq5_instr7:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
# -----------------------------------===== lookupTable_seq6_instr0 [Optional] =====-----------------------------------
# Description: Offset: 0x000000E0, Width: 16b; Lookup table holds Flash command sequences 6, instruction 0
lookupTable_seq6_instr0:
# ------------------------------------------===== OPERAND [Optional] =====------------------------------------------
# Description: Offset: 0b, Width: 8b, Instruction operand. Its values depends on used instruction
OPERAND: 0
# -----------------------------------------===== NUM_PADS [Optional] =====------------------------------------------
# Description: Offset: 8b, Width: 2b, Number of pads used by instruction. Some instructions ignores this parameter.
# - 1PAD, (0): Single mode. One pad is used.
# - 2PAD, (1): Dual mode. Two pads are used.
# - 4PAD, (2): Quad mode. Four pads are used.
# - 8PAD, (3): Octal mode. Eight pads are used.
# Possible options: <1PAD, 2PAD, 4PAD, 8PAD>
NUM_PADS: 1PAD
# --------------------------------------===== OPERATION_CODE [Optional] =====---------------------------------------
# Description: Offset: 10b, Width: 6b, Instruction operation code.
# - STOP, (0): Stop execution and de-assert CS. Then, the next command sequence (to the same flash device) starts
# from instruction pointer 0.
# - CMD_SDR, (1): Transmit command code to Flash.
# - RADDR_SDR, (2): Transmit row address to Flash.
# - CADDR_SDR, (3): Transmit column address to Flash.
# - MODE1_SDR, (4): Transmit mode bits to Flash.
# - MODE2_SDR, (5): Transmit mode bits to Flash.
# - MODE4_SDR, (6): Transmit mode bits to Flash.
# - MODE8_SDR, (7): Transmit mode bits to Flash.
# - WRITE_SDR, (8): Transmit program data to Flash device.
# - READ_SDR, (9): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_SDR, (10): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_SDR, (11): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_SDR, (12): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_SDR, (13): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# - JMP_ON_CS, (31): Stop execution, de-assert CS and save operand[7:0] as the instruction start pointer for next
# sequence.Normally this instruction is used to support Execute-In-Place enhanced mode. See XIP enhanced mode for
# more details.This instruction is only allowed for AHB read commands. There is interrupt status bit set
# (INTR[IPCMDERR] or INTR[AHBCMDERR]) when using this instruction in IP command or AHB write command.
# - CMD_DDR, (33): Transmit command code to Flash.
# - RADDR_DDR, (34): Transmit row address to Flash.
# - CADDR_DDR, (35): Transmit column address to Flash.
# - MODE1_DDR, (36): Transmit mode bits to Flash.
# - MODE2_DDR, (37): Transmit mode bits to Flash.
# - MODE4_DDR, (38): Transmit mode bits to Flash.
# - MODE8_DDR, (39): Transmit mode bits to Flash.
# - WRITE_DDR, (40): Transmit program data to Flash device.
# - READ_DDR, (41): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_DDR, (42): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_DDR, (43): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_DDR, (44): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_DDR, (45): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# Possible options: <STOP, CMD_SDR, RADDR_SDR, CADDR_SDR, MODE1_SDR, MODE2_SDR, MODE4_SDR, MODE8_SDR, WRITE_SDR,
# READ_SDR, LEARN_SDR, DATSZ_SDR, DUMMY_SDR, DUMMY_RWDS_SDR, JMP_ON_CS, CMD_DDR, RADDR_DDR, CADDR_DDR, MODE1_DDR,
# MODE2_DDR, MODE4_DDR, MODE8_DDR, WRITE_DDR, READ_DDR, LEARN_DDR, DATSZ_DDR, DUMMY_DDR, DUMMY_RWDS_DDR>
OPERATION_CODE: STOP
lookupTable_seq6_instr1:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq6_instr2:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq6_instr3:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq6_instr4:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq6_instr5:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq6_instr6:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq6_instr7:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
# -----------------------------------===== lookupTable_seq7_instr0 [Optional] =====-----------------------------------
# Description: Offset: 0x000000F0, Width: 16b; Lookup table holds Flash command sequences 7, instruction 0
lookupTable_seq7_instr0:
# ------------------------------------------===== OPERAND [Optional] =====------------------------------------------
# Description: Offset: 0b, Width: 8b, Instruction operand. Its values depends on used instruction
OPERAND: 0
# -----------------------------------------===== NUM_PADS [Optional] =====------------------------------------------
# Description: Offset: 8b, Width: 2b, Number of pads used by instruction. Some instructions ignores this parameter.
# - 1PAD, (0): Single mode. One pad is used.
# - 2PAD, (1): Dual mode. Two pads are used.
# - 4PAD, (2): Quad mode. Four pads are used.
# - 8PAD, (3): Octal mode. Eight pads are used.
# Possible options: <1PAD, 2PAD, 4PAD, 8PAD>
NUM_PADS: 1PAD
# --------------------------------------===== OPERATION_CODE [Optional] =====---------------------------------------
# Description: Offset: 10b, Width: 6b, Instruction operation code.
# - STOP, (0): Stop execution and de-assert CS. Then, the next command sequence (to the same flash device) starts
# from instruction pointer 0.
# - CMD_SDR, (1): Transmit command code to Flash.
# - RADDR_SDR, (2): Transmit row address to Flash.
# - CADDR_SDR, (3): Transmit column address to Flash.
# - MODE1_SDR, (4): Transmit mode bits to Flash.
# - MODE2_SDR, (5): Transmit mode bits to Flash.
# - MODE4_SDR, (6): Transmit mode bits to Flash.
# - MODE8_SDR, (7): Transmit mode bits to Flash.
# - WRITE_SDR, (8): Transmit program data to Flash device.
# - READ_SDR, (9): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_SDR, (10): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_SDR, (11): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_SDR, (12): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_SDR, (13): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# - JMP_ON_CS, (31): Stop execution, de-assert CS and save operand[7:0] as the instruction start pointer for next
# sequence.Normally this instruction is used to support Execute-In-Place enhanced mode. See XIP enhanced mode for
# more details.This instruction is only allowed for AHB read commands. There is interrupt status bit set
# (INTR[IPCMDERR] or INTR[AHBCMDERR]) when using this instruction in IP command or AHB write command.
# - CMD_DDR, (33): Transmit command code to Flash.
# - RADDR_DDR, (34): Transmit row address to Flash.
# - CADDR_DDR, (35): Transmit column address to Flash.
# - MODE1_DDR, (36): Transmit mode bits to Flash.
# - MODE2_DDR, (37): Transmit mode bits to Flash.
# - MODE4_DDR, (38): Transmit mode bits to Flash.
# - MODE8_DDR, (39): Transmit mode bits to Flash.
# - WRITE_DDR, (40): Transmit program data to Flash device.
# - READ_DDR, (41): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_DDR, (42): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_DDR, (43): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_DDR, (44): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_DDR, (45): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# Possible options: <STOP, CMD_SDR, RADDR_SDR, CADDR_SDR, MODE1_SDR, MODE2_SDR, MODE4_SDR, MODE8_SDR, WRITE_SDR,
# READ_SDR, LEARN_SDR, DATSZ_SDR, DUMMY_SDR, DUMMY_RWDS_SDR, JMP_ON_CS, CMD_DDR, RADDR_DDR, CADDR_DDR, MODE1_DDR,
# MODE2_DDR, MODE4_DDR, MODE8_DDR, WRITE_DDR, READ_DDR, LEARN_DDR, DATSZ_DDR, DUMMY_DDR, DUMMY_RWDS_DDR>
OPERATION_CODE: STOP
lookupTable_seq7_instr1:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq7_instr2:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq7_instr3:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq7_instr4:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq7_instr5:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq7_instr6:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq7_instr7:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
# -----------------------------------===== lookupTable_seq8_instr0 [Optional] =====-----------------------------------
# Description: Offset: 0x00000100, Width: 16b; Lookup table holds Flash command sequences 8, instruction 0
lookupTable_seq8_instr0:
# ------------------------------------------===== OPERAND [Optional] =====------------------------------------------
# Description: Offset: 0b, Width: 8b, Instruction operand. Its values depends on used instruction
OPERAND: 0
# -----------------------------------------===== NUM_PADS [Optional] =====------------------------------------------
# Description: Offset: 8b, Width: 2b, Number of pads used by instruction. Some instructions ignores this parameter.
# - 1PAD, (0): Single mode. One pad is used.
# - 2PAD, (1): Dual mode. Two pads are used.
# - 4PAD, (2): Quad mode. Four pads are used.
# - 8PAD, (3): Octal mode. Eight pads are used.
# Possible options: <1PAD, 2PAD, 4PAD, 8PAD>
NUM_PADS: 1PAD
# --------------------------------------===== OPERATION_CODE [Optional] =====---------------------------------------
# Description: Offset: 10b, Width: 6b, Instruction operation code.
# - STOP, (0): Stop execution and de-assert CS. Then, the next command sequence (to the same flash device) starts
# from instruction pointer 0.
# - CMD_SDR, (1): Transmit command code to Flash.
# - RADDR_SDR, (2): Transmit row address to Flash.
# - CADDR_SDR, (3): Transmit column address to Flash.
# - MODE1_SDR, (4): Transmit mode bits to Flash.
# - MODE2_SDR, (5): Transmit mode bits to Flash.
# - MODE4_SDR, (6): Transmit mode bits to Flash.
# - MODE8_SDR, (7): Transmit mode bits to Flash.
# - WRITE_SDR, (8): Transmit program data to Flash device.
# - READ_SDR, (9): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_SDR, (10): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_SDR, (11): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_SDR, (12): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_SDR, (13): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# - JMP_ON_CS, (31): Stop execution, de-assert CS and save operand[7:0] as the instruction start pointer for next
# sequence.Normally this instruction is used to support Execute-In-Place enhanced mode. See XIP enhanced mode for
# more details.This instruction is only allowed for AHB read commands. There is interrupt status bit set
# (INTR[IPCMDERR] or INTR[AHBCMDERR]) when using this instruction in IP command or AHB write command.
# - CMD_DDR, (33): Transmit command code to Flash.
# - RADDR_DDR, (34): Transmit row address to Flash.
# - CADDR_DDR, (35): Transmit column address to Flash.
# - MODE1_DDR, (36): Transmit mode bits to Flash.
# - MODE2_DDR, (37): Transmit mode bits to Flash.
# - MODE4_DDR, (38): Transmit mode bits to Flash.
# - MODE8_DDR, (39): Transmit mode bits to Flash.
# - WRITE_DDR, (40): Transmit program data to Flash device.
# - READ_DDR, (41): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_DDR, (42): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_DDR, (43): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_DDR, (44): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_DDR, (45): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# Possible options: <STOP, CMD_SDR, RADDR_SDR, CADDR_SDR, MODE1_SDR, MODE2_SDR, MODE4_SDR, MODE8_SDR, WRITE_SDR,
# READ_SDR, LEARN_SDR, DATSZ_SDR, DUMMY_SDR, DUMMY_RWDS_SDR, JMP_ON_CS, CMD_DDR, RADDR_DDR, CADDR_DDR, MODE1_DDR,
# MODE2_DDR, MODE4_DDR, MODE8_DDR, WRITE_DDR, READ_DDR, LEARN_DDR, DATSZ_DDR, DUMMY_DDR, DUMMY_RWDS_DDR>
OPERATION_CODE: STOP
lookupTable_seq8_instr1:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq8_instr2:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq8_instr3:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq8_instr4:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq8_instr5:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq8_instr6:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq8_instr7:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
# -----------------------------------===== lookupTable_seq9_instr0 [Optional] =====-----------------------------------
# Description: Offset: 0x00000110, Width: 16b; Lookup table holds Flash command sequences 9, instruction 0
lookupTable_seq9_instr0:
# ------------------------------------------===== OPERAND [Optional] =====------------------------------------------
# Description: Offset: 0b, Width: 8b, Instruction operand. Its values depends on used instruction
OPERAND: 0
# -----------------------------------------===== NUM_PADS [Optional] =====------------------------------------------
# Description: Offset: 8b, Width: 2b, Number of pads used by instruction. Some instructions ignores this parameter.
# - 1PAD, (0): Single mode. One pad is used.
# - 2PAD, (1): Dual mode. Two pads are used.
# - 4PAD, (2): Quad mode. Four pads are used.
# - 8PAD, (3): Octal mode. Eight pads are used.
# Possible options: <1PAD, 2PAD, 4PAD, 8PAD>
NUM_PADS: 1PAD
# --------------------------------------===== OPERATION_CODE [Optional] =====---------------------------------------
# Description: Offset: 10b, Width: 6b, Instruction operation code.
# - STOP, (0): Stop execution and de-assert CS. Then, the next command sequence (to the same flash device) starts
# from instruction pointer 0.
# - CMD_SDR, (1): Transmit command code to Flash.
# - RADDR_SDR, (2): Transmit row address to Flash.
# - CADDR_SDR, (3): Transmit column address to Flash.
# - MODE1_SDR, (4): Transmit mode bits to Flash.
# - MODE2_SDR, (5): Transmit mode bits to Flash.
# - MODE4_SDR, (6): Transmit mode bits to Flash.
# - MODE8_SDR, (7): Transmit mode bits to Flash.
# - WRITE_SDR, (8): Transmit program data to Flash device.
# - READ_SDR, (9): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_SDR, (10): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_SDR, (11): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_SDR, (12): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_SDR, (13): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# - JMP_ON_CS, (31): Stop execution, de-assert CS and save operand[7:0] as the instruction start pointer for next
# sequence.Normally this instruction is used to support Execute-In-Place enhanced mode. See XIP enhanced mode for
# more details.This instruction is only allowed for AHB read commands. There is interrupt status bit set
# (INTR[IPCMDERR] or INTR[AHBCMDERR]) when using this instruction in IP command or AHB write command.
# - CMD_DDR, (33): Transmit command code to Flash.
# - RADDR_DDR, (34): Transmit row address to Flash.
# - CADDR_DDR, (35): Transmit column address to Flash.
# - MODE1_DDR, (36): Transmit mode bits to Flash.
# - MODE2_DDR, (37): Transmit mode bits to Flash.
# - MODE4_DDR, (38): Transmit mode bits to Flash.
# - MODE8_DDR, (39): Transmit mode bits to Flash.
# - WRITE_DDR, (40): Transmit program data to Flash device.
# - READ_DDR, (41): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_DDR, (42): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_DDR, (43): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_DDR, (44): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_DDR, (45): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# Possible options: <STOP, CMD_SDR, RADDR_SDR, CADDR_SDR, MODE1_SDR, MODE2_SDR, MODE4_SDR, MODE8_SDR, WRITE_SDR,
# READ_SDR, LEARN_SDR, DATSZ_SDR, DUMMY_SDR, DUMMY_RWDS_SDR, JMP_ON_CS, CMD_DDR, RADDR_DDR, CADDR_DDR, MODE1_DDR,
# MODE2_DDR, MODE4_DDR, MODE8_DDR, WRITE_DDR, READ_DDR, LEARN_DDR, DATSZ_DDR, DUMMY_DDR, DUMMY_RWDS_DDR>
OPERATION_CODE: STOP
lookupTable_seq9_instr1:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq9_instr2:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq9_instr3:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq9_instr4:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq9_instr5:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq9_instr6:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq9_instr7:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
# ----------------------------------===== lookupTable_seq10_instr0 [Optional] =====-----------------------------------
# Description: Offset: 0x00000120, Width: 16b; Lookup table holds Flash command sequences 10, instruction 0
lookupTable_seq10_instr0:
# ------------------------------------------===== OPERAND [Optional] =====------------------------------------------
# Description: Offset: 0b, Width: 8b, Instruction operand. Its values depends on used instruction
OPERAND: 0
# -----------------------------------------===== NUM_PADS [Optional] =====------------------------------------------
# Description: Offset: 8b, Width: 2b, Number of pads used by instruction. Some instructions ignores this parameter.
# - 1PAD, (0): Single mode. One pad is used.
# - 2PAD, (1): Dual mode. Two pads are used.
# - 4PAD, (2): Quad mode. Four pads are used.
# - 8PAD, (3): Octal mode. Eight pads are used.
# Possible options: <1PAD, 2PAD, 4PAD, 8PAD>
NUM_PADS: 1PAD
# --------------------------------------===== OPERATION_CODE [Optional] =====---------------------------------------
# Description: Offset: 10b, Width: 6b, Instruction operation code.
# - STOP, (0): Stop execution and de-assert CS. Then, the next command sequence (to the same flash device) starts
# from instruction pointer 0.
# - CMD_SDR, (1): Transmit command code to Flash.
# - RADDR_SDR, (2): Transmit row address to Flash.
# - CADDR_SDR, (3): Transmit column address to Flash.
# - MODE1_SDR, (4): Transmit mode bits to Flash.
# - MODE2_SDR, (5): Transmit mode bits to Flash.
# - MODE4_SDR, (6): Transmit mode bits to Flash.
# - MODE8_SDR, (7): Transmit mode bits to Flash.
# - WRITE_SDR, (8): Transmit program data to Flash device.
# - READ_SDR, (9): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_SDR, (10): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_SDR, (11): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_SDR, (12): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_SDR, (13): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# - JMP_ON_CS, (31): Stop execution, de-assert CS and save operand[7:0] as the instruction start pointer for next
# sequence.Normally this instruction is used to support Execute-In-Place enhanced mode. See XIP enhanced mode for
# more details.This instruction is only allowed for AHB read commands. There is interrupt status bit set
# (INTR[IPCMDERR] or INTR[AHBCMDERR]) when using this instruction in IP command or AHB write command.
# - CMD_DDR, (33): Transmit command code to Flash.
# - RADDR_DDR, (34): Transmit row address to Flash.
# - CADDR_DDR, (35): Transmit column address to Flash.
# - MODE1_DDR, (36): Transmit mode bits to Flash.
# - MODE2_DDR, (37): Transmit mode bits to Flash.
# - MODE4_DDR, (38): Transmit mode bits to Flash.
# - MODE8_DDR, (39): Transmit mode bits to Flash.
# - WRITE_DDR, (40): Transmit program data to Flash device.
# - READ_DDR, (41): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_DDR, (42): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_DDR, (43): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_DDR, (44): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_DDR, (45): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# Possible options: <STOP, CMD_SDR, RADDR_SDR, CADDR_SDR, MODE1_SDR, MODE2_SDR, MODE4_SDR, MODE8_SDR, WRITE_SDR,
# READ_SDR, LEARN_SDR, DATSZ_SDR, DUMMY_SDR, DUMMY_RWDS_SDR, JMP_ON_CS, CMD_DDR, RADDR_DDR, CADDR_DDR, MODE1_DDR,
# MODE2_DDR, MODE4_DDR, MODE8_DDR, WRITE_DDR, READ_DDR, LEARN_DDR, DATSZ_DDR, DUMMY_DDR, DUMMY_RWDS_DDR>
OPERATION_CODE: STOP
lookupTable_seq10_instr1:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq10_instr2:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq10_instr3:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq10_instr4:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq10_instr5:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq10_instr6:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq10_instr7:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
# ----------------------------------===== lookupTable_seq11_instr0 [Optional] =====-----------------------------------
# Description: Offset: 0x00000130, Width: 16b; Lookup table holds Flash command sequences 11, instruction 0
lookupTable_seq11_instr0:
# ------------------------------------------===== OPERAND [Optional] =====------------------------------------------
# Description: Offset: 0b, Width: 8b, Instruction operand. Its values depends on used instruction
OPERAND: 0
# -----------------------------------------===== NUM_PADS [Optional] =====------------------------------------------
# Description: Offset: 8b, Width: 2b, Number of pads used by instruction. Some instructions ignores this parameter.
# - 1PAD, (0): Single mode. One pad is used.
# - 2PAD, (1): Dual mode. Two pads are used.
# - 4PAD, (2): Quad mode. Four pads are used.
# - 8PAD, (3): Octal mode. Eight pads are used.
# Possible options: <1PAD, 2PAD, 4PAD, 8PAD>
NUM_PADS: 1PAD
# --------------------------------------===== OPERATION_CODE [Optional] =====---------------------------------------
# Description: Offset: 10b, Width: 6b, Instruction operation code.
# - STOP, (0): Stop execution and de-assert CS. Then, the next command sequence (to the same flash device) starts
# from instruction pointer 0.
# - CMD_SDR, (1): Transmit command code to Flash.
# - RADDR_SDR, (2): Transmit row address to Flash.
# - CADDR_SDR, (3): Transmit column address to Flash.
# - MODE1_SDR, (4): Transmit mode bits to Flash.
# - MODE2_SDR, (5): Transmit mode bits to Flash.
# - MODE4_SDR, (6): Transmit mode bits to Flash.
# - MODE8_SDR, (7): Transmit mode bits to Flash.
# - WRITE_SDR, (8): Transmit program data to Flash device.
# - READ_SDR, (9): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_SDR, (10): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_SDR, (11): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_SDR, (12): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_SDR, (13): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# - JMP_ON_CS, (31): Stop execution, de-assert CS and save operand[7:0] as the instruction start pointer for next
# sequence.Normally this instruction is used to support Execute-In-Place enhanced mode. See XIP enhanced mode for
# more details.This instruction is only allowed for AHB read commands. There is interrupt status bit set
# (INTR[IPCMDERR] or INTR[AHBCMDERR]) when using this instruction in IP command or AHB write command.
# - CMD_DDR, (33): Transmit command code to Flash.
# - RADDR_DDR, (34): Transmit row address to Flash.
# - CADDR_DDR, (35): Transmit column address to Flash.
# - MODE1_DDR, (36): Transmit mode bits to Flash.
# - MODE2_DDR, (37): Transmit mode bits to Flash.
# - MODE4_DDR, (38): Transmit mode bits to Flash.
# - MODE8_DDR, (39): Transmit mode bits to Flash.
# - WRITE_DDR, (40): Transmit program data to Flash device.
# - READ_DDR, (41): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_DDR, (42): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_DDR, (43): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_DDR, (44): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_DDR, (45): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# Possible options: <STOP, CMD_SDR, RADDR_SDR, CADDR_SDR, MODE1_SDR, MODE2_SDR, MODE4_SDR, MODE8_SDR, WRITE_SDR,
# READ_SDR, LEARN_SDR, DATSZ_SDR, DUMMY_SDR, DUMMY_RWDS_SDR, JMP_ON_CS, CMD_DDR, RADDR_DDR, CADDR_DDR, MODE1_DDR,
# MODE2_DDR, MODE4_DDR, MODE8_DDR, WRITE_DDR, READ_DDR, LEARN_DDR, DATSZ_DDR, DUMMY_DDR, DUMMY_RWDS_DDR>
OPERATION_CODE: STOP
lookupTable_seq11_instr1:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq11_instr2:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq11_instr3:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq11_instr4:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq11_instr5:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq11_instr6:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq11_instr7:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
# ----------------------------------===== lookupTable_seq12_instr0 [Optional] =====-----------------------------------
# Description: Offset: 0x00000140, Width: 16b; Lookup table holds Flash command sequences 12, instruction 0
lookupTable_seq12_instr0:
# ------------------------------------------===== OPERAND [Optional] =====------------------------------------------
# Description: Offset: 0b, Width: 8b, Instruction operand. Its values depends on used instruction
OPERAND: 0
# -----------------------------------------===== NUM_PADS [Optional] =====------------------------------------------
# Description: Offset: 8b, Width: 2b, Number of pads used by instruction. Some instructions ignores this parameter.
# - 1PAD, (0): Single mode. One pad is used.
# - 2PAD, (1): Dual mode. Two pads are used.
# - 4PAD, (2): Quad mode. Four pads are used.
# - 8PAD, (3): Octal mode. Eight pads are used.
# Possible options: <1PAD, 2PAD, 4PAD, 8PAD>
NUM_PADS: 1PAD
# --------------------------------------===== OPERATION_CODE [Optional] =====---------------------------------------
# Description: Offset: 10b, Width: 6b, Instruction operation code.
# - STOP, (0): Stop execution and de-assert CS. Then, the next command sequence (to the same flash device) starts
# from instruction pointer 0.
# - CMD_SDR, (1): Transmit command code to Flash.
# - RADDR_SDR, (2): Transmit row address to Flash.
# - CADDR_SDR, (3): Transmit column address to Flash.
# - MODE1_SDR, (4): Transmit mode bits to Flash.
# - MODE2_SDR, (5): Transmit mode bits to Flash.
# - MODE4_SDR, (6): Transmit mode bits to Flash.
# - MODE8_SDR, (7): Transmit mode bits to Flash.
# - WRITE_SDR, (8): Transmit program data to Flash device.
# - READ_SDR, (9): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_SDR, (10): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_SDR, (11): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_SDR, (12): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_SDR, (13): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# - JMP_ON_CS, (31): Stop execution, de-assert CS and save operand[7:0] as the instruction start pointer for next
# sequence.Normally this instruction is used to support Execute-In-Place enhanced mode. See XIP enhanced mode for
# more details.This instruction is only allowed for AHB read commands. There is interrupt status bit set
# (INTR[IPCMDERR] or INTR[AHBCMDERR]) when using this instruction in IP command or AHB write command.
# - CMD_DDR, (33): Transmit command code to Flash.
# - RADDR_DDR, (34): Transmit row address to Flash.
# - CADDR_DDR, (35): Transmit column address to Flash.
# - MODE1_DDR, (36): Transmit mode bits to Flash.
# - MODE2_DDR, (37): Transmit mode bits to Flash.
# - MODE4_DDR, (38): Transmit mode bits to Flash.
# - MODE8_DDR, (39): Transmit mode bits to Flash.
# - WRITE_DDR, (40): Transmit program data to Flash device.
# - READ_DDR, (41): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_DDR, (42): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_DDR, (43): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_DDR, (44): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_DDR, (45): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# Possible options: <STOP, CMD_SDR, RADDR_SDR, CADDR_SDR, MODE1_SDR, MODE2_SDR, MODE4_SDR, MODE8_SDR, WRITE_SDR,
# READ_SDR, LEARN_SDR, DATSZ_SDR, DUMMY_SDR, DUMMY_RWDS_SDR, JMP_ON_CS, CMD_DDR, RADDR_DDR, CADDR_DDR, MODE1_DDR,
# MODE2_DDR, MODE4_DDR, MODE8_DDR, WRITE_DDR, READ_DDR, LEARN_DDR, DATSZ_DDR, DUMMY_DDR, DUMMY_RWDS_DDR>
OPERATION_CODE: STOP
lookupTable_seq12_instr1:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq12_instr2:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq12_instr3:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq12_instr4:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq12_instr5:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq12_instr6:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq12_instr7:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
# ----------------------------------===== lookupTable_seq13_instr0 [Optional] =====-----------------------------------
# Description: Offset: 0x00000150, Width: 16b; Lookup table holds Flash command sequences 13, instruction 0
lookupTable_seq13_instr0:
# ------------------------------------------===== OPERAND [Optional] =====------------------------------------------
# Description: Offset: 0b, Width: 8b, Instruction operand. Its values depends on used instruction
OPERAND: 0
# -----------------------------------------===== NUM_PADS [Optional] =====------------------------------------------
# Description: Offset: 8b, Width: 2b, Number of pads used by instruction. Some instructions ignores this parameter.
# - 1PAD, (0): Single mode. One pad is used.
# - 2PAD, (1): Dual mode. Two pads are used.
# - 4PAD, (2): Quad mode. Four pads are used.
# - 8PAD, (3): Octal mode. Eight pads are used.
# Possible options: <1PAD, 2PAD, 4PAD, 8PAD>
NUM_PADS: 1PAD
# --------------------------------------===== OPERATION_CODE [Optional] =====---------------------------------------
# Description: Offset: 10b, Width: 6b, Instruction operation code.
# - STOP, (0): Stop execution and de-assert CS. Then, the next command sequence (to the same flash device) starts
# from instruction pointer 0.
# - CMD_SDR, (1): Transmit command code to Flash.
# - RADDR_SDR, (2): Transmit row address to Flash.
# - CADDR_SDR, (3): Transmit column address to Flash.
# - MODE1_SDR, (4): Transmit mode bits to Flash.
# - MODE2_SDR, (5): Transmit mode bits to Flash.
# - MODE4_SDR, (6): Transmit mode bits to Flash.
# - MODE8_SDR, (7): Transmit mode bits to Flash.
# - WRITE_SDR, (8): Transmit program data to Flash device.
# - READ_SDR, (9): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_SDR, (10): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_SDR, (11): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_SDR, (12): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_SDR, (13): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# - JMP_ON_CS, (31): Stop execution, de-assert CS and save operand[7:0] as the instruction start pointer for next
# sequence.Normally this instruction is used to support Execute-In-Place enhanced mode. See XIP enhanced mode for
# more details.This instruction is only allowed for AHB read commands. There is interrupt status bit set
# (INTR[IPCMDERR] or INTR[AHBCMDERR]) when using this instruction in IP command or AHB write command.
# - CMD_DDR, (33): Transmit command code to Flash.
# - RADDR_DDR, (34): Transmit row address to Flash.
# - CADDR_DDR, (35): Transmit column address to Flash.
# - MODE1_DDR, (36): Transmit mode bits to Flash.
# - MODE2_DDR, (37): Transmit mode bits to Flash.
# - MODE4_DDR, (38): Transmit mode bits to Flash.
# - MODE8_DDR, (39): Transmit mode bits to Flash.
# - WRITE_DDR, (40): Transmit program data to Flash device.
# - READ_DDR, (41): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_DDR, (42): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_DDR, (43): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_DDR, (44): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_DDR, (45): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# Possible options: <STOP, CMD_SDR, RADDR_SDR, CADDR_SDR, MODE1_SDR, MODE2_SDR, MODE4_SDR, MODE8_SDR, WRITE_SDR,
# READ_SDR, LEARN_SDR, DATSZ_SDR, DUMMY_SDR, DUMMY_RWDS_SDR, JMP_ON_CS, CMD_DDR, RADDR_DDR, CADDR_DDR, MODE1_DDR,
# MODE2_DDR, MODE4_DDR, MODE8_DDR, WRITE_DDR, READ_DDR, LEARN_DDR, DATSZ_DDR, DUMMY_DDR, DUMMY_RWDS_DDR>
OPERATION_CODE: STOP
lookupTable_seq13_instr1:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq13_instr2:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq13_instr3:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq13_instr4:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq13_instr5:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq13_instr6:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq13_instr7:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
# ----------------------------------===== lookupTable_seq14_instr0 [Optional] =====-----------------------------------
# Description: Offset: 0x00000160, Width: 16b; Lookup table holds Flash command sequences 14, instruction 0
lookupTable_seq14_instr0:
# ------------------------------------------===== OPERAND [Optional] =====------------------------------------------
# Description: Offset: 0b, Width: 8b, Instruction operand. Its values depends on used instruction
OPERAND: 0
# -----------------------------------------===== NUM_PADS [Optional] =====------------------------------------------
# Description: Offset: 8b, Width: 2b, Number of pads used by instruction. Some instructions ignores this parameter.
# - 1PAD, (0): Single mode. One pad is used.
# - 2PAD, (1): Dual mode. Two pads are used.
# - 4PAD, (2): Quad mode. Four pads are used.
# - 8PAD, (3): Octal mode. Eight pads are used.
# Possible options: <1PAD, 2PAD, 4PAD, 8PAD>
NUM_PADS: 1PAD
# --------------------------------------===== OPERATION_CODE [Optional] =====---------------------------------------
# Description: Offset: 10b, Width: 6b, Instruction operation code.
# - STOP, (0): Stop execution and de-assert CS. Then, the next command sequence (to the same flash device) starts
# from instruction pointer 0.
# - CMD_SDR, (1): Transmit command code to Flash.
# - RADDR_SDR, (2): Transmit row address to Flash.
# - CADDR_SDR, (3): Transmit column address to Flash.
# - MODE1_SDR, (4): Transmit mode bits to Flash.
# - MODE2_SDR, (5): Transmit mode bits to Flash.
# - MODE4_SDR, (6): Transmit mode bits to Flash.
# - MODE8_SDR, (7): Transmit mode bits to Flash.
# - WRITE_SDR, (8): Transmit program data to Flash device.
# - READ_SDR, (9): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_SDR, (10): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_SDR, (11): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_SDR, (12): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_SDR, (13): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# - JMP_ON_CS, (31): Stop execution, de-assert CS and save operand[7:0] as the instruction start pointer for next
# sequence.Normally this instruction is used to support Execute-In-Place enhanced mode. See XIP enhanced mode for
# more details.This instruction is only allowed for AHB read commands. There is interrupt status bit set
# (INTR[IPCMDERR] or INTR[AHBCMDERR]) when using this instruction in IP command or AHB write command.
# - CMD_DDR, (33): Transmit command code to Flash.
# - RADDR_DDR, (34): Transmit row address to Flash.
# - CADDR_DDR, (35): Transmit column address to Flash.
# - MODE1_DDR, (36): Transmit mode bits to Flash.
# - MODE2_DDR, (37): Transmit mode bits to Flash.
# - MODE4_DDR, (38): Transmit mode bits to Flash.
# - MODE8_DDR, (39): Transmit mode bits to Flash.
# - WRITE_DDR, (40): Transmit program data to Flash device.
# - READ_DDR, (41): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_DDR, (42): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_DDR, (43): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_DDR, (44): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_DDR, (45): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# Possible options: <STOP, CMD_SDR, RADDR_SDR, CADDR_SDR, MODE1_SDR, MODE2_SDR, MODE4_SDR, MODE8_SDR, WRITE_SDR,
# READ_SDR, LEARN_SDR, DATSZ_SDR, DUMMY_SDR, DUMMY_RWDS_SDR, JMP_ON_CS, CMD_DDR, RADDR_DDR, CADDR_DDR, MODE1_DDR,
# MODE2_DDR, MODE4_DDR, MODE8_DDR, WRITE_DDR, READ_DDR, LEARN_DDR, DATSZ_DDR, DUMMY_DDR, DUMMY_RWDS_DDR>
OPERATION_CODE: STOP
lookupTable_seq14_instr1:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq14_instr2:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq14_instr3:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq14_instr4:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq14_instr5:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq14_instr6:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq14_instr7:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
# ----------------------------------===== lookupTable_seq15_instr0 [Optional] =====-----------------------------------
# Description: Offset: 0x00000170, Width: 16b; Lookup table holds Flash command sequences 15, instruction 0
lookupTable_seq15_instr0:
# ------------------------------------------===== OPERAND [Optional] =====------------------------------------------
# Description: Offset: 0b, Width: 8b, Instruction operand. Its values depends on used instruction
OPERAND: 0
# -----------------------------------------===== NUM_PADS [Optional] =====------------------------------------------
# Description: Offset: 8b, Width: 2b, Number of pads used by instruction. Some instructions ignores this parameter.
# - 1PAD, (0): Single mode. One pad is used.
# - 2PAD, (1): Dual mode. Two pads are used.
# - 4PAD, (2): Quad mode. Four pads are used.
# - 8PAD, (3): Octal mode. Eight pads are used.
# Possible options: <1PAD, 2PAD, 4PAD, 8PAD>
NUM_PADS: 1PAD
# --------------------------------------===== OPERATION_CODE [Optional] =====---------------------------------------
# Description: Offset: 10b, Width: 6b, Instruction operation code.
# - STOP, (0): Stop execution and de-assert CS. Then, the next command sequence (to the same flash device) starts
# from instruction pointer 0.
# - CMD_SDR, (1): Transmit command code to Flash.
# - RADDR_SDR, (2): Transmit row address to Flash.
# - CADDR_SDR, (3): Transmit column address to Flash.
# - MODE1_SDR, (4): Transmit mode bits to Flash.
# - MODE2_SDR, (5): Transmit mode bits to Flash.
# - MODE4_SDR, (6): Transmit mode bits to Flash.
# - MODE8_SDR, (7): Transmit mode bits to Flash.
# - WRITE_SDR, (8): Transmit program data to Flash device.
# - READ_SDR, (9): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_SDR, (10): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_SDR, (11): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_SDR, (12): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_SDR, (13): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# - JMP_ON_CS, (31): Stop execution, de-assert CS and save operand[7:0] as the instruction start pointer for next
# sequence.Normally this instruction is used to support Execute-In-Place enhanced mode. See XIP enhanced mode for
# more details.This instruction is only allowed for AHB read commands. There is interrupt status bit set
# (INTR[IPCMDERR] or INTR[AHBCMDERR]) when using this instruction in IP command or AHB write command.
# - CMD_DDR, (33): Transmit command code to Flash.
# - RADDR_DDR, (34): Transmit row address to Flash.
# - CADDR_DDR, (35): Transmit column address to Flash.
# - MODE1_DDR, (36): Transmit mode bits to Flash.
# - MODE2_DDR, (37): Transmit mode bits to Flash.
# - MODE4_DDR, (38): Transmit mode bits to Flash.
# - MODE8_DDR, (39): Transmit mode bits to Flash.
# - WRITE_DDR, (40): Transmit program data to Flash device.
# - READ_DDR, (41): Receive read data from Flash device. Read data is put into AHB_RX_BUF or IP_RX_FIFO.
# - LEARN_DDR, (42): Receive read data or Preamble bit from Flash deviceThe FlexSPI controller will compare the data
# line bits with DLPR register to determine a correct sampling clock phase.
# - DATSZ_DDR, (43): Transmit read or program data size (byte number) to Flash device.
# - DUMMY_DDR, (44): Leave data lines undriven by the FlexSPI controller. Turnaround cycles are provided from host
# driving to device driving. num_pads determines the number of pads in input mode.
# - DUMMY_RWDS_DDR, (45): This instruction is similar to DUMMY_SDR/DUMMY_DDR instruction. The difference lies in the
# dummy cycle number.DQS pin is called RWDS in HyperBus specification. See Dummy instruction for more details.Set
# operand as 'Latency count' for HyperBus devices.
# Possible options: <STOP, CMD_SDR, RADDR_SDR, CADDR_SDR, MODE1_SDR, MODE2_SDR, MODE4_SDR, MODE8_SDR, WRITE_SDR,
# READ_SDR, LEARN_SDR, DATSZ_SDR, DUMMY_SDR, DUMMY_RWDS_SDR, JMP_ON_CS, CMD_DDR, RADDR_DDR, CADDR_DDR, MODE1_DDR,
# MODE2_DDR, MODE4_DDR, MODE8_DDR, WRITE_DDR, READ_DDR, LEARN_DDR, DATSZ_DDR, DUMMY_DDR, DUMMY_RWDS_DDR>
OPERATION_CODE: STOP
lookupTable_seq15_instr1:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq15_instr2:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq15_instr3:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq15_instr4:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq15_instr5:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq15_instr6:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
lookupTable_seq15_instr7:
OPERAND: 0
NUM_PADS: 1PAD
OPERATION_CODE: STOP
# ---------------------------------------===== lutCustomSeq_0 [Optional] =====----------------------------------------
# Description: Offset: 0x00000180, Width: 32b; [0x180-0x1af] Customizable LUT Sequences
lutCustomSeq_0:
# ------------------------------------------===== seqNum [Optional] =====-------------------------------------------
# Description: Offset: 0b, Width: 8b, Sequence Number, valid number: 1-16
seqNum: 0
# -------------------------------------------===== seqId [Optional] =====-------------------------------------------
# Description: Offset: 8b, Width: 8b, Sequence Index, valid number: 0-15
seqId: 0
# -----------------------------------------===== reserved [Optional] =====------------------------------------------
# Description: Offset: 16b, Width: 16b, Reserved
reserved: 0
# ---------------------------------------===== lutCustomSeq_1 [Optional] =====----------------------------------------
# Description: Offset: 0x00000184, Width: 32b; [0x180-0x1af] Customizable LUT Sequences
lutCustomSeq_1:
# ------------------------------------------===== seqNum [Optional] =====-------------------------------------------
# Description: Offset: 0b, Width: 8b, Sequence Number, valid number: 1-16
seqNum: 0
# -------------------------------------------===== seqId [Optional] =====-------------------------------------------
# Description: Offset: 8b, Width: 8b, Sequence Index, valid number: 0-15
seqId: 0
# -----------------------------------------===== reserved [Optional] =====------------------------------------------
# Description: Offset: 16b, Width: 16b, Reserved
reserved: 0
# ---------------------------------------===== lutCustomSeq_2 [Optional] =====----------------------------------------
# Description: Offset: 0x00000188, Width: 32b; [0x180-0x1af] Customizable LUT Sequences
lutCustomSeq_2:
# ------------------------------------------===== seqNum [Optional] =====-------------------------------------------
# Description: Offset: 0b, Width: 8b, Sequence Number, valid number: 1-16
seqNum: 0
# -------------------------------------------===== seqId [Optional] =====-------------------------------------------
# Description: Offset: 8b, Width: 8b, Sequence Index, valid number: 0-15
seqId: 0
# -----------------------------------------===== reserved [Optional] =====------------------------------------------
# Description: Offset: 16b, Width: 16b, Reserved
reserved: 0
# ---------------------------------------===== lutCustomSeq_3 [Optional] =====----------------------------------------
# Description: Offset: 0x0000018C, Width: 32b; [0x180-0x1af] Customizable LUT Sequences
lutCustomSeq_3:
# ------------------------------------------===== seqNum [Optional] =====-------------------------------------------
# Description: Offset: 0b, Width: 8b, Sequence Number, valid number: 1-16
seqNum: 0
# -------------------------------------------===== seqId [Optional] =====-------------------------------------------
# Description: Offset: 8b, Width: 8b, Sequence Index, valid number: 0-15
seqId: 0
# -----------------------------------------===== reserved [Optional] =====------------------------------------------
# Description: Offset: 16b, Width: 16b, Reserved
reserved: 0
# ---------------------------------------===== lutCustomSeq_4 [Optional] =====----------------------------------------
# Description: Offset: 0x00000190, Width: 32b; [0x180-0x1af] Customizable LUT Sequences
lutCustomSeq_4:
# ------------------------------------------===== seqNum [Optional] =====-------------------------------------------
# Description: Offset: 0b, Width: 8b, Sequence Number, valid number: 1-16
seqNum: 0
# -------------------------------------------===== seqId [Optional] =====-------------------------------------------
# Description: Offset: 8b, Width: 8b, Sequence Index, valid number: 0-15
seqId: 0
# -----------------------------------------===== reserved [Optional] =====------------------------------------------
# Description: Offset: 16b, Width: 16b, Reserved
reserved: 0
# ---------------------------------------===== lutCustomSeq_5 [Optional] =====----------------------------------------
# Description: Offset: 0x00000194, Width: 32b; [0x180-0x1af] Customizable LUT Sequences
lutCustomSeq_5:
# ------------------------------------------===== seqNum [Optional] =====-------------------------------------------
# Description: Offset: 0b, Width: 8b, Sequence Number, valid number: 1-16
seqNum: 0
# -------------------------------------------===== seqId [Optional] =====-------------------------------------------
# Description: Offset: 8b, Width: 8b, Sequence Index, valid number: 0-15
seqId: 0
# -----------------------------------------===== reserved [Optional] =====------------------------------------------
# Description: Offset: 16b, Width: 16b, Reserved
reserved: 0
# ---------------------------------------===== lutCustomSeq_6 [Optional] =====----------------------------------------
# Description: Offset: 0x00000198, Width: 32b; [0x180-0x1af] Customizable LUT Sequences
lutCustomSeq_6:
# ------------------------------------------===== seqNum [Optional] =====-------------------------------------------
# Description: Offset: 0b, Width: 8b, Sequence Number, valid number: 1-16
seqNum: 0
# -------------------------------------------===== seqId [Optional] =====-------------------------------------------
# Description: Offset: 8b, Width: 8b, Sequence Index, valid number: 0-15
seqId: 0
# -----------------------------------------===== reserved [Optional] =====------------------------------------------
# Description: Offset: 16b, Width: 16b, Reserved
reserved: 0
# ---------------------------------------===== lutCustomSeq_7 [Optional] =====----------------------------------------
# Description: Offset: 0x0000019C, Width: 32b; [0x180-0x1af] Customizable LUT Sequences
lutCustomSeq_7:
# ------------------------------------------===== seqNum [Optional] =====-------------------------------------------
# Description: Offset: 0b, Width: 8b, Sequence Number, valid number: 1-16
seqNum: 0
# -------------------------------------------===== seqId [Optional] =====-------------------------------------------
# Description: Offset: 8b, Width: 8b, Sequence Index, valid number: 0-15
seqId: 0
# -----------------------------------------===== reserved [Optional] =====------------------------------------------
# Description: Offset: 16b, Width: 16b, Reserved
reserved: 0
# ---------------------------------------===== lutCustomSeq_8 [Optional] =====----------------------------------------
# Description: Offset: 0x000001A0, Width: 32b; [0x180-0x1af] Customizable LUT Sequences
lutCustomSeq_8:
# ------------------------------------------===== seqNum [Optional] =====-------------------------------------------
# Description: Offset: 0b, Width: 8b, Sequence Number, valid number: 1-16
seqNum: 0
# -------------------------------------------===== seqId [Optional] =====-------------------------------------------
# Description: Offset: 8b, Width: 8b, Sequence Index, valid number: 0-15
seqId: 0
# -----------------------------------------===== reserved [Optional] =====------------------------------------------
# Description: Offset: 16b, Width: 16b, Reserved
reserved: 0
# ---------------------------------------===== lutCustomSeq_9 [Optional] =====----------------------------------------
# Description: Offset: 0x000001A4, Width: 32b; [0x180-0x1af] Customizable LUT Sequences
lutCustomSeq_9:
# ------------------------------------------===== seqNum [Optional] =====-------------------------------------------
# Description: Offset: 0b, Width: 8b, Sequence Number, valid number: 1-16
seqNum: 0
# -------------------------------------------===== seqId [Optional] =====-------------------------------------------
# Description: Offset: 8b, Width: 8b, Sequence Index, valid number: 0-15
seqId: 0
# -----------------------------------------===== reserved [Optional] =====------------------------------------------
# Description: Offset: 16b, Width: 16b, Reserved
reserved: 0
# ---------------------------------------===== lutCustomSeq_10 [Optional] =====---------------------------------------
# Description: Offset: 0x000001A8, Width: 32b; [0x180-0x1af] Customizable LUT Sequences
lutCustomSeq_10:
# ------------------------------------------===== seqNum [Optional] =====-------------------------------------------
# Description: Offset: 0b, Width: 8b, Sequence Number, valid number: 1-16
seqNum: 0
# -------------------------------------------===== seqId [Optional] =====-------------------------------------------
# Description: Offset: 8b, Width: 8b, Sequence Index, valid number: 0-15
seqId: 0
# -----------------------------------------===== reserved [Optional] =====------------------------------------------
# Description: Offset: 16b, Width: 16b, Reserved
reserved: 0
# ---------------------------------------===== lutCustomSeq_11 [Optional] =====---------------------------------------
# Description: Offset: 0x000001AC, Width: 32b; [0x180-0x1af] Customizable LUT Sequences
lutCustomSeq_11:
# ------------------------------------------===== seqNum [Optional] =====-------------------------------------------
# Description: Offset: 0b, Width: 8b, Sequence Number, valid number: 1-16
seqNum: 0
# -------------------------------------------===== seqId [Optional] =====-------------------------------------------
# Description: Offset: 8b, Width: 8b, Sequence Index, valid number: 0-15
seqId: 0
# -----------------------------------------===== reserved [Optional] =====------------------------------------------
# Description: Offset: 16b, Width: 16b, Reserved
reserved: 0
# -----------------------------------------===== reserved4_0 [Optional] =====-----------------------------------------
# Description: Offset: 0x000001B0, Width: 32b; [0x1b0-0x1bf] Reserved for future use
reserved4_0: '0x00000000'
# -----------------------------------------===== reserved4_1 [Optional] =====-----------------------------------------
# Description: Offset: 0x000001B4, Width: 32b; [0x1b0-0x1bf] Reserved for future use
reserved4_1: '0x00000000'
# -----------------------------------------===== reserved4_2 [Optional] =====-----------------------------------------
# Description: Offset: 0x000001B8, Width: 32b; [0x1b0-0x1bf] Reserved for future use
reserved4_2: '0x00000000'
# -----------------------------------------===== reserved4_3 [Optional] =====-----------------------------------------
# Description: Offset: 0x000001BC, Width: 32b; [0x1b0-0x1bf] Reserved for future use
reserved4_3: '0x00000000'
# ------------------------------------------===== pageSize [Optional] =====-------------------------------------------
# Description: Offset: 0x000001C0, Width: 32b; Page size of Serial NOR
pageSize: '0x00000000'
# -----------------------------------------===== sectorSize [Optional] =====------------------------------------------
# Description: Offset: 0x000001C4, Width: 32b; Sector size of Serial NOR
sectorSize: '0x00000000'
# -------------------------------------===== ipcmdSerialClkFreq [Optional] =====--------------------------------------
# Description: Offset: 0x000001C8, Width: 8b; Clock frequency for IP command
ipcmdSerialClkFreq: '0x00'
# -------------------------------------===== isUniformBlockSize [Optional] =====--------------------------------------
# Description: Offset: 0x000001C9, Width: 8b; Sector/Block size is the same
isUniformBlockSize: '0x00'
# -------------------------------------===== isDataOrderSwapped [Optional] =====--------------------------------------
# Description: Offset: 0x000001CA, Width: 8b; Data order (D0, D1, D2, D3) is swapped (D1,D0, D3, D2)
isDataOrderSwapped: '0x00'
# -----------------------------------------===== reserved0_0 [Optional] =====-----------------------------------------
# Description: Offset: 0x000001CB, Width: 8b; Reserved for future use
reserved0_0: '0x00'
# ----------------------------------------===== serialNorType [Optional] =====----------------------------------------
# Description: Offset: 0x000001CC, Width: 8b; Serial NOR Flash type: 0/1/2/3
serialNorType: '0x00'
# --------------------------------------===== needExitNoCmdMode [Optional] =====--------------------------------------
# Description: Offset: 0x000001CD, Width: 8b; Need to exit NoCmd mode before other IP command
needExitNoCmdMode: '0x00'
# ------------------------------------===== halfClkForNonReadCmd [Optional] =====-------------------------------------
# Description: Offset: 0x000001CE, Width: 8b; Half the Serial Clock for non-read command: true/false
halfClkForNonReadCmd: '0x00'
# ------------------------------------===== needRestoreNoCmdMode [Optional] =====-------------------------------------
# Description: Offset: 0x000001CF, Width: 8b; Need to Restore NoCmd mode after IP command execution
needRestoreNoCmdMode: '0x00'
# ------------------------------------------===== blockSize [Optional] =====------------------------------------------
# Description: Offset: 0x000001D0, Width: 32b; Block size
blockSize: '0x00000000'
# ----------------------------------------===== flashStateCtx [Optional] =====----------------------------------------
# Description: Offset: 0x000001D4, Width: 32b; Flash State Context
flashStateCtx: '0x00000000'
# -----------------------------------------===== reserve2_0 [Optional] =====------------------------------------------
# Description: Offset: 0x000001D8, Width: 32b; Reserved for future use
reserve2_0: '0x00000000'
# -----------------------------------------===== reserve2_1 [Optional] =====------------------------------------------
# Description: Offset: 0x000001DC, Width: 32b; Reserved for future use
reserve2_1: '0x00000000'
# -----------------------------------------===== reserve2_2 [Optional] =====------------------------------------------
# Description: Offset: 0x000001E0, Width: 32b; Reserved for future use
reserve2_2: '0x00000000'
# -----------------------------------------===== reserve2_3 [Optional] =====------------------------------------------
# Description: Offset: 0x000001E4, Width: 32b; Reserved for future use
reserve2_3: '0x00000000'
# -----------------------------------------===== reserve2_4 [Optional] =====------------------------------------------
# Description: Offset: 0x000001E8, Width: 32b; Reserved for future use
reserve2_4: '0x00000000'
# -----------------------------------------===== reserve2_5 [Optional] =====------------------------------------------
# Description: Offset: 0x000001EC, Width: 32b; Reserved for future use
reserve2_5: '0x00000000'
# -----------------------------------------===== reserve2_6 [Optional] =====------------------------------------------
# Description: Offset: 0x000001F0, Width: 32b; Reserved for future use
reserve2_6: '0x00000000'
# -----------------------------------------===== reserve2_7 [Optional] =====------------------------------------------
# Description: Offset: 0x000001F4, Width: 32b; Reserved for future use
reserve2_7: '0x00000000'
# -----------------------------------------===== reserve2_8 [Optional] =====------------------------------------------
# Description: Offset: 0x000001F8, Width: 32b; Reserved for future use
reserve2_8: '0x00000000'
# -----------------------------------------===== reserve2_9 [Optional] =====------------------------------------------
# Description: Offset: 0x000001FC, Width: 32b; Reserved for future use
reserve2_9: '0x00000000'