i.MX RT118x External Memory Configuration with SPSDK#
This notebook shows how an external memory can be configured using the SPSDK. All of the commands executed in the interactive cells can be run from a normal CMD or PowerShell as well.#
1. Prepare the environment#
Run the code below to initialize parametrs for the script:#
%run ../init_notebook.ipynb
import os
import pprint
from IPython.display import Code
pp = pprint.PrettyPrinter(indent=4)
WORKSPACE = "workspace/" # change this to path to your workspace
INPUTS = "inputs/"
VERBOSITY = (
"-v" # verbosity of commands, might be -v or -vv for debug or blank for no additional info
)
FLASHLOADER_FILE = "../flashloader/ahab/workspace/flashloader.bin" # Path to Flashloader
CFG_MEM_FILE = WORKSPACE + "config_mem.bls" # Configure memory template
CUSTOM_CFG_MEM_FILE = WORKSPACE + "custom_config_mem.bls" # Configure memory template
FCB_FILE = WORKSPACE + "fcb.bin" # Firmware Configuration block file
CUSTOM_FCB_FILE = WORKSPACE + "custom_fcb.bin" # Firmware Configuration block file
env: JUPYTER_SPSDK=1
Created `%!` as an alias for `%execute`.
Generate a flashloader binary#
We will need program our boards with a flashloader binary to be able to send blhost commands to it. To get such a binary, we can use the signed_flashloader notebook. The details are out of scope for this session, so just open the signed_flashloader notebook, use the “Run All Cells” option and close it again.
2. Connect your board to you PC. Use both the Debug USB Port and USB OTG1 port and set the board to SDP mode.#
EVK Board Overview#
Configure Boot Mode Switch to SDP: 1-OFF, 2-OFF, 3-OFF, 4-ON
Connect your board to your PC via a micro USB using the USB OTG1 port - J33
Connect your board to your PC via a micro USB using the Debug USB port - J53
The following picture describes connector placement of RT1180 EVK:#
3. Scan for available devices with nxpdevscan, connect to the i.MX RT1180 and load a flashloader into it using blhost#
Call nxpdevscan –help to get a list of options supported by nxpdevscan:#
%! nxpdevscan --help
nxpdevscan --help
Usage: nxpdevscan [OPTIONS]
Utility listing all connected NXP USB and UART devices.
NOTE: This utility lists all NXPs USB and UART devices connected to the
host. By default it scans UART devices by pinging them (sending the mboot or
SDP command). This however causes that the device ISP mode is locked to
UART. Use the -n/--no-scan option to disable this behavior. If you want to
only scan for NXP UART devices, use the --nxp option.
Options:
-e, --extend-vids TEXT VID in hex to extend search.
-o, --output FILENAME
-n, --no-scan Do not scan UART devices by pinging them.
--nxp Scan only NXP UART devices.
Narrow down the scope of scanning: [mutually_exclusive]
-a, --all Search for all NXP devices (default)
-u, --usb Search only for USB devices
-sd, --sdio Search only for SDIO devices
-p, --port Search only for UART devices
-l, --lpcusbsio Search only for USBSIO devices
-v, --verbose Print more detailed information
-vv, --debug Display more debugging information.
--version Show the version and exit.
--help Show this message and exit.
%! nxpdevscan
nxpdevscan
-------- Connected NXP USB Devices --------
MCU-LINK NXP TRACE - NXP Semiconductors
Vendor ID: 0x1fc9
Product ID: 0x0143
Path: HID\VID_1FC9&PID_0143&MI_01\A&BEC7DF5&0&0000
Path Hash: 884d05f8
Name: k32w1xx | kw45xx | mcxw71xx
Serial number: 5RR4XWAAQLSBP
USB COMPOSITE DEVICE - FREESCALE SEMICONDUCTOR INC.
Vendor ID: 0x15a2
Product ID: 0x0073
Path: HID\VID_15A2&PID_0073\A&B33C6E3&0&0000
Path Hash: 29fa2649
Name: rt118x | rt1010 | rt102x | mwct2xxxs | rt1015 | rt105x | rt106x | rt104x | rt117x | rt116x
Serial number:
-------- Connected NXP UART Devices --------
Port: COM13
Type: mboot device
-------- Connected NXP SIO Devices --------
The Vendor and Product ID values of the OO Blank RT Family - NXP SEMICONDUCTORS are the default values for the boot ROM.#
Store them in a variable for later use:#
COMPAR = "-u" # USB
BLHOST_CONNECT_ROM = "0x1fc9,0x014c" # PID/VID of ROM
4. Generate a blhost script for memory configuration using nxpmemcfg#
Call nxpmemcfg or nxpmemcfg –help to get a list of options and sub-commands supported by nxpmemcfg#
%! nxpmemcfg
nxpmemcfg
Usage: nxpmemcfg [OPTIONS] COMMAND [ARGS]...
Collection of utilities for memory configuration operations.
Options:
-v, --verbose Print more detailed information
-vv, --debug Display more debugging information.
--version Show the version and exit.
--help Show this message and exit.
Commands:
nxpmemcfg Collection of utilities for memory configuration operations.
├── blhost-script Export the configuration option words to blhost script.
├── export Export the configuration option words from configuration.
├── family-info List known memory configurations for the family.
├── get-templates Create template of Memory option words in YAML format.
└── parse Parse the existing memory configuration option words.
Call nxpmemcfg blhost-script or nxpmemcfg blhost-script –help to get a list of options supported by nxpmemcfg blhost-script:#
%! nxpmemcfg blhost-script
nxpmemcfg blhost-script
Usage: nxpmemcfg blhost-script [OPTIONS]
Export the configuration option words to blhost script.
Options:
Known chip select. Alternative to known chip is YAML configuration '-c': [all_or_none]
-f, --family [lpc5502|lpc5504|lpc5506|lpc5512..., and more. Use 'get-families' command to show all.]
Select the chip family.
-m, --memory-chip TEXT Select supported memory chip name. Use
family-info command to get the known names.
-i, --interface TEXT Select supported memory chip interface. Use
family-info command to get the known
interfaces.
-c, --config FILE Option word configuration YAML file, in case
that known chip has not been used
-ix, --instance INTEGER Instance of peripheral if applicable
--fcb PATH Optional filename of FCB block generated by
HW and read back to PC. Be aware that script
will contain also erase of 4KB on base
address.
--secure-addresses If defined, the secure address will be used
in case of generating FCB block.
-o, --output FILE Name of BLHOST script. If not specified, the
script will be printed to command line
--force Force overwriting of existing files.
--help Show this message and exit.
As you can see, there are several parameters we will need to be able to generate the blhost-script:#
f: device family, we will choose mimxrt1189
m: memory chip, we need to find out the correct name
i: memory interface, we need to find out the correct name
ix: peripheral instance index, we need to find out the correct value
o and fcb output file paths are up to our choice. This was configured in the first step into the CFG_MEM_FILE and FCB_FILE variables.
Call nxpmemcfg family-info to check the known memories and their default configurations:#
%! nxpmemcfg family-info
nxpmemcfg family-info
List of all supported peripherals and its instances:
╔════╦════════════╦═════════════╦══════════════╦══════════╦═══════════╦══════════════════════════╦════════╦════════╗
║ # ║ Family ║ flexspi_nor ║ flexspi_nand ║ semc_nor ║ semc_nand ║ spi_nor ║ mmc ║ sd ║
╠════╬════════════╬═════════════╬══════════════╬══════════╬═══════════╬══════════════════════════╬════════╬════════╣
║ 0 ║ lpc5502 ║ N/A ║ N/A ║ N/A ║ N/A ║ [3] ║ N/A ║ N/A ║
║ 1 ║ lpc5504 ║ N/A ║ N/A ║ N/A ║ N/A ║ [3] ║ N/A ║ N/A ║
║ 2 ║ lpc5506 ║ N/A ║ N/A ║ N/A ║ N/A ║ [3] ║ N/A ║ N/A ║
║ 3 ║ lpc5512 ║ N/A ║ N/A ║ N/A ║ N/A ║ [3] ║ N/A ║ N/A ║
║ 4 ║ lpc5514 ║ N/A ║ N/A ║ N/A ║ N/A ║ [3] ║ N/A ║ N/A ║
║ 5 ║ lpc5516 ║ N/A ║ N/A ║ N/A ║ N/A ║ [3] ║ N/A ║ N/A ║
║ 6 ║ lpc5526 ║ N/A ║ N/A ║ N/A ║ N/A ║ [3] ║ N/A ║ N/A ║
║ 7 ║ lpc5528 ║ N/A ║ N/A ║ N/A ║ N/A ║ [3] ║ N/A ║ N/A ║
║ 8 ║ lpc55s04 ║ N/A ║ N/A ║ N/A ║ N/A ║ [3] ║ N/A ║ N/A ║
║ 9 ║ lpc55s06 ║ N/A ║ N/A ║ N/A ║ N/A ║ [3] ║ N/A ║ N/A ║
║ 10 ║ lpc55s14 ║ N/A ║ N/A ║ N/A ║ N/A ║ [3] ║ N/A ║ N/A ║
║ 11 ║ lpc55s16 ║ N/A ║ N/A ║ N/A ║ N/A ║ [3] ║ N/A ║ N/A ║
║ 12 ║ lpc55s26 ║ N/A ║ N/A ║ N/A ║ N/A ║ [3] ║ N/A ║ N/A ║
║ 13 ║ lpc55s28 ║ N/A ║ N/A ║ N/A ║ N/A ║ [3] ║ N/A ║ N/A ║
║ 14 ║ lpc55s36 ║ Yes ║ N/A ║ N/A ║ N/A ║ [0, 1, 3, 8] ║ N/A ║ N/A ║
║ 15 ║ lpc55s66 ║ N/A ║ N/A ║ N/A ║ N/A ║ [3] ║ N/A ║ N/A ║
║ 16 ║ lpc55s69 ║ N/A ║ N/A ║ N/A ║ N/A ║ [3] ║ N/A ║ N/A ║
║ 17 ║ mcxn235 ║ N/A ║ N/A ║ N/A ║ N/A ║ [7] ║ N/A ║ N/A ║
║ 18 ║ mcxn236 ║ N/A ║ N/A ║ N/A ║ N/A ║ [7] ║ N/A ║ N/A ║
║ 19 ║ mimxrt1010 ║ Yes ║ N/A ║ N/A ║ N/A ║ N/A ║ N/A ║ N/A ║
║ 20 ║ mimxrt1015 ║ Yes ║ Yes ║ N/A ║ N/A ║ [1, 2, 3, 4] ║ N/A ║ N/A ║
║ 21 ║ mimxrt1020 ║ Yes ║ Yes ║ Yes ║ Yes ║ [1, 2, 3, 4] ║ [1, 2] ║ [1, 2] ║
║ 22 ║ mimxrt1024 ║ Yes ║ Yes ║ Yes ║ Yes ║ [1, 2, 3, 4] ║ [1, 2] ║ [1, 2] ║
║ 23 ║ mimxrt1040 ║ Yes ║ Yes ║ Yes ║ Yes ║ [1, 2, 3, 4] ║ [1, 2] ║ [1, 2] ║
║ 24 ║ mimxrt1050 ║ Yes ║ Yes ║ Yes ║ Yes ║ [1, 2, 3, 4] ║ [1, 2] ║ [1, 2] ║
║ 25 ║ mimxrt1060 ║ [1, 2] ║ Yes ║ Yes ║ Yes ║ [1, 2, 3, 4] ║ [1, 2] ║ [1, 2] ║
║ 26 ║ mimxrt1064 ║ Yes ║ Yes ║ Yes ║ Yes ║ [1, 2, 3, 4] ║ [1, 2] ║ [1, 2] ║
║ 27 ║ mimxrt1165 ║ [1, 2] ║ [1, 2] ║ Yes ║ Yes ║ [1, 2, 3, 4] ║ [1, 2] ║ [1, 2] ║
║ 28 ║ mimxrt1166 ║ [1, 2] ║ [1, 2] ║ Yes ║ Yes ║ [1, 2, 3, 4] ║ [1, 2] ║ [1, 2] ║
║ 29 ║ mimxrt1171 ║ [1, 2] ║ [1, 2] ║ Yes ║ Yes ║ [1, 2, 3, 4] ║ [1, 2] ║ [1, 2] ║
║ 30 ║ mimxrt1172 ║ [1, 2] ║ [1, 2] ║ Yes ║ Yes ║ [1, 2, 3, 4] ║ [1, 2] ║ [1, 2] ║
║ 31 ║ mimxrt1173 ║ [1, 2] ║ [1, 2] ║ Yes ║ Yes ║ [1, 2, 3, 4] ║ [1, 2] ║ [1, 2] ║
║ 32 ║ mimxrt1175 ║ [1, 2] ║ [1, 2] ║ Yes ║ Yes ║ [1, 2, 3, 4] ║ [1, 2] ║ [1, 2] ║
║ 33 ║ mimxrt1176 ║ [1, 2] ║ [1, 2] ║ Yes ║ Yes ║ [1, 2, 3, 4] ║ [1, 2] ║ [1, 2] ║
║ 34 ║ mimxrt1181 ║ [1, 2] ║ [1, 2] ║ Yes ║ Yes ║ [1, 2, 4, 5] ║ [1, 2] ║ [1, 2] ║
║ 35 ║ mimxrt1182 ║ [1, 2] ║ [1, 2] ║ Yes ║ Yes ║ [1, 2, 4, 5] ║ [1, 2] ║ [1, 2] ║
║ 36 ║ mimxrt1187 ║ [1, 2] ║ [1, 2] ║ Yes ║ Yes ║ [1, 2, 4, 5] ║ [1, 2] ║ [1, 2] ║
║ 37 ║ mimxrt1189 ║ [1, 2] ║ [1, 2] ║ Yes ║ Yes ║ [1, 2, 4, 5] ║ [1, 2] ║ [1, 2] ║
║ 38 ║ mimxrt533s ║ [0, 1] ║ [0, 1] ║ N/A ║ N/A ║ [0, 1, 2, 3, 4, 5, 6, 7] ║ [0, 1] ║ [0, 1] ║
║ 39 ║ mimxrt555s ║ [0, 1] ║ [0, 1] ║ N/A ║ N/A ║ [0, 1, 2, 3, 4, 5, 6, 7] ║ [0, 1] ║ [0, 1] ║
║ 40 ║ mimxrt595s ║ [0, 1] ║ [0, 1] ║ N/A ║ N/A ║ [0, 1, 2, 3, 4, 5, 6, 7] ║ [0, 1] ║ [0, 1] ║
║ 41 ║ mimxrt685s ║ [0, 1] ║ [0, 1] ║ N/A ║ N/A ║ [0, 1, 2, 3, 4, 5, 6, 7] ║ [0, 1] ║ [0, 1] ║
║ 42 ║ rw610 ║ Yes ║ N/A ║ N/A ║ N/A ║ [0, 1, 2, 3, 4] ║ N/A ║ N/A ║
║ 43 ║ rw612 ║ Yes ║ N/A ║ N/A ║ N/A ║ [0, 1, 2, 3, 4] ║ N/A ║ N/A ║
╚════╩════════════╩═════════════╩══════════════╩══════════╩═══════════╩══════════════════════════╩════════╩════════╝
List of all known memory configuration option words:
╔════╦══════════════╦══════════════╦══════════════════════╦═════════════╦════════════════════════════════════╗
║ # ║ Peripheral ║ Manufacturer ║ Name ║ Interface ║ Option words ║
╠════╬══════════════╬══════════════╬══════════════════════╬═════════════╬════════════════════════════════════╣
║ 0 ║ flexspi_nor ║ Winbond ║ W25QxxxJV ║ quad_spi ║ Opt0: 0xC0000207 ║
║ 1 ║ flexspi_nor ║ Winbond ║ W35T51NW ║ octal_spi ║ Opt0: 0xC0603005 ║
║ 2 ║ flexspi_nor ║ Macronix ║ MX25Uxxx32F ║ quad_spi ║ Opt0: 0xC0000007 ║
║ 3 ║ flexspi_nor ║ Macronix ║ MX25Lxxx45G ║ quad_spi ║ Opt0: 0xC0000007 ║
║ 4 ║ flexspi_nor ║ Macronix ║ MX25UMxxx45G ║ octal_spi ║ Opt0: 0xC0403037 ║
║ 5 ║ flexspi_nor ║ Macronix ║ MX66UMxxx45G ║ octal_spi ║ Opt0: 0xC0403037 ║
║ 6 ║ flexspi_nor ║ Macronix ║ MX25LMxxx45G ║ octal_spi ║ Opt0: 0xC0403037 ║
║ 7 ║ flexspi_nor ║ Macronix ║ MX25UM51345G ║ octal_spi ║ Opt0: 0xC0403037 ║
║ 8 ║ flexspi_nor ║ Macronix ║ MX25UM51345G_2nd ║ octal_spi ║ Opt0: 0xC1503051, Opt1: 0x20000014 ║
║ 9 ║ flexspi_nor ║ GigaDevice ║ GD25QxxxC ║ quad_spi ║ Opt0: 0xC0000406 ║
║ 10 ║ flexspi_nor ║ GigaDevice ║ GD25LBxxxE ║ quad_spi ║ Opt0: 0xC0000007 ║
║ 11 ║ flexspi_nor ║ GigaDevice ║ GD25LTxxxE ║ quad_spi ║ Opt0: 0xC0000008 ║
║ 12 ║ flexspi_nor ║ GigaDevice ║ GD25LXxxxE ║ quad_spi ║ Opt0: 0xC0603008 ║
║ 13 ║ flexspi_nor ║ ISSI ║ IS25LPxxxA ║ quad_spi ║ Opt0: 0xC0000007 ║
║ 14 ║ flexspi_nor ║ ISSI ║ IS25WPxxxA ║ quad_spi ║ Opt0: 0xC0000007 ║
║ 15 ║ flexspi_nor ║ ISSI ║ IS25LXxxx ║ octal_spi ║ Opt0: 0xC0603005 ║
║ 16 ║ flexspi_nor ║ ISSI ║ IS25WXxxx ║ octal_spi ║ Opt0: 0xC0603005 ║
║ 17 ║ flexspi_nor ║ ISSI ║ IS26KSxxxS ║ hyper_flash ║ Opt0: 0xC0233007 ║
║ 18 ║ flexspi_nor ║ ISSI ║ IS26KLxxxS ║ hyper_flash ║ Opt0: 0xC0233007 ║
║ 19 ║ flexspi_nor ║ Micron ║ MT25QLxxxA ║ quad_spi ║ Opt0: 0xC0000007 ║
║ 20 ║ flexspi_nor ║ Micron ║ RW303-MT35XUxxxABA1G ║ octal_spi ║ Opt0: 0xC0603005 ║
║ 21 ║ flexspi_nor ║ Micron ║ RW304-MT35XUxxxABA2G ║ octal_spi ║ Opt0: 0xC0633005 ║
║ 22 ║ flexspi_nor ║ Adesto ║ AT25SFxxxA ║ quad_spi ║ Opt0: 0xC0000007 ║
║ 23 ║ flexspi_nor ║ Adesto ║ ATXPxxx ║ octal_spi ║ Opt0: 0xC0803007 ║
║ 24 ║ flexspi_nor ║ Cypress ║ S25FSxxxS ║ quad_spi ║ Opt0: 0xC0000007 ║
║ 25 ║ flexspi_nor ║ Cypress ║ S25FLxxxS ║ quad_spi ║ Opt0: 0xC0000007 ║
║ 26 ║ flexspi_nor ║ Cypress ║ S26KSxxxS ║ hyper_flash ║ Opt0: 0xC0233007 ║
║ 27 ║ flexspi_nor ║ Cypress ║ S26KLxxxS ║ hyper_flash ║ Opt0: 0xC0233007 ║
║ 28 ║ flexspi_nor ║ Microchip ║ SST26VFxxxB ║ quad_spi ║ Opt0: 0xC0000005 ║
║ 29 ║ flexspi_nor ║ FudanMicro ║ FM25Qxxx ║ quad_spi ║ Opt0: 0xC0000205 ║
║ 30 ║ flexspi_nor ║ BoyaMicro ║ BY25QxxxBS ║ quad_spi ║ Opt0: 0xC0000405 ║
║ 31 ║ flexspi_nor ║ XMC ║ XM25QHxxxB ║ quad_spi ║ Opt0: 0xC0000007 ║
║ 32 ║ flexspi_nor ║ XMC ║ XM25QUxxxB ║ quad_spi ║ Opt0: 0xC0000007 ║
║ 33 ║ flexspi_nor ║ XTXtech ║ X25FxxxB ║ quad_spi ║ Opt0: 0xC0000407 ║
║ 34 ║ flexspi_nor ║ XTXtech ║ X25QxxxD ║ quad_spi ║ Opt0: 0xC0000407 ║
║ 35 ║ flexspi_nor ║ Puya ║ P25QxxxLE ║ quad_spi ║ Opt0: 0xC0000405 ║
║ 36 ║ flexspi_nor ║ Puya ║ P25QxxxH ║ quad_spi ║ Opt0: 0xC0000405 ║
║ 37 ║ flexspi_nor ║ Puya ║ P25QxxxU ║ quad_spi ║ Opt0: 0xC0000405 ║
║ 38 ║ flexspi_nor ║ AMIC ║ A25LQxxx ║ quad_spi ║ Opt0: 0xC0000105 ║
╚════╩══════════════╩══════════════╩══════════════════════╩═════════════╩════════════════════════════════════╝
║ 39 ║ flexspi_nand ║ Winbond ║ W25N01G ║ quad_spi ║ Opt0: 0xC1010026, Opt1: 0x000000EF ║
║ 40 ║ flexspi_nand ║ Winbond ║ W25N02K ║ quad_spi ║ Opt0: 0xC1020026, Opt1: 0x000000EF ║
║ 41 ║ flexspi_nand ║ Macronix ║ MX35UF1G ║ quad_spi ║ Opt0: 0xC1010026, Opt1: 0x000000C2 ║
║ 42 ║ flexspi_nand ║ Macronix ║ MX35LF1G ║ quad_spi ║ Opt0: 0xC1010026, Opt1: 0x000000C2 ║
║ 43 ║ flexspi_nand ║ Macronix ║ MX35UF2G ║ quad_spi ║ Opt0: 0xC1020026, Opt1: 0x000000C2 ║
║ 44 ║ flexspi_nand ║ Macronix ║ MX35LF2G ║ quad_spi ║ Opt0: 0xC1020026, Opt1: 0x000000C2 ║
║ 45 ║ flexspi_nand ║ GigaDevice ║ GD5F1GQ5 ║ quad_spi ║ Opt0: 0xC1010026, Opt1: 0x000000C8 ║
║ 46 ║ flexspi_nand ║ GigaDevice ║ GD5F2GQ5 ║ quad_spi ║ Opt0: 0xC1020026, Opt1: 0x000000C8 ║
║ 47 ║ flexspi_nand ║ Micron ║ MT29F1G01AA ║ quad_spi ║ Opt0: 0xC1011022, Opt1: 0x0000002C ║
║ 48 ║ flexspi_nand ║ Micron ║ MT29F2G01AA ║ quad_spi ║ Opt0: 0xC1021022, Opt1: 0x0000002C ║
║ 49 ║ flexspi_nand ║ Paragon ║ PN26Q01A ║ quad_spi ║ Opt0: 0xC1010026, Opt1: 0x000000A1 ║
║ 50 ║ flexspi_nand ║ Paragon ║ PN26G01A ║ quad_spi ║ Opt0: 0xC1010026, Opt1: 0x000000A1 ║
║ 51 ║ flexspi_nand ║ Paragon ║ PN26Q02A ║ quad_spi ║ Opt0: 0xC1020026, Opt1: 0x000000A1 ║
║ 52 ║ flexspi_nand ║ Paragon ║ PN26G02A ║ quad_spi ║ Opt0: 0xC1020026, Opt1: 0x000000A1 ║
╚════╩══════════════╩══════════════╩══════════════════════╩═════════════╩════════════════════════════════════╝
║ 53 ║ semc_nor ║ Micron ║ MT28EW128ABA ║ parallel ║ Opt0: 0xD0000600 ║
║ 54 ║ semc_nor ║ Micron ║ MT28UG128ABA ║ parallel ║ Opt0: 0xD0000601 ║
╚════╩══════════════╩══════════════╩══════════════════════╩═════════════╩════════════════════════════════════╝
║ 55 ║ sd ║ General ║ 1bit_sdr12 ║ instance_0 ║ Opt0: 0xD0000000 ║
║ 56 ║ sd ║ General ║ 1bit_sdr12 ║ instance_1 ║ Opt0: 0xD0000001 ║
║ 57 ║ sd ║ General ║ 1bit_sdr12 ║ instance_2 ║ Opt0: 0xD0000002 ║
║ 58 ║ sd ║ General ║ 1bit_sdr12 ║ instance_3 ║ Opt0: 0xD0000003 ║
╚════╩══════════════╩══════════════╩══════════════════════╩═════════════╩════════════════════════════════════╝
Since we’re using the EVK, we are interested in the default FlexSPI NOR from Winbond on interface index 1:#
Note that if you use this approach, you will configure your memory with the default option words shown in the table. You will see how to change the default parameters in chapter 6.#
Now we can set the options according to the table:#
f: device family => mimxrt1189
m: memory chip => W25QxxxJV
i: memory interface => quad_spi
ix: peripheral instance index => 1
%! nxpmemcfg blhost-script -f mimxrt1189 -m W25QxxxJV -i quad_spi -ix 1 -o $CFG_MEM_FILE --force --fcb $FCB_FILE
assert os.path.exists(CFG_MEM_FILE)
nxpmemcfg blhost-script -f mimxrt1189 -m W25QxxxJV -i quad_spi -ix 1 -o workspace/config_mem.bls --force --fcb workspace/fcb.bin
Detected peripheral flexspi_nor for W25QxxxJV
Loaded option words: 0xC0000207
WARNING:spsdk.memcfg.memcfg:FCB block read back script has been generated. Be aware that s 4KB block at base address will be erased to avoid cumulative write! (228ms since start, memcfg.py:399)
Exported blhost script.
Let’s look inside the blhost-script:#
Code(filename=CFG_MEM_FILE, language="bash")
# BLHOST configure memory programming script
# Generated by SPSDK NXPMEMCFG tool
# Chip: mimxrt1189
# Peripheral: flexspi_nor
# Instance: 1
# Switch the instance of the peripheral to 1:
fill-memory 0x1FFE0000 4 0xCF900001
configure-memory 9 0x1FFE0000
# Configure memory:
# Option word 0: 0xC0000207
fill-memory 0x1FFE0000 4 0xC0000207
configure-memory 9 0x1FFE0000
# Script to erase FCB location, create FCB and read back a FCB block:
flash-erase-region 0x28000000 0x1000
fill-memory 0x1FFE0000 4 0xF000000F
configure-memory 9 0x1FFE0000
read-memory 0x28000400 0x200 workspace/fcb.bin
5. Execute the blhost script#
# The board must be in SDP mode
# Configure Boot Mode Switch to : 1/2/3-OFF, 4-ON
# Connect micro USB cable into USB OTG1 - J33
# Connect micro USB cable into Debug USB Port - J53
# FLASHLOADER_FILE = "../flashloader/ahab/workspace/flashloader.bin" # Path to Flashloader
# CFG_MEM_FILE = WORKSPACE + "config_mem.bls" # Configure memory template
# FCB_FILE = WORKSPACE + "fcb.bin" # Firmware Configuration block file
# COMPAR = "-u" # USB
# BLHOST_CONNECT_ROM = "0x1fc9,0x014c" # PID/VID of ROM
# BLHOST_CONNECT_FLDR = "0x15A2,0x0073" # PID/VID of NXP Flashloader
# Execute the commands generated by "blhost-script". This script will configure flash,
# program FCB into the external memory and reads back the binary data. Be aware tha erase of the first sector must be done.
# The script can be executed only once to read FCB.
%! blhost $COMPAR $BLHOST_CONNECT_FLDR batch $CFG_MEM_FILE
blhost -u 0x15A2,0x0073 batch workspace/config_mem.bls
Response status = 0 (0x0) Success.
Response status = 0 (0x0) Success.
Response status = 0 (0x0) Success.
Response status = 0 (0x0) Success.
Response status = 0 (0x0) Success.
Response status = 0 (0x0) Success.
Response status = 0 (0x0) Success.
Reading memory
Response status = 0 (0x0) Success.
Response word 1 = 512 (0x200)
Read 512 of 512 bytes.
6. Create a non-default memory configuration#
The nxpmemcfg get-templates sub-command can be used to generate yaml configuration templates that can be modified as needed:#
%! nxpmemcfg get-templates
nxpmemcfg get-templates
Usage: nxpmemcfg get-templates [OPTIONS]
Create template of Memory option words in YAML format.
Options:
-f, --family [lpc5502|lpc5504|lpc5506|lpc5512..., and more. Use 'get-families' command to show all.]
Select the chip family.
-o, --output DIRECTORY Path to a directory, where to store
generated/parsed files. [required]
--force Force overwriting of existing files.
--help Show this message and exit.
%! nxpmemcfg get-templates -f mimxrt1189 -o workspace/cfg_opt_templates/ --force
nxpmemcfg get-templates -f mimxrt1189 -o workspace/cfg_opt_templates/ --force
The Memory Configuration template for mimxrt1189 has been saved into workspace/cfg_opt_templates YAML file
The Memory Configuration template for mimxrt1189 has been saved into workspace/cfg_opt_templates YAML file
The Memory Configuration template for mimxrt1189 has been saved into workspace/cfg_opt_templates YAML file
The Memory Configuration template for mimxrt1189 has been saved into workspace/cfg_opt_templates YAML file
The Memory Configuration template for mimxrt1189 has been saved into workspace/cfg_opt_templates YAML file
The Memory Configuration template for mimxrt1189 has been saved into workspace/cfg_opt_templates YAML file
The Memory Configuration template for mimxrt1189 has been saved into workspace/cfg_opt_templates YAML file
Let’s inspect the flexspi_nor template:#
Code(filename="workspace/cfg_opt_templates/ow_flexspi_nor.yaml", language="yaml")
# ========================= Option Words Configuration template for mimxrt1189, flexspi_nor. =========================
# -------------------------------------------------------- Note --------------------------------------------------------
# Note for settings:
# All registers is possible to define also as one value although the bitfields are used. Instead of bitfields: ...
# field, the value: ... definition works as well.
# ======================================================================================================================
# == General Options ==
# ======================================================================================================================
# -------------------------------------===== The chip family name [Required] =====--------------------------------------
# Description: NXP chip family identifier.
# Possible options: <lpc5502, lpc5504, lpc5506, lpc5512, lpc5514, lpc5516, lpc5526, lpc5528, lpc55s04, lpc55s06,
# lpc55s14, lpc55s16, lpc55s26, lpc55s28, lpc55s36, lpc55s66, lpc55s69, mcxn235, mcxn236, mimxrt1010, mimxrt1015,
# mimxrt1020, mimxrt1024, mimxrt1040, mimxrt1050, mimxrt1060, mimxrt1064, mimxrt1165, mimxrt1166, mimxrt1171,
# mimxrt1172, mimxrt1173, mimxrt1175, mimxrt1176, mimxrt1181, mimxrt1182, mimxrt1187, mimxrt1189, mimxrt533s,
# mimxrt555s, mimxrt595s, mimxrt685s, rw610, rw612>
family: mimxrt1189
# -----------------------------------------===== MCU revision [Optional] =====------------------------------------------
# Description: Revision of silicon. The 'latest' name, means most current revision.
# Possible options: <a0, b0, latest>
revision: latest
# ----------------------------------------===== Peripheral name [Required] =====----------------------------------------
# Description: Name of the external memory support peripheral
# Possible options: <flexspi_nor, flexspi_nand, semc_nor, semc_nand, spi_nor, mmc, sd>
peripheral: flexspi_nor
# ----------------------------------------===== Interface name [Optional] =====-----------------------------------------
# Description: Interface name of some other details about connection
interface: quad_spi
# -------------------------------------===== Option words settings [Required] =====-------------------------------------
# Description: The The option word settings
settings:
# ----------------------------------------===== ConfigOption0 [Optional] =====----------------------------------------
# Description: Offset: 0x00000000, Width: 32b; FlexSPI NOR Configuration Option 0
ConfigOption0:
# ------------------------------------------===== MaxFreq [Optional] =====------------------------------------------
# Description: Offset: 0b, Width: 4b, The maximum work frequency for specified Flash device; 0 - Don't change
# FlexSPI clock setting
MaxFreq: 0
# -------------------------------------------===== Misc [Optional] =====--------------------------------------------
# Description: Offset: 4b, Width: 4b, Specify miscellaneous mode for selected flash type; Experimental feature, do
# not use in products, keep it as 0.
# - NotEnabled, (0): Miscellaneous mode is not enabled
# - Mode0-4-4, (1): Enable 0-4-4 mode for High Random Read performance
# - SwappedMode, (3): Data Order Swapped mode (for MXIC OctaFlash only)
# - InternalLoopBack, (5): Select the FlexSPI data sample source as internal loop back, more details please refer
# FlexSPI usage
# - StandSpiMode, (6): Config the FlexSPI NOR flash running at stand SPI mode
# Possible options: <NotEnabled, Mode0-4-4, SwappedMode, InternalLoopBack, StandSpiMode>
Misc: NotEnabled
# --------------------------------------===== QuadEnableType [Optional] =====---------------------------------------
# Description: Offset: 8b, Width: 4b, Specify the Quad Enable sequence, only applicable for device that only JESD216
# compliant, this field is ignored if device support JESD216A or later version. This field will be effective only if
# device is compliant with JESD216 only (9 longword SDFP table)
# - QeBitIsBit6InStatusReg1, (1): QE bit is bit6 in StatusReg1
# - QeBitIsBit1InStatusReg2, (2): QE bit is bit1 in StatusReg2
# - QeBitIsBit7InStatusReg2, (3): QE bit is bit7 in StatusReg2
# - QeBitIsBit1InStatusReg2EnableCommandIs0x31, (4): QE bit is bit1 in StatusReg2, enable command is 0x31
# Possible options: <QeBitIsBit6InStatusReg1, QeBitIsBit1InStatusReg2, QeBitIsBit7InStatusReg2,
# QeBitIsBit1InStatusReg2EnableCommandIs0x31>
QuadEnableType: '0x0'
# -----------------------------------------===== CMDPad(s) [Optional] =====-----------------------------------------
# Description: Offset: 12b, Width: 4b, Commands pads for the Flash device (1/4/8), for device that works under
# 1-1-4,1-4-4,1-1-8 or 1-8-8 mode, CMD pad(s) value is always 0x0, for devices that only support 4-4-4 mode for high
# performance, CMD pads value is 2, for devices that only support 8-8-8 mode for high performance, CMD pads value is
# 3
# - 1, (0): 1 bit
# - 4, (2): 4 bits
# - 8, (3): 8 bits
# Possible options: <1, 4, 8>
CMDPad(s): '1'
# --------------------------------------===== Query CMDPad(s) [Optional] =====--------------------------------------
# Description: Offset: 16b, Width: 4b, Command pads (1/4/8) for the SFDP command
# - 1, (0): 1 bit
# - 4, (2): 4 bits
# - 8, (3): 8 bits
# Possible options: <1, 4, 8>
Query CMDPad(s): '1'
# -----------------------------------===== Device Detection Type [Optional] =====-----------------------------------
# Description: Offset: 20b, Width: 4b, SW defined device types used for config block autodetection
# - QuadSPI_SDR, (0): QuadSPI SDR
# - QuadSPI_DDR, (1): QuadSPI DDR
# - HyperFLASH_1V8, (2): HyperFLASH 1V8
# - HyperFLASH_3V, (3): HyperFLASH 3V
# - MXICOPI_DDR, (4): MXICOPI DDR
# - MicronOPI_DDR, (6): MicronOPI DDR
# - AdestoOPI_DDR, (8): AdestoOPI DDR
# Possible options: <QuadSPI_SDR, QuadSPI_DDR, HyperFLASH_1V8, HyperFLASH_3V, MXICOPI_DDR, MicronOPI_DDR,
# AdestoOPI_DDR>
Device Detection Type: QuadSPI_SDR
# ----------------------------------------===== OptionSize [Optional] =====-----------------------------------------
# Description: Offset: 24b, Width: 4b, Option Size
# - OptionSize1, (0): Option words = 1
# - OptionSize2, (1): Option words = 2
# Possible options: <OptionSize1, OptionSize2>
OptionSize: OptionSize1
# ----------------------------------------===== ConfigOption1 [Optional] =====----------------------------------------
# Description: Offset: 0x00000004, Width: 32b; FlexSPI NOR Flash Configuration Option 1 - Optional
ConfigOption1:
# ----------------------------------------===== DummyCycles [Optional] =====----------------------------------------
# Description: Offset: 0b, Width: 8b, User provided dummy cycles for SDR/DDR read command: 0 - Auto detection,
# Others - Specified dummy cycles
DummyCycles: 0
# --------------------------------------===== StatusOverride [Optional] =====---------------------------------------
# Description: Offset: 8b, Width: 8b, Override status register value during device mode configuration
StatusOverride: 0
# ----------------------------------------===== PinMuxGroup [Optional] =====----------------------------------------
# Description: Offset: 16b, Width: 4b, Pin multiplexer group selection
PinMuxGroup: 0
# --------------------------------------===== DqsPinMuxGroup [Optional] =====---------------------------------------
# Description: Offset: 20b, Width: 4b, DQS Pin multiplexer group selection
DqsPinMuxGroup: 0
# -------------------------------------===== PinDriveStrength [Optional] =====--------------------------------------
# Description: Offset: 24b, Width: 4b, The Drive Strength of FlexSPI Pads
PinDriveStrength: 0
# --------------------------------------===== FlashConnection [Optional] =====--------------------------------------
# Description: Offset: 28b, Width: 4b, Select the FlexSPI Port A/B
# - SingleFlashPort_A, (0): Single Flash connected to port A
# - ParallelMode, (1): Parallel mode
# - SingleFlashPort_B, (2): Single Flash connected to port B
# Possible options: <SingleFlashPort_A, ParallelMode, SingleFlashPort_B>
FlashConnection: SingleFlashPort_A
Once the template is configured for the new memory, it can be used to export a blhost script with nxpmemcfg blhost-script like this:#
%! nxpmemcfg blhost-script -c "workspace/cfg_opt_templates/ow_flexspi_nor.yaml" -ix 1 -o $CUSTOM_CFG_MEM_FILE --fcb $CUSTOM_FCB_FILE --force
nxpmemcfg blhost-script -c "workspace/cfg_opt_templates/ow_flexspi_nor.yaml" -ix 1 -o workspace/custom_config_mem.bls --fcb workspace/custom_fcb.bin --force
WARNING:spsdk.memcfg.memcfg:FCB block read back script has been generated. Be aware that s 4KB block at base address will be erased to avoid cumulative write! (306ms since start, memcfg.py:399)
Exported blhost script.
Let’s inspect the blhost-script generated from the flexspi_nor template (note the difference in the option word):#
Code(filename=CUSTOM_CFG_MEM_FILE, language="bash")
# BLHOST configure memory programming script
# Generated by SPSDK NXPMEMCFG tool
# Chip: mimxrt1189
# Peripheral: flexspi_nor
# Instance: 1
# Switch the instance of the peripheral to 1:
fill-memory 0x1FFE0000 4 0xCF900001
configure-memory 9 0x1FFE0000
# Configure memory:
# Option word 0: 0xC0000000
fill-memory 0x1FFE0000 4 0xC0000000
configure-memory 9 0x1FFE0000
# Script to erase FCB location, create FCB and read back a FCB block:
flash-erase-region 0x28000000 0x1000
fill-memory 0x1FFE0000 4 0xF000000F
configure-memory 9 0x1FFE0000
read-memory 0x28000400 0x200 workspace/custom_fcb.bin