i.MX 95 AHAB with U-BOOT#

This notebook describes how to build a bootable AHAB image with ELE firmware and U-BOOT bootloader, and how to use NXPELE app.

1. Prerequisites#

SPSDK is needed with examples extension. pip install spsdk[examples] (Please refer to the installation documentation.)
This demo was tested with i.MX 95 EVK board with LPDDR5 memory and A0 chip revision.

1.1 Images preparation#

to create resulting binary containing AHAB containers, we need to prepare the binaries
in this section we reproduce the process which is done by the imx-mkimage tool
Obtain all the necessary binaries and put them into inputs directory

1.2 U-Boot#

In order to use the nxpele app, U-Boot must be built with AHAB support. CONFIG_AHAB_BOOT=y If you want to use the nxpele over fastboot, also multiplexing of console output to fastboot must be enabled by setting CONFIG_CONSOLE_MUX=y.

1.3 Requirements#

Download these files from the https://www.nxp.com/lgfiles/NMG/MAD/YOCTO/<package name> and put them into the inputs directory.

Primary image container set:

ELE firmware
lpddr5 or lpddr4 firmware files with OEI firmware
CM33 OEI TCM
CM33 System manager image
U-Boot SPL
[Optional] M7 application image

Secondary image container set

bl31.bin binary (ARM Trusted Firmware)
U-Boot (built with AHAB support)
TEE binary

2. AHAB Image#

2.1 AHAB Template#

We can generate the template using the nxpimage ahab get-template command. The command will generate a template. The template is a YAML file that contains the AHAB header and the AHAB container. The AHAB header contains the information about the image, such as the version, the number of containers, and the signature. The AHAB container contains the information about the image, such as the image type, the image version, the image size, and the image signature.

The following command generates the template:

nxpimage ahab get-template -f mimx9596 -o ahab_template.yaml

2.2 Exporting of the AHAB image#

The AHAB image can be exported using the nxpimage ahab export command. The command will create the AHAB image from the template. The following command creates the AHAB image:

nxpimage ahab export -c ahab_template.yaml 

2.4 Primary image container set#

Primary image container set consists of the following images:

ELE firmware
DDR firmware with OEI
System manager
U-Boot SPL
[Optional] M7 application image

nxpimage ahab get-template -r a0 -f mimx9596 -o workspace/ahab_template.yaml --force
Creating workspace/ahab_template.yaml template file.

Configuration Differences

# ========================  Advanced High-Assurance Boot Configuration template for mimx9596.  =========================

# ======================================================================================================================
#                                                 == General Options ==                                                 
# ======================================================================================================================
# -------------------------------------===== The chip family name [Required] =====--------------------------------------
# Description: NXP chip family identifier.
# Possible options: 
family: mimx9596
# -----------------------------------------===== MCU revision [Optional] =====------------------------------------------
# Description: Revision of silicon. The 'latest' name, means most current revision.
# Possible options: 
revision: latest
revision: a0
# -----------------------------------------===== Target memory [Optional] =====-----------------------------------------
# Description: Target memory for AHAB container
# Possible options: 
target_memory: standard Change the target memory to serial downloader
# ---------------------------------------===== Output file name [Required] =====----------------------------------------
# Description: Output AHAB file name
output: generated_ahab.bin Change the output file name
output: outputs/primary_ahab.bin
# ------------------------------===== List of containers present in AHAB [Required] =====-------------------------------
# Description: The order of containers in the list defines the order in AHAB.
containers: All
attributes related to the signing might be removed
  -
  # ====================================================================================================================
  #                                          == List of possible 2 options. ==                                          
  #                                        Options [binary_container, container]                                        
  # ====================================================================================================================

  #  =========================== [Example of possible configuration: #0 , erase if not used] ============================
    # -----------------------------------===== Binary AHAB container [Required] =====-----------------------------------
  - # -----------------------------------===== Binary AHAB container [Required] =====-----------------------------------
    # Description: Binary Container format to add to AHAB image, Typically it could be used to add ELE Firmware.
    binary_container: Define the path to the EdgeLock Enclave Firmware container
      # -----------------------------===== The AHAB container binary file [Required] =====------------------------------
      # Description: The binary file that contains AHAB "my_binary_container.bin
      path: my_ahab_container.bin All attributes related to the signing might be removed
      path: inputs/mx95a0-ahab-container.img

  #  =========================== [Example of possible configuration: #1 , erase if not used] ============================
    # --------------------------------------===== AHAB Container [Required] =====---------------------------------------
  - # --------------------------------------===== AHAB Container [Required] =====---------------------------------------
    # Description: Configurable Container format to add to AHAB image. This allow to configure all aspects of the AHAB
    # container.
    container: All attributes related to the signing might be removed
      # --------------------------------===== Super Root Key (SRK) set [Required] =====---------------------------------
      # Description: Defines which set is used to authenticate the container.
      # Possible options: 
      srk_set: none
      # ---------------------------------===== Used SRK [Conditionally required] =====----------------------------------
      # Description: Which key from SRK set is being used.
      used_srk_id: 0
      used_srk_id: 1
      # -------------------------------------===== SRK revoke mask [Optional] =====-------------------------------------
      # Description: Bit-mask to indicate which SRKs to revoke. Bit set to 1 means revoke key. Bit 0 = revoke SRK_0, bit
      # 1 = revoke SRK_1 etc. Example of revocation SRK_0 and SRK_1 - the value should be 0x03
      srk_revoke_mask: '0x00'
      # ----------------------------------===== GDET runtime behavior [Optional] =====----------------------------------
      # Description: This option defines runtime behavior of Glitch detector. Not supported by all devices and their ELE
      # firmware.
      #  - disabled:       GDET is disabled after the first OEM container has been authenticated (default behavior)
      #  - enabled_eleapi: Automatically enable GDET during all ELE API calls
      #  - enabled:        Leave GDET enabled
      # Possible options: 
      gdet_runtime_behavior: disabled
      # --------------------------------------===== Fuse version [Optional] =====---------------------------------------
      # Description: The value must be equal or greater than the version stored in fuses to allow loading this
      # container.
      fuse_version: 0
      # ------------------------------------===== Software version [Optional] =====-------------------------------------
      # Description: Number used by Privileged Host Boot Companion (PHBC) to select between multiple images with same
      # Fuse version field.
      sw_version: 0
      # -------------------------------===== AHAB container signing key [Optional] =====--------------------------------
      # Description: Private key used for sign the container header. Header can be signed by SRK. The referenced SRK
      # must not have been revoked.
      signing_key: my_signing_key.pem
      # -----------------------------------===== Signature Provider [Optional] =====------------------------------------
      # Description: Signature provider configuration in format 'type=;=;='. The
      # signature provider could be used instead of definition of 'signing_key'.
      signature_provider: type=file;file_path=my_prv_key.pem

      # ================================================================================================================
      #                     == Configuration of AHAB Container images (array of multiple images) ==                     
      # ================================================================================================================
      # ---------------------------------------===== Image array [Required] =====---------------------------------------
      # Description: Array of image entries.
      images:
        -
        # ==============================================================================================================
        #                                       == List of possible 11 options. ==                                      
        #      Options [Double Authentication of NXP Firmwares, OEI with DDR tunning images, OEI TCM Settings (ECC      
        # configuration etc.), Boot system manager, Cortex M7 additional application, SPL, V2X Dummy, Uboot ATF, Uboot, 
        #                            TEE Trusted Execution Environment, General Image Entry]                            
        # ==============================================================================================================

        #  ===== [Example of possible configuration: #0 Double Authentication of NXP Firmwares, erase if not used] ======
        # Double Authentication of NXP firmwares
        # Image array default settings. Can be overridden by definitions that are hidden in the template:
        # load_address:                  0x0000000000000000
        # hash_type:                     SHA384
          # -------------------------------------===== NXP ELE FW [Required] =====--------------------------------------
          # Description: NXP ELE firmware, that should be also signed by OEM keys binary file.
          double_authentication: nxp_ele.bin

        #  =========== [Example of possible configuration: #1 OEI with DDR tunning images, erase if not used] ===========
        # OEI with DDR PHY tunning images
        - # OEI with DDR PHY tunning images
        # Image array default settings. Can be overridden by definitions that are hidden in the template:
        # load_address:                  0x000000001FFC0000
        # entry_point:                   0x000000001FFC0001
        # image_type:                    oei
        # core_id:                       cortex-m33
        # hash_type:                     SHA384
          # -----------------------------------===== LPDDR memory FW [Required] =====-----------------------------------
          # Description: Firmware for LPDDR4/5 memory.
          lpddr_imem: lpddr_imem.bin
          lpddr_imem: inputs/lpddr5_imem_v202311.bin
          # ---------------------------===== LPDDR memory FW for quick boot [Optional] =====----------------------------
          # Description: Firmware for LPDDR4/5 for quick boot.
          lpddr_imem_qb: lpddr_imem_qb.bin
          lpddr_imem_qb: inputs/lpddr5_imem_qb_v202311.bin
          # ----------------------------------===== LPDDR memory data [Required] =====----------------------------------
          # Description: Data for LPDDR4/5 memory.
          lpddr_dmem: lpddr_dmem.bin
          lpddr_dmem: inputs/lpddr5_dmem_v202311.bin
          # --------------------------===== LPDDR memory data for quick boot [Optional] =====---------------------------
          # Description: Data for LPDDR4/5 memory in quick boot.
          lpddr_dmem_qb: lpddr_dmem_qb.bin
          lpddr_dmem_qb: inputs/lpddr5_dmem_qb_v202311.bin
          # -----------------------------------------===== OEI [Required] =====-----------------------------------------
          # Description: OEI - Optional Executable Image firmware
          oei_ddr: oei_ddr.bin
          oei_ddr: inputs/oei-m33-ddr.bin

        #  ==== [Example of possible configuration: #2 OEI TCM Settings (ECC configuration etc.), erase if not used] ====
        # OEI TCM settings (ECC etc.)
        - # OEI TCM settings (ECC etc.)
        # Image array default settings. Can be overridden by definitions that are hidden in the template:
        # load_address:                  0x000000001FFC0000
        # entry_point:                   0x000000001FFC0001
        # image_type:                    oei
        # core_id:                       cortex-m33
        # hash_type:                     SHA384
          # -------------------------------------===== OEI TCM FW [Required] =====--------------------------------------
          # Description: OEI(Optional Executable Image) TCM settings binary file.
          oei_tcm: oei_tcm.bin
          oei_tcm: inputs/oei-m33-tcm.bin

        #  =============== [Example of possible configuration: #3 Boot system manager, erase if not used] ===============
        # System booting image
        - # System booting image
        # Image array default settings. Can be overridden by definitions that are hidden in the template:
        # load_address:                  0x000000001FFC0000
        # image_type:                    executable
        # core_id:                       cortex-m33
        # hash_type:                     SHA384
          # ---------------------------------===== Boot system manager [Required] =====---------------------------------
          # Description: System manager booting image
          system_manager: system_manager.bin
          system_manager: inputs/m33_image-mx95evk.bin

        #  ======== [Example of possible configuration: #4 Cortex M7 additional application, erase if not used] =========
        # Cortex M7 additional application
        - # Cortex M7 additional application
        # Image array default settings. Can be overridden by definitions that are hidden in the template:
        # load_address:                  0x00000000303C0000
        # entry_point:                   0x0000000000000000
        # image_type:                    executable
        # core_id:                       cortex-m7-1
        # meta_data_start_cpu_id:        1
        # hash_type:                     SHA384
          # --------------------------===== Cortex M7 additional application [Required] =====---------------------------
          # Description: Cortex M7 additional application
          cortex_m7_app: cortex_m7_app.bin
          cortex_m7_app: inputs/hello_world_sm_cm7.bin

        #  ======================= [Example of possible configuration: #5 SPL, erase if not used] =======================
        # U-Boot SPL (Secondary program loader)
        - # U-Boot SPL (Secondary program loader)
        # Image array default settings. Can be overridden by definitions that are hidden in the template:
        # load_address:                  0x0000000020480000
        # image_type:                    executable
        # core_id:                       cortex-a55
        # meta_data_start_cpu_id:        2
        # hash_type:                     SHA384
          # -----------------------------------------===== SPL [Required] =====-----------------------------------------
          # Description: SPL firmware
          spl: spl.bin
          spl: inputs/u-boot-spl.bin-imx95-19x19-lpddr5-evk-sd

        #  ==================== [Example of possible configuration: #6 V2X Dummy, erase if not used] ====================
        # V2X dummy image container definition
        - # V2X dummy image container definition
        # Image array default settings. Can be overridden by definitions that are hidden in the template:
        # load_address:                  0x000000008B000000
        # image_type:                    v2x_dummy
        # core_id:                       cortex-m33
        # hash_type:                     SHA384
          # --------------------------------------===== V2X Dummy [Required] =====--------------------------------------
          # Description: If Present, V2X dummy image will be added to Image Array Entry (no data record)
          v2x_dummy: true

        #  ==================== [Example of possible configuration: #7 Uboot ATF, erase if not used] ====================
        # U-Boot ATF container definition
        # Image array default settings. Can be overridden by definitions that are hidden in the template:
        # load_address:                  0x000000008A200000
        # image_type:                    executable
        # core_id:                       cortex-a55
        # meta_data_start_cpu_id:        2
        # hash_type:                     SHA384
          # -------------------------------------===== ATF binary [Required] =====--------------------------------------
          # Description: ARM Trusted Firmware binary file.
          atf: bl31.bin

        #  ====================== [Example of possible configuration: #8 Uboot, erase if not used] ======================
        # U-Boot container definition
        # Image array default settings. Can be overridden by definitions that are hidden in the template:
        # load_address:                  0x0000000090200000
        # image_type:                    executable
        # core_id:                       cortex-a55
        # meta_data_start_cpu_id:        2
        # hash_type:                     SHA384
          # ------------------------------------===== U-Boot binary [Required] =====------------------------------------
          # Description: U-Boot binary file.
          uboot: u-boot.bin

        #  ======== [Example of possible configuration: #9 TEE Trusted Execution Environment, erase if not used] ========
        # A TEE (Trusted Execution Environment) is a trusted OS running in some secure environment, for example, TrustZone on ARM CPUs, or a separate secure co-processor etc. A TEE driver handles the details needed to communicate with the TEE.
        # Image array default settings. Can be overridden by definitions that are hidden in the template:
        # load_address:                  0x000000008C000000
        # image_type:                    executable
        # core_id:                       cortex-a55
        # meta_data_start_cpu_id:        2
        # hash_type:                     SHA384
          # -----------------------------------------===== TEE [Required] =====-----------------------------------------
          # Description: TEE - Trusted Execution Environment binary
          tee: tee.bin

        #  ============== [Example of possible configuration: #10 General Image Entry, erase if not used] ===============
        # General Image Entry
          # -------------------------------------===== Image path [Optional] =====--------------------------------------
          # Description: Path to image binary (absolute/relative). In case that only Image Array entry without any data
          # image is needed, Just do not use the image path. In case that the image size in container should be aligned
          # differently then SPSDK do (4 bytes for ELE images, 1 byte otherwise), there is hidden option
          # 'image_size_alignment' where could be override image size by any custom value.
          image_path: my_image.bin
          # ---------------------------===== Image offset in AHAB container [Optional] =====----------------------------
          # Description: Offset in bytes from start of container header to beginning of the image. Zero value means
          # automatic placing the image with proper alignment after previous one, this is recommended for
          # serial_downloader mode. In case of XiP type of AHAB image, the load_address and entry_point must correspond
          # to this values. Example of setting of load_address - AHAB_IMAGE_ADDRESS+IMAGE_OFFSET=LOAD_ADDRESS. The
          # Booting core images must be located after the other ones
          image_offset: 0
          # ------------------------------===== Image destination address [Required] =====------------------------------
          # Description: Address the image is written to in memory (absolute address in system memory).
          load_address: '0x1FFC_0000'
          # ----------------------------------===== Image entry point [Required] =====----------------------------------
          # Description: Image entry point (absolute address). Valid only for executable image types.
          entry_point: '0x1FFC_0000'
          # -------------------------------------===== Image type [Required] =====--------------------------------------
          # Description: Kind of image.
          # Possible options: 
          # executable_fast_boot_image, v2x_dummy, ele_as_image, ele, v2x_as_image, v2x_primary, v2x_secondary,
          # v2x_rom_patch>
          image_type: executable
          # ---------------------------------------===== Core ID [Required] =====---------------------------------------
          # Description: Defines the core the image is dedicated for. Not all cores are supported for all families.
          # Possible options: 
          core_id: cortex-m33
          # ----------------------------------===== Image encryption [Required] =====-----------------------------------
          # Description: Determines, whether image is encrypted or not.
          is_encrypted: false
          # -------------------------------------===== Boot flags [Optional] =====--------------------------------------
          # Description: Boot flags controlling SCFW boot.
          boot_flags: 0
          # ------------------------------------===== Start CPU ID [Optional] =====-------------------------------------
          # Description: Resource ID of CPU to be started
          meta_data_start_cpu_id: 0
          # ------------------------------===== CPU memory unit start ID [Optional] =====-------------------------------
          # Description: Resource ID of the MU associated with the CPU
          meta_data_mu_cpu_id: 0
          # ---------------------------------===== Start partition ID [Optional] =====----------------------------------
          # Description: Partition ID of the partition to start
          meta_data_start_partition_id: 0
          # ----------------------------------===== Images HASH type [Optional] =====-----------------------------------
          # Description: HASH type of image.
          # Possible options: 
          hash_type: sha512

      # ================================================================================================================
      #                                      == Configuration of AHAB SRK table ==                                      
      # ================================================================================================================
      # ---------------------------------===== SRK Table [Conditionally required] =====---------------------------------
      # Description: SRK (Super Root key) table definition.
      srk_table:
        # ----------------------------------------===== CA Flag [Optional] =====----------------------------------------
        # Description: CA Flag is used by HAB to indicate if the SRK is allowed to sign other keys
        flag_ca: false
        # ------------------------------===== Super Root Key (SRK) table [Required] =====-------------------------------
        # Description: Table containing the used SRK records. All SRKs must be of the same type. Supported signing
        # algorithms are: RSA-PSS, ECDSA, Dilithium or SM2. Supported hash algorithms: sha256, sha384, sha512, sha3_256,
        # sha3_384, sha3_512, sm3. Supported key sizes/curves: prime256v1, sec384r1, sec512r1, rsa2048, rsa4096,
        # dilithium3, sm2. Certificate may be of Certificate Authority. Dilithium algorithms are supported just in new
        # type of AHAB container
        srk_array:
          - my_srk_public_key0.pub
          - my_srk_public_key1.pub
          - my_srk_public_key2.pub
          - my_srk_public_key3.pub

      # ================================================================================================================
      #         == Optional configuration of AHAB Container Encryption blob (if not used, erase the section) ==         
      # ================================================================================================================
      # -------------------------------------===== Encryption blob [Optional] =====-------------------------------------
      # Description: Encryption blob container definition
      blob: And
finally remove unused parts for AHAB Certificate and Encryption blob
        # ------------------------------------===== Key identifier [Required] =====-------------------------------------
        # Description: The key identifier that has been used to generate DEK keyblob.
        key_identifier: 0
        # -------------------------------------===== DEK key size [Required] =====--------------------------------------
        # Description: Data Encryption key size. Used for AES CBC-MAC (128/192/256 size)
        # Possible options: <128, 192, 256>
        dek_key_size: 128
        # ----------------------------------------===== DEK key [Required] =====----------------------------------------
        # Description: Data Encryption key. Used for AES CBC-MAC (128/192/256 size). The HEX format is accepted
        dek_key: my_dek_key.txt
        # --------------------------------------===== DEK keyblob [Optional] =====--------------------------------------
        # Description: Wrapped Data Encryption key. Used for AES CBC-MAC (128/192/256 size). The HEX format is accepted.
        # If NOT used, the empty keyblob is inserted into container and need to be updated later.
        dek_keyblob: my_wrapped_key.txt And finally remove unused parts for AHAB Certificate and Encryption blob

# Copyright 2024 NXP
#
# SPDX-License-Identifier: BSD-3-Clause
# ==========================  Advanced High-Assurance Boot Configuration template for mimx9596.  ===========================

# ======================================================================================================================
#                                                 == General Options ==
# ======================================================================================================================
# ------------------------------------------===== MCU family [Required] =====-------------------------------------------
# Description: Family identifier including the chip revision. If revision is not present, latest revision is used as
# default.
# Possible options: 
family: mimx9596
# -----------------------------------------===== MCU revision [Optional] =====------------------------------------------
# Description: Revision of silicon
revision: a0
# ----------------------------------===== Target memory [Conditionally required] =====----------------------------------
# Description: Target memory for AHAB container
# Possible options: 
target_memory: standard
# ---------------------------------------===== Output file name [Required] =====----------------------------------------
# Description: Output AHAB file name
output: outputs/primary_ahab.bin
# ------------------------------===== List of containers present in AHAB [Required] =====-------------------------------
# Description: The order of containers in the list defines the order in AHAB.
containers:
  - # -----------------------------------===== Binary AHAB container [Required] =====-----------------------------------
    # Description: Binary Container format to add to AHAB image, Typically it could be used to add ELE Firmware.
    binary_container:
      # -----------------------------===== The AHAB container binary file [Required] =====------------------------------
      # Description: The binary file that contains AHAB "my_binary_container.bin
      path: inputs/mx95a0-ahab-container.img

  - # --------------------------------------===== AHAB Container [Required] =====---------------------------------------
    # Description: Configurable Container format to add to AHAB image. This allow to configure all aspects of the AHAB
    # container.
    container:
      # --------------------------------===== Super Root Key (SRK) set [Required] =====---------------------------------
      # Description: Defines which set is used to authenticate the container.
      # Possible options: 
      srk_set: none
      # ---------------------------------===== Used SRK [Conditionally required] =====----------------------------------
      # Description: Which key from SRK set is being used.
      used_srk_id: 1

      # ================================================================================================================
      #                     == Configuration of AHAB Container images (array of multiple images) ==
      # ================================================================================================================
      # ---------------------------------------===== Image array [Required] =====---------------------------------------
      # Description: Array of image entries.
      images:
        - # OEI with DDR PHY tunning images
          # Image array default settings. Can be override by defines that are hidden in template:
          # image_offset:                  0x00010400
          # load_address:                  0x000000001FFC0000
          # entry_point:                   0x000000001FFC0001
          # image_type:                    executable
          # core_id:                       cortex-m33
          # hash_type:                     SHA384
          # -----------------------------===== LPDDR memory FW in 1D mode [Required] =====------------------------------
          # Description: Firmware for LPDDR4/5 memory in 1D mode.
          lpddr_imem: inputs/lpddr5_imem_v202311.bin
          # -----------------------------===== LPDDR memory FW in 2D mode [Required] =====------------------------------
          # Description: Firmware for LPDDR4/5 memory in 2D mode.
          lpddr_imem_qb: inputs/lpddr5_imem_qb_v202311.bin
          # ----------------------------===== LPDDR memory data in 1D mode [Required] =====-----------------------------
          # Description: Data for LPDDR4/5 memory in 1D mode.
          lpddr_dmem: inputs/lpddr5_dmem_v202311.bin
          # ----------------------------===== LPDDR memory data in 2D mode [Required] =====-----------------------------
          # Description: Data for LPDDR4/5 memory in 2D mode.
          lpddr_dmem_qb: inputs/lpddr5_dmem_qb_v202311.bin
          # -----------------------------------------===== OEI [Required] =====-----------------------------------------
          # Description: OEI - Optional Executable Image firmware
          oei_ddr: inputs/oei-m33-ddr.bin

        - # OEI TCM settings (ECC etc.)
          # Image array default settings. Can be override by defines that are hidden in template:
          # image_offset:                  0x00010400
          # load_address:                  0x000000001FFC0000
          # entry_point:                   0x000000001FFC0001
          # image_type:                    executable
          # core_id:                       cortex-m33
          # hash_type:                     SHA384
          # -------------------------------------===== OEI TCM FW [Required] =====--------------------------------------
          # Description: OEI(Optional Executable Image) TCM settings binary file.
          oei_tcm: inputs/oei-m33-tcm.bin

        - # System booting image
          # Image array default settings. Can be override by defines that are hidden in template:
          # image_offset:                  0x00080400
          # load_address:                  0x000000001FFC0000
          # image_type:                    executable
          # core_id:                       cortex-m33
          # hash_type:                     SHA384
          # ---------------------------------===== Boot system manager [Required] =====---------------------------------
          # Description: System manager booting image
          system_manager: inputs/m33_image-mx95evk.bin

        - # Cortex M7 additional application
          # Image array default settings. Can be override by defines that are hidden in template:
          # load_address:                  0x00000000303C0000
          # image_type:                    executable
          # core_id:                       cortex-m7-1
          # hash_type:                     SHA384
          # --------------------------===== Cortex M7 additional application [Required] =====---------------------------
          # Description: Cortex M7 additional application
          cortex_m7_app: inputs/hello_world_sm_cm7.bin

        - # U-Boot SPL (Secondary program loader)
          # Image array default settings. Can be override by defines that are hidden in template:
          # image_offset:                  0x00010400
          # load_address:                  0x0000000020480000
          # image_type:                    executable
          # core_id:                       cortex-a55
          # hash_type:                     SHA384
          # -----------------------------------------===== SPL [Required] =====-----------------------------------------
          # Description: SPL firmware
          spl: inputs/u-boot-spl.bin-imx95-19x19-lpddr5-evk-sd

        - # V2X dummy image container definition
          # Image array default settings. Can be override by defines that are hidden in template:
          # load_address:                  0x000000008B000000
          # image_type:                    v2x_dummy
          # core_id:                       cortex-m33
          # hash_type:                     SHA384
          # --------------------------------------===== V2X Dummy [Required] =====--------------------------------------
          # Description: If Present, V2X dummy image will be added to Image Array Entry (no data record)
          v2x_dummy: true

2.5 Secondary image container set#

Secondary image container set consists of the following images:

bl31.bin binary (ARM Trusted Firmware)
U-Boot (built with AHAB support)
TEE binary

YamlDiffWidget("inputs/mx95_ahab_secondary.diffc").html

nxpimage ahab get-template -r a0 -f mimx9596 -o workspace/ahab_template.yaml --force
Creating workspace/ahab_template.yaml template file.

Configuration Differences

# ========================  Advanced High-Assurance Boot Configuration template for mimx9596.  =========================

# ======================================================================================================================
#                                                 == General Options ==                                                 
# ======================================================================================================================
# -------------------------------------===== The chip family name [Required] =====--------------------------------------
# Description: NXP chip family identifier.
# Possible options: 
family: mimx9596
# -----------------------------------------===== MCU revision [Optional] =====------------------------------------------
# Description: Revision of silicon. The 'latest' name, means most current revision.
# Possible options: 
revision: latest
revision: a0
# -----------------------------------------===== Target memory [Optional] =====-----------------------------------------
# Description: Target memory for AHAB container
# Possible options: 
target_memory: standard Change the target memory to serial downloader
# ---------------------------------------===== Output file name [Required] =====----------------------------------------
# Description: Output AHAB file name
output: generated_ahab.bin Change the output file name
output: outputs/secondary_ahab.bin
# ------------------------------===== List of containers present in AHAB [Required] =====-------------------------------
# Description: The order of containers in the list defines the order in AHAB.
containers: All
attributes related to the signing might be removed
  -
  # ====================================================================================================================
  #                                          == List of possible 2 options. ==                                          
  #                                        Options [binary_container, container]                                        
  # ====================================================================================================================

  #  =========================== [Example of possible configuration: #0 , erase if not used] ============================
    # -----------------------------------===== Binary AHAB container [Required] =====-----------------------------------
    # Description: Binary Container format to add to AHAB image, Typically it could be used to add ELE Firmware.
    binary_container: Define the path to the EdgeLock Enclave Firmware container
      # -----------------------------===== The AHAB container binary file [Required] =====------------------------------
      # Description: The binary file that contains AHAB "my_binary_container.bin
      path: my_ahab_container.bin All attributes related to the signing might be removed

  #  =========================== [Example of possible configuration: #1 , erase if not used] ============================
    # --------------------------------------===== AHAB Container [Required] =====---------------------------------------
  - # --------------------------------------===== AHAB Container [Required] =====---------------------------------------
    # Description: Configurable Container format to add to AHAB image. This allow to configure all aspects of the AHAB
    # container.
    container: All attributes related to the signing might be removed
      # --------------------------------===== Super Root Key (SRK) set [Required] =====---------------------------------
      # Description: Defines which set is used to authenticate the container.
      # Possible options: 
      srk_set: none
      # ---------------------------------===== Used SRK [Conditionally required] =====----------------------------------
      # Description: Which key from SRK set is being used.
      used_srk_id: 0
      used_srk_id: 1
      # -------------------------------------===== SRK revoke mask [Optional] =====-------------------------------------
      # Description: Bit-mask to indicate which SRKs to revoke. Bit set to 1 means revoke key. Bit 0 = revoke SRK_0, bit
      # 1 = revoke SRK_1 etc. Example of revocation SRK_0 and SRK_1 - the value should be 0x03
      srk_revoke_mask: '0x00'
      # ----------------------------------===== GDET runtime behavior [Optional] =====----------------------------------
      # Description: This option defines runtime behavior of Glitch detector. Not supported by all devices and their ELE
      # firmware.
      #  - disabled:       GDET is disabled after the first OEM container has been authenticated (default behavior)
      #  - enabled_eleapi: Automatically enable GDET during all ELE API calls
      #  - enabled:        Leave GDET enabled
      # Possible options: 
      gdet_runtime_behavior: disabled
      # --------------------------------------===== Fuse version [Optional] =====---------------------------------------
      # Description: The value must be equal or greater than the version stored in fuses to allow loading this
      # container.
      fuse_version: 0
      # ------------------------------------===== Software version [Optional] =====-------------------------------------
      # Description: Number used by Privileged Host Boot Companion (PHBC) to select between multiple images with same
      # Fuse version field.
      sw_version: 0
      # -------------------------------===== AHAB container signing key [Optional] =====--------------------------------
      # Description: Private key used for sign the container header. Header can be signed by SRK. The referenced SRK
      # must not have been revoked.
      signing_key: my_signing_key.pem
      # -----------------------------------===== Signature Provider [Optional] =====------------------------------------
      # Description: Signature provider configuration in format 'type=;=;='. The
      # signature provider could be used instead of definition of 'signing_key'.
      signature_provider: type=file;file_path=my_prv_key.pem

      # ================================================================================================================
      #                     == Configuration of AHAB Container images (array of multiple images) ==                     
      # ================================================================================================================
      # ---------------------------------------===== Image array [Required] =====---------------------------------------
      # Description: Array of image entries.
      images:
        -
        # ==============================================================================================================
        #                                       == List of possible 11 options. ==                                      
        #      Options [Double Authentication of NXP Firmwares, OEI with DDR tunning images, OEI TCM Settings (ECC      
        # configuration etc.), Boot system manager, Cortex M7 additional application, SPL, V2X Dummy, Uboot ATF, Uboot, 
        #                            TEE Trusted Execution Environment, General Image Entry]                            
        # ==============================================================================================================

        #  ===== [Example of possible configuration: #0 Double Authentication of NXP Firmwares, erase if not used] ======
        # Double Authentication of NXP firmwares
        # Image array default settings. Can be overridden by definitions that are hidden in the template:
        # load_address:                  0x0000000000000000
        # hash_type:                     SHA384
          # -------------------------------------===== NXP ELE FW [Required] =====--------------------------------------
          # Description: NXP ELE firmware, that should be also signed by OEM keys binary file.
          double_authentication: nxp_ele.bin

        #  =========== [Example of possible configuration: #1 OEI with DDR tunning images, erase if not used] ===========
        # OEI with DDR PHY tunning images
        # Image array default settings. Can be overridden by definitions that are hidden in the template:
        # load_address:                  0x000000001FFC0000
        # entry_point:                   0x000000001FFC0001
        # image_type:                    oei
        # core_id:                       cortex-m33
        # hash_type:                     SHA384
          # -----------------------------------===== LPDDR memory FW [Required] =====-----------------------------------
          # Description: Firmware for LPDDR4/5 memory.
          lpddr_imem: lpddr_imem.bin
          # ---------------------------===== LPDDR memory FW for quick boot [Optional] =====----------------------------
          # Description: Firmware for LPDDR4/5 for quick boot.
          lpddr_imem_qb: lpddr_imem_qb.bin
          # ----------------------------------===== LPDDR memory data [Required] =====----------------------------------
          # Description: Data for LPDDR4/5 memory.
          lpddr_dmem: lpddr_dmem.bin
          # --------------------------===== LPDDR memory data for quick boot [Optional] =====---------------------------
          # Description: Data for LPDDR4/5 memory in quick boot.
          lpddr_dmem_qb: lpddr_dmem_qb.bin
          # -----------------------------------------===== OEI [Required] =====-----------------------------------------
          # Description: OEI - Optional Executable Image firmware
          oei_ddr: oei_ddr.bin

        #  ==== [Example of possible configuration: #2 OEI TCM Settings (ECC configuration etc.), erase if not used] ====
        # OEI TCM settings (ECC etc.)
        # Image array default settings. Can be overridden by definitions that are hidden in the template:
        # load_address:                  0x000000001FFC0000
        # entry_point:                   0x000000001FFC0001
        # image_type:                    oei
        # core_id:                       cortex-m33
        # hash_type:                     SHA384
          # -------------------------------------===== OEI TCM FW [Required] =====--------------------------------------
          # Description: OEI(Optional Executable Image) TCM settings binary file.
          oei_tcm: oei_tcm.bin

        #  =============== [Example of possible configuration: #3 Boot system manager, erase if not used] ===============
        # System booting image
        # Image array default settings. Can be overridden by definitions that are hidden in the template:
        # load_address:                  0x000000001FFC0000
        # image_type:                    executable
        # core_id:                       cortex-m33
        # hash_type:                     SHA384
          # ---------------------------------===== Boot system manager [Required] =====---------------------------------
          # Description: System manager booting image
          system_manager: system_manager.bin

        #  ======== [Example of possible configuration: #4 Cortex M7 additional application, erase if not used] =========
        # Cortex M7 additional application
        # Image array default settings. Can be overridden by definitions that are hidden in the template:
        # load_address:                  0x00000000303C0000
        # entry_point:                   0x0000000000000000
        # image_type:                    executable
        # core_id:                       cortex-m7-1
        # meta_data_start_cpu_id:        1
        # hash_type:                     SHA384
          # --------------------------===== Cortex M7 additional application [Required] =====---------------------------
          # Description: Cortex M7 additional application
          cortex_m7_app: cortex_m7_app.bin

        #  ======================= [Example of possible configuration: #5 SPL, erase if not used] =======================
        # U-Boot SPL (Secondary program loader)
        # Image array default settings. Can be overridden by definitions that are hidden in the template:
        # load_address:                  0x0000000020480000
        # image_type:                    executable
        # core_id:                       cortex-a55
        # meta_data_start_cpu_id:        2
        # hash_type:                     SHA384
          # -----------------------------------------===== SPL [Required] =====-----------------------------------------
          # Description: SPL firmware
          spl: spl.bin

        #  ==================== [Example of possible configuration: #6 V2X Dummy, erase if not used] ====================
        # V2X dummy image container definition
        # Image array default settings. Can be overridden by definitions that are hidden in the template:
        # load_address:                  0x000000008B000000
        # image_type:                    v2x_dummy
        # core_id:                       cortex-m33
        # hash_type:                     SHA384
          # --------------------------------------===== V2X Dummy [Required] =====--------------------------------------
          # Description: If Present, V2X dummy image will be added to Image Array Entry (no data record)
          v2x_dummy: true

        #  ==================== [Example of possible configuration: #7 Uboot ATF, erase if not used] ====================
        # U-Boot ATF container definition
        - # U-Boot ATF container definition
        # Image array default settings. Can be overridden by definitions that are hidden in the template:
        # load_address:                  0x000000008A200000
        # image_type:                    executable
        # core_id:                       cortex-a55
        # meta_data_start_cpu_id:        2
        # hash_type:                     SHA384
          # -------------------------------------===== ATF binary [Required] =====--------------------------------------
          # Description: ARM Trusted Firmware binary file.
          atf: bl31.bin
          atf: inputs/bl31-imx95.bin-optee

        #  ====================== [Example of possible configuration: #8 Uboot, erase if not used] ======================
        # U-Boot container definition
        - # U-Boot container definition
        # Image array default settings. Can be overridden by definitions that are hidden in the template:
        # load_address:                  0x0000000090200000
        # image_type:                    executable
        # core_id:                       cortex-a55
        # meta_data_start_cpu_id:        2
        # hash_type:                     SHA384
          # ------------------------------------===== U-Boot binary [Required] =====------------------------------------
          # Description: U-Boot binary file.
          uboot: u-boot.bin
          uboot: inputs/u-boot.bin

        #  ======== [Example of possible configuration: #9 TEE Trusted Execution Environment, erase if not used] ========
        # A TEE (Trusted Execution Environment) is a trusted OS running in some secure environment, for example, TrustZone on ARM CPUs, or a separate secure co-processor etc. A TEE driver handles the details needed to communicate with the TEE.
        - # A TEE (Trusted Execution Environment) is a trusted OS running in some secure environment, for example, TrustZone on ARM CPUs, or a separate secure co-processor etc. A TEE driver handles the details needed to communicate with the TEE.
        # Image array default settings. Can be overridden by definitions that are hidden in the template:
        # load_address:                  0x000000008C000000
        # image_type:                    executable
        # core_id:                       cortex-a55
        # meta_data_start_cpu_id:        2
        # hash_type:                     SHA384
          # -----------------------------------------===== TEE [Required] =====-----------------------------------------
          # Description: TEE - Trusted Execution Environment binary
          tee: tee.bin
          tee: inputs/tee.bin

        #  ============== [Example of possible configuration: #10 General Image Entry, erase if not used] ===============
        # General Image Entry
          # -------------------------------------===== Image path [Optional] =====--------------------------------------
          # Description: Path to image binary (absolute/relative). In case that only Image Array entry without any data
          # image is needed, Just do not use the image path. In case that the image size in container should be aligned
          # differently then SPSDK do (4 bytes for ELE images, 1 byte otherwise), there is hidden option
          # 'image_size_alignment' where could be override image size by any custom value.
          image_path: my_image.bin
          # ---------------------------===== Image offset in AHAB container [Optional] =====----------------------------
          # Description: Offset in bytes from start of container header to beginning of the image. Zero value means
          # automatic placing the image with proper alignment after previous one, this is recommended for
          # serial_downloader mode. In case of XiP type of AHAB image, the load_address and entry_point must correspond
          # to this values. Example of setting of load_address - AHAB_IMAGE_ADDRESS+IMAGE_OFFSET=LOAD_ADDRESS. The
          # Booting core images must be located after the other ones
          image_offset: 0
          # ------------------------------===== Image destination address [Required] =====------------------------------
          # Description: Address the image is written to in memory (absolute address in system memory).
          load_address: '0x1FFC_0000'
          # ----------------------------------===== Image entry point [Required] =====----------------------------------
          # Description: Image entry point (absolute address). Valid only for executable image types.
          entry_point: '0x1FFC_0000'
          # -------------------------------------===== Image type [Required] =====--------------------------------------
          # Description: Kind of image.
          # Possible options: 
          # executable_fast_boot_image, v2x_dummy, ele_as_image, ele, v2x_as_image, v2x_primary, v2x_secondary,
          # v2x_rom_patch>
          image_type: executable
          # ---------------------------------------===== Core ID [Required] =====---------------------------------------
          # Description: Defines the core the image is dedicated for. Not all cores are supported for all families.
          # Possible options: 
          core_id: cortex-m33
          # ----------------------------------===== Image encryption [Required] =====-----------------------------------
          # Description: Determines, whether image is encrypted or not.
          is_encrypted: false
          # -------------------------------------===== Boot flags [Optional] =====--------------------------------------
          # Description: Boot flags controlling SCFW boot.
          boot_flags: 0
          # ------------------------------------===== Start CPU ID [Optional] =====-------------------------------------
          # Description: Resource ID of CPU to be started
          meta_data_start_cpu_id: 0
          # ------------------------------===== CPU memory unit start ID [Optional] =====-------------------------------
          # Description: Resource ID of the MU associated with the CPU
          meta_data_mu_cpu_id: 0
          # ---------------------------------===== Start partition ID [Optional] =====----------------------------------
          # Description: Partition ID of the partition to start
          meta_data_start_partition_id: 0
          # ----------------------------------===== Images HASH type [Optional] =====-----------------------------------
          # Description: HASH type of image.
          # Possible options: 
          hash_type: sha512

      # ================================================================================================================
      #                                      == Configuration of AHAB SRK table ==                                      
      # ================================================================================================================
      # ---------------------------------===== SRK Table [Conditionally required] =====---------------------------------
      # Description: SRK (Super Root key) table definition.
      srk_table: Remove srk table definition
        # ----------------------------------------===== CA Flag [Optional] =====----------------------------------------
        # Description: CA Flag is used by HAB to indicate if the SRK is allowed to sign other keys
        flag_ca: false
        # ------------------------------===== Super Root Key (SRK) table [Required] =====-------------------------------
        # Description: Table containing the used SRK records. All SRKs must be of the same type. Supported signing
        # algorithms are: RSA-PSS, ECDSA, Dilithium or SM2. Supported hash algorithms: sha256, sha384, sha512, sha3_256,
        # sha3_384, sha3_512, sm3. Supported key sizes/curves: prime256v1, sec384r1, sec512r1, rsa2048, rsa4096,
        # dilithium3, sm2. Certificate may be of Certificate Authority. Dilithium algorithms are supported just in new
        # type of AHAB container
        srk_array:
          - my_srk_public_key0.pub
          - my_srk_public_key1.pub
          - my_srk_public_key2.pub
          - my_srk_public_key3.pub

      # ================================================================================================================
      #         == Optional configuration of AHAB Container Encryption blob (if not used, erase the section) ==         
      # ================================================================================================================
      # -------------------------------------===== Encryption blob [Optional] =====-------------------------------------
      # Description: Encryption blob container definition
      blob: And
finally remove unused parts for AHAB Certificate and Encryption blob
        # ------------------------------------===== Key identifier [Required] =====-------------------------------------
        # Description: The key identifier that has been used to generate DEK keyblob.
        key_identifier: 0
        # -------------------------------------===== DEK key size [Required] =====--------------------------------------
        # Description: Data Encryption key size. Used for AES CBC-MAC (128/192/256 size)
        # Possible options: <128, 192, 256>
        dek_key_size: 128
        # ----------------------------------------===== DEK key [Required] =====----------------------------------------
        # Description: Data Encryption key. Used for AES CBC-MAC (128/192/256 size). The HEX format is accepted
        dek_key: my_dek_key.txt
        # --------------------------------------===== DEK keyblob [Optional] =====--------------------------------------
        # Description: Wrapped Data Encryption key. Used for AES CBC-MAC (128/192/256 size). The HEX format is accepted.
        # If NOT used, the empty keyblob is inserted into container and need to be updated later.
        dek_keyblob: my_wrapped_key.txt And finally remove unused parts for AHAB Certificate and Encryption blob

# Copyright 2024 NXP
#
# SPDX-License-Identifier: BSD-3-Clause
# ==========================  Advanced High-Assurance Boot Configuration template for mimx9596.  ===========================

# ======================================================================================================================
#                                                 == General Options ==
# ======================================================================================================================
# ------------------------------------------===== MCU family [Required] =====-------------------------------------------
# Description: Family identifier including the chip revision. If revision is not present, latest revision is used as
# default.
# Possible options: 
family: mimx9596
# -----------------------------------------===== MCU revision [Optional] =====------------------------------------------
# Description: Revision of silicon
revision: a0
# ----------------------------------===== Target memory [Conditionally required] =====----------------------------------
# Description: Target memory for AHAB container
# Possible options: 
target_memory: standard
# ---------------------------------------===== Output file name [Required] =====----------------------------------------
# Description: Output AHAB file name
output: outputs/secondary_ahab.bin
# ------------------------------===== List of containers present in AHAB [Required] =====-------------------------------
# Description: The order of containers in the list defines the order in AHAB.
containers:
  - # --------------------------------------===== AHAB Container [Required] =====---------------------------------------
    # Description: Configurable Container format to add to AHAB image. This allow to configure all aspects of the AHAB
    # container.
    container:
      # --------------------------------===== Super Root Key (SRK) set [Required] =====---------------------------------
      # Description: Defines which set is used to authenticate the container.
      # Possible options: 
      srk_set: none
      # ---------------------------------===== Used SRK [Conditionally required] =====----------------------------------
      # Description: Which key from SRK set is being used.
      used_srk_id: 1
      # ================================================================================================================
      #                     == Configuration of AHAB Container images (array of multiple images) ==
      # ================================================================================================================
      # ---------------------------------------===== Image array [Required] =====---------------------------------------
      # Description: Array of image entries.
      images:
        - # U-Boot ATF container definition
          # Image array default settings. Can be override by defines that are hidden in template:
          # load_address:                  0x000000008A200000
          # image_type:                    executable
          # core_id:                       cortex-a55
          # meta_data_start_cpu_id:        2
          # hash_type:                     SHA384
          # -------------------------------------===== ATF binary [Required] =====--------------------------------------
          # Description: ARM Trusted Firmware binary file.
          atf: inputs/bl31-imx95.bin-optee

        - # U-Boot container definition
          # Image array default settings. Can be override by defines that are hidden in template:
          # load_address:                  0x0000000090200000
          # image_type:                    executable
          # core_id:                       cortex-a55
          # meta_data_start_cpu_id:        2
          # hash_type:                     SHA384
          # ------------------------------------===== U-Boot binary [Required] =====------------------------------------
          # Description: U-Boot binary file.
          # uboot: u-boot-imx95-19x19-lpddr5-evk.bin-sd
          uboot: inputs/u-boot.bin

        - # A TEE (Trusted Execution Environment) is a trusted OS running in some secure environment, for example, TrustZone on ARM CPUs, or a separate secure co-processor etc. A TEE driver handles the details needed to communicate with the TEE.
          # Image array default settings. Can be override by defines that are hidden in template:
          # load_address:                  0x000000008C000000
          # image_type:                    executable
          # core_id:                       cortex-a55
          # meta_data_start_cpu_id:        2
          # hash_type:                     SHA384
          # -----------------------------------------===== TEE [Required] =====-----------------------------------------
          # Description: TEE - Trusted Execution Environment binary
          tee: inputs/tee.bin

2.6 Exporting of full AHAB image (container set)#

U-Boot image consist from two image container sets. The first one contains ELE firmware, DDR firmware with OEI, system manager and U-Boot SPL. This image is loaded using the SDPS protocol. Once the U-Boot SPL is loaded to OCRAM the fastboot is opened and the second container is loaded using the fastboot protocol.

If the image is intended for loading using the UUU, the memory type should be set to serial_downloader. However the type of each individual AHAB should be set to standard, because it will be stored in flash memory.

nxpimage -v bootable-image merge -c u-boot-flash_template.yaml -o flash.bin

YamlDiffWidget("inputs/mx95_ahab_bimg.diffc").html

nxpimage bootable-image get-templates -f mimx9596 -o workspace --force
Creating workspace/bootimg_mimx9596_serial_downloader.yaml template file.
Creating workspace/bootimg_mimx9596_flexspi_nor.yaml template file.
Creating workspace/bootimg_mimx9596_emmc.yaml template file.
Creating workspace/bootimg_mimx9596_sd.yaml template file.
Creating workspace/bootimg_mimx9596_recovery_spi.yaml template file.

Configuration Differences

# =====================  Bootable Image Configuration template for mimx9596 / Serial downloader.  ======================

# ======================================================================================================================
#                                                 == General Options ==                                                 
# ======================================================================================================================
# -------------------------------------===== The chip family name [Required] =====--------------------------------------
# Description: NXP chip family identifier.
# Possible options: 
# lpc5528, lpc5534, lpc5536, lpc55s04, lpc55s06, lpc55s14, lpc55s16, lpc55s26, lpc55s28, lpc55s36, lpc55s66, lpc55s69,
# mc56f81646, mc56f81648, mc56f81666, mc56f81668, mc56f81746, mc56f81748, mc56f81766, mc56f81768, mcxa132, mcxa133,
# mcxa142, mcxa143, mcxa144, mcxa145, mcxa146, mcxa152, mcxa153, mcxa154, mcxa155, mcxa156, mcxn235, mcxn236, mcxn546,
# mcxn547, mcxn946, mcxn947, mcxw716a, mcxw716c, mimx8ulp, mimx9131, mimx9352, mimx9596, mimxrt1010, mimxrt1015,
# mimxrt1020, mimxrt1024, mimxrt1040, mimxrt1050, mimxrt1060, mimxrt1064, mimxrt1165, mimxrt1166, mimxrt1171,
# mimxrt1172, mimxrt1173, mimxrt1175, mimxrt1176, mimxrt1181, mimxrt1182, mimxrt1187, mimxrt1189, mimxrt533s,
# mimxrt555s, mimxrt595s, mimxrt685s, mimxrt798s, mwct2012, mwct2012a, nhs52s04, rw610, rw612>
family: mimx9596
# -----------------------------------------===== MCU revision [Optional] =====------------------------------------------
# Description: Revision of silicon. The 'latest' name, means most current revision.
# Possible options: 
revision: latest
# ------------------------------------------===== Memory type [Required] =====------------------------------------------
# Description: Specify type of memory used by bootable image description.
memory_type: serial_downloader
# ----------------------------------------===== Initial segment [Optional] =====----------------------------------------
# Description: The segment name or the index of initial segment in exported image
init_offset: 0
# ======================================================================================================================
#                                      == Primary Executable Segment definition ==                                      
# ======================================================================================================================
# ----------------------------------===== Primary Image Container Set [Optional] =====----------------------------------
# Description: This is primary Image Container Set that is validated by ROM and usually contains DDR initialization and
# SPL code. It could be used as pre-prepared binary form of AHAB and also YAML configuration file for AHAB. In case that
# YAML configuration file is used, the Bootable image tool build the AHAB itself.
primary_image_container_set: primary_image_container_set.yaml path to our primary container set configuration
primary_image_container_set: mx95_uboot_primary.yaml
# ======================================================================================================================
#                                     == Secondary Executable Segment definition ==                                     
# ======================================================================================================================
# ---------------------------------===== Secondary Image Container Set [Optional] =====---------------------------------
# Description: This is secondary AHAB image that is validated by SPL from primary image. It could be used as pre-
# prepared binary form of AHAB and also YAML configuration file for AHAB. In case that YAML configuration file is used,
# the Bootable image tool build the AHAB itself.
secondary_image_container_set: secondary_image_container_set.yaml path to our secondary container set configuration
secondary_image_container_set: mx95_uboot_secondary.yaml

# Copyright 2024 NXP
#
# SPDX-License-Identifier: BSD-3-Clause
# =======================  Bootable Image Configuration template for mimx9596 / serial_downloader.  ========================

# ======================================================================================================================
#                                                 == General Options ==
# ======================================================================================================================
# ------------------------------------------===== MCU family [Required] =====-------------------------------------------
# Description: MCU family name.
family: mimx9596
# -------------------------------------===== Chip silicon revision [Optional] =====-------------------------------------
# Description: If needed this could be used to specify silicon revision of device.
# Possible options: 
revision: latest
# ------------------------------------------===== Memory type [Required] =====------------------------------------------
# Description: Specify type of memory used by bootable image description.
memory_type: serial_downloader
# ======================================================================================================================
#                                      == Primary executable Segment definition ==
# ======================================================================================================================
# ------------------------------------===== Primary AHAB container [Optional] =====-------------------------------------
# Description: This is primary AHAB image that is validated by ROM and usually contains DDR initialization and SPL code.
# AHAB container image path. It could be used as pre-prepared binary form of AHAB and also YAML configuration file for
# AHAB. In case that YAML configuration file is used, the Bootable image tool build the AHAB itself.
primary_image_container_set: mx95_uboot_primary.yaml
# ======================================================================================================================
#                                     == Secondary executable Segment definition ==
# ======================================================================================================================
# -----------------------------------===== Secondary AHAB container [Optional] =====------------------------------------
# Description: This is secondary AHAB image that is validated by SPL from primary image. AHAB container image path. It
# could be used as pre-prepared binary form of AHAB and also YAML configuration file for AHAB. In case that YAML
# configuration file is used, the Bootable image tool build the AHAB itself.
secondary_image_container_set: mx95_uboot_secondary.yaml

U_BOOT_PRIMARY = "inputs/mx95_uboot_primary.yaml"
U_BOOT_SECONDARY = "inputs/mx95_uboot_secondary.yaml"
U_BOOT_FLASH_BOOT_CFG = "inputs/bootimg_mx95_serial_downloader.yaml"
U_BOOT_FLASH_BOOT = "outputs/flash.bin"

VERBOSITY = "-v"

# EXPORT U-BOOT IMAGE
%! nxpimage -v bootable-image merge --config $U_BOOT_FLASH_BOOT_CFG --output $U_BOOT_FLASH_BOOT

nxpimage -v bootable-image merge --config bootimg_mx95_serial_downloader.yaml --output outputs/flash.bin 
INFO:spsdk.apps.nxpimage:Created Bootable Image:
Name:      Bootable Image for mimx9596
Starts:    0x0
Ends:      0x26bbff
Size:      Size: 2.4 MiB; 2,538,496 B
Alignment: 1 B
Pattern:zeros
Memory type: MemoryType.SERIAL_DOWNLOADER
Revision: latest

INFO:spsdk.apps.nxpimage:Created Bootable Image memory map:

+==0x0000_0000= Bootable Image for mimx9596 =====================+
|                   Size: 2.4 MiB; 2,538,496 B                   |
|   Memory type: MemoryType.SERIAL_DOWNLOADER Revision: latest   |
|                         Pattern: zeros                         |
|+==0x0000_0000= primary_image_container_set ===================+|
||                  Size: 852.0 kiB; 872,448 B                  ||
||                  AHAB Image for mimx9596_a0                  ||
||                        Pattern: zeros                        ||
||+==0x0000_0000= AHAB Containers =============================+||
|||                   Size: 8.0 kiB; 8,192 B                   |||
|||                   AHAB Containers block                    |||
|||                       Pattern: zeros                       |||
|||+==0x0000_0000= AHAB Container 0 ==========================+|||
||||                       Size: 544 B                        ||||
||||              AHAB Container for nxp_SWver:0              ||||
|||+==0x0000_021f=============================================+|||
|||                         Gap: 480 B                         |||
|||+==0x0000_0400= AHAB Container 1 ==========================+|||
||||                       Size: 832 B                        ||||
||||              AHAB Container for oem_SWver:0              ||||
|||+==0x0000_073f=============================================+|||
|||                         Gap: 192 B                         |||
|||+==0x0000_0800= AHAB Container 2 ==========================+|||
||||                       Size: 800 B                        ||||
||||             AHAB Container for none_SWver:0              ||||
|||+==0x0000_0b1f=============================================+|||
||+==0x0000_1fff===============================================+||
||+==0x0000_2000= Container 0 AHAB Data Image 0 ===============+||
|||                  Size: 82.3 kiB; 84,288 B                  |||
||| AHAB encrypted data block for ele core and ele Image Type. |||
||+==0x0001_693f===============================================+||
||                         Gap: 5.7 kiB                         ||
||+==0x0001_8000= Container 1 AHAB Data Image 0 ===============+||
|||                  Size: 52.0 kiB; 53,248 B                  |||
||| AHAB data block for v2x-1 core and v2x_primary Image Type. |||
||+==0x0002_4fff===============================================+||
||+==0x0002_5000= Container 1 AHAB Data Image 1 ===============+||
|||                  Size: 28.0 kiB; 28,672 B                  |||
|||AHAB data block for v2x-2 core and v2x_secondary Image Type.|||
||+==0x0002_bfff===============================================+||
||+==0x0002_c000= OEI DDR =====================================+||
|||                 Size: 308.0 kiB; 315,392 B                 |||
|||  AHAB data block for cortex-m33 core and oei Image Type.   |||
||+==0x0007_8fff===============================================+||
||                        Gap: 64.0 kiB                         ||
||+==0x0008_9000= OEI TCM =====================================+||
|||                   Size: 4.0 kiB; 4,096 B                   |||
|||  AHAB data block for cortex-m33 core and oei Image Type.   |||
||+==0x0008_9fff===============================================+||
||+==0x0008_a000= System manager ==============================+||
|||                 Size: 143.0 kiB; 146,432 B                 |||
|||  AHAB data block for cortex-m33 core and executable Image  |||
|||                           Type.                            |||
||+==0x000a_dbff===============================================+||
||+==0x000a_dc00= Additional Cortex M7 application ============+||
|||                  Size: 15.0 kiB; 15,360 B                  |||
||| AHAB data block for cortex-m7-1 core and executable Image  |||
|||                           Type.                            |||
||+==0x000b_17ff===============================================+||
||+==0x000b_1800= U-Boot SPL ==================================+||
|||                 Size: 142.0 kiB; 145,408 B                 |||
|||  AHAB data block for cortex-a55 core and executable Image  |||
|||                           Type.                            |||
||+==0x000d_4fff===============================================+||
||+==0x000d_5000= V2X core Dummy record =======================+||
|||                         Size: 0 B                          |||
|||  AHAB data block for cortex-m33 core and v2x_dummy Image   |||
|||                           Type.                            |||
||+==0x000d_4fff===============================================+||
|+==0x000d_4fff=================================================+|
|+==0x000d_5000= secondary_image_container_set =================+|
||                  Size: 1.6 MiB; 1,666,048 B                  ||
||                  AHAB Image for mimx9596_a0                  ||
||                        Pattern: zeros                        ||
||+==0x000d_5000= AHAB Containers =============================+||
|||                   Size: 8.0 kiB; 8,192 B                   |||
|||                   AHAB Containers block                    |||
|||                       Pattern: zeros                       |||
|||+==0x000d_5000= AHAB Container 0 ==========================+|||
||||                       Size: 416 B                        ||||
||||             AHAB Container for none_SWver:0              ||||
|||+==0x000d_519f=============================================+|||
||+==0x000d_6fff===============================================+||
||+==0x000d_7000= ATF - ARM Trusted Firmware ==================+||
|||                  Size: 37.0 kiB; 37,888 B                  |||
|||  AHAB data block for cortex-a55 core and executable Image  |||
|||                           Type.                            |||
||+==0x000e_03ff===============================================+||
||+==0x000e_0400= U-Boot Firmware =============================+||
|||                 Size: 1.0 MiB; 1,091,584 B                 |||
|||  AHAB data block for cortex-a55 core and executable Image  |||
|||                           Type.                            |||
||+==0x001e_abff===============================================+||
||+==0x001e_ac00= U-Boot TEE - Trusted Execution Environment ==+||
|||                 Size: 516.0 kiB; 528,384 B                 |||
|||  AHAB data block for cortex-a55 core and executable Image  |||
|||                           Type.                            |||
||+==0x0026_bbff===============================================+||
|+==0x0026_bbff=================================================+|
+==0x0026_bbff===================================================+

Success. (Bootable Image: outputs\flash.bin created) 

# Set the boot mode to Cortex-M Serial Downloader 1001 and download the files using the UUU tool

%! nxpuuu $VERBOSITY write -f mimx9596 -b emmc $U_BOOT_FLASH_BOOT

nxpuuu -v write -f mimx9596 -b emmc outputs/flash.bin 
SDPS: boot -f outputs/flash.bin

SDPV: write -f outputs/flash.bin -skipspl

SDPV: jump

Done

Now change the boot mode to Cortex-M EMMC 1010 and reset the board. Find the serial port that belongs to U-Boot console and interrupt the boot. When the console is switched to U-Boot menu, we can use the nxpele tool to communicate with the ELE.

%! nxpele -f mimx9596 -p COM180 -d uboot_serial get-info

nxpele -f mimx9596 -p COM180 -d uboot_serial get-info 
ELE get info ends successfully:
Command:          0xda
Version:          2
Length:           160
SoC ID:           MX95 - 0x9500
SoC version:      A100
Life Cycle:       OEM_OPEN - 0x0010
SSSM state:       4
UUID:             e1e6e6f98b514065bd991d922e30c659
SHA256 ROM PATCH: e32d8de33ee1ac953d78379b9d6c1523544e3b77a9848d1d1af9374f678a81c1
SHA256 FW:        eb3f39a5dccafb3335e8e3e340d3e5f06b386666036a30affb660a301b5ed420
Advanced information:
  OEM SRKH:       0000000000000000000000000000000000000000000000000000000000000000
  IMEM state:     This is non-existing tag(0x0) from enum: EleImemState - 0x00
  CSAL state:     EdgeLock secure enclave random context initialization succeed - 0x02
  TRNG state:     TRNG entropy is valid and ready to be read - 0x03
  OEM PQC SRKH:  00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000

%! nxpele -f mimx9596 -p COM180 -d uboot_serial generate-keyblob DEK -a AES_CBC --key-id 0 --key 00000000000000000000000000000000 --key-size 128

nxpele -f mimx9596 -p COM180 -d uboot_serial generate-keyblob DEK -a AES_CBC --key-id 0 --key 00000000000000000000000000000000 --key-size 128 
ELE generate DEK key blob ends successfully:
00480081011003002021528bf3419a5498d94d8f73333fb48e1925049106cc0a28d5fb19a2c48a5797b509156279678db9b3a304af8d073ed2f8937a24e80a07381f79cede1d0577

i.MX 95 AHAB with U-BOOT

Contents

i.MX 95 AHAB with U-BOOT#

1. Prerequisites#

1.1 Images preparation#

1.2 U-Boot#

1.3 Requirements#

2. AHAB Image#

2.1 AHAB Template#

2.2 Exporting of the AHAB image#

2.4 Primary image container set#

Configuration Differences

2.5 Secondary image container set#

Configuration Differences

2.6 Exporting of full AHAB image (container set)#

Configuration Differences